odm_HWConfig.h

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/******************************************************************************
 3 *
 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
 5 *
 6 ******************************************************************************/
 7
 8
 9#ifndef __HALHWOUTSRC_H__
10#define __HALHWOUTSRC_H__
11
12/*  */
13/*  structure and define */
14/*  */
15
16struct phy_rx_agc_info_t {
17	#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
18		u8 gain:7, trsw:1;
19	#else
20		u8 trsw:1, gain:7;
21	#endif
22};
23
24struct phy_status_rpt_8192cd_t {
25	struct phy_rx_agc_info_t path_agc[2];
26	u8 ch_corr[2];
27	u8 cck_sig_qual_ofdm_pwdb_all;
28	u8 cck_agc_rpt_ofdm_cfosho_a;
29	u8 cck_rpt_b_ofdm_cfosho_b;
30	u8 rsvd_1;/* ch_corr_msb; */
31	u8 noise_power_db_msb;
32	s8 path_cfotail[2];
33	u8 pcts_mask[2];
34	s8 stream_rxevm[2];
35	u8 path_rxsnr[2];
36	u8 noise_power_db_lsb;
37	u8 rsvd_2[3];
38	u8 stream_csi[2];
39	u8 stream_target_csi[2];
40	s8	sig_evm;
41	u8 rsvd_3;
42
43#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
44	u8 antsel_rx_keep_2:1;	/* ex_intf_flg:1; */
45	u8 sgi_en:1;
46	u8 rxsc:2;
47	u8 idle_long:1;
48	u8 r_ant_train_en:1;
49	u8 ant_sel_b:1;
50	u8 ant_sel:1;
51#else	/*  _BIG_ENDIAN_ */
52	u8 ant_sel:1;
53	u8 ant_sel_b:1;
54	u8 r_ant_train_en:1;
55	u8 idle_long:1;
56	u8 rxsc:2;
57	u8 sgi_en:1;
58	u8 antsel_rx_keep_2:1;	/* ex_intf_flg:1; */
59#endif
60};
61
62void odm_phy_status_query(struct dm_odm_t *dm_odm, struct odm_phy_info *phy_info,
63			  u8 *phy_status, struct odm_packet_info *pkt_info);
64
65enum hal_status ODM_ConfigRFWithTxPwrTrackHeaderFile(struct dm_odm_t *pDM_Odm);
66
67enum hal_status ODM_ConfigRFWithHeaderFile(
68	struct dm_odm_t *pDM_Odm,
69	enum ODM_RF_Config_Type ConfigType,
70	enum rf_path eRFPath
71);
72
73enum hal_status ODM_ConfigBBWithHeaderFile(
74	struct dm_odm_t *pDM_Odm, enum ODM_BB_Config_Type ConfigType
75);
76
77enum hal_status ODM_ConfigFWWithHeaderFile(
78	struct dm_odm_t *pDM_Odm,
79	enum ODM_FW_Config_Type ConfigType,
80	u8 *pFirmware,
81	u32 *pSize
82);
83
84s32 odm_signal_scale_mapping(struct dm_odm_t *pDM_Odm, s32 CurrSig);
85
86#endif