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ov2722.h
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linux-6.19.14/drivers/staging/media/atomisp/i2c/ov2722.h
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Support for OmniVision OV2722 1080p HD camera sensor. 4 * 5 * Copyright (c) 2013 Intel Corporation. All Rights Reserved. 6 */ 7 8#ifndef __OV2722_H__ 9#define __OV2722_H__ 10#include <linux/kernel.h> 11#include <linux/types.h> 12#include <linux/i2c.h> 13#include <linux/delay.h> 14#include <linux/videodev2.h> 15#include <linux/spinlock.h> 16#include <media/v4l2-subdev.h> 17#include <media/v4l2-device.h> 18#include <linux/v4l2-mediabus.h> 19#include <media/media-entity.h> 20#include <media/v4l2-ctrls.h> 21 22#include "../include/linux/atomisp_platform.h" 23 24#define OV2722_POWER_UP_RETRY_NUM 5 25 26/* Defines for register writes and register array processing */ 27#define I2C_MSG_LENGTH 0x2 28#define I2C_RETRY_COUNT 5 29 30#define OV2722_FOCAL_LENGTH_NUM 278 /*2.78mm*/ 31 32#define MAX_FMTS 1 33 34/* 35 * focal length bits definition: 36 * bits 31-16: numerator, bits 15-0: denominator 37 */ 38#define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064 39 40/* 41 * current f-number bits definition: 42 * bits 31-16: numerator, bits 15-0: denominator 43 */ 44#define OV2722_F_NUMBER_DEFAULT 0x1a000a 45 46/* 47 * f-number range bits definition: 48 * bits 31-24: max f-number numerator 49 * bits 23-16: max f-number denominator 50 * bits 15-8: min f-number numerator 51 * bits 7-0: min f-number denominator 52 */ 53#define OV2722_F_NUMBER_RANGE 0x1a0a1a0a 54#define OV2720_ID 0x2720 55#define OV2722_ID 0x2722 56 57#define OV2722_FINE_INTG_TIME_MIN 0 58#define OV2722_FINE_INTG_TIME_MAX_MARGIN 0 59#define OV2722_COARSE_INTG_TIME_MIN 1 60#define OV2722_COARSE_INTG_TIME_MAX_MARGIN 4 61 62/* 63 * OV2722 System control registers 64 */ 65#define OV2722_SW_SLEEP 0x0100 66#define OV2722_SW_RESET 0x0103 67#define OV2722_SW_STREAM 0x0100 68 69#define OV2722_SC_CMMN_CHIP_ID_H 0x300A 70#define OV2722_SC_CMMN_CHIP_ID_L 0x300B 71#define OV2722_SC_CMMN_SCCB_ID 0x300C 72#define OV2722_SC_CMMN_SUB_ID 0x302A /* process, version*/ 73 74#define OV2722_SC_CMMN_PAD_OEN0 0x3000 75#define OV2722_SC_CMMN_PAD_OEN1 0x3001 76#define OV2722_SC_CMMN_PAD_OEN2 0x3002 77#define OV2722_SC_CMMN_PAD_OUT0 0x3008 78#define OV2722_SC_CMMN_PAD_OUT1 0x3009 79#define OV2722_SC_CMMN_PAD_OUT2 0x300D 80#define OV2722_SC_CMMN_PAD_SEL0 0x300E 81#define OV2722_SC_CMMN_PAD_SEL1 0x300F 82#define OV2722_SC_CMMN_PAD_SEL2 0x3010 83 84#define OV2722_SC_CMMN_PAD_PK 0x3011 85#define OV2722_SC_CMMN_A_PWC_PK_O_13 0x3013 86#define OV2722_SC_CMMN_A_PWC_PK_O_14 0x3014 87 88#define OV2722_SC_CMMN_CLKRST0 0x301A 89#define OV2722_SC_CMMN_CLKRST1 0x301B 90#define OV2722_SC_CMMN_CLKRST2 0x301C 91#define OV2722_SC_CMMN_CLKRST3 0x301D 92#define OV2722_SC_CMMN_CLKRST4 0x301E 93#define OV2722_SC_CMMN_CLKRST5 0x3005 94#define OV2722_SC_CMMN_PCLK_DIV_CTRL 0x3007 95#define OV2722_SC_CMMN_CLOCK_SEL 0x3020 96#define OV2722_SC_SOC_CLKRST5 0x3040 97 98#define OV2722_SC_CMMN_PLL_CTRL0 0x3034 99#define OV2722_SC_CMMN_PLL_CTRL1 0x3035 100#define OV2722_SC_CMMN_PLL_CTRL2 0x3039 101#define OV2722_SC_CMMN_PLL_CTRL3 0x3037 102#define OV2722_SC_CMMN_PLL_MULTIPLIER 0x3036 103#define OV2722_SC_CMMN_PLL_DEBUG_OPT 0x3038 104#define OV2722_SC_CMMN_PLLS_CTRL0 0x303A 105#define OV2722_SC_CMMN_PLLS_CTRL1 0x303B 106#define OV2722_SC_CMMN_PLLS_CTRL2 0x303C 107#define OV2722_SC_CMMN_PLLS_CTRL3 0x303D 108 109#define OV2722_SC_CMMN_MIPI_PHY_16 0x3016 110#define OV2722_SC_CMMN_MIPI_PHY_17 0x3017 111#define OV2722_SC_CMMN_MIPI_SC_CTRL_18 0x3018 112#define OV2722_SC_CMMN_MIPI_SC_CTRL_19 0x3019 113#define OV2722_SC_CMMN_MIPI_SC_CTRL_21 0x3021 114#define OV2722_SC_CMMN_MIPI_SC_CTRL_22 0x3022 115 116#define OV2722_AEC_PK_EXPO_H 0x3500 117#define OV2722_AEC_PK_EXPO_M 0x3501 118#define OV2722_AEC_PK_EXPO_L 0x3502 119#define OV2722_AEC_MANUAL_CTRL 0x3503 120#define OV2722_AGC_ADJ_H 0x3508 121#define OV2722_AGC_ADJ_L 0x3509 122#define OV2722_VTS_DIFF_H 0x350c 123#define OV2722_VTS_DIFF_L 0x350d 124#define OV2722_GROUP_ACCESS 0x3208 125#define OV2722_HTS_H 0x380c 126#define OV2722_HTS_L 0x380d 127#define OV2722_VTS_H 0x380e 128#define OV2722_VTS_L 0x380f 129 130#define OV2722_MWB_GAIN_R_H 0x5186 131#define OV2722_MWB_GAIN_R_L 0x5187 132#define OV2722_MWB_GAIN_G_H 0x5188 133#define OV2722_MWB_GAIN_G_L 0x5189 134#define OV2722_MWB_GAIN_B_H 0x518a 135#define OV2722_MWB_GAIN_B_L 0x518b 136 137#define OV2722_H_CROP_START_H 0x3800 138#define OV2722_H_CROP_START_L 0x3801 139#define OV2722_V_CROP_START_H 0x3802 140#define OV2722_V_CROP_START_L 0x3803 141#define OV2722_H_CROP_END_H 0x3804 142#define OV2722_H_CROP_END_L 0x3805 143#define OV2722_V_CROP_END_H 0x3806 144#define OV2722_V_CROP_END_L 0x3807 145#define OV2722_H_OUTSIZE_H 0x3808 146#define OV2722_H_OUTSIZE_L 0x3809 147#define OV2722_V_OUTSIZE_H 0x380a 148#define OV2722_V_OUTSIZE_L 0x380b 149 150#define OV2722_START_STREAMING 0x01 151#define OV2722_STOP_STREAMING 0x00 152 153struct regval_list { 154 u16 reg_num; 155 u8 value; 156}; 157 158struct ov2722_resolution { 159 u8 *desc; 160 const struct ov2722_reg *regs; 161 int res; 162 int width; 163 int height; 164 int fps; 165 int pix_clk_freq; 166 u32 skip_frames; 167 u16 pixels_per_line; 168 u16 lines_per_frame; 169 bool used; 170 int mipi_freq; 171}; 172 173struct ov2722_format { 174 u8 *desc; 175 u32 pixelformat; 176 struct ov2722_reg *regs; 177}; 178 179/* 180 * ov2722 device structure. 181 */ 182struct ov2722_device { 183 struct v4l2_subdev sd; 184 struct media_pad pad; 185 struct v4l2_mbus_framefmt format; 186 struct mutex input_lock; 187 struct ov2722_resolution *res; 188 189 struct camera_sensor_platform_data *platform_data; 190 u16 pixels_per_line; 191 u16 lines_per_frame; 192 u8 type; 193 194 struct v4l2_ctrl_handler ctrl_handler; 195 struct v4l2_ctrl *link_freq; 196}; 197 198enum ov2722_tok_type { 199 OV2722_8BIT = 0x0001, 200 OV2722_16BIT = 0x0002, 201 OV2722_32BIT = 0x0004, 202 OV2722_TOK_TERM = 0xf000, /* terminating token for reg list */ 203 OV2722_TOK_DELAY = 0xfe00, /* delay token for reg list */ 204 OV2722_TOK_MASK = 0xfff0 205}; 206 207/** 208 * struct ov2722_reg - MI sensor register format 209 * @type: type of the register 210 * @reg: 16-bit offset to register 211 * @val: 8/16/32-bit register value 212 * 213 * Define a structure for sensor register initialization values 214 */ 215struct ov2722_reg { 216 enum ov2722_tok_type type; 217 u16 reg; 218 u32 val; /* @set value for read/mod/write, @mask */ 219}; 220 221#define to_ov2722_sensor(x) container_of(x, struct ov2722_device, sd) 222 223#define OV2722_MAX_WRITE_BUF_SIZE 30 224 225struct ov2722_write_buffer { 226 u16 addr; 227 u8 data[OV2722_MAX_WRITE_BUF_SIZE]; 228}; 229 230struct ov2722_write_ctrl { 231 int index; 232 struct ov2722_write_buffer buffer; 233}; 234 235/* 236 * Register settings for various resolution 237 */ 238#if 0 239static const struct ov2722_reg ov2722_QVGA_30fps[] = { 240 {OV2722_8BIT, 0x3718, 0x10}, 241 {OV2722_8BIT, 0x3702, 0x0c}, 242 {OV2722_8BIT, 0x373a, 0x1c}, 243 {OV2722_8BIT, 0x3715, 0x01}, 244 {OV2722_8BIT, 0x3703, 0x0c}, 245 {OV2722_8BIT, 0x3705, 0x06}, 246 {OV2722_8BIT, 0x3730, 0x0e}, 247 {OV2722_8BIT, 0x3704, 0x1c}, 248 {OV2722_8BIT, 0x3f06, 0x00}, 249 {OV2722_8BIT, 0x371c, 0x00}, 250 {OV2722_8BIT, 0x371d, 0x46}, 251 {OV2722_8BIT, 0x371e, 0x00}, 252 {OV2722_8BIT, 0x371f, 0x63}, 253 {OV2722_8BIT, 0x3708, 0x61}, 254 {OV2722_8BIT, 0x3709, 0x12}, 255 {OV2722_8BIT, 0x3800, 0x01}, 256 {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */ 257 {OV2722_8BIT, 0x3802, 0x00}, 258 {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32 */ 259 {OV2722_8BIT, 0x3804, 0x06}, 260 {OV2722_8BIT, 0x3805, 0x95}, /* H crop end: 1685 */ 261 {OV2722_8BIT, 0x3806, 0x04}, 262 {OV2722_8BIT, 0x3807, 0x27}, /* V crop end: 1063 */ 263 {OV2722_8BIT, 0x3808, 0x01}, 264 {OV2722_8BIT, 0x3809, 0x50}, /* H output size: 336 */ 265 {OV2722_8BIT, 0x380a, 0x01}, 266 {OV2722_8BIT, 0x380b, 0x00}, /* V output size: 256 */ 267 268 /* H blank timing */ 269 {OV2722_8BIT, 0x380c, 0x08}, 270 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ 271 {OV2722_8BIT, 0x380e, 0x04}, 272 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ 273 {OV2722_8BIT, 0x3810, 0x00}, 274 {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ 275 {OV2722_8BIT, 0x3812, 0x00}, 276 {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ 277 {OV2722_8BIT, 0x3820, 0xc0}, 278 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ 279 {OV2722_8BIT, 0x3814, 0x71}, 280 {OV2722_8BIT, 0x3815, 0x71}, 281 {OV2722_8BIT, 0x3612, 0x49}, 282 {OV2722_8BIT, 0x3618, 0x00}, 283 {OV2722_8BIT, 0x3a08, 0x01}, 284 {OV2722_8BIT, 0x3a09, 0xc3}, 285 {OV2722_8BIT, 0x3a0a, 0x01}, 286 {OV2722_8BIT, 0x3a0b, 0x77}, 287 {OV2722_8BIT, 0x3a0d, 0x00}, 288 {OV2722_8BIT, 0x3a0e, 0x00}, 289 {OV2722_8BIT, 0x4520, 0x09}, 290 {OV2722_8BIT, 0x4837, 0x1b}, 291 {OV2722_8BIT, 0x3000, 0xff}, 292 {OV2722_8BIT, 0x3001, 0xff}, 293 {OV2722_8BIT, 0x3002, 0xf0}, 294 {OV2722_8BIT, 0x3600, 0x08}, 295 {OV2722_8BIT, 0x3621, 0xc0}, 296 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ 297 {OV2722_8BIT, 0x3633, 0x63}, 298 {OV2722_8BIT, 0x3634, 0x24}, 299 {OV2722_8BIT, 0x3f01, 0x0c}, 300 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ 301 {OV2722_8BIT, 0x3614, 0xf0}, 302 {OV2722_8BIT, 0x3630, 0x2d}, 303 {OV2722_8BIT, 0x370b, 0x62}, 304 {OV2722_8BIT, 0x3706, 0x61}, 305 {OV2722_8BIT, 0x4000, 0x02}, 306 {OV2722_8BIT, 0x4002, 0xc5}, 307 {OV2722_8BIT, 0x4005, 0x08}, 308 {OV2722_8BIT, 0x404f, 0x84}, 309 {OV2722_8BIT, 0x4051, 0x00}, 310 {OV2722_8BIT, 0x5000, 0xff}, 311 {OV2722_8BIT, 0x3a18, 0x00}, 312 {OV2722_8BIT, 0x3a19, 0x80}, 313 {OV2722_8BIT, 0x4521, 0x00}, 314 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ 315 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ 316 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ 317 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ 318 {OV2722_8BIT, 0x370c, 0x0c}, 319 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ 320 {OV2722_8BIT, 0x3035, 0x00}, 321 {OV2722_8BIT, 0x3036, 0x26}, 322 {OV2722_8BIT, 0x3037, 0xa1}, 323 {OV2722_8BIT, 0x303e, 0x19}, 324 {OV2722_8BIT, 0x3038, 0x06}, 325 {OV2722_8BIT, 0x3018, 0x04}, 326 327 /* Added for power optimization */ 328 {OV2722_8BIT, 0x3000, 0x00}, 329 {OV2722_8BIT, 0x3001, 0x00}, 330 {OV2722_8BIT, 0x3002, 0x00}, 331 {OV2722_8BIT, 0x3a0f, 0x40}, 332 {OV2722_8BIT, 0x3a10, 0x38}, 333 {OV2722_8BIT, 0x3a1b, 0x48}, 334 {OV2722_8BIT, 0x3a1e, 0x30}, 335 {OV2722_8BIT, 0x3a11, 0x90}, 336 {OV2722_8BIT, 0x3a1f, 0x10}, 337 {OV2722_8BIT, 0x3011, 0x22}, 338 {OV2722_8BIT, 0x3a00, 0x58}, 339 {OV2722_8BIT, 0x3503, 0x17}, 340 {OV2722_8BIT, 0x3500, 0x00}, 341 {OV2722_8BIT, 0x3501, 0x46}, 342 {OV2722_8BIT, 0x3502, 0x00}, 343 {OV2722_8BIT, 0x3508, 0x00}, 344 {OV2722_8BIT, 0x3509, 0x10}, 345 {OV2722_TOK_TERM, 0, 0}, 346 347}; 348 349static const struct ov2722_reg ov2722_480P_30fps[] = { 350 {OV2722_8BIT, 0x3718, 0x10}, 351 {OV2722_8BIT, 0x3702, 0x18}, 352 {OV2722_8BIT, 0x373a, 0x3c}, 353 {OV2722_8BIT, 0x3715, 0x01}, 354 {OV2722_8BIT, 0x3703, 0x1d}, 355 {OV2722_8BIT, 0x3705, 0x12}, 356 {OV2722_8BIT, 0x3730, 0x1f}, 357 {OV2722_8BIT, 0x3704, 0x3f}, 358 {OV2722_8BIT, 0x3f06, 0x1d}, 359 {OV2722_8BIT, 0x371c, 0x00}, 360 {OV2722_8BIT, 0x371d, 0x83}, 361 {OV2722_8BIT, 0x371e, 0x00}, 362 {OV2722_8BIT, 0x371f, 0xbd}, 363 {OV2722_8BIT, 0x3708, 0x63}, 364 {OV2722_8BIT, 0x3709, 0x52}, 365 {OV2722_8BIT, 0x3800, 0x00}, 366 {OV2722_8BIT, 0x3801, 0xf2}, /* H crop start: 322 - 80 = 242*/ 367 {OV2722_8BIT, 0x3802, 0x00}, 368 {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/ 369 {OV2722_8BIT, 0x3804, 0x06}, 370 {OV2722_8BIT, 0x3805, 0xBB}, /* H crop end: 1643 + 80 = 1723*/ 371 {OV2722_8BIT, 0x3806, 0x04}, 372 {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/ 373 {OV2722_8BIT, 0x3808, 0x02}, 374 {OV2722_8BIT, 0x3809, 0xE0}, /* H output size: 656 +80 = 736*/ 375 {OV2722_8BIT, 0x380a, 0x01}, 376 {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */ 377 378 /* H blank timing */ 379 {OV2722_8BIT, 0x380c, 0x08}, 380 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ 381 {OV2722_8BIT, 0x380e, 0x04}, 382 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ 383 {OV2722_8BIT, 0x3810, 0x00}, 384 {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ 385 {OV2722_8BIT, 0x3812, 0x00}, 386 {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ 387 {OV2722_8BIT, 0x3820, 0x80}, 388 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ 389 {OV2722_8BIT, 0x3814, 0x31}, 390 {OV2722_8BIT, 0x3815, 0x31}, 391 {OV2722_8BIT, 0x3612, 0x4b}, 392 {OV2722_8BIT, 0x3618, 0x04}, 393 {OV2722_8BIT, 0x3a08, 0x02}, 394 {OV2722_8BIT, 0x3a09, 0x67}, 395 {OV2722_8BIT, 0x3a0a, 0x02}, 396 {OV2722_8BIT, 0x3a0b, 0x00}, 397 {OV2722_8BIT, 0x3a0d, 0x00}, 398 {OV2722_8BIT, 0x3a0e, 0x00}, 399 {OV2722_8BIT, 0x4520, 0x0a}, 400 {OV2722_8BIT, 0x4837, 0x1b}, 401 {OV2722_8BIT, 0x3000, 0xff}, 402 {OV2722_8BIT, 0x3001, 0xff}, 403 {OV2722_8BIT, 0x3002, 0xf0}, 404 {OV2722_8BIT, 0x3600, 0x08}, 405 {OV2722_8BIT, 0x3621, 0xc0}, 406 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ 407 {OV2722_8BIT, 0x3633, 0x63}, 408 {OV2722_8BIT, 0x3634, 0x24}, 409 {OV2722_8BIT, 0x3f01, 0x0c}, 410 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ 411 {OV2722_8BIT, 0x3614, 0xf0}, 412 {OV2722_8BIT, 0x3630, 0x2d}, 413 {OV2722_8BIT, 0x370b, 0x62}, 414 {OV2722_8BIT, 0x3706, 0x61}, 415 {OV2722_8BIT, 0x4000, 0x02}, 416 {OV2722_8BIT, 0x4002, 0xc5}, 417 {OV2722_8BIT, 0x4005, 0x08}, 418 {OV2722_8BIT, 0x404f, 0x84}, 419 {OV2722_8BIT, 0x4051, 0x00}, 420 {OV2722_8BIT, 0x5000, 0xff}, 421 {OV2722_8BIT, 0x3a18, 0x00}, 422 {OV2722_8BIT, 0x3a19, 0x80}, 423 {OV2722_8BIT, 0x4521, 0x00}, 424 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ 425 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ 426 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ 427 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ 428 {OV2722_8BIT, 0x370c, 0x0c}, 429 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ 430 {OV2722_8BIT, 0x3035, 0x00}, 431 {OV2722_8BIT, 0x3036, 0x26}, 432 {OV2722_8BIT, 0x3037, 0xa1}, 433 {OV2722_8BIT, 0x303e, 0x19}, 434 {OV2722_8BIT, 0x3038, 0x06}, 435 {OV2722_8BIT, 0x3018, 0x04}, 436 437 /* Added for power optimization */ 438 {OV2722_8BIT, 0x3000, 0x00}, 439 {OV2722_8BIT, 0x3001, 0x00}, 440 {OV2722_8BIT, 0x3002, 0x00}, 441 {OV2722_8BIT, 0x3a0f, 0x40}, 442 {OV2722_8BIT, 0x3a10, 0x38}, 443 {OV2722_8BIT, 0x3a1b, 0x48}, 444 {OV2722_8BIT, 0x3a1e, 0x30}, 445 {OV2722_8BIT, 0x3a11, 0x90}, 446 {OV2722_8BIT, 0x3a1f, 0x10}, 447 {OV2722_8BIT, 0x3011, 0x22}, 448 {OV2722_8BIT, 0x3a00, 0x58}, 449 {OV2722_8BIT, 0x3503, 0x17}, 450 {OV2722_8BIT, 0x3500, 0x00}, 451 {OV2722_8BIT, 0x3501, 0x46}, 452 {OV2722_8BIT, 0x3502, 0x00}, 453 {OV2722_8BIT, 0x3508, 0x00}, 454 {OV2722_8BIT, 0x3509, 0x10}, 455 {OV2722_TOK_TERM, 0, 0}, 456}; 457 458static const struct ov2722_reg ov2722_VGA_30fps[] = { 459 {OV2722_8BIT, 0x3718, 0x10}, 460 {OV2722_8BIT, 0x3702, 0x18}, 461 {OV2722_8BIT, 0x373a, 0x3c}, 462 {OV2722_8BIT, 0x3715, 0x01}, 463 {OV2722_8BIT, 0x3703, 0x1d}, 464 {OV2722_8BIT, 0x3705, 0x12}, 465 {OV2722_8BIT, 0x3730, 0x1f}, 466 {OV2722_8BIT, 0x3704, 0x3f}, 467 {OV2722_8BIT, 0x3f06, 0x1d}, 468 {OV2722_8BIT, 0x371c, 0x00}, 469 {OV2722_8BIT, 0x371d, 0x83}, 470 {OV2722_8BIT, 0x371e, 0x00}, 471 {OV2722_8BIT, 0x371f, 0xbd}, 472 {OV2722_8BIT, 0x3708, 0x63}, 473 {OV2722_8BIT, 0x3709, 0x52}, 474 {OV2722_8BIT, 0x3800, 0x01}, 475 {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */ 476 {OV2722_8BIT, 0x3802, 0x00}, 477 {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/ 478 {OV2722_8BIT, 0x3804, 0x06}, 479 {OV2722_8BIT, 0x3805, 0x6B}, /* H crop end: 1643*/ 480 {OV2722_8BIT, 0x3806, 0x04}, 481 {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/ 482 {OV2722_8BIT, 0x3808, 0x02}, 483 {OV2722_8BIT, 0x3809, 0x90}, /* H output size: 656 */ 484 {OV2722_8BIT, 0x380a, 0x01}, 485 {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */ 486 487 /* H blank timing */ 488 {OV2722_8BIT, 0x380c, 0x08}, 489 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ 490 {OV2722_8BIT, 0x380e, 0x04}, 491 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ 492 {OV2722_8BIT, 0x3810, 0x00}, 493 {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ 494 {OV2722_8BIT, 0x3812, 0x00}, 495 {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ 496 {OV2722_8BIT, 0x3820, 0x80}, 497 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ 498 {OV2722_8BIT, 0x3814, 0x31}, 499 {OV2722_8BIT, 0x3815, 0x31}, 500 {OV2722_8BIT, 0x3612, 0x4b}, 501 {OV2722_8BIT, 0x3618, 0x04}, 502 {OV2722_8BIT, 0x3a08, 0x02}, 503 {OV2722_8BIT, 0x3a09, 0x67}, 504 {OV2722_8BIT, 0x3a0a, 0x02}, 505 {OV2722_8BIT, 0x3a0b, 0x00}, 506 {OV2722_8BIT, 0x3a0d, 0x00}, 507 {OV2722_8BIT, 0x3a0e, 0x00}, 508 {OV2722_8BIT, 0x4520, 0x0a}, 509 {OV2722_8BIT, 0x4837, 0x29}, 510 {OV2722_8BIT, 0x3000, 0xff}, 511 {OV2722_8BIT, 0x3001, 0xff}, 512 {OV2722_8BIT, 0x3002, 0xf0}, 513 {OV2722_8BIT, 0x3600, 0x08}, 514 {OV2722_8BIT, 0x3621, 0xc0}, 515 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ 516 {OV2722_8BIT, 0x3633, 0x63}, 517 {OV2722_8BIT, 0x3634, 0x24}, 518 {OV2722_8BIT, 0x3f01, 0x0c}, 519 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ 520 {OV2722_8BIT, 0x3614, 0xf0}, 521 {OV2722_8BIT, 0x3630, 0x2d}, 522 {OV2722_8BIT, 0x370b, 0x62}, 523 {OV2722_8BIT, 0x3706, 0x61}, 524 {OV2722_8BIT, 0x4000, 0x02}, 525 {OV2722_8BIT, 0x4002, 0xc5}, 526 {OV2722_8BIT, 0x4005, 0x08}, 527 {OV2722_8BIT, 0x404f, 0x84}, 528 {OV2722_8BIT, 0x4051, 0x00}, 529 {OV2722_8BIT, 0x5000, 0xff}, 530 {OV2722_8BIT, 0x3a18, 0x00}, 531 {OV2722_8BIT, 0x3a19, 0x80}, 532 {OV2722_8BIT, 0x4521, 0x00}, 533 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ 534 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ 535 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ 536 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ 537 {OV2722_8BIT, 0x370c, 0x0c}, 538 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ 539 {OV2722_8BIT, 0x3035, 0x00}, 540 {OV2722_8BIT, 0x3036, 0x26}, 541 {OV2722_8BIT, 0x3037, 0xa1}, 542 {OV2722_8BIT, 0x303e, 0x19}, 543 {OV2722_8BIT, 0x3038, 0x06}, 544 {OV2722_8BIT, 0x3018, 0x04}, 545 546 /* Added for power optimization */ 547 {OV2722_8BIT, 0x3000, 0x00}, 548 {OV2722_8BIT, 0x3001, 0x00}, 549 {OV2722_8BIT, 0x3002, 0x00}, 550 {OV2722_8BIT, 0x3a0f, 0x40}, 551 {OV2722_8BIT, 0x3a10, 0x38}, 552 {OV2722_8BIT, 0x3a1b, 0x48}, 553 {OV2722_8BIT, 0x3a1e, 0x30}, 554 {OV2722_8BIT, 0x3a11, 0x90}, 555 {OV2722_8BIT, 0x3a1f, 0x10}, 556 {OV2722_8BIT, 0x3011, 0x22}, 557 {OV2722_8BIT, 0x3a00, 0x58}, 558 {OV2722_8BIT, 0x3503, 0x17}, 559 {OV2722_8BIT, 0x3500, 0x00}, 560 {OV2722_8BIT, 0x3501, 0x46}, 561 {OV2722_8BIT, 0x3502, 0x00}, 562 {OV2722_8BIT, 0x3508, 0x00}, 563 {OV2722_8BIT, 0x3509, 0x10}, 564 {OV2722_TOK_TERM, 0, 0}, 565}; 566#endif 567 568static const struct ov2722_reg ov2722_1632_1092_30fps[] = { 569 {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for 570 a whole frame complete.(vblank) */ 571 {OV2722_8BIT, 0x3718, 0x10}, 572 {OV2722_8BIT, 0x3702, 0x24}, 573 {OV2722_8BIT, 0x373a, 0x60}, 574 {OV2722_8BIT, 0x3715, 0x01}, 575 {OV2722_8BIT, 0x3703, 0x2e}, 576 {OV2722_8BIT, 0x3705, 0x10}, 577 {OV2722_8BIT, 0x3730, 0x30}, 578 {OV2722_8BIT, 0x3704, 0x62}, 579 {OV2722_8BIT, 0x3f06, 0x3a}, 580 {OV2722_8BIT, 0x371c, 0x00}, 581 {OV2722_8BIT, 0x371d, 0xc4}, 582 {OV2722_8BIT, 0x371e, 0x01}, 583 {OV2722_8BIT, 0x371f, 0x0d}, 584 {OV2722_8BIT, 0x3708, 0x61}, 585 {OV2722_8BIT, 0x3709, 0x12}, 586 {OV2722_8BIT, 0x3800, 0x00}, 587 {OV2722_8BIT, 0x3801, 0x9E}, /* H crop start: 158 */ 588 {OV2722_8BIT, 0x3802, 0x00}, 589 {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ 590 {OV2722_8BIT, 0x3804, 0x07}, 591 {OV2722_8BIT, 0x3805, 0x05}, /* H crop end: 1797 */ 592 {OV2722_8BIT, 0x3806, 0x04}, 593 {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ 594 595 {OV2722_8BIT, 0x3808, 0x06}, 596 {OV2722_8BIT, 0x3809, 0x60}, /* H output size: 1632 */ 597 {OV2722_8BIT, 0x380a, 0x04}, 598 {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ 599 {OV2722_8BIT, 0x380c, 0x08}, 600 {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */ 601 {OV2722_8BIT, 0x380e, 0x04}, 602 {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */ 603 {OV2722_8BIT, 0x3810, 0x00}, 604 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ 605 {OV2722_8BIT, 0x3812, 0x00}, 606 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ 607 {OV2722_8BIT, 0x3820, 0x80}, 608 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ 609 {OV2722_8BIT, 0x3814, 0x11}, 610 {OV2722_8BIT, 0x3815, 0x11}, 611 {OV2722_8BIT, 0x3612, 0x0b}, 612 {OV2722_8BIT, 0x3618, 0x04}, 613 {OV2722_8BIT, 0x3a08, 0x01}, 614 {OV2722_8BIT, 0x3a09, 0x50}, 615 {OV2722_8BIT, 0x3a0a, 0x01}, 616 {OV2722_8BIT, 0x3a0b, 0x18}, 617 {OV2722_8BIT, 0x3a0d, 0x03}, 618 {OV2722_8BIT, 0x3a0e, 0x03}, 619 {OV2722_8BIT, 0x4520, 0x00}, 620 {OV2722_8BIT, 0x4837, 0x1b}, 621 {OV2722_8BIT, 0x3600, 0x08}, 622 {OV2722_8BIT, 0x3621, 0xc0}, 623 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ 624 {OV2722_8BIT, 0x3633, 0x23}, 625 {OV2722_8BIT, 0x3634, 0x54}, 626 {OV2722_8BIT, 0x3f01, 0x0c}, 627 {OV2722_8BIT, 0x5001, 0xc1}, 628 {OV2722_8BIT, 0x3614, 0xf0}, 629 {OV2722_8BIT, 0x3630, 0x2d}, 630 {OV2722_8BIT, 0x370b, 0x62}, 631 {OV2722_8BIT, 0x3706, 0x61}, 632 {OV2722_8BIT, 0x4000, 0x02}, 633 {OV2722_8BIT, 0x4002, 0xc5}, 634 {OV2722_8BIT, 0x4005, 0x08}, 635 {OV2722_8BIT, 0x404f, 0x84}, 636 {OV2722_8BIT, 0x4051, 0x00}, 637 {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ 638 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ 639 {OV2722_8BIT, 0x3a18, 0x00}, 640 {OV2722_8BIT, 0x3a19, 0x80}, 641 {OV2722_8BIT, 0x4521, 0x00}, 642 {OV2722_8BIT, 0x5183, 0xb0}, 643 {OV2722_8BIT, 0x5184, 0xb0}, 644 {OV2722_8BIT, 0x5185, 0xb0}, 645 {OV2722_8BIT, 0x370c, 0x0c}, 646 {OV2722_8BIT, 0x3035, 0x00}, 647 {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */ 648 {OV2722_8BIT, 0x3037, 0xa1}, 649 {OV2722_8BIT, 0x303e, 0x19}, 650 {OV2722_8BIT, 0x3038, 0x06}, 651 {OV2722_8BIT, 0x3018, 0x04}, 652 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ 653 {OV2722_8BIT, 0x3001, 0x00}, 654 {OV2722_8BIT, 0x3002, 0x00}, 655 {OV2722_8BIT, 0x3a0f, 0x40}, 656 {OV2722_8BIT, 0x3a10, 0x38}, 657 {OV2722_8BIT, 0x3a1b, 0x48}, 658 {OV2722_8BIT, 0x3a1e, 0x30}, 659 {OV2722_8BIT, 0x3a11, 0x90}, 660 {OV2722_8BIT, 0x3a1f, 0x10}, 661 {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ 662 {OV2722_8BIT, 0x3500, 0x00}, 663 {OV2722_8BIT, 0x3501, 0x3F}, 664 {OV2722_8BIT, 0x3502, 0x00}, 665 {OV2722_8BIT, 0x3508, 0x00}, 666 {OV2722_8BIT, 0x3509, 0x00}, 667 {OV2722_TOK_TERM, 0, 0} 668}; 669 670static const struct ov2722_reg ov2722_1452_1092_30fps[] = { 671 {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for 672 a whole frame complete.(vblank) */ 673 {OV2722_8BIT, 0x3718, 0x10}, 674 {OV2722_8BIT, 0x3702, 0x24}, 675 {OV2722_8BIT, 0x373a, 0x60}, 676 {OV2722_8BIT, 0x3715, 0x01}, 677 {OV2722_8BIT, 0x3703, 0x2e}, 678 {OV2722_8BIT, 0x3705, 0x10}, 679 {OV2722_8BIT, 0x3730, 0x30}, 680 {OV2722_8BIT, 0x3704, 0x62}, 681 {OV2722_8BIT, 0x3f06, 0x3a}, 682 {OV2722_8BIT, 0x371c, 0x00}, 683 {OV2722_8BIT, 0x371d, 0xc4}, 684 {OV2722_8BIT, 0x371e, 0x01}, 685 {OV2722_8BIT, 0x371f, 0x0d}, 686 {OV2722_8BIT, 0x3708, 0x61}, 687 {OV2722_8BIT, 0x3709, 0x12}, 688 {OV2722_8BIT, 0x3800, 0x00}, 689 {OV2722_8BIT, 0x3801, 0xF8}, /* H crop start: 248 */ 690 {OV2722_8BIT, 0x3802, 0x00}, 691 {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ 692 {OV2722_8BIT, 0x3804, 0x06}, 693 {OV2722_8BIT, 0x3805, 0xab}, /* H crop end: 1707 */ 694 {OV2722_8BIT, 0x3806, 0x04}, 695 {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ 696 {OV2722_8BIT, 0x3808, 0x05}, 697 {OV2722_8BIT, 0x3809, 0xac}, /* H output size: 1452 */ 698 {OV2722_8BIT, 0x380a, 0x04}, 699 {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ 700 {OV2722_8BIT, 0x380c, 0x08}, 701 {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */ 702 {OV2722_8BIT, 0x380e, 0x04}, 703 {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */ 704 {OV2722_8BIT, 0x3810, 0x00}, 705 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ 706 {OV2722_8BIT, 0x3812, 0x00}, 707 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ 708 {OV2722_8BIT, 0x3820, 0x80}, 709 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ 710 {OV2722_8BIT, 0x3814, 0x11}, 711 {OV2722_8BIT, 0x3815, 0x11}, 712 {OV2722_8BIT, 0x3612, 0x0b}, 713 {OV2722_8BIT, 0x3618, 0x04}, 714 {OV2722_8BIT, 0x3a08, 0x01}, 715 {OV2722_8BIT, 0x3a09, 0x50}, 716 {OV2722_8BIT, 0x3a0a, 0x01}, 717 {OV2722_8BIT, 0x3a0b, 0x18}, 718 {OV2722_8BIT, 0x3a0d, 0x03}, 719 {OV2722_8BIT, 0x3a0e, 0x03}, 720 {OV2722_8BIT, 0x4520, 0x00}, 721 {OV2722_8BIT, 0x4837, 0x1b}, 722 {OV2722_8BIT, 0x3600, 0x08}, 723 {OV2722_8BIT, 0x3621, 0xc0}, 724 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ 725 {OV2722_8BIT, 0x3633, 0x23}, 726 {OV2722_8BIT, 0x3634, 0x54}, 727 {OV2722_8BIT, 0x3f01, 0x0c}, 728 {OV2722_8BIT, 0x5001, 0xc1}, 729 {OV2722_8BIT, 0x3614, 0xf0}, 730 {OV2722_8BIT, 0x3630, 0x2d}, 731 {OV2722_8BIT, 0x370b, 0x62}, 732 {OV2722_8BIT, 0x3706, 0x61}, 733 {OV2722_8BIT, 0x4000, 0x02}, 734 {OV2722_8BIT, 0x4002, 0xc5}, 735 {OV2722_8BIT, 0x4005, 0x08}, 736 {OV2722_8BIT, 0x404f, 0x84}, 737 {OV2722_8BIT, 0x4051, 0x00}, 738 {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ 739 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ 740 {OV2722_8BIT, 0x3a18, 0x00}, 741 {OV2722_8BIT, 0x3a19, 0x80}, 742 {OV2722_8BIT, 0x4521, 0x00}, 743 {OV2722_8BIT, 0x5183, 0xb0}, 744 {OV2722_8BIT, 0x5184, 0xb0}, 745 {OV2722_8BIT, 0x5185, 0xb0}, 746 {OV2722_8BIT, 0x370c, 0x0c}, 747 {OV2722_8BIT, 0x3035, 0x00}, 748 {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */ 749 {OV2722_8BIT, 0x3037, 0xa1}, 750 {OV2722_8BIT, 0x303e, 0x19}, 751 {OV2722_8BIT, 0x3038, 0x06}, 752 {OV2722_8BIT, 0x3018, 0x04}, 753 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ 754 {OV2722_8BIT, 0x3001, 0x00}, 755 {OV2722_8BIT, 0x3002, 0x00}, 756 {OV2722_8BIT, 0x3a0f, 0x40}, 757 {OV2722_8BIT, 0x3a10, 0x38}, 758 {OV2722_8BIT, 0x3a1b, 0x48}, 759 {OV2722_8BIT, 0x3a1e, 0x30}, 760 {OV2722_8BIT, 0x3a11, 0x90}, 761 {OV2722_8BIT, 0x3a1f, 0x10}, 762 {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ 763 {OV2722_8BIT, 0x3500, 0x00}, 764 {OV2722_8BIT, 0x3501, 0x3F}, 765 {OV2722_8BIT, 0x3502, 0x00}, 766 {OV2722_8BIT, 0x3508, 0x00}, 767 {OV2722_8BIT, 0x3509, 0x00}, 768 {OV2722_TOK_TERM, 0, 0} 769}; 770 771#if 0 772static const struct ov2722_reg ov2722_1M3_30fps[] = { 773 {OV2722_8BIT, 0x3718, 0x10}, 774 {OV2722_8BIT, 0x3702, 0x24}, 775 {OV2722_8BIT, 0x373a, 0x60}, 776 {OV2722_8BIT, 0x3715, 0x01}, 777 {OV2722_8BIT, 0x3703, 0x2e}, 778 {OV2722_8BIT, 0x3705, 0x10}, 779 {OV2722_8BIT, 0x3730, 0x30}, 780 {OV2722_8BIT, 0x3704, 0x62}, 781 {OV2722_8BIT, 0x3f06, 0x3a}, 782 {OV2722_8BIT, 0x371c, 0x00}, 783 {OV2722_8BIT, 0x371d, 0xc4}, 784 {OV2722_8BIT, 0x371e, 0x01}, 785 {OV2722_8BIT, 0x371f, 0x0d}, 786 {OV2722_8BIT, 0x3708, 0x61}, 787 {OV2722_8BIT, 0x3709, 0x12}, 788 {OV2722_8BIT, 0x3800, 0x01}, 789 {OV2722_8BIT, 0x3801, 0x4a}, /* H crop start: 330 */ 790 {OV2722_8BIT, 0x3802, 0x00}, 791 {OV2722_8BIT, 0x3803, 0x03}, /* V crop start: 3 */ 792 {OV2722_8BIT, 0x3804, 0x06}, 793 {OV2722_8BIT, 0x3805, 0xe1}, /* H crop end: 1761 */ 794 {OV2722_8BIT, 0x3806, 0x04}, 795 {OV2722_8BIT, 0x3807, 0x47}, /* V crop end: 1095 */ 796 {OV2722_8BIT, 0x3808, 0x05}, 797 {OV2722_8BIT, 0x3809, 0x88}, /* H output size: 1416 */ 798 {OV2722_8BIT, 0x380a, 0x04}, 799 {OV2722_8BIT, 0x380b, 0x0a}, /* V output size: 1034 */ 800 801 /* H blank timing */ 802 {OV2722_8BIT, 0x380c, 0x08}, 803 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ 804 {OV2722_8BIT, 0x380e, 0x04}, 805 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ 806 {OV2722_8BIT, 0x3810, 0x00}, 807 {OV2722_8BIT, 0x3811, 0x05}, /* H window offset: 5 */ 808 {OV2722_8BIT, 0x3812, 0x00}, 809 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ 810 {OV2722_8BIT, 0x3820, 0x80}, 811 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp */ 812 {OV2722_8BIT, 0x3814, 0x11}, 813 {OV2722_8BIT, 0x3815, 0x11}, 814 {OV2722_8BIT, 0x3612, 0x0b}, 815 {OV2722_8BIT, 0x3618, 0x04}, 816 {OV2722_8BIT, 0x3a08, 0x01}, 817 {OV2722_8BIT, 0x3a09, 0x50}, 818 {OV2722_8BIT, 0x3a0a, 0x01}, 819 {OV2722_8BIT, 0x3a0b, 0x18}, 820 {OV2722_8BIT, 0x3a0d, 0x03}, 821 {OV2722_8BIT, 0x3a0e, 0x03}, 822 {OV2722_8BIT, 0x4520, 0x00}, 823 {OV2722_8BIT, 0x4837, 0x1b}, 824 {OV2722_8BIT, 0x3000, 0xff}, 825 {OV2722_8BIT, 0x3001, 0xff}, 826 {OV2722_8BIT, 0x3002, 0xf0}, 827 {OV2722_8BIT, 0x3600, 0x08}, 828 {OV2722_8BIT, 0x3621, 0xc0}, 829 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ 830 {OV2722_8BIT, 0x3633, 0x23}, 831 {OV2722_8BIT, 0x3634, 0x54}, 832 {OV2722_8BIT, 0x3f01, 0x0c}, 833 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ 834 {OV2722_8BIT, 0x3614, 0xf0}, 835 {OV2722_8BIT, 0x3630, 0x2d}, 836 {OV2722_8BIT, 0x370b, 0x62}, 837 {OV2722_8BIT, 0x3706, 0x61}, 838 {OV2722_8BIT, 0x4000, 0x02}, 839 {OV2722_8BIT, 0x4002, 0xc5}, 840 {OV2722_8BIT, 0x4005, 0x08}, 841 {OV2722_8BIT, 0x404f, 0x84}, 842 {OV2722_8BIT, 0x4051, 0x00}, 843 {OV2722_8BIT, 0x5000, 0xcf}, 844 {OV2722_8BIT, 0x3a18, 0x00}, 845 {OV2722_8BIT, 0x3a19, 0x80}, 846 {OV2722_8BIT, 0x4521, 0x00}, 847 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ 848 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ 849 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ 850 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ 851 {OV2722_8BIT, 0x370c, 0x0c}, 852 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ 853 {OV2722_8BIT, 0x3035, 0x00}, 854 {OV2722_8BIT, 0x3036, 0x26}, 855 {OV2722_8BIT, 0x3037, 0xa1}, 856 {OV2722_8BIT, 0x303e, 0x19}, 857 {OV2722_8BIT, 0x3038, 0x06}, 858 {OV2722_8BIT, 0x3018, 0x04}, 859 860 /* Added for power optimization */ 861 {OV2722_8BIT, 0x3000, 0x00}, 862 {OV2722_8BIT, 0x3001, 0x00}, 863 {OV2722_8BIT, 0x3002, 0x00}, 864 {OV2722_8BIT, 0x3a0f, 0x40}, 865 {OV2722_8BIT, 0x3a10, 0x38}, 866 {OV2722_8BIT, 0x3a1b, 0x48}, 867 {OV2722_8BIT, 0x3a1e, 0x30}, 868 {OV2722_8BIT, 0x3a11, 0x90}, 869 {OV2722_8BIT, 0x3a1f, 0x10}, 870 {OV2722_8BIT, 0x3503, 0x17}, 871 {OV2722_8BIT, 0x3500, 0x00}, 872 {OV2722_8BIT, 0x3501, 0x46}, 873 {OV2722_8BIT, 0x3502, 0x00}, 874 {OV2722_8BIT, 0x3508, 0x00}, 875 {OV2722_8BIT, 0x3509, 0x10}, 876 {OV2722_TOK_TERM, 0, 0}, 877}; 878#endif 879 880static const struct ov2722_reg ov2722_1080p_30fps[] = { 881 {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for a whole 882 frame complete.(vblank) */ 883 {OV2722_8BIT, 0x3718, 0x10}, 884 {OV2722_8BIT, 0x3702, 0x24}, 885 {OV2722_8BIT, 0x373a, 0x60}, 886 {OV2722_8BIT, 0x3715, 0x01}, 887 {OV2722_8BIT, 0x3703, 0x2e}, 888 {OV2722_8BIT, 0x3705, 0x2b}, 889 {OV2722_8BIT, 0x3730, 0x30}, 890 {OV2722_8BIT, 0x3704, 0x62}, 891 {OV2722_8BIT, 0x3f06, 0x3a}, 892 {OV2722_8BIT, 0x371c, 0x00}, 893 {OV2722_8BIT, 0x371d, 0xc4}, 894 {OV2722_8BIT, 0x371e, 0x01}, 895 {OV2722_8BIT, 0x371f, 0x28}, 896 {OV2722_8BIT, 0x3708, 0x61}, 897 {OV2722_8BIT, 0x3709, 0x12}, 898 {OV2722_8BIT, 0x3800, 0x00}, 899 {OV2722_8BIT, 0x3801, 0x08}, /* H crop start: 8 */ 900 {OV2722_8BIT, 0x3802, 0x00}, 901 {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ 902 {OV2722_8BIT, 0x3804, 0x07}, 903 {OV2722_8BIT, 0x3805, 0x9b}, /* H crop end: 1947 */ 904 {OV2722_8BIT, 0x3806, 0x04}, 905 {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ 906 {OV2722_8BIT, 0x3808, 0x07}, 907 {OV2722_8BIT, 0x3809, 0x8c}, /* H output size: 1932 */ 908 {OV2722_8BIT, 0x380a, 0x04}, 909 {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ 910 {OV2722_8BIT, 0x380c, 0x08}, 911 {OV2722_8BIT, 0x380d, 0x14}, /* H timing: 2068 */ 912 {OV2722_8BIT, 0x380e, 0x04}, 913 {OV2722_8BIT, 0x380f, 0x5a}, /* V timing: 1114 */ 914 {OV2722_8BIT, 0x3810, 0x00}, 915 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ 916 {OV2722_8BIT, 0x3812, 0x00}, 917 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ 918 {OV2722_8BIT, 0x3820, 0x80}, 919 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ 920 {OV2722_8BIT, 0x3814, 0x11}, 921 {OV2722_8BIT, 0x3815, 0x11}, 922 {OV2722_8BIT, 0x3612, 0x4b}, 923 {OV2722_8BIT, 0x3618, 0x04}, 924 {OV2722_8BIT, 0x3a08, 0x01}, 925 {OV2722_8BIT, 0x3a09, 0x50}, 926 {OV2722_8BIT, 0x3a0a, 0x01}, 927 {OV2722_8BIT, 0x3a0b, 0x18}, 928 {OV2722_8BIT, 0x3a0d, 0x03}, 929 {OV2722_8BIT, 0x3a0e, 0x03}, 930 {OV2722_8BIT, 0x4520, 0x00}, 931 {OV2722_8BIT, 0x4837, 0x1b}, 932 {OV2722_8BIT, 0x3000, 0xff}, 933 {OV2722_8BIT, 0x3001, 0xff}, 934 {OV2722_8BIT, 0x3002, 0xf0}, 935 {OV2722_8BIT, 0x3600, 0x08}, 936 {OV2722_8BIT, 0x3621, 0xc0}, 937 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ 938 {OV2722_8BIT, 0x3633, 0x63}, 939 {OV2722_8BIT, 0x3634, 0x24}, 940 {OV2722_8BIT, 0x3f01, 0x0c}, 941 {OV2722_8BIT, 0x5001, 0xc1}, 942 {OV2722_8BIT, 0x3614, 0xf0}, 943 {OV2722_8BIT, 0x3630, 0x2d}, 944 {OV2722_8BIT, 0x370b, 0x62}, 945 {OV2722_8BIT, 0x3706, 0x61}, 946 {OV2722_8BIT, 0x4000, 0x02}, 947 {OV2722_8BIT, 0x4002, 0xc5}, 948 {OV2722_8BIT, 0x4005, 0x08}, 949 {OV2722_8BIT, 0x404f, 0x84}, 950 {OV2722_8BIT, 0x4051, 0x00}, 951 {OV2722_8BIT, 0x5000, 0xcd}, /* manual 3a */ 952 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ 953 {OV2722_8BIT, 0x3a18, 0x00}, 954 {OV2722_8BIT, 0x3a19, 0x80}, 955 {OV2722_8BIT, 0x3503, 0x17}, 956 {OV2722_8BIT, 0x4521, 0x00}, 957 {OV2722_8BIT, 0x5183, 0xb0}, 958 {OV2722_8BIT, 0x5184, 0xb0}, 959 {OV2722_8BIT, 0x5185, 0xb0}, 960 {OV2722_8BIT, 0x370c, 0x0c}, 961 {OV2722_8BIT, 0x3035, 0x00}, 962 {OV2722_8BIT, 0x3036, 0x24}, /* 345.6 MHz */ 963 {OV2722_8BIT, 0x3037, 0xa1}, 964 {OV2722_8BIT, 0x303e, 0x19}, 965 {OV2722_8BIT, 0x3038, 0x06}, 966 {OV2722_8BIT, 0x3018, 0x04}, 967 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ 968 {OV2722_8BIT, 0x3001, 0x00}, 969 {OV2722_8BIT, 0x3002, 0x00}, 970 {OV2722_8BIT, 0x3a0f, 0x40}, 971 {OV2722_8BIT, 0x3a10, 0x38}, 972 {OV2722_8BIT, 0x3a1b, 0x48}, 973 {OV2722_8BIT, 0x3a1e, 0x30}, 974 {OV2722_8BIT, 0x3a11, 0x90}, 975 {OV2722_8BIT, 0x3a1f, 0x10}, 976 {OV2722_8BIT, 0x3011, 0x22}, 977 {OV2722_8BIT, 0x3500, 0x00}, 978 {OV2722_8BIT, 0x3501, 0x3F}, 979 {OV2722_8BIT, 0x3502, 0x00}, 980 {OV2722_8BIT, 0x3508, 0x00}, 981 {OV2722_8BIT, 0x3509, 0x00}, 982 {OV2722_TOK_TERM, 0, 0} 983}; 984 985#if 0 /* Currently unused */ 986static const struct ov2722_reg ov2722_720p_30fps[] = { 987 {OV2722_8BIT, 0x3021, 0x03}, 988 {OV2722_8BIT, 0x3718, 0x10}, 989 {OV2722_8BIT, 0x3702, 0x24}, 990 {OV2722_8BIT, 0x373a, 0x60}, 991 {OV2722_8BIT, 0x3715, 0x01}, 992 {OV2722_8BIT, 0x3703, 0x2e}, 993 {OV2722_8BIT, 0x3705, 0x10}, 994 {OV2722_8BIT, 0x3730, 0x30}, 995 {OV2722_8BIT, 0x3704, 0x62}, 996 {OV2722_8BIT, 0x3f06, 0x3a}, 997 {OV2722_8BIT, 0x371c, 0x00}, 998 {OV2722_8BIT, 0x371d, 0xc4}, 999 {OV2722_8BIT, 0x371e, 0x01}, 1000 {OV2722_8BIT, 0x371f, 0x0d}, 1001 {OV2722_8BIT, 0x3708, 0x61}, 1002 {OV2722_8BIT, 0x3709, 0x12}, 1003 {OV2722_8BIT, 0x3800, 0x01}, 1004 {OV2722_8BIT, 0x3801, 0x40}, /* H crop start: 320 */ 1005 {OV2722_8BIT, 0x3802, 0x00}, 1006 {OV2722_8BIT, 0x3803, 0xb1}, /* V crop start: 177 */ 1007 {OV2722_8BIT, 0x3804, 0x06}, 1008 {OV2722_8BIT, 0x3805, 0x55}, /* H crop end: 1621 */ 1009 {OV2722_8BIT, 0x3806, 0x03}, 1010 {OV2722_8BIT, 0x3807, 0x95}, /* V crop end: 918 */ 1011 {OV2722_8BIT, 0x3808, 0x05}, 1012 {OV2722_8BIT, 0x3809, 0x10}, /* H output size: 0x0788==1928 */ 1013 {OV2722_8BIT, 0x380a, 0x02}, 1014 {OV2722_8BIT, 0x380b, 0xe0}, /* output size: 0x02DE==734 */ 1015 {OV2722_8BIT, 0x380c, 0x08}, 1016 {OV2722_8BIT, 0x380d, 0x00}, /* H timing: 2048 */ 1017 {OV2722_8BIT, 0x380e, 0x04}, 1018 {OV2722_8BIT, 0x380f, 0xa3}, /* V timing: 1187 */ 1019 {OV2722_8BIT, 0x3810, 0x00}, 1020 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ 1021 {OV2722_8BIT, 0x3812, 0x00}, 1022 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ 1023 {OV2722_8BIT, 0x3820, 0x80}, 1024 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ 1025 {OV2722_8BIT, 0x3814, 0x11}, 1026 {OV2722_8BIT, 0x3815, 0x11}, 1027 {OV2722_8BIT, 0x3612, 0x0b}, 1028 {OV2722_8BIT, 0x3618, 0x04}, 1029 {OV2722_8BIT, 0x3a08, 0x01}, 1030 {OV2722_8BIT, 0x3a09, 0x50}, 1031 {OV2722_8BIT, 0x3a0a, 0x01}, 1032 {OV2722_8BIT, 0x3a0b, 0x18}, 1033 {OV2722_8BIT, 0x3a0d, 0x03}, 1034 {OV2722_8BIT, 0x3a0e, 0x03}, 1035 {OV2722_8BIT, 0x4520, 0x00}, 1036 {OV2722_8BIT, 0x4837, 0x1b}, 1037 {OV2722_8BIT, 0x3600, 0x08}, 1038 {OV2722_8BIT, 0x3621, 0xc0}, 1039 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ 1040 {OV2722_8BIT, 0x3633, 0x23}, 1041 {OV2722_8BIT, 0x3634, 0x54}, 1042 {OV2722_8BIT, 0x3f01, 0x0c}, 1043 {OV2722_8BIT, 0x5001, 0xc1}, 1044 {OV2722_8BIT, 0x3614, 0xf0}, 1045 {OV2722_8BIT, 0x3630, 0x2d}, 1046 {OV2722_8BIT, 0x370b, 0x62}, 1047 {OV2722_8BIT, 0x3706, 0x61}, 1048 {OV2722_8BIT, 0x4000, 0x02}, 1049 {OV2722_8BIT, 0x4002, 0xc5}, 1050 {OV2722_8BIT, 0x4005, 0x08}, 1051 {OV2722_8BIT, 0x404f, 0x84}, 1052 {OV2722_8BIT, 0x4051, 0x00}, 1053 {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ 1054 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ 1055 {OV2722_8BIT, 0x3a18, 0x00}, 1056 {OV2722_8BIT, 0x3a19, 0x80}, 1057 {OV2722_8BIT, 0x4521, 0x00}, 1058 {OV2722_8BIT, 0x5183, 0xb0}, 1059 {OV2722_8BIT, 0x5184, 0xb0}, 1060 {OV2722_8BIT, 0x5185, 0xb0}, 1061 {OV2722_8BIT, 0x370c, 0x0c}, 1062 {OV2722_8BIT, 0x3035, 0x00}, 1063 {OV2722_8BIT, 0x3036, 0x26}, /* {0x3036, 0x2c}, //422.4 MHz */ 1064 {OV2722_8BIT, 0x3037, 0xa1}, 1065 {OV2722_8BIT, 0x303e, 0x19}, 1066 {OV2722_8BIT, 0x3038, 0x06}, 1067 {OV2722_8BIT, 0x3018, 0x04}, 1068 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ 1069 {OV2722_8BIT, 0x3001, 0x00}, 1070 {OV2722_8BIT, 0x3002, 0x00}, 1071 {OV2722_8BIT, 0x3a0f, 0x40}, 1072 {OV2722_8BIT, 0x3a10, 0x38}, 1073 {OV2722_8BIT, 0x3a1b, 0x48}, 1074 {OV2722_8BIT, 0x3a1e, 0x30}, 1075 {OV2722_8BIT, 0x3a11, 0x90}, 1076 {OV2722_8BIT, 0x3a1f, 0x10}, 1077 {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ 1078 {OV2722_8BIT, 0x3500, 0x00}, 1079 {OV2722_8BIT, 0x3501, 0x3F}, 1080 {OV2722_8BIT, 0x3502, 0x00}, 1081 {OV2722_8BIT, 0x3508, 0x00}, 1082 {OV2722_8BIT, 0x3509, 0x00}, 1083 {OV2722_TOK_TERM, 0, 0}, 1084}; 1085#endif 1086 1087static struct ov2722_resolution ov2722_res_preview[] = { 1088 { 1089 .desc = "ov2722_1632_1092_30fps", 1090 .width = 1632, 1091 .height = 1092, 1092 .fps = 30, 1093 .pix_clk_freq = 85, 1094 .used = 0, 1095 .pixels_per_line = 2260, 1096 .lines_per_frame = 1244, 1097 .skip_frames = 3, 1098 .regs = ov2722_1632_1092_30fps, 1099 .mipi_freq = 422400, 1100 }, 1101 { 1102 .desc = "ov2722_1452_1092_30fps", 1103 .width = 1452, 1104 .height = 1092, 1105 .fps = 30, 1106 .pix_clk_freq = 85, 1107 .used = 0, 1108 .pixels_per_line = 2260, 1109 .lines_per_frame = 1244, 1110 .skip_frames = 3, 1111 .regs = ov2722_1452_1092_30fps, 1112 .mipi_freq = 422400, 1113 }, 1114 { 1115 .desc = "ov2722_1080P_30fps", 1116 .width = 1932, 1117 .height = 1092, 1118 .pix_clk_freq = 69, 1119 .fps = 30, 1120 .used = 0, 1121 .pixels_per_line = 2068, 1122 .lines_per_frame = 1114, 1123 .skip_frames = 3, 1124 .regs = ov2722_1080p_30fps, 1125 .mipi_freq = 345600, 1126 }, 1127}; 1128 1129#define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview)) 1130 1131/* 1132 * Disable non-preview configurations until the configuration selection is 1133 * improved. 1134 */ 1135#if 0 1136struct ov2722_resolution ov2722_res_still[] = { 1137 { 1138 .desc = "ov2722_480P_30fps", 1139 .width = 1632, 1140 .height = 1092, 1141 .fps = 30, 1142 .pix_clk_freq = 85, 1143 .used = 0, 1144 .pixels_per_line = 2260, 1145 .lines_per_frame = 1244, 1146 .skip_frames = 3, 1147 .regs = ov2722_1632_1092_30fps, 1148 .mipi_freq = 422400, 1149 }, 1150 { 1151 .desc = "ov2722_1452_1092_30fps", 1152 .width = 1452, 1153 .height = 1092, 1154 .fps = 30, 1155 .pix_clk_freq = 85, 1156 .used = 0, 1157 .pixels_per_line = 2260, 1158 .lines_per_frame = 1244, 1159 .skip_frames = 3, 1160 .regs = ov2722_1452_1092_30fps, 1161 .mipi_freq = 422400, 1162 }, 1163 { 1164 .desc = "ov2722_1080P_30fps", 1165 .width = 1932, 1166 .height = 1092, 1167 .pix_clk_freq = 69, 1168 .fps = 30, 1169 .used = 0, 1170 .pixels_per_line = 2068, 1171 .lines_per_frame = 1114, 1172 .skip_frames = 3, 1173 .regs = ov2722_1080p_30fps, 1174 .mipi_freq = 345600, 1175 }, 1176}; 1177 1178#define N_RES_STILL (ARRAY_SIZE(ov2722_res_still)) 1179 1180struct ov2722_resolution ov2722_res_video[] = { 1181 { 1182 .desc = "ov2722_QVGA_30fps", 1183 .width = 336, 1184 .height = 256, 1185 .fps = 30, 1186 .pix_clk_freq = 73, 1187 .used = 0, 1188 .pixels_per_line = 2048, 1189 .lines_per_frame = 1184, 1190 .skip_frames = 3, 1191 .regs = ov2722_QVGA_30fps, 1192 .mipi_freq = 364800, 1193 }, 1194 { 1195 .desc = "ov2722_480P_30fps", 1196 .width = 736, 1197 .height = 496, 1198 .fps = 30, 1199 .pix_clk_freq = 73, 1200 .used = 0, 1201 .pixels_per_line = 2048, 1202 .lines_per_frame = 1184, 1203 .skip_frames = 3, 1204 .regs = ov2722_480P_30fps, 1205 }, 1206 { 1207 .desc = "ov2722_1080P_30fps", 1208 .width = 1932, 1209 .height = 1092, 1210 .pix_clk_freq = 69, 1211 .fps = 30, 1212 .used = 0, 1213 .pixels_per_line = 2068, 1214 .lines_per_frame = 1114, 1215 .skip_frames = 3, 1216 .regs = ov2722_1080p_30fps, 1217 .mipi_freq = 345600, 1218 }, 1219}; 1220 1221#define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video)) 1222#endif 1223 1224static struct ov2722_resolution *ov2722_res = ov2722_res_preview; 1225static unsigned long N_RES = N_RES_PREVIEW; 1226#endif
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