spi-gpio.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * SPI host driver using generic bitbanged GPIO
  4 *
  5 * Copyright (C) 2006,2008 David Brownell
  6 * Copyright (C) 2017 Linus Walleij
  7 */
  8#include <linux/gpio/consumer.h>
  9#include <linux/kernel.h>
 10#include <linux/mod_devicetable.h>
 11#include <linux/module.h>
 12#include <linux/platform_device.h>
 13#include <linux/property.h>
 14
 15#include <linux/spi/spi.h>
 16#include <linux/spi/spi_bitbang.h>
 17#include <linux/spi/spi_gpio.h>
 18
 19/*
 20 * This bitbanging SPI host driver should help make systems usable
 21 * when a native hardware SPI engine is not available, perhaps because
 22 * its driver isn't yet working or because the I/O pins it requires
 23 * are used for other purposes.
 24 *
 25 * platform_device->driver_data ... points to spi_gpio
 26 *
 27 * spi->controller_state ... reserved for bitbang framework code
 28 *
 29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
 30 */
 31
 32struct spi_gpio {
 33	struct spi_bitbang		bitbang;
 34	struct gpio_desc		*sck;
 35	struct gpio_desc		*miso;
 36	struct gpio_desc		*mosi;
 37	struct gpio_desc		**cs_gpios;
 38};
 39
 40/*----------------------------------------------------------------------*/
 41
 42#define DRIVER_NAME	"spi_gpio"
 43
 44/*----------------------------------------------------------------------*/
 45
 46static inline struct spi_gpio *__pure
 47spi_to_spi_gpio(const struct spi_device *spi)
 48{
 49	struct spi_bitbang		*bang;
 50	struct spi_gpio			*spi_gpio;
 51
 52	bang = spi_controller_get_devdata(spi->controller);
 53	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
 54	return spi_gpio;
 55}
 56
 57/* These helpers are in turn called by the bitbang inlines */
 58static inline void setsck(const struct spi_device *spi, int is_on)
 59{
 60	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 61
 62	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
 63}
 64
 65static inline void setmosi(const struct spi_device *spi, int is_on)
 66{
 67	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 68
 69	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
 70}
 71
 72static inline int getmiso(const struct spi_device *spi)
 73{
 74	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 75
 76	if (spi->mode & SPI_3WIRE)
 77		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
 78	else
 79		return !!gpiod_get_value_cansleep(spi_gpio->miso);
 80}
 81
 82/*
 83 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
 84 * requested device clock.  Software overhead means we usually have trouble
 85 * reaching even one Mbit/sec (except when we can inline bitops), so for now
 86 * we'll just assume we never need additional per-bit slowdowns.
 87 */
 88#define spidelay(nsecs)	do {} while (0)
 89
 90#include "spi-bitbang-txrx.h"
 91
 92/*
 93 * These functions can leverage inline expansion of GPIO calls to shrink
 94 * costs for a txrx bit, often by factors of around ten (by instruction
 95 * count).  That is particularly visible for larger word sizes, but helps
 96 * even with default 8-bit words.
 97 *
 98 * REVISIT overheads calling these functions for each word also have
 99 * significant performance costs.  Having txrx_bufs() calls that inline
100 * the txrx_word() logic would help performance, e.g. on larger blocks
101 * used with flash storage or MMC/SD.  There should also be ways to make
102 * GCC be less stupid about reloading registers inside the I/O loops,
103 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
104 */
105
106static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
107		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
108{
109	if (unlikely(spi->mode & SPI_LSB_FIRST))
110		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
111	else
112		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
113}
114
115static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
116		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
117{
118	if (unlikely(spi->mode & SPI_LSB_FIRST))
119		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
120	else
121		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
122}
123
124static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
125		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
126{
127	if (unlikely(spi->mode & SPI_LSB_FIRST))
128		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
129	else
130		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
131}
132
133static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
134		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
135{
136	if (unlikely(spi->mode & SPI_LSB_FIRST))
137		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
138	else
139		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
140}
141
142/*
143 * These functions do not call setmosi or getmiso if respective flag
144 * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
145 * call when such pin is not present or defined in the controller.
146 * A separate set of callbacks is defined to get highest possible
147 * speed in the generic case (when both MISO and MOSI lines are
148 * available), as optimiser will remove the checks when argument is
149 * constant.
150 */
151
152static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
153		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
154{
155	flags = spi->controller->flags;
156	if (unlikely(spi->mode & SPI_LSB_FIRST))
157		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
158	else
159		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
160}
161
162static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
163		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
164{
165	flags = spi->controller->flags;
166	if (unlikely(spi->mode & SPI_LSB_FIRST))
167		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
168	else
169		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
170}
171
172static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
173		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
174{
175	flags = spi->controller->flags;
176	if (unlikely(spi->mode & SPI_LSB_FIRST))
177		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
178	else
179		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
180}
181
182static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
183		unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
184{
185	flags = spi->controller->flags;
186	if (unlikely(spi->mode & SPI_LSB_FIRST))
187		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
188	else
189		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
190}
191
192/*----------------------------------------------------------------------*/
193
194static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
195{
196	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
197
198	/* set initial clock line level */
199	if (is_active)
200		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
201
202	/* Drive chip select line, if we have one */
203	if (spi_gpio->cs_gpios) {
204		struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
205
206		/* SPI chip selects are normally active-low */
207		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
208	}
209}
210
211static void spi_gpio_set_mosi_idle(struct spi_device *spi)
212{
213	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
214
215	gpiod_set_value_cansleep(spi_gpio->mosi,
216				 !!(spi->mode & SPI_MOSI_IDLE_HIGH));
217}
218
219static int spi_gpio_setup(struct spi_device *spi)
220{
221	struct gpio_desc	*cs;
222	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
223	int ret;
224
225	/*
226	 * The CS GPIOs have already been
227	 * initialized from the descriptor lookup.
228	 */
229	if (spi_gpio->cs_gpios) {
230		cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
231		if (!spi->controller_state && cs) {
232			ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
233			if (ret)
234				return ret;
235		}
236	}
237
238	return spi_bitbang_setup(spi);
239}
240
241static int spi_gpio_set_direction(struct spi_device *spi, bool output)
242{
243	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
244	int ret;
245
246	if (output)
247		return gpiod_direction_output(spi_gpio->mosi, 1);
248
249	/*
250	 * Only change MOSI to an input if using 3WIRE mode.
251	 * Otherwise, MOSI could be left floating if there is
252	 * no pull resistor connected to the I/O pin, or could
253	 * be left logic high if there is a pull-up. Transmitting
254	 * logic high when only clocking MISO data in can put some
255	 * SPI devices in to a bad state.
256	 */
257	if (spi->mode & SPI_3WIRE) {
258		ret = gpiod_direction_input(spi_gpio->mosi);
259		if (ret)
260			return ret;
261	}
262	/*
263	 * Send a turnaround high impedance cycle when switching
264	 * from output to input. Theoretically there should be
265	 * a clock delay here, but as has been noted above, the
266	 * nsec delay function for bit-banged GPIO is simply
267	 * {} because bit-banging just doesn't get fast enough
268	 * anyway.
269	 */
270	if (spi->mode & SPI_3WIRE_HIZ) {
271		gpiod_set_value_cansleep(spi_gpio->sck,
272					 !(spi->mode & SPI_CPOL));
273		gpiod_set_value_cansleep(spi_gpio->sck,
274					 !!(spi->mode & SPI_CPOL));
275	}
276	return 0;
277}
278
279static void spi_gpio_cleanup(struct spi_device *spi)
280{
281	spi_bitbang_cleanup(spi);
282}
283
284/*
285 * It can be convenient to use this driver with pins that have alternate
286 * functions associated with a "native" SPI controller if a driver for that
287 * controller is not available, or is missing important functionality.
288 *
289 * On platforms which can do so, configure MISO with a weak pullup unless
290 * there's an external pullup on that signal.  That saves power by avoiding
291 * floating signals.  (A weak pulldown would save power too, but many
292 * drivers expect to see all-ones data as the no target "response".)
293 */
294static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
295{
296	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
297	if (IS_ERR(spi_gpio->mosi))
298		return PTR_ERR(spi_gpio->mosi);
299
300	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
301	if (IS_ERR(spi_gpio->miso))
302		return PTR_ERR(spi_gpio->miso);
303
304	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
305	return PTR_ERR_OR_ZERO(spi_gpio->sck);
306}
307
308static int spi_gpio_probe_pdata(struct platform_device *pdev,
309				struct spi_controller *host)
310{
311	struct device *dev = &pdev->dev;
312	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
313	struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
314	int i;
315
316	if (!pdata)
317		return -ENODEV;
318
319	/* It's just one always-selected device, fine to continue */
320	if (!pdata->num_chipselect)
321		return 0;
322
323	host->num_chipselect = pdata->num_chipselect;
324	spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
325					  sizeof(*spi_gpio->cs_gpios),
326					  GFP_KERNEL);
327	if (!spi_gpio->cs_gpios)
328		return -ENOMEM;
329
330	for (i = 0; i < host->num_chipselect; i++) {
331		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
332							     GPIOD_OUT_HIGH);
333		if (IS_ERR(spi_gpio->cs_gpios[i]))
334			return PTR_ERR(spi_gpio->cs_gpios[i]);
335	}
336
337	return 0;
338}
339
340static int spi_gpio_probe(struct platform_device *pdev)
341{
342	int				status;
343	struct spi_controller		*host;
344	struct spi_gpio			*spi_gpio;
345	struct device			*dev = &pdev->dev;
346	struct fwnode_handle		*fwnode = dev_fwnode(dev);
347	struct spi_bitbang		*bb;
348
349	host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
350	if (!host)
351		return -ENOMEM;
352
353	if (fwnode) {
354		device_set_node(&host->dev, fwnode);
355		host->use_gpio_descriptors = true;
356	} else {
357		status = spi_gpio_probe_pdata(pdev, host);
358		if (status)
359			return status;
360	}
361
362	spi_gpio = spi_controller_get_devdata(host);
363
364	status = spi_gpio_request(dev, spi_gpio);
365	if (status)
366		return status;
367
368	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
369	host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
370			  SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW |
371			  SPI_MOSI_IDLE_HIGH;
372	if (!spi_gpio->mosi) {
373		/* HW configuration without MOSI pin
374		 *
375		 * No setting SPI_CONTROLLER_NO_RX here - if there is only
376		 * a MOSI pin connected the host can still do RX by
377		 * changing the direction of the line.
378		 */
379		host->flags = SPI_CONTROLLER_NO_TX;
380	}
381
382	host->bus_num = pdev->id;
383	host->setup = spi_gpio_setup;
384	host->cleanup = spi_gpio_cleanup;
385
386	bb = &spi_gpio->bitbang;
387	bb->ctlr = host;
388	/*
389	 * There is some additional business, apart from driving the CS GPIO
390	 * line, that we need to do on selection. This makes the local
391	 * callback for chipselect always get called.
392	 */
393	host->flags |= SPI_CONTROLLER_GPIO_SS;
394	bb->chipselect = spi_gpio_chipselect;
395	bb->set_line_direction = spi_gpio_set_direction;
396	bb->set_mosi_idle = spi_gpio_set_mosi_idle;
397
398	if (host->flags & SPI_CONTROLLER_NO_TX) {
399		bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
400		bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
401		bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
402		bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
403	} else {
404		bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
405		bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
406		bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
407		bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
408	}
409	bb->setup_transfer = spi_bitbang_setup_transfer;
410
411	status = spi_bitbang_init(&spi_gpio->bitbang);
412	if (status)
413		return status;
414
415	return devm_spi_register_controller(&pdev->dev, host);
416}
417
418static const struct of_device_id spi_gpio_dt_ids[] = {
419	{ .compatible = "spi-gpio" },
420	{}
421};
422MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
423
424static struct platform_driver spi_gpio_driver = {
425	.driver = {
426		.name	= DRIVER_NAME,
427		.of_match_table = spi_gpio_dt_ids,
428	},
429	.probe		= spi_gpio_probe,
430};
431module_platform_driver(spi_gpio_driver);
432
433MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
434MODULE_AUTHOR("David Brownell");
435MODULE_LICENSE("GPL");
436MODULE_ALIAS("platform:" DRIVER_NAME);