spi-bitbang.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Polling/bitbanging SPI host controller controller driver utilities
  4 */
  5
  6#include <linux/spinlock.h>
  7#include <linux/workqueue.h>
  8#include <linux/interrupt.h>
  9#include <linux/module.h>
 10#include <linux/delay.h>
 11#include <linux/errno.h>
 12#include <linux/platform_device.h>
 13#include <linux/slab.h>
 14#include <linux/time64.h>
 15
 16#include <linux/spi/spi.h>
 17#include <linux/spi/spi_bitbang.h>
 18
 19#define SPI_BITBANG_CS_DELAY	100
 20
 21
 22/*----------------------------------------------------------------------*/
 23
 24/*
 25 * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
 26 * Use this for GPIO or shift-register level hardware APIs.
 27 *
 28 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
 29 * to glue code.  These bitbang setup() and cleanup() routines are always
 30 * used, though maybe they're called from controller-aware code.
 31 *
 32 * chipselect() and friends may use spi_device->controller_data and
 33 * controller registers as appropriate.
 34 *
 35 *
 36 * NOTE:  SPI controller pins can often be used as GPIO pins instead,
 37 * which means you could use a bitbang driver either to get hardware
 38 * working quickly, or testing for differences that aren't speed related.
 39 */
 40
 41typedef unsigned int (*spi_bb_txrx_bufs_fn)(struct spi_device *, spi_bb_txrx_word_fn,
 42					    unsigned int, struct spi_transfer *,
 43					    unsigned int);
 44
 45struct spi_bitbang_cs {
 46	unsigned int nsecs;	/* (clock cycle time) / 2 */
 47	spi_bb_txrx_word_fn txrx_word;
 48	spi_bb_txrx_bufs_fn txrx_bufs;
 49};
 50
 51static unsigned int bitbang_txrx_8(struct spi_device *spi,
 52	spi_bb_txrx_word_fn txrx_word,
 53	unsigned int ns,
 54	struct spi_transfer	*t,
 55	unsigned int flags)
 56{
 57	struct spi_bitbang	*bitbang;
 58	unsigned int		bits = t->bits_per_word;
 59	unsigned int		count = t->len;
 60	const u8		*tx = t->tx_buf;
 61	u8			*rx = t->rx_buf;
 62
 63	bitbang = spi_controller_get_devdata(spi->controller);
 64	while (likely(count > 0)) {
 65		u8		word = 0;
 66
 67		if (tx)
 68			word = *tx++;
 69		else
 70			word = spi->mode & SPI_MOSI_IDLE_HIGH ? 0xFF : 0;
 71		word = txrx_word(spi, ns, word, bits, flags);
 72		if (rx)
 73			*rx++ = word;
 74		count -= 1;
 75	}
 76	if (bitbang->set_mosi_idle)
 77		bitbang->set_mosi_idle(spi);
 78
 79	return t->len - count;
 80}
 81
 82static unsigned int bitbang_txrx_16(struct spi_device *spi,
 83	spi_bb_txrx_word_fn txrx_word,
 84	unsigned int ns,
 85	struct spi_transfer	*t,
 86	unsigned int flags)
 87{
 88	struct spi_bitbang	*bitbang;
 89	unsigned int		bits = t->bits_per_word;
 90	unsigned int		count = t->len;
 91	const u16		*tx = t->tx_buf;
 92	u16			*rx = t->rx_buf;
 93
 94	bitbang = spi_controller_get_devdata(spi->controller);
 95	while (likely(count > 1)) {
 96		u16		word = 0;
 97
 98		if (tx)
 99			word = *tx++;
100		else
101			word = spi->mode & SPI_MOSI_IDLE_HIGH ? 0xFFFF : 0;
102		word = txrx_word(spi, ns, word, bits, flags);
103		if (rx)
104			*rx++ = word;
105		count -= 2;
106	}
107	if (bitbang->set_mosi_idle)
108		bitbang->set_mosi_idle(spi);
109
110	return t->len - count;
111}
112
113static unsigned int bitbang_txrx_32(struct spi_device *spi,
114	spi_bb_txrx_word_fn txrx_word,
115	unsigned int ns,
116	struct spi_transfer	*t,
117	unsigned int flags)
118{
119	struct spi_bitbang	*bitbang;
120	unsigned int		bits = t->bits_per_word;
121	unsigned int		count = t->len;
122	const u32		*tx = t->tx_buf;
123	u32			*rx = t->rx_buf;
124
125	bitbang = spi_controller_get_devdata(spi->controller);
126	while (likely(count > 3)) {
127		u32		word = 0;
128
129		if (tx)
130			word = *tx++;
131		else
132			word = spi->mode & SPI_MOSI_IDLE_HIGH ? 0xFFFFFFFF : 0;
133		word = txrx_word(spi, ns, word, bits, flags);
134		if (rx)
135			*rx++ = word;
136		count -= 4;
137	}
138	if (bitbang->set_mosi_idle)
139		bitbang->set_mosi_idle(spi);
140
141	return t->len - count;
142}
143
144int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
145{
146	struct spi_bitbang_cs	*cs = spi->controller_state;
147	u8			bits_per_word;
148	u32			hz;
149
150	if (t) {
151		bits_per_word = t->bits_per_word;
152		hz = t->speed_hz;
153	} else {
154		bits_per_word = 0;
155		hz = 0;
156	}
157
158	/* spi_transfer level calls that work per-word */
159	if (!bits_per_word)
160		bits_per_word = spi->bits_per_word;
161	if (bits_per_word <= 8)
162		cs->txrx_bufs = bitbang_txrx_8;
163	else if (bits_per_word <= 16)
164		cs->txrx_bufs = bitbang_txrx_16;
165	else if (bits_per_word <= 32)
166		cs->txrx_bufs = bitbang_txrx_32;
167	else
168		return -EINVAL;
169
170	/* nsecs = (clock period)/2 */
171	if (!hz)
172		hz = spi->max_speed_hz;
173	if (hz) {
174		cs->nsecs = (NSEC_PER_SEC / 2) / hz;
175		if (cs->nsecs > (MAX_UDELAY_MS * NSEC_PER_MSEC))
176			return -EINVAL;
177	}
178
179	return 0;
180}
181EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
182
183/*
184 * spi_bitbang_setup - default setup for per-word I/O loops
185 */
186int spi_bitbang_setup(struct spi_device *spi)
187{
188	struct spi_bitbang_cs	*cs = spi->controller_state;
189	struct spi_bitbang	*bitbang;
190	bool			initial_setup = false;
191	int			retval;
192
193	bitbang = spi_controller_get_devdata(spi->controller);
194
195	if (!cs) {
196		cs = kzalloc(sizeof(*cs), GFP_KERNEL);
197		if (!cs)
198			return -ENOMEM;
199		spi->controller_state = cs;
200		initial_setup = true;
201	}
202
203	/* per-word shift register access, in hardware or bitbanging */
204	cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
205	if (!cs->txrx_word) {
206		retval = -EINVAL;
207		goto err_free;
208	}
209
210	if (bitbang->setup_transfer) {
211		retval = bitbang->setup_transfer(spi, NULL);
212		if (retval < 0)
213			goto err_free;
214	}
215
216	if (bitbang->set_mosi_idle)
217		bitbang->set_mosi_idle(spi);
218
219	dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
220
221	return 0;
222
223err_free:
224	if (initial_setup)
225		kfree(cs);
226	return retval;
227}
228EXPORT_SYMBOL_GPL(spi_bitbang_setup);
229
230/*
231 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
232 */
233void spi_bitbang_cleanup(struct spi_device *spi)
234{
235	kfree(spi->controller_state);
236}
237EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
238
239static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
240{
241	struct spi_bitbang_cs	*cs = spi->controller_state;
242	unsigned int		nsecs = cs->nsecs;
243	struct spi_bitbang	*bitbang;
244
245	bitbang = spi_controller_get_devdata(spi->controller);
246	if (bitbang->set_line_direction) {
247		int err;
248
249		err = bitbang->set_line_direction(spi, !!(t->tx_buf));
250		if (err < 0)
251			return err;
252	}
253
254	if (spi->mode & SPI_3WIRE) {
255		unsigned int flags;
256
257		flags = t->tx_buf ? SPI_CONTROLLER_NO_RX : SPI_CONTROLLER_NO_TX;
258		return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
259	}
260	return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
261}
262
263/*----------------------------------------------------------------------*/
264
265/*
266 * SECOND PART ... simple transfer queue runner.
267 *
268 * This costs a task context per controller, running the queue by
269 * performing each transfer in sequence.  Smarter hardware can queue
270 * several DMA transfers at once, and process several controller queues
271 * in parallel; this driver doesn't match such hardware very well.
272 *
273 * Drivers can provide word-at-a-time i/o primitives, or provide
274 * transfer-at-a-time ones to leverage dma or fifo hardware.
275 */
276
277static int spi_bitbang_prepare_hardware(struct spi_controller *spi)
278{
279	struct spi_bitbang	*bitbang;
280
281	bitbang = spi_controller_get_devdata(spi);
282
283	mutex_lock(&bitbang->lock);
284	bitbang->busy = 1;
285	mutex_unlock(&bitbang->lock);
286
287	return 0;
288}
289
290static int spi_bitbang_transfer_one(struct spi_controller *ctlr,
291				    struct spi_device *spi,
292				    struct spi_transfer *transfer)
293{
294	struct spi_bitbang *bitbang = spi_controller_get_devdata(ctlr);
295	int status = 0;
296
297	if (bitbang->setup_transfer) {
298		status = bitbang->setup_transfer(spi, transfer);
299		if (status < 0)
300			goto out;
301	}
302
303	if (transfer->len)
304		status = bitbang->txrx_bufs(spi, transfer);
305
306	if (status == transfer->len)
307		status = 0;
308	else if (status >= 0)
309		status = -EREMOTEIO;
310
311out:
312	spi_finalize_current_transfer(ctlr);
313
314	return status;
315}
316
317static int spi_bitbang_unprepare_hardware(struct spi_controller *spi)
318{
319	struct spi_bitbang	*bitbang;
320
321	bitbang = spi_controller_get_devdata(spi);
322
323	mutex_lock(&bitbang->lock);
324	bitbang->busy = 0;
325	mutex_unlock(&bitbang->lock);
326
327	return 0;
328}
329
330static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
331{
332	struct spi_bitbang *bitbang = spi_controller_get_devdata(spi->controller);
333
334	/* SPI core provides CS high / low, but bitbang driver
335	 * expects CS active
336	 * spi device driver takes care of handling SPI_CS_HIGH
337	 */
338	enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
339
340	ndelay(SPI_BITBANG_CS_DELAY);
341	bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
342			    BITBANG_CS_INACTIVE);
343	ndelay(SPI_BITBANG_CS_DELAY);
344}
345
346/*----------------------------------------------------------------------*/
347
348int spi_bitbang_init(struct spi_bitbang *bitbang)
349{
350	struct spi_controller *ctlr = bitbang->ctlr;
351	bool custom_cs;
352
353	if (!ctlr)
354		return -EINVAL;
355	/*
356	 * We only need the chipselect callback if we are actually using it.
357	 * If we just use GPIO descriptors, it is surplus. If the
358	 * SPI_CONTROLLER_GPIO_SS flag is set, we always need to call the
359	 * driver-specific chipselect routine.
360	 */
361	custom_cs = (!ctlr->use_gpio_descriptors ||
362		     (ctlr->flags & SPI_CONTROLLER_GPIO_SS));
363
364	if (custom_cs && !bitbang->chipselect)
365		return -EINVAL;
366
367	mutex_init(&bitbang->lock);
368
369	if (!ctlr->mode_bits)
370		ctlr->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
371
372	if (ctlr->transfer || ctlr->transfer_one_message)
373		return -EINVAL;
374
375	ctlr->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
376	ctlr->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
377	ctlr->transfer_one = spi_bitbang_transfer_one;
378	/*
379	 * When using GPIO descriptors, the ->set_cs() callback doesn't even
380	 * get called unless SPI_CONTROLLER_GPIO_SS is set.
381	 */
382	if (custom_cs)
383		ctlr->set_cs = spi_bitbang_set_cs;
384
385	if (!bitbang->txrx_bufs) {
386		bitbang->use_dma = 0;
387		bitbang->txrx_bufs = spi_bitbang_bufs;
388		if (!ctlr->setup) {
389			if (!bitbang->setup_transfer)
390				bitbang->setup_transfer =
391					 spi_bitbang_setup_transfer;
392			ctlr->setup = spi_bitbang_setup;
393			ctlr->cleanup = spi_bitbang_cleanup;
394		}
395	}
396
397	return 0;
398}
399EXPORT_SYMBOL_GPL(spi_bitbang_init);
400
401/**
402 * spi_bitbang_start - start up a polled/bitbanging SPI host controller driver
403 * @bitbang: driver handle
404 *
405 * Caller should have zero-initialized all parts of the structure, and then
406 * provided callbacks for chip selection and I/O loops.  If the host controller has
407 * a transfer method, its final step should call spi_bitbang_transfer(); or,
408 * that's the default if the transfer routine is not initialized.  It should
409 * also set up the bus number and number of chipselects.
410 *
411 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
412 * hardware that basically exposes a shift register) or per-spi_transfer
413 * (which takes better advantage of hardware like fifos or DMA engines).
414 *
415 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup(),
416 * spi_bitbang_cleanup() and spi_bitbang_setup_transfer() to handle those SPI
417 * host controller methods.  Those methods are the defaults if the bitbang->txrx_bufs
418 * routine isn't initialized.
419 *
420 * This routine registers the spi_controller, which will process requests in a
421 * dedicated task, keeping IRQs unblocked most of the time.  To stop
422 * processing those requests, call spi_bitbang_stop().
423 *
424 * On success, this routine will take a reference to the controller. The caller
425 * is responsible for calling spi_bitbang_stop() to decrement the reference and
426 * spi_controller_put() as counterpart of spi_alloc_host() to prevent a memory
427 * leak.
428 */
429int spi_bitbang_start(struct spi_bitbang *bitbang)
430{
431	struct spi_controller *ctlr = bitbang->ctlr;
432	int ret;
433
434	ret = spi_bitbang_init(bitbang);
435	if (ret)
436		return ret;
437
438	/* driver may get busy before register() returns, especially
439	 * if someone registered boardinfo for devices
440	 */
441	ret = spi_register_controller(spi_controller_get(ctlr));
442	if (ret)
443		spi_controller_put(ctlr);
444
445	return ret;
446}
447EXPORT_SYMBOL_GPL(spi_bitbang_start);
448
449/*
450 * spi_bitbang_stop - stops the task providing spi communication
451 */
452void spi_bitbang_stop(struct spi_bitbang *bitbang)
453{
454	spi_unregister_controller(bitbang->ctlr);
455}
456EXPORT_SYMBOL_GPL(spi_bitbang_stop);
457
458MODULE_LICENSE("GPL");
459MODULE_DESCRIPTION("Utilities for Bitbanging SPI host controllers");