rz-sysc.h

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Renesas RZ System Controller
 4 *
 5 * Copyright (C) 2024 Renesas Electronics Corp.
 6 */
 7
 8#ifndef __SOC_RENESAS_RZ_SYSC_H__
 9#define __SOC_RENESAS_RZ_SYSC_H__
10
11#include <linux/device.h>
12#include <linux/sys_soc.h>
13#include <linux/types.h>
14
15/**
16 * struct rz_syc_soc_id_init_data - RZ SYSC SoC identification initialization data
17 * @family: RZ SoC family
18 * @id: RZ SoC expected ID
19 * @devid_offset: SYSC SoC ID register offset
20 * @revision_mask: SYSC SoC ID revision mask
21 * @specific_id_mask: SYSC SoC ID specific ID mask
22 * @print_id: print SoC-specific extended device identification
23 */
24struct rz_sysc_soc_id_init_data {
25	const char * const family;
26	u32 id;
27	u32 devid_offset;
28	u32 revision_mask;
29	u32 specific_id_mask;
30	void (*print_id)(struct device *dev, void __iomem *sysc_base,
31			 struct soc_device_attribute *soc_dev_attr);
32};
33
34/**
35 * struct rz_sysc_init_data - RZ SYSC initialization data
36 * @soc_id_init_data: RZ SYSC SoC ID initialization data
37 * @writeable_reg: Regmap writeable register check function
38 * @readable_reg: Regmap readable register check function
39 * @max_register: Maximum SYSC register offset to be used by the regmap config
40 */
41struct rz_sysc_init_data {
42	const struct rz_sysc_soc_id_init_data *soc_id_init_data;
43	bool (*writeable_reg)(struct device *dev, unsigned int reg);
44	bool (*readable_reg)(struct device *dev, unsigned int reg);
45	u32 max_register;
46};
47
48extern const struct rz_sysc_init_data rzg3e_sys_init_data;
49extern const struct rz_sysc_init_data rzg3s_sysc_init_data;
50extern const struct rz_sysc_init_data rzv2h_sys_init_data;
51extern const struct rz_sysc_init_data rzv2n_sys_init_data;
52
53#endif /* __SOC_RENESAS_RZ_SYSC_H__ */