llcc-qcom.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
   4 *
   5 */
   6
   7#include <linux/bitfield.h>
   8#include <linux/bitmap.h>
   9#include <linux/bitops.h>
  10#include <linux/cleanup.h>
  11#include <linux/device.h>
  12#include <linux/io.h>
  13#include <linux/kernel.h>
  14#include <linux/module.h>
  15#include <linux/mutex.h>
  16#include <linux/nvmem-consumer.h>
  17#include <linux/of.h>
  18#include <linux/regmap.h>
  19#include <linux/sizes.h>
  20#include <linux/slab.h>
  21#include <linux/soc/qcom/llcc-qcom.h>
  22
  23#define ACTIVATE                      BIT(0)
  24#define DEACTIVATE                    BIT(1)
  25#define ACT_CLEAR                     BIT(0)
  26#define ACT_COMPLETE                  BIT(4)
  27#define ACT_CTRL_OPCODE_ACTIVATE      BIT(0)
  28#define ACT_CTRL_OPCODE_DEACTIVATE    BIT(1)
  29#define ACT_CTRL_ACT_TRIG             BIT(0)
  30#define ACT_CTRL_OPCODE_SHIFT         1
  31#define ATTR1_PROBE_TARGET_WAYS_SHIFT 2
  32#define ATTR1_FIXED_SIZE_SHIFT        3
  33#define ATTR1_PRIORITY_SHIFT          4
  34#define ATTR1_MAX_CAP_SHIFT           16
  35#define ATTR0_RES_WAYS_MASK           GENMASK(15, 0)
  36#define ATTR0_BONUS_WAYS_MASK         GENMASK(31, 16)
  37#define ATTR0_BONUS_WAYS_SHIFT        16
  38#define ATTR2_PROBE_TARGET_WAYS_MASK  BIT(4)
  39#define ATTR2_FIXED_SIZE_MASK         BIT(8)
  40#define ATTR2_PRIORITY_MASK           GENMASK(14, 12)
  41#define ATTR2_PARENT_SCID_MASK        GENMASK(21, 16)
  42#define ATTR2_IN_A_GROUP_MASK         BIT(24)
  43#define LLCC_STATUS_READ_DELAY        100
  44
  45#define CACHE_LINE_SIZE_SHIFT         6
  46
  47#define LLCC_LB_CNT_MASK              GENMASK(31, 28)
  48#define LLCC_LB_CNT_SHIFT             28
  49
  50#define MAX_CAP_TO_BYTES(n)           (n * SZ_1K)
  51#define LLCC_TRP_ACT_CTRLn(n)         (n * SZ_4K)
  52#define LLCC_TRP_ACT_CLEARn(n)        (8 + n * SZ_4K)
  53#define LLCC_TRP_STATUSn(n)           (4 + n * SZ_4K)
  54#define LLCC_TRP_ATTR0_CFGn(n)        (0x21000 + SZ_8 * n)
  55#define LLCC_TRP_ATTR1_CFGn(n)        (0x21004 + SZ_8 * n)
  56#define LLCC_TRP_ATTR2_CFGn(n)        (0x21100 + SZ_4 * n)
  57#define LLCC_V6_TRP_ATTR0_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR0_CFG] + SZ_64 * (n))
  58#define LLCC_V6_TRP_ATTR1_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR1_CFG] + SZ_64 * (n))
  59#define LLCC_V6_TRP_ATTR2_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR2_CFG] + SZ_64 * (n))
  60#define LLCC_V6_TRP_ATTR3_CFGn(n)     (cfg->reg_offset[LLCC_TRP_ATTR3_CFG] + SZ_64 * (n))
  61
  62#define LLCC_TRP_SCID_DIS_CAP_ALLOC   0x21f00
  63#define LLCC_TRP_PCB_ACT              0x21f04
  64#define LLCC_TRP_ALGO_CFG1	      0x21f0c
  65#define LLCC_TRP_ALGO_CFG2	      0x21f10
  66#define LLCC_TRP_ALGO_CFG3	      0x21f14
  67#define LLCC_TRP_ALGO_CFG4	      0x21f18
  68#define LLCC_TRP_ALGO_CFG5	      0x21f1c
  69#define LLCC_TRP_WRSC_EN              0x21f20
  70#define LLCC_TRP_ALGO_CFG6	      0x21f24
  71#define LLCC_TRP_ALGO_CFG7	      0x21f28
  72#define LLCC_TRP_WRSC_CACHEABLE_EN    0x21f2c
  73#define LLCC_TRP_ALGO_CFG8	      0x21f30
  74
  75#define LLCC_VERSION_2_0_0_0          0x02000000
  76#define LLCC_VERSION_2_1_0_0          0x02010000
  77#define LLCC_VERSION_4_1_0_0          0x04010000
  78#define LLCC_VERSION_6_0_0_0          0X06000000
  79
  80/**
  81 * struct llcc_slice_config - Data associated with the llcc slice
  82 * @usecase_id: Unique id for the client's use case
  83 * @slice_id: llcc slice id for each client
  84 * @max_cap: The maximum capacity of the cache slice provided in KB
  85 * @priority: Priority of the client used to select victim line for replacement
  86 * @fixed_size: Boolean indicating if the slice has a fixed capacity
  87 * @bonus_ways: Bonus ways are additional ways to be used for any slice,
  88 *		if client ends up using more than reserved cache ways. Bonus
  89 *		ways are allocated only if they are not reserved for some
  90 *		other client.
  91 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot
  92 *		be used by any other client than the one its assigned to.
  93 * @cache_mode: Each slice operates as a cache, this controls the mode of the
  94 *             slice: normal or TCM(Tightly Coupled Memory)
  95 * @probe_target_ways: Determines what ways to probe for access hit. When
  96 *                    configured to 1 only bonus and reserved ways are probed.
  97 *                    When configured to 0 all ways in llcc are probed.
  98 * @dis_cap_alloc: Disable capacity based allocation for a client
  99 * @retain_on_pc: If this bit is set and client has maintained active vote
 100 *               then the ways assigned to this client are not flushed on power
 101 *               collapse.
 102 * @activate_on_init: Activate the slice immediately after it is programmed
 103 * @write_scid_en: Bit enables write cache support for a given scid.
 104 * @write_scid_cacheable_en: Enables write cache cacheable support for a
 105 *			     given scid (not supported on v2 or older hardware).
 106 * @stale_en: Bit enables stale.
 107 * @stale_cap_en: Bit enables stale only if current scid is over-cap.
 108 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
 109 *                under-cap.
 110 * @mru_rollover: Roll-over on reserved cache ways.
 111 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
 112 *                   same-scid lines for replacement.
 113 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
 114 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
 115 *              over-cap scid. Depends on corresponding bit being set in
 116 *              ovcap_en.
 117 * @vict_prio: When current scid is under-capacity, allocate over other
 118 *             lower-than victim priority-line threshold scid.
 119 * @parent_slice_id: For grouped slices, specifies the slice id of the parent.
 120 */
 121struct llcc_slice_config {
 122	u32 usecase_id;
 123	u32 slice_id;
 124	u32 max_cap;
 125	u32 priority;
 126	bool fixed_size;
 127	u32 bonus_ways;
 128	u32 res_ways;
 129	u32 cache_mode;
 130	u32 probe_target_ways;
 131	bool dis_cap_alloc;
 132	bool retain_on_pc;
 133	bool activate_on_init;
 134	bool write_scid_en;
 135	bool write_scid_cacheable_en;
 136	bool stale_en;
 137	bool stale_cap_en;
 138	bool mru_uncap_en;
 139	bool mru_rollover;
 140	bool alloc_oneway_en;
 141	bool ovcap_en;
 142	bool ovcap_prio;
 143	bool vict_prio;
 144	u32 parent_slice_id;
 145};
 146
 147struct qcom_llcc_config {
 148	const struct llcc_slice_config *sct_data;
 149	const u32 *reg_offset;
 150	const struct llcc_edac_reg_offset *edac_reg_offset;
 151	u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */
 152	u32 num_banks;
 153	int size;
 154	bool skip_llcc_cfg;
 155	bool no_edac;
 156	bool irq_configured;
 157	bool no_broadcast_register;
 158};
 159
 160struct qcom_sct_config {
 161	const struct qcom_llcc_config *llcc_config;
 162	int num_config;
 163};
 164
 165enum llcc_reg_offset {
 166	LLCC_COMMON_HW_INFO,
 167	LLCC_COMMON_STATUS0,
 168	LLCC_TRP_ATTR0_CFG,
 169	LLCC_TRP_ATTR1_CFG,
 170	LLCC_TRP_ATTR2_CFG,
 171	LLCC_TRP_ATTR3_CFG,
 172	LLCC_TRP_SID_DIS_CAP_ALLOC,
 173	LLCC_TRP_ALGO_STALE_EN,
 174	LLCC_TRP_ALGO_STALE_CAP_EN,
 175	LLCC_TRP_ALGO_MRU0,
 176	LLCC_TRP_ALGO_MRU1,
 177	LLCC_TRP_ALGO_ALLOC0,
 178	LLCC_TRP_ALGO_ALLOC1,
 179	LLCC_TRP_ALGO_ALLOC2,
 180	LLCC_TRP_ALGO_ALLOC3,
 181	LLCC_TRP_WRS_EN,
 182	LLCC_TRP_WRS_CACHEABLE_EN,
 183};
 184
 185static const struct llcc_slice_config ipq5424_data[] =  {
 186	{
 187		.usecase_id = LLCC_CPUSS,
 188		.slice_id = 1,
 189		.max_cap = 768,
 190		.priority = 1,
 191		.bonus_ways = 0xFFFF,
 192		.retain_on_pc = true,
 193		.activate_on_init = true,
 194		.write_scid_cacheable_en = true,
 195		.stale_en = true,
 196		.stale_cap_en = true,
 197		.alloc_oneway_en = true,
 198		.ovcap_en = true,
 199		.ovcap_prio = true,
 200		.vict_prio = true,
 201	},
 202	{
 203		.usecase_id = LLCC_VIDSC0,
 204		.slice_id = 2,
 205		.max_cap = 256,
 206		.priority = 2,
 207		.fixed_size = true,
 208		.bonus_ways = 0xF000,
 209		.retain_on_pc = true,
 210		.activate_on_init = true,
 211		.write_scid_cacheable_en = true,
 212		.stale_en = true,
 213		.stale_cap_en = true,
 214	},
 215};
 216
 217static const struct llcc_slice_config kaanapali_data[] = {
 218	{
 219		.usecase_id = LLCC_CPUSS,
 220		.slice_id = 1,
 221		.max_cap = 5120,
 222		.priority = 1,
 223		.bonus_ways = 0xffffffff,
 224		.activate_on_init = true,
 225		.write_scid_en = true,
 226		.stale_en = true,
 227		.mru_uncap_en = true,
 228		.vict_prio = true,
 229	}, {
 230		.usecase_id = LLCC_VIDSC0,
 231		.slice_id = 2,
 232		.max_cap = 512,
 233		.priority = 4,
 234		.fixed_size = true,
 235		.bonus_ways = 0xffffffff,
 236		.mru_uncap_en = true,
 237		.vict_prio = true,
 238	}, {
 239		.usecase_id = LLCC_AUDIO,
 240		.slice_id = 35,
 241		.max_cap = 512,
 242		.priority = 1,
 243		.fixed_size = true,
 244		.bonus_ways = 0xffffffff,
 245		.mru_uncap_en = true,
 246		.vict_prio = true,
 247	}, {
 248		.usecase_id = LLCC_MDMHPGRW,
 249		.slice_id = 25,
 250		.max_cap = 1024,
 251		.priority = 5,
 252		.bonus_ways = 0xffffffff,
 253		.mru_uncap_en = true,
 254		.vict_prio = true,
 255	}, {
 256		.usecase_id = LLCC_CMPT,
 257		.slice_id = 34,
 258		.max_cap = 4096,
 259		.priority = 1,
 260		.fixed_size = true,
 261		.bonus_ways = 0xffffffff,
 262		.mru_uncap_en = true,
 263		.vict_prio = true,
 264	}, {
 265		.usecase_id = LLCC_GPUHTW,
 266		.slice_id = 11,
 267		.max_cap = 512,
 268		.priority = 1,
 269		.fixed_size = true,
 270		.bonus_ways = 0xffffffff,
 271		.mru_uncap_en = true,
 272		.vict_prio = true,
 273	}, {
 274		.usecase_id = LLCC_GPU,
 275		.slice_id = 9,
 276		.max_cap = 5632,
 277		.priority = 1,
 278		.fixed_size = true,
 279		.bonus_ways = 0xffffffff,
 280		.write_scid_cacheable_en = true,
 281		.mru_uncap_en = true,
 282		.vict_prio = true,
 283	}, {
 284		.usecase_id = LLCC_MMUHWT,
 285		.slice_id = 18,
 286		.max_cap = 768,
 287		.priority = 1,
 288		.fixed_size = true,
 289		.bonus_ways = 0xffffffff,
 290		.activate_on_init = true,
 291		.mru_uncap_en = true,
 292		.vict_prio = true,
 293	}, {
 294		.usecase_id = LLCC_DISP,
 295		.slice_id = 16,
 296		.max_cap = 7168,
 297		.priority = 1,
 298		.fixed_size = true,
 299		.bonus_ways = 0xffffffff,
 300		.cache_mode = 2,
 301		.stale_en = true,
 302		.mru_uncap_en = true,
 303		.vict_prio = true,
 304	}, {
 305		.usecase_id = LLCC_MDMHPFX,
 306		.slice_id = 24,
 307		.max_cap = 1024,
 308		.priority = 5,
 309		.fixed_size = true,
 310		.bonus_ways = 0xffffffff,
 311		.mru_uncap_en = true,
 312		.vict_prio = true,
 313	}, {
 314		.usecase_id = LLCC_MDMPNG,
 315		.slice_id = 27,
 316		.max_cap = 256,
 317		.priority = 5,
 318		.bonus_ways = 0xfffff,
 319		.mru_uncap_en = true,
 320		.vict_prio = true,
 321	}, {
 322		.usecase_id = LLCC_CVP,
 323		.slice_id = 8,
 324		.max_cap = 800,
 325		.priority = 5,
 326		.fixed_size = true,
 327		.bonus_ways = 0xffffffff,
 328		.mru_uncap_en = true,
 329		.ovcap_en = true,
 330		.vict_prio = true,
 331		.parent_slice_id = 33,
 332	}, {
 333		.usecase_id = LLCC_MODPE,
 334		.slice_id = 29,
 335		.max_cap = 256,
 336		.priority = 1,
 337		.fixed_size = true,
 338		.bonus_ways = 0xf0000000,
 339		.mru_uncap_en = true,
 340		.alloc_oneway_en = true,
 341		.vict_prio = true,
 342	}, {
 343		.usecase_id = LLCC_WRCACHE,
 344		.slice_id = 31,
 345		.max_cap = 512,
 346		.priority = 1,
 347		.fixed_size = true,
 348		.bonus_ways = 0xffffffff,
 349		.activate_on_init = true,
 350		.mru_uncap_en = true,
 351		.vict_prio = true,
 352	}, {
 353		.usecase_id = LLCC_CVPFW,
 354		.slice_id = 19,
 355		.max_cap = 512,
 356		.priority = 5,
 357		.fixed_size = true,
 358		.bonus_ways = 0xffffffff,
 359		.mru_uncap_en = true,
 360		.vict_prio = true,
 361		.parent_slice_id = 33,
 362	}, {
 363		.usecase_id = LLCC_CPUMTE,
 364		.slice_id = 7,
 365		.max_cap = 256,
 366		.priority = 1,
 367		.fixed_size = true,
 368		.bonus_ways = 0xffffffff,
 369		.mru_uncap_en = true,
 370		.vict_prio = true,
 371	}, {
 372		.usecase_id = LLCC_CMPTHCP,
 373		.slice_id = 15,
 374		.max_cap = 256,
 375		.priority = 4,
 376		.fixed_size = true,
 377		.bonus_ways = 0xffffffff,
 378		.mru_uncap_en = true,
 379		.vict_prio = true,
 380	}, {
 381		.usecase_id = LLCC_LCPDARE,
 382		.slice_id = 30,
 383		.max_cap = 128,
 384		.priority = 5,
 385		.fixed_size = true,
 386		.bonus_ways = 0xffffffff,
 387		.activate_on_init = true,
 388		.mru_uncap_en = true,
 389		.alloc_oneway_en = true,
 390		.vict_prio = true,
 391	}, {
 392		.usecase_id = LLCC_AENPU,
 393		.slice_id = 3,
 394		.max_cap = 3072,
 395		.priority = 1,
 396		.fixed_size = true,
 397		.bonus_ways = 0xffffffff,
 398		.cache_mode = 2,
 399		.mru_uncap_en = true,
 400		.vict_prio = true,
 401	}, {
 402		.usecase_id = LLCC_ISLAND1,
 403		.slice_id = 12,
 404		.max_cap = 7936,
 405		.priority = 7,
 406		.fixed_size = true,
 407		.bonus_ways = 0x7fffffff,
 408		.mru_uncap_en = true,
 409		.vict_prio = true,
 410	}, {
 411		.usecase_id = LLCC_DISP_WB,
 412		.slice_id = 23,
 413		.max_cap = 512,
 414		.priority = 4,
 415		.fixed_size = true,
 416		.bonus_ways = 0xffffffff,
 417		.mru_uncap_en = true,
 418		.vict_prio = true,
 419	}, {
 420		.usecase_id = LLCC_VIDVSP,
 421		.slice_id = 4,
 422		.max_cap = 256,
 423		.priority = 4,
 424		.fixed_size = true,
 425		.bonus_ways = 0xffffffff,
 426		.mru_uncap_en = true,
 427		.vict_prio = true,
 428	}, {
 429		.usecase_id = LLCC_VIDDEC,
 430		.slice_id = 5,
 431		.max_cap = 512,
 432		.priority = 4,
 433		.fixed_size = true,
 434		.bonus_ways = 0xffffffff,
 435		.cache_mode = 2,
 436		.mru_uncap_en = true,
 437		.ovcap_en = true,
 438		.vict_prio = true,
 439		.parent_slice_id = 33,
 440	}, {
 441		.usecase_id = LLCC_CAMOFE,
 442		.slice_id = 33,
 443		.max_cap = 6144,
 444		.priority = 4,
 445		.fixed_size = true,
 446		.bonus_ways = 0xffffffff,
 447		.stale_en = true,
 448		.mru_uncap_en = true,
 449		.ovcap_en = true,
 450		.vict_prio = true,
 451		.parent_slice_id = 33,
 452	}, {
 453		.usecase_id = LLCC_CAMRTIP,
 454		.slice_id = 13,
 455		.max_cap = 6144,
 456		.priority = 4,
 457		.fixed_size = true,
 458		.bonus_ways = 0xffffffff,
 459		.stale_en = true,
 460		.mru_uncap_en = true,
 461		.ovcap_en = true,
 462		.vict_prio = true,
 463		.parent_slice_id = 33,
 464	}, {
 465		.usecase_id = LLCC_CAMRTRF,
 466		.slice_id = 10,
 467		.max_cap = 3584,
 468		.priority = 3,
 469		.fixed_size = true,
 470		.bonus_ways = 0xffffffff,
 471		.stale_en = true,
 472		.mru_uncap_en = true,
 473		.ovcap_en = true,
 474		.vict_prio = true,
 475		.parent_slice_id = 33,
 476	}, {
 477		.usecase_id = LLCC_CAMSRTRF,
 478		.slice_id = 21,
 479		.max_cap = 6144,
 480		.priority = 1,
 481		.fixed_size = true,
 482		.bonus_ways = 0xffffffff,
 483		.stale_en = true,
 484		.mru_uncap_en = true,
 485		.ovcap_en = true,
 486		.vict_prio = true,
 487		.parent_slice_id = 33,
 488	}, {
 489		.usecase_id = LLCC_VIDEO_APV,
 490		.slice_id = 6,
 491		.max_cap = 768,
 492		.priority = 4,
 493		.fixed_size = true,
 494		.bonus_ways = 0xffffffff,
 495		.mru_uncap_en = true,
 496		.vict_prio = true,
 497	}, {
 498		.usecase_id = LLCC_COMPUTE1,
 499		.slice_id = 22,
 500		.max_cap = 4096,
 501		.priority = 1,
 502		.fixed_size = true,
 503		.bonus_ways = 0xffffffff,
 504		.mru_uncap_en = true,
 505		.vict_prio = true,
 506	}, {
 507		.usecase_id = LLCC_CPUSS_OPP,
 508		.slice_id = 32,
 509		.max_cap = 0,
 510		.priority = 0,
 511		.fixed_size = true,
 512		.bonus_ways = 0,
 513		.activate_on_init = true,
 514		.write_scid_en = true,
 515		.mru_uncap_en = true,
 516		.vict_prio = true,
 517	}, {
 518		.usecase_id = LLCC_CPUSSMPAM,
 519		.slice_id = 17,
 520		.max_cap = 2048,
 521		.priority = 1,
 522		.fixed_size = true,
 523		.bonus_ways = 0xffffffff,
 524		.activate_on_init = true,
 525		.write_scid_en = true,
 526		.stale_en = true,
 527		.mru_uncap_en = true,
 528		.vict_prio = true,
 529	}, {
 530		.usecase_id = LLCC_CAM_IPE_STROV,
 531		.slice_id = 14,
 532		.max_cap = 400,
 533		.priority = 5,
 534		.fixed_size = true,
 535		.bonus_ways = 0xffffffff,
 536		.mru_uncap_en = true,
 537		.ovcap_en = true,
 538		.vict_prio = true,
 539		.parent_slice_id = 33,
 540	}, {
 541		.usecase_id = LLCC_CAM_OFE_STROV,
 542		.slice_id = 20,
 543		.max_cap = 400,
 544		.priority = 5,
 545		.fixed_size = true,
 546		.bonus_ways = 0xffffffff,
 547		.mru_uncap_en = true,
 548		.ovcap_en = true,
 549		.vict_prio = true,
 550		.parent_slice_id = 33,
 551	}, {
 552		.usecase_id = LLCC_CPUSS_HEU,
 553		.slice_id = 28,
 554		.max_cap = 0,
 555		.priority = 0,
 556		.fixed_size = true,
 557		.bonus_ways = 0,
 558		.mru_uncap_en = true,
 559		.ovcap_en = true,
 560		.vict_prio = true,
 561	}, {
 562		.usecase_id = LLCC_MDM_PNG_FIXED,
 563		.slice_id = 26,
 564		.max_cap = 256,
 565		.priority = 5,
 566		.fixed_size = true,
 567		.bonus_ways = 0xff000000,
 568		.activate_on_init = true,
 569		.write_scid_en = true,
 570		.mru_uncap_en = true,
 571		.vict_prio = true,
 572	   },
 573};
 574
 575static const struct llcc_slice_config sa8775p_data[] =  {
 576	{
 577		.usecase_id = LLCC_CPUSS,
 578		.slice_id = 1,
 579		.max_cap = 2048,
 580		.priority = 1,
 581		.bonus_ways = 0xff,
 582		.cache_mode = 0,
 583		.retain_on_pc = true,
 584		.activate_on_init = true,
 585	}, {
 586		.usecase_id = LLCC_VIDSC0,
 587		.slice_id = 2,
 588		.max_cap = 512,
 589		.priority = 3,
 590		.fixed_size = true,
 591		.bonus_ways = 0xff,
 592		.cache_mode = 0,
 593		.retain_on_pc = true,
 594	}, {
 595		.usecase_id = LLCC_CPUSS1,
 596		.slice_id = 3,
 597		.max_cap = 1024,
 598		.priority = 1,
 599		.fixed_size = true,
 600		.bonus_ways = 0xff,
 601		.cache_mode = 0,
 602		.retain_on_pc = true,
 603	}, {
 604		.usecase_id = LLCC_CPUHWT,
 605		.slice_id = 5,
 606		.max_cap = 512,
 607		.priority = 1,
 608		.fixed_size = true,
 609		.bonus_ways = 0xff,
 610		.cache_mode = 0,
 611		.retain_on_pc = true,
 612	}, {
 613		.usecase_id = LLCC_AUDIO,
 614		.slice_id = 6,
 615		.max_cap = 1024,
 616		.priority = 1,
 617		.fixed_size = true,
 618		.bonus_ways = 0xff,
 619		.cache_mode = 0,
 620	}, {
 621		.usecase_id = LLCC_CMPT,
 622		.slice_id = 10,
 623		.max_cap = 4096,
 624		.priority = 1,
 625		.fixed_size = true,
 626		.bonus_ways = 0xff,
 627		.cache_mode = 0,
 628		.retain_on_pc = true,
 629	}, {
 630		.usecase_id = LLCC_GPUHTW,
 631		.slice_id = 11,
 632		.max_cap = 1024,
 633		.priority = 1,
 634		.fixed_size = true,
 635		.bonus_ways = 0xff,
 636		.cache_mode = 0,
 637		.retain_on_pc = true,
 638	}, {
 639		.usecase_id = LLCC_GPU,
 640		.slice_id = 12,
 641		.max_cap = 1024,
 642		.priority = 1,
 643		.fixed_size = true,
 644		.bonus_ways = 0xff,
 645		.cache_mode = 0,
 646		.retain_on_pc = true,
 647		.write_scid_en = true,
 648	}, {
 649		.usecase_id = LLCC_MMUHWT,
 650		.slice_id = 13,
 651		.max_cap = 1024,
 652		.priority = 1,
 653		.fixed_size = true,
 654		.bonus_ways = 0xff,
 655		.cache_mode = 0,
 656		.activate_on_init = true,
 657	}, {
 658		.usecase_id = LLCC_CMPTDMA,
 659		.slice_id = 15,
 660		.max_cap = 1024,
 661		.priority = 1,
 662		.fixed_size = true,
 663		.bonus_ways = 0xff,
 664		.cache_mode = 0,
 665		.retain_on_pc = true,
 666	}, {
 667		.usecase_id = LLCC_DISP,
 668		.slice_id = 16,
 669		.max_cap = 4096,
 670		.priority = 2,
 671		.fixed_size = true,
 672		.bonus_ways = 0xff,
 673		.cache_mode = 0,
 674		.retain_on_pc = true,
 675	}, {
 676		.usecase_id = LLCC_VIDFW,
 677		.slice_id = 17,
 678		.max_cap = 3072,
 679		.priority = 1,
 680		.bonus_ways = 0xff,
 681		.cache_mode = 0,
 682		.retain_on_pc = true,
 683	}, {
 684		.usecase_id = LLCC_AUDHW,
 685		.slice_id = 22,
 686		.max_cap = 1024,
 687		.priority = 1,
 688		.fixed_size = true,
 689		.bonus_ways = 0xff,
 690		.cache_mode = 0,
 691	}, {
 692		.usecase_id = LLCC_CVP,
 693		.slice_id = 28,
 694		.max_cap = 256,
 695		.priority = 3,
 696		.fixed_size = true,
 697		.bonus_ways = 0xff,
 698		.cache_mode = 0,
 699		.retain_on_pc = true,
 700	}, {
 701		.usecase_id = LLCC_APTCM,
 702		.slice_id = 30,
 703		.max_cap = 1024,
 704		.priority = 3,
 705		.fixed_size = true,
 706		.res_ways = 0xf0,
 707		.cache_mode = 1,
 708		.retain_on_pc = true,
 709	}, {
 710		.usecase_id = LLCC_WRCACHE,
 711		.slice_id = 31,
 712		.max_cap = 512,
 713		.priority = 1,
 714		.fixed_size = true,
 715		.bonus_ways = 0xff,
 716		.cache_mode = 0,
 717		.activate_on_init = true,
 718	},
 719};
 720
 721static const struct llcc_slice_config sar1130p_data[] = {
 722	{
 723		.usecase_id = LLCC_CPUSS,
 724		.slice_id = 1,
 725		.max_cap = 4096,
 726		.priority = 1,
 727		.bonus_ways = 0x1fff,
 728		.res_ways = 0x0,
 729		.cache_mode = 0,
 730		.retain_on_pc = true,
 731		.activate_on_init = true,
 732	}, {
 733		.usecase_id = LLCC_VIDSC0,
 734		.slice_id = 2,
 735		.max_cap = 512,
 736		.priority = 3,
 737		.fixed_size = true,
 738		.bonus_ways = 0x1fff,
 739		.res_ways = 0x0,
 740		.cache_mode = 0,
 741		.retain_on_pc = true,
 742	}, {
 743		.usecase_id = LLCC_AUDIO,
 744		.slice_id = 6,
 745		.max_cap = 1024,
 746		.priority = 3,
 747		.fixed_size = true,
 748		.bonus_ways = 0x1fff,
 749		.res_ways = 0x0,
 750		.cache_mode = 0,
 751		.retain_on_pc = true,
 752	}, {
 753		.usecase_id = LLCC_CMPT,
 754		.slice_id = 10,
 755		.max_cap = 1024,
 756		.priority = 1,
 757		.fixed_size = true,
 758		.bonus_ways = 0x1fff,
 759		.res_ways = 0x0,
 760		.cache_mode = 0,
 761		.retain_on_pc = true,
 762	}, {
 763		.usecase_id = LLCC_GPUHTW,
 764		.slice_id = 11,
 765		.max_cap = 0,
 766		.priority = 1,
 767		.fixed_size = true,
 768		.bonus_ways = 0x1fff,
 769		.res_ways = 0x0,
 770		.cache_mode = 0,
 771		.retain_on_pc = true,
 772	}, {
 773		.usecase_id = LLCC_GPU,
 774		.slice_id = 12,
 775		.max_cap = 3072,
 776		.priority = 3,
 777		.fixed_size = true,
 778		.bonus_ways = 0x1fff,
 779		.res_ways = 0x0,
 780		.cache_mode = 0,
 781		.retain_on_pc = true,
 782		.write_scid_en = true,
 783	}, {
 784		.usecase_id = LLCC_MMUHWT,
 785		.slice_id = 13,
 786		.max_cap = 512,
 787		.priority = 1,
 788		.fixed_size = true,
 789		.bonus_ways = 0x1fff,
 790		.res_ways = 0x0,
 791		.cache_mode = 0,
 792	}, {
 793		.usecase_id = LLCC_DISP,
 794		.slice_id = 16,
 795		.max_cap = 12800,
 796		.priority = 1,
 797		.fixed_size = true,
 798		.bonus_ways = 0x1fff,
 799		.res_ways = 0x0,
 800		.cache_mode = 0,
 801		.retain_on_pc = true,
 802	}, {
 803		.usecase_id = LLCC_CVP,
 804		.slice_id = 28,
 805		.max_cap = 256,
 806		.priority = 3,
 807		.fixed_size = true,
 808		.bonus_ways = 0x1fff,
 809		.res_ways = 0x0,
 810		.cache_mode = 0,
 811		.retain_on_pc = true,
 812	}, {
 813		.usecase_id = LLCC_APTCM,
 814		.slice_id = 26,
 815		.max_cap = 2048,
 816		.priority = 3,
 817		.fixed_size = true,
 818		.bonus_ways = 0x0,
 819		.res_ways = 0x3,
 820		.cache_mode = true,
 821		.dis_cap_alloc = true,
 822		.retain_on_pc = true,
 823	}, {
 824		.usecase_id = LLCC_WRCACHE,
 825		.slice_id = 31,
 826		.max_cap = 256,
 827		.priority = 1,
 828		.fixed_size = true,
 829		.bonus_ways = 0x1fff,
 830		.res_ways = 0x0,
 831		.cache_mode = 0,
 832		.activate_on_init = true,
 833	}, {
 834		.usecase_id = LLCC_AENPU,
 835		.slice_id = 30,
 836		.max_cap = 3072,
 837		.priority = 3,
 838		.fixed_size = true,
 839		.bonus_ways = 0x1fff,
 840		.res_ways = 0x0,
 841		.cache_mode = 0,
 842		.retain_on_pc = true,
 843	}, {
 844		.usecase_id = LLCC_DISP_LEFT,
 845		.slice_id = 17,
 846		.max_cap = 0,
 847		.priority = 1,
 848		.fixed_size = true,
 849		.bonus_ways = 0x0,
 850		.res_ways = 0x0,
 851		.cache_mode = 0,
 852		.retain_on_pc = true,
 853	}, {
 854		.usecase_id = LLCC_DISP_RIGHT,
 855		.slice_id = 18,
 856		.max_cap = 0,
 857		.priority = 1,
 858		.fixed_size = true,
 859		.bonus_ways = 0x0,
 860		.res_ways = 0x0,
 861		.cache_mode = 0,
 862		.retain_on_pc = true,
 863	}, {
 864		.usecase_id = LLCC_EVCS_LEFT,
 865		.slice_id = 22,
 866		.max_cap = 0,
 867		.priority = 1,
 868		.fixed_size = true,
 869		.bonus_ways = 0x0,
 870		.res_ways = 0x0,
 871		.cache_mode = 0,
 872		.retain_on_pc = true,
 873	}, {
 874		.usecase_id = LLCC_EVCS_RIGHT,
 875		.slice_id = 23,
 876		.max_cap = 0,
 877		.priority = 1,
 878		.fixed_size = true,
 879		.bonus_ways = 0x0,
 880		.res_ways = 0x0,
 881		.cache_mode = 0,
 882		.retain_on_pc = true,
 883	},
 884};
 885
 886static const struct llcc_slice_config sar2130p_data[] = {
 887	{
 888		.usecase_id = LLCC_CPUSS,
 889		.slice_id = 1,
 890		.max_cap = 6144,
 891		.priority = 1,
 892		.fixed_size = 0,
 893		.bonus_ways = 0x3fffffff,
 894		.res_ways = 0x0,
 895		.cache_mode = 0,
 896		.retain_on_pc = true,
 897		.activate_on_init = true,
 898	}, {
 899		.usecase_id = LLCC_VIDSC0,
 900		.slice_id = 2,
 901		.max_cap = 128,
 902		.priority = 2,
 903		.fixed_size = true,
 904		.bonus_ways = 0x3fffffff,
 905		.res_ways = 0x0,
 906		.cache_mode = 0,
 907		.retain_on_pc = true,
 908	}, {
 909		.usecase_id = LLCC_AUDIO,
 910		.slice_id = 6,
 911		.max_cap = 1024,
 912		.priority = 3,
 913		.fixed_size = true,
 914		.bonus_ways = 0x3fffffff,
 915		.res_ways = 0x0,
 916		.cache_mode = 0,
 917		.retain_on_pc = true,
 918	}, {
 919		.usecase_id = LLCC_CMPT,
 920		.slice_id = 10,
 921		.max_cap = 1024,
 922		.priority = 1,
 923		.fixed_size = true,
 924		.bonus_ways = 0x3fffffff,
 925		.res_ways = 0x0,
 926		.cache_mode = 0,
 927		.retain_on_pc = true,
 928	}, {
 929		.usecase_id = LLCC_GPUHTW,
 930		.slice_id = 11,
 931		.max_cap = 0,
 932		.priority = 1,
 933		.fixed_size = true,
 934		.bonus_ways = 0x3fffffff,
 935		.res_ways = 0x0,
 936		.cache_mode = 0,
 937		.retain_on_pc = true,
 938	}, {
 939		.usecase_id = LLCC_GPU,
 940		.slice_id = 12,
 941		.max_cap = 1536,
 942		.priority = 2,
 943		.fixed_size = true,
 944		.bonus_ways = 0x3fffffff,
 945		.res_ways = 0x0,
 946		.cache_mode = 0,
 947		.retain_on_pc = true,
 948		.write_scid_en = true,
 949	}, {
 950		.usecase_id = LLCC_MMUHWT,
 951		.slice_id = 13,
 952		.max_cap = 1024,
 953		.priority = 1,
 954		.fixed_size = true,
 955		.bonus_ways = 0x3fffffff,
 956		.res_ways = 0x0,
 957		.cache_mode = 0,
 958		.activate_on_init = true,
 959	}, {
 960		.usecase_id = LLCC_DISP,
 961		.slice_id = 16,
 962		.max_cap = 0,
 963		.priority = 1,
 964		.fixed_size = true,
 965		.bonus_ways = 0x3fffffff,
 966		.res_ways = 0x0,
 967		.cache_mode = 0,
 968		.retain_on_pc = true,
 969	}, {
 970		.usecase_id = LLCC_APTCM,
 971		.slice_id = 26,
 972		.max_cap = 2048,
 973		.priority = 3,
 974		.fixed_size = true,
 975		.bonus_ways = 0x0,
 976		.res_ways = 0x3,
 977		.cache_mode = true,
 978		.dis_cap_alloc = true,
 979		.retain_on_pc = true,
 980	}, {
 981		.usecase_id = LLCC_WRCACHE,
 982		.slice_id = 31,
 983		.max_cap = 256,
 984		.priority = 1,
 985		.fixed_size = true,
 986		.bonus_ways = 0x3fffffff,
 987		.res_ways = 0x0,
 988		.cache_mode = 0,
 989		.activate_on_init = true,
 990	}, {
 991		.usecase_id = LLCC_VIEYE,
 992		.slice_id = 7,
 993		.max_cap = 7168,
 994		.priority = 4,
 995		.fixed_size = true,
 996		.bonus_ways = 0x3fffffff,
 997		.res_ways = 0x0,
 998		.cache_mode = 0,
 999		.retain_on_pc = true,
1000	}, {
1001		.usecase_id = LLCC_VIDPTH,
1002		.slice_id = 8,
1003		.max_cap = 7168,
1004		.priority = 4,
1005		.fixed_size = true,
1006		.bonus_ways = 0x3fffffff,
1007		.res_ways = 0x0,
1008		.cache_mode = 0,
1009		.retain_on_pc = true,
1010	}, {
1011		.usecase_id = LLCC_GPUMV,
1012		.slice_id = 9,
1013		.max_cap = 2048,
1014		.priority = 2,
1015		.fixed_size = true,
1016		.bonus_ways = 0x3fffffff,
1017		.res_ways = 0x0,
1018		.cache_mode = 0,
1019		.retain_on_pc = true,
1020	}, {
1021		.usecase_id = LLCC_EVA_LEFT,
1022		.slice_id = 20,
1023		.max_cap = 7168,
1024		.priority = 5,
1025		.fixed_size = true,
1026		.bonus_ways = 0x3ffffffc,
1027		.res_ways = 0x0,
1028		.cache_mode = 0,
1029		.retain_on_pc = true,
1030	}, {
1031		.usecase_id = LLCC_EVA_RIGHT,
1032		.slice_id = 21,
1033		.max_cap = 7168,
1034		.priority = 5,
1035		.fixed_size = true,
1036		.bonus_ways = 0x3ffffffc,
1037		.res_ways = 0x0,
1038		.cache_mode = 0,
1039		.retain_on_pc = true,
1040	}, {
1041		.usecase_id = LLCC_EVAGAIN,
1042		.slice_id = 25,
1043		.max_cap = 1024,
1044		.priority = 2,
1045		.fixed_size = true,
1046		.bonus_ways = 0x3fffffff,
1047		.res_ways = 0x0,
1048		.cache_mode = 0,
1049		.retain_on_pc = true,
1050	}, {
1051		.usecase_id = LLCC_AENPU,
1052		.slice_id = 30,
1053		.max_cap = 3072,
1054		.priority = 3,
1055		.fixed_size = true,
1056		.bonus_ways = 0x3fffffff,
1057		.res_ways = 0x0,
1058		.cache_mode = 0,
1059		.retain_on_pc = true,
1060	}, {
1061		.usecase_id = LLCC_VIPTH,
1062		.slice_id = 29,
1063		.max_cap = 1024,
1064		.priority = 4,
1065		.fixed_size = true,
1066		.bonus_ways = 0x3fffffff,
1067		.res_ways = 0x0,
1068		.cache_mode = 0,
1069		.retain_on_pc = true,
1070	}, {
1071		.usecase_id = LLCC_DISP_LEFT,
1072		.slice_id = 17,
1073		.max_cap = 0,
1074		.priority = 1,
1075		.fixed_size = true,
1076		.bonus_ways = 0x0,
1077		.res_ways = 0x0,
1078		.cache_mode = 0,
1079		.retain_on_pc = true,
1080	}, {
1081		.usecase_id = LLCC_DISP_RIGHT,
1082		.slice_id = 18,
1083		.max_cap = 0,
1084		.priority = 1,
1085		.fixed_size = true,
1086		.bonus_ways = 0x0,
1087		.res_ways = 0x0,
1088		.cache_mode = 0,
1089		.retain_on_pc = true,
1090	}, {
1091		.usecase_id = LLCC_EVCS_LEFT,
1092		.slice_id = 22,
1093		.max_cap = 0,
1094		.priority = 1,
1095		.fixed_size = true,
1096		.bonus_ways = 0x0,
1097		.res_ways = 0x0,
1098		.cache_mode = 0,
1099		.retain_on_pc = true,
1100	}, {
1101		.usecase_id = LLCC_EVCS_RIGHT,
1102		.slice_id = 23,
1103		.max_cap = 0,
1104		.priority = 1,
1105		.fixed_size = true,
1106		.bonus_ways = 0x0,
1107		.res_ways = 0x0,
1108		.cache_mode = 0,
1109		.retain_on_pc = true,
1110	}, {
1111		.usecase_id = LLCC_SPAD,
1112		.slice_id = 24,
1113		.max_cap = 7168,
1114		.priority = 1,
1115		.fixed_size = true,
1116		.bonus_ways = 0x0,
1117		.res_ways = 0x0,
1118		.cache_mode = 0,
1119		.retain_on_pc = true,
1120	},
1121};
1122
1123static const struct llcc_slice_config sc7180_data[] =  {
1124	{
1125		.usecase_id = LLCC_CPUSS,
1126		.slice_id = 1,
1127		.max_cap = 256,
1128		.priority = 1,
1129		.bonus_ways = 0xf,
1130		.cache_mode = 0,
1131		.retain_on_pc = true,
1132		.activate_on_init = true,
1133	}, {
1134		.usecase_id = LLCC_MDM,
1135		.slice_id = 8,
1136		.max_cap = 128,
1137		.priority = 1,
1138		.bonus_ways = 0xf,
1139		.cache_mode = 0,
1140		.retain_on_pc = true,
1141	}, {
1142		.usecase_id = LLCC_GPUHTW,
1143		.slice_id = 11,
1144		.max_cap = 128,
1145		.priority = 1,
1146		.bonus_ways = 0xf,
1147		.cache_mode = 0,
1148		.retain_on_pc = true,
1149	}, {
1150		.usecase_id = LLCC_GPU,
1151		.slice_id = 12,
1152		.max_cap = 128,
1153		.priority = 1,
1154		.bonus_ways = 0xf,
1155		.cache_mode = 0,
1156		.retain_on_pc = true,
1157	},
1158};
1159
1160static const struct llcc_slice_config sc7280_data[] =  {
1161	{
1162		.usecase_id = LLCC_CPUSS,
1163		.slice_id = 1,
1164		.max_cap = 768,
1165		.priority = 1,
1166		.bonus_ways = 0x3f,
1167		.cache_mode = 0,
1168		.retain_on_pc = true,
1169		.activate_on_init = true,
1170	}, {
1171		.usecase_id = LLCC_MDMHPGRW,
1172		.slice_id = 7,
1173		.max_cap = 512,
1174		.priority = 2,
1175		.fixed_size = true,
1176		.bonus_ways = 0x3f,
1177		.cache_mode = 0,
1178		.retain_on_pc = true,
1179	}, {
1180		.usecase_id = LLCC_CMPT,
1181		.slice_id = 10,
1182		.max_cap = 768,
1183		.priority = 1,
1184		.fixed_size = true,
1185		.bonus_ways = 0x3f,
1186		.cache_mode = 0,
1187		.retain_on_pc = true,
1188	}, {
1189		.usecase_id = LLCC_GPUHTW,
1190		.slice_id = 11,
1191		.max_cap = 256,
1192		.priority = 1,
1193		.fixed_size = true,
1194		.bonus_ways = 0x3f,
1195		.cache_mode = 0,
1196		.retain_on_pc = true,
1197	}, {
1198		.usecase_id = LLCC_GPU,
1199		.slice_id = 12,
1200		.max_cap = 512,
1201		.priority = 1,
1202		.bonus_ways = 0x3f,
1203		.cache_mode = 0,
1204		.retain_on_pc = true,
1205	}, {
1206		.usecase_id = LLCC_MMUHWT,
1207		.slice_id = 13,
1208		.max_cap = 256,
1209		.priority = 1,
1210		.fixed_size = true,
1211		.bonus_ways = 0x3f,
1212		.cache_mode = 0,
1213		.activate_on_init = true,
1214	}, {
1215		.usecase_id = LLCC_MDMPNG,
1216		.slice_id = 21,
1217		.max_cap = 768,
1218		.priority = 0,
1219		.fixed_size = true,
1220		.bonus_ways = 0x3f,
1221		.cache_mode = 0,
1222		.retain_on_pc = true,
1223	}, {
1224		.usecase_id = LLCC_WLHW,
1225		.slice_id = 24,
1226		.max_cap = 256,
1227		.priority = 1,
1228		.fixed_size = true,
1229		.bonus_ways = 0x3f,
1230		.cache_mode = 0,
1231		.retain_on_pc = true,
1232	}, {
1233		.usecase_id = LLCC_MODPE,
1234		.slice_id = 29,
1235		.max_cap = 64,
1236		.priority = 1,
1237		.fixed_size = true,
1238		.bonus_ways = 0x3f,
1239		.cache_mode = 0,
1240		.retain_on_pc = true,
1241	},
1242};
1243
1244static const struct llcc_slice_config sc8180x_data[] = {
1245	{
1246		.usecase_id = LLCC_CPUSS,
1247		.slice_id = 1,
1248		.max_cap = 6144,
1249		.priority = 1,
1250		.fixed_size = true,
1251		.bonus_ways = 0xfff,
1252		.cache_mode = 0,
1253		.retain_on_pc = true,
1254		.activate_on_init = true,
1255	}, {
1256		.usecase_id = LLCC_VIDSC0,
1257		.slice_id = 2,
1258		.max_cap = 512,
1259		.priority = 2,
1260		.fixed_size = true,
1261		.bonus_ways = 0xfff,
1262		.cache_mode = 0,
1263		.retain_on_pc = true,
1264	}, {
1265		.usecase_id = LLCC_VIDSC1,
1266		.slice_id = 3,
1267		.max_cap = 512,
1268		.priority = 2,
1269		.fixed_size = true,
1270		.bonus_ways = 0xfff,
1271		.cache_mode = 0,
1272		.retain_on_pc = true,
1273	}, {
1274		.usecase_id = LLCC_AUDIO,
1275		.slice_id = 6,
1276		.max_cap = 1024,
1277		.priority = 1,
1278		.fixed_size = true,
1279		.bonus_ways = 0xfff,
1280		.cache_mode = 0,
1281		.retain_on_pc = true,
1282	}, {
1283		.usecase_id = LLCC_MDMHPGRW,
1284		.slice_id = 7,
1285		.max_cap = 3072,
1286		.priority = 1,
1287		.fixed_size = true,
1288		.bonus_ways = 0x3ff,
1289		.res_ways = 0xc00,
1290		.cache_mode = 0,
1291		.retain_on_pc = true,
1292	}, {
1293		.usecase_id = LLCC_MDM,
1294		.slice_id = 8,
1295		.max_cap = 3072,
1296		.priority = 1,
1297		.fixed_size = true,
1298		.bonus_ways = 0xfff,
1299		.cache_mode = 0,
1300		.retain_on_pc = true,
1301	}, {
1302		.usecase_id = LLCC_MODHW,
1303		.slice_id = 9,
1304		.max_cap = 1024,
1305		.priority = 1,
1306		.fixed_size = true,
1307		.bonus_ways = 0xfff,
1308		.cache_mode = 0,
1309		.retain_on_pc = true,
1310	}, {
1311		.usecase_id = LLCC_CMPT,
1312		.slice_id = 10,
1313		.max_cap = 6144,
1314		.priority = 1,
1315		.fixed_size = true,
1316		.bonus_ways = 0xfff,
1317		.cache_mode = 0,
1318		.retain_on_pc = true,
1319	}, {
1320		.usecase_id = LLCC_GPUHTW,
1321		.slice_id = 11,
1322		.max_cap = 1024,
1323		.priority = 1,
1324		.fixed_size = true,
1325		.bonus_ways = 0xfff,
1326		.cache_mode = 0,
1327		.retain_on_pc = true,
1328	}, {
1329		.usecase_id = LLCC_GPU,
1330		.slice_id = 12,
1331		.max_cap = 5120,
1332		.priority = 1,
1333		.fixed_size = true,
1334		.bonus_ways = 0xfff,
1335		.cache_mode = 0,
1336		.retain_on_pc = true,
1337	}, {
1338		.usecase_id = LLCC_MMUHWT,
1339		.slice_id = 13,
1340		.max_cap = 1024,
1341		.priority = 1,
1342		.fixed_size = true,
1343		.bonus_ways = 0xfff,
1344		.cache_mode = 0,
1345		.activate_on_init = true,
1346	}, {
1347		.usecase_id = LLCC_CMPTDMA,
1348		.slice_id = 15,
1349		.max_cap = 6144,
1350		.priority = 1,
1351		.fixed_size = true,
1352		.bonus_ways = 0xfff,
1353		.cache_mode = 0,
1354		.retain_on_pc = true,
1355	}, {
1356		.usecase_id = LLCC_DISP,
1357		.slice_id = 16,
1358		.max_cap = 6144,
1359		.priority = 1,
1360		.fixed_size = true,
1361		.bonus_ways = 0xfff,
1362		.cache_mode = 0,
1363		.retain_on_pc = true,
1364	}, {
1365		.usecase_id = LLCC_VIDFW,
1366		.slice_id = 17,
1367		.max_cap = 1024,
1368		.priority = 1,
1369		.fixed_size = true,
1370		.bonus_ways = 0xfff,
1371		.cache_mode = 0,
1372		.retain_on_pc = true,
1373	}, {
1374		.usecase_id = LLCC_MDMHPFX,
1375		.slice_id = 20,
1376		.max_cap = 1024,
1377		.priority = 2,
1378		.fixed_size = true,
1379		.bonus_ways = 0xfff,
1380		.cache_mode = 0,
1381		.retain_on_pc = true,
1382	}, {
1383		.usecase_id = LLCC_MDMPNG,
1384		.slice_id = 21,
1385		.max_cap = 1024,
1386		.priority = 0,
1387		.fixed_size = true,
1388		.bonus_ways = 0xc,
1389		.cache_mode = 0,
1390		.retain_on_pc = true,
1391	}, {
1392		.usecase_id = LLCC_AUDHW,
1393		.slice_id = 22,
1394		.max_cap = 1024,
1395		.priority = 1,
1396		.fixed_size = true,
1397		.bonus_ways = 0xfff,
1398		.cache_mode = 0,
1399		.retain_on_pc = true,
1400	}, {
1401		.usecase_id = LLCC_NPU,
1402		.slice_id = 23,
1403		.max_cap = 6144,
1404		.priority = 1,
1405		.fixed_size = true,
1406		.bonus_ways = 0xfff,
1407		.cache_mode = 0,
1408		.retain_on_pc = true,
1409	}, {
1410		.usecase_id = LLCC_WLHW,
1411		.slice_id = 24,
1412		.max_cap = 6144,
1413		.priority = 1,
1414		.fixed_size = true,
1415		.bonus_ways = 0xfff,
1416		.cache_mode = 0,
1417		.retain_on_pc = true,
1418	}, {
1419		.usecase_id = LLCC_MODPE,
1420		.slice_id = 29,
1421		.max_cap = 512,
1422		.priority = 1,
1423		.fixed_size = true,
1424		.bonus_ways = 0xc,
1425		.cache_mode = 0,
1426		.retain_on_pc = true,
1427	}, {
1428		.usecase_id = LLCC_APTCM,
1429		.slice_id = 30,
1430		.max_cap = 512,
1431		.priority = 3,
1432		.fixed_size = true,
1433		.res_ways = 0x1,
1434		.cache_mode = 1,
1435		.retain_on_pc = true,
1436	}, {
1437		.usecase_id = LLCC_WRCACHE,
1438		.slice_id = 31,
1439		.max_cap = 128,
1440		.priority = 1,
1441		.fixed_size = true,
1442		.bonus_ways = 0xfff,
1443		.cache_mode = 0,
1444	},
1445};
1446
1447static const struct llcc_slice_config sc8280xp_data[] = {
1448	{
1449		.usecase_id = LLCC_CPUSS,
1450		.slice_id = 1,
1451		.max_cap = 6144,
1452		.priority = 1,
1453		.fixed_size = true,
1454		.bonus_ways = 0xfff,
1455		.cache_mode = 0,
1456		.retain_on_pc = true,
1457		.activate_on_init = true,
1458	}, {
1459		.usecase_id = LLCC_VIDSC0,
1460		.slice_id = 2,
1461		.max_cap = 512,
1462		.priority = 3,
1463		.fixed_size = true,
1464		.bonus_ways = 0xfff,
1465		.cache_mode = 0,
1466		.retain_on_pc = true,
1467	}, {
1468		.usecase_id = LLCC_AUDIO,
1469		.slice_id = 6,
1470		.max_cap = 1024,
1471		.priority = 1,
1472		.fixed_size = true,
1473		.bonus_ways = 0xfff,
1474		.cache_mode = 0,
1475	}, {
1476		.usecase_id = LLCC_CMPT,
1477		.slice_id = 10,
1478		.max_cap = 6144,
1479		.priority = 1,
1480		.fixed_size = true,
1481		.bonus_ways = 0xfff,
1482		.cache_mode = 0,
1483	}, {
1484		.usecase_id = LLCC_GPUHTW,
1485		.slice_id = 11,
1486		.max_cap = 1024,
1487		.priority = 1,
1488		.fixed_size = true,
1489		.bonus_ways = 0xfff,
1490		.cache_mode = 0,
1491		.retain_on_pc = true,
1492	}, {
1493		.usecase_id = LLCC_GPU,
1494		.slice_id = 12,
1495		.max_cap = 4096,
1496		.priority = 1,
1497		.fixed_size = true,
1498		.bonus_ways = 0xfff,
1499		.cache_mode = 0,
1500		.retain_on_pc = true,
1501		.write_scid_en = true,
1502	}, {
1503		.usecase_id = LLCC_MMUHWT,
1504		.slice_id = 13,
1505		.max_cap = 1024,
1506		.priority = 1,
1507		.fixed_size = true,
1508		.bonus_ways = 0xfff,
1509		.cache_mode = 0,
1510		.activate_on_init = true,
1511	}, {
1512		.usecase_id = LLCC_DISP,
1513		.slice_id = 16,
1514		.max_cap = 6144,
1515		.priority = 1,
1516		.fixed_size = true,
1517		.bonus_ways = 0xfff,
1518		.cache_mode = 0,
1519		.retain_on_pc = true,
1520	}, {
1521		.usecase_id = LLCC_AUDHW,
1522		.slice_id = 22,
1523		.max_cap = 2048,
1524		.priority = 1,
1525		.fixed_size = true,
1526		.bonus_ways = 0xfff,
1527		.cache_mode = 0,
1528		.retain_on_pc = true,
1529	}, {
1530		.usecase_id = LLCC_ECC,
1531		.slice_id = 26,
1532		.max_cap = 1024,
1533		.priority = 1,
1534		.fixed_size = true,
1535		.bonus_ways = 0xfff,
1536		.cache_mode = 0,
1537		.retain_on_pc = true,
1538	}, {
1539		.usecase_id = LLCC_CVP,
1540		.slice_id = 28,
1541		.max_cap = 512,
1542		.priority = 3,
1543		.fixed_size = true,
1544		.bonus_ways = 0xfff,
1545		.cache_mode = 0,
1546		.retain_on_pc = true,
1547	}, {
1548		.usecase_id = LLCC_APTCM,
1549		.slice_id = 30,
1550		.max_cap = 1024,
1551		.priority = 3,
1552		.fixed_size = true,
1553		.res_ways = 0x1,
1554		.cache_mode = 1,
1555		.retain_on_pc = true,
1556	}, {
1557		.usecase_id = LLCC_WRCACHE,
1558		.slice_id = 31,
1559		.max_cap = 1024,
1560		.priority = 1,
1561		.fixed_size = true,
1562		.bonus_ways = 0xfff,
1563		.cache_mode = 0,
1564		.activate_on_init = true,
1565	}, {
1566		.usecase_id = LLCC_CVPFW,
1567		.slice_id = 17,
1568		.max_cap = 512,
1569		.priority = 1,
1570		.bonus_ways = 0xfff,
1571		.cache_mode = 0,
1572		.retain_on_pc = true,
1573	}, {
1574		.usecase_id = LLCC_CPUSS1,
1575		.slice_id = 3,
1576		.max_cap = 2048,
1577		.priority = 1,
1578		.fixed_size = true,
1579		.bonus_ways = 0xfff,
1580		.cache_mode = 0,
1581		.retain_on_pc = true,
1582	}, {
1583		.usecase_id = LLCC_CPUHWT,
1584		.slice_id = 5,
1585		.max_cap = 512,
1586		.priority = 1,
1587		.fixed_size = true,
1588		.bonus_ways = 0xfff,
1589		.cache_mode = 0,
1590		.activate_on_init = true,
1591	},
1592};
1593
1594static const struct llcc_slice_config sdm845_data[] =  {{
1595		.usecase_id = LLCC_CPUSS,
1596		.slice_id = 1,
1597		.max_cap = 2816,
1598		.priority = 1,
1599		.bonus_ways = 0xffc,
1600		.res_ways = 0x2,
1601		.cache_mode = 0,
1602		.dis_cap_alloc = true,
1603		.retain_on_pc = true,
1604		.activate_on_init = true,
1605	}, {
1606		.usecase_id = LLCC_VIDSC0,
1607		.slice_id = 2,
1608		.max_cap = 512,
1609		.priority = 2,
1610		.fixed_size = true,
1611		.res_ways = 0xf0,
1612		.cache_mode = 0,
1613		.dis_cap_alloc = true,
1614		.retain_on_pc = true,
1615	}, {
1616		.usecase_id = LLCC_VIDSC1,
1617		.slice_id = 3,
1618		.max_cap = 512,
1619		.priority = 2,
1620		.fixed_size = true,
1621		.res_ways = 0xf0,
1622		.cache_mode = 0,
1623		.dis_cap_alloc = true,
1624		.retain_on_pc = true,
1625	}, {
1626		.usecase_id = LLCC_ROTATOR,
1627		.slice_id = 4,
1628		.max_cap = 563,
1629		.priority = 2,
1630		.fixed_size = true,
1631		.res_ways = 0xe,
1632		.cache_mode = 2,
1633		.dis_cap_alloc = true,
1634		.retain_on_pc = true,
1635	}, {
1636		.usecase_id = LLCC_VOICE,
1637		.slice_id = 5,
1638		.max_cap = 2816,
1639		.priority = 1,
1640		.bonus_ways = 0xffc,
1641		.res_ways = 0x2,
1642		.cache_mode = 0,
1643		.dis_cap_alloc = true,
1644		.retain_on_pc = true,
1645	}, {
1646		.usecase_id = LLCC_AUDIO,
1647		.slice_id = 6,
1648		.max_cap = 2816,
1649		.priority = 1,
1650		.bonus_ways = 0xffc,
1651		.res_ways = 0x2,
1652		.cache_mode = 0,
1653		.dis_cap_alloc = true,
1654		.retain_on_pc = true,
1655	}, {
1656		.usecase_id = LLCC_MDMHPGRW,
1657		.slice_id = 7,
1658		.max_cap = 1024,
1659		.priority = 2,
1660		.bonus_ways = 0xfc,
1661		.res_ways = 0xf00,
1662		.cache_mode = 0,
1663		.dis_cap_alloc = true,
1664		.retain_on_pc = true,
1665	}, {
1666		.usecase_id = LLCC_MDM,
1667		.slice_id = 8,
1668		.max_cap = 2816,
1669		.priority = 1,
1670		.bonus_ways = 0xffc,
1671		.res_ways = 0x2,
1672		.cache_mode = 0,
1673		.dis_cap_alloc = true,
1674		.retain_on_pc = true,
1675	}, {
1676		.usecase_id = LLCC_CMPT,
1677		.slice_id = 10,
1678		.max_cap = 2816,
1679		.priority = 1,
1680		.bonus_ways = 0xffc,
1681		.res_ways = 0x2,
1682		.cache_mode = 0,
1683		.dis_cap_alloc = true,
1684		.retain_on_pc = true,
1685	}, {
1686		.usecase_id = LLCC_GPUHTW,
1687		.slice_id = 11,
1688		.max_cap = 512,
1689		.priority = 1,
1690		.fixed_size = true,
1691		.bonus_ways = 0xc,
1692		.cache_mode = 0,
1693		.dis_cap_alloc = true,
1694		.retain_on_pc = true,
1695	}, {
1696		.usecase_id = LLCC_GPU,
1697		.slice_id = 12,
1698		.max_cap = 2304,
1699		.priority = 1,
1700		.bonus_ways = 0xff0,
1701		.res_ways = 0x2,
1702		.cache_mode = 0,
1703		.dis_cap_alloc = true,
1704		.retain_on_pc = true,
1705	}, {
1706		.usecase_id = LLCC_MMUHWT,
1707		.slice_id = 13,
1708		.max_cap = 256,
1709		.priority = 2,
1710		.res_ways = 0x1,
1711		.cache_mode = 0,
1712		.dis_cap_alloc = true,
1713		.activate_on_init = true,
1714	}, {
1715		.usecase_id = LLCC_CMPTDMA,
1716		.slice_id = 15,
1717		.max_cap = 2816,
1718		.priority = 1,
1719		.bonus_ways = 0xffc,
1720		.res_ways = 0x2,
1721		.cache_mode = 0,
1722		.dis_cap_alloc = true,
1723		.retain_on_pc = true,
1724	}, {
1725		.usecase_id = LLCC_DISP,
1726		.slice_id = 16,
1727		.max_cap = 2816,
1728		.priority = 1,
1729		.bonus_ways = 0xffc,
1730		.res_ways = 0x2,
1731		.cache_mode = 0,
1732		.dis_cap_alloc = true,
1733		.retain_on_pc = true,
1734	}, {
1735		.usecase_id = LLCC_VIDFW,
1736		.slice_id = 17,
1737		.max_cap = 2816,
1738		.priority = 1,
1739		.bonus_ways = 0xffc,
1740		.res_ways = 0x2,
1741		.cache_mode = 0,
1742		.dis_cap_alloc = true,
1743		.retain_on_pc = true,
1744	}, {
1745		.usecase_id = LLCC_MDMHPFX,
1746		.slice_id = 20,
1747		.max_cap = 1024,
1748		.priority = 2,
1749		.fixed_size = true,
1750		.res_ways = 0xf00,
1751		.cache_mode = 0,
1752		.dis_cap_alloc = true,
1753		.retain_on_pc = true,
1754	}, {
1755		.usecase_id = LLCC_MDMPNG,
1756		.slice_id = 21,
1757		.max_cap = 1024,
1758		.priority = 0,
1759		.fixed_size = true,
1760		.bonus_ways = 0x1e,
1761		.cache_mode = 0,
1762		.dis_cap_alloc = true,
1763		.retain_on_pc = true,
1764	}, {
1765		.usecase_id = LLCC_AUDHW,
1766		.slice_id = 22,
1767		.max_cap = 1024,
1768		.priority = 1,
1769		.fixed_size = true,
1770		.bonus_ways = 0xffc,
1771		.res_ways = 0x2,
1772		.cache_mode = 0,
1773		.dis_cap_alloc = true,
1774		.retain_on_pc = true,
1775	},
1776};
1777
1778static const struct llcc_slice_config sm6350_data[] =  {
1779	{
1780		.usecase_id = LLCC_CPUSS,
1781		.slice_id = 1,
1782		.max_cap = 768,
1783		.priority = 1,
1784		.bonus_ways = 0xfff,
1785		.cache_mode = 0,
1786		.activate_on_init = true,
1787		.write_scid_en = true,
1788	}, {
1789		.usecase_id = LLCC_MDM,
1790		.slice_id = 8,
1791		.max_cap = 512,
1792		.priority = 2,
1793		.bonus_ways = 0xfff,
1794		.cache_mode = 0,
1795		.activate_on_init = true,
1796	}, {
1797		.usecase_id = LLCC_GPUHTW,
1798		.slice_id = 11,
1799		.max_cap = 256,
1800		.priority = 1,
1801		.bonus_ways = 0xfff,
1802		.cache_mode = 0,
1803		.activate_on_init = true,
1804	}, {
1805		.usecase_id = LLCC_GPU,
1806		.slice_id = 12,
1807		.max_cap = 512,
1808		.priority = 1,
1809		.bonus_ways = 0xfff,
1810		.cache_mode = 0,
1811		.activate_on_init = true,
1812	}, {
1813		.usecase_id = LLCC_MDMPNG,
1814		.slice_id = 21,
1815		.max_cap = 768,
1816		.priority = 0,
1817		.fixed_size = true,
1818		.bonus_ways = 0xfff,
1819		.cache_mode = 0,
1820		.activate_on_init = true,
1821	}, {
1822		.usecase_id = LLCC_NPU,
1823		.slice_id = 23,
1824		.max_cap = 768,
1825		.priority = 1,
1826		.bonus_ways = 0xfff,
1827		.cache_mode = 0,
1828		.activate_on_init = true,
1829	}, {
1830		.usecase_id = LLCC_MODPE,
1831		.slice_id = 29,
1832		.max_cap = 64,
1833		.priority = 1,
1834		.fixed_size = true,
1835		.bonus_ways = 0xfff,
1836		.cache_mode = 0,
1837		.activate_on_init = true,
1838	},
1839};
1840
1841static const struct llcc_slice_config sm7150_data[] =  {
1842	{
1843		.usecase_id = LLCC_CPUSS,
1844		.slice_id = 1,
1845		.max_cap = 512,
1846		.priority = 1,
1847		.bonus_ways = 0xf,
1848		.cache_mode = 0,
1849		.retain_on_pc = true,
1850		.activate_on_init = true,
1851	}, {
1852		.usecase_id = LLCC_MDM,
1853		.slice_id = 8,
1854		.max_cap = 128,
1855		.priority = 2,
1856		.bonus_ways = 0xf,
1857		.cache_mode = 0,
1858		.retain_on_pc = true,
1859	}, {
1860		.usecase_id = LLCC_GPUHTW,
1861		.slice_id = 11,
1862		.max_cap = 256,
1863		.priority = 1,
1864		.fixed_size = true,
1865		.bonus_ways = 0xf,
1866		.cache_mode = 0,
1867		.retain_on_pc = true,
1868	}, {
1869		.usecase_id = LLCC_GPU,
1870		.slice_id = 12,
1871		.max_cap = 256,
1872		.priority = 1,
1873		.fixed_size = true,
1874		.bonus_ways = 0xf,
1875		.cache_mode = 0,
1876		.retain_on_pc = true,
1877	}, {
1878		.usecase_id = LLCC_NPU,
1879		.slice_id = 23,
1880		.max_cap = 512,
1881		.priority = 1,
1882		.bonus_ways = 0xf,
1883		.cache_mode = 0,
1884		.retain_on_pc = true,
1885	},
1886};
1887
1888static const struct llcc_slice_config sm8150_data[] =  {
1889	{
1890		.usecase_id = LLCC_CPUSS,
1891		.slice_id = 1,
1892		.max_cap = 3072,
1893		.priority = 1,
1894		.fixed_size = true,
1895		.bonus_ways = 0xfff,
1896		.cache_mode = 0,
1897		.retain_on_pc = true,
1898		.activate_on_init = true,
1899	}, {
1900		.usecase_id = LLCC_VIDSC0,
1901		.slice_id = 2,
1902		.max_cap = 512,
1903		.priority = 2,
1904		.fixed_size = true,
1905		.bonus_ways = 0xfff,
1906		.cache_mode = 0,
1907		.retain_on_pc = true,
1908	}, {
1909		.usecase_id = LLCC_VIDSC1,
1910		.slice_id = 3,
1911		.max_cap = 512,
1912		.priority = 2,
1913		.fixed_size = true,
1914		.bonus_ways = 0xfff,
1915		.cache_mode = 0,
1916		.retain_on_pc = true,
1917	}, {
1918		.usecase_id = LLCC_AUDIO,
1919		.slice_id = 6,
1920		.max_cap = 1024,
1921		.priority = 1,
1922		.fixed_size = true,
1923		.bonus_ways = 0xfff,
1924		.cache_mode = 0,
1925		.retain_on_pc = true,
1926	}, {
1927		.usecase_id = LLCC_MDMHPGRW,
1928		.slice_id = 7,
1929		.max_cap = 3072,
1930		.priority = 1,
1931		.bonus_ways = 0xff,
1932		.res_ways = 0xf00,
1933		.cache_mode = 0,
1934		.retain_on_pc = true,
1935	}, {
1936		.usecase_id = LLCC_MDM,
1937		.slice_id = 8,
1938		.max_cap = 3072,
1939		.priority = 1,
1940		.fixed_size = true,
1941		.bonus_ways = 0xfff,
1942		.cache_mode = 0,
1943		.retain_on_pc = true,
1944	}, {
1945		.usecase_id = LLCC_MODHW,
1946		.slice_id = 9,
1947		.max_cap = 1024,
1948		.priority = 1,
1949		.fixed_size = true,
1950		.bonus_ways = 0xfff,
1951		.cache_mode = 0,
1952		.retain_on_pc = true,
1953	}, {
1954		.usecase_id = LLCC_CMPT,
1955		.slice_id = 10,
1956		.max_cap = 3072,
1957		.priority = 1,
1958		.fixed_size = true,
1959		.bonus_ways = 0xfff,
1960		.cache_mode = 0,
1961		.retain_on_pc = true,
1962	}, {
1963		.usecase_id = LLCC_GPUHTW,
1964		.slice_id = 11,
1965		.max_cap = 512,
1966		.priority = 1,
1967		.fixed_size = true,
1968		.bonus_ways = 0xfff,
1969		.cache_mode = 0,
1970		.retain_on_pc = true,
1971	}, {
1972		.usecase_id = LLCC_GPU,
1973		.slice_id = 12,
1974		.max_cap = 2560,
1975		.priority = 1,
1976		.fixed_size = true,
1977		.bonus_ways = 0xfff,
1978		.cache_mode = 0,
1979		.retain_on_pc = true,
1980	}, {
1981		.usecase_id = LLCC_MMUHWT,
1982		.slice_id = 13,
1983		.max_cap = 1024,
1984		.priority = 1,
1985		.fixed_size = true,
1986		.bonus_ways = 0xfff,
1987		.cache_mode = 0,
1988		.activate_on_init = true,
1989	}, {
1990		.usecase_id = LLCC_CMPTDMA,
1991		.slice_id = 15,
1992		.max_cap = 3072,
1993		.priority = 1,
1994		.fixed_size = true,
1995		.bonus_ways = 0xfff,
1996		.cache_mode = 0,
1997		.retain_on_pc = true,
1998	}, {
1999		.usecase_id = LLCC_DISP,
2000		.slice_id = 16,
2001		.max_cap = 3072,
2002		.priority = 1,
2003		.fixed_size = true,
2004		.bonus_ways = 0xfff,
2005		.cache_mode = 0,
2006		.retain_on_pc = true,
2007	}, {
2008		.usecase_id = LLCC_MDMHPFX,
2009		.slice_id = 20,
2010		.max_cap = 1024,
2011		.priority = 2,
2012		.fixed_size = true,
2013		.bonus_ways = 0xfff,
2014		.cache_mode = 0,
2015		.retain_on_pc = true,
2016	}, {
2017		.usecase_id = LLCC_MDMHPFX,
2018		.slice_id = 21,
2019		.max_cap = 1024,
2020		.priority = 0,
2021		.fixed_size = true,
2022		.bonus_ways = 0xf,
2023		.cache_mode = 0,
2024		.retain_on_pc = true,
2025	}, {
2026		.usecase_id = LLCC_AUDHW,
2027		.slice_id = 22,
2028		.max_cap = 1024,
2029		.priority = 1,
2030		.fixed_size = true,
2031		.bonus_ways = 0xfff,
2032		.cache_mode = 0,
2033		.retain_on_pc = true,
2034	}, {
2035		.usecase_id = LLCC_NPU,
2036		.slice_id = 23,
2037		.max_cap = 3072,
2038		.priority = 1,
2039		.fixed_size = true,
2040		.bonus_ways = 0xfff,
2041		.cache_mode = 0,
2042		.retain_on_pc = true,
2043	}, {
2044		.usecase_id = LLCC_WLHW,
2045		.slice_id = 24,
2046		.max_cap = 3072,
2047		.priority = 1,
2048		.fixed_size = true,
2049		.bonus_ways = 0xfff,
2050		.cache_mode = 0,
2051		.retain_on_pc = true,
2052	}, {
2053		.usecase_id = LLCC_MODPE,
2054		.slice_id = 29,
2055		.max_cap = 256,
2056		.priority = 1,
2057		.fixed_size = true,
2058		.bonus_ways = 0xf,
2059		.cache_mode = 0,
2060		.retain_on_pc = true,
2061	}, {
2062		.usecase_id = LLCC_APTCM,
2063		.slice_id = 30,
2064		.max_cap = 256,
2065		.priority = 3,
2066		.fixed_size = true,
2067		.res_ways = 0x1,
2068		.cache_mode = 1,
2069		.retain_on_pc = true,
2070	}, {
2071		.usecase_id = LLCC_WRCACHE,
2072		.slice_id = 31,
2073		.max_cap = 128,
2074		.priority = 1,
2075		.fixed_size = true,
2076		.bonus_ways = 0xfff,
2077		.cache_mode = 0,
2078	},
2079};
2080
2081static const struct llcc_slice_config sm8250_data[] =  {
2082	{
2083		.usecase_id = LLCC_CPUSS,
2084		.slice_id = 1,
2085		.max_cap = 3072,
2086		.priority = 1,
2087		.fixed_size = true,
2088		.bonus_ways = 0xfff,
2089		.cache_mode = 0,
2090		.retain_on_pc = true,
2091		.activate_on_init = true,
2092	}, {
2093		.usecase_id = LLCC_VIDSC0,
2094		.slice_id = 2,
2095		.max_cap = 512,
2096		.priority = 3,
2097		.fixed_size = true,
2098		.bonus_ways = 0xfff,
2099		.cache_mode = 0,
2100		.retain_on_pc = true,
2101	}, {
2102		.usecase_id = LLCC_AUDIO,
2103		.slice_id = 6,
2104		.max_cap = 1024,
2105		.priority = 1,
2106		.bonus_ways = 0xfff,
2107		.cache_mode = 0,
2108	}, {
2109		.usecase_id = LLCC_CMPT,
2110		.slice_id = 10,
2111		.max_cap = 1024,
2112		.priority = 1,
2113		.bonus_ways = 0xfff,
2114		.cache_mode = 0,
2115	}, {
2116		.usecase_id = LLCC_GPUHTW,
2117		.slice_id = 11,
2118		.max_cap = 1024,
2119		.priority = 1,
2120		.fixed_size = true,
2121		.bonus_ways = 0xfff,
2122		.cache_mode = 0,
2123		.retain_on_pc = true,
2124	}, {
2125		.usecase_id = LLCC_GPU,
2126		.slice_id = 12,
2127		.max_cap = 1024,
2128		.priority = 1,
2129		.bonus_ways = 0xfff,
2130		.cache_mode = 0,
2131		.retain_on_pc = true,
2132		.write_scid_en = true,
2133	}, {
2134		.usecase_id = LLCC_MMUHWT,
2135		.slice_id = 13,
2136		.max_cap = 1024,
2137		.priority = 1,
2138		.fixed_size = true,
2139		.bonus_ways = 0xfff,
2140		.cache_mode = 0,
2141		.activate_on_init = true,
2142	}, {
2143		.usecase_id = LLCC_CMPTDMA,
2144		.slice_id = 15,
2145		.max_cap = 1024,
2146		.priority = 1,
2147		.bonus_ways = 0xfff,
2148		.cache_mode = 0,
2149		.retain_on_pc = true,
2150	}, {
2151		.usecase_id = LLCC_DISP,
2152		.slice_id = 16,
2153		.max_cap = 3072,
2154		.priority = 1,
2155		.fixed_size = true,
2156		.bonus_ways = 0xfff,
2157		.cache_mode = 0,
2158		.retain_on_pc = true,
2159	}, {
2160		.usecase_id = LLCC_VIDFW,
2161		.slice_id = 17,
2162		.max_cap = 512,
2163		.priority = 1,
2164		.bonus_ways = 0xfff,
2165		.cache_mode = 0,
2166		.retain_on_pc = true,
2167	}, {
2168		.usecase_id = LLCC_AUDHW,
2169		.slice_id = 22,
2170		.max_cap = 1024,
2171		.priority = 1,
2172		.fixed_size = true,
2173		.bonus_ways = 0xfff,
2174		.cache_mode = 0,
2175		.retain_on_pc = true,
2176	}, {
2177		.usecase_id = LLCC_NPU,
2178		.slice_id = 23,
2179		.max_cap = 3072,
2180		.priority = 1,
2181		.fixed_size = true,
2182		.bonus_ways = 0xfff,
2183		.cache_mode = 0,
2184		.retain_on_pc = true,
2185	}, {
2186		.usecase_id = LLCC_WLHW,
2187		.slice_id = 24,
2188		.max_cap = 1024,
2189		.priority = 1,
2190		.bonus_ways = 0xfff,
2191		.cache_mode = 0,
2192		.retain_on_pc = true,
2193	}, {
2194		.usecase_id = LLCC_CVP,
2195		.slice_id = 28,
2196		.max_cap = 256,
2197		.priority = 3,
2198		.fixed_size = true,
2199		.bonus_ways = 0xfff,
2200		.cache_mode = 0,
2201		.retain_on_pc = true,
2202	}, {
2203		.usecase_id = LLCC_APTCM,
2204		.slice_id = 30,
2205		.max_cap = 128,
2206		.priority = 3,
2207		.res_ways = 0x3,
2208		.cache_mode = 1,
2209		.retain_on_pc = true,
2210	}, {
2211		.usecase_id = LLCC_WRCACHE,
2212		.slice_id = 31,
2213		.max_cap = 256,
2214		.priority = 1,
2215		.fixed_size = true,
2216		.bonus_ways = 0xfff,
2217		.cache_mode = 0,
2218		.activate_on_init = true,
2219	},
2220};
2221
2222static const struct llcc_slice_config sm8350_data[] =  {
2223	{
2224		.usecase_id = LLCC_CPUSS,
2225		.slice_id = 1,
2226		.max_cap = 3072,
2227		.priority = 1,
2228		.fixed_size = true,
2229		.bonus_ways = 0xfff,
2230		.cache_mode = 0,
2231		.activate_on_init = true,
2232		.write_scid_en = true,
2233	}, {
2234		.usecase_id = LLCC_VIDSC0,
2235		.slice_id = 2,
2236		.max_cap = 512,
2237		.priority = 3,
2238		.fixed_size = true,
2239		.bonus_ways = 0xfff,
2240		.cache_mode = 0,
2241		.activate_on_init = true,
2242	}, {
2243		.usecase_id = LLCC_AUDIO,
2244		.slice_id = 6,
2245		.max_cap = 1024,
2246		.priority = 1,
2247		.fixed_size = true,
2248		.bonus_ways = 0xfff,
2249		.cache_mode = 0,
2250	}, {
2251		.usecase_id = LLCC_MDMHPGRW,
2252		.slice_id = 7,
2253		.max_cap = 1024,
2254		.priority = 3,
2255		.bonus_ways = 0xfff,
2256		.cache_mode = 0,
2257		.activate_on_init = true,
2258	}, {
2259		.usecase_id = LLCC_MODHW,
2260		.slice_id = 9,
2261		.max_cap = 1024,
2262		.priority = 1,
2263		.fixed_size = true,
2264		.bonus_ways = 0xfff,
2265		.cache_mode = 0,
2266		.activate_on_init = true,
2267	}, {
2268		.usecase_id = LLCC_CMPT,
2269		.slice_id = 10,
2270		.max_cap = 3072,
2271		.priority = 1,
2272		.fixed_size = true,
2273		.bonus_ways = 0xfff,
2274		.cache_mode = 0,
2275		.activate_on_init = true,
2276	}, {
2277		.usecase_id = LLCC_GPUHTW,
2278		.slice_id = 11,
2279		.max_cap = 1024,
2280		.priority = 1,
2281		.fixed_size = true,
2282		.bonus_ways = 0xfff,
2283		.cache_mode = 0,
2284		.activate_on_init = true,
2285	}, {
2286		.usecase_id = LLCC_GPU,
2287		.slice_id = 12,
2288		.max_cap = 1024,
2289		.priority = 1,
2290		.bonus_ways = 0xfff,
2291		.cache_mode = 0,
2292		.retain_on_pc = true,
2293		.activate_on_init = true,
2294	}, {
2295		.usecase_id = LLCC_MMUHWT,
2296		.slice_id = 13,
2297		.max_cap = 1024,
2298		.priority = 1,
2299		.fixed_size = true,
2300		.bonus_ways = 0xfff,
2301		.cache_mode = 0,
2302		.write_scid_en = true,
2303	}, {
2304		.usecase_id = LLCC_DISP,
2305		.slice_id = 16,
2306		.max_cap = 3072,
2307		.priority = 2,
2308		.fixed_size = true,
2309		.bonus_ways = 0xfff,
2310		.cache_mode = 0,
2311		.activate_on_init = true,
2312	}, {
2313		.usecase_id = LLCC_MDMPNG,
2314		.slice_id = 21,
2315		.max_cap = 1024,
2316		.priority = 0,
2317		.fixed_size = true,
2318		.bonus_ways = 0xf,
2319		.cache_mode = 0,
2320		.activate_on_init = true,
2321	}, {
2322		.usecase_id = LLCC_AUDHW,
2323		.slice_id = 22,
2324		.max_cap = 1024,
2325		.priority = 1,
2326		.fixed_size = true,
2327		.bonus_ways = 0xfff,
2328		.cache_mode = 0,
2329		.activate_on_init = true,
2330	}, {
2331		.usecase_id = LLCC_CVP,
2332		.slice_id = 28,
2333		.max_cap = 512,
2334		.priority = 3,
2335		.fixed_size = true,
2336		.bonus_ways = 0xfff,
2337		.cache_mode = 0,
2338		.activate_on_init = true,
2339	}, {
2340		.usecase_id = LLCC_MODPE,
2341		.slice_id = 29,
2342		.max_cap = 256,
2343		.priority = 1,
2344		.fixed_size = true,
2345		.bonus_ways = 0xf,
2346		.cache_mode = 0,
2347		.activate_on_init = true,
2348	}, {
2349		.usecase_id = LLCC_APTCM,
2350		.slice_id = 30,
2351		.max_cap = 1024,
2352		.priority = 3,
2353		.fixed_size = true,
2354		.res_ways = 0x1,
2355		.cache_mode = 1,
2356		.activate_on_init = true,
2357	}, {
2358		.usecase_id = LLCC_WRCACHE,
2359		.slice_id = 31,
2360		.max_cap = 512,
2361		.priority = 1,
2362		.fixed_size = true,
2363		.bonus_ways = 0xfff,
2364		.cache_mode = 0,
2365		.write_scid_en = true,
2366	}, {
2367		.usecase_id = LLCC_CVPFW,
2368		.slice_id = 17,
2369		.max_cap = 512,
2370		.priority = 1,
2371		.bonus_ways = 0xfff,
2372		.cache_mode = 0,
2373		.activate_on_init = true,
2374	}, {
2375		.usecase_id = LLCC_CPUSS1,
2376		.slice_id = 3,
2377		.max_cap = 1024,
2378		.priority = 1,
2379		.fixed_size = true,
2380		.bonus_ways = 0xfff,
2381		.cache_mode = 0,
2382		.activate_on_init = true,
2383	}, {
2384		.usecase_id = LLCC_CPUHWT,
2385		.slice_id = 5,
2386		.max_cap = 512,
2387		.priority = 1,
2388		.fixed_size = true,
2389		.bonus_ways = 0xfff,
2390		.cache_mode = 0,
2391		.write_scid_en = true,
2392	},
2393};
2394
2395static const struct llcc_slice_config sm8450_data[] =  {
2396	{
2397		.usecase_id = LLCC_CPUSS,
2398		.slice_id = 1,
2399		.max_cap = 3072,
2400		.priority = 1,
2401		.bonus_ways = 0xffff,
2402		.cache_mode = 0,
2403		.retain_on_pc = true,
2404		.activate_on_init = true,
2405	}, {
2406		.usecase_id = LLCC_VIDSC0,
2407		.slice_id = 2,
2408		.max_cap = 512,
2409		.priority = 3,
2410		.fixed_size = true,
2411		.bonus_ways = 0xffff,
2412		.cache_mode = 0,
2413		.retain_on_pc = true,
2414	}, {
2415		.usecase_id = LLCC_AUDIO,
2416		.slice_id = 6,
2417		.max_cap = 1024,
2418		.priority = 1,
2419		.fixed_size = true,
2420		.bonus_ways = 0xffff,
2421		.cache_mode = 0,
2422	}, {
2423		.usecase_id = LLCC_MDMHPGRW,
2424		.slice_id = 7,
2425		.max_cap = 1024,
2426		.priority = 3,
2427		.bonus_ways = 0xffff,
2428		.cache_mode = 0,
2429		.retain_on_pc = true,
2430	}, {
2431		.usecase_id = LLCC_MODHW,
2432		.slice_id = 9,
2433		.max_cap = 1024,
2434		.priority = 1,
2435		.fixed_size = true,
2436		.bonus_ways = 0xffff,
2437		.cache_mode = 0,
2438		.retain_on_pc = true,
2439	}, {
2440		.usecase_id = LLCC_CMPT,
2441		.slice_id = 10,
2442		.max_cap = 4096,
2443		.priority = 1,
2444		.fixed_size = true,
2445		.bonus_ways = 0xffff,
2446		.cache_mode = 0,
2447		.retain_on_pc = true,
2448	}, {
2449		.usecase_id = LLCC_GPUHTW,
2450		.slice_id = 11,
2451		.max_cap = 512,
2452		.priority = 1,
2453		.fixed_size = true,
2454		.bonus_ways = 0xffff,
2455		.cache_mode = 0,
2456		.retain_on_pc = true,
2457	}, {
2458		.usecase_id = LLCC_GPU,
2459		.slice_id = 12,
2460		.max_cap = 2048,
2461		.priority = 1,
2462		.fixed_size = true,
2463		.bonus_ways = 0xffff,
2464		.cache_mode = 0,
2465		.retain_on_pc = true,
2466		.write_scid_en = true,
2467	}, {
2468		.usecase_id = LLCC_MMUHWT,
2469		.slice_id = 13,
2470		.max_cap = 768,
2471		.priority = 1,
2472		.fixed_size = true,
2473		.bonus_ways = 0xffff,
2474		.cache_mode = 0,
2475		.activate_on_init = true,
2476	}, {
2477		.usecase_id = LLCC_DISP,
2478		.slice_id = 16,
2479		.max_cap = 4096,
2480		.priority = 2,
2481		.fixed_size = true,
2482		.bonus_ways = 0xffff,
2483		.cache_mode = 0,
2484		.retain_on_pc = true,
2485	}, {
2486		.usecase_id = LLCC_MDMPNG,
2487		.slice_id = 21,
2488		.max_cap = 1024,
2489		.priority = 1,
2490		.fixed_size = true,
2491		.bonus_ways = 0xf000,
2492		.cache_mode = 0,
2493		.retain_on_pc = true,
2494	}, {
2495		.usecase_id = LLCC_AUDHW,
2496		.slice_id = 22,
2497		.max_cap = 1024,
2498		.priority = 1,
2499		.fixed_size = true,
2500		.bonus_ways = 0xffff,
2501		.cache_mode = 0,
2502	}, {
2503		.usecase_id = LLCC_CVP,
2504		.slice_id = 28,
2505		.max_cap = 256,
2506		.priority = 3,
2507		.fixed_size = true,
2508		.bonus_ways = 0xffff,
2509		.cache_mode = 0,
2510		.retain_on_pc = true,
2511	}, {
2512		.usecase_id = LLCC_MODPE,
2513		.slice_id = 29,
2514		.max_cap = 64,
2515		.priority = 1,
2516		.fixed_size = true,
2517		.bonus_ways = 0xf000,
2518		.cache_mode = 0,
2519		.retain_on_pc = true,
2520	}, {
2521		.usecase_id = LLCC_APTCM,
2522		.slice_id = 30,
2523		.max_cap = 1024,
2524		.priority = 3,
2525		.fixed_size = true,
2526		.res_ways = 0xf0,
2527		.cache_mode = 1,
2528		.retain_on_pc = true,
2529	}, {
2530		.usecase_id = LLCC_WRCACHE,
2531		.slice_id = 31,
2532		.max_cap = 512,
2533		.priority = 1,
2534		.fixed_size = true,
2535		.bonus_ways = 0xffff,
2536		.cache_mode = 0,
2537		.activate_on_init = true,
2538	}, {
2539		.usecase_id = LLCC_CVPFW,
2540		.slice_id = 17,
2541		.max_cap = 512,
2542		.priority = 1,
2543		.fixed_size = true,
2544		.bonus_ways = 0xffff,
2545		.cache_mode = 0,
2546		.retain_on_pc = true,
2547	}, {
2548		.usecase_id = LLCC_CPUSS1,
2549		.slice_id = 3,
2550		.max_cap = 1024,
2551		.priority = 1,
2552		.fixed_size = true,
2553		.bonus_ways = 0xffff,
2554		.cache_mode = 0,
2555		.retain_on_pc = true,
2556	}, {
2557		.usecase_id = LLCC_CAMEXP0,
2558		.slice_id = 4,
2559		.max_cap = 256,
2560		.priority = 3,
2561		.fixed_size = true,
2562		.bonus_ways = 0xffff,
2563		.cache_mode = 0,
2564		.retain_on_pc = true,
2565	}, {
2566		.usecase_id = LLCC_CPUMTE,
2567		.slice_id = 23,
2568		.max_cap = 256,
2569		.priority = 1,
2570		.fixed_size = true,
2571		.bonus_ways = 0xfff,
2572		.cache_mode = 0,
2573		.activate_on_init = true,
2574	}, {
2575		.usecase_id = LLCC_CPUHWT,
2576		.slice_id = 5,
2577		.max_cap = 512,
2578		.priority = 1,
2579		.fixed_size = true,
2580		.bonus_ways = 0xffff,
2581		.cache_mode = 0,
2582		.retain_on_pc = true,
2583		.activate_on_init = true,
2584	}, {
2585		.usecase_id = LLCC_CAMEXP1,
2586		.slice_id = 27,
2587		.max_cap = 256,
2588		.priority = 3,
2589		.fixed_size = true,
2590		.bonus_ways = 0xffff,
2591		.cache_mode = 0,
2592		.retain_on_pc = true,
2593	}, {
2594		.usecase_id = LLCC_AENPU,
2595		.slice_id = 8,
2596		.max_cap = 2048,
2597		.priority = 1,
2598		.fixed_size = true,
2599		.bonus_ways = 0xffff,
2600		.cache_mode = 0,
2601	},
2602};
2603
2604static const struct llcc_slice_config sm8550_data[] =  {
2605	{
2606		.usecase_id = LLCC_CPUSS,
2607		.slice_id = 1,
2608		.max_cap = 5120,
2609		.priority = 1,
2610		.bonus_ways = 0xffffff,
2611		.cache_mode = 0,
2612		.activate_on_init = true,
2613		.write_scid_en = true,
2614	}, {
2615		.usecase_id = LLCC_VIDSC0,
2616		.slice_id = 2,
2617		.max_cap = 512,
2618		.priority = 4,
2619		.fixed_size = true,
2620		.bonus_ways = 0xffffff,
2621		.cache_mode = 0,
2622	}, {
2623		.usecase_id = LLCC_AUDIO,
2624		.slice_id = 6,
2625		.max_cap = 1024,
2626		.priority = 1,
2627		.fixed_size = true,
2628		.bonus_ways = 0xffffff,
2629		.cache_mode = 0,
2630	}, {
2631		.usecase_id = LLCC_MDMHPGRW,
2632		.slice_id = 25,
2633		.max_cap = 1024,
2634		.priority = 4,
2635		.bonus_ways = 0xffffff,
2636		.cache_mode = 0,
2637	}, {
2638		.usecase_id = LLCC_MODHW,
2639		.slice_id = 26,
2640		.max_cap = 1024,
2641		.priority = 1,
2642		.fixed_size = true,
2643		.bonus_ways = 0xffffff,
2644		.cache_mode = 0,
2645	}, {
2646		.usecase_id = LLCC_CMPT,
2647		.slice_id = 10,
2648		.max_cap = 4096,
2649		.priority = 1,
2650		.fixed_size = true,
2651		.bonus_ways = 0xffffff,
2652		.cache_mode = 0,
2653	}, {
2654		.usecase_id = LLCC_GPUHTW,
2655		.slice_id = 11,
2656		.max_cap = 512,
2657		.priority = 1,
2658		.fixed_size = true,
2659		.bonus_ways = 0xffffff,
2660		.cache_mode = 0,
2661	}, {
2662		.usecase_id = LLCC_GPU,
2663		.slice_id = 9,
2664		.max_cap = 3096,
2665		.priority = 1,
2666		.bonus_ways = 0xffffff,
2667		.cache_mode = 0,
2668		.write_scid_en = true,
2669		.write_scid_cacheable_en = true,
2670	}, {
2671		.usecase_id = LLCC_MMUHWT,
2672		.slice_id = 18,
2673		.max_cap = 768,
2674		.priority = 1,
2675		.fixed_size = true,
2676		.bonus_ways = 0xffffff,
2677		.cache_mode = 0,
2678		.activate_on_init = true,
2679	}, {
2680		.usecase_id = LLCC_DISP,
2681		.slice_id = 16,
2682		.max_cap = 6144,
2683		.priority = 1,
2684		.fixed_size = true,
2685		.bonus_ways = 0xffffff,
2686		.cache_mode = 2,
2687	}, {
2688		.usecase_id = LLCC_MDMPNG,
2689		.slice_id = 27,
2690		.max_cap = 1024,
2691		.priority = 0,
2692		.fixed_size = true,
2693		.bonus_ways = 0xf00000,
2694		.cache_mode = 0,
2695	}, {
2696		.usecase_id = LLCC_AUDHW,
2697		.slice_id = 22,
2698		.max_cap = 1024,
2699		.priority = 1,
2700		.fixed_size = true,
2701		.bonus_ways = 0xffffff,
2702		.cache_mode = 0,
2703	}, {
2704		.usecase_id = LLCC_CVP,
2705		.slice_id = 8,
2706		.max_cap = 256,
2707		.priority = 4,
2708		.fixed_size = true,
2709		.bonus_ways = 0xffffff,
2710		.cache_mode = 0,
2711	}, {
2712		.usecase_id = LLCC_MODPE,
2713		.slice_id = 29,
2714		.max_cap = 64,
2715		.priority = 1,
2716		.fixed_size = true,
2717		.bonus_ways = 0xf00000,
2718		.cache_mode = 0,
2719		.alloc_oneway_en = true,
2720		.vict_prio = true,
2721	}, {
2722		.usecase_id = LLCC_WRCACHE,
2723		.slice_id = 31,
2724		.max_cap = 512,
2725		.priority = 1,
2726		.fixed_size = true,
2727		.bonus_ways = 0xffffff,
2728		.cache_mode = 0,
2729		.activate_on_init = true,
2730	}, {
2731		.usecase_id = LLCC_CAMEXP0,
2732		.slice_id = 4,
2733		.max_cap = 256,
2734		.priority = 4,
2735		.fixed_size = true,
2736		.bonus_ways = 0xf,
2737		.cache_mode = 0,
2738	}, {
2739		.usecase_id = LLCC_CPUHWT,
2740		.slice_id = 5,
2741		.max_cap = 512,
2742		.priority = 1,
2743		.fixed_size = true,
2744		.bonus_ways = 0xffffff,
2745		.cache_mode = 0,
2746		.activate_on_init = true,
2747	}, {
2748		.usecase_id = LLCC_CAMEXP1,
2749		.slice_id = 7,
2750		.max_cap = 3200,
2751		.priority = 3,
2752		.fixed_size = true,
2753		.bonus_ways = 0xfffff0,
2754		.cache_mode = 2,
2755	}, {
2756		.usecase_id = LLCC_CMPTHCP,
2757		.slice_id = 17,
2758		.max_cap = 256,
2759		.priority = 4,
2760		.fixed_size = true,
2761		.bonus_ways = 0xffffff,
2762		.cache_mode = 0,
2763	}, {
2764		.usecase_id = LLCC_LCPDARE,
2765		.slice_id = 30,
2766		.max_cap = 128,
2767		.priority = 4,
2768		.fixed_size = true,
2769		.bonus_ways = 0xffffff,
2770		.cache_mode = 0,
2771		.activate_on_init = true,
2772		.alloc_oneway_en = true,
2773		.vict_prio = true,
2774	}, {
2775		.usecase_id = LLCC_AENPU,
2776		.slice_id = 3,
2777		.max_cap = 3072,
2778		.priority = 1,
2779		.fixed_size = true,
2780		.bonus_ways = 0xfe01ff,
2781		.cache_mode = 2,
2782	}, {
2783		.usecase_id = LLCC_ISLAND1,
2784		.slice_id = 12,
2785		.max_cap = 1792,
2786		.priority = 7,
2787		.fixed_size = true,
2788		.bonus_ways = 0xfe00,
2789		.cache_mode = 0,
2790	}, {
2791		.usecase_id = LLCC_ISLAND4,
2792		.slice_id = 15,
2793		.max_cap = 256,
2794		.priority = 7,
2795		.fixed_size = true,
2796		.bonus_ways = 0x10000,
2797		.cache_mode = 0,
2798	}, {
2799		.usecase_id = LLCC_CAMEXP2,
2800		.slice_id = 19,
2801		.max_cap = 3200,
2802		.priority = 3,
2803		.fixed_size = true,
2804		.bonus_ways = 0xfffff0,
2805		.cache_mode = 2,
2806	}, {
2807		.usecase_id = LLCC_CAMEXP3,
2808		.slice_id = 20,
2809		.max_cap = 3200,
2810		.priority = 2,
2811		.fixed_size = true,
2812		.bonus_ways = 0xfffff0,
2813		.cache_mode = 2,
2814	}, {
2815		.usecase_id = LLCC_CAMEXP4,
2816		.slice_id = 21,
2817		.max_cap = 3200,
2818		.priority = 2,
2819		.fixed_size = true,
2820		.bonus_ways = 0xfffff0,
2821		.cache_mode = 2,
2822	}, {
2823		.usecase_id = LLCC_DISP_WB,
2824		.slice_id = 23,
2825		.max_cap = 1024,
2826		.priority = 4,
2827		.fixed_size = true,
2828		.bonus_ways = 0xffffff,
2829		.cache_mode = 0,
2830	}, {
2831		.usecase_id = LLCC_DISP_1,
2832		.slice_id = 24,
2833		.max_cap = 6144,
2834		.priority = 1,
2835		.fixed_size = true,
2836		.bonus_ways = 0xffffff,
2837		.cache_mode = 2,
2838	}, {
2839		.usecase_id = LLCC_VIDVSP,
2840		.slice_id = 28,
2841		.max_cap = 256,
2842		.priority = 4,
2843		.fixed_size = true,
2844		.bonus_ways = 0xffffff,
2845		.cache_mode = 0,
2846	},
2847};
2848
2849static const struct llcc_slice_config sm8650_data[] = {
2850	{
2851		.usecase_id = LLCC_CPUSS,
2852		.slice_id = 1,
2853		.max_cap = 5120,
2854		.priority = 1,
2855		.bonus_ways = 0xffffff,
2856		.cache_mode = 0,
2857		.activate_on_init = true,
2858		.stale_en = true,
2859	}, {
2860		.usecase_id = LLCC_VIDSC0,
2861		.slice_id = 2,
2862		.max_cap = 512,
2863		.priority = 3,
2864		.fixed_size = true,
2865		.bonus_ways = 0xffffff,
2866		.cache_mode = 0,
2867	}, {
2868		.usecase_id = LLCC_AUDIO,
2869		.slice_id = 6,
2870		.max_cap = 512,
2871		.priority = 1,
2872		.fixed_size = true,
2873		.bonus_ways = 0xffffff,
2874		.cache_mode = 0,
2875	}, {
2876		.usecase_id = LLCC_MDMHPGRW,
2877		.slice_id = 25,
2878		.max_cap = 1024,
2879		.priority = 3,
2880		.bonus_ways = 0xffffff,
2881		.cache_mode = 0,
2882	}, {
2883		.usecase_id = LLCC_MODHW,
2884		.slice_id = 26,
2885		.max_cap = 1024,
2886		.priority = 1,
2887		.fixed_size = true,
2888		.bonus_ways = 0xffffff,
2889		.cache_mode = 0,
2890	}, {
2891		.usecase_id = LLCC_CMPT,
2892		.slice_id = 10,
2893		.max_cap = 4096,
2894		.priority = 1,
2895		.fixed_size = true,
2896		.bonus_ways = 0xffffff,
2897		.cache_mode = 0,
2898	}, {
2899		.usecase_id = LLCC_GPUHTW,
2900		.slice_id = 11,
2901		.max_cap = 512,
2902		.priority = 1,
2903		.fixed_size = true,
2904		.bonus_ways = 0xffffff,
2905		.cache_mode = 0,
2906	}, {
2907		.usecase_id = LLCC_GPU,
2908		.slice_id = 9,
2909		.max_cap = 3096,
2910		.priority = 1,
2911		.bonus_ways = 0xffffff,
2912		.cache_mode = 0,
2913		.write_scid_en = true,
2914		.write_scid_cacheable_en = true,
2915	}, {
2916		.usecase_id = LLCC_MMUHWT,
2917		.slice_id = 18,
2918		.max_cap = 768,
2919		.priority = 1,
2920		.fixed_size = true,
2921		.bonus_ways = 0xffffff,
2922		.cache_mode = 0,
2923		.activate_on_init = true,
2924	}, {
2925		.usecase_id = LLCC_DISP,
2926		.slice_id = 16,
2927		.max_cap = 6144,
2928		.priority = 1,
2929		.fixed_size = true,
2930		.bonus_ways = 0xffffff,
2931		.cache_mode = 2,
2932	}, {
2933		.usecase_id = LLCC_MDMHPFX,
2934		.slice_id = 24,
2935		.max_cap = 1024,
2936		.priority = 3,
2937		.fixed_size = true,
2938		.bonus_ways = 0xffffff,
2939		.cache_mode = 0,
2940	}, {
2941		.usecase_id = LLCC_MDMPNG,
2942		.slice_id = 27,
2943		.max_cap = 1024,
2944		.priority = 0,
2945		.fixed_size = true,
2946		.cache_mode = 0,
2947	}, {
2948		.usecase_id = LLCC_AUDHW,
2949		.slice_id = 22,
2950		.max_cap = 1024,
2951		.priority = 1,
2952		.fixed_size = true,
2953		.bonus_ways = 0xffffff,
2954		.cache_mode = 0,
2955	}, {
2956		.usecase_id = LLCC_CVP,
2957		.slice_id = 8,
2958		.max_cap = 256,
2959		.priority = 3,
2960		.fixed_size = true,
2961		.bonus_ways = 0xffffff,
2962		.cache_mode = 0,
2963	}, {
2964		.usecase_id = LLCC_MODPE,
2965		.slice_id = 29,
2966		.max_cap = 128,
2967		.priority = 1,
2968		.fixed_size = true,
2969		.bonus_ways = 0xf00000,
2970		.cache_mode = 0,
2971		.alloc_oneway_en = true,
2972	}, {
2973		.usecase_id = LLCC_WRCACHE,
2974		.slice_id = 31,
2975		.max_cap = 512,
2976		.priority = 1,
2977		.fixed_size = true,
2978		.bonus_ways = 0xffffff,
2979		.cache_mode = 0,
2980		.activate_on_init = true,
2981	}, {
2982		.usecase_id = LLCC_CAMEXP0,
2983		.slice_id = 4,
2984		.max_cap = 256,
2985		.priority = 3,
2986		.fixed_size = true,
2987		.bonus_ways = 0xf,
2988		.cache_mode = 0,
2989	}, {
2990		.usecase_id = LLCC_CAMEXP1,
2991		.slice_id = 7,
2992		.max_cap = 3200,
2993		.priority = 3,
2994		.fixed_size = true,
2995		.bonus_ways = 0xfffff0,
2996		.cache_mode = 2,
2997	}, {
2998		.usecase_id = LLCC_CMPTHCP,
2999		.slice_id = 17,
3000		.max_cap = 256,
3001		.priority = 3,
3002		.fixed_size = true,
3003		.bonus_ways = 0xffffff,
3004		.cache_mode = 0,
3005	}, {
3006		.usecase_id = LLCC_LCPDARE,
3007		.slice_id = 30,
3008		.max_cap = 128,
3009		.priority = 3,
3010		.fixed_size = true,
3011		.bonus_ways = 0xffffff,
3012		.cache_mode = 0,
3013		.activate_on_init = true,
3014		.alloc_oneway_en = true,
3015	}, {
3016		.usecase_id = LLCC_AENPU,
3017		.slice_id = 3,
3018		.max_cap = 3072,
3019		.priority = 1,
3020		.fixed_size = true,
3021		.bonus_ways = 0xffffff,
3022		.cache_mode = 2,
3023	}, {
3024		.usecase_id = LLCC_ISLAND1,
3025		.slice_id = 12,
3026		.max_cap = 5888,
3027		.priority = 7,
3028		.fixed_size = true,
3029		.res_ways = 0x7fffff,
3030		.cache_mode = 0,
3031	}, {
3032		.usecase_id = LLCC_DISP_WB,
3033		.slice_id = 23,
3034		.max_cap = 1024,
3035		.priority = 3,
3036		.fixed_size = true,
3037		.bonus_ways = 0xffffff,
3038		.cache_mode = 0,
3039	}, {
3040		.usecase_id = LLCC_VIDVSP,
3041		.slice_id = 28,
3042		.max_cap = 256,
3043		.priority = 3,
3044		.fixed_size = true,
3045		.bonus_ways = 0xffffff,
3046		.cache_mode = 0,
3047	},
3048};
3049
3050static const struct llcc_slice_config sm8750_data[] = {
3051	{
3052		.usecase_id = LLCC_CPUSS,
3053		.slice_id = 1,
3054		.max_cap = 5120,
3055		.priority = 1,
3056		.bonus_ways = 0xffffffff,
3057		.activate_on_init = true,
3058		.write_scid_en = true,
3059	}, {
3060		.usecase_id = LLCC_MDMHPFX,
3061		.slice_id = 24,
3062		.max_cap = 1024,
3063		.priority = 5,
3064		.fixed_size = true,
3065		.bonus_ways = 0xffffffff,
3066	}, {
3067		.usecase_id = LLCC_VIDSC0,
3068		.slice_id = 2,
3069		.max_cap = 512,
3070		.priority = 4,
3071		.fixed_size = true,
3072		.bonus_ways = 0xffffffff,
3073	}, {
3074		.usecase_id = LLCC_AUDIO,
3075		.slice_id = 35,
3076		.max_cap = 512,
3077		.priority = 1,
3078		.fixed_size = true,
3079		.bonus_ways = 0xffffffff,
3080	}, {
3081		.usecase_id = LLCC_MDMHPGRW,
3082		.slice_id = 25,
3083		.max_cap = 1024,
3084		.priority = 5,
3085		.bonus_ways = 0xffffffff,
3086	}, {
3087		.usecase_id = LLCC_MODHW,
3088		.slice_id = 26,
3089		.max_cap = 1024,
3090		.priority = 1,
3091		.fixed_size = true,
3092		.bonus_ways = 0xffffffff,
3093	}, {
3094		.usecase_id = LLCC_CMPT,
3095		.slice_id = 34,
3096		.max_cap = 4096,
3097		.priority = 1,
3098		.fixed_size = true,
3099		.bonus_ways = 0xffffffff,
3100	}, {
3101		.usecase_id = LLCC_GPUHTW,
3102		.slice_id = 11,
3103		.max_cap = 512,
3104		.priority = 1,
3105		.fixed_size = true,
3106		.bonus_ways = 0xffffffff,
3107	}, {
3108		.usecase_id = LLCC_GPU,
3109		.slice_id = 9,
3110		.max_cap = 5632,
3111		.priority = 1,
3112		.fixed_size = true,
3113		.bonus_ways = 0xffffffff,
3114		.write_scid_en = true,
3115		.write_scid_cacheable_en = true
3116	}, {
3117		.usecase_id = LLCC_MMUHWT,
3118		.slice_id = 18,
3119		.max_cap = 768,
3120		.priority = 1,
3121		.fixed_size = true,
3122		.bonus_ways = 0xffffffff,
3123		.activate_on_init = true,
3124	}, {
3125		.usecase_id = LLCC_DISP,
3126		.slice_id = 16,
3127		.max_cap = 7168,
3128		.priority = 1,
3129		.fixed_size = true,
3130		.bonus_ways = 0xffffffff,
3131		.cache_mode = 2,
3132		.stale_en = true,
3133	}, {
3134		.usecase_id = LLCC_VIDFW,
3135		.slice_id = 17,
3136		.priority = 4,
3137		.fixed_size = true,
3138		.bonus_ways = 0xffffffff,
3139	}, {
3140		.usecase_id = LLCC_CAMFW,
3141		.slice_id = 20,
3142		.priority = 4,
3143		.fixed_size = true,
3144		.bonus_ways = 0xffffffff,
3145	}, {
3146		.usecase_id = LLCC_MDMPNG,
3147		.slice_id = 27,
3148		.max_cap = 256,
3149		.priority = 5,
3150		.fixed_size = true,
3151		.bonus_ways = 0xf0000000,
3152	}, {
3153		.usecase_id = LLCC_AUDHW,
3154		.slice_id = 22,
3155		.max_cap = 512,
3156		.priority = 1,
3157		.fixed_size = true,
3158		.bonus_ways = 0xffffffff,
3159	}, {
3160		.usecase_id = LLCC_CVP,
3161		.slice_id = 8,
3162		.max_cap = 800,
3163		.priority = 5,
3164		.fixed_size = true,
3165		.bonus_ways = 0xffffffff,
3166		.vict_prio = true,
3167	}, {
3168		.usecase_id = LLCC_MODPE,
3169		.slice_id = 29,
3170		.max_cap = 256,
3171		.priority = 1,
3172		.fixed_size = true,
3173		.bonus_ways = 0xf0000000,
3174		.alloc_oneway_en = true,
3175	}, {
3176		.usecase_id = LLCC_WRCACHE,
3177		.slice_id = 31,
3178		.max_cap = 512,
3179		.priority = 1,
3180		.fixed_size = true,
3181		.bonus_ways = 0xffffffff,
3182		.activate_on_init = true,
3183	}, {
3184		.usecase_id = LLCC_CVPFW,
3185		.slice_id = 19,
3186		.max_cap = 64,
3187		.priority = 4,
3188		.fixed_size = true,
3189		.bonus_ways = 0xffffffff,
3190	}, {
3191		.usecase_id = LLCC_CMPTHCP,
3192		.slice_id = 15,
3193		.max_cap = 256,
3194		.priority = 4,
3195		.fixed_size = true,
3196		.bonus_ways = 0xffffffff,
3197	}, {
3198		.usecase_id = LLCC_LCPDARE,
3199		.slice_id = 30,
3200		.max_cap = 128,
3201		.priority = 5,
3202		.fixed_size = true,
3203		.bonus_ways = 0xffffffff,
3204		.activate_on_init = true,
3205		.alloc_oneway_en = true,
3206	}, {
3207		.usecase_id = LLCC_AENPU,
3208		.slice_id = 3,
3209		.max_cap = 3072,
3210		.priority = 1,
3211		.fixed_size = true,
3212		.bonus_ways = 0xffffffff,
3213		.cache_mode = 2,
3214	}, {
3215		.usecase_id = LLCC_ISLAND1,
3216		.slice_id = 12,
3217		.max_cap = 7936,
3218		.priority = 7,
3219		.fixed_size = true,
3220		.bonus_ways = 0x7fffffff,
3221	}, {
3222		.usecase_id = LLCC_DISP_WB,
3223		.slice_id = 23,
3224		.max_cap = 512,
3225		.priority = 4,
3226		.fixed_size = true,
3227		.bonus_ways = 0xffffffff,
3228	}, {
3229		.usecase_id = LLCC_VIDVSP,
3230		.slice_id = 4,
3231		.max_cap = 256,
3232		.priority = 4,
3233		.fixed_size = true,
3234		.bonus_ways = 0xffffffff,
3235	}, {
3236		.usecase_id = LLCC_VIDDEC,
3237		.slice_id = 5,
3238		.max_cap = 6144,
3239		.priority = 4,
3240		.fixed_size = true,
3241		.bonus_ways = 0xffffffff,
3242		.cache_mode = 2,
3243		.ovcap_prio = true,
3244		.parent_slice_id = 33,
3245	}, {
3246		.usecase_id = LLCC_CAMOFE,
3247		.slice_id = 33,
3248		.max_cap = 6144,
3249		.priority = 4,
3250		.fixed_size = true,
3251		.bonus_ways = 0xffffffff,
3252		.stale_en = true,
3253		.ovcap_prio = true,
3254		.parent_slice_id = 33,
3255	}, {
3256		.usecase_id = LLCC_CAMRTIP,
3257		.slice_id = 13,
3258		.max_cap = 1024,
3259		.priority = 4,
3260		.fixed_size = true,
3261		.bonus_ways = 0xffffffff,
3262		.stale_en = true,
3263		.ovcap_prio = true,
3264		.parent_slice_id = 33,
3265	}, {
3266		.usecase_id = LLCC_CAMSRTIP,
3267		.slice_id = 14,
3268		.max_cap = 6144,
3269		.priority = 4,
3270		.fixed_size = true,
3271		.bonus_ways = 0xffffffff,
3272		.stale_en = true,
3273		.ovcap_prio = true,
3274		.parent_slice_id = 33,
3275	}, {
3276		.usecase_id = LLCC_CAMRTRF,
3277		.slice_id = 7,
3278		.max_cap = 3584,
3279		.priority = 1,
3280		.fixed_size = true,
3281		.bonus_ways = 0xffffffff,
3282		.stale_en = true,
3283		.ovcap_prio = true,
3284		.parent_slice_id = 33,
3285	}, {
3286		.usecase_id = LLCC_CAMSRTRF,
3287		.slice_id = 21,
3288		.max_cap = 6144,
3289		.priority = 1,
3290		.fixed_size = true,
3291		.bonus_ways = 0xffffffff,
3292		.stale_en = true,
3293		.ovcap_prio = true,
3294		.parent_slice_id = 33,
3295	}, {
3296		.usecase_id = LLCC_CPUSSMPAM,
3297		.slice_id = 6,
3298		.max_cap = 2048,
3299		.priority = 1,
3300		.fixed_size = true,
3301		.bonus_ways = 0xffffffff,
3302		.activate_on_init = true,
3303		.write_scid_en = true,
3304	},
3305};
3306
3307static const struct llcc_slice_config qcs615_data[] = {
3308	{
3309		.usecase_id = LLCC_CPUSS,
3310		.slice_id = 1,
3311		.max_cap = 128,
3312		.priority = 1,
3313		.bonus_ways = 0xf,
3314		.cache_mode = 0,
3315		.activate_on_init = true,
3316		.write_scid_en = true,
3317	}, {
3318		.usecase_id = LLCC_MDM,
3319		.slice_id = 8,
3320		.max_cap = 256,
3321		.priority = 0,
3322		.fixed_size = true,
3323		.bonus_ways = 0xf,
3324		.cache_mode = 0,
3325		.activate_on_init = true,
3326	}, {
3327		.usecase_id = LLCC_GPUHTW,
3328		.slice_id = 11,
3329		.max_cap = 128,
3330		.priority = 1,
3331		.fixed_size = true,
3332		.bonus_ways = 0xf,
3333		.cache_mode = 0,
3334		.activate_on_init = true,
3335	}, {
3336		.usecase_id = LLCC_GPU,
3337		.slice_id = 12,
3338		.max_cap = 128,
3339		.priority = 1,
3340		.bonus_ways = 0xf,
3341		.cache_mode = 0,
3342		.activate_on_init = true,
3343	},
3344};
3345
3346static const struct llcc_slice_config qcs8300_data[] = {
3347	{
3348		.usecase_id = LLCC_GPUHTW,
3349		.slice_id = 11,
3350		.max_cap = 128,
3351		.priority = 1,
3352		.fixed_size = true,
3353		.bonus_ways = 0xf,
3354		.cache_mode = 0,
3355		.retain_on_pc = true,
3356	}, {
3357		.usecase_id = LLCC_GPU,
3358		.slice_id = 12,
3359		.max_cap = 512,
3360		.priority = 1,
3361		.fixed_size = true,
3362		.bonus_ways = 0xf,
3363		.cache_mode = 0,
3364		.retain_on_pc = true,
3365		.write_scid_en = true,
3366	}, {
3367		.usecase_id = LLCC_MMUHWT,
3368		.slice_id = 13,
3369		.max_cap = 128,
3370		.priority = 1,
3371		.fixed_size = true,
3372		.bonus_ways = 0xf,
3373		.cache_mode = 0,
3374		.activate_on_init = true,
3375	}, {
3376		.usecase_id = LLCC_ECC,
3377		.slice_id = 26,
3378		.max_cap = 256,
3379		.priority = 3,
3380		.fixed_size = true,
3381		.bonus_ways = 0xf,
3382		.cache_mode = 0,
3383		.activate_on_init = true,
3384	}, {
3385		.usecase_id = LLCC_WRCACHE,
3386		.slice_id = 31,
3387		.max_cap = 128,
3388		.priority = 1,
3389		.fixed_size = true,
3390		.bonus_ways = 0xf,
3391		.cache_mode = 0,
3392		.activate_on_init = true,
3393	},
3394};
3395
3396static const struct llcc_slice_config qdu1000_data_2ch[] = {
3397	{
3398		.usecase_id = LLCC_MDMHPGRW,
3399		.slice_id = 7,
3400		.max_cap = 512,
3401		.priority = 1,
3402		.fixed_size = true,
3403		.bonus_ways = 0xfff,
3404		.cache_mode = 0,
3405		.retain_on_pc = true,
3406	}, {
3407		.usecase_id = LLCC_MODHW,
3408		.slice_id = 9,
3409		.max_cap = 256,
3410		.priority = 1,
3411		.fixed_size = true,
3412		.bonus_ways = 0xfff,
3413		.cache_mode = 0,
3414		.retain_on_pc = true,
3415	}, {
3416		.usecase_id = LLCC_MDMPNG,
3417		.slice_id = 21,
3418		.max_cap = 256,
3419		.priority = 0,
3420		.fixed_size = true,
3421		.bonus_ways = 0x3,
3422		.cache_mode = 0,
3423		.retain_on_pc = true,
3424	}, {
3425		.usecase_id = LLCC_ECC,
3426		.slice_id = 26,
3427		.max_cap = 512,
3428		.priority = 3,
3429		.fixed_size = true,
3430		.bonus_ways = 0xffc,
3431		.cache_mode = 0,
3432		.activate_on_init = true,
3433	}, {
3434		.usecase_id = LLCC_MODPE,
3435		.slice_id = 29,
3436		.max_cap = 256,
3437		.priority = 1,
3438		.fixed_size = true,
3439		.bonus_ways = 0xfff,
3440		.cache_mode = 0,
3441		.retain_on_pc = true,
3442	}, {
3443		.usecase_id = LLCC_APTCM,
3444		.slice_id = 30,
3445		.max_cap = 256,
3446		.priority = 3,
3447		.fixed_size = true,
3448		.res_ways = 0xc,
3449		.cache_mode = 1,
3450		.retain_on_pc = true,
3451	}, {
3452		.usecase_id = LLCC_WRCACHE,
3453		.slice_id = 31,
3454		.max_cap = 128,
3455		.priority = 1,
3456		.fixed_size = true,
3457		.bonus_ways = 0x3,
3458		.cache_mode = 0,
3459		.activate_on_init = true,
3460	},
3461};
3462
3463static const struct llcc_slice_config qdu1000_data_4ch[] = {
3464	{
3465		.usecase_id = LLCC_MDMHPGRW,
3466		.slice_id = 7,
3467		.max_cap = 1024,
3468		.priority = 1,
3469		.fixed_size = true,
3470		.bonus_ways = 0xfff,
3471		.cache_mode = 0,
3472		.retain_on_pc = true,
3473	}, {
3474		.usecase_id = LLCC_MODHW,
3475		.slice_id = 9,
3476		.max_cap = 512,
3477		.priority = 1,
3478		.fixed_size = true,
3479		.bonus_ways = 0xfff,
3480		.cache_mode = 0,
3481		.retain_on_pc = true,
3482	}, {
3483		.usecase_id = LLCC_MDMPNG,
3484		.slice_id = 21,
3485		.max_cap = 512,
3486		.priority = 0,
3487		.fixed_size = true,
3488		.bonus_ways = 0x3,
3489		.cache_mode = 0,
3490		.retain_on_pc = true,
3491	}, {
3492		.usecase_id = LLCC_ECC,
3493		.slice_id = 26,
3494		.max_cap = 1024,
3495		.priority = 3,
3496		.fixed_size = true,
3497		.bonus_ways = 0xffc,
3498		.cache_mode = 0,
3499		.activate_on_init = true,
3500	}, {
3501		.usecase_id = LLCC_MODPE,
3502		.slice_id = 29,
3503		.max_cap = 512,
3504		.priority = 1,
3505		.fixed_size = true,
3506		.bonus_ways = 0xfff,
3507		.cache_mode = 0,
3508		.retain_on_pc = true,
3509	}, {
3510		.usecase_id = LLCC_APTCM,
3511		.slice_id = 30,
3512		.max_cap = 512,
3513		.priority = 3,
3514		.fixed_size = true,
3515		.res_ways = 0xc,
3516		.cache_mode = 1,
3517		.retain_on_pc = true,
3518	}, {
3519		.usecase_id = LLCC_WRCACHE,
3520		.slice_id = 31,
3521		.max_cap = 256,
3522		.priority = 1,
3523		.fixed_size = true,
3524		.bonus_ways = 0x3,
3525		.cache_mode = 0,
3526		.activate_on_init = true,
3527	},
3528};
3529
3530static const struct llcc_slice_config qdu1000_data_8ch[] = {
3531	{
3532		.usecase_id = LLCC_MDMHPGRW,
3533		.slice_id = 7,
3534		.max_cap = 2048,
3535		.priority = 1,
3536		.fixed_size = true,
3537		.bonus_ways = 0xfff,
3538		.cache_mode = 0,
3539		.retain_on_pc = true,
3540	}, {
3541		.usecase_id = LLCC_MODHW,
3542		.slice_id = 9,
3543		.max_cap = 1024,
3544		.priority = 1,
3545		.fixed_size = true,
3546		.bonus_ways = 0xfff,
3547		.cache_mode = 0,
3548		.retain_on_pc = true,
3549	}, {
3550		.usecase_id = LLCC_MDMPNG,
3551		.slice_id = 21,
3552		.max_cap = 1024,
3553		.priority = 0,
3554		.fixed_size = true,
3555		.bonus_ways = 0x3,
3556		.cache_mode = 0,
3557		.retain_on_pc = true,
3558	}, {
3559		.usecase_id = LLCC_ECC,
3560		.slice_id = 26,
3561		.max_cap = 2048,
3562		.priority = 3,
3563		.fixed_size = true,
3564		.bonus_ways = 0xffc,
3565		.cache_mode = 0,
3566		.activate_on_init = true,
3567	}, {
3568		.usecase_id = LLCC_MODPE,
3569		.slice_id = 29,
3570		.max_cap = 1024,
3571		.priority = 1,
3572		.fixed_size = true,
3573		.bonus_ways = 0xfff,
3574		.cache_mode = 0,
3575		.retain_on_pc = true,
3576	}, {
3577		.usecase_id = LLCC_APTCM,
3578		.slice_id = 30,
3579		.max_cap = 1024,
3580		.priority = 3,
3581		.fixed_size = true,
3582		.res_ways = 0xc,
3583		.cache_mode = 1,
3584		.retain_on_pc = true,
3585	}, {
3586		.usecase_id = LLCC_WRCACHE,
3587		.slice_id = 31,
3588		.max_cap = 512,
3589		.priority = 1,
3590		.fixed_size = true,
3591		.bonus_ways = 0x3,
3592		.cache_mode = 0,
3593		.activate_on_init = true,
3594	},
3595};
3596
3597static const struct llcc_slice_config x1e80100_data[] = {
3598	{
3599		.usecase_id = LLCC_CPUSS,
3600		.slice_id = 1,
3601		.max_cap = 6144,
3602		.priority = 1,
3603		.fixed_size = true,
3604		.bonus_ways = 0xfff,
3605		.cache_mode = 0,
3606		.activate_on_init = true,
3607	}, {
3608		.usecase_id = LLCC_VIDSC0,
3609		.slice_id = 2,
3610		.max_cap = 512,
3611		.priority = 4,
3612		.fixed_size = true,
3613		.bonus_ways = 0xfff,
3614		.cache_mode = 0,
3615	}, {
3616		.usecase_id = LLCC_AUDIO,
3617		.slice_id = 6,
3618		.max_cap = 1024,
3619		.priority = 1,
3620		.fixed_size = true,
3621		.bonus_ways = 0xfff,
3622		.cache_mode = 0,
3623	}, {
3624		.usecase_id = LLCC_CMPT,
3625		.slice_id = 10,
3626		.max_cap = 6144,
3627		.priority = 1,
3628		.fixed_size = true,
3629		.bonus_ways = 0xfff,
3630		.cache_mode = 0,
3631	}, {
3632		.usecase_id = LLCC_GPUHTW,
3633		.slice_id = 11,
3634		.max_cap = 512,
3635		.priority = 1,
3636		.fixed_size = true,
3637		.bonus_ways = 0xfff,
3638		.cache_mode = 0,
3639	}, {
3640		.usecase_id = LLCC_GPU,
3641		.slice_id = 9,
3642		.max_cap = 4608,
3643		.priority = 1,
3644		.bonus_ways = 0xfff,
3645		.cache_mode = 0,
3646		.write_scid_en = true,
3647		.write_scid_cacheable_en = true,
3648		.stale_en = true,
3649	}, {
3650		.usecase_id = LLCC_MMUHWT,
3651		.slice_id = 18,
3652		.max_cap = 512,
3653		.priority = 1,
3654		.fixed_size = true,
3655		.bonus_ways = 0xfff,
3656		.cache_mode = 0,
3657		.activate_on_init = true,
3658	}, {
3659		.usecase_id = LLCC_AUDHW,
3660		.slice_id = 22,
3661		.max_cap = 1024,
3662		.priority = 1,
3663		.fixed_size = true,
3664		.bonus_ways = 0xfff,
3665		.cache_mode = 0,
3666	}, {
3667		.usecase_id = LLCC_CVP,
3668		.slice_id = 8,
3669		.max_cap = 512,
3670		.priority = 4,
3671		.fixed_size = true,
3672		.bonus_ways = 0xfff,
3673		.cache_mode = 0,
3674	}, {
3675		.usecase_id = LLCC_WRCACHE,
3676		.slice_id = 31,
3677		.max_cap = 1024,
3678		.priority = 1,
3679		.fixed_size = true,
3680		.bonus_ways = 0xfff,
3681		.cache_mode = 0,
3682		.activate_on_init = true,
3683	}, {
3684		.usecase_id = LLCC_CAMEXP0,
3685		.slice_id = 4,
3686		.max_cap = 256,
3687		.priority = 4,
3688		.fixed_size = true,
3689		.bonus_ways = 0x3,
3690		.cache_mode = 0,
3691	}, {
3692		.usecase_id = LLCC_CAMEXP1,
3693		.slice_id = 7,
3694		.max_cap = 3072,
3695		.priority = 3,
3696		.fixed_size = true,
3697		.bonus_ways = 0xffc,
3698		.cache_mode = 2,
3699	}, {
3700		.usecase_id = LLCC_LCPDARE,
3701		.slice_id = 30,
3702		.max_cap = 512,
3703		.priority = 3,
3704		.fixed_size = true,
3705		.bonus_ways = 0xfff,
3706		.cache_mode = 0,
3707		.activate_on_init = true,
3708		.alloc_oneway_en = true,
3709	}, {
3710		.usecase_id = LLCC_AENPU,
3711		.slice_id = 3,
3712		.max_cap = 3072,
3713		.priority = 1,
3714		.fixed_size = true,
3715		.bonus_ways = 0xfff,
3716		.cache_mode = 2,
3717	}, {
3718		.usecase_id = LLCC_ISLAND1,
3719		.slice_id = 12,
3720		.max_cap = 2048,
3721		.priority = 7,
3722		.fixed_size = true,
3723		.res_ways = 0xf,
3724		.cache_mode = 0,
3725	}, {
3726		.usecase_id = LLCC_CAMEXP2,
3727		.slice_id = 19,
3728		.max_cap = 3072,
3729		.priority = 3,
3730		.fixed_size = true,
3731		.bonus_ways = 0xffc,
3732		.cache_mode = 2,
3733	}, {
3734		.usecase_id = LLCC_CAMEXP3,
3735		.slice_id = 20,
3736		.max_cap = 3072,
3737		.priority = 2,
3738		.fixed_size = true,
3739		.bonus_ways = 0xffc,
3740		.cache_mode = 2,
3741	}, {
3742		.usecase_id = LLCC_CAMEXP4,
3743		.slice_id = 21,
3744		.max_cap = 3072,
3745		.priority = 2,
3746		.fixed_size = true,
3747		.bonus_ways = 0xffc,
3748		.cache_mode = 2,
3749	},
3750};
3751
3752static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = {
3753	.trp_ecc_error_status0 = 0x20344,
3754	.trp_ecc_error_status1 = 0x20348,
3755	.trp_ecc_sb_err_syn0 = 0x2304c,
3756	.trp_ecc_db_err_syn0 = 0x20370,
3757	.trp_ecc_error_cntr_clear = 0x20440,
3758	.trp_interrupt_0_status = 0x20480,
3759	.trp_interrupt_0_clear = 0x20484,
3760	.trp_interrupt_0_enable = 0x20488,
3761
3762	/* LLCC Common registers */
3763	.cmn_status0 = 0x3000c,
3764	.cmn_interrupt_0_enable = 0x3001c,
3765	.cmn_interrupt_2_enable = 0x3003c,
3766
3767	/* LLCC DRP registers */
3768	.drp_ecc_error_cfg = 0x40000,
3769	.drp_ecc_error_cntr_clear = 0x40004,
3770	.drp_interrupt_status = 0x41000,
3771	.drp_interrupt_clear = 0x41008,
3772	.drp_interrupt_enable = 0x4100c,
3773	.drp_ecc_error_status0 = 0x42044,
3774	.drp_ecc_error_status1 = 0x42048,
3775	.drp_ecc_sb_err_syn0 = 0x4204c,
3776	.drp_ecc_db_err_syn0 = 0x42070,
3777};
3778
3779static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = {
3780	.trp_ecc_error_status0 = 0x20344,
3781	.trp_ecc_error_status1 = 0x20348,
3782	.trp_ecc_sb_err_syn0 = 0x2034c,
3783	.trp_ecc_db_err_syn0 = 0x20370,
3784	.trp_ecc_error_cntr_clear = 0x20440,
3785	.trp_interrupt_0_status = 0x20480,
3786	.trp_interrupt_0_clear = 0x20484,
3787	.trp_interrupt_0_enable = 0x20488,
3788
3789	/* LLCC Common registers */
3790	.cmn_status0 = 0x3400c,
3791	.cmn_interrupt_0_enable = 0x3401c,
3792	.cmn_interrupt_2_enable = 0x3403c,
3793
3794	/* LLCC DRP registers */
3795	.drp_ecc_error_cfg = 0x50000,
3796	.drp_ecc_error_cntr_clear = 0x50004,
3797	.drp_interrupt_status = 0x50020,
3798	.drp_interrupt_clear = 0x50028,
3799	.drp_interrupt_enable = 0x5002c,
3800	.drp_ecc_error_status0 = 0x520f4,
3801	.drp_ecc_error_status1 = 0x520f8,
3802	.drp_ecc_sb_err_syn0 = 0x520fc,
3803	.drp_ecc_db_err_syn0 = 0x52120,
3804};
3805
3806static const struct llcc_edac_reg_offset llcc_v6_edac_reg_offset = {
3807	.trp_ecc_error_status0 = 0x47448,
3808	.trp_ecc_error_status1 = 0x47450,
3809	.trp_ecc_sb_err_syn0 = 0x47490,
3810	.trp_ecc_db_err_syn0 = 0x474d0,
3811	.trp_ecc_error_cntr_clear = 0x47444,
3812	.trp_interrupt_0_status = 0x47600,
3813	.trp_interrupt_0_clear = 0x47604,
3814	.trp_interrupt_0_enable = 0x47608,
3815
3816	/* LLCC Common registers */
3817	.cmn_status0 = 0x6400c,
3818	.cmn_interrupt_0_enable = 0x6401c,
3819	.cmn_interrupt_2_enable = 0x6403c,
3820
3821	/* LLCC DRP registers */
3822	.drp_ecc_error_cfg = 0x80000,
3823	.drp_ecc_error_cntr_clear = 0x80004,
3824	.drp_interrupt_status = 0x80020,
3825	.drp_interrupt_clear = 0x80028,
3826	.drp_interrupt_enable = 0x8002c,
3827	.drp_ecc_error_status0 = 0x820f4,
3828	.drp_ecc_error_status1 = 0x820f8,
3829	.drp_ecc_sb_err_syn0 = 0x820fc,
3830	.drp_ecc_db_err_syn0 = 0x82120,
3831};
3832
3833/* LLCC register offset starting from v1.0.0 */
3834static const u32 llcc_v1_reg_offset[] = {
3835	[LLCC_COMMON_HW_INFO]	= 0x00030000,
3836	[LLCC_COMMON_STATUS0]	= 0x0003000c,
3837};
3838
3839/* LLCC register offset starting from v2.0.1 */
3840static const u32 llcc_v2_1_reg_offset[] = {
3841	[LLCC_COMMON_HW_INFO]	= 0x00034000,
3842	[LLCC_COMMON_STATUS0]	= 0x0003400c,
3843};
3844
3845/* LLCC register offset starting from v6.0.0 */
3846static const u32 llcc_v6_reg_offset[] = {
3847	[LLCC_COMMON_HW_INFO]	        = 0x00064000,
3848	[LLCC_COMMON_STATUS0]	        = 0x0006400c,
3849	[LLCC_TRP_ATTR0_CFG]		= 0x00041000,
3850	[LLCC_TRP_ATTR1_CFG]		= 0x00041008,
3851	[LLCC_TRP_ATTR2_CFG]		= 0x00041010,
3852	[LLCC_TRP_ATTR3_CFG]		= 0x00041014,
3853	[LLCC_TRP_SID_DIS_CAP_ALLOC]	= 0x00042000,
3854	[LLCC_TRP_ALGO_STALE_EN]	= 0x00042008,
3855	[LLCC_TRP_ALGO_STALE_CAP_EN]	= 0x00042010,
3856	[LLCC_TRP_ALGO_MRU0]		= 0x00042018,
3857	[LLCC_TRP_ALGO_MRU1]		= 0x00042020,
3858	[LLCC_TRP_ALGO_ALLOC0]		= 0x00042028,
3859	[LLCC_TRP_ALGO_ALLOC1]		= 0x00042030,
3860	[LLCC_TRP_ALGO_ALLOC2]		= 0x00042038,
3861	[LLCC_TRP_ALGO_ALLOC3]		= 0x00042040,
3862	[LLCC_TRP_WRS_EN]		= 0x00042080,
3863	[LLCC_TRP_WRS_CACHEABLE_EN]	= 0x00042088,
3864};
3865
3866static const struct qcom_llcc_config kaanapali_cfg[] = {
3867	{
3868		.sct_data	= kaanapali_data,
3869		.size		= ARRAY_SIZE(kaanapali_data),
3870		.reg_offset	= llcc_v6_reg_offset,
3871		.edac_reg_offset = &llcc_v6_edac_reg_offset,
3872	},
3873};
3874
3875static const struct qcom_llcc_config qcs615_cfg[] = {
3876	{
3877		.sct_data	= qcs615_data,
3878		.size		= ARRAY_SIZE(qcs615_data),
3879		.reg_offset	= llcc_v1_reg_offset,
3880		.edac_reg_offset = &llcc_v1_edac_reg_offset,
3881	},
3882};
3883
3884static const struct qcom_llcc_config qcs8300_cfg[] = {
3885	{
3886		.sct_data	= qcs8300_data,
3887		.size		= ARRAY_SIZE(qcs8300_data),
3888		.reg_offset	= llcc_v2_1_reg_offset,
3889		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3890		.num_banks	= 4,
3891	},
3892};
3893
3894static const struct qcom_llcc_config qdu1000_cfg[] = {
3895	{
3896		.sct_data       = qdu1000_data_8ch,
3897		.size		= ARRAY_SIZE(qdu1000_data_8ch),
3898		.reg_offset	= llcc_v2_1_reg_offset,
3899		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3900	},
3901	{
3902		.sct_data       = qdu1000_data_4ch,
3903		.size           = ARRAY_SIZE(qdu1000_data_4ch),
3904		.reg_offset     = llcc_v2_1_reg_offset,
3905		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3906	},
3907	{
3908		.sct_data       = qdu1000_data_4ch,
3909		.size           = ARRAY_SIZE(qdu1000_data_4ch),
3910		.reg_offset     = llcc_v2_1_reg_offset,
3911		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3912	},
3913	{
3914		.sct_data       = qdu1000_data_2ch,
3915		.size           = ARRAY_SIZE(qdu1000_data_2ch),
3916		.reg_offset     = llcc_v2_1_reg_offset,
3917		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3918	},
3919};
3920
3921static const struct qcom_llcc_config ipq5424_cfg[] = {
3922	{
3923		.sct_data       = ipq5424_data,
3924		.size           = ARRAY_SIZE(ipq5424_data),
3925		.reg_offset     = llcc_v2_1_reg_offset,
3926		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3927		.no_broadcast_register = true,
3928	},
3929};
3930
3931static const struct qcom_llcc_config sa8775p_cfg[] = {
3932	{
3933		.sct_data	= sa8775p_data,
3934		.size		= ARRAY_SIZE(sa8775p_data),
3935		.reg_offset	= llcc_v2_1_reg_offset,
3936		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3937	},
3938};
3939
3940static const struct qcom_llcc_config sar1130p_cfg[] = {
3941	{
3942		.sct_data	= sar1130p_data,
3943		.size		= ARRAY_SIZE(sar1130p_data),
3944		.reg_offset	= llcc_v2_1_reg_offset,
3945		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3946		.max_cap_shift	= 14,
3947		.num_banks	= 2,
3948	},
3949};
3950
3951static const struct qcom_llcc_config sar2130p_cfg[] = {
3952	{
3953		.sct_data	= sar2130p_data,
3954		.size		= ARRAY_SIZE(sar2130p_data),
3955		.reg_offset	= llcc_v2_1_reg_offset,
3956		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3957		.max_cap_shift	= 14,
3958		.num_banks	= 2,
3959	},
3960};
3961
3962static const struct qcom_llcc_config sc7180_cfg[] = {
3963	{
3964		.sct_data	= sc7180_data,
3965		.size		= ARRAY_SIZE(sc7180_data),
3966		.reg_offset	= llcc_v1_reg_offset,
3967		.edac_reg_offset = &llcc_v1_edac_reg_offset,
3968	},
3969};
3970
3971static const struct qcom_llcc_config sc7280_cfg[] = {
3972	{
3973		.sct_data	= sc7280_data,
3974		.size		= ARRAY_SIZE(sc7280_data),
3975		.reg_offset	= llcc_v1_reg_offset,
3976		.edac_reg_offset = &llcc_v1_edac_reg_offset,
3977	},
3978};
3979
3980static const struct qcom_llcc_config sc8180x_cfg[] = {
3981	{
3982		.sct_data	= sc8180x_data,
3983		.size		= ARRAY_SIZE(sc8180x_data),
3984		.reg_offset	= llcc_v1_reg_offset,
3985		.edac_reg_offset = &llcc_v1_edac_reg_offset,
3986	},
3987};
3988
3989static const struct qcom_llcc_config sc8280xp_cfg[] = {
3990	{
3991		.sct_data	= sc8280xp_data,
3992		.size		= ARRAY_SIZE(sc8280xp_data),
3993		.reg_offset	= llcc_v1_reg_offset,
3994		.edac_reg_offset = &llcc_v1_edac_reg_offset,
3995	},
3996};
3997
3998static const struct qcom_llcc_config sdm845_cfg[] = {
3999	{
4000		.sct_data	= sdm845_data,
4001		.size		= ARRAY_SIZE(sdm845_data),
4002		.skip_llcc_cfg	= true,
4003		.reg_offset	= llcc_v1_reg_offset,
4004		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4005		.no_edac	= true,
4006	},
4007};
4008
4009static const struct qcom_llcc_config sm6350_cfg[] = {
4010	{
4011		.sct_data	= sm6350_data,
4012		.size		= ARRAY_SIZE(sm6350_data),
4013		.reg_offset	= llcc_v1_reg_offset,
4014		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4015	},
4016};
4017
4018static const struct qcom_llcc_config sm7150_cfg[] = {
4019	{
4020		.sct_data       = sm7150_data,
4021		.size           = ARRAY_SIZE(sm7150_data),
4022		.reg_offset	= llcc_v1_reg_offset,
4023		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4024	},
4025};
4026
4027static const struct qcom_llcc_config sm8150_cfg[] = {
4028	{
4029		.sct_data       = sm8150_data,
4030		.size           = ARRAY_SIZE(sm8150_data),
4031		.reg_offset	= llcc_v1_reg_offset,
4032		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4033	},
4034};
4035
4036static const struct qcom_llcc_config sm8250_cfg[] = {
4037	{
4038		.sct_data       = sm8250_data,
4039		.size           = ARRAY_SIZE(sm8250_data),
4040		.reg_offset	= llcc_v1_reg_offset,
4041		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4042	},
4043};
4044
4045static const struct qcom_llcc_config sm8350_cfg[] = {
4046	{
4047		.sct_data       = sm8350_data,
4048		.size           = ARRAY_SIZE(sm8350_data),
4049		.reg_offset	= llcc_v1_reg_offset,
4050		.edac_reg_offset = &llcc_v1_edac_reg_offset,
4051	},
4052};
4053
4054static const struct qcom_llcc_config sm8450_cfg[] = {
4055	{
4056		.sct_data       = sm8450_data,
4057		.size           = ARRAY_SIZE(sm8450_data),
4058		.reg_offset	= llcc_v2_1_reg_offset,
4059		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4060	},
4061};
4062
4063static const struct qcom_llcc_config sm8550_cfg[] = {
4064	{
4065		.sct_data       = sm8550_data,
4066		.size           = ARRAY_SIZE(sm8550_data),
4067		.reg_offset	= llcc_v2_1_reg_offset,
4068		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4069	},
4070};
4071
4072static const struct qcom_llcc_config sm8650_cfg[] = {
4073	{
4074		.sct_data       = sm8650_data,
4075		.size           = ARRAY_SIZE(sm8650_data),
4076		.reg_offset	= llcc_v2_1_reg_offset,
4077		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4078	},
4079};
4080
4081static const struct qcom_llcc_config sm8750_cfg[] = {
4082	{
4083		.sct_data		= sm8750_data,
4084		.size			= ARRAY_SIZE(sm8750_data),
4085		.skip_llcc_cfg	= false,
4086		.reg_offset		= llcc_v6_reg_offset,
4087		.edac_reg_offset = &llcc_v6_edac_reg_offset,
4088	},
4089};
4090
4091static const struct qcom_llcc_config x1e80100_cfg[] = {
4092	{
4093		.sct_data	= x1e80100_data,
4094		.size		= ARRAY_SIZE(x1e80100_data),
4095		.reg_offset	= llcc_v2_1_reg_offset,
4096		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
4097		.irq_configured = true,
4098	},
4099};
4100
4101static const struct qcom_sct_config kaanapali_cfgs = {
4102	.llcc_config	= kaanapali_cfg,
4103	.num_config	= ARRAY_SIZE(kaanapali_cfg),
4104};
4105
4106static const struct qcom_sct_config qcs615_cfgs = {
4107	.llcc_config	= qcs615_cfg,
4108	.num_config	= ARRAY_SIZE(qcs615_cfg),
4109};
4110
4111static const struct qcom_sct_config qcs8300_cfgs = {
4112	.llcc_config	= qcs8300_cfg,
4113	.num_config	= ARRAY_SIZE(qcs8300_cfg),
4114};
4115
4116static const struct qcom_sct_config qdu1000_cfgs = {
4117	.llcc_config	= qdu1000_cfg,
4118	.num_config	= ARRAY_SIZE(qdu1000_cfg),
4119};
4120
4121static const struct qcom_sct_config ipq5424_cfgs = {
4122	.llcc_config	= ipq5424_cfg,
4123	.num_config	= ARRAY_SIZE(ipq5424_cfg),
4124};
4125
4126static const struct qcom_sct_config sa8775p_cfgs = {
4127	.llcc_config	= sa8775p_cfg,
4128	.num_config	= ARRAY_SIZE(sa8775p_cfg),
4129};
4130
4131static const struct qcom_sct_config sar1130p_cfgs = {
4132	.llcc_config	= sar1130p_cfg,
4133	.num_config	= ARRAY_SIZE(sar1130p_cfg),
4134};
4135
4136static const struct qcom_sct_config sar2130p_cfgs = {
4137	.llcc_config	= sar2130p_cfg,
4138	.num_config	= ARRAY_SIZE(sar2130p_cfg),
4139};
4140
4141static const struct qcom_sct_config sc7180_cfgs = {
4142	.llcc_config	= sc7180_cfg,
4143	.num_config	= ARRAY_SIZE(sc7180_cfg),
4144};
4145
4146static const struct qcom_sct_config sc7280_cfgs = {
4147	.llcc_config	= sc7280_cfg,
4148	.num_config	= ARRAY_SIZE(sc7280_cfg),
4149};
4150
4151static const struct qcom_sct_config sc8180x_cfgs = {
4152	.llcc_config	= sc8180x_cfg,
4153	.num_config	= ARRAY_SIZE(sc8180x_cfg),
4154};
4155
4156static const struct qcom_sct_config sc8280xp_cfgs = {
4157	.llcc_config	= sc8280xp_cfg,
4158	.num_config	= ARRAY_SIZE(sc8280xp_cfg),
4159};
4160
4161static const struct qcom_sct_config sdm845_cfgs = {
4162	.llcc_config	= sdm845_cfg,
4163	.num_config	= ARRAY_SIZE(sdm845_cfg),
4164};
4165
4166static const struct qcom_sct_config sm6350_cfgs = {
4167	.llcc_config	= sm6350_cfg,
4168	.num_config	= ARRAY_SIZE(sm6350_cfg),
4169};
4170
4171static const struct qcom_sct_config sm7150_cfgs = {
4172	.llcc_config	= sm7150_cfg,
4173	.num_config	= ARRAY_SIZE(sm7150_cfg),
4174};
4175
4176static const struct qcom_sct_config sm8150_cfgs = {
4177	.llcc_config	= sm8150_cfg,
4178	.num_config	= ARRAY_SIZE(sm8150_cfg),
4179};
4180
4181static const struct qcom_sct_config sm8250_cfgs = {
4182	.llcc_config	= sm8250_cfg,
4183	.num_config	= ARRAY_SIZE(sm8250_cfg),
4184};
4185
4186static const struct qcom_sct_config sm8350_cfgs = {
4187	.llcc_config	= sm8350_cfg,
4188	.num_config	= ARRAY_SIZE(sm8350_cfg),
4189};
4190
4191static const struct qcom_sct_config sm8450_cfgs = {
4192	.llcc_config	= sm8450_cfg,
4193	.num_config	= ARRAY_SIZE(sm8450_cfg),
4194};
4195
4196static const struct qcom_sct_config sm8550_cfgs = {
4197	.llcc_config	= sm8550_cfg,
4198	.num_config	= ARRAY_SIZE(sm8550_cfg),
4199};
4200
4201static const struct qcom_sct_config sm8650_cfgs = {
4202	.llcc_config	= sm8650_cfg,
4203	.num_config	= ARRAY_SIZE(sm8650_cfg),
4204};
4205
4206static const struct qcom_sct_config sm8750_cfgs = {
4207	.llcc_config	= sm8750_cfg,
4208	.num_config	= ARRAY_SIZE(sm8750_cfg),
4209};
4210
4211static const struct qcom_sct_config x1e80100_cfgs = {
4212	.llcc_config	= x1e80100_cfg,
4213	.num_config	= ARRAY_SIZE(x1e80100_cfg),
4214};
4215
4216static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
4217
4218/**
4219 * llcc_slice_getd - get llcc slice descriptor
4220 * @uid: usecase_id for the client
4221 *
4222 * A pointer to llcc slice descriptor will be returned on success
4223 * and error pointer is returned on failure
4224 */
4225struct llcc_slice_desc *llcc_slice_getd(u32 uid)
4226{
4227	const struct llcc_slice_config *cfg;
4228	struct llcc_slice_desc *desc;
4229	u32 sz, count;
4230
4231	if (IS_ERR(drv_data))
4232		return ERR_CAST(drv_data);
4233
4234	cfg = drv_data->cfg;
4235	sz = drv_data->cfg_size;
4236
4237	for (count = 0; cfg && count < sz; count++, cfg++)
4238		if (cfg->usecase_id == uid)
4239			break;
4240
4241	if (count == sz || !cfg)
4242		return ERR_PTR(-ENODEV);
4243
4244	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
4245	if (!desc)
4246		return ERR_PTR(-ENOMEM);
4247
4248	desc->slice_id = cfg->slice_id;
4249	desc->slice_size = cfg->max_cap;
4250
4251	return desc;
4252}
4253EXPORT_SYMBOL_GPL(llcc_slice_getd);
4254
4255/**
4256 * llcc_slice_putd - llcc slice descriptor
4257 * @desc: Pointer to llcc slice descriptor
4258 */
4259void llcc_slice_putd(struct llcc_slice_desc *desc)
4260{
4261	if (!IS_ERR_OR_NULL(desc))
4262		kfree(desc);
4263}
4264EXPORT_SYMBOL_GPL(llcc_slice_putd);
4265
4266static int llcc_update_act_ctrl(u32 sid,
4267				u32 act_ctrl_reg_val, u32 status)
4268{
4269	struct regmap *regmap;
4270	u32 act_ctrl_reg;
4271	u32 act_clear_reg;
4272	u32 status_reg;
4273	u32 slice_status;
4274	int ret;
4275
4276	if (IS_ERR(drv_data))
4277		return PTR_ERR(drv_data);
4278
4279	act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid);
4280	act_clear_reg = LLCC_TRP_ACT_CLEARn(sid);
4281	status_reg = LLCC_TRP_STATUSn(sid);
4282
4283	/* Set the ACTIVE trigger */
4284	act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG;
4285	ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
4286				act_ctrl_reg_val);
4287	if (ret)
4288		return ret;
4289
4290	/* Clear the ACTIVE trigger */
4291	act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG;
4292	ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
4293				act_ctrl_reg_val);
4294	if (ret)
4295		return ret;
4296
4297	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4298		regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
4299		ret = regmap_read_poll_timeout(regmap, status_reg,
4300				      slice_status, (slice_status & ACT_COMPLETE),
4301				      0, LLCC_STATUS_READ_DELAY);
4302		if (ret)
4303			return ret;
4304	}
4305
4306	ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
4307				      slice_status, !(slice_status & status),
4308				      0, LLCC_STATUS_READ_DELAY);
4309	if (ret)
4310		return ret;
4311
4312	if (drv_data->version >= LLCC_VERSION_4_1_0_0)
4313		ret = regmap_write(drv_data->bcast_regmap, act_clear_reg,
4314					ACT_CLEAR);
4315
4316	return ret;
4317}
4318
4319/**
4320 * llcc_slice_activate - Activate the llcc slice
4321 * @desc: Pointer to llcc slice descriptor
4322 *
4323 * A value of zero will be returned on success and a negative errno will
4324 * be returned in error cases
4325 */
4326int llcc_slice_activate(struct llcc_slice_desc *desc)
4327{
4328	int ret;
4329	u32 act_ctrl_val;
4330
4331	if (IS_ERR(drv_data))
4332		return PTR_ERR(drv_data);
4333
4334	if (IS_ERR_OR_NULL(desc))
4335		return -EINVAL;
4336
4337	mutex_lock(&drv_data->lock);
4338	if (test_bit(desc->slice_id, drv_data->bitmap)) {
4339		mutex_unlock(&drv_data->lock);
4340		return 0;
4341	}
4342
4343	act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT;
4344
4345	ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
4346				  DEACTIVATE);
4347	if (ret) {
4348		mutex_unlock(&drv_data->lock);
4349		return ret;
4350	}
4351
4352	__set_bit(desc->slice_id, drv_data->bitmap);
4353	mutex_unlock(&drv_data->lock);
4354
4355	return ret;
4356}
4357EXPORT_SYMBOL_GPL(llcc_slice_activate);
4358
4359/**
4360 * llcc_slice_deactivate - Deactivate the llcc slice
4361 * @desc: Pointer to llcc slice descriptor
4362 *
4363 * A value of zero will be returned on success and a negative errno will
4364 * be returned in error cases
4365 */
4366int llcc_slice_deactivate(struct llcc_slice_desc *desc)
4367{
4368	u32 act_ctrl_val;
4369	int ret;
4370
4371	if (IS_ERR(drv_data))
4372		return PTR_ERR(drv_data);
4373
4374	if (IS_ERR_OR_NULL(desc))
4375		return -EINVAL;
4376
4377	mutex_lock(&drv_data->lock);
4378	if (!test_bit(desc->slice_id, drv_data->bitmap)) {
4379		mutex_unlock(&drv_data->lock);
4380		return 0;
4381	}
4382	act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT;
4383
4384	ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
4385				  ACTIVATE);
4386	if (ret) {
4387		mutex_unlock(&drv_data->lock);
4388		return ret;
4389	}
4390
4391	__clear_bit(desc->slice_id, drv_data->bitmap);
4392	mutex_unlock(&drv_data->lock);
4393
4394	return ret;
4395}
4396EXPORT_SYMBOL_GPL(llcc_slice_deactivate);
4397
4398/**
4399 * llcc_get_slice_id - return the slice id
4400 * @desc: Pointer to llcc slice descriptor
4401 */
4402int llcc_get_slice_id(struct llcc_slice_desc *desc)
4403{
4404	if (IS_ERR_OR_NULL(desc))
4405		return -EINVAL;
4406
4407	return desc->slice_id;
4408}
4409EXPORT_SYMBOL_GPL(llcc_get_slice_id);
4410
4411/**
4412 * llcc_get_slice_size - return the slice id
4413 * @desc: Pointer to llcc slice descriptor
4414 */
4415size_t llcc_get_slice_size(struct llcc_slice_desc *desc)
4416{
4417	if (IS_ERR_OR_NULL(desc))
4418		return 0;
4419
4420	return desc->slice_size;
4421}
4422EXPORT_SYMBOL_GPL(llcc_get_slice_size);
4423
4424static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
4425				  const struct qcom_llcc_config *cfg)
4426{
4427	int ret;
4428	u32 attr2_cfg;
4429	u32 attr1_cfg;
4430	u32 attr0_cfg;
4431	u32 attr2_val;
4432	u32 attr1_val;
4433	u32 attr0_val;
4434	u32 max_cap_cacheline;
4435	struct llcc_slice_desc desc;
4436
4437	attr1_val = config->cache_mode;
4438	attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT;
4439	attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT;
4440	attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT;
4441
4442	max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap);
4443
4444	/*
4445	 * LLCC instances can vary for each target.
4446	 * The SW writes to broadcast register which gets propagated
4447	 * to each llcc instance (llcc0,.. llccN).
4448	 * Since the size of the memory is divided equally amongst the
4449	 * llcc instances, we need to configure the max cap accordingly.
4450	 */
4451	max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
4452	max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
4453	if (cfg->max_cap_shift)
4454		attr1_val |= max_cap_cacheline << cfg->max_cap_shift;
4455	else
4456		attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT;
4457
4458	attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id);
4459
4460	ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4461	if (ret)
4462		return ret;
4463
4464	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4465		attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id);
4466		attr0_val = config->res_ways;
4467		attr2_val = config->bonus_ways;
4468	} else {
4469		attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK;
4470		attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT;
4471	}
4472
4473	attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id);
4474
4475	ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4476	if (ret)
4477		return ret;
4478
4479	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4480		ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4481		if (ret)
4482			return ret;
4483	}
4484
4485	/* At least SDM845 disallows non-secure writes to these registers */
4486	if (!cfg->skip_llcc_cfg) {
4487		u32 disable_cap_alloc, retain_pc;
4488
4489		disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
4490		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
4491					 BIT(config->slice_id), disable_cap_alloc);
4492		if (ret)
4493			return ret;
4494
4495		if (drv_data->version < LLCC_VERSION_4_1_0_0) {
4496			retain_pc = config->retain_on_pc << config->slice_id;
4497			ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
4498						 BIT(config->slice_id), retain_pc);
4499			if (ret)
4500				return ret;
4501		}
4502	}
4503
4504	if (drv_data->version >= LLCC_VERSION_2_0_0_0) {
4505		u32 wren;
4506
4507		wren = config->write_scid_en << config->slice_id;
4508		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN,
4509					 BIT(config->slice_id), wren);
4510		if (ret)
4511			return ret;
4512	}
4513
4514	if (drv_data->version >= LLCC_VERSION_2_1_0_0) {
4515		u32 wr_cache_en;
4516
4517		wr_cache_en = config->write_scid_cacheable_en << config->slice_id;
4518		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN,
4519					 BIT(config->slice_id), wr_cache_en);
4520		if (ret)
4521			return ret;
4522	}
4523
4524	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4525		u32 stale_en;
4526		u32 stale_cap_en;
4527		u32 mru_uncap_en;
4528		u32 mru_rollover;
4529		u32 alloc_oneway_en;
4530		u32 ovcap_en;
4531		u32 ovcap_prio;
4532		u32 vict_prio;
4533
4534		stale_en = config->stale_en << config->slice_id;
4535		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1,
4536					 BIT(config->slice_id), stale_en);
4537		if (ret)
4538			return ret;
4539
4540		stale_cap_en = config->stale_cap_en << config->slice_id;
4541		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2,
4542					 BIT(config->slice_id), stale_cap_en);
4543		if (ret)
4544			return ret;
4545
4546		mru_uncap_en = config->mru_uncap_en << config->slice_id;
4547		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3,
4548					 BIT(config->slice_id), mru_uncap_en);
4549		if (ret)
4550			return ret;
4551
4552		mru_rollover = config->mru_rollover << config->slice_id;
4553		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4,
4554					 BIT(config->slice_id), mru_rollover);
4555		if (ret)
4556			return ret;
4557
4558		alloc_oneway_en = config->alloc_oneway_en << config->slice_id;
4559		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5,
4560					 BIT(config->slice_id), alloc_oneway_en);
4561		if (ret)
4562			return ret;
4563
4564		ovcap_en = config->ovcap_en << config->slice_id;
4565		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6,
4566					 BIT(config->slice_id), ovcap_en);
4567		if (ret)
4568			return ret;
4569
4570		ovcap_prio = config->ovcap_prio << config->slice_id;
4571		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7,
4572					 BIT(config->slice_id), ovcap_prio);
4573		if (ret)
4574			return ret;
4575
4576		vict_prio = config->vict_prio << config->slice_id;
4577		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8,
4578					 BIT(config->slice_id), vict_prio);
4579		if (ret)
4580			return ret;
4581	}
4582
4583	if (config->activate_on_init) {
4584		desc.slice_id = config->slice_id;
4585		ret = llcc_slice_activate(&desc);
4586	}
4587
4588	return ret;
4589}
4590
4591static int _qcom_llcc_cfg_program_v6(const struct llcc_slice_config *config,
4592				     const struct qcom_llcc_config *cfg)
4593{
4594	u32 stale_en, stale_cap_en, mru_uncap_en, mru_rollover;
4595	u32 alloc_oneway_en, ovcap_en, ovcap_prio, vict_prio;
4596	u32 attr0_cfg, attr1_cfg, attr2_cfg, attr3_cfg;
4597	u32 attr0_val, attr1_val, attr2_val, attr3_val;
4598	u32 slice_offset, reg_offset;
4599	struct llcc_slice_desc *desc;
4600	u32 wren, wr_cache_en;
4601	int ret;
4602
4603	attr0_cfg = LLCC_V6_TRP_ATTR0_CFGn(config->slice_id);
4604	attr1_cfg = LLCC_V6_TRP_ATTR1_CFGn(config->slice_id);
4605	attr2_cfg = LLCC_V6_TRP_ATTR2_CFGn(config->slice_id);
4606	attr3_cfg = LLCC_V6_TRP_ATTR3_CFGn(config->slice_id);
4607
4608	attr0_val = config->res_ways;
4609	attr1_val = config->bonus_ways;
4610	attr2_val = config->cache_mode;
4611	attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways);
4612	attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size);
4613	attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority);
4614
4615	if (config->parent_slice_id && config->fixed_size) {
4616		attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id);
4617		attr2_val |= ATTR2_IN_A_GROUP_MASK;
4618	}
4619
4620	attr3_val = MAX_CAP_TO_BYTES(config->max_cap);
4621	attr3_val /= drv_data->num_banks;
4622	attr3_val >>= CACHE_LINE_SIZE_SHIFT;
4623
4624	ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4625	if (ret)
4626		return ret;
4627
4628	ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4629	if (ret)
4630		return ret;
4631
4632	ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4633	if (ret)
4634		return ret;
4635
4636	ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val);
4637	if (ret)
4638		return ret;
4639
4640	slice_offset = config->slice_id % 32;
4641	reg_offset = (config->slice_id / 32) * 4;
4642
4643	wren = config->write_scid_en << slice_offset;
4644	ret = regmap_update_bits(drv_data->bcast_regmap,
4645				 cfg->reg_offset[LLCC_TRP_WRS_EN] + reg_offset,
4646				 BIT(slice_offset), wren);
4647	if (ret)
4648		return ret;
4649
4650	wr_cache_en = config->write_scid_cacheable_en << slice_offset;
4651	ret = regmap_update_bits(drv_data->bcast_regmap,
4652				 cfg->reg_offset[LLCC_TRP_WRS_CACHEABLE_EN] + reg_offset,
4653				 BIT(slice_offset), wr_cache_en);
4654	if (ret)
4655		return ret;
4656
4657	stale_en = config->stale_en << slice_offset;
4658	ret = regmap_update_bits(drv_data->bcast_regmap,
4659				 cfg->reg_offset[LLCC_TRP_ALGO_STALE_EN] + reg_offset,
4660				 BIT(slice_offset), stale_en);
4661	if (ret)
4662		return ret;
4663
4664	stale_cap_en = config->stale_cap_en << slice_offset;
4665	ret = regmap_update_bits(drv_data->bcast_regmap,
4666				 cfg->reg_offset[LLCC_TRP_ALGO_STALE_CAP_EN] + reg_offset,
4667				 BIT(slice_offset), stale_cap_en);
4668	if (ret)
4669		return ret;
4670
4671	mru_uncap_en = config->mru_uncap_en << slice_offset;
4672	ret = regmap_update_bits(drv_data->bcast_regmap,
4673				 cfg->reg_offset[LLCC_TRP_ALGO_MRU0] + reg_offset,
4674				 BIT(slice_offset), mru_uncap_en);
4675	if (ret)
4676		return ret;
4677
4678	mru_rollover = config->mru_rollover << slice_offset;
4679	ret = regmap_update_bits(drv_data->bcast_regmap,
4680				 cfg->reg_offset[LLCC_TRP_ALGO_MRU1] + reg_offset,
4681				 BIT(slice_offset), mru_rollover);
4682	if (ret)
4683		return ret;
4684
4685	alloc_oneway_en = config->alloc_oneway_en << slice_offset;
4686	ret = regmap_update_bits(drv_data->bcast_regmap,
4687				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC0] + reg_offset,
4688				 BIT(slice_offset), alloc_oneway_en);
4689	if (ret)
4690		return ret;
4691
4692	ovcap_en = config->ovcap_en << slice_offset;
4693	ret = regmap_update_bits(drv_data->bcast_regmap,
4694				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC1] + reg_offset,
4695				 BIT(slice_offset), ovcap_en);
4696	if (ret)
4697		return ret;
4698
4699	ovcap_prio = config->ovcap_prio << slice_offset;
4700	ret = regmap_update_bits(drv_data->bcast_regmap,
4701				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC2] + reg_offset,
4702				 BIT(slice_offset), ovcap_prio);
4703	if (ret)
4704		return ret;
4705
4706	vict_prio = config->vict_prio << slice_offset;
4707	ret = regmap_update_bits(drv_data->bcast_regmap,
4708				 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC3] + reg_offset,
4709				 BIT(slice_offset), vict_prio);
4710	if (ret)
4711		return ret;
4712
4713	if (config->activate_on_init) {
4714		desc = llcc_slice_getd(config->usecase_id);
4715		if (PTR_ERR_OR_ZERO(desc))
4716			return -EINVAL;
4717
4718		ret = llcc_slice_activate(desc);
4719	}
4720
4721	return ret;
4722}
4723
4724static int qcom_llcc_cfg_program(struct platform_device *pdev,
4725				 const struct qcom_llcc_config *cfg)
4726{
4727	int i;
4728	u32 sz;
4729	int ret = 0;
4730	const struct llcc_slice_config *llcc_table;
4731
4732	sz = drv_data->cfg_size;
4733	llcc_table = drv_data->cfg;
4734
4735	if (drv_data->version >= LLCC_VERSION_6_0_0_0) {
4736		for (i = 0; i < sz; i++) {
4737			ret = _qcom_llcc_cfg_program_v6(&llcc_table[i], cfg);
4738			if (ret)
4739				return ret;
4740		}
4741	} else {
4742		for (i = 0; i < sz; i++) {
4743			ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg);
4744			if (ret)
4745				return ret;
4746		}
4747	}
4748
4749	return ret;
4750}
4751
4752static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
4753{
4754	int ret;
4755
4756	ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
4757	if (ret == -ENOENT || ret == -EOPNOTSUPP) {
4758		if (num_config > 1)
4759			return -EINVAL;
4760		*cfg_index = 0;
4761		return 0;
4762	}
4763
4764	if (!ret && *cfg_index >= num_config)
4765		ret = -EINVAL;
4766
4767	return ret;
4768}
4769
4770static void qcom_llcc_remove(struct platform_device *pdev)
4771{
4772	/* Set the global pointer to a error code to avoid referencing it */
4773	drv_data = ERR_PTR(-ENODEV);
4774}
4775
4776static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index,
4777					  const char *name)
4778{
4779	void __iomem *base;
4780	struct regmap_config llcc_regmap_config = {
4781		.reg_bits = 32,
4782		.reg_stride = 4,
4783		.val_bits = 32,
4784	};
4785
4786	base = devm_platform_ioremap_resource(pdev, index);
4787	if (IS_ERR(base))
4788		return ERR_CAST(base);
4789
4790	llcc_regmap_config.name = name;
4791	return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config);
4792}
4793
4794static int qcom_llcc_probe(struct platform_device *pdev)
4795{
4796	u32 num_banks;
4797	struct device *dev = &pdev->dev;
4798	int ret, i;
4799	struct platform_device *llcc_edac;
4800	const struct qcom_sct_config *cfgs;
4801	const struct qcom_llcc_config *cfg;
4802	const struct llcc_slice_config *llcc_cfg;
4803	u32 sz;
4804	u8 cfg_index;
4805	u32 version;
4806	struct regmap *regmap;
4807
4808	if (!IS_ERR(drv_data))
4809		return -EBUSY;
4810
4811	drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
4812	if (!drv_data) {
4813		ret = -ENOMEM;
4814		goto err;
4815	}
4816
4817	/* Initialize the first LLCC bank regmap */
4818	regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base");
4819	if (IS_ERR(regmap)) {
4820		ret = PTR_ERR(regmap);
4821		goto err;
4822	}
4823
4824	cfgs = of_device_get_match_data(&pdev->dev);
4825	if (!cfgs) {
4826		ret = -EINVAL;
4827		goto err;
4828	}
4829	ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
4830	if (ret)
4831		goto err;
4832	cfg = &cfgs->llcc_config[cfg_index];
4833
4834	if (cfg->num_banks) {
4835		num_banks = cfg->num_banks;
4836	} else {
4837		ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
4838		if (ret)
4839			goto err;
4840
4841		num_banks &= LLCC_LB_CNT_MASK;
4842		num_banks >>= LLCC_LB_CNT_SHIFT;
4843	}
4844
4845	drv_data->num_banks = num_banks;
4846
4847	drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
4848	if (!drv_data->regmaps) {
4849		ret = -ENOMEM;
4850		goto err;
4851	}
4852
4853	drv_data->regmaps[0] = regmap;
4854
4855	/* Initialize rest of LLCC bank regmaps */
4856	for (i = 1; i < num_banks; i++) {
4857		char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i);
4858
4859		drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base);
4860		if (IS_ERR(drv_data->regmaps[i])) {
4861			ret = PTR_ERR(drv_data->regmaps[i]);
4862			goto err;
4863		}
4864	}
4865
4866	drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
4867	if (IS_ERR(drv_data->bcast_regmap)) {
4868		if (cfg->no_broadcast_register) {
4869			drv_data->bcast_regmap = regmap;
4870		} else {
4871			ret = PTR_ERR(drv_data->bcast_regmap);
4872			goto err;
4873		}
4874	}
4875
4876	/* Extract version of the IP */
4877	ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO],
4878			  &version);
4879	if (ret)
4880		goto err;
4881
4882	drv_data->version = version;
4883
4884	/* Applicable only when drv_data->version >= 4.1 */
4885	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4886		drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
4887		if (IS_ERR(drv_data->bcast_and_regmap)) {
4888			ret = PTR_ERR(drv_data->bcast_and_regmap);
4889			if (ret == -EINVAL)
4890				drv_data->bcast_and_regmap = NULL;
4891			else
4892				goto err;
4893		}
4894	}
4895
4896	llcc_cfg = cfg->sct_data;
4897	sz = cfg->size;
4898
4899	for (i = 0; i < sz; i++)
4900		if (llcc_cfg[i].slice_id > drv_data->max_slices)
4901			drv_data->max_slices = llcc_cfg[i].slice_id;
4902
4903	drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices,
4904					      GFP_KERNEL);
4905	if (!drv_data->bitmap) {
4906		ret = -ENOMEM;
4907		goto err;
4908	}
4909
4910	drv_data->cfg = llcc_cfg;
4911	drv_data->cfg_size = sz;
4912	drv_data->edac_reg_offset = cfg->edac_reg_offset;
4913	drv_data->ecc_irq_configured = cfg->irq_configured;
4914	mutex_init(&drv_data->lock);
4915	platform_set_drvdata(pdev, drv_data);
4916
4917	ret = qcom_llcc_cfg_program(pdev, cfg);
4918	if (ret)
4919		goto err;
4920
4921	drv_data->ecc_irq = platform_get_irq_optional(pdev, 0);
4922
4923	/*
4924	 * On some platforms, the access to EDAC registers will be locked by
4925	 * the bootloader. So probing the EDAC driver will result in a crash.
4926	 * Hence, disable the creation of EDAC platform device for the
4927	 * problematic platforms.
4928	 */
4929	if (!cfg->no_edac) {
4930		llcc_edac = platform_device_register_data(&pdev->dev,
4931						"qcom_llcc_edac", -1, drv_data,
4932						sizeof(*drv_data));
4933		if (IS_ERR(llcc_edac))
4934			dev_err(dev, "Failed to register llcc edac driver\n");
4935	}
4936
4937	return 0;
4938err:
4939	drv_data = ERR_PTR(-ENODEV);
4940	return ret;
4941}
4942
4943static const struct of_device_id qcom_llcc_of_match[] = {
4944	{ .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
4945	{ .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs},
4946	{ .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
4947	{ .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs},
4948	{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
4949	{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
4950	{ .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs },
4951	{ .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
4952	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
4953	{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
4954	{ .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
4955	{ .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
4956	{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
4957	{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
4958	{ .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
4959	{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
4960	{ .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
4961	{ .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
4962	{ .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
4963	{ .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
4964	{ .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
4965	{ .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs },
4966	{ .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
4967	{ }
4968};
4969MODULE_DEVICE_TABLE(of, qcom_llcc_of_match);
4970
4971static struct platform_driver qcom_llcc_driver = {
4972	.driver = {
4973		.name = "qcom-llcc",
4974		.of_match_table = qcom_llcc_of_match,
4975	},
4976	.probe = qcom_llcc_probe,
4977	.remove = qcom_llcc_remove,
4978};
4979module_platform_driver(qcom_llcc_driver);
4980
4981MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller");
4982MODULE_LICENSE("GPL v2");