aspeed-lpc-ctrl.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright 2017 IBM Corporation
  4 */
  5
  6#include <linux/clk.h>
  7#include <linux/log2.h>
  8#include <linux/mfd/syscon.h>
  9#include <linux/miscdevice.h>
 10#include <linux/mm.h>
 11#include <linux/module.h>
 12#include <linux/of_address.h>
 13#include <linux/of_reserved_mem.h>
 14#include <linux/platform_device.h>
 15#include <linux/poll.h>
 16#include <linux/regmap.h>
 17
 18#include <linux/aspeed-lpc-ctrl.h>
 19
 20#define DEVICE_NAME	"aspeed-lpc-ctrl"
 21
 22#define HICR5 0x80
 23#define HICR5_ENL2H	BIT(8)
 24#define HICR5_ENFWH	BIT(10)
 25
 26#define HICR6 0x84
 27#define SW_FWH2AHB	BIT(17)
 28
 29#define HICR7 0x88
 30#define HICR8 0x8c
 31
 32struct aspeed_lpc_ctrl {
 33	struct miscdevice	miscdev;
 34	struct regmap		*regmap;
 35	struct clk		*clk;
 36	phys_addr_t		mem_base;
 37	resource_size_t		mem_size;
 38	u32			pnor_size;
 39	u32			pnor_base;
 40	bool			fwh2ahb;
 41	struct regmap		*scu;
 42};
 43
 44static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
 45{
 46	return container_of(file->private_data, struct aspeed_lpc_ctrl,
 47			miscdev);
 48}
 49
 50static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
 51{
 52	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
 53	unsigned long vsize = vma->vm_end - vma->vm_start;
 54	pgprot_t prot = vma->vm_page_prot;
 55
 56	if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT)
 57		return -EINVAL;
 58
 59	/* ast2400/2500 AHB accesses are not cache coherent */
 60	prot = pgprot_noncached(prot);
 61
 62	if (remap_pfn_range(vma, vma->vm_start,
 63		(lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
 64		vsize, prot))
 65		return -EAGAIN;
 66
 67	return 0;
 68}
 69
 70static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
 71		unsigned long param)
 72{
 73	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
 74	struct device *dev = file->private_data;
 75	void __user *p = (void __user *)param;
 76	struct aspeed_lpc_ctrl_mapping map;
 77	u32 addr;
 78	u32 size;
 79	long rc;
 80
 81	if (copy_from_user(&map, p, sizeof(map)))
 82		return -EFAULT;
 83
 84	if (map.flags != 0)
 85		return -EINVAL;
 86
 87	switch (cmd) {
 88	case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
 89		/* The flash windows don't report their size */
 90		if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
 91			return -EINVAL;
 92
 93		/* Support more than one window id in the future */
 94		if (map.window_id != 0)
 95			return -EINVAL;
 96
 97		/* If memory-region is not described in device tree */
 98		if (!lpc_ctrl->mem_size) {
 99			dev_dbg(dev, "Didn't find reserved memory\n");
100			return -ENXIO;
101		}
102
103		map.size = lpc_ctrl->mem_size;
104
105		return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
106	case ASPEED_LPC_CTRL_IOCTL_MAP:
107
108		/*
109		 * The top half of HICR7 is the MSB of the BMC address of the
110		 * mapping.
111		 * The bottom half of HICR7 is the MSB of the HOST LPC
112		 * firmware space address of the mapping.
113		 *
114		 * The 1 bits in the top of half of HICR8 represent the bits
115		 * (in the requested address) that should be ignored and
116		 * replaced with those from the top half of HICR7.
117		 * The 1 bits in the bottom half of HICR8 represent the bits
118		 * (in the requested address) that should be kept and pass
119		 * into the BMC address space.
120		 */
121
122		/*
123		 * It doesn't make sense to talk about a size or offset with
124		 * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
125		 * bits of addresses and sizes.
126		 */
127
128		if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
129			return -EINVAL;
130
131		/*
132		 * Because of the way the masks work in HICR8 offset has to
133		 * be a multiple of size.
134		 */
135		if (map.offset & (map.size - 1))
136			return -EINVAL;
137
138		if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
139			if (!lpc_ctrl->pnor_size) {
140				dev_dbg(dev, "Didn't find host pnor flash\n");
141				return -ENXIO;
142			}
143			addr = lpc_ctrl->pnor_base;
144			size = lpc_ctrl->pnor_size;
145		} else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
146			/* If memory-region is not described in device tree */
147			if (!lpc_ctrl->mem_size) {
148				dev_dbg(dev, "Didn't find reserved memory\n");
149				return -ENXIO;
150			}
151			addr = lpc_ctrl->mem_base;
152			size = lpc_ctrl->mem_size;
153		} else {
154			return -EINVAL;
155		}
156
157		/* Check overflow first! */
158		if (map.offset + map.size < map.offset ||
159			map.offset + map.size > size)
160			return -EINVAL;
161
162		if (map.size == 0 || map.size > size)
163			return -EINVAL;
164
165		addr += map.offset;
166
167		/*
168		 * addr (host lpc address) is safe regardless of values. This
169		 * simply changes the address the host has to request on its
170		 * side of the LPC bus. This cannot impact the hosts own
171		 * memory space by surprise as LPC specific accessors are
172		 * required. The only strange thing that could be done is
173		 * setting the lower 16 bits but the shift takes care of that.
174		 */
175
176		rc = regmap_write(lpc_ctrl->regmap, HICR7,
177				(addr | (map.addr >> 16)));
178		if (rc)
179			return rc;
180
181		rc = regmap_write(lpc_ctrl->regmap, HICR8,
182				(~(map.size - 1)) | ((map.size >> 16) - 1));
183		if (rc)
184			return rc;
185
186		/*
187		 * Switch to FWH2AHB mode, AST2600 only.
188		 */
189		if (lpc_ctrl->fwh2ahb) {
190			/*
191			 * Enable FWH2AHB in SCU debug control register 2. This
192			 * does not turn it on, but makes it available for it
193			 * to be configured in HICR6.
194			 */
195			regmap_update_bits(lpc_ctrl->scu, 0x0D8, BIT(2), 0);
196
197			/*
198			 * The other bits in this register are interrupt status bits
199			 * that are cleared by writing 1. As we don't want to clear
200			 * them, set only the bit of interest.
201			 */
202			regmap_write(lpc_ctrl->regmap, HICR6, SW_FWH2AHB);
203		}
204
205		/*
206		 * Enable LPC FHW cycles. This is required for the host to
207		 * access the regions specified.
208		 */
209		return regmap_update_bits(lpc_ctrl->regmap, HICR5,
210				HICR5_ENFWH | HICR5_ENL2H,
211				HICR5_ENFWH | HICR5_ENL2H);
212	}
213
214	return -EINVAL;
215}
216
217static const struct file_operations aspeed_lpc_ctrl_fops = {
218	.owner		= THIS_MODULE,
219	.mmap		= aspeed_lpc_ctrl_mmap,
220	.unlocked_ioctl	= aspeed_lpc_ctrl_ioctl,
221};
222
223static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
224{
225	struct aspeed_lpc_ctrl *lpc_ctrl;
226	struct device_node *node;
227	struct resource resm;
228	struct device *dev;
229	struct device_node *np;
230	int rc;
231
232	dev = &pdev->dev;
233
234	lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
235	if (!lpc_ctrl)
236		return -ENOMEM;
237
238	/* If flash is described in device tree then store */
239	node = of_parse_phandle(dev->of_node, "flash", 0);
240	if (!node) {
241		dev_dbg(dev, "Didn't find host pnor flash node\n");
242	} else {
243		rc = of_address_to_resource(node, 1, &resm);
244		of_node_put(node);
245		if (rc) {
246			dev_err(dev, "Couldn't address to resource for flash\n");
247			return rc;
248		}
249
250		lpc_ctrl->pnor_size = resource_size(&resm);
251		lpc_ctrl->pnor_base = resm.start;
252	}
253
254
255	dev_set_drvdata(&pdev->dev, lpc_ctrl);
256
257	/* If memory-region is described in device tree then store */
258	rc = of_reserved_mem_region_to_resource(dev->of_node, 0, &resm);
259	if (!rc) {
260		lpc_ctrl->mem_size = resource_size(&resm);
261		lpc_ctrl->mem_base = resm.start;
262
263		if (!is_power_of_2(lpc_ctrl->mem_size)) {
264			dev_err(dev, "Reserved memory size must be a power of 2, got %u\n",
265			       (unsigned int)lpc_ctrl->mem_size);
266			return -EINVAL;
267		}
268
269		if (!IS_ALIGNED(lpc_ctrl->mem_base, lpc_ctrl->mem_size)) {
270			dev_err(dev, "Reserved memory must be naturally aligned for size %u\n",
271			       (unsigned int)lpc_ctrl->mem_size);
272			return -EINVAL;
273		}
274	}
275
276	np = pdev->dev.parent->of_node;
277	if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
278	    !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
279	    !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
280		dev_err(dev, "unsupported LPC device binding\n");
281		return -ENODEV;
282	}
283
284	lpc_ctrl->regmap = syscon_node_to_regmap(np);
285	if (IS_ERR(lpc_ctrl->regmap)) {
286		dev_err(dev, "Couldn't get regmap\n");
287		return -ENODEV;
288	}
289
290	if (of_device_is_compatible(dev->of_node, "aspeed,ast2600-lpc-ctrl")) {
291		lpc_ctrl->fwh2ahb = true;
292
293		lpc_ctrl->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2600-scu");
294		if (IS_ERR(lpc_ctrl->scu)) {
295			dev_err(dev, "couldn't find scu\n");
296			return PTR_ERR(lpc_ctrl->scu);
297		}
298	}
299
300	lpc_ctrl->clk = devm_clk_get(dev, NULL);
301	if (IS_ERR(lpc_ctrl->clk))
302		return dev_err_probe(dev, PTR_ERR(lpc_ctrl->clk),
303				     "couldn't get clock\n");
304	rc = clk_prepare_enable(lpc_ctrl->clk);
305	if (rc) {
306		dev_err(dev, "couldn't enable clock\n");
307		return rc;
308	}
309
310	lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
311	lpc_ctrl->miscdev.name = DEVICE_NAME;
312	lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
313	lpc_ctrl->miscdev.parent = dev;
314	rc = misc_register(&lpc_ctrl->miscdev);
315	if (rc) {
316		dev_err(dev, "Unable to register device\n");
317		goto err;
318	}
319
320	return 0;
321
322err:
323	clk_disable_unprepare(lpc_ctrl->clk);
324	return rc;
325}
326
327static void aspeed_lpc_ctrl_remove(struct platform_device *pdev)
328{
329	struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
330
331	misc_deregister(&lpc_ctrl->miscdev);
332	clk_disable_unprepare(lpc_ctrl->clk);
333}
334
335static const struct of_device_id aspeed_lpc_ctrl_match[] = {
336	{ .compatible = "aspeed,ast2400-lpc-ctrl" },
337	{ .compatible = "aspeed,ast2500-lpc-ctrl" },
338	{ .compatible = "aspeed,ast2600-lpc-ctrl" },
339	{ },
340};
341
342static struct platform_driver aspeed_lpc_ctrl_driver = {
343	.driver = {
344		.name		= DEVICE_NAME,
345		.of_match_table = aspeed_lpc_ctrl_match,
346	},
347	.probe = aspeed_lpc_ctrl_probe,
348	.remove = aspeed_lpc_ctrl_remove,
349};
350
351module_platform_driver(aspeed_lpc_ctrl_driver);
352
353MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
354MODULE_LICENSE("GPL");
355MODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
356MODULE_DESCRIPTION("Control for ASPEED LPC HOST to BMC mappings");