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smartpqi_init.c
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linux-6.19.14/drivers/scsi/smartpqi/smartpqi_init.c
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * driver for Microchip PQI-based storage controllers 4 * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries 5 * Copyright (c) 2016-2018 Microsemi Corporation 6 * Copyright (c) 2016 PMC-Sierra, Inc. 7 * 8 * Questions/Comments/Bugfixes to storagedev@microchip.com 9 * 10 */ 11 12#include <linux/module.h> 13#include <linux/kernel.h> 14#include <linux/pci.h> 15#include <linux/delay.h> 16#include <linux/interrupt.h> 17#include <linux/sched.h> 18#include <linux/rtc.h> 19#include <linux/bcd.h> 20#include <linux/reboot.h> 21#include <linux/cciss_ioctl.h> 22#include <linux/crash_dump.h> 23#include <linux/string.h> 24#include <scsi/scsi_host.h> 25#include <scsi/scsi_cmnd.h> 26#include <scsi/scsi_device.h> 27#include <scsi/scsi_eh.h> 28#include <scsi/scsi_transport_sas.h> 29#include <linux/unaligned.h> 30#include "smartpqi.h" 31#include "smartpqi_sis.h" 32 33#if !defined(BUILD_TIMESTAMP) 34#define BUILD_TIMESTAMP 35#endif 36 37#define DRIVER_VERSION "2.1.36-026" 38#define DRIVER_MAJOR 2 39#define DRIVER_MINOR 1 40#define DRIVER_RELEASE 36 41#define DRIVER_REVISION 26 42 43#define DRIVER_NAME "Microchip SmartPQI Driver (v" \ 44 DRIVER_VERSION BUILD_TIMESTAMP ")" 45#define DRIVER_NAME_SHORT "smartpqi" 46 47#define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor)) 48 49#define PQI_POST_RESET_DELAY_SECS 5 50#define PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS 10 51 52#define PQI_NO_COMPLETION ((void *)-1) 53 54MODULE_AUTHOR("Microchip"); 55MODULE_DESCRIPTION("Driver for Microchip Smart Family Controller version " 56 DRIVER_VERSION); 57MODULE_VERSION(DRIVER_VERSION); 58MODULE_LICENSE("GPL"); 59 60struct pqi_cmd_priv { 61 int this_residual; 62}; 63 64static struct pqi_cmd_priv *pqi_cmd_priv(struct scsi_cmnd *cmd) 65{ 66 return scsi_cmd_priv(cmd); 67} 68 69static void pqi_verify_structures(void); 70static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 71 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason); 72static void pqi_take_ctrl_devices_offline(struct pqi_ctrl_info *ctrl_info); 73static void pqi_ctrl_offline_worker(struct work_struct *work); 74static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); 75static void pqi_scan_start(struct Scsi_Host *shost); 76static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 77 struct pqi_queue_group *queue_group, enum pqi_io_path path, 78 struct pqi_io_request *io_request); 79static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 80 struct pqi_iu_header *request, unsigned int flags, 81 struct pqi_raid_error_info *error_info); 82static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 83 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 84 unsigned int cdb_length, struct pqi_queue_group *queue_group, 85 struct pqi_encryption_info *encryption_info, bool raid_bypass, bool io_high_prio); 86static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 87 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 88 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 89 struct pqi_scsi_dev_raid_map_data *rmd); 90static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 91 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 92 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 93 struct pqi_scsi_dev_raid_map_data *rmd); 94static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info); 95static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info); 96static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs); 97static void pqi_host_setup_buffer(struct pqi_ctrl_info *ctrl_info, struct pqi_host_memory_descriptor *host_memory_descriptor, u32 total_size, u32 min_size); 98static void pqi_host_free_buffer(struct pqi_ctrl_info *ctrl_info, struct pqi_host_memory_descriptor *host_memory_descriptor); 99static int pqi_host_memory_update(struct pqi_ctrl_info *ctrl_info, struct pqi_host_memory_descriptor *host_memory_descriptor, u16 function_code); 100static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 101 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs); 102static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info); 103static void pqi_tmf_worker(struct work_struct *work); 104 105/* for flags argument to pqi_submit_raid_request_synchronous() */ 106#define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 107 108static struct scsi_transport_template *pqi_sas_transport_template; 109 110static atomic_t pqi_controller_count = ATOMIC_INIT(0); 111 112enum pqi_lockup_action { 113 NONE, 114 REBOOT, 115 PANIC 116}; 117 118static enum pqi_lockup_action pqi_lockup_action = NONE; 119 120static struct { 121 enum pqi_lockup_action action; 122 char *name; 123} pqi_lockup_actions[] = { 124 { 125 .action = NONE, 126 .name = "none", 127 }, 128 { 129 .action = REBOOT, 130 .name = "reboot", 131 }, 132 { 133 .action = PANIC, 134 .name = "panic", 135 }, 136}; 137 138static unsigned int pqi_supported_event_types[] = { 139 PQI_EVENT_TYPE_HOTPLUG, 140 PQI_EVENT_TYPE_HARDWARE, 141 PQI_EVENT_TYPE_PHYSICAL_DEVICE, 142 PQI_EVENT_TYPE_LOGICAL_DEVICE, 143 PQI_EVENT_TYPE_OFA, 144 PQI_EVENT_TYPE_AIO_STATE_CHANGE, 145 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE, 146}; 147 148static int pqi_disable_device_id_wildcards; 149module_param_named(disable_device_id_wildcards, 150 pqi_disable_device_id_wildcards, int, 0644); 151MODULE_PARM_DESC(disable_device_id_wildcards, 152 "Disable device ID wildcards."); 153 154static int pqi_disable_heartbeat; 155module_param_named(disable_heartbeat, 156 pqi_disable_heartbeat, int, 0644); 157MODULE_PARM_DESC(disable_heartbeat, 158 "Disable heartbeat."); 159 160static int pqi_disable_ctrl_shutdown; 161module_param_named(disable_ctrl_shutdown, 162 pqi_disable_ctrl_shutdown, int, 0644); 163MODULE_PARM_DESC(disable_ctrl_shutdown, 164 "Disable controller shutdown when controller locked up."); 165 166static char *pqi_lockup_action_param; 167module_param_named(lockup_action, 168 pqi_lockup_action_param, charp, 0644); 169MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 170 "\t\tSupported: none, reboot, panic\n" 171 "\t\tDefault: none"); 172 173static int pqi_expose_ld_first; 174module_param_named(expose_ld_first, 175 pqi_expose_ld_first, int, 0644); 176MODULE_PARM_DESC(expose_ld_first, "Expose logical drives before physical drives."); 177 178static int pqi_hide_vsep; 179module_param_named(hide_vsep, 180 pqi_hide_vsep, int, 0644); 181MODULE_PARM_DESC(hide_vsep, "Hide the virtual SEP for direct attached drives."); 182 183static int pqi_disable_managed_interrupts; 184module_param_named(disable_managed_interrupts, 185 pqi_disable_managed_interrupts, int, 0644); 186MODULE_PARM_DESC(disable_managed_interrupts, 187 "Disable the kernel automatically assigning SMP affinity to IRQs."); 188 189static unsigned int pqi_ctrl_ready_timeout_secs; 190module_param_named(ctrl_ready_timeout, 191 pqi_ctrl_ready_timeout_secs, uint, 0644); 192MODULE_PARM_DESC(ctrl_ready_timeout, 193 "Timeout in seconds for driver to wait for controller ready."); 194 195static char *raid_levels[] = { 196 "RAID-0", 197 "RAID-4", 198 "RAID-1(1+0)", 199 "RAID-5", 200 "RAID-5+1", 201 "RAID-6", 202 "RAID-1(Triple)", 203}; 204 205static char *pqi_raid_level_to_string(u8 raid_level) 206{ 207 if (raid_level < ARRAY_SIZE(raid_levels)) 208 return raid_levels[raid_level]; 209 210 return "RAID UNKNOWN"; 211} 212 213#define SA_RAID_0 0 214#define SA_RAID_4 1 215#define SA_RAID_1 2 /* also used for RAID 10 */ 216#define SA_RAID_5 3 /* also used for RAID 50 */ 217#define SA_RAID_51 4 218#define SA_RAID_6 5 /* also used for RAID 60 */ 219#define SA_RAID_TRIPLE 6 /* also used for RAID 1+0 Triple */ 220#define SA_RAID_MAX SA_RAID_TRIPLE 221#define SA_RAID_UNKNOWN 0xff 222 223static inline void pqi_scsi_done(struct scsi_cmnd *scmd) 224{ 225 pqi_prep_for_scsi_done(scmd); 226 scsi_done(scmd); 227} 228 229static inline void pqi_disable_write_same(struct scsi_device *sdev) 230{ 231 sdev->no_write_same = 1; 232} 233 234static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) 235{ 236 return memcmp(scsi3addr1, scsi3addr2, 8) == 0; 237} 238 239static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) 240{ 241 return !device->is_physical_device; 242} 243 244static inline bool pqi_is_external_raid_addr(u8 *scsi3addr) 245{ 246 return scsi3addr[2] != 0; 247} 248 249static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 250{ 251 return !ctrl_info->controller_online; 252} 253 254static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) 255{ 256 if (ctrl_info->controller_online) 257 if (!sis_is_firmware_running(ctrl_info)) 258 pqi_take_ctrl_offline(ctrl_info, PQI_FIRMWARE_KERNEL_NOT_UP); 259} 260 261static inline bool pqi_is_hba_lunid(u8 *scsi3addr) 262{ 263 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); 264} 265 266#define PQI_DRIVER_SCRATCH_PQI_MODE 0x1 267#define PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED 0x2 268 269static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(struct pqi_ctrl_info *ctrl_info) 270{ 271 return sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_PQI_MODE ? PQI_MODE : SIS_MODE; 272} 273 274static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, 275 enum pqi_ctrl_mode mode) 276{ 277 u32 driver_scratch; 278 279 driver_scratch = sis_read_driver_scratch(ctrl_info); 280 281 if (mode == PQI_MODE) 282 driver_scratch |= PQI_DRIVER_SCRATCH_PQI_MODE; 283 else 284 driver_scratch &= ~PQI_DRIVER_SCRATCH_PQI_MODE; 285 286 sis_write_driver_scratch(ctrl_info, driver_scratch); 287} 288 289static inline bool pqi_is_fw_triage_supported(struct pqi_ctrl_info *ctrl_info) 290{ 291 return (sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED) != 0; 292} 293 294static inline void pqi_save_fw_triage_setting(struct pqi_ctrl_info *ctrl_info, bool is_supported) 295{ 296 u32 driver_scratch; 297 298 driver_scratch = sis_read_driver_scratch(ctrl_info); 299 300 if (is_supported) 301 driver_scratch |= PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 302 else 303 driver_scratch &= ~PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 304 305 sis_write_driver_scratch(ctrl_info, driver_scratch); 306} 307 308static inline void pqi_ctrl_block_scan(struct pqi_ctrl_info *ctrl_info) 309{ 310 ctrl_info->scan_blocked = true; 311 mutex_lock(&ctrl_info->scan_mutex); 312} 313 314static inline void pqi_ctrl_unblock_scan(struct pqi_ctrl_info *ctrl_info) 315{ 316 ctrl_info->scan_blocked = false; 317 mutex_unlock(&ctrl_info->scan_mutex); 318} 319 320static inline bool pqi_ctrl_scan_blocked(struct pqi_ctrl_info *ctrl_info) 321{ 322 return ctrl_info->scan_blocked; 323} 324 325static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info) 326{ 327 mutex_lock(&ctrl_info->lun_reset_mutex); 328} 329 330static inline void pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info *ctrl_info) 331{ 332 mutex_unlock(&ctrl_info->lun_reset_mutex); 333} 334 335static inline void pqi_scsi_block_requests(struct pqi_ctrl_info *ctrl_info) 336{ 337 struct Scsi_Host *shost; 338 unsigned int num_loops; 339 int msecs_sleep; 340 341 shost = ctrl_info->scsi_host; 342 343 scsi_block_requests(shost); 344 345 num_loops = 0; 346 msecs_sleep = 20; 347 while (scsi_host_busy(shost)) { 348 num_loops++; 349 if (num_loops == 10) 350 msecs_sleep = 500; 351 msleep(msecs_sleep); 352 } 353} 354 355static inline void pqi_scsi_unblock_requests(struct pqi_ctrl_info *ctrl_info) 356{ 357 scsi_unblock_requests(ctrl_info->scsi_host); 358} 359 360static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info) 361{ 362 atomic_inc(&ctrl_info->num_busy_threads); 363} 364 365static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info) 366{ 367 atomic_dec(&ctrl_info->num_busy_threads); 368} 369 370static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 371{ 372 return ctrl_info->block_requests; 373} 374 375static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info) 376{ 377 ctrl_info->block_requests = true; 378} 379 380static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info) 381{ 382 ctrl_info->block_requests = false; 383 wake_up_all(&ctrl_info->block_requests_wait); 384} 385 386static void pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 387{ 388 if (!pqi_ctrl_blocked(ctrl_info)) 389 return; 390 391 atomic_inc(&ctrl_info->num_blocked_threads); 392 wait_event(ctrl_info->block_requests_wait, 393 !pqi_ctrl_blocked(ctrl_info)); 394 atomic_dec(&ctrl_info->num_blocked_threads); 395} 396 397#define PQI_QUIESCE_WARNING_TIMEOUT_SECS 10 398 399static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info) 400{ 401 unsigned long start_jiffies; 402 unsigned long warning_timeout; 403 bool displayed_warning; 404 405 displayed_warning = false; 406 start_jiffies = jiffies; 407 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 408 409 while (atomic_read(&ctrl_info->num_busy_threads) > 410 atomic_read(&ctrl_info->num_blocked_threads)) { 411 if (time_after(jiffies, warning_timeout)) { 412 dev_warn(&ctrl_info->pci_dev->dev, 413 "waiting %u seconds for driver activity to quiesce\n", 414 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 415 displayed_warning = true; 416 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + jiffies; 417 } 418 usleep_range(1000, 2000); 419 } 420 421 if (displayed_warning) 422 dev_warn(&ctrl_info->pci_dev->dev, 423 "driver activity quiesced after waiting for %u seconds\n", 424 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 425} 426 427static inline bool pqi_device_offline(struct pqi_scsi_dev *device) 428{ 429 return device->device_offline; 430} 431 432static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info) 433{ 434 mutex_lock(&ctrl_info->ofa_mutex); 435} 436 437static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info) 438{ 439 mutex_unlock(&ctrl_info->ofa_mutex); 440} 441 442static inline void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info) 443{ 444 mutex_lock(&ctrl_info->ofa_mutex); 445 mutex_unlock(&ctrl_info->ofa_mutex); 446} 447 448static inline bool pqi_ofa_in_progress(struct pqi_ctrl_info *ctrl_info) 449{ 450 return mutex_is_locked(&ctrl_info->ofa_mutex); 451} 452 453static inline void pqi_device_remove_start(struct pqi_scsi_dev *device) 454{ 455 device->in_remove = true; 456} 457 458static inline bool pqi_device_in_remove(struct pqi_scsi_dev *device) 459{ 460 return device->in_remove; 461} 462 463static inline void pqi_device_reset_start(struct pqi_scsi_dev *device, u8 lun) 464{ 465 device->in_reset[lun] = true; 466} 467 468static inline void pqi_device_reset_done(struct pqi_scsi_dev *device, u8 lun) 469{ 470 device->in_reset[lun] = false; 471} 472 473static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device, u8 lun) 474{ 475 return device->in_reset[lun]; 476} 477 478static inline int pqi_event_type_to_event_index(unsigned int event_type) 479{ 480 int index; 481 482 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++) 483 if (event_type == pqi_supported_event_types[index]) 484 return index; 485 486 return -1; 487} 488 489static inline bool pqi_is_supported_event(unsigned int event_type) 490{ 491 return pqi_event_type_to_event_index(event_type) != -1; 492} 493 494static inline void pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info *ctrl_info, 495 unsigned long delay) 496{ 497 if (pqi_ctrl_offline(ctrl_info)) 498 return; 499 500 schedule_delayed_work(&ctrl_info->rescan_work, delay); 501} 502 503static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) 504{ 505 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0); 506} 507 508#define PQI_RESCAN_WORK_DELAY (10 * HZ) 509 510static inline void pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info *ctrl_info) 511{ 512 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY); 513} 514 515static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info) 516{ 517 cancel_delayed_work_sync(&ctrl_info->rescan_work); 518} 519 520static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info) 521{ 522 if (!ctrl_info->heartbeat_counter) 523 return 0; 524 525 return readl(ctrl_info->heartbeat_counter); 526} 527 528static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 529{ 530 return readb(ctrl_info->soft_reset_status); 531} 532 533static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 534{ 535 u8 status; 536 537 status = pqi_read_soft_reset_status(ctrl_info); 538 status &= ~PQI_SOFT_RESET_ABORT; 539 writeb(status, ctrl_info->soft_reset_status); 540} 541 542static inline bool pqi_is_io_high_priority(struct pqi_scsi_dev *device, struct scsi_cmnd *scmd) 543{ 544 bool io_high_prio; 545 int priority_class; 546 547 io_high_prio = false; 548 549 if (device->ncq_prio_enable) { 550 priority_class = 551 IOPRIO_PRIO_CLASS(req_get_ioprio(scsi_cmd_to_rq(scmd))); 552 if (priority_class == IOPRIO_CLASS_RT) { 553 /* Set NCQ priority for read/write commands. */ 554 switch (scmd->cmnd[0]) { 555 case WRITE_16: 556 case READ_16: 557 case WRITE_12: 558 case READ_12: 559 case WRITE_10: 560 case READ_10: 561 case WRITE_6: 562 case READ_6: 563 io_high_prio = true; 564 break; 565 } 566 } 567 } 568 569 return io_high_prio; 570} 571 572static int pqi_map_single(struct pci_dev *pci_dev, 573 struct pqi_sg_descriptor *sg_descriptor, void *buffer, 574 size_t buffer_length, enum dma_data_direction data_direction) 575{ 576 dma_addr_t bus_address; 577 578 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE) 579 return 0; 580 581 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length, 582 data_direction); 583 if (dma_mapping_error(&pci_dev->dev, bus_address)) 584 return -ENOMEM; 585 586 put_unaligned_le64((u64)bus_address, &sg_descriptor->address); 587 put_unaligned_le32(buffer_length, &sg_descriptor->length); 588 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 589 590 return 0; 591} 592 593static void pqi_pci_unmap(struct pci_dev *pci_dev, 594 struct pqi_sg_descriptor *descriptors, int num_descriptors, 595 enum dma_data_direction data_direction) 596{ 597 int i; 598 599 if (data_direction == DMA_NONE) 600 return; 601 602 for (i = 0; i < num_descriptors; i++) 603 dma_unmap_single(&pci_dev->dev, 604 (dma_addr_t)get_unaligned_le64(&descriptors[i].address), 605 get_unaligned_le32(&descriptors[i].length), 606 data_direction); 607} 608 609static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, 610 struct pqi_raid_path_request *request, u8 cmd, 611 u8 *scsi3addr, void *buffer, size_t buffer_length, 612 u16 vpd_page, enum dma_data_direction *dir) 613{ 614 u8 *cdb; 615 size_t cdb_length = buffer_length; 616 617 memset(request, 0, sizeof(*request)); 618 619 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 620 put_unaligned_le16(offsetof(struct pqi_raid_path_request, 621 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, 622 &request->header.iu_length); 623 put_unaligned_le32(buffer_length, &request->buffer_length); 624 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); 625 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 626 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 627 628 cdb = request->cdb; 629 630 switch (cmd) { 631 case INQUIRY: 632 request->data_direction = SOP_READ_FLAG; 633 cdb[0] = INQUIRY; 634 if (vpd_page & VPD_PAGE) { 635 cdb[1] = 0x1; 636 cdb[2] = (u8)vpd_page; 637 } 638 cdb[4] = (u8)cdb_length; 639 break; 640 case CISS_REPORT_LOG: 641 case CISS_REPORT_PHYS: 642 request->data_direction = SOP_READ_FLAG; 643 cdb[0] = cmd; 644 if (cmd == CISS_REPORT_PHYS) { 645 if (ctrl_info->rpl_extended_format_4_5_supported) 646 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4; 647 else 648 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2; 649 } else { 650 cdb[1] = ctrl_info->ciss_report_log_flags; 651 } 652 put_unaligned_be32(cdb_length, &cdb[6]); 653 break; 654 case CISS_GET_RAID_MAP: 655 request->data_direction = SOP_READ_FLAG; 656 cdb[0] = CISS_READ; 657 cdb[1] = CISS_GET_RAID_MAP; 658 put_unaligned_be32(cdb_length, &cdb[6]); 659 break; 660 case SA_FLUSH_CACHE: 661 request->header.driver_flags = PQI_DRIVER_NONBLOCKABLE_REQUEST; 662 request->data_direction = SOP_WRITE_FLAG; 663 cdb[0] = BMIC_WRITE; 664 cdb[6] = BMIC_FLUSH_CACHE; 665 put_unaligned_be16(cdb_length, &cdb[7]); 666 break; 667 case BMIC_SENSE_DIAG_OPTIONS: 668 cdb_length = 0; 669 fallthrough; 670 case BMIC_IDENTIFY_CONTROLLER: 671 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 672 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 673 case BMIC_SENSE_FEATURE: 674 request->data_direction = SOP_READ_FLAG; 675 cdb[0] = BMIC_READ; 676 cdb[6] = cmd; 677 put_unaligned_be16(cdb_length, &cdb[7]); 678 break; 679 case BMIC_SET_DIAG_OPTIONS: 680 cdb_length = 0; 681 fallthrough; 682 case BMIC_WRITE_HOST_WELLNESS: 683 request->data_direction = SOP_WRITE_FLAG; 684 cdb[0] = BMIC_WRITE; 685 cdb[6] = cmd; 686 put_unaligned_be16(cdb_length, &cdb[7]); 687 break; 688 case BMIC_CSMI_PASSTHRU: 689 request->data_direction = SOP_BIDIRECTIONAL; 690 cdb[0] = BMIC_WRITE; 691 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU; 692 cdb[6] = cmd; 693 put_unaligned_be16(cdb_length, &cdb[7]); 694 break; 695 default: 696 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd); 697 break; 698 } 699 700 switch (request->data_direction) { 701 case SOP_READ_FLAG: 702 *dir = DMA_FROM_DEVICE; 703 break; 704 case SOP_WRITE_FLAG: 705 *dir = DMA_TO_DEVICE; 706 break; 707 case SOP_NO_DIRECTION_FLAG: 708 *dir = DMA_NONE; 709 break; 710 default: 711 *dir = DMA_BIDIRECTIONAL; 712 break; 713 } 714 715 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], 716 buffer, buffer_length, *dir); 717} 718 719static inline void pqi_reinit_io_request(struct pqi_io_request *io_request) 720{ 721 io_request->scmd = NULL; 722 io_request->status = 0; 723 io_request->error_info = NULL; 724 io_request->raid_bypass = false; 725} 726 727static inline struct pqi_io_request *pqi_alloc_io_request(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd) 728{ 729 struct pqi_io_request *io_request; 730 u16 i; 731 732 if (scmd) { /* SML I/O request */ 733 u32 blk_tag = blk_mq_unique_tag(scsi_cmd_to_rq(scmd)); 734 735 i = blk_mq_unique_tag_to_tag(blk_tag); 736 io_request = &ctrl_info->io_request_pool[i]; 737 if (atomic_inc_return(&io_request->refcount) > 1) { 738 atomic_dec(&io_request->refcount); 739 return NULL; 740 } 741 } else { /* IOCTL or driver internal request */ 742 /* 743 * benignly racy - may have to wait for an open slot. 744 * command slot range is scsi_ml_can_queue - 745 * [scsi_ml_can_queue + (PQI_RESERVED_IO_SLOTS - 1)] 746 */ 747 i = 0; 748 while (1) { 749 io_request = &ctrl_info->io_request_pool[ctrl_info->scsi_ml_can_queue + i]; 750 if (atomic_inc_return(&io_request->refcount) == 1) 751 break; 752 atomic_dec(&io_request->refcount); 753 i = (i + 1) % PQI_RESERVED_IO_SLOTS; 754 } 755 } 756 757 if (io_request) 758 pqi_reinit_io_request(io_request); 759 760 return io_request; 761} 762 763static void pqi_free_io_request(struct pqi_io_request *io_request) 764{ 765 atomic_dec(&io_request->refcount); 766} 767 768static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd, 769 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page, 770 struct pqi_raid_error_info *error_info) 771{ 772 int rc; 773 struct pqi_raid_path_request request; 774 enum dma_data_direction dir; 775 776 rc = pqi_build_raid_path_request(ctrl_info, &request, cmd, scsi3addr, 777 buffer, buffer_length, vpd_page, &dir); 778 if (rc) 779 return rc; 780 781 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, error_info); 782 783 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 784 785 return rc; 786} 787 788/* helper functions for pqi_send_scsi_raid_request */ 789 790static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info, 791 u8 cmd, void *buffer, size_t buffer_length) 792{ 793 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 794 buffer, buffer_length, 0, NULL); 795} 796 797static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info, 798 u8 cmd, void *buffer, size_t buffer_length, 799 struct pqi_raid_error_info *error_info) 800{ 801 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 802 buffer, buffer_length, 0, error_info); 803} 804 805static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, 806 struct bmic_identify_controller *buffer) 807{ 808 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER, 809 buffer, sizeof(*buffer)); 810} 811 812static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info, 813 struct bmic_sense_subsystem_info *sense_info) 814{ 815 return pqi_send_ctrl_raid_request(ctrl_info, 816 BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info, 817 sizeof(*sense_info)); 818} 819 820static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, 821 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) 822{ 823 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr, 824 buffer, buffer_length, vpd_page, NULL); 825} 826 827static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, 828 struct pqi_scsi_dev *device, 829 struct bmic_identify_physical_device *buffer, size_t buffer_length) 830{ 831 int rc; 832 enum dma_data_direction dir; 833 u16 bmic_device_index; 834 struct pqi_raid_path_request request; 835 836 rc = pqi_build_raid_path_request(ctrl_info, &request, 837 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, 838 buffer_length, 0, &dir); 839 if (rc) 840 return rc; 841 842 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); 843 request.cdb[2] = (u8)bmic_device_index; 844 request.cdb[9] = (u8)(bmic_device_index >> 8); 845 846 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 847 848 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 849 850 return rc; 851} 852 853static inline u32 pqi_aio_limit_to_bytes(__le16 *limit) 854{ 855 u32 bytes; 856 857 bytes = get_unaligned_le16(limit); 858 if (bytes == 0) 859 bytes = ~0; 860 else 861 bytes *= 1024; 862 863 return bytes; 864} 865 866#pragma pack(1) 867 868struct bmic_sense_feature_buffer { 869 struct bmic_sense_feature_buffer_header header; 870 struct bmic_sense_feature_io_page_aio_subpage aio_subpage; 871}; 872 873#pragma pack() 874 875#define MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH \ 876 offsetofend(struct bmic_sense_feature_buffer, \ 877 aio_subpage.max_write_raid_1_10_3drive) 878 879#define MINIMUM_AIO_SUBPAGE_LENGTH \ 880 (offsetofend(struct bmic_sense_feature_io_page_aio_subpage, \ 881 max_write_raid_1_10_3drive) - \ 882 sizeof_field(struct bmic_sense_feature_io_page_aio_subpage, header)) 883 884static int pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info *ctrl_info) 885{ 886 int rc; 887 enum dma_data_direction dir; 888 struct pqi_raid_path_request request; 889 struct bmic_sense_feature_buffer *buffer; 890 891 buffer = kmalloc(sizeof(*buffer), GFP_KERNEL); 892 if (!buffer) 893 return -ENOMEM; 894 895 rc = pqi_build_raid_path_request(ctrl_info, &request, BMIC_SENSE_FEATURE, RAID_CTLR_LUNID, 896 buffer, sizeof(*buffer), 0, &dir); 897 if (rc) 898 goto error; 899 900 request.cdb[2] = BMIC_SENSE_FEATURE_IO_PAGE; 901 request.cdb[3] = BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE; 902 903 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 904 905 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 906 907 if (rc) 908 goto error; 909 910 if (buffer->header.page_code != BMIC_SENSE_FEATURE_IO_PAGE || 911 buffer->header.subpage_code != 912 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 913 get_unaligned_le16(&buffer->header.buffer_length) < 914 MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH || 915 buffer->aio_subpage.header.page_code != 916 BMIC_SENSE_FEATURE_IO_PAGE || 917 buffer->aio_subpage.header.subpage_code != 918 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 919 get_unaligned_le16(&buffer->aio_subpage.header.page_length) < 920 MINIMUM_AIO_SUBPAGE_LENGTH) { 921 goto error; 922 } 923 924 ctrl_info->max_transfer_encrypted_sas_sata = 925 pqi_aio_limit_to_bytes( 926 &buffer->aio_subpage.max_transfer_encrypted_sas_sata); 927 928 ctrl_info->max_transfer_encrypted_nvme = 929 pqi_aio_limit_to_bytes( 930 &buffer->aio_subpage.max_transfer_encrypted_nvme); 931 932 ctrl_info->max_write_raid_5_6 = 933 pqi_aio_limit_to_bytes( 934 &buffer->aio_subpage.max_write_raid_5_6); 935 936 ctrl_info->max_write_raid_1_10_2drive = 937 pqi_aio_limit_to_bytes( 938 &buffer->aio_subpage.max_write_raid_1_10_2drive); 939 940 ctrl_info->max_write_raid_1_10_3drive = 941 pqi_aio_limit_to_bytes( 942 &buffer->aio_subpage.max_write_raid_1_10_3drive); 943 944error: 945 kfree(buffer); 946 947 return rc; 948} 949 950static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info, 951 enum bmic_flush_cache_shutdown_event shutdown_event) 952{ 953 int rc; 954 struct bmic_flush_cache *flush_cache; 955 956 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL); 957 if (!flush_cache) 958 return -ENOMEM; 959 960 flush_cache->shutdown_event = shutdown_event; 961 962 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache, 963 sizeof(*flush_cache)); 964 965 kfree(flush_cache); 966 967 return rc; 968} 969 970int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 971 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 972 struct pqi_raid_error_info *error_info) 973{ 974 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU, 975 buffer, buffer_length, error_info); 976} 977 978#define PQI_FETCH_PTRAID_DATA (1 << 31) 979 980static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info) 981{ 982 int rc; 983 struct bmic_diag_options *diag; 984 985 diag = kzalloc(sizeof(*diag), GFP_KERNEL); 986 if (!diag) 987 return -ENOMEM; 988 989 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS, 990 diag, sizeof(*diag)); 991 if (rc) 992 goto out; 993 994 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA); 995 996 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag, 997 sizeof(*diag)); 998 999out: 1000 kfree(diag); 1001 1002 return rc; 1003} 1004 1005static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, 1006 void *buffer, size_t buffer_length) 1007{ 1008 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS, 1009 buffer, buffer_length); 1010} 1011 1012#pragma pack(1) 1013 1014struct bmic_host_wellness_driver_version { 1015 u8 start_tag[4]; 1016 u8 driver_version_tag[2]; 1017 __le16 driver_version_length; 1018 char driver_version[32]; 1019 u8 dont_write_tag[2]; 1020 u8 end_tag[2]; 1021}; 1022 1023#pragma pack() 1024 1025static int pqi_write_driver_version_to_host_wellness( 1026 struct pqi_ctrl_info *ctrl_info) 1027{ 1028 int rc; 1029 struct bmic_host_wellness_driver_version *buffer; 1030 size_t buffer_length; 1031 1032 buffer_length = sizeof(*buffer); 1033 1034 buffer = kmalloc(buffer_length, GFP_KERNEL); 1035 if (!buffer) 1036 return -ENOMEM; 1037 1038 buffer->start_tag[0] = '<'; 1039 buffer->start_tag[1] = 'H'; 1040 buffer->start_tag[2] = 'W'; 1041 buffer->start_tag[3] = '>'; 1042 buffer->driver_version_tag[0] = 'D'; 1043 buffer->driver_version_tag[1] = 'V'; 1044 put_unaligned_le16(sizeof(buffer->driver_version), 1045 &buffer->driver_version_length); 1046 strscpy(buffer->driver_version, "Linux " DRIVER_VERSION, 1047 sizeof(buffer->driver_version)); 1048 buffer->dont_write_tag[0] = 'D'; 1049 buffer->dont_write_tag[1] = 'W'; 1050 buffer->end_tag[0] = 'Z'; 1051 buffer->end_tag[1] = 'Z'; 1052 1053 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1054 1055 kfree(buffer); 1056 1057 return rc; 1058} 1059 1060#pragma pack(1) 1061 1062struct bmic_host_wellness_time { 1063 u8 start_tag[4]; 1064 u8 time_tag[2]; 1065 __le16 time_length; 1066 u8 time[8]; 1067 u8 dont_write_tag[2]; 1068 u8 end_tag[2]; 1069}; 1070 1071#pragma pack() 1072 1073static int pqi_write_current_time_to_host_wellness( 1074 struct pqi_ctrl_info *ctrl_info) 1075{ 1076 int rc; 1077 struct bmic_host_wellness_time *buffer; 1078 size_t buffer_length; 1079 time64_t local_time; 1080 unsigned int year; 1081 struct tm tm; 1082 1083 buffer_length = sizeof(*buffer); 1084 1085 buffer = kmalloc(buffer_length, GFP_KERNEL); 1086 if (!buffer) 1087 return -ENOMEM; 1088 1089 buffer->start_tag[0] = '<'; 1090 buffer->start_tag[1] = 'H'; 1091 buffer->start_tag[2] = 'W'; 1092 buffer->start_tag[3] = '>'; 1093 buffer->time_tag[0] = 'T'; 1094 buffer->time_tag[1] = 'D'; 1095 put_unaligned_le16(sizeof(buffer->time), 1096 &buffer->time_length); 1097 1098 local_time = ktime_get_real_seconds(); 1099 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); 1100 year = tm.tm_year + 1900; 1101 1102 buffer->time[0] = bin2bcd(tm.tm_hour); 1103 buffer->time[1] = bin2bcd(tm.tm_min); 1104 buffer->time[2] = bin2bcd(tm.tm_sec); 1105 buffer->time[3] = 0; 1106 buffer->time[4] = bin2bcd(tm.tm_mon + 1); 1107 buffer->time[5] = bin2bcd(tm.tm_mday); 1108 buffer->time[6] = bin2bcd(year / 100); 1109 buffer->time[7] = bin2bcd(year % 100); 1110 1111 buffer->dont_write_tag[0] = 'D'; 1112 buffer->dont_write_tag[1] = 'W'; 1113 buffer->end_tag[0] = 'Z'; 1114 buffer->end_tag[1] = 'Z'; 1115 1116 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1117 1118 kfree(buffer); 1119 1120 return rc; 1121} 1122 1123#define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * HZ) 1124 1125static void pqi_update_time_worker(struct work_struct *work) 1126{ 1127 int rc; 1128 struct pqi_ctrl_info *ctrl_info; 1129 1130 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1131 update_time_work); 1132 1133 rc = pqi_write_current_time_to_host_wellness(ctrl_info); 1134 if (rc) 1135 dev_warn(&ctrl_info->pci_dev->dev, 1136 "error updating time on controller\n"); 1137 1138 schedule_delayed_work(&ctrl_info->update_time_work, 1139 PQI_UPDATE_TIME_WORK_INTERVAL); 1140} 1141 1142static inline void pqi_schedule_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1143{ 1144 schedule_delayed_work(&ctrl_info->update_time_work, 0); 1145} 1146 1147static inline void pqi_cancel_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1148{ 1149 cancel_delayed_work_sync(&ctrl_info->update_time_work); 1150} 1151 1152static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void *buffer, 1153 size_t buffer_length) 1154{ 1155 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, buffer_length); 1156} 1157 1158static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void **buffer) 1159{ 1160 int rc; 1161 size_t lun_list_length; 1162 size_t lun_data_length; 1163 size_t new_lun_list_length; 1164 void *lun_data = NULL; 1165 struct report_lun_header *report_lun_header; 1166 1167 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); 1168 if (!report_lun_header) { 1169 rc = -ENOMEM; 1170 goto out; 1171 } 1172 1173 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, sizeof(*report_lun_header)); 1174 if (rc) 1175 goto out; 1176 1177 lun_list_length = get_unaligned_be32(&report_lun_header->list_length); 1178 1179again: 1180 lun_data_length = sizeof(struct report_lun_header) + lun_list_length; 1181 1182 lun_data = kmalloc(lun_data_length, GFP_KERNEL); 1183 if (!lun_data) { 1184 rc = -ENOMEM; 1185 goto out; 1186 } 1187 1188 if (lun_list_length == 0) { 1189 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); 1190 goto out; 1191 } 1192 1193 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); 1194 if (rc) 1195 goto out; 1196 1197 new_lun_list_length = 1198 get_unaligned_be32(&((struct report_lun_header *)lun_data)->list_length); 1199 1200 if (new_lun_list_length > lun_list_length) { 1201 lun_list_length = new_lun_list_length; 1202 kfree(lun_data); 1203 goto again; 1204 } 1205 1206out: 1207 kfree(report_lun_header); 1208 1209 if (rc) { 1210 kfree(lun_data); 1211 lun_data = NULL; 1212 } 1213 1214 *buffer = lun_data; 1215 1216 return rc; 1217} 1218 1219static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1220{ 1221 int rc; 1222 unsigned int i; 1223 u8 rpl_response_format; 1224 u32 num_physicals; 1225 void *rpl_list; 1226 struct report_lun_header *rpl_header; 1227 struct report_phys_lun_8byte_wwid_list *rpl_8byte_wwid_list; 1228 struct report_phys_lun_16byte_wwid_list *rpl_16byte_wwid_list; 1229 1230 rc = pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, &rpl_list); 1231 if (rc) 1232 return rc; 1233 1234 if (ctrl_info->rpl_extended_format_4_5_supported) { 1235 rpl_header = rpl_list; 1236 rpl_response_format = rpl_header->flags & CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK; 1237 if (rpl_response_format == CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4) { 1238 *buffer = rpl_list; 1239 return 0; 1240 } else if (rpl_response_format != CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2) { 1241 dev_err(&ctrl_info->pci_dev->dev, 1242 "RPL returned unsupported data format %u\n", 1243 rpl_response_format); 1244 rc = -EINVAL; 1245 goto out_free_rpl_list; 1246 } else { 1247 dev_warn(&ctrl_info->pci_dev->dev, 1248 "RPL returned extended format 2 instead of 4\n"); 1249 } 1250 } 1251 1252 rpl_8byte_wwid_list = rpl_list; 1253 num_physicals = get_unaligned_be32(&rpl_8byte_wwid_list->header.list_length) / sizeof(rpl_8byte_wwid_list->lun_entries[0]); 1254 1255 rpl_16byte_wwid_list = kmalloc(struct_size(rpl_16byte_wwid_list, lun_entries, 1256 num_physicals), GFP_KERNEL); 1257 if (!rpl_16byte_wwid_list) { 1258 rc = -ENOMEM; 1259 goto out_free_rpl_list; 1260 } 1261 1262 put_unaligned_be32(num_physicals * sizeof(struct report_phys_lun_16byte_wwid), 1263 &rpl_16byte_wwid_list->header.list_length); 1264 rpl_16byte_wwid_list->header.flags = rpl_8byte_wwid_list->header.flags; 1265 1266 for (i = 0; i < num_physicals; i++) { 1267 memcpy(&rpl_16byte_wwid_list->lun_entries[i].lunid, &rpl_8byte_wwid_list->lun_entries[i].lunid, sizeof(rpl_8byte_wwid_list->lun_entries[i].lunid)); 1268 memcpy(&rpl_16byte_wwid_list->lun_entries[i].wwid[0], &rpl_8byte_wwid_list->lun_entries[i].wwid, sizeof(rpl_8byte_wwid_list->lun_entries[i].wwid)); 1269 memset(&rpl_16byte_wwid_list->lun_entries[i].wwid[8], 0, 8); 1270 rpl_16byte_wwid_list->lun_entries[i].device_type = rpl_8byte_wwid_list->lun_entries[i].device_type; 1271 rpl_16byte_wwid_list->lun_entries[i].device_flags = rpl_8byte_wwid_list->lun_entries[i].device_flags; 1272 rpl_16byte_wwid_list->lun_entries[i].lun_count = rpl_8byte_wwid_list->lun_entries[i].lun_count; 1273 rpl_16byte_wwid_list->lun_entries[i].redundant_paths = rpl_8byte_wwid_list->lun_entries[i].redundant_paths; 1274 rpl_16byte_wwid_list->lun_entries[i].aio_handle = rpl_8byte_wwid_list->lun_entries[i].aio_handle; 1275 } 1276 1277 kfree(rpl_8byte_wwid_list); 1278 *buffer = rpl_16byte_wwid_list; 1279 1280 return 0; 1281 1282out_free_rpl_list: 1283 kfree(rpl_list); 1284 return rc; 1285} 1286 1287static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1288{ 1289 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); 1290} 1291 1292static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, 1293 struct report_phys_lun_16byte_wwid_list **physdev_list, 1294 struct report_log_lun_list **logdev_list) 1295{ 1296 int rc; 1297 size_t logdev_list_length; 1298 size_t logdev_data_length; 1299 struct report_log_lun_list *internal_logdev_list; 1300 struct report_log_lun_list *logdev_data; 1301 struct report_lun_header report_lun_header; 1302 1303 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); 1304 if (rc) 1305 dev_err(&ctrl_info->pci_dev->dev, 1306 "report physical LUNs failed\n"); 1307 1308 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); 1309 if (rc) 1310 dev_err(&ctrl_info->pci_dev->dev, 1311 "report logical LUNs failed\n"); 1312 1313 /* 1314 * Tack the controller itself onto the end of the logical device list 1315 * by adding a list entry that is all zeros. 1316 */ 1317 1318 logdev_data = *logdev_list; 1319 1320 if (logdev_data) { 1321 logdev_list_length = 1322 get_unaligned_be32(&logdev_data->header.list_length); 1323 } else { 1324 memset(&report_lun_header, 0, sizeof(report_lun_header)); 1325 logdev_data = 1326 (struct report_log_lun_list *)&report_lun_header; 1327 logdev_list_length = 0; 1328 } 1329 1330 logdev_data_length = sizeof(struct report_lun_header) + 1331 logdev_list_length; 1332 1333 internal_logdev_list = kmalloc(logdev_data_length + 1334 sizeof(struct report_log_lun), GFP_KERNEL); 1335 if (!internal_logdev_list) { 1336 kfree(*logdev_list); 1337 *logdev_list = NULL; 1338 return -ENOMEM; 1339 } 1340 1341 memcpy(internal_logdev_list, logdev_data, logdev_data_length); 1342 memset((u8 *)internal_logdev_list + logdev_data_length, 0, 1343 sizeof(struct report_log_lun)); 1344 put_unaligned_be32(logdev_list_length + 1345 sizeof(struct report_log_lun), 1346 &internal_logdev_list->header.list_length); 1347 1348 kfree(*logdev_list); 1349 *logdev_list = internal_logdev_list; 1350 1351 return 0; 1352} 1353 1354static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, 1355 int bus, int target, int lun) 1356{ 1357 device->bus = bus; 1358 device->target = target; 1359 device->lun = lun; 1360} 1361 1362static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) 1363{ 1364 u8 *scsi3addr; 1365 u32 lunid; 1366 int bus; 1367 int target; 1368 int lun; 1369 1370 scsi3addr = device->scsi3addr; 1371 lunid = get_unaligned_le32(scsi3addr); 1372 1373 if (pqi_is_hba_lunid(scsi3addr)) { 1374 /* The specified device is the controller. */ 1375 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); 1376 device->target_lun_valid = true; 1377 return; 1378 } 1379 1380 if (pqi_is_logical_device(device)) { 1381 if (device->is_external_raid_device) { 1382 bus = PQI_EXTERNAL_RAID_VOLUME_BUS; 1383 target = (lunid >> 16) & 0x3fff; 1384 lun = lunid & 0xff; 1385 } else { 1386 bus = PQI_RAID_VOLUME_BUS; 1387 target = 0; 1388 lun = lunid & 0x3fff; 1389 } 1390 pqi_set_bus_target_lun(device, bus, target, lun); 1391 device->target_lun_valid = true; 1392 return; 1393 } 1394 1395 /* 1396 * Defer target and LUN assignment for non-controller physical devices 1397 * because the SAS transport layer will make these assignments later. 1398 */ 1399 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); 1400} 1401 1402static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, 1403 struct pqi_scsi_dev *device) 1404{ 1405 int rc; 1406 u8 raid_level; 1407 u8 *buffer; 1408 1409 raid_level = SA_RAID_UNKNOWN; 1410 1411 buffer = kmalloc(64, GFP_KERNEL); 1412 if (buffer) { 1413 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1414 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); 1415 if (rc == 0) { 1416 raid_level = buffer[8]; 1417 if (raid_level > SA_RAID_MAX) 1418 raid_level = SA_RAID_UNKNOWN; 1419 } 1420 kfree(buffer); 1421 } 1422 1423 device->raid_level = raid_level; 1424} 1425 1426static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, 1427 struct pqi_scsi_dev *device, struct raid_map *raid_map) 1428{ 1429 char *err_msg; 1430 u32 raid_map_size; 1431 u32 r5or6_blocks_per_row; 1432 1433 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1434 1435 if (raid_map_size < offsetof(struct raid_map, disk_data)) { 1436 err_msg = "RAID map too small"; 1437 goto bad_raid_map; 1438 } 1439 1440 if (device->raid_level == SA_RAID_1) { 1441 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { 1442 err_msg = "invalid RAID-1 map"; 1443 goto bad_raid_map; 1444 } 1445 } else if (device->raid_level == SA_RAID_TRIPLE) { 1446 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { 1447 err_msg = "invalid RAID-1(Triple) map"; 1448 goto bad_raid_map; 1449 } 1450 } else if ((device->raid_level == SA_RAID_5 || 1451 device->raid_level == SA_RAID_6) && 1452 get_unaligned_le16(&raid_map->layout_map_count) > 1) { 1453 /* RAID 50/60 */ 1454 r5or6_blocks_per_row = 1455 get_unaligned_le16(&raid_map->strip_size) * 1456 get_unaligned_le16(&raid_map->data_disks_per_row); 1457 if (r5or6_blocks_per_row == 0) { 1458 err_msg = "invalid RAID-5 or RAID-6 map"; 1459 goto bad_raid_map; 1460 } 1461 } 1462 1463 return 0; 1464 1465bad_raid_map: 1466 dev_warn(&ctrl_info->pci_dev->dev, 1467 "logical device %08x%08x %s\n", 1468 *((u32 *)&device->scsi3addr), 1469 *((u32 *)&device->scsi3addr[4]), err_msg); 1470 1471 return -EINVAL; 1472} 1473 1474static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, 1475 struct pqi_scsi_dev *device) 1476{ 1477 int rc; 1478 u32 raid_map_size; 1479 struct raid_map *raid_map; 1480 1481 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); 1482 if (!raid_map) 1483 return -ENOMEM; 1484 1485 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1486 device->scsi3addr, raid_map, sizeof(*raid_map), 0, NULL); 1487 if (rc) 1488 goto error; 1489 1490 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1491 1492 if (raid_map_size > sizeof(*raid_map)) { 1493 1494 kfree(raid_map); 1495 1496 raid_map = kmalloc(raid_map_size, GFP_KERNEL); 1497 if (!raid_map) 1498 return -ENOMEM; 1499 1500 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1501 device->scsi3addr, raid_map, raid_map_size, 0, NULL); 1502 if (rc) 1503 goto error; 1504 1505 if (get_unaligned_le32(&raid_map->structure_size) 1506 != raid_map_size) { 1507 dev_warn(&ctrl_info->pci_dev->dev, 1508 "requested %u bytes, received %u bytes\n", 1509 raid_map_size, 1510 get_unaligned_le32(&raid_map->structure_size)); 1511 rc = -EINVAL; 1512 goto error; 1513 } 1514 } 1515 1516 rc = pqi_validate_raid_map(ctrl_info, device, raid_map); 1517 if (rc) 1518 goto error; 1519 1520 device->raid_io_stats = alloc_percpu(struct pqi_raid_io_stats); 1521 if (!device->raid_io_stats) { 1522 rc = -ENOMEM; 1523 goto error; 1524 } 1525 1526 device->raid_map = raid_map; 1527 1528 return 0; 1529 1530error: 1531 kfree(raid_map); 1532 1533 return rc; 1534} 1535 1536static void pqi_set_max_transfer_encrypted(struct pqi_ctrl_info *ctrl_info, 1537 struct pqi_scsi_dev *device) 1538{ 1539 if (!ctrl_info->lv_drive_type_mix_valid) { 1540 device->max_transfer_encrypted = ~0; 1541 return; 1542 } 1543 1544 switch (LV_GET_DRIVE_TYPE_MIX(device->scsi3addr)) { 1545 case LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY: 1546 case LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY: 1547 case LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY: 1548 case LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY: 1549 case LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY: 1550 case LV_DRIVE_TYPE_MIX_SAS_ONLY: 1551 case LV_DRIVE_TYPE_MIX_SATA_ONLY: 1552 device->max_transfer_encrypted = 1553 ctrl_info->max_transfer_encrypted_sas_sata; 1554 break; 1555 case LV_DRIVE_TYPE_MIX_NVME_ONLY: 1556 device->max_transfer_encrypted = 1557 ctrl_info->max_transfer_encrypted_nvme; 1558 break; 1559 case LV_DRIVE_TYPE_MIX_UNKNOWN: 1560 case LV_DRIVE_TYPE_MIX_NO_RESTRICTION: 1561 default: 1562 device->max_transfer_encrypted = 1563 min(ctrl_info->max_transfer_encrypted_sas_sata, 1564 ctrl_info->max_transfer_encrypted_nvme); 1565 break; 1566 } 1567} 1568 1569static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info, 1570 struct pqi_scsi_dev *device) 1571{ 1572 int rc; 1573 u8 *buffer; 1574 u8 bypass_status; 1575 1576 buffer = kmalloc(64, GFP_KERNEL); 1577 if (!buffer) 1578 return; 1579 1580 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1581 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64); 1582 if (rc) 1583 goto out; 1584 1585#define RAID_BYPASS_STATUS 4 1586#define RAID_BYPASS_CONFIGURED 0x1 1587#define RAID_BYPASS_ENABLED 0x2 1588 1589 bypass_status = buffer[RAID_BYPASS_STATUS]; 1590 device->raid_bypass_configured = 1591 (bypass_status & RAID_BYPASS_CONFIGURED) != 0; 1592 if (device->raid_bypass_configured && 1593 (bypass_status & RAID_BYPASS_ENABLED) && 1594 pqi_get_raid_map(ctrl_info, device) == 0) { 1595 device->raid_bypass_enabled = true; 1596 if (get_unaligned_le16(&device->raid_map->flags) & 1597 RAID_MAP_ENCRYPTION_ENABLED) 1598 pqi_set_max_transfer_encrypted(ctrl_info, device); 1599 } 1600 1601out: 1602 kfree(buffer); 1603} 1604 1605/* 1606 * Use vendor-specific VPD to determine online/offline status of a volume. 1607 */ 1608 1609static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, 1610 struct pqi_scsi_dev *device) 1611{ 1612 int rc; 1613 size_t page_length; 1614 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; 1615 bool volume_offline = true; 1616 u32 volume_flags; 1617 struct ciss_vpd_logical_volume_status *vpd; 1618 1619 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); 1620 if (!vpd) 1621 goto no_buffer; 1622 1623 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1624 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); 1625 if (rc) 1626 goto out; 1627 1628 if (vpd->page_code != CISS_VPD_LV_STATUS) 1629 goto out; 1630 1631 page_length = offsetof(struct ciss_vpd_logical_volume_status, 1632 volume_status) + vpd->page_length; 1633 if (page_length < sizeof(*vpd)) 1634 goto out; 1635 1636 volume_status = vpd->volume_status; 1637 volume_flags = get_unaligned_be32(&vpd->flags); 1638 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; 1639 1640out: 1641 kfree(vpd); 1642no_buffer: 1643 device->volume_status = volume_status; 1644 device->volume_offline = volume_offline; 1645} 1646 1647#define PQI_DEVICE_NCQ_PRIO_SUPPORTED 0x01 1648#define PQI_DEVICE_PHY_MAP_SUPPORTED 0x10 1649#define PQI_DEVICE_ERASE_IN_PROGRESS 0x10 1650 1651static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info, 1652 struct pqi_scsi_dev *device, 1653 struct bmic_identify_physical_device *id_phys) 1654{ 1655 int rc; 1656 1657 memset(id_phys, 0, sizeof(*id_phys)); 1658 1659 rc = pqi_identify_physical_device(ctrl_info, device, 1660 id_phys, sizeof(*id_phys)); 1661 if (rc) { 1662 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1663 return rc; 1664 } 1665 1666 scsi_sanitize_inquiry_string(&id_phys->model[0], 8); 1667 scsi_sanitize_inquiry_string(&id_phys->model[8], 16); 1668 1669 memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor)); 1670 memcpy(device->model, &id_phys->model[8], sizeof(device->model)); 1671 1672 device->box_index = id_phys->box_index; 1673 device->phys_box_on_bus = id_phys->phys_box_on_bus; 1674 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0]; 1675 device->queue_depth = 1676 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1677 device->active_path_index = id_phys->active_path_number; 1678 device->path_map = id_phys->redundant_path_present_map; 1679 memcpy(&device->box, 1680 &id_phys->alternate_paths_phys_box_on_port, 1681 sizeof(device->box)); 1682 memcpy(&device->phys_connector, 1683 &id_phys->alternate_paths_phys_connector, 1684 sizeof(device->phys_connector)); 1685 device->bay = id_phys->phys_bay_in_box; 1686 device->lun_count = id_phys->multi_lun_device_lun_count; 1687 if ((id_phys->even_more_flags & PQI_DEVICE_PHY_MAP_SUPPORTED) && 1688 id_phys->phy_count) 1689 device->phy_id = 1690 id_phys->phy_to_phy_map[device->active_path_index]; 1691 else 1692 device->phy_id = 0xFF; 1693 1694 device->ncq_prio_support = 1695 ((get_unaligned_le32(&id_phys->misc_drive_flags) >> 16) & 1696 PQI_DEVICE_NCQ_PRIO_SUPPORTED); 1697 1698 device->erase_in_progress = !!(get_unaligned_le16(&id_phys->extra_physical_drive_flags) & PQI_DEVICE_ERASE_IN_PROGRESS); 1699 1700 return 0; 1701} 1702 1703static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info, 1704 struct pqi_scsi_dev *device) 1705{ 1706 int rc; 1707 u8 *buffer; 1708 1709 buffer = kmalloc(64, GFP_KERNEL); 1710 if (!buffer) 1711 return -ENOMEM; 1712 1713 /* Send an inquiry to the device to see what it is. */ 1714 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64); 1715 if (rc) 1716 goto out; 1717 1718 scsi_sanitize_inquiry_string(&buffer[8], 8); 1719 scsi_sanitize_inquiry_string(&buffer[16], 16); 1720 1721 device->devtype = buffer[0] & 0x1f; 1722 memcpy(device->vendor, &buffer[8], sizeof(device->vendor)); 1723 memcpy(device->model, &buffer[16], sizeof(device->model)); 1724 1725 if (device->devtype == TYPE_DISK) { 1726 if (device->is_external_raid_device) { 1727 device->raid_level = SA_RAID_UNKNOWN; 1728 device->volume_status = CISS_LV_OK; 1729 device->volume_offline = false; 1730 } else { 1731 pqi_get_raid_level(ctrl_info, device); 1732 pqi_get_raid_bypass_status(ctrl_info, device); 1733 pqi_get_volume_status(ctrl_info, device); 1734 } 1735 } 1736 1737out: 1738 kfree(buffer); 1739 1740 return rc; 1741} 1742 1743/* 1744 * Prevent adding drive to OS for some corner cases such as a drive 1745 * undergoing a sanitize (erase) operation. Some OSes will continue to poll 1746 * the drive until the sanitize completes, which can take hours, 1747 * resulting in long bootup delays. Commands such as TUR, READ_CAP 1748 * are allowed, but READ/WRITE cause check condition. So the OS 1749 * cannot check/read the partition table. 1750 * Note: devices that have completed sanitize must be re-enabled 1751 * using the management utility. 1752 */ 1753static inline bool pqi_keep_device_offline(struct pqi_scsi_dev *device) 1754{ 1755 return device->erase_in_progress; 1756} 1757 1758static int pqi_get_device_info_phys_logical(struct pqi_ctrl_info *ctrl_info, 1759 struct pqi_scsi_dev *device, 1760 struct bmic_identify_physical_device *id_phys) 1761{ 1762 int rc; 1763 1764 if (device->is_expander_smp_device) 1765 return 0; 1766 1767 if (pqi_is_logical_device(device)) 1768 rc = pqi_get_logical_device_info(ctrl_info, device); 1769 else 1770 rc = pqi_get_physical_device_info(ctrl_info, device, id_phys); 1771 1772 return rc; 1773} 1774 1775static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, 1776 struct pqi_scsi_dev *device, 1777 struct bmic_identify_physical_device *id_phys) 1778{ 1779 int rc; 1780 1781 rc = pqi_get_device_info_phys_logical(ctrl_info, device, id_phys); 1782 1783 if (rc == 0 && device->lun_count == 0) 1784 device->lun_count = 1; 1785 1786 return rc; 1787} 1788 1789static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, 1790 struct pqi_scsi_dev *device) 1791{ 1792 char *status; 1793 static const char unknown_state_str[] = 1794 "Volume is in an unknown state (%u)"; 1795 char unknown_state_buffer[sizeof(unknown_state_str) + 10]; 1796 1797 switch (device->volume_status) { 1798 case CISS_LV_OK: 1799 status = "Volume online"; 1800 break; 1801 case CISS_LV_FAILED: 1802 status = "Volume failed"; 1803 break; 1804 case CISS_LV_NOT_CONFIGURED: 1805 status = "Volume not configured"; 1806 break; 1807 case CISS_LV_DEGRADED: 1808 status = "Volume degraded"; 1809 break; 1810 case CISS_LV_READY_FOR_RECOVERY: 1811 status = "Volume ready for recovery operation"; 1812 break; 1813 case CISS_LV_UNDERGOING_RECOVERY: 1814 status = "Volume undergoing recovery"; 1815 break; 1816 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: 1817 status = "Wrong physical drive was replaced"; 1818 break; 1819 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: 1820 status = "A physical drive not properly connected"; 1821 break; 1822 case CISS_LV_HARDWARE_OVERHEATING: 1823 status = "Hardware is overheating"; 1824 break; 1825 case CISS_LV_HARDWARE_HAS_OVERHEATED: 1826 status = "Hardware has overheated"; 1827 break; 1828 case CISS_LV_UNDERGOING_EXPANSION: 1829 status = "Volume undergoing expansion"; 1830 break; 1831 case CISS_LV_NOT_AVAILABLE: 1832 status = "Volume waiting for transforming volume"; 1833 break; 1834 case CISS_LV_QUEUED_FOR_EXPANSION: 1835 status = "Volume queued for expansion"; 1836 break; 1837 case CISS_LV_DISABLED_SCSI_ID_CONFLICT: 1838 status = "Volume disabled due to SCSI ID conflict"; 1839 break; 1840 case CISS_LV_EJECTED: 1841 status = "Volume has been ejected"; 1842 break; 1843 case CISS_LV_UNDERGOING_ERASE: 1844 status = "Volume undergoing background erase"; 1845 break; 1846 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: 1847 status = "Volume ready for predictive spare rebuild"; 1848 break; 1849 case CISS_LV_UNDERGOING_RPI: 1850 status = "Volume undergoing rapid parity initialization"; 1851 break; 1852 case CISS_LV_PENDING_RPI: 1853 status = "Volume queued for rapid parity initialization"; 1854 break; 1855 case CISS_LV_ENCRYPTED_NO_KEY: 1856 status = "Encrypted volume inaccessible - key not present"; 1857 break; 1858 case CISS_LV_UNDERGOING_ENCRYPTION: 1859 status = "Volume undergoing encryption process"; 1860 break; 1861 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: 1862 status = "Volume undergoing encryption re-keying process"; 1863 break; 1864 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1865 status = "Volume encrypted but encryption is disabled"; 1866 break; 1867 case CISS_LV_PENDING_ENCRYPTION: 1868 status = "Volume pending migration to encrypted state"; 1869 break; 1870 case CISS_LV_PENDING_ENCRYPTION_REKEYING: 1871 status = "Volume pending encryption rekeying"; 1872 break; 1873 case CISS_LV_NOT_SUPPORTED: 1874 status = "Volume not supported on this controller"; 1875 break; 1876 case CISS_LV_STATUS_UNAVAILABLE: 1877 status = "Volume status not available"; 1878 break; 1879 default: 1880 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), 1881 unknown_state_str, device->volume_status); 1882 status = unknown_state_buffer; 1883 break; 1884 } 1885 1886 dev_info(&ctrl_info->pci_dev->dev, 1887 "scsi %d:%d:%d:%d %s\n", 1888 ctrl_info->scsi_host->host_no, 1889 device->bus, device->target, device->lun, status); 1890} 1891 1892static void pqi_rescan_worker(struct work_struct *work) 1893{ 1894 struct pqi_ctrl_info *ctrl_info; 1895 1896 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1897 rescan_work); 1898 1899 pqi_scan_scsi_devices(ctrl_info); 1900} 1901 1902static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, 1903 struct pqi_scsi_dev *device) 1904{ 1905 int rc; 1906 1907 if (pqi_is_logical_device(device)) 1908 rc = scsi_add_device(ctrl_info->scsi_host, device->bus, 1909 device->target, device->lun); 1910 else 1911 rc = pqi_add_sas_device(ctrl_info->sas_host, device); 1912 1913 return rc; 1914} 1915 1916#define PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS (20 * 1000) 1917 1918static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device) 1919{ 1920 int rc; 1921 int lun; 1922 1923 for (lun = 0; lun < device->lun_count; lun++) { 1924 rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun, 1925 PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS); 1926 if (rc) 1927 dev_err(&ctrl_info->pci_dev->dev, 1928 "scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n", 1929 ctrl_info->scsi_host->host_no, device->bus, 1930 device->target, lun, 1931 atomic_read(&device->scsi_cmds_outstanding[lun])); 1932 } 1933 1934 if (pqi_is_logical_device(device)) 1935 scsi_remove_device(device->sdev); 1936 else 1937 pqi_remove_sas_device(device); 1938 1939 pqi_device_remove_start(device); 1940} 1941 1942/* Assumes the SCSI device list lock is held. */ 1943 1944static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, 1945 int bus, int target, int lun) 1946{ 1947 struct pqi_scsi_dev *device; 1948 1949 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 1950 if (device->bus == bus && device->target == target && device->lun == lun) 1951 return device; 1952 1953 return NULL; 1954} 1955 1956static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, struct pqi_scsi_dev *dev2) 1957{ 1958 if (dev1->is_physical_device != dev2->is_physical_device) 1959 return false; 1960 1961 if (dev1->is_physical_device) 1962 return memcmp(dev1->wwid, dev2->wwid, sizeof(dev1->wwid)) == 0; 1963 1964 return memcmp(dev1->volume_id, dev2->volume_id, sizeof(dev1->volume_id)) == 0; 1965} 1966 1967enum pqi_find_result { 1968 DEVICE_NOT_FOUND, 1969 DEVICE_CHANGED, 1970 DEVICE_SAME, 1971}; 1972 1973static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, 1974 struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device) 1975{ 1976 struct pqi_scsi_dev *device; 1977 1978 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 1979 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) { 1980 *matching_device = device; 1981 if (pqi_device_equal(device_to_find, device)) { 1982 if (device_to_find->volume_offline) 1983 return DEVICE_CHANGED; 1984 return DEVICE_SAME; 1985 } 1986 return DEVICE_CHANGED; 1987 } 1988 } 1989 1990 return DEVICE_NOT_FOUND; 1991} 1992 1993static inline const char *pqi_device_type(struct pqi_scsi_dev *device) 1994{ 1995 if (device->is_expander_smp_device) 1996 return "Enclosure SMP "; 1997 1998 return scsi_device_type(device->devtype); 1999} 2000 2001#define PQI_DEV_INFO_BUFFER_LENGTH 128 2002 2003static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, 2004 char *action, struct pqi_scsi_dev *device) 2005{ 2006 ssize_t count; 2007 char buffer[PQI_DEV_INFO_BUFFER_LENGTH]; 2008 2009 count = scnprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH, 2010 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus); 2011 2012 if (device->target_lun_valid) 2013 count += scnprintf(buffer + count, 2014 PQI_DEV_INFO_BUFFER_LENGTH - count, 2015 "%d:%d", 2016 device->target, 2017 device->lun); 2018 else 2019 count += scnprintf(buffer + count, 2020 PQI_DEV_INFO_BUFFER_LENGTH - count, 2021 "-:-"); 2022 2023 if (pqi_is_logical_device(device)) { 2024 count += scnprintf(buffer + count, 2025 PQI_DEV_INFO_BUFFER_LENGTH - count, 2026 " %08x%08x", 2027 *((u32 *)&device->scsi3addr), 2028 *((u32 *)&device->scsi3addr[4])); 2029 } else if (ctrl_info->rpl_extended_format_4_5_supported) { 2030 if (device->device_type == SA_DEVICE_TYPE_NVME) 2031 count += scnprintf(buffer + count, 2032 PQI_DEV_INFO_BUFFER_LENGTH - count, 2033 " %016llx%016llx", 2034 get_unaligned_be64(&device->wwid[0]), 2035 get_unaligned_be64(&device->wwid[8])); 2036 else 2037 count += scnprintf(buffer + count, 2038 PQI_DEV_INFO_BUFFER_LENGTH - count, 2039 " %016llx", 2040 get_unaligned_be64(&device->wwid[0])); 2041 } else { 2042 count += scnprintf(buffer + count, 2043 PQI_DEV_INFO_BUFFER_LENGTH - count, 2044 " %016llx", 2045 get_unaligned_be64(&device->wwid[0])); 2046 } 2047 2048 2049 count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count, 2050 " %s %.8s %.16s ", 2051 pqi_device_type(device), 2052 device->vendor, 2053 device->model); 2054 2055 if (pqi_is_logical_device(device)) { 2056 if (device->devtype == TYPE_DISK) 2057 count += scnprintf(buffer + count, 2058 PQI_DEV_INFO_BUFFER_LENGTH - count, 2059 "SSDSmartPathCap%c En%c %-12s", 2060 device->raid_bypass_configured ? '+' : '-', 2061 device->raid_bypass_enabled ? '+' : '-', 2062 pqi_raid_level_to_string(device->raid_level)); 2063 } else { 2064 count += scnprintf(buffer + count, 2065 PQI_DEV_INFO_BUFFER_LENGTH - count, 2066 "AIO%c", device->aio_enabled ? '+' : '-'); 2067 if (device->devtype == TYPE_DISK || 2068 device->devtype == TYPE_ZBC) 2069 count += scnprintf(buffer + count, 2070 PQI_DEV_INFO_BUFFER_LENGTH - count, 2071 " qd=%-6d", device->queue_depth); 2072 } 2073 2074 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer); 2075} 2076 2077static bool pqi_raid_maps_equal(struct raid_map *raid_map1, struct raid_map *raid_map2) 2078{ 2079 u32 raid_map1_size; 2080 u32 raid_map2_size; 2081 2082 if (raid_map1 == NULL || raid_map2 == NULL) 2083 return raid_map1 == raid_map2; 2084 2085 raid_map1_size = get_unaligned_le32(&raid_map1->structure_size); 2086 raid_map2_size = get_unaligned_le32(&raid_map2->structure_size); 2087 2088 if (raid_map1_size != raid_map2_size) 2089 return false; 2090 2091 return memcmp(raid_map1, raid_map2, raid_map1_size) == 0; 2092} 2093 2094/* Assumes the SCSI device list lock is held. */ 2095 2096static void pqi_scsi_update_device(struct pqi_ctrl_info *ctrl_info, 2097 struct pqi_scsi_dev *existing_device, struct pqi_scsi_dev *new_device) 2098{ 2099 existing_device->device_type = new_device->device_type; 2100 existing_device->bus = new_device->bus; 2101 if (new_device->target_lun_valid) { 2102 existing_device->target = new_device->target; 2103 existing_device->lun = new_device->lun; 2104 existing_device->target_lun_valid = true; 2105 } 2106 2107 /* By definition, the scsi3addr and wwid fields are already the same. */ 2108 2109 existing_device->is_physical_device = new_device->is_physical_device; 2110 memcpy(existing_device->vendor, new_device->vendor, sizeof(existing_device->vendor)); 2111 memcpy(existing_device->model, new_device->model, sizeof(existing_device->model)); 2112 existing_device->sas_address = new_device->sas_address; 2113 existing_device->queue_depth = new_device->queue_depth; 2114 existing_device->device_offline = false; 2115 existing_device->lun_count = new_device->lun_count; 2116 2117 if (pqi_is_logical_device(existing_device)) { 2118 existing_device->is_external_raid_device = new_device->is_external_raid_device; 2119 2120 if (existing_device->devtype == TYPE_DISK) { 2121 existing_device->raid_level = new_device->raid_level; 2122 existing_device->volume_status = new_device->volume_status; 2123 memset(existing_device->next_bypass_group, 0, sizeof(existing_device->next_bypass_group)); 2124 if (!pqi_raid_maps_equal(existing_device->raid_map, new_device->raid_map)) { 2125 kfree(existing_device->raid_map); 2126 existing_device->raid_map = new_device->raid_map; 2127 /* To prevent this from being freed later. */ 2128 new_device->raid_map = NULL; 2129 } 2130 if (new_device->raid_bypass_enabled && existing_device->raid_io_stats == NULL) { 2131 existing_device->raid_io_stats = new_device->raid_io_stats; 2132 new_device->raid_io_stats = NULL; 2133 } 2134 existing_device->raid_bypass_configured = new_device->raid_bypass_configured; 2135 existing_device->raid_bypass_enabled = new_device->raid_bypass_enabled; 2136 } 2137 } else { 2138 existing_device->aio_enabled = new_device->aio_enabled; 2139 existing_device->aio_handle = new_device->aio_handle; 2140 existing_device->is_expander_smp_device = new_device->is_expander_smp_device; 2141 existing_device->active_path_index = new_device->active_path_index; 2142 existing_device->phy_id = new_device->phy_id; 2143 existing_device->path_map = new_device->path_map; 2144 existing_device->bay = new_device->bay; 2145 existing_device->box_index = new_device->box_index; 2146 existing_device->phys_box_on_bus = new_device->phys_box_on_bus; 2147 existing_device->phy_connected_dev_type = new_device->phy_connected_dev_type; 2148 memcpy(existing_device->box, new_device->box, sizeof(existing_device->box)); 2149 memcpy(existing_device->phys_connector, new_device->phys_connector, sizeof(existing_device->phys_connector)); 2150 } 2151} 2152 2153static inline void pqi_free_device(struct pqi_scsi_dev *device) 2154{ 2155 if (device) { 2156 free_percpu(device->raid_io_stats); 2157 kfree(device->raid_map); 2158 kfree(device); 2159 } 2160} 2161 2162/* 2163 * Called when exposing a new device to the OS fails in order to re-adjust 2164 * our internal SCSI device list to match the SCSI ML's view. 2165 */ 2166 2167static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, 2168 struct pqi_scsi_dev *device) 2169{ 2170 unsigned long flags; 2171 2172 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2173 list_del(&device->scsi_device_list_entry); 2174 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2175 2176 /* Allow the device structure to be freed later. */ 2177 device->keep_device = false; 2178} 2179 2180static inline bool pqi_is_device_added(struct pqi_scsi_dev *device) 2181{ 2182 if (device->is_expander_smp_device) 2183 return device->sas_port != NULL; 2184 2185 return device->sdev != NULL; 2186} 2187 2188static inline void pqi_init_device_tmf_work(struct pqi_scsi_dev *device) 2189{ 2190 unsigned int lun; 2191 struct pqi_tmf_work *tmf_work; 2192 2193 for (lun = 0, tmf_work = device->tmf_work; lun < PQI_MAX_LUNS_PER_DEVICE; lun++, tmf_work++) 2194 INIT_WORK(&tmf_work->work_struct, pqi_tmf_worker); 2195} 2196 2197static inline bool pqi_volume_rescan_needed(struct pqi_scsi_dev *device) 2198{ 2199 if (pqi_device_in_remove(device)) 2200 return false; 2201 2202 if (device->sdev == NULL) 2203 return false; 2204 2205 if (!scsi_device_online(device->sdev)) 2206 return false; 2207 2208 return device->rescan; 2209} 2210 2211static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, 2212 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) 2213{ 2214 int rc; 2215 unsigned int i; 2216 unsigned long flags; 2217 enum pqi_find_result find_result; 2218 struct pqi_scsi_dev *device; 2219 struct pqi_scsi_dev *next; 2220 struct pqi_scsi_dev *matching_device; 2221 LIST_HEAD(add_list); 2222 LIST_HEAD(delete_list); 2223 2224 /* 2225 * The idea here is to do as little work as possible while holding the 2226 * spinlock. That's why we go to great pains to defer anything other 2227 * than updating the internal device list until after we release the 2228 * spinlock. 2229 */ 2230 2231 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2232 2233 /* Assume that all devices in the existing list have gone away. */ 2234 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 2235 device->device_gone = true; 2236 2237 for (i = 0; i < num_new_devices; i++) { 2238 device = new_device_list[i]; 2239 2240 find_result = pqi_scsi_find_entry(ctrl_info, device, 2241 &matching_device); 2242 2243 switch (find_result) { 2244 case DEVICE_SAME: 2245 /* 2246 * The newly found device is already in the existing 2247 * device list. 2248 */ 2249 device->new_device = false; 2250 matching_device->device_gone = false; 2251 pqi_scsi_update_device(ctrl_info, matching_device, device); 2252 break; 2253 case DEVICE_NOT_FOUND: 2254 /* 2255 * The newly found device is NOT in the existing device 2256 * list. 2257 */ 2258 device->new_device = true; 2259 break; 2260 case DEVICE_CHANGED: 2261 /* 2262 * The original device has gone away and we need to add 2263 * the new device. 2264 */ 2265 device->new_device = true; 2266 break; 2267 } 2268 } 2269 2270 /* Process all devices that have gone away. */ 2271 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 2272 scsi_device_list_entry) { 2273 if (device->device_gone) { 2274 list_del(&device->scsi_device_list_entry); 2275 list_add_tail(&device->delete_list_entry, &delete_list); 2276 } 2277 } 2278 2279 /* Process all new devices. */ 2280 for (i = 0; i < num_new_devices; i++) { 2281 device = new_device_list[i]; 2282 if (!device->new_device) 2283 continue; 2284 if (device->volume_offline) 2285 continue; 2286 list_add_tail(&device->scsi_device_list_entry, 2287 &ctrl_info->scsi_device_list); 2288 list_add_tail(&device->add_list_entry, &add_list); 2289 /* To prevent this device structure from being freed later. */ 2290 device->keep_device = true; 2291 pqi_init_device_tmf_work(device); 2292 } 2293 2294 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2295 2296 /* 2297 * If OFA is in progress and there are devices that need to be deleted, 2298 * allow any pending reset operations to continue and unblock any SCSI 2299 * requests before removal. 2300 */ 2301 if (pqi_ofa_in_progress(ctrl_info)) { 2302 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) 2303 if (pqi_is_device_added(device)) 2304 pqi_device_remove_start(device); 2305 pqi_ctrl_unblock_device_reset(ctrl_info); 2306 pqi_scsi_unblock_requests(ctrl_info); 2307 } 2308 2309 /* Remove all devices that have gone away. */ 2310 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) { 2311 if (device->volume_offline) { 2312 pqi_dev_info(ctrl_info, "offline", device); 2313 pqi_show_volume_status(ctrl_info, device); 2314 } else { 2315 pqi_dev_info(ctrl_info, "removed", device); 2316 } 2317 if (pqi_is_device_added(device)) 2318 pqi_remove_device(ctrl_info, device); 2319 list_del(&device->delete_list_entry); 2320 pqi_free_device(device); 2321 } 2322 2323 /* 2324 * Notify the SML of any existing device changes such as; 2325 * queue depth, device size. 2326 */ 2327 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 2328 /* 2329 * Check for queue depth change. 2330 */ 2331 if (device->sdev && device->queue_depth != device->advertised_queue_depth) { 2332 device->advertised_queue_depth = device->queue_depth; 2333 scsi_change_queue_depth(device->sdev, device->advertised_queue_depth); 2334 } 2335 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2336 /* 2337 * Check for changes in the device, such as size. 2338 */ 2339 if (pqi_volume_rescan_needed(device)) { 2340 device->rescan = false; 2341 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2342 scsi_rescan_device(device->sdev); 2343 } else { 2344 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2345 } 2346 } 2347 2348 /* Expose any new devices. */ 2349 list_for_each_entry_safe(device, next, &add_list, add_list_entry) { 2350 if (!pqi_is_device_added(device)) { 2351 rc = pqi_add_device(ctrl_info, device); 2352 if (rc == 0) { 2353 pqi_dev_info(ctrl_info, "added", device); 2354 } else { 2355 dev_warn(&ctrl_info->pci_dev->dev, 2356 "scsi %d:%d:%d:%d addition failed, device not added\n", 2357 ctrl_info->scsi_host->host_no, 2358 device->bus, device->target, 2359 device->lun); 2360 pqi_fixup_botched_add(ctrl_info, device); 2361 } 2362 } 2363 } 2364 2365} 2366 2367static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device) 2368{ 2369 /* 2370 * Only support the HBA controller itself as a RAID 2371 * controller. If it's a RAID controller other than 2372 * the HBA itself (an external RAID controller, for 2373 * example), we don't support it. 2374 */ 2375 if (device->device_type == SA_DEVICE_TYPE_CONTROLLER && 2376 !pqi_is_hba_lunid(device->scsi3addr)) 2377 return false; 2378 2379 return true; 2380} 2381 2382static inline bool pqi_skip_device(u8 *scsi3addr) 2383{ 2384 /* Ignore all masked devices. */ 2385 if (MASKED_DEVICE(scsi3addr)) 2386 return true; 2387 2388 return false; 2389} 2390 2391static inline void pqi_mask_device(u8 *scsi3addr) 2392{ 2393 scsi3addr[3] |= 0xc0; 2394} 2395 2396static inline bool pqi_expose_device(struct pqi_scsi_dev *device) 2397{ 2398 return !device->is_physical_device || !pqi_skip_device(device->scsi3addr); 2399} 2400 2401static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2402{ 2403 int i; 2404 int rc; 2405 LIST_HEAD(new_device_list_head); 2406 struct report_phys_lun_16byte_wwid_list *physdev_list = NULL; 2407 struct report_log_lun_list *logdev_list = NULL; 2408 struct report_phys_lun_16byte_wwid *phys_lun; 2409 struct report_log_lun *log_lun; 2410 struct bmic_identify_physical_device *id_phys = NULL; 2411 u32 num_physicals; 2412 u32 num_logicals; 2413 struct pqi_scsi_dev **new_device_list = NULL; 2414 struct pqi_scsi_dev *device; 2415 struct pqi_scsi_dev *next; 2416 unsigned int num_new_devices; 2417 unsigned int num_valid_devices; 2418 bool is_physical_device; 2419 u8 *scsi3addr; 2420 unsigned int physical_index; 2421 unsigned int logical_index; 2422 static char *out_of_memory_msg = 2423 "failed to allocate memory, device discovery stopped"; 2424 2425 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); 2426 if (rc) 2427 goto out; 2428 2429 if (physdev_list) 2430 num_physicals = 2431 get_unaligned_be32(&physdev_list->header.list_length) 2432 / sizeof(physdev_list->lun_entries[0]); 2433 else 2434 num_physicals = 0; 2435 2436 if (logdev_list) 2437 num_logicals = 2438 get_unaligned_be32(&logdev_list->header.list_length) 2439 / sizeof(logdev_list->lun_entries[0]); 2440 else 2441 num_logicals = 0; 2442 2443 if (num_physicals) { 2444 /* 2445 * We need this buffer for calls to pqi_get_physical_disk_info() 2446 * below. We allocate it here instead of inside 2447 * pqi_get_physical_disk_info() because it's a fairly large 2448 * buffer. 2449 */ 2450 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); 2451 if (!id_phys) { 2452 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2453 out_of_memory_msg); 2454 rc = -ENOMEM; 2455 goto out; 2456 } 2457 2458 if (pqi_hide_vsep) { 2459 for (i = num_physicals - 1; i >= 0; i--) { 2460 phys_lun = &physdev_list->lun_entries[i]; 2461 if (CISS_GET_DRIVE_NUMBER(phys_lun->lunid) == PQI_VSEP_CISS_BTL) { 2462 pqi_mask_device(phys_lun->lunid); 2463 break; 2464 } 2465 } 2466 } 2467 } 2468 2469 if (num_logicals && 2470 (logdev_list->header.flags & CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX)) 2471 ctrl_info->lv_drive_type_mix_valid = true; 2472 2473 num_new_devices = num_physicals + num_logicals; 2474 2475 new_device_list = kmalloc_array(num_new_devices, 2476 sizeof(*new_device_list), 2477 GFP_KERNEL); 2478 if (!new_device_list) { 2479 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); 2480 rc = -ENOMEM; 2481 goto out; 2482 } 2483 2484 for (i = 0; i < num_new_devices; i++) { 2485 device = kzalloc(sizeof(*device), GFP_KERNEL); 2486 if (!device) { 2487 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2488 out_of_memory_msg); 2489 rc = -ENOMEM; 2490 goto out; 2491 } 2492 list_add_tail(&device->new_device_list_entry, 2493 &new_device_list_head); 2494 } 2495 2496 device = NULL; 2497 num_valid_devices = 0; 2498 physical_index = 0; 2499 logical_index = 0; 2500 2501 for (i = 0; i < num_new_devices; i++) { 2502 2503 if ((!pqi_expose_ld_first && i < num_physicals) || 2504 (pqi_expose_ld_first && i >= num_logicals)) { 2505 is_physical_device = true; 2506 phys_lun = &physdev_list->lun_entries[physical_index++]; 2507 log_lun = NULL; 2508 scsi3addr = phys_lun->lunid; 2509 } else { 2510 is_physical_device = false; 2511 phys_lun = NULL; 2512 log_lun = &logdev_list->lun_entries[logical_index++]; 2513 scsi3addr = log_lun->lunid; 2514 } 2515 2516 if (is_physical_device && pqi_skip_device(scsi3addr)) 2517 continue; 2518 2519 if (device) 2520 device = list_next_entry(device, new_device_list_entry); 2521 else 2522 device = list_first_entry(&new_device_list_head, 2523 struct pqi_scsi_dev, new_device_list_entry); 2524 2525 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 2526 device->is_physical_device = is_physical_device; 2527 if (is_physical_device) { 2528 device->device_type = phys_lun->device_type; 2529 if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP) 2530 device->is_expander_smp_device = true; 2531 } else { 2532 device->is_external_raid_device = 2533 pqi_is_external_raid_addr(scsi3addr); 2534 } 2535 2536 if (!pqi_is_supported_device(device)) 2537 continue; 2538 2539 /* Gather information about the device. */ 2540 rc = pqi_get_device_info(ctrl_info, device, id_phys); 2541 if (rc == -ENOMEM) { 2542 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2543 out_of_memory_msg); 2544 goto out; 2545 } 2546 if (rc) { 2547 if (device->is_physical_device) 2548 dev_warn(&ctrl_info->pci_dev->dev, 2549 "obtaining device info failed, skipping physical device %016llx%016llx\n", 2550 get_unaligned_be64(&phys_lun->wwid[0]), 2551 get_unaligned_be64(&phys_lun->wwid[8])); 2552 else 2553 dev_warn(&ctrl_info->pci_dev->dev, 2554 "obtaining device info failed, skipping logical device %08x%08x\n", 2555 *((u32 *)&device->scsi3addr), 2556 *((u32 *)&device->scsi3addr[4])); 2557 rc = 0; 2558 continue; 2559 } 2560 2561 /* Do not present disks that the OS cannot fully probe. */ 2562 if (pqi_keep_device_offline(device)) 2563 continue; 2564 2565 pqi_assign_bus_target_lun(device); 2566 2567 if (device->is_physical_device) { 2568 memcpy(device->wwid, phys_lun->wwid, sizeof(device->wwid)); 2569 if ((phys_lun->device_flags & 2570 CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) && 2571 phys_lun->aio_handle) { 2572 device->aio_enabled = true; 2573 device->aio_handle = 2574 phys_lun->aio_handle; 2575 } 2576 } else { 2577 memcpy(device->volume_id, log_lun->volume_id, 2578 sizeof(device->volume_id)); 2579 } 2580 2581 device->sas_address = get_unaligned_be64(&device->wwid[0]); 2582 2583 new_device_list[num_valid_devices++] = device; 2584 } 2585 2586 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); 2587 2588out: 2589 list_for_each_entry_safe(device, next, &new_device_list_head, 2590 new_device_list_entry) { 2591 if (device->keep_device) 2592 continue; 2593 list_del(&device->new_device_list_entry); 2594 pqi_free_device(device); 2595 } 2596 2597 kfree(new_device_list); 2598 kfree(physdev_list); 2599 kfree(logdev_list); 2600 kfree(id_phys); 2601 2602 return rc; 2603} 2604 2605static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2606{ 2607 int rc; 2608 int mutex_acquired; 2609 2610 if (pqi_ctrl_offline(ctrl_info)) 2611 return -ENXIO; 2612 2613 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 2614 2615 if (!mutex_acquired) { 2616 if (pqi_ctrl_scan_blocked(ctrl_info)) 2617 return -EBUSY; 2618 pqi_schedule_rescan_worker_delayed(ctrl_info); 2619 return -EINPROGRESS; 2620 } 2621 2622 rc = pqi_update_scsi_devices(ctrl_info); 2623 if (rc && !pqi_ctrl_scan_blocked(ctrl_info)) 2624 pqi_schedule_rescan_worker_delayed(ctrl_info); 2625 2626 mutex_unlock(&ctrl_info->scan_mutex); 2627 2628 return rc; 2629} 2630 2631static void pqi_scan_start(struct Scsi_Host *shost) 2632{ 2633 struct pqi_ctrl_info *ctrl_info; 2634 2635 ctrl_info = shost_to_hba(shost); 2636 2637 pqi_scan_scsi_devices(ctrl_info); 2638} 2639 2640/* Returns TRUE if scan is finished. */ 2641 2642static int pqi_scan_finished(struct Scsi_Host *shost, 2643 unsigned long elapsed_time) 2644{ 2645 struct pqi_ctrl_info *ctrl_info; 2646 2647 ctrl_info = shost_priv(shost); 2648 2649 return !mutex_is_locked(&ctrl_info->scan_mutex); 2650} 2651 2652static inline void pqi_set_encryption_info(struct pqi_encryption_info *encryption_info, 2653 struct raid_map *raid_map, u64 first_block) 2654{ 2655 u32 volume_blk_size; 2656 2657 /* 2658 * Set the encryption tweak values based on logical block address. 2659 * If the block size is 512, the tweak value is equal to the LBA. 2660 * For other block sizes, tweak value is (LBA * block size) / 512. 2661 */ 2662 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); 2663 if (volume_blk_size != 512) 2664 first_block = (first_block * volume_blk_size) / 512; 2665 2666 encryption_info->data_encryption_key_index = 2667 get_unaligned_le16(&raid_map->data_encryption_key_index); 2668 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); 2669 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); 2670} 2671 2672/* 2673 * Attempt to perform RAID bypass mapping for a logical volume I/O. 2674 */ 2675 2676static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info, 2677 struct pqi_scsi_dev_raid_map_data *rmd) 2678{ 2679 bool is_supported = true; 2680 2681 switch (rmd->raid_level) { 2682 case SA_RAID_0: 2683 break; 2684 case SA_RAID_1: 2685 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2686 rmd->data_length > ctrl_info->max_write_raid_1_10_2drive)) 2687 is_supported = false; 2688 break; 2689 case SA_RAID_TRIPLE: 2690 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2691 rmd->data_length > ctrl_info->max_write_raid_1_10_3drive)) 2692 is_supported = false; 2693 break; 2694 case SA_RAID_5: 2695 if (rmd->is_write && (!ctrl_info->enable_r5_writes || 2696 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2697 is_supported = false; 2698 break; 2699 case SA_RAID_6: 2700 if (rmd->is_write && (!ctrl_info->enable_r6_writes || 2701 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2702 is_supported = false; 2703 break; 2704 default: 2705 is_supported = false; 2706 break; 2707 } 2708 2709 return is_supported; 2710} 2711 2712#define PQI_RAID_BYPASS_INELIGIBLE 1 2713 2714static int pqi_get_aio_lba_and_block_count(struct scsi_cmnd *scmd, 2715 struct pqi_scsi_dev_raid_map_data *rmd) 2716{ 2717 /* Check for valid opcode, get LBA and block count. */ 2718 switch (scmd->cmnd[0]) { 2719 case WRITE_6: 2720 rmd->is_write = true; 2721 fallthrough; 2722 case READ_6: 2723 rmd->first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | 2724 (scmd->cmnd[2] << 8) | scmd->cmnd[3]); 2725 rmd->block_cnt = (u32)scmd->cmnd[4]; 2726 if (rmd->block_cnt == 0) 2727 rmd->block_cnt = 256; 2728 break; 2729 case WRITE_10: 2730 rmd->is_write = true; 2731 fallthrough; 2732 case READ_10: 2733 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2734 rmd->block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); 2735 break; 2736 case WRITE_12: 2737 rmd->is_write = true; 2738 fallthrough; 2739 case READ_12: 2740 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2741 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[6]); 2742 break; 2743 case WRITE_16: 2744 rmd->is_write = true; 2745 fallthrough; 2746 case READ_16: 2747 rmd->first_block = get_unaligned_be64(&scmd->cmnd[2]); 2748 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[10]); 2749 break; 2750 default: 2751 /* Process via normal I/O path. */ 2752 return PQI_RAID_BYPASS_INELIGIBLE; 2753 } 2754 2755 put_unaligned_le32(scsi_bufflen(scmd), &rmd->data_length); 2756 2757 return 0; 2758} 2759 2760static int pci_get_aio_common_raid_map_values(struct pqi_ctrl_info *ctrl_info, 2761 struct pqi_scsi_dev_raid_map_data *rmd, struct raid_map *raid_map) 2762{ 2763#if BITS_PER_LONG == 32 2764 u64 tmpdiv; 2765#endif 2766 2767 rmd->last_block = rmd->first_block + rmd->block_cnt - 1; 2768 2769 /* Check for invalid block or wraparound. */ 2770 if (rmd->last_block >= 2771 get_unaligned_le64(&raid_map->volume_blk_cnt) || 2772 rmd->last_block < rmd->first_block) 2773 return PQI_RAID_BYPASS_INELIGIBLE; 2774 2775 rmd->data_disks_per_row = 2776 get_unaligned_le16(&raid_map->data_disks_per_row); 2777 rmd->strip_size = get_unaligned_le16(&raid_map->strip_size); 2778 rmd->layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); 2779 2780 /* Calculate stripe information for the request. */ 2781 rmd->blocks_per_row = rmd->data_disks_per_row * rmd->strip_size; 2782 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2783 return PQI_RAID_BYPASS_INELIGIBLE; 2784#if BITS_PER_LONG == 32 2785 tmpdiv = rmd->first_block; 2786 do_div(tmpdiv, rmd->blocks_per_row); 2787 rmd->first_row = tmpdiv; 2788 tmpdiv = rmd->last_block; 2789 do_div(tmpdiv, rmd->blocks_per_row); 2790 rmd->last_row = tmpdiv; 2791 rmd->first_row_offset = (u32)(rmd->first_block - (rmd->first_row * rmd->blocks_per_row)); 2792 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * rmd->blocks_per_row)); 2793 tmpdiv = rmd->first_row_offset; 2794 do_div(tmpdiv, rmd->strip_size); 2795 rmd->first_column = tmpdiv; 2796 tmpdiv = rmd->last_row_offset; 2797 do_div(tmpdiv, rmd->strip_size); 2798 rmd->last_column = tmpdiv; 2799#else 2800 rmd->first_row = rmd->first_block / rmd->blocks_per_row; 2801 rmd->last_row = rmd->last_block / rmd->blocks_per_row; 2802 rmd->first_row_offset = (u32)(rmd->first_block - 2803 (rmd->first_row * rmd->blocks_per_row)); 2804 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * 2805 rmd->blocks_per_row)); 2806 rmd->first_column = rmd->first_row_offset / rmd->strip_size; 2807 rmd->last_column = rmd->last_row_offset / rmd->strip_size; 2808#endif 2809 2810 /* If this isn't a single row/column then give to the controller. */ 2811 if (rmd->first_row != rmd->last_row || 2812 rmd->first_column != rmd->last_column) 2813 return PQI_RAID_BYPASS_INELIGIBLE; 2814 2815 /* Proceeding with driver mapping. */ 2816 rmd->total_disks_per_row = rmd->data_disks_per_row + 2817 get_unaligned_le16(&raid_map->metadata_disks_per_row); 2818 rmd->map_row = ((u32)(rmd->first_row >> 2819 raid_map->parity_rotation_shift)) % 2820 get_unaligned_le16(&raid_map->row_cnt); 2821 rmd->map_index = (rmd->map_row * rmd->total_disks_per_row) + 2822 rmd->first_column; 2823 2824 return 0; 2825} 2826 2827static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd, 2828 struct raid_map *raid_map) 2829{ 2830#if BITS_PER_LONG == 32 2831 u64 tmpdiv; 2832#endif 2833 2834 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2835 return PQI_RAID_BYPASS_INELIGIBLE; 2836 2837 /* RAID 50/60 */ 2838 /* Verify first and last block are in same RAID group. */ 2839 rmd->stripesize = rmd->blocks_per_row * rmd->layout_map_count; 2840#if BITS_PER_LONG == 32 2841 tmpdiv = rmd->first_block; 2842 rmd->first_group = do_div(tmpdiv, rmd->stripesize); 2843 tmpdiv = rmd->first_group; 2844 do_div(tmpdiv, rmd->blocks_per_row); 2845 rmd->first_group = tmpdiv; 2846 tmpdiv = rmd->last_block; 2847 rmd->last_group = do_div(tmpdiv, rmd->stripesize); 2848 tmpdiv = rmd->last_group; 2849 do_div(tmpdiv, rmd->blocks_per_row); 2850 rmd->last_group = tmpdiv; 2851#else 2852 rmd->first_group = (rmd->first_block % rmd->stripesize) / rmd->blocks_per_row; 2853 rmd->last_group = (rmd->last_block % rmd->stripesize) / rmd->blocks_per_row; 2854#endif 2855 if (rmd->first_group != rmd->last_group) 2856 return PQI_RAID_BYPASS_INELIGIBLE; 2857 2858 /* Verify request is in a single row of RAID 5/6. */ 2859#if BITS_PER_LONG == 32 2860 tmpdiv = rmd->first_block; 2861 do_div(tmpdiv, rmd->stripesize); 2862 rmd->first_row = tmpdiv; 2863 rmd->r5or6_first_row = tmpdiv; 2864 tmpdiv = rmd->last_block; 2865 do_div(tmpdiv, rmd->stripesize); 2866 rmd->r5or6_last_row = tmpdiv; 2867#else 2868 rmd->first_row = rmd->r5or6_first_row = 2869 rmd->first_block / rmd->stripesize; 2870 rmd->r5or6_last_row = rmd->last_block / rmd->stripesize; 2871#endif 2872 if (rmd->r5or6_first_row != rmd->r5or6_last_row) 2873 return PQI_RAID_BYPASS_INELIGIBLE; 2874 2875 /* Verify request is in a single column. */ 2876#if BITS_PER_LONG == 32 2877 tmpdiv = rmd->first_block; 2878 rmd->first_row_offset = do_div(tmpdiv, rmd->stripesize); 2879 tmpdiv = rmd->first_row_offset; 2880 rmd->first_row_offset = (u32)do_div(tmpdiv, rmd->blocks_per_row); 2881 rmd->r5or6_first_row_offset = rmd->first_row_offset; 2882 tmpdiv = rmd->last_block; 2883 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->stripesize); 2884 tmpdiv = rmd->r5or6_last_row_offset; 2885 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->blocks_per_row); 2886 tmpdiv = rmd->r5or6_first_row_offset; 2887 do_div(tmpdiv, rmd->strip_size); 2888 rmd->first_column = rmd->r5or6_first_column = tmpdiv; 2889 tmpdiv = rmd->r5or6_last_row_offset; 2890 do_div(tmpdiv, rmd->strip_size); 2891 rmd->r5or6_last_column = tmpdiv; 2892#else 2893 rmd->first_row_offset = rmd->r5or6_first_row_offset = 2894 (u32)((rmd->first_block % rmd->stripesize) % 2895 rmd->blocks_per_row); 2896 2897 rmd->r5or6_last_row_offset = 2898 (u32)((rmd->last_block % rmd->stripesize) % 2899 rmd->blocks_per_row); 2900 2901 rmd->first_column = 2902 rmd->r5or6_first_row_offset / rmd->strip_size; 2903 rmd->r5or6_first_column = rmd->first_column; 2904 rmd->r5or6_last_column = rmd->r5or6_last_row_offset / rmd->strip_size; 2905#endif 2906 if (rmd->r5or6_first_column != rmd->r5or6_last_column) 2907 return PQI_RAID_BYPASS_INELIGIBLE; 2908 2909 /* Request is eligible. */ 2910 rmd->map_row = 2911 ((u32)(rmd->first_row >> raid_map->parity_rotation_shift)) % 2912 get_unaligned_le16(&raid_map->row_cnt); 2913 2914 rmd->map_index = (rmd->first_group * 2915 (get_unaligned_le16(&raid_map->row_cnt) * 2916 rmd->total_disks_per_row)) + 2917 (rmd->map_row * rmd->total_disks_per_row) + rmd->first_column; 2918 2919 if (rmd->is_write) { 2920 u32 index; 2921 2922 /* 2923 * p_parity_it_nexus and q_parity_it_nexus are pointers to the 2924 * parity entries inside the device's raid_map. 2925 * 2926 * A device's RAID map is bounded by: number of RAID disks squared. 2927 * 2928 * The devices RAID map size is checked during device 2929 * initialization. 2930 */ 2931 index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row); 2932 index *= rmd->total_disks_per_row; 2933 index -= get_unaligned_le16(&raid_map->metadata_disks_per_row); 2934 2935 rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle; 2936 if (rmd->raid_level == SA_RAID_6) { 2937 rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle; 2938 rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1]; 2939 } 2940#if BITS_PER_LONG == 32 2941 tmpdiv = rmd->first_block; 2942 do_div(tmpdiv, rmd->blocks_per_row); 2943 rmd->row = tmpdiv; 2944#else 2945 rmd->row = rmd->first_block / rmd->blocks_per_row; 2946#endif 2947 } 2948 2949 return 0; 2950} 2951 2952static void pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data *rmd) 2953{ 2954 /* Build the new CDB for the physical disk I/O. */ 2955 if (rmd->disk_block > 0xffffffff) { 2956 rmd->cdb[0] = rmd->is_write ? WRITE_16 : READ_16; 2957 rmd->cdb[1] = 0; 2958 put_unaligned_be64(rmd->disk_block, &rmd->cdb[2]); 2959 put_unaligned_be32(rmd->disk_block_cnt, &rmd->cdb[10]); 2960 rmd->cdb[14] = 0; 2961 rmd->cdb[15] = 0; 2962 rmd->cdb_length = 16; 2963 } else { 2964 rmd->cdb[0] = rmd->is_write ? WRITE_10 : READ_10; 2965 rmd->cdb[1] = 0; 2966 put_unaligned_be32((u32)rmd->disk_block, &rmd->cdb[2]); 2967 rmd->cdb[6] = 0; 2968 put_unaligned_be16((u16)rmd->disk_block_cnt, &rmd->cdb[7]); 2969 rmd->cdb[9] = 0; 2970 rmd->cdb_length = 10; 2971 } 2972} 2973 2974static void pqi_calc_aio_r1_nexus(struct raid_map *raid_map, 2975 struct pqi_scsi_dev_raid_map_data *rmd) 2976{ 2977 u32 index; 2978 u32 group; 2979 2980 group = rmd->map_index / rmd->data_disks_per_row; 2981 2982 index = rmd->map_index - (group * rmd->data_disks_per_row); 2983 rmd->it_nexus[0] = raid_map->disk_data[index].aio_handle; 2984 index += rmd->data_disks_per_row; 2985 rmd->it_nexus[1] = raid_map->disk_data[index].aio_handle; 2986 if (rmd->layout_map_count > 2) { 2987 index += rmd->data_disks_per_row; 2988 rmd->it_nexus[2] = raid_map->disk_data[index].aio_handle; 2989 } 2990 2991 rmd->num_it_nexus_entries = rmd->layout_map_count; 2992} 2993 2994static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 2995 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 2996 struct pqi_queue_group *queue_group) 2997{ 2998 int rc; 2999 struct raid_map *raid_map; 3000 u32 group; 3001 u32 next_bypass_group; 3002 struct pqi_encryption_info *encryption_info_ptr; 3003 struct pqi_encryption_info encryption_info; 3004 struct pqi_scsi_dev_raid_map_data rmd = { 0 }; 3005 3006 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 3007 if (rc) 3008 return PQI_RAID_BYPASS_INELIGIBLE; 3009 3010 rmd.raid_level = device->raid_level; 3011 3012 if (!pqi_aio_raid_level_supported(ctrl_info, &rmd)) 3013 return PQI_RAID_BYPASS_INELIGIBLE; 3014 3015 if (unlikely(rmd.block_cnt == 0)) 3016 return PQI_RAID_BYPASS_INELIGIBLE; 3017 3018 raid_map = device->raid_map; 3019 3020 rc = pci_get_aio_common_raid_map_values(ctrl_info, &rmd, raid_map); 3021 if (rc) 3022 return PQI_RAID_BYPASS_INELIGIBLE; 3023 3024 if (device->raid_level == SA_RAID_1 || 3025 device->raid_level == SA_RAID_TRIPLE) { 3026 if (rmd.is_write) { 3027 pqi_calc_aio_r1_nexus(raid_map, &rmd); 3028 } else { 3029 group = device->next_bypass_group[rmd.map_index]; 3030 next_bypass_group = group + 1; 3031 if (next_bypass_group >= rmd.layout_map_count) 3032 next_bypass_group = 0; 3033 device->next_bypass_group[rmd.map_index] = next_bypass_group; 3034 rmd.map_index += group * rmd.data_disks_per_row; 3035 } 3036 } else if ((device->raid_level == SA_RAID_5 || 3037 device->raid_level == SA_RAID_6) && 3038 (rmd.layout_map_count > 1 || rmd.is_write)) { 3039 rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map); 3040 if (rc) 3041 return PQI_RAID_BYPASS_INELIGIBLE; 3042 } 3043 3044 if (unlikely(rmd.map_index >= RAID_MAP_MAX_ENTRIES)) 3045 return PQI_RAID_BYPASS_INELIGIBLE; 3046 3047 rmd.aio_handle = raid_map->disk_data[rmd.map_index].aio_handle; 3048 rmd.disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + 3049 rmd.first_row * rmd.strip_size + 3050 (rmd.first_row_offset - rmd.first_column * rmd.strip_size); 3051 rmd.disk_block_cnt = rmd.block_cnt; 3052 3053 /* Handle differing logical/physical block sizes. */ 3054 if (raid_map->phys_blk_shift) { 3055 rmd.disk_block <<= raid_map->phys_blk_shift; 3056 rmd.disk_block_cnt <<= raid_map->phys_blk_shift; 3057 } 3058 3059 if (unlikely(rmd.disk_block_cnt > 0xffff)) 3060 return PQI_RAID_BYPASS_INELIGIBLE; 3061 3062 pqi_set_aio_cdb(&rmd); 3063 3064 if (get_unaligned_le16(&raid_map->flags) & RAID_MAP_ENCRYPTION_ENABLED) { 3065 if (rmd.data_length > device->max_transfer_encrypted) 3066 return PQI_RAID_BYPASS_INELIGIBLE; 3067 pqi_set_encryption_info(&encryption_info, raid_map, rmd.first_block); 3068 encryption_info_ptr = &encryption_info; 3069 } else { 3070 encryption_info_ptr = NULL; 3071 } 3072 3073 if (rmd.is_write) { 3074 switch (device->raid_level) { 3075 case SA_RAID_1: 3076 case SA_RAID_TRIPLE: 3077 return pqi_aio_submit_r1_write_io(ctrl_info, scmd, queue_group, 3078 encryption_info_ptr, device, &rmd); 3079 case SA_RAID_5: 3080 case SA_RAID_6: 3081 return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group, 3082 encryption_info_ptr, device, &rmd); 3083 } 3084 } 3085 3086 return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle, 3087 rmd.cdb, rmd.cdb_length, queue_group, 3088 encryption_info_ptr, true, false); 3089} 3090 3091#define PQI_STATUS_IDLE 0x0 3092 3093#define PQI_CREATE_ADMIN_QUEUE_PAIR 1 3094#define PQI_DELETE_ADMIN_QUEUE_PAIR 2 3095 3096#define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 3097#define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 3098#define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 3099#define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 3100#define PQI_DEVICE_STATE_ERROR 0x4 3101 3102#define PQI_MODE_READY_TIMEOUT_SECS 30 3103#define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 3104 3105static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) 3106{ 3107 struct pqi_device_registers __iomem *pqi_registers; 3108 unsigned long timeout; 3109 u64 signature; 3110 u8 status; 3111 3112 pqi_registers = ctrl_info->pqi_registers; 3113 timeout = (PQI_MODE_READY_TIMEOUT_SECS * HZ) + jiffies; 3114 3115 while (1) { 3116 signature = readq(&pqi_registers->signature); 3117 if (memcmp(&signature, PQI_DEVICE_SIGNATURE, 3118 sizeof(signature)) == 0) 3119 break; 3120 if (time_after(jiffies, timeout)) { 3121 dev_err(&ctrl_info->pci_dev->dev, 3122 "timed out waiting for PQI signature\n"); 3123 return -ETIMEDOUT; 3124 } 3125 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3126 } 3127 3128 while (1) { 3129 status = readb(&pqi_registers->function_and_status_code); 3130 if (status == PQI_STATUS_IDLE) 3131 break; 3132 if (time_after(jiffies, timeout)) { 3133 dev_err(&ctrl_info->pci_dev->dev, 3134 "timed out waiting for PQI IDLE\n"); 3135 return -ETIMEDOUT; 3136 } 3137 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3138 } 3139 3140 while (1) { 3141 if (readl(&pqi_registers->device_status) == 3142 PQI_DEVICE_STATE_ALL_REGISTERS_READY) 3143 break; 3144 if (time_after(jiffies, timeout)) { 3145 dev_err(&ctrl_info->pci_dev->dev, 3146 "timed out waiting for PQI all registers ready\n"); 3147 return -ETIMEDOUT; 3148 } 3149 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3150 } 3151 3152 return 0; 3153} 3154 3155static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) 3156{ 3157 struct pqi_scsi_dev *device; 3158 3159 device = io_request->scmd->device->hostdata; 3160 device->raid_bypass_enabled = false; 3161 device->aio_enabled = false; 3162} 3163 3164static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path) 3165{ 3166 struct pqi_ctrl_info *ctrl_info; 3167 struct pqi_scsi_dev *device; 3168 3169 device = sdev->hostdata; 3170 if (device->device_offline) 3171 return; 3172 3173 device->device_offline = true; 3174 ctrl_info = shost_to_hba(sdev->host); 3175 pqi_schedule_rescan_worker(ctrl_info); 3176 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n", 3177 path, ctrl_info->scsi_host->host_no, device->bus, 3178 device->target, device->lun); 3179} 3180 3181static void pqi_process_raid_io_error(struct pqi_io_request *io_request) 3182{ 3183 u8 scsi_status; 3184 u8 host_byte; 3185 struct scsi_cmnd *scmd; 3186 struct pqi_raid_error_info *error_info; 3187 size_t sense_data_length; 3188 int residual_count; 3189 int xfer_count; 3190 struct scsi_sense_hdr sshdr; 3191 3192 scmd = io_request->scmd; 3193 if (!scmd) 3194 return; 3195 3196 error_info = io_request->error_info; 3197 scsi_status = error_info->status; 3198 host_byte = DID_OK; 3199 3200 switch (error_info->data_out_result) { 3201 case PQI_DATA_IN_OUT_GOOD: 3202 break; 3203 case PQI_DATA_IN_OUT_UNDERFLOW: 3204 xfer_count = 3205 get_unaligned_le32(&error_info->data_out_transferred); 3206 residual_count = scsi_bufflen(scmd) - xfer_count; 3207 scsi_set_resid(scmd, residual_count); 3208 if (xfer_count < scmd->underflow) 3209 host_byte = DID_SOFT_ERROR; 3210 break; 3211 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 3212 case PQI_DATA_IN_OUT_ABORTED: 3213 host_byte = DID_ABORT; 3214 break; 3215 case PQI_DATA_IN_OUT_TIMEOUT: 3216 host_byte = DID_TIME_OUT; 3217 break; 3218 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 3219 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 3220 case PQI_DATA_IN_OUT_BUFFER_ERROR: 3221 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 3222 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 3223 case PQI_DATA_IN_OUT_ERROR: 3224 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 3225 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 3226 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 3227 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 3228 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 3229 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 3230 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 3231 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 3232 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 3233 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 3234 default: 3235 host_byte = DID_ERROR; 3236 break; 3237 } 3238 3239 sense_data_length = get_unaligned_le16(&error_info->sense_data_length); 3240 if (sense_data_length == 0) 3241 sense_data_length = 3242 get_unaligned_le16(&error_info->response_data_length); 3243 if (sense_data_length) { 3244 if (sense_data_length > sizeof(error_info->data)) 3245 sense_data_length = sizeof(error_info->data); 3246 3247 if (scsi_status == SAM_STAT_CHECK_CONDITION && 3248 scsi_normalize_sense(error_info->data, 3249 sense_data_length, &sshdr) && 3250 sshdr.sense_key == HARDWARE_ERROR && 3251 sshdr.asc == 0x3e) { 3252 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host); 3253 struct pqi_scsi_dev *device = scmd->device->hostdata; 3254 3255 switch (sshdr.ascq) { 3256 case 0x1: /* LOGICAL UNIT FAILURE */ 3257 if (printk_ratelimit()) 3258 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n", 3259 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3260 pqi_take_device_offline(scmd->device, "RAID"); 3261 host_byte = DID_NO_CONNECT; 3262 break; 3263 3264 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */ 3265 if (printk_ratelimit()) 3266 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n", 3267 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3268 break; 3269 } 3270 } 3271 3272 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3273 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3274 memcpy(scmd->sense_buffer, error_info->data, 3275 sense_data_length); 3276 } 3277 3278 if (pqi_cmd_priv(scmd)->this_residual && 3279 !pqi_is_logical_device(scmd->device->hostdata) && 3280 scsi_status == SAM_STAT_CHECK_CONDITION && 3281 host_byte == DID_OK && 3282 sense_data_length && 3283 scsi_normalize_sense(error_info->data, sense_data_length, &sshdr) && 3284 sshdr.sense_key == ILLEGAL_REQUEST && 3285 sshdr.asc == 0x26 && 3286 sshdr.ascq == 0x0) { 3287 host_byte = DID_NO_CONNECT; 3288 pqi_take_device_offline(scmd->device, "AIO"); 3289 scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR, 0x3e, 0x1); 3290 } 3291 3292 scmd->result = scsi_status; 3293 set_host_byte(scmd, host_byte); 3294} 3295 3296static void pqi_process_aio_io_error(struct pqi_io_request *io_request) 3297{ 3298 u8 scsi_status; 3299 u8 host_byte; 3300 struct scsi_cmnd *scmd; 3301 struct pqi_aio_error_info *error_info; 3302 size_t sense_data_length; 3303 int residual_count; 3304 int xfer_count; 3305 bool device_offline; 3306 3307 scmd = io_request->scmd; 3308 error_info = io_request->error_info; 3309 host_byte = DID_OK; 3310 sense_data_length = 0; 3311 device_offline = false; 3312 3313 switch (error_info->service_response) { 3314 case PQI_AIO_SERV_RESPONSE_COMPLETE: 3315 scsi_status = error_info->status; 3316 break; 3317 case PQI_AIO_SERV_RESPONSE_FAILURE: 3318 switch (error_info->status) { 3319 case PQI_AIO_STATUS_IO_ABORTED: 3320 scsi_status = SAM_STAT_TASK_ABORTED; 3321 break; 3322 case PQI_AIO_STATUS_UNDERRUN: 3323 scsi_status = SAM_STAT_GOOD; 3324 residual_count = get_unaligned_le32( 3325 &error_info->residual_count); 3326 scsi_set_resid(scmd, residual_count); 3327 xfer_count = scsi_bufflen(scmd) - residual_count; 3328 if (xfer_count < scmd->underflow) 3329 host_byte = DID_SOFT_ERROR; 3330 break; 3331 case PQI_AIO_STATUS_OVERRUN: 3332 scsi_status = SAM_STAT_GOOD; 3333 break; 3334 case PQI_AIO_STATUS_AIO_PATH_DISABLED: 3335 pqi_aio_path_disabled(io_request); 3336 scsi_status = SAM_STAT_GOOD; 3337 io_request->status = -EAGAIN; 3338 break; 3339 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: 3340 case PQI_AIO_STATUS_INVALID_DEVICE: 3341 if (!io_request->raid_bypass) { 3342 device_offline = true; 3343 pqi_take_device_offline(scmd->device, "AIO"); 3344 host_byte = DID_NO_CONNECT; 3345 } 3346 scsi_status = SAM_STAT_CHECK_CONDITION; 3347 break; 3348 case PQI_AIO_STATUS_IO_ERROR: 3349 default: 3350 scsi_status = SAM_STAT_CHECK_CONDITION; 3351 break; 3352 } 3353 break; 3354 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: 3355 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: 3356 scsi_status = SAM_STAT_GOOD; 3357 break; 3358 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: 3359 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: 3360 default: 3361 scsi_status = SAM_STAT_CHECK_CONDITION; 3362 break; 3363 } 3364 3365 if (error_info->data_present) { 3366 sense_data_length = 3367 get_unaligned_le16(&error_info->data_length); 3368 if (sense_data_length) { 3369 if (sense_data_length > sizeof(error_info->data)) 3370 sense_data_length = sizeof(error_info->data); 3371 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3372 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3373 memcpy(scmd->sense_buffer, error_info->data, 3374 sense_data_length); 3375 } 3376 } 3377 3378 if (device_offline && sense_data_length == 0) 3379 scsi_build_sense(scmd, 0, HARDWARE_ERROR, 0x3e, 0x1); 3380 3381 scmd->result = scsi_status; 3382 set_host_byte(scmd, host_byte); 3383} 3384 3385static void pqi_process_io_error(unsigned int iu_type, 3386 struct pqi_io_request *io_request) 3387{ 3388 switch (iu_type) { 3389 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3390 pqi_process_raid_io_error(io_request); 3391 break; 3392 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3393 pqi_process_aio_io_error(io_request); 3394 break; 3395 } 3396} 3397 3398static int pqi_interpret_task_management_response(struct pqi_ctrl_info *ctrl_info, 3399 struct pqi_task_management_response *response) 3400{ 3401 int rc; 3402 3403 switch (response->response_code) { 3404 case SOP_TMF_COMPLETE: 3405 case SOP_TMF_FUNCTION_SUCCEEDED: 3406 rc = 0; 3407 break; 3408 case SOP_TMF_REJECTED: 3409 rc = -EAGAIN; 3410 break; 3411 case SOP_TMF_INCORRECT_LOGICAL_UNIT: 3412 rc = -ENODEV; 3413 break; 3414 default: 3415 rc = -EIO; 3416 break; 3417 } 3418 3419 if (rc) 3420 dev_err(&ctrl_info->pci_dev->dev, 3421 "Task Management Function error: %d (response code: %u)\n", rc, response->response_code); 3422 3423 return rc; 3424} 3425 3426static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info, 3427 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 3428{ 3429 pqi_take_ctrl_offline(ctrl_info, ctrl_shutdown_reason); 3430} 3431 3432static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group) 3433{ 3434 int num_responses; 3435 pqi_index_t oq_pi; 3436 pqi_index_t oq_ci; 3437 struct pqi_io_request *io_request; 3438 struct pqi_io_response *response; 3439 u16 request_id; 3440 3441 num_responses = 0; 3442 oq_ci = queue_group->oq_ci_copy; 3443 3444 while (1) { 3445 oq_pi = readl(queue_group->oq_pi); 3446 if (oq_pi >= ctrl_info->num_elements_per_oq) { 3447 pqi_invalid_response(ctrl_info, PQI_IO_PI_OUT_OF_RANGE); 3448 dev_err(&ctrl_info->pci_dev->dev, 3449 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3450 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci); 3451 return -1; 3452 } 3453 if (oq_pi == oq_ci) 3454 break; 3455 3456 num_responses++; 3457 response = queue_group->oq_element_array + 3458 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 3459 3460 request_id = get_unaligned_le16(&response->request_id); 3461 if (request_id >= ctrl_info->max_io_slots) { 3462 pqi_invalid_response(ctrl_info, PQI_INVALID_REQ_ID); 3463 dev_err(&ctrl_info->pci_dev->dev, 3464 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n", 3465 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci); 3466 return -1; 3467 } 3468 3469 io_request = &ctrl_info->io_request_pool[request_id]; 3470 if (atomic_read(&io_request->refcount) == 0) { 3471 pqi_invalid_response(ctrl_info, PQI_UNMATCHED_REQ_ID); 3472 dev_err(&ctrl_info->pci_dev->dev, 3473 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n", 3474 request_id, oq_pi, oq_ci); 3475 return -1; 3476 } 3477 3478 switch (response->header.iu_type) { 3479 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: 3480 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: 3481 if (io_request->scmd) 3482 io_request->scmd->result = 0; 3483 fallthrough; 3484 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: 3485 break; 3486 case PQI_RESPONSE_IU_VENDOR_GENERAL: 3487 io_request->status = 3488 get_unaligned_le16( 3489 &((struct pqi_vendor_general_response *)response)->status); 3490 break; 3491 case PQI_RESPONSE_IU_TASK_MANAGEMENT: 3492 io_request->status = pqi_interpret_task_management_response(ctrl_info, 3493 (void *)response); 3494 break; 3495 case PQI_RESPONSE_IU_AIO_PATH_DISABLED: 3496 pqi_aio_path_disabled(io_request); 3497 io_request->status = -EAGAIN; 3498 break; 3499 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3500 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3501 io_request->error_info = ctrl_info->error_buffer + 3502 (get_unaligned_le16(&response->error_index) * 3503 PQI_ERROR_BUFFER_ELEMENT_LENGTH); 3504 pqi_process_io_error(response->header.iu_type, io_request); 3505 break; 3506 default: 3507 pqi_invalid_response(ctrl_info, PQI_UNEXPECTED_IU_TYPE); 3508 dev_err(&ctrl_info->pci_dev->dev, 3509 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n", 3510 response->header.iu_type, oq_pi, oq_ci); 3511 return -1; 3512 } 3513 3514 io_request->io_complete_callback(io_request, io_request->context); 3515 3516 /* 3517 * Note that the I/O request structure CANNOT BE TOUCHED after 3518 * returning from the I/O completion callback! 3519 */ 3520 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; 3521 } 3522 3523 if (num_responses) { 3524 queue_group->oq_ci_copy = oq_ci; 3525 writel(oq_ci, queue_group->oq_ci); 3526 } 3527 3528 return num_responses; 3529} 3530 3531static inline unsigned int pqi_num_elements_free(unsigned int pi, 3532 unsigned int ci, unsigned int elements_in_queue) 3533{ 3534 unsigned int num_elements_used; 3535 3536 if (pi >= ci) 3537 num_elements_used = pi - ci; 3538 else 3539 num_elements_used = elements_in_queue - ci + pi; 3540 3541 return elements_in_queue - num_elements_used - 1; 3542} 3543 3544static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info, 3545 struct pqi_event_acknowledge_request *iu, size_t iu_length) 3546{ 3547 pqi_index_t iq_pi; 3548 pqi_index_t iq_ci; 3549 unsigned long flags; 3550 void *next_element; 3551 struct pqi_queue_group *queue_group; 3552 3553 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; 3554 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); 3555 3556 while (1) { 3557 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); 3558 3559 iq_pi = queue_group->iq_pi_copy[RAID_PATH]; 3560 iq_ci = readl(queue_group->iq_ci[RAID_PATH]); 3561 3562 if (pqi_num_elements_free(iq_pi, iq_ci, 3563 ctrl_info->num_elements_per_iq)) 3564 break; 3565 3566 spin_unlock_irqrestore( 3567 &queue_group->submit_lock[RAID_PATH], flags); 3568 3569 if (pqi_ctrl_offline(ctrl_info)) 3570 return; 3571 } 3572 3573 next_element = queue_group->iq_element_array[RAID_PATH] + 3574 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3575 3576 memcpy(next_element, iu, iu_length); 3577 3578 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; 3579 queue_group->iq_pi_copy[RAID_PATH] = iq_pi; 3580 3581 /* 3582 * This write notifies the controller that an IU is available to be 3583 * processed. 3584 */ 3585 writel(iq_pi, queue_group->iq_pi[RAID_PATH]); 3586 3587 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); 3588} 3589 3590static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, 3591 struct pqi_event *event) 3592{ 3593 struct pqi_event_acknowledge_request request; 3594 3595 memset(&request, 0, sizeof(request)); 3596 3597 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; 3598 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 3599 &request.header.iu_length); 3600 request.event_type = event->event_type; 3601 put_unaligned_le16(event->event_id, &request.event_id); 3602 put_unaligned_le32(event->additional_event_id, &request.additional_event_id); 3603 3604 pqi_send_event_ack(ctrl_info, &request, sizeof(request)); 3605} 3606 3607#define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30 3608#define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1 3609 3610static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status( 3611 struct pqi_ctrl_info *ctrl_info) 3612{ 3613 u8 status; 3614 unsigned long timeout; 3615 3616 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * HZ) + jiffies; 3617 3618 while (1) { 3619 status = pqi_read_soft_reset_status(ctrl_info); 3620 if (status & PQI_SOFT_RESET_INITIATE) 3621 return RESET_INITIATE_DRIVER; 3622 3623 if (status & PQI_SOFT_RESET_ABORT) 3624 return RESET_ABORT; 3625 3626 if (!sis_is_firmware_running(ctrl_info)) 3627 return RESET_NORESPONSE; 3628 3629 if (time_after(jiffies, timeout)) { 3630 dev_warn(&ctrl_info->pci_dev->dev, 3631 "timed out waiting for soft reset status\n"); 3632 return RESET_TIMEDOUT; 3633 } 3634 3635 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS); 3636 } 3637} 3638 3639static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info) 3640{ 3641 int rc; 3642 unsigned int delay_secs; 3643 enum pqi_soft_reset_status reset_status; 3644 3645 if (ctrl_info->soft_reset_handshake_supported) 3646 reset_status = pqi_poll_for_soft_reset_status(ctrl_info); 3647 else 3648 reset_status = RESET_INITIATE_FIRMWARE; 3649 3650 delay_secs = PQI_POST_RESET_DELAY_SECS; 3651 3652 switch (reset_status) { 3653 case RESET_TIMEDOUT: 3654 delay_secs = PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS; 3655 fallthrough; 3656 case RESET_INITIATE_DRIVER: 3657 dev_info(&ctrl_info->pci_dev->dev, 3658 "Online Firmware Activation: resetting controller\n"); 3659 sis_soft_reset(ctrl_info); 3660 fallthrough; 3661 case RESET_INITIATE_FIRMWARE: 3662 ctrl_info->pqi_mode_enabled = false; 3663 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 3664 rc = pqi_ofa_ctrl_restart(ctrl_info, delay_secs); 3665 pqi_host_free_buffer(ctrl_info, &ctrl_info->ofa_memory); 3666 pqi_ctrl_ofa_done(ctrl_info); 3667 dev_info(&ctrl_info->pci_dev->dev, 3668 "Online Firmware Activation: %s\n", 3669 rc == 0 ? "SUCCESS" : "FAILED"); 3670 break; 3671 case RESET_ABORT: 3672 dev_info(&ctrl_info->pci_dev->dev, 3673 "Online Firmware Activation ABORTED\n"); 3674 if (ctrl_info->soft_reset_handshake_supported) 3675 pqi_clear_soft_reset_status(ctrl_info); 3676 pqi_host_free_buffer(ctrl_info, &ctrl_info->ofa_memory); 3677 pqi_ctrl_ofa_done(ctrl_info); 3678 pqi_ofa_ctrl_unquiesce(ctrl_info); 3679 break; 3680 case RESET_NORESPONSE: 3681 fallthrough; 3682 default: 3683 dev_err(&ctrl_info->pci_dev->dev, 3684 "unexpected Online Firmware Activation reset status: 0x%x\n", 3685 reset_status); 3686 pqi_host_free_buffer(ctrl_info, &ctrl_info->ofa_memory); 3687 pqi_ctrl_ofa_done(ctrl_info); 3688 pqi_ofa_ctrl_unquiesce(ctrl_info); 3689 pqi_take_ctrl_offline(ctrl_info, PQI_OFA_RESPONSE_TIMEOUT); 3690 break; 3691 } 3692} 3693 3694static void pqi_ofa_memory_alloc_worker(struct work_struct *work) 3695{ 3696 struct pqi_ctrl_info *ctrl_info; 3697 3698 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_memory_alloc_work); 3699 3700 pqi_ctrl_ofa_start(ctrl_info); 3701 pqi_host_setup_buffer(ctrl_info, &ctrl_info->ofa_memory, ctrl_info->ofa_bytes_requested, ctrl_info->ofa_bytes_requested); 3702 pqi_host_memory_update(ctrl_info, &ctrl_info->ofa_memory, PQI_VENDOR_GENERAL_OFA_MEMORY_UPDATE); 3703} 3704 3705static void pqi_ofa_quiesce_worker(struct work_struct *work) 3706{ 3707 struct pqi_ctrl_info *ctrl_info; 3708 struct pqi_event *event; 3709 3710 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_quiesce_work); 3711 3712 event = &ctrl_info->events[pqi_event_type_to_event_index(PQI_EVENT_TYPE_OFA)]; 3713 3714 pqi_ofa_ctrl_quiesce(ctrl_info); 3715 pqi_acknowledge_event(ctrl_info, event); 3716 pqi_process_soft_reset(ctrl_info); 3717} 3718 3719static bool pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info, 3720 struct pqi_event *event) 3721{ 3722 bool ack_event; 3723 3724 ack_event = true; 3725 3726 switch (event->event_id) { 3727 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3728 dev_info(&ctrl_info->pci_dev->dev, 3729 "received Online Firmware Activation memory allocation request\n"); 3730 schedule_work(&ctrl_info->ofa_memory_alloc_work); 3731 break; 3732 case PQI_EVENT_OFA_QUIESCE: 3733 dev_info(&ctrl_info->pci_dev->dev, 3734 "received Online Firmware Activation quiesce request\n"); 3735 schedule_work(&ctrl_info->ofa_quiesce_work); 3736 ack_event = false; 3737 break; 3738 case PQI_EVENT_OFA_CANCELED: 3739 dev_info(&ctrl_info->pci_dev->dev, 3740 "received Online Firmware Activation cancel request: reason: %u\n", 3741 ctrl_info->ofa_cancel_reason); 3742 pqi_host_free_buffer(ctrl_info, &ctrl_info->ofa_memory); 3743 pqi_ctrl_ofa_done(ctrl_info); 3744 break; 3745 default: 3746 dev_err(&ctrl_info->pci_dev->dev, 3747 "received unknown Online Firmware Activation request: event ID: %u\n", 3748 event->event_id); 3749 break; 3750 } 3751 3752 return ack_event; 3753} 3754 3755static void pqi_mark_volumes_for_rescan(struct pqi_ctrl_info *ctrl_info) 3756{ 3757 unsigned long flags; 3758 struct pqi_scsi_dev *device; 3759 3760 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 3761 3762 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 3763 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) 3764 device->rescan = true; 3765 } 3766 3767 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 3768} 3769 3770static void pqi_disable_raid_bypass(struct pqi_ctrl_info *ctrl_info) 3771{ 3772 unsigned long flags; 3773 struct pqi_scsi_dev *device; 3774 3775 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 3776 3777 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 3778 if (device->raid_bypass_enabled) 3779 device->raid_bypass_enabled = false; 3780 3781 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 3782} 3783 3784static void pqi_event_worker(struct work_struct *work) 3785{ 3786 unsigned int i; 3787 bool rescan_needed; 3788 struct pqi_ctrl_info *ctrl_info; 3789 struct pqi_event *event; 3790 bool ack_event; 3791 3792 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); 3793 3794 pqi_ctrl_busy(ctrl_info); 3795 pqi_wait_if_ctrl_blocked(ctrl_info); 3796 if (pqi_ctrl_offline(ctrl_info)) 3797 goto out; 3798 3799 rescan_needed = false; 3800 event = ctrl_info->events; 3801 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { 3802 if (event->pending) { 3803 event->pending = false; 3804 if (event->event_type == PQI_EVENT_TYPE_OFA) { 3805 ack_event = pqi_ofa_process_event(ctrl_info, event); 3806 } else { 3807 ack_event = true; 3808 rescan_needed = true; 3809 if (event->event_type == PQI_EVENT_TYPE_LOGICAL_DEVICE) 3810 pqi_mark_volumes_for_rescan(ctrl_info); 3811 else if (event->event_type == PQI_EVENT_TYPE_AIO_STATE_CHANGE) 3812 pqi_disable_raid_bypass(ctrl_info); 3813 } 3814 if (ack_event) 3815 pqi_acknowledge_event(ctrl_info, event); 3816 } 3817 event++; 3818 } 3819 3820#define PQI_RESCAN_WORK_FOR_EVENT_DELAY (5 * HZ) 3821 3822 if (rescan_needed) 3823 pqi_schedule_rescan_worker_with_delay(ctrl_info, 3824 PQI_RESCAN_WORK_FOR_EVENT_DELAY); 3825 3826out: 3827 pqi_ctrl_unbusy(ctrl_info); 3828} 3829 3830#define PQI_HEARTBEAT_TIMER_INTERVAL (10 * HZ) 3831 3832static void pqi_heartbeat_timer_handler(struct timer_list *t) 3833{ 3834 int num_interrupts; 3835 u32 heartbeat_count; 3836 struct pqi_ctrl_info *ctrl_info = timer_container_of(ctrl_info, t, 3837 heartbeat_timer); 3838 3839 pqi_check_ctrl_health(ctrl_info); 3840 if (pqi_ctrl_offline(ctrl_info)) 3841 return; 3842 3843 num_interrupts = atomic_read(&ctrl_info->num_interrupts); 3844 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info); 3845 3846 if (num_interrupts == ctrl_info->previous_num_interrupts) { 3847 if (heartbeat_count == ctrl_info->previous_heartbeat_count) { 3848 dev_err(&ctrl_info->pci_dev->dev, 3849 "no heartbeat detected - last heartbeat count: %u\n", 3850 heartbeat_count); 3851 pqi_take_ctrl_offline(ctrl_info, PQI_NO_HEARTBEAT); 3852 return; 3853 } 3854 } else { 3855 ctrl_info->previous_num_interrupts = num_interrupts; 3856 } 3857 3858 ctrl_info->previous_heartbeat_count = heartbeat_count; 3859 mod_timer(&ctrl_info->heartbeat_timer, 3860 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); 3861} 3862 3863static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3864{ 3865 if (!ctrl_info->heartbeat_counter) 3866 return; 3867 3868 ctrl_info->previous_num_interrupts = 3869 atomic_read(&ctrl_info->num_interrupts); 3870 ctrl_info->previous_heartbeat_count = 3871 pqi_read_heartbeat_counter(ctrl_info); 3872 3873 ctrl_info->heartbeat_timer.expires = 3874 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; 3875 add_timer(&ctrl_info->heartbeat_timer); 3876} 3877 3878static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3879{ 3880 timer_delete_sync(&ctrl_info->heartbeat_timer); 3881} 3882 3883static void pqi_ofa_capture_event_payload(struct pqi_ctrl_info *ctrl_info, 3884 struct pqi_event *event, struct pqi_event_response *response) 3885{ 3886 switch (event->event_id) { 3887 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3888 ctrl_info->ofa_bytes_requested = 3889 get_unaligned_le32(&response->data.ofa_memory_allocation.bytes_requested); 3890 break; 3891 case PQI_EVENT_OFA_CANCELED: 3892 ctrl_info->ofa_cancel_reason = 3893 get_unaligned_le16(&response->data.ofa_cancelled.reason); 3894 break; 3895 } 3896} 3897 3898static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) 3899{ 3900 int num_events; 3901 pqi_index_t oq_pi; 3902 pqi_index_t oq_ci; 3903 struct pqi_event_queue *event_queue; 3904 struct pqi_event_response *response; 3905 struct pqi_event *event; 3906 int event_index; 3907 3908 event_queue = &ctrl_info->event_queue; 3909 num_events = 0; 3910 oq_ci = event_queue->oq_ci_copy; 3911 3912 while (1) { 3913 oq_pi = readl(event_queue->oq_pi); 3914 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) { 3915 pqi_invalid_response(ctrl_info, PQI_EVENT_PI_OUT_OF_RANGE); 3916 dev_err(&ctrl_info->pci_dev->dev, 3917 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3918 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci); 3919 return -1; 3920 } 3921 3922 if (oq_pi == oq_ci) 3923 break; 3924 3925 num_events++; 3926 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); 3927 3928 event_index = pqi_event_type_to_event_index(response->event_type); 3929 3930 if (event_index >= 0 && response->request_acknowledge) { 3931 event = &ctrl_info->events[event_index]; 3932 event->pending = true; 3933 event->event_type = response->event_type; 3934 event->event_id = get_unaligned_le16(&response->event_id); 3935 event->additional_event_id = 3936 get_unaligned_le32(&response->additional_event_id); 3937 if (event->event_type == PQI_EVENT_TYPE_OFA) 3938 pqi_ofa_capture_event_payload(ctrl_info, event, response); 3939 } 3940 3941 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; 3942 } 3943 3944 if (num_events) { 3945 event_queue->oq_ci_copy = oq_ci; 3946 writel(oq_ci, event_queue->oq_ci); 3947 schedule_work(&ctrl_info->event_work); 3948 } 3949 3950 return num_events; 3951} 3952 3953#define PQI_LEGACY_INTX_MASK 0x1 3954 3955static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, bool enable_intx) 3956{ 3957 u32 intx_mask; 3958 struct pqi_device_registers __iomem *pqi_registers; 3959 volatile void __iomem *register_addr; 3960 3961 pqi_registers = ctrl_info->pqi_registers; 3962 3963 if (enable_intx) 3964 register_addr = &pqi_registers->legacy_intx_mask_clear; 3965 else 3966 register_addr = &pqi_registers->legacy_intx_mask_set; 3967 3968 intx_mask = readl(register_addr); 3969 intx_mask |= PQI_LEGACY_INTX_MASK; 3970 writel(intx_mask, register_addr); 3971} 3972 3973static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info, 3974 enum pqi_irq_mode new_mode) 3975{ 3976 switch (ctrl_info->irq_mode) { 3977 case IRQ_MODE_MSIX: 3978 switch (new_mode) { 3979 case IRQ_MODE_MSIX: 3980 break; 3981 case IRQ_MODE_INTX: 3982 pqi_configure_legacy_intx(ctrl_info, true); 3983 sis_enable_intx(ctrl_info); 3984 break; 3985 case IRQ_MODE_NONE: 3986 break; 3987 } 3988 break; 3989 case IRQ_MODE_INTX: 3990 switch (new_mode) { 3991 case IRQ_MODE_MSIX: 3992 pqi_configure_legacy_intx(ctrl_info, false); 3993 sis_enable_msix(ctrl_info); 3994 break; 3995 case IRQ_MODE_INTX: 3996 break; 3997 case IRQ_MODE_NONE: 3998 pqi_configure_legacy_intx(ctrl_info, false); 3999 break; 4000 } 4001 break; 4002 case IRQ_MODE_NONE: 4003 switch (new_mode) { 4004 case IRQ_MODE_MSIX: 4005 sis_enable_msix(ctrl_info); 4006 break; 4007 case IRQ_MODE_INTX: 4008 pqi_configure_legacy_intx(ctrl_info, true); 4009 sis_enable_intx(ctrl_info); 4010 break; 4011 case IRQ_MODE_NONE: 4012 break; 4013 } 4014 break; 4015 } 4016 4017 ctrl_info->irq_mode = new_mode; 4018} 4019 4020#define PQI_LEGACY_INTX_PENDING 0x1 4021 4022static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info) 4023{ 4024 bool valid_irq; 4025 u32 intx_status; 4026 4027 switch (ctrl_info->irq_mode) { 4028 case IRQ_MODE_MSIX: 4029 valid_irq = true; 4030 break; 4031 case IRQ_MODE_INTX: 4032 intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status); 4033 if (intx_status & PQI_LEGACY_INTX_PENDING) 4034 valid_irq = true; 4035 else 4036 valid_irq = false; 4037 break; 4038 case IRQ_MODE_NONE: 4039 default: 4040 valid_irq = false; 4041 break; 4042 } 4043 4044 return valid_irq; 4045} 4046 4047static irqreturn_t pqi_irq_handler(int irq, void *data) 4048{ 4049 struct pqi_ctrl_info *ctrl_info; 4050 struct pqi_queue_group *queue_group; 4051 int num_io_responses_handled; 4052 int num_events_handled; 4053 4054 queue_group = data; 4055 ctrl_info = queue_group->ctrl_info; 4056 4057 if (!pqi_is_valid_irq(ctrl_info)) 4058 return IRQ_NONE; 4059 4060 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); 4061 if (num_io_responses_handled < 0) 4062 goto out; 4063 4064 if (irq == ctrl_info->event_irq) { 4065 num_events_handled = pqi_process_event_intr(ctrl_info); 4066 if (num_events_handled < 0) 4067 goto out; 4068 } else { 4069 num_events_handled = 0; 4070 } 4071 4072 if (num_io_responses_handled + num_events_handled > 0) 4073 atomic_inc(&ctrl_info->num_interrupts); 4074 4075 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); 4076 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); 4077 4078out: 4079 return IRQ_HANDLED; 4080} 4081 4082static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) 4083{ 4084 struct pci_dev *pci_dev = ctrl_info->pci_dev; 4085 int i; 4086 int rc; 4087 4088 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0); 4089 4090 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { 4091 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0, 4092 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); 4093 if (rc) { 4094 dev_err(&pci_dev->dev, 4095 "irq %u init failed with error %d\n", 4096 pci_irq_vector(pci_dev, i), rc); 4097 return rc; 4098 } 4099 ctrl_info->num_msix_vectors_initialized++; 4100 } 4101 4102 return 0; 4103} 4104 4105static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) 4106{ 4107 int i; 4108 4109 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) 4110 free_irq(pci_irq_vector(ctrl_info->pci_dev, i), 4111 &ctrl_info->queue_groups[i]); 4112 4113 ctrl_info->num_msix_vectors_initialized = 0; 4114} 4115 4116static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4117{ 4118 int num_vectors_enabled; 4119 unsigned int flags = PCI_IRQ_MSIX; 4120 4121 if (!pqi_disable_managed_interrupts) 4122 flags |= PCI_IRQ_AFFINITY; 4123 4124 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, 4125 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, 4126 flags); 4127 if (num_vectors_enabled < 0) { 4128 dev_err(&ctrl_info->pci_dev->dev, 4129 "MSI-X init failed with error %d\n", 4130 num_vectors_enabled); 4131 return num_vectors_enabled; 4132 } 4133 4134 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; 4135 ctrl_info->irq_mode = IRQ_MODE_MSIX; 4136 return 0; 4137} 4138 4139static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4140{ 4141 if (ctrl_info->num_msix_vectors_enabled) { 4142 pci_free_irq_vectors(ctrl_info->pci_dev); 4143 ctrl_info->num_msix_vectors_enabled = 0; 4144 } 4145} 4146 4147static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) 4148{ 4149 unsigned int i; 4150 size_t alloc_length; 4151 size_t element_array_length_per_iq; 4152 size_t element_array_length_per_oq; 4153 void *element_array; 4154 void __iomem *next_queue_index; 4155 void *aligned_pointer; 4156 unsigned int num_inbound_queues; 4157 unsigned int num_outbound_queues; 4158 unsigned int num_queue_indexes; 4159 struct pqi_queue_group *queue_group; 4160 4161 element_array_length_per_iq = 4162 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * 4163 ctrl_info->num_elements_per_iq; 4164 element_array_length_per_oq = 4165 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * 4166 ctrl_info->num_elements_per_oq; 4167 num_inbound_queues = ctrl_info->num_queue_groups * 2; 4168 num_outbound_queues = ctrl_info->num_queue_groups; 4169 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; 4170 4171 aligned_pointer = NULL; 4172 4173 for (i = 0; i < num_inbound_queues; i++) { 4174 aligned_pointer = PTR_ALIGN(aligned_pointer, 4175 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4176 aligned_pointer += element_array_length_per_iq; 4177 } 4178 4179 for (i = 0; i < num_outbound_queues; i++) { 4180 aligned_pointer = PTR_ALIGN(aligned_pointer, 4181 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4182 aligned_pointer += element_array_length_per_oq; 4183 } 4184 4185 aligned_pointer = PTR_ALIGN(aligned_pointer, 4186 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4187 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4188 PQI_EVENT_OQ_ELEMENT_LENGTH; 4189 4190 for (i = 0; i < num_queue_indexes; i++) { 4191 aligned_pointer = PTR_ALIGN(aligned_pointer, 4192 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4193 aligned_pointer += sizeof(pqi_index_t); 4194 } 4195 4196 alloc_length = (size_t)aligned_pointer + 4197 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4198 4199 alloc_length += PQI_EXTRA_SGL_MEMORY; 4200 4201 ctrl_info->queue_memory_base = 4202 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4203 &ctrl_info->queue_memory_base_dma_handle, 4204 GFP_KERNEL); 4205 4206 if (!ctrl_info->queue_memory_base) 4207 return -ENOMEM; 4208 4209 ctrl_info->queue_memory_length = alloc_length; 4210 4211 element_array = PTR_ALIGN(ctrl_info->queue_memory_base, 4212 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4213 4214 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4215 queue_group = &ctrl_info->queue_groups[i]; 4216 queue_group->iq_element_array[RAID_PATH] = element_array; 4217 queue_group->iq_element_array_bus_addr[RAID_PATH] = 4218 ctrl_info->queue_memory_base_dma_handle + 4219 (element_array - ctrl_info->queue_memory_base); 4220 element_array += element_array_length_per_iq; 4221 element_array = PTR_ALIGN(element_array, 4222 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4223 queue_group->iq_element_array[AIO_PATH] = element_array; 4224 queue_group->iq_element_array_bus_addr[AIO_PATH] = 4225 ctrl_info->queue_memory_base_dma_handle + 4226 (element_array - ctrl_info->queue_memory_base); 4227 element_array += element_array_length_per_iq; 4228 element_array = PTR_ALIGN(element_array, 4229 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4230 } 4231 4232 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4233 queue_group = &ctrl_info->queue_groups[i]; 4234 queue_group->oq_element_array = element_array; 4235 queue_group->oq_element_array_bus_addr = 4236 ctrl_info->queue_memory_base_dma_handle + 4237 (element_array - ctrl_info->queue_memory_base); 4238 element_array += element_array_length_per_oq; 4239 element_array = PTR_ALIGN(element_array, 4240 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4241 } 4242 4243 ctrl_info->event_queue.oq_element_array = element_array; 4244 ctrl_info->event_queue.oq_element_array_bus_addr = 4245 ctrl_info->queue_memory_base_dma_handle + 4246 (element_array - ctrl_info->queue_memory_base); 4247 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4248 PQI_EVENT_OQ_ELEMENT_LENGTH; 4249 4250 next_queue_index = (void __iomem *)PTR_ALIGN(element_array, 4251 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4252 4253 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4254 queue_group = &ctrl_info->queue_groups[i]; 4255 queue_group->iq_ci[RAID_PATH] = next_queue_index; 4256 queue_group->iq_ci_bus_addr[RAID_PATH] = 4257 ctrl_info->queue_memory_base_dma_handle + 4258 (next_queue_index - 4259 (void __iomem *)ctrl_info->queue_memory_base); 4260 next_queue_index += sizeof(pqi_index_t); 4261 next_queue_index = PTR_ALIGN(next_queue_index, 4262 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4263 queue_group->iq_ci[AIO_PATH] = next_queue_index; 4264 queue_group->iq_ci_bus_addr[AIO_PATH] = 4265 ctrl_info->queue_memory_base_dma_handle + 4266 (next_queue_index - 4267 (void __iomem *)ctrl_info->queue_memory_base); 4268 next_queue_index += sizeof(pqi_index_t); 4269 next_queue_index = PTR_ALIGN(next_queue_index, 4270 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4271 queue_group->oq_pi = next_queue_index; 4272 queue_group->oq_pi_bus_addr = 4273 ctrl_info->queue_memory_base_dma_handle + 4274 (next_queue_index - 4275 (void __iomem *)ctrl_info->queue_memory_base); 4276 next_queue_index += sizeof(pqi_index_t); 4277 next_queue_index = PTR_ALIGN(next_queue_index, 4278 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4279 } 4280 4281 ctrl_info->event_queue.oq_pi = next_queue_index; 4282 ctrl_info->event_queue.oq_pi_bus_addr = 4283 ctrl_info->queue_memory_base_dma_handle + 4284 (next_queue_index - 4285 (void __iomem *)ctrl_info->queue_memory_base); 4286 4287 return 0; 4288} 4289 4290static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) 4291{ 4292 unsigned int i; 4293 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4294 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4295 4296 /* 4297 * Initialize the backpointers to the controller structure in 4298 * each operational queue group structure. 4299 */ 4300 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4301 ctrl_info->queue_groups[i].ctrl_info = ctrl_info; 4302 4303 /* 4304 * Assign IDs to all operational queues. Note that the IDs 4305 * assigned to operational IQs are independent of the IDs 4306 * assigned to operational OQs. 4307 */ 4308 ctrl_info->event_queue.oq_id = next_oq_id++; 4309 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4310 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; 4311 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; 4312 ctrl_info->queue_groups[i].oq_id = next_oq_id++; 4313 } 4314 4315 /* 4316 * Assign MSI-X table entry indexes to all queues. Note that the 4317 * interrupt for the event queue is shared with the first queue group. 4318 */ 4319 ctrl_info->event_queue.int_msg_num = 0; 4320 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4321 ctrl_info->queue_groups[i].int_msg_num = i; 4322 4323 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4324 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); 4325 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); 4326 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); 4327 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); 4328 } 4329} 4330 4331static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) 4332{ 4333 size_t alloc_length; 4334 struct pqi_admin_queues_aligned *admin_queues_aligned; 4335 struct pqi_admin_queues *admin_queues; 4336 4337 alloc_length = sizeof(struct pqi_admin_queues_aligned) + 4338 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4339 4340 ctrl_info->admin_queue_memory_base = 4341 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4342 &ctrl_info->admin_queue_memory_base_dma_handle, 4343 GFP_KERNEL); 4344 4345 if (!ctrl_info->admin_queue_memory_base) 4346 return -ENOMEM; 4347 4348 ctrl_info->admin_queue_memory_length = alloc_length; 4349 4350 admin_queues = &ctrl_info->admin_queues; 4351 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, 4352 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4353 admin_queues->iq_element_array = 4354 &admin_queues_aligned->iq_element_array; 4355 admin_queues->oq_element_array = 4356 &admin_queues_aligned->oq_element_array; 4357 admin_queues->iq_ci = 4358 (pqi_index_t __iomem *)&admin_queues_aligned->iq_ci; 4359 admin_queues->oq_pi = 4360 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi; 4361 4362 admin_queues->iq_element_array_bus_addr = 4363 ctrl_info->admin_queue_memory_base_dma_handle + 4364 (admin_queues->iq_element_array - 4365 ctrl_info->admin_queue_memory_base); 4366 admin_queues->oq_element_array_bus_addr = 4367 ctrl_info->admin_queue_memory_base_dma_handle + 4368 (admin_queues->oq_element_array - 4369 ctrl_info->admin_queue_memory_base); 4370 admin_queues->iq_ci_bus_addr = 4371 ctrl_info->admin_queue_memory_base_dma_handle + 4372 ((void __iomem *)admin_queues->iq_ci - 4373 (void __iomem *)ctrl_info->admin_queue_memory_base); 4374 admin_queues->oq_pi_bus_addr = 4375 ctrl_info->admin_queue_memory_base_dma_handle + 4376 ((void __iomem *)admin_queues->oq_pi - 4377 (void __iomem *)ctrl_info->admin_queue_memory_base); 4378 4379 return 0; 4380} 4381 4382#define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES HZ 4383#define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 4384 4385static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) 4386{ 4387 struct pqi_device_registers __iomem *pqi_registers; 4388 struct pqi_admin_queues *admin_queues; 4389 unsigned long timeout; 4390 u8 status; 4391 u32 reg; 4392 4393 pqi_registers = ctrl_info->pqi_registers; 4394 admin_queues = &ctrl_info->admin_queues; 4395 4396 writeq((u64)admin_queues->iq_element_array_bus_addr, 4397 &pqi_registers->admin_iq_element_array_addr); 4398 writeq((u64)admin_queues->oq_element_array_bus_addr, 4399 &pqi_registers->admin_oq_element_array_addr); 4400 writeq((u64)admin_queues->iq_ci_bus_addr, 4401 &pqi_registers->admin_iq_ci_addr); 4402 writeq((u64)admin_queues->oq_pi_bus_addr, 4403 &pqi_registers->admin_oq_pi_addr); 4404 4405 reg = PQI_ADMIN_IQ_NUM_ELEMENTS | 4406 (PQI_ADMIN_OQ_NUM_ELEMENTS << 8) | 4407 (admin_queues->int_msg_num << 16); 4408 writel(reg, &pqi_registers->admin_iq_num_elements); 4409 4410 writel(PQI_CREATE_ADMIN_QUEUE_PAIR, 4411 &pqi_registers->function_and_status_code); 4412 4413 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; 4414 while (1) { 4415 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); 4416 status = readb(&pqi_registers->function_and_status_code); 4417 if (status == PQI_STATUS_IDLE) 4418 break; 4419 if (time_after(jiffies, timeout)) 4420 return -ETIMEDOUT; 4421 } 4422 4423 /* 4424 * The offset registers are not initialized to the correct 4425 * offsets until *after* the create admin queue pair command 4426 * completes successfully. 4427 */ 4428 admin_queues->iq_pi = ctrl_info->iomem_base + 4429 PQI_DEVICE_REGISTERS_OFFSET + 4430 readq(&pqi_registers->admin_iq_pi_offset); 4431 admin_queues->oq_ci = ctrl_info->iomem_base + 4432 PQI_DEVICE_REGISTERS_OFFSET + 4433 readq(&pqi_registers->admin_oq_ci_offset); 4434 4435 return 0; 4436} 4437 4438static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, 4439 struct pqi_general_admin_request *request) 4440{ 4441 struct pqi_admin_queues *admin_queues; 4442 void *next_element; 4443 pqi_index_t iq_pi; 4444 4445 admin_queues = &ctrl_info->admin_queues; 4446 iq_pi = admin_queues->iq_pi_copy; 4447 4448 next_element = admin_queues->iq_element_array + 4449 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); 4450 4451 memcpy(next_element, request, sizeof(*request)); 4452 4453 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; 4454 admin_queues->iq_pi_copy = iq_pi; 4455 4456 /* 4457 * This write notifies the controller that an IU is available to be 4458 * processed. 4459 */ 4460 writel(iq_pi, admin_queues->iq_pi); 4461} 4462 4463#define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60 4464 4465static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, 4466 struct pqi_general_admin_response *response) 4467{ 4468 struct pqi_admin_queues *admin_queues; 4469 pqi_index_t oq_pi; 4470 pqi_index_t oq_ci; 4471 unsigned long timeout; 4472 4473 admin_queues = &ctrl_info->admin_queues; 4474 oq_ci = admin_queues->oq_ci_copy; 4475 4476 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * HZ) + jiffies; 4477 4478 while (1) { 4479 oq_pi = readl(admin_queues->oq_pi); 4480 if (oq_pi != oq_ci) 4481 break; 4482 if (time_after(jiffies, timeout)) { 4483 dev_err(&ctrl_info->pci_dev->dev, 4484 "timed out waiting for admin response\n"); 4485 return -ETIMEDOUT; 4486 } 4487 if (!sis_is_firmware_running(ctrl_info)) 4488 return -ENXIO; 4489 usleep_range(1000, 2000); 4490 } 4491 4492 memcpy(response, admin_queues->oq_element_array + 4493 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); 4494 4495 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; 4496 admin_queues->oq_ci_copy = oq_ci; 4497 writel(oq_ci, admin_queues->oq_ci); 4498 4499 return 0; 4500} 4501 4502static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 4503 struct pqi_queue_group *queue_group, enum pqi_io_path path, 4504 struct pqi_io_request *io_request) 4505{ 4506 struct pqi_io_request *next; 4507 void *next_element; 4508 pqi_index_t iq_pi; 4509 pqi_index_t iq_ci; 4510 size_t iu_length; 4511 unsigned long flags; 4512 unsigned int num_elements_needed; 4513 unsigned int num_elements_to_end_of_queue; 4514 size_t copy_count; 4515 struct pqi_iu_header *request; 4516 4517 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 4518 4519 if (io_request) { 4520 io_request->queue_group = queue_group; 4521 list_add_tail(&io_request->request_list_entry, 4522 &queue_group->request_list[path]); 4523 } 4524 4525 iq_pi = queue_group->iq_pi_copy[path]; 4526 4527 list_for_each_entry_safe(io_request, next, 4528 &queue_group->request_list[path], request_list_entry) { 4529 4530 request = io_request->iu; 4531 4532 iu_length = get_unaligned_le16(&request->iu_length) + 4533 PQI_REQUEST_HEADER_LENGTH; 4534 num_elements_needed = 4535 DIV_ROUND_UP(iu_length, 4536 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4537 4538 iq_ci = readl(queue_group->iq_ci[path]); 4539 4540 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, 4541 ctrl_info->num_elements_per_iq)) 4542 break; 4543 4544 put_unaligned_le16(queue_group->oq_id, 4545 &request->response_queue_id); 4546 4547 next_element = queue_group->iq_element_array[path] + 4548 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4549 4550 num_elements_to_end_of_queue = 4551 ctrl_info->num_elements_per_iq - iq_pi; 4552 4553 if (num_elements_needed <= num_elements_to_end_of_queue) { 4554 memcpy(next_element, request, iu_length); 4555 } else { 4556 copy_count = num_elements_to_end_of_queue * 4557 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 4558 memcpy(next_element, request, copy_count); 4559 memcpy(queue_group->iq_element_array[path], 4560 (u8 *)request + copy_count, 4561 iu_length - copy_count); 4562 } 4563 4564 iq_pi = (iq_pi + num_elements_needed) % 4565 ctrl_info->num_elements_per_iq; 4566 4567 list_del(&io_request->request_list_entry); 4568 } 4569 4570 if (iq_pi != queue_group->iq_pi_copy[path]) { 4571 queue_group->iq_pi_copy[path] = iq_pi; 4572 /* 4573 * This write notifies the controller that one or more IUs are 4574 * available to be processed. 4575 */ 4576 writel(iq_pi, queue_group->iq_pi[path]); 4577 } 4578 4579 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 4580} 4581 4582#define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10 4583 4584static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info, 4585 struct completion *wait) 4586{ 4587 int rc; 4588 4589 while (1) { 4590 if (wait_for_completion_io_timeout(wait, 4591 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * HZ)) { 4592 rc = 0; 4593 break; 4594 } 4595 4596 pqi_check_ctrl_health(ctrl_info); 4597 if (pqi_ctrl_offline(ctrl_info)) { 4598 rc = -ENXIO; 4599 break; 4600 } 4601 } 4602 4603 return rc; 4604} 4605 4606static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, 4607 void *context) 4608{ 4609 struct completion *waiting = context; 4610 4611 complete(waiting); 4612} 4613 4614static int pqi_process_raid_io_error_synchronous( 4615 struct pqi_raid_error_info *error_info) 4616{ 4617 int rc = -EIO; 4618 4619 switch (error_info->data_out_result) { 4620 case PQI_DATA_IN_OUT_GOOD: 4621 if (error_info->status == SAM_STAT_GOOD) 4622 rc = 0; 4623 break; 4624 case PQI_DATA_IN_OUT_UNDERFLOW: 4625 if (error_info->status == SAM_STAT_GOOD || 4626 error_info->status == SAM_STAT_CHECK_CONDITION) 4627 rc = 0; 4628 break; 4629 case PQI_DATA_IN_OUT_ABORTED: 4630 rc = PQI_CMD_STATUS_ABORTED; 4631 break; 4632 } 4633 4634 return rc; 4635} 4636 4637static inline bool pqi_is_blockable_request(struct pqi_iu_header *request) 4638{ 4639 return (request->driver_flags & PQI_DRIVER_NONBLOCKABLE_REQUEST) == 0; 4640} 4641 4642static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 4643 struct pqi_iu_header *request, unsigned int flags, 4644 struct pqi_raid_error_info *error_info) 4645{ 4646 int rc = 0; 4647 struct pqi_io_request *io_request; 4648 size_t iu_length; 4649 DECLARE_COMPLETION_ONSTACK(wait); 4650 4651 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { 4652 if (down_interruptible(&ctrl_info->sync_request_sem)) 4653 return -ERESTARTSYS; 4654 } else { 4655 down(&ctrl_info->sync_request_sem); 4656 } 4657 4658 pqi_ctrl_busy(ctrl_info); 4659 /* 4660 * Wait for other admin queue updates such as; 4661 * config table changes, OFA memory updates, ... 4662 */ 4663 if (pqi_is_blockable_request(request)) 4664 pqi_wait_if_ctrl_blocked(ctrl_info); 4665 4666 if (pqi_ctrl_offline(ctrl_info)) { 4667 rc = -ENXIO; 4668 goto out; 4669 } 4670 4671 io_request = pqi_alloc_io_request(ctrl_info, NULL); 4672 4673 put_unaligned_le16(io_request->index, 4674 &(((struct pqi_raid_path_request *)request)->request_id)); 4675 4676 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) 4677 ((struct pqi_raid_path_request *)request)->error_index = 4678 ((struct pqi_raid_path_request *)request)->request_id; 4679 4680 iu_length = get_unaligned_le16(&request->iu_length) + 4681 PQI_REQUEST_HEADER_LENGTH; 4682 memcpy(io_request->iu, request, iu_length); 4683 4684 io_request->io_complete_callback = pqi_raid_synchronous_complete; 4685 io_request->context = &wait; 4686 4687 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 4688 io_request); 4689 4690 pqi_wait_for_completion_io(ctrl_info, &wait); 4691 4692 if (error_info) { 4693 if (io_request->error_info) 4694 memcpy(error_info, io_request->error_info, sizeof(*error_info)); 4695 else 4696 memset(error_info, 0, sizeof(*error_info)); 4697 } else if (rc == 0 && io_request->error_info) { 4698 rc = pqi_process_raid_io_error_synchronous(io_request->error_info); 4699 } 4700 4701 pqi_free_io_request(io_request); 4702 4703out: 4704 pqi_ctrl_unbusy(ctrl_info); 4705 up(&ctrl_info->sync_request_sem); 4706 4707 return rc; 4708} 4709 4710static int pqi_validate_admin_response( 4711 struct pqi_general_admin_response *response, u8 expected_function_code) 4712{ 4713 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) 4714 return -EINVAL; 4715 4716 if (get_unaligned_le16(&response->header.iu_length) != 4717 PQI_GENERAL_ADMIN_IU_LENGTH) 4718 return -EINVAL; 4719 4720 if (response->function_code != expected_function_code) 4721 return -EINVAL; 4722 4723 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) 4724 return -EINVAL; 4725 4726 return 0; 4727} 4728 4729static int pqi_submit_admin_request_synchronous( 4730 struct pqi_ctrl_info *ctrl_info, 4731 struct pqi_general_admin_request *request, 4732 struct pqi_general_admin_response *response) 4733{ 4734 int rc; 4735 4736 pqi_submit_admin_request(ctrl_info, request); 4737 4738 rc = pqi_poll_for_admin_response(ctrl_info, response); 4739 4740 if (rc == 0) 4741 rc = pqi_validate_admin_response(response, request->function_code); 4742 4743 return rc; 4744} 4745 4746static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) 4747{ 4748 int rc; 4749 struct pqi_general_admin_request request; 4750 struct pqi_general_admin_response response; 4751 struct pqi_device_capability *capability; 4752 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; 4753 4754 capability = kmalloc(sizeof(*capability), GFP_KERNEL); 4755 if (!capability) 4756 return -ENOMEM; 4757 4758 memset(&request, 0, sizeof(request)); 4759 4760 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4761 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4762 &request.header.iu_length); 4763 request.function_code = 4764 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; 4765 put_unaligned_le32(sizeof(*capability), 4766 &request.data.report_device_capability.buffer_length); 4767 4768 rc = pqi_map_single(ctrl_info->pci_dev, 4769 &request.data.report_device_capability.sg_descriptor, 4770 capability, sizeof(*capability), 4771 DMA_FROM_DEVICE); 4772 if (rc) 4773 goto out; 4774 4775 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, &response); 4776 4777 pqi_pci_unmap(ctrl_info->pci_dev, 4778 &request.data.report_device_capability.sg_descriptor, 1, 4779 DMA_FROM_DEVICE); 4780 4781 if (rc) 4782 goto out; 4783 4784 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { 4785 rc = -EIO; 4786 goto out; 4787 } 4788 4789 ctrl_info->max_inbound_queues = 4790 get_unaligned_le16(&capability->max_inbound_queues); 4791 ctrl_info->max_elements_per_iq = 4792 get_unaligned_le16(&capability->max_elements_per_iq); 4793 ctrl_info->max_iq_element_length = 4794 get_unaligned_le16(&capability->max_iq_element_length) 4795 * 16; 4796 ctrl_info->max_outbound_queues = 4797 get_unaligned_le16(&capability->max_outbound_queues); 4798 ctrl_info->max_elements_per_oq = 4799 get_unaligned_le16(&capability->max_elements_per_oq); 4800 ctrl_info->max_oq_element_length = 4801 get_unaligned_le16(&capability->max_oq_element_length) 4802 * 16; 4803 4804 sop_iu_layer_descriptor = 4805 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; 4806 4807 ctrl_info->max_inbound_iu_length_per_firmware = 4808 get_unaligned_le16( 4809 &sop_iu_layer_descriptor->max_inbound_iu_length); 4810 ctrl_info->inbound_spanning_supported = 4811 sop_iu_layer_descriptor->inbound_spanning_supported; 4812 ctrl_info->outbound_spanning_supported = 4813 sop_iu_layer_descriptor->outbound_spanning_supported; 4814 4815out: 4816 kfree(capability); 4817 4818 return rc; 4819} 4820 4821static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) 4822{ 4823 if (ctrl_info->max_iq_element_length < 4824 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4825 dev_err(&ctrl_info->pci_dev->dev, 4826 "max. inbound queue element length of %d is less than the required length of %d\n", 4827 ctrl_info->max_iq_element_length, 4828 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4829 return -EINVAL; 4830 } 4831 4832 if (ctrl_info->max_oq_element_length < 4833 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { 4834 dev_err(&ctrl_info->pci_dev->dev, 4835 "max. outbound queue element length of %d is less than the required length of %d\n", 4836 ctrl_info->max_oq_element_length, 4837 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 4838 return -EINVAL; 4839 } 4840 4841 if (ctrl_info->max_inbound_iu_length_per_firmware < 4842 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4843 dev_err(&ctrl_info->pci_dev->dev, 4844 "max. inbound IU length of %u is less than the min. required length of %d\n", 4845 ctrl_info->max_inbound_iu_length_per_firmware, 4846 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4847 return -EINVAL; 4848 } 4849 4850 if (!ctrl_info->inbound_spanning_supported) { 4851 dev_err(&ctrl_info->pci_dev->dev, 4852 "the controller does not support inbound spanning\n"); 4853 return -EINVAL; 4854 } 4855 4856 if (ctrl_info->outbound_spanning_supported) { 4857 dev_err(&ctrl_info->pci_dev->dev, 4858 "the controller supports outbound spanning but this driver does not\n"); 4859 return -EINVAL; 4860 } 4861 4862 return 0; 4863} 4864 4865static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) 4866{ 4867 int rc; 4868 struct pqi_event_queue *event_queue; 4869 struct pqi_general_admin_request request; 4870 struct pqi_general_admin_response response; 4871 4872 event_queue = &ctrl_info->event_queue; 4873 4874 /* 4875 * Create OQ (Outbound Queue - device to host queue) to dedicate 4876 * to events. 4877 */ 4878 memset(&request, 0, sizeof(request)); 4879 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4880 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4881 &request.header.iu_length); 4882 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4883 put_unaligned_le16(event_queue->oq_id, 4884 &request.data.create_operational_oq.queue_id); 4885 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, 4886 &request.data.create_operational_oq.element_array_addr); 4887 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, 4888 &request.data.create_operational_oq.pi_addr); 4889 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, 4890 &request.data.create_operational_oq.num_elements); 4891 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, 4892 &request.data.create_operational_oq.element_length); 4893 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4894 put_unaligned_le16(event_queue->int_msg_num, 4895 &request.data.create_operational_oq.int_msg_num); 4896 4897 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4898 &response); 4899 if (rc) 4900 return rc; 4901 4902 event_queue->oq_ci = ctrl_info->iomem_base + 4903 PQI_DEVICE_REGISTERS_OFFSET + 4904 get_unaligned_le64( 4905 &response.data.create_operational_oq.oq_ci_offset); 4906 4907 return 0; 4908} 4909 4910static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info, 4911 unsigned int group_number) 4912{ 4913 int rc; 4914 struct pqi_queue_group *queue_group; 4915 struct pqi_general_admin_request request; 4916 struct pqi_general_admin_response response; 4917 4918 queue_group = &ctrl_info->queue_groups[group_number]; 4919 4920 /* 4921 * Create IQ (Inbound Queue - host to device queue) for 4922 * RAID path. 4923 */ 4924 memset(&request, 0, sizeof(request)); 4925 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4926 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4927 &request.header.iu_length); 4928 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4929 put_unaligned_le16(queue_group->iq_id[RAID_PATH], 4930 &request.data.create_operational_iq.queue_id); 4931 put_unaligned_le64( 4932 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], 4933 &request.data.create_operational_iq.element_array_addr); 4934 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], 4935 &request.data.create_operational_iq.ci_addr); 4936 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4937 &request.data.create_operational_iq.num_elements); 4938 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4939 &request.data.create_operational_iq.element_length); 4940 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4941 4942 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4943 &response); 4944 if (rc) { 4945 dev_err(&ctrl_info->pci_dev->dev, 4946 "error creating inbound RAID queue\n"); 4947 return rc; 4948 } 4949 4950 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + 4951 PQI_DEVICE_REGISTERS_OFFSET + 4952 get_unaligned_le64( 4953 &response.data.create_operational_iq.iq_pi_offset); 4954 4955 /* 4956 * Create IQ (Inbound Queue - host to device queue) for 4957 * Advanced I/O (AIO) path. 4958 */ 4959 memset(&request, 0, sizeof(request)); 4960 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4961 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4962 &request.header.iu_length); 4963 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4964 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4965 &request.data.create_operational_iq.queue_id); 4966 put_unaligned_le64((u64)queue_group-> 4967 iq_element_array_bus_addr[AIO_PATH], 4968 &request.data.create_operational_iq.element_array_addr); 4969 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], 4970 &request.data.create_operational_iq.ci_addr); 4971 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4972 &request.data.create_operational_iq.num_elements); 4973 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4974 &request.data.create_operational_iq.element_length); 4975 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4976 4977 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4978 &response); 4979 if (rc) { 4980 dev_err(&ctrl_info->pci_dev->dev, 4981 "error creating inbound AIO queue\n"); 4982 return rc; 4983 } 4984 4985 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + 4986 PQI_DEVICE_REGISTERS_OFFSET + 4987 get_unaligned_le64( 4988 &response.data.create_operational_iq.iq_pi_offset); 4989 4990 /* 4991 * Designate the 2nd IQ as the AIO path. By default, all IQs are 4992 * assumed to be for RAID path I/O unless we change the queue's 4993 * property. 4994 */ 4995 memset(&request, 0, sizeof(request)); 4996 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4997 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4998 &request.header.iu_length); 4999 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; 5000 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 5001 &request.data.change_operational_iq_properties.queue_id); 5002 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, 5003 &request.data.change_operational_iq_properties.vendor_specific); 5004 5005 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 5006 &response); 5007 if (rc) { 5008 dev_err(&ctrl_info->pci_dev->dev, 5009 "error changing queue property\n"); 5010 return rc; 5011 } 5012 5013 /* 5014 * Create OQ (Outbound Queue - device to host queue). 5015 */ 5016 memset(&request, 0, sizeof(request)); 5017 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 5018 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 5019 &request.header.iu_length); 5020 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 5021 put_unaligned_le16(queue_group->oq_id, 5022 &request.data.create_operational_oq.queue_id); 5023 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, 5024 &request.data.create_operational_oq.element_array_addr); 5025 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, 5026 &request.data.create_operational_oq.pi_addr); 5027 put_unaligned_le16(ctrl_info->num_elements_per_oq, 5028 &request.data.create_operational_oq.num_elements); 5029 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, 5030 &request.data.create_operational_oq.element_length); 5031 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 5032 put_unaligned_le16(queue_group->int_msg_num, 5033 &request.data.create_operational_oq.int_msg_num); 5034 5035 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 5036 &response); 5037 if (rc) { 5038 dev_err(&ctrl_info->pci_dev->dev, 5039 "error creating outbound queue\n"); 5040 return rc; 5041 } 5042 5043 queue_group->oq_ci = ctrl_info->iomem_base + 5044 PQI_DEVICE_REGISTERS_OFFSET + 5045 get_unaligned_le64( 5046 &response.data.create_operational_oq.oq_ci_offset); 5047 5048 return 0; 5049} 5050 5051static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) 5052{ 5053 int rc; 5054 unsigned int i; 5055 5056 rc = pqi_create_event_queue(ctrl_info); 5057 if (rc) { 5058 dev_err(&ctrl_info->pci_dev->dev, 5059 "error creating event queue\n"); 5060 return rc; 5061 } 5062 5063 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5064 rc = pqi_create_queue_group(ctrl_info, i); 5065 if (rc) { 5066 dev_err(&ctrl_info->pci_dev->dev, 5067 "error creating queue group number %u/%u\n", 5068 i, ctrl_info->num_queue_groups); 5069 return rc; 5070 } 5071 } 5072 5073 return 0; 5074} 5075 5076#define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ 5077 struct_size_t(struct pqi_event_config, descriptors, PQI_MAX_EVENT_DESCRIPTORS) 5078 5079static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info, 5080 bool enable_events) 5081{ 5082 int rc; 5083 unsigned int i; 5084 struct pqi_event_config *event_config; 5085 struct pqi_event_descriptor *event_descriptor; 5086 struct pqi_general_management_request request; 5087 5088 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5089 GFP_KERNEL); 5090 if (!event_config) 5091 return -ENOMEM; 5092 5093 memset(&request, 0, sizeof(request)); 5094 5095 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; 5096 put_unaligned_le16(offsetof(struct pqi_general_management_request, 5097 data.report_event_configuration.sg_descriptors[1]) - 5098 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5099 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5100 &request.data.report_event_configuration.buffer_length); 5101 5102 rc = pqi_map_single(ctrl_info->pci_dev, 5103 request.data.report_event_configuration.sg_descriptors, 5104 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5105 DMA_FROM_DEVICE); 5106 if (rc) 5107 goto out; 5108 5109 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5110 5111 pqi_pci_unmap(ctrl_info->pci_dev, 5112 request.data.report_event_configuration.sg_descriptors, 1, 5113 DMA_FROM_DEVICE); 5114 5115 if (rc) 5116 goto out; 5117 5118 for (i = 0; i < event_config->num_event_descriptors; i++) { 5119 event_descriptor = &event_config->descriptors[i]; 5120 if (enable_events && 5121 pqi_is_supported_event(event_descriptor->event_type)) 5122 put_unaligned_le16(ctrl_info->event_queue.oq_id, 5123 &event_descriptor->oq_id); 5124 else 5125 put_unaligned_le16(0, &event_descriptor->oq_id); 5126 } 5127 5128 memset(&request, 0, sizeof(request)); 5129 5130 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; 5131 put_unaligned_le16(offsetof(struct pqi_general_management_request, 5132 data.report_event_configuration.sg_descriptors[1]) - 5133 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5134 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5135 &request.data.report_event_configuration.buffer_length); 5136 5137 rc = pqi_map_single(ctrl_info->pci_dev, 5138 request.data.report_event_configuration.sg_descriptors, 5139 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5140 DMA_TO_DEVICE); 5141 if (rc) 5142 goto out; 5143 5144 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5145 5146 pqi_pci_unmap(ctrl_info->pci_dev, 5147 request.data.report_event_configuration.sg_descriptors, 1, 5148 DMA_TO_DEVICE); 5149 5150out: 5151 kfree(event_config); 5152 5153 return rc; 5154} 5155 5156static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info) 5157{ 5158 return pqi_configure_events(ctrl_info, true); 5159} 5160 5161static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) 5162{ 5163 unsigned int i; 5164 struct device *dev; 5165 size_t sg_chain_buffer_length; 5166 struct pqi_io_request *io_request; 5167 5168 if (!ctrl_info->io_request_pool) 5169 return; 5170 5171 dev = &ctrl_info->pci_dev->dev; 5172 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5173 io_request = ctrl_info->io_request_pool; 5174 5175 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5176 kfree(io_request->iu); 5177 if (!io_request->sg_chain_buffer) 5178 break; 5179 dma_free_coherent(dev, sg_chain_buffer_length, 5180 io_request->sg_chain_buffer, 5181 io_request->sg_chain_buffer_dma_handle); 5182 io_request++; 5183 } 5184 5185 kfree(ctrl_info->io_request_pool); 5186 ctrl_info->io_request_pool = NULL; 5187} 5188 5189static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) 5190{ 5191 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev, 5192 ctrl_info->error_buffer_length, 5193 &ctrl_info->error_buffer_dma_handle, 5194 GFP_KERNEL); 5195 if (!ctrl_info->error_buffer) 5196 return -ENOMEM; 5197 5198 return 0; 5199} 5200 5201static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) 5202{ 5203 unsigned int i; 5204 void *sg_chain_buffer; 5205 size_t sg_chain_buffer_length; 5206 dma_addr_t sg_chain_buffer_dma_handle; 5207 struct device *dev; 5208 struct pqi_io_request *io_request; 5209 5210 ctrl_info->io_request_pool = kcalloc(ctrl_info->max_io_slots, 5211 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); 5212 5213 if (!ctrl_info->io_request_pool) { 5214 dev_err(&ctrl_info->pci_dev->dev, 5215 "failed to allocate I/O request pool\n"); 5216 goto error; 5217 } 5218 5219 dev = &ctrl_info->pci_dev->dev; 5220 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5221 io_request = ctrl_info->io_request_pool; 5222 5223 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5224 io_request->iu = kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); 5225 5226 if (!io_request->iu) { 5227 dev_err(&ctrl_info->pci_dev->dev, 5228 "failed to allocate IU buffers\n"); 5229 goto error; 5230 } 5231 5232 sg_chain_buffer = dma_alloc_coherent(dev, 5233 sg_chain_buffer_length, &sg_chain_buffer_dma_handle, 5234 GFP_KERNEL); 5235 5236 if (!sg_chain_buffer) { 5237 dev_err(&ctrl_info->pci_dev->dev, 5238 "failed to allocate PQI scatter-gather chain buffers\n"); 5239 goto error; 5240 } 5241 5242 io_request->index = i; 5243 io_request->sg_chain_buffer = sg_chain_buffer; 5244 io_request->sg_chain_buffer_dma_handle = sg_chain_buffer_dma_handle; 5245 io_request++; 5246 } 5247 5248 return 0; 5249 5250error: 5251 pqi_free_all_io_requests(ctrl_info); 5252 5253 return -ENOMEM; 5254} 5255 5256/* 5257 * Calculate required resources that are sized based on max. outstanding 5258 * requests and max. transfer size. 5259 */ 5260 5261static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) 5262{ 5263 u32 max_transfer_size; 5264 u32 max_sg_entries; 5265 5266 ctrl_info->scsi_ml_can_queue = 5267 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; 5268 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; 5269 5270 ctrl_info->error_buffer_length = 5271 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; 5272 5273 if (is_kdump_kernel()) 5274 max_transfer_size = min(ctrl_info->max_transfer_size, 5275 PQI_MAX_TRANSFER_SIZE_KDUMP); 5276 else 5277 max_transfer_size = min(ctrl_info->max_transfer_size, 5278 PQI_MAX_TRANSFER_SIZE); 5279 5280 max_sg_entries = max_transfer_size / PAGE_SIZE; 5281 5282 /* +1 to cover when the buffer is not page-aligned. */ 5283 max_sg_entries++; 5284 5285 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); 5286 5287 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; 5288 5289 ctrl_info->sg_chain_buffer_length = 5290 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) + 5291 PQI_EXTRA_SGL_MEMORY; 5292 ctrl_info->sg_tablesize = max_sg_entries; 5293 ctrl_info->max_sectors = max_transfer_size / 512; 5294} 5295 5296static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) 5297{ 5298 int num_queue_groups; 5299 u16 num_elements_per_iq; 5300 u16 num_elements_per_oq; 5301 5302 if (is_kdump_kernel()) { 5303 num_queue_groups = 1; 5304 } else { 5305 int max_queue_groups; 5306 5307 max_queue_groups = min(ctrl_info->max_inbound_queues / 2, 5308 ctrl_info->max_outbound_queues - 1); 5309 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); 5310 5311 num_queue_groups = 5312 blk_mq_num_online_queues(ctrl_info->max_msix_vectors); 5313 num_queue_groups = min(num_queue_groups, max_queue_groups); 5314 } 5315 5316 ctrl_info->num_queue_groups = num_queue_groups; 5317 5318 /* 5319 * Make sure that the max. inbound IU length is an even multiple 5320 * of our inbound element length. 5321 */ 5322 ctrl_info->max_inbound_iu_length = 5323 (ctrl_info->max_inbound_iu_length_per_firmware / 5324 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * 5325 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 5326 5327 num_elements_per_iq = 5328 (ctrl_info->max_inbound_iu_length / 5329 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 5330 5331 /* Add one because one element in each queue is unusable. */ 5332 num_elements_per_iq++; 5333 5334 num_elements_per_iq = min(num_elements_per_iq, 5335 ctrl_info->max_elements_per_iq); 5336 5337 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; 5338 num_elements_per_oq = min(num_elements_per_oq, 5339 ctrl_info->max_elements_per_oq); 5340 5341 ctrl_info->num_elements_per_iq = num_elements_per_iq; 5342 ctrl_info->num_elements_per_oq = num_elements_per_oq; 5343 5344 ctrl_info->max_sg_per_iu = 5345 ((ctrl_info->max_inbound_iu_length - 5346 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5347 sizeof(struct pqi_sg_descriptor)) + 5348 PQI_MAX_EMBEDDED_SG_DESCRIPTORS; 5349 5350 ctrl_info->max_sg_per_r56_iu = 5351 ((ctrl_info->max_inbound_iu_length - 5352 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5353 sizeof(struct pqi_sg_descriptor)) + 5354 PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS; 5355} 5356 5357static inline void pqi_set_sg_descriptor(struct pqi_sg_descriptor *sg_descriptor, 5358 struct scatterlist *sg) 5359{ 5360 u64 address = (u64)sg_dma_address(sg); 5361 unsigned int length = sg_dma_len(sg); 5362 5363 put_unaligned_le64(address, &sg_descriptor->address); 5364 put_unaligned_le32(length, &sg_descriptor->length); 5365 put_unaligned_le32(0, &sg_descriptor->flags); 5366} 5367 5368static unsigned int pqi_build_sg_list(struct pqi_sg_descriptor *sg_descriptor, 5369 struct scatterlist *sg, int sg_count, struct pqi_io_request *io_request, 5370 int max_sg_per_iu, bool *chained) 5371{ 5372 int i; 5373 unsigned int num_sg_in_iu; 5374 5375 *chained = false; 5376 i = 0; 5377 num_sg_in_iu = 0; 5378 max_sg_per_iu--; /* Subtract 1 to leave room for chain marker. */ 5379 5380 while (1) { 5381 pqi_set_sg_descriptor(sg_descriptor, sg); 5382 if (!*chained) 5383 num_sg_in_iu++; 5384 i++; 5385 if (i == sg_count) 5386 break; 5387 sg_descriptor++; 5388 if (i == max_sg_per_iu) { 5389 put_unaligned_le64((u64)io_request->sg_chain_buffer_dma_handle, 5390 &sg_descriptor->address); 5391 put_unaligned_le32((sg_count - num_sg_in_iu) * sizeof(*sg_descriptor), 5392 &sg_descriptor->length); 5393 put_unaligned_le32(CISS_SG_CHAIN, &sg_descriptor->flags); 5394 *chained = true; 5395 num_sg_in_iu++; 5396 sg_descriptor = io_request->sg_chain_buffer; 5397 } 5398 sg = sg_next(sg); 5399 } 5400 5401 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 5402 5403 return num_sg_in_iu; 5404} 5405 5406static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, 5407 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, 5408 struct pqi_io_request *io_request) 5409{ 5410 u16 iu_length; 5411 int sg_count; 5412 bool chained; 5413 unsigned int num_sg_in_iu; 5414 struct scatterlist *sg; 5415 struct pqi_sg_descriptor *sg_descriptor; 5416 5417 sg_count = scsi_dma_map(scmd); 5418 if (sg_count < 0) 5419 return sg_count; 5420 5421 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 5422 PQI_REQUEST_HEADER_LENGTH; 5423 5424 if (sg_count == 0) 5425 goto out; 5426 5427 sg = scsi_sglist(scmd); 5428 sg_descriptor = request->sg_descriptors; 5429 5430 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5431 ctrl_info->max_sg_per_iu, &chained); 5432 5433 request->partial = chained; 5434 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5435 5436out: 5437 put_unaligned_le16(iu_length, &request->header.iu_length); 5438 5439 return 0; 5440} 5441 5442static int pqi_build_aio_r1_sg_list(struct pqi_ctrl_info *ctrl_info, 5443 struct pqi_aio_r1_path_request *request, struct scsi_cmnd *scmd, 5444 struct pqi_io_request *io_request) 5445{ 5446 u16 iu_length; 5447 int sg_count; 5448 bool chained; 5449 unsigned int num_sg_in_iu; 5450 struct scatterlist *sg; 5451 struct pqi_sg_descriptor *sg_descriptor; 5452 5453 sg_count = scsi_dma_map(scmd); 5454 if (sg_count < 0) 5455 return sg_count; 5456 5457 iu_length = offsetof(struct pqi_aio_r1_path_request, sg_descriptors) - 5458 PQI_REQUEST_HEADER_LENGTH; 5459 num_sg_in_iu = 0; 5460 5461 if (sg_count == 0) 5462 goto out; 5463 5464 sg = scsi_sglist(scmd); 5465 sg_descriptor = request->sg_descriptors; 5466 5467 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5468 ctrl_info->max_sg_per_iu, &chained); 5469 5470 request->partial = chained; 5471 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5472 5473out: 5474 put_unaligned_le16(iu_length, &request->header.iu_length); 5475 request->num_sg_descriptors = num_sg_in_iu; 5476 5477 return 0; 5478} 5479 5480static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info, 5481 struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd, 5482 struct pqi_io_request *io_request) 5483{ 5484 u16 iu_length; 5485 int sg_count; 5486 bool chained; 5487 unsigned int num_sg_in_iu; 5488 struct scatterlist *sg; 5489 struct pqi_sg_descriptor *sg_descriptor; 5490 5491 sg_count = scsi_dma_map(scmd); 5492 if (sg_count < 0) 5493 return sg_count; 5494 5495 iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) - 5496 PQI_REQUEST_HEADER_LENGTH; 5497 num_sg_in_iu = 0; 5498 5499 if (sg_count != 0) { 5500 sg = scsi_sglist(scmd); 5501 sg_descriptor = request->sg_descriptors; 5502 5503 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5504 ctrl_info->max_sg_per_r56_iu, &chained); 5505 5506 request->partial = chained; 5507 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5508 } 5509 5510 put_unaligned_le16(iu_length, &request->header.iu_length); 5511 request->num_sg_descriptors = num_sg_in_iu; 5512 5513 return 0; 5514} 5515 5516static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, 5517 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, 5518 struct pqi_io_request *io_request) 5519{ 5520 u16 iu_length; 5521 int sg_count; 5522 bool chained; 5523 unsigned int num_sg_in_iu; 5524 struct scatterlist *sg; 5525 struct pqi_sg_descriptor *sg_descriptor; 5526 5527 sg_count = scsi_dma_map(scmd); 5528 if (sg_count < 0) 5529 return sg_count; 5530 5531 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - 5532 PQI_REQUEST_HEADER_LENGTH; 5533 num_sg_in_iu = 0; 5534 5535 if (sg_count == 0) 5536 goto out; 5537 5538 sg = scsi_sglist(scmd); 5539 sg_descriptor = request->sg_descriptors; 5540 5541 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5542 ctrl_info->max_sg_per_iu, &chained); 5543 5544 request->partial = chained; 5545 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5546 5547out: 5548 put_unaligned_le16(iu_length, &request->header.iu_length); 5549 request->num_sg_descriptors = num_sg_in_iu; 5550 5551 return 0; 5552} 5553 5554static void pqi_raid_io_complete(struct pqi_io_request *io_request, 5555 void *context) 5556{ 5557 struct scsi_cmnd *scmd; 5558 5559 scmd = io_request->scmd; 5560 pqi_free_io_request(io_request); 5561 scsi_dma_unmap(scmd); 5562 pqi_scsi_done(scmd); 5563} 5564 5565/* 5566 * Adjust the timeout value for physical devices sent to the firmware 5567 * by subtracting 3 seconds for timeouts greater than or equal to 8 seconds. 5568 * 5569 * This provides the firmware with additional time to attempt early recovery 5570 * before the OS-level timeout occurs. 5571 */ 5572#define ADJUST_SECS_TIMEOUT_VALUE(tv) (((tv) >= 8) ? ((tv) - 3) : (tv)) 5573 5574static int pqi_raid_submit_io(struct pqi_ctrl_info *ctrl_info, 5575 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5576 struct pqi_queue_group *queue_group, bool io_high_prio) 5577{ 5578 int rc; 5579 u32 timeout; 5580 size_t cdb_length; 5581 struct pqi_io_request *io_request; 5582 struct pqi_raid_path_request *request; 5583 struct request *rq; 5584 5585 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5586 if (!io_request) 5587 return SCSI_MLQUEUE_HOST_BUSY; 5588 5589 io_request->io_complete_callback = pqi_raid_io_complete; 5590 io_request->scmd = scmd; 5591 5592 request = io_request->iu; 5593 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors)); 5594 5595 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 5596 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5597 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5598 request->command_priority = io_high_prio; 5599 put_unaligned_le16(io_request->index, &request->request_id); 5600 request->error_index = request->request_id; 5601 memcpy(request->lun_number, device->scsi3addr, sizeof(request->lun_number)); 5602 request->ml_device_lun_number = (u8)scmd->device->lun; 5603 5604 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); 5605 memcpy(request->cdb, scmd->cmnd, cdb_length); 5606 5607 switch (cdb_length) { 5608 case 6: 5609 case 10: 5610 case 12: 5611 case 16: 5612 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 5613 break; 5614 case 20: 5615 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_4; 5616 break; 5617 case 24: 5618 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_8; 5619 break; 5620 case 28: 5621 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_12; 5622 break; 5623 case 32: 5624 default: 5625 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_16; 5626 break; 5627 } 5628 5629 switch (scmd->sc_data_direction) { 5630 case DMA_FROM_DEVICE: 5631 request->data_direction = SOP_READ_FLAG; 5632 break; 5633 case DMA_TO_DEVICE: 5634 request->data_direction = SOP_WRITE_FLAG; 5635 break; 5636 case DMA_NONE: 5637 request->data_direction = SOP_NO_DIRECTION_FLAG; 5638 break; 5639 case DMA_BIDIRECTIONAL: 5640 request->data_direction = SOP_BIDIRECTIONAL; 5641 break; 5642 default: 5643 dev_err(&ctrl_info->pci_dev->dev, 5644 "unknown data direction: %d\n", 5645 scmd->sc_data_direction); 5646 break; 5647 } 5648 5649 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); 5650 if (rc) { 5651 pqi_free_io_request(io_request); 5652 return SCSI_MLQUEUE_HOST_BUSY; 5653 } 5654 5655 if (device->is_physical_device) { 5656 rq = scsi_cmd_to_rq(scmd); 5657 timeout = rq->timeout / HZ; 5658 put_unaligned_le32(ADJUST_SECS_TIMEOUT_VALUE(timeout), &request->timeout); 5659 } 5660 5661 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); 5662 5663 return 0; 5664} 5665 5666static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5667 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5668 struct pqi_queue_group *queue_group) 5669{ 5670 bool io_high_prio; 5671 5672 io_high_prio = pqi_is_io_high_priority(device, scmd); 5673 5674 return pqi_raid_submit_io(ctrl_info, device, scmd, queue_group, io_high_prio); 5675} 5676 5677static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request) 5678{ 5679 struct scsi_cmnd *scmd; 5680 struct pqi_scsi_dev *device; 5681 struct pqi_ctrl_info *ctrl_info; 5682 5683 if (!io_request->raid_bypass) 5684 return false; 5685 5686 scmd = io_request->scmd; 5687 if ((scmd->result & 0xff) == SAM_STAT_GOOD) 5688 return false; 5689 if (host_byte(scmd->result) == DID_NO_CONNECT) 5690 return false; 5691 5692 device = scmd->device->hostdata; 5693 if (pqi_device_offline(device) || pqi_device_in_remove(device)) 5694 return false; 5695 5696 ctrl_info = shost_to_hba(scmd->device->host); 5697 if (pqi_ctrl_offline(ctrl_info)) 5698 return false; 5699 5700 return true; 5701} 5702 5703static void pqi_aio_io_complete(struct pqi_io_request *io_request, 5704 void *context) 5705{ 5706 struct scsi_cmnd *scmd; 5707 5708 scmd = io_request->scmd; 5709 scsi_dma_unmap(scmd); 5710 if (io_request->status == -EAGAIN || pqi_raid_bypass_retry_needed(io_request)) { 5711 set_host_byte(scmd, DID_IMM_RETRY); 5712 pqi_cmd_priv(scmd)->this_residual++; 5713 } 5714 5715 pqi_free_io_request(io_request); 5716 pqi_scsi_done(scmd); 5717} 5718 5719static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5720 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5721 struct pqi_queue_group *queue_group) 5722{ 5723 bool io_high_prio; 5724 5725 io_high_prio = pqi_is_io_high_priority(device, scmd); 5726 5727 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, 5728 scmd->cmnd, scmd->cmd_len, queue_group, NULL, 5729 false, io_high_prio); 5730} 5731 5732static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 5733 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 5734 unsigned int cdb_length, struct pqi_queue_group *queue_group, 5735 struct pqi_encryption_info *encryption_info, bool raid_bypass, 5736 bool io_high_prio) 5737{ 5738 int rc; 5739 struct pqi_io_request *io_request; 5740 struct pqi_aio_path_request *request; 5741 5742 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5743 if (!io_request) 5744 return SCSI_MLQUEUE_HOST_BUSY; 5745 5746 io_request->io_complete_callback = pqi_aio_io_complete; 5747 io_request->scmd = scmd; 5748 io_request->raid_bypass = raid_bypass; 5749 5750 request = io_request->iu; 5751 memset(request, 0, offsetof(struct pqi_aio_path_request, sg_descriptors)); 5752 5753 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; 5754 put_unaligned_le32(aio_handle, &request->nexus_id); 5755 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5756 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5757 request->command_priority = io_high_prio; 5758 put_unaligned_le16(io_request->index, &request->request_id); 5759 request->error_index = request->request_id; 5760 if (!raid_bypass && ctrl_info->multi_lun_device_supported) 5761 put_unaligned_le64(scmd->device->lun << 8, &request->lun_number); 5762 if (cdb_length > sizeof(request->cdb)) 5763 cdb_length = sizeof(request->cdb); 5764 request->cdb_length = cdb_length; 5765 memcpy(request->cdb, cdb, cdb_length); 5766 5767 switch (scmd->sc_data_direction) { 5768 case DMA_TO_DEVICE: 5769 request->data_direction = SOP_READ_FLAG; 5770 break; 5771 case DMA_FROM_DEVICE: 5772 request->data_direction = SOP_WRITE_FLAG; 5773 break; 5774 case DMA_NONE: 5775 request->data_direction = SOP_NO_DIRECTION_FLAG; 5776 break; 5777 case DMA_BIDIRECTIONAL: 5778 request->data_direction = SOP_BIDIRECTIONAL; 5779 break; 5780 default: 5781 dev_err(&ctrl_info->pci_dev->dev, 5782 "unknown data direction: %d\n", 5783 scmd->sc_data_direction); 5784 break; 5785 } 5786 5787 if (encryption_info) { 5788 request->encryption_enable = true; 5789 put_unaligned_le16(encryption_info->data_encryption_key_index, 5790 &request->data_encryption_key_index); 5791 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5792 &request->encrypt_tweak_lower); 5793 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5794 &request->encrypt_tweak_upper); 5795 } 5796 5797 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); 5798 if (rc) { 5799 pqi_free_io_request(io_request); 5800 return SCSI_MLQUEUE_HOST_BUSY; 5801 } 5802 5803 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5804 5805 return 0; 5806} 5807 5808static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 5809 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5810 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5811 struct pqi_scsi_dev_raid_map_data *rmd) 5812{ 5813 int rc; 5814 struct pqi_io_request *io_request; 5815 struct pqi_aio_r1_path_request *r1_request; 5816 5817 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5818 if (!io_request) 5819 return SCSI_MLQUEUE_HOST_BUSY; 5820 5821 io_request->io_complete_callback = pqi_aio_io_complete; 5822 io_request->scmd = scmd; 5823 io_request->raid_bypass = true; 5824 5825 r1_request = io_request->iu; 5826 memset(r1_request, 0, offsetof(struct pqi_aio_r1_path_request, sg_descriptors)); 5827 5828 r1_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID1_IO; 5829 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r1_request->volume_id); 5830 r1_request->num_drives = rmd->num_it_nexus_entries; 5831 put_unaligned_le32(rmd->it_nexus[0], &r1_request->it_nexus_1); 5832 put_unaligned_le32(rmd->it_nexus[1], &r1_request->it_nexus_2); 5833 if (rmd->num_it_nexus_entries == 3) 5834 put_unaligned_le32(rmd->it_nexus[2], &r1_request->it_nexus_3); 5835 5836 put_unaligned_le32(scsi_bufflen(scmd), &r1_request->data_length); 5837 r1_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5838 put_unaligned_le16(io_request->index, &r1_request->request_id); 5839 r1_request->error_index = r1_request->request_id; 5840 if (rmd->cdb_length > sizeof(r1_request->cdb)) 5841 rmd->cdb_length = sizeof(r1_request->cdb); 5842 r1_request->cdb_length = rmd->cdb_length; 5843 memcpy(r1_request->cdb, rmd->cdb, rmd->cdb_length); 5844 5845 /* The direction is always write. */ 5846 r1_request->data_direction = SOP_READ_FLAG; 5847 5848 if (encryption_info) { 5849 r1_request->encryption_enable = true; 5850 put_unaligned_le16(encryption_info->data_encryption_key_index, 5851 &r1_request->data_encryption_key_index); 5852 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5853 &r1_request->encrypt_tweak_lower); 5854 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5855 &r1_request->encrypt_tweak_upper); 5856 } 5857 5858 rc = pqi_build_aio_r1_sg_list(ctrl_info, r1_request, scmd, io_request); 5859 if (rc) { 5860 pqi_free_io_request(io_request); 5861 return SCSI_MLQUEUE_HOST_BUSY; 5862 } 5863 5864 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5865 5866 return 0; 5867} 5868 5869static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 5870 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5871 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5872 struct pqi_scsi_dev_raid_map_data *rmd) 5873{ 5874 int rc; 5875 struct pqi_io_request *io_request; 5876 struct pqi_aio_r56_path_request *r56_request; 5877 5878 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5879 if (!io_request) 5880 return SCSI_MLQUEUE_HOST_BUSY; 5881 io_request->io_complete_callback = pqi_aio_io_complete; 5882 io_request->scmd = scmd; 5883 io_request->raid_bypass = true; 5884 5885 r56_request = io_request->iu; 5886 memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors)); 5887 5888 if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51) 5889 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO; 5890 else 5891 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO; 5892 5893 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id); 5894 put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus); 5895 put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus); 5896 if (rmd->raid_level == SA_RAID_6) { 5897 put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus); 5898 r56_request->xor_multiplier = rmd->xor_mult; 5899 } 5900 put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length); 5901 r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5902 put_unaligned_le64(rmd->row, &r56_request->row); 5903 5904 put_unaligned_le16(io_request->index, &r56_request->request_id); 5905 r56_request->error_index = r56_request->request_id; 5906 5907 if (rmd->cdb_length > sizeof(r56_request->cdb)) 5908 rmd->cdb_length = sizeof(r56_request->cdb); 5909 r56_request->cdb_length = rmd->cdb_length; 5910 memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length); 5911 5912 /* The direction is always write. */ 5913 r56_request->data_direction = SOP_READ_FLAG; 5914 5915 if (encryption_info) { 5916 r56_request->encryption_enable = true; 5917 put_unaligned_le16(encryption_info->data_encryption_key_index, 5918 &r56_request->data_encryption_key_index); 5919 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5920 &r56_request->encrypt_tweak_lower); 5921 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5922 &r56_request->encrypt_tweak_upper); 5923 } 5924 5925 rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request); 5926 if (rc) { 5927 pqi_free_io_request(io_request); 5928 return SCSI_MLQUEUE_HOST_BUSY; 5929 } 5930 5931 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5932 5933 return 0; 5934} 5935 5936static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info, 5937 struct scsi_cmnd *scmd) 5938{ 5939 /* 5940 * We are setting host_tagset = 1 during init. 5941 */ 5942 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scsi_cmd_to_rq(scmd))); 5943} 5944 5945static inline bool pqi_is_bypass_eligible_request(struct scsi_cmnd *scmd) 5946{ 5947 if (blk_rq_is_passthrough(scsi_cmd_to_rq(scmd))) 5948 return false; 5949 5950 return pqi_cmd_priv(scmd)->this_residual == 0; 5951} 5952 5953/* 5954 * This function gets called just before we hand the completed SCSI request 5955 * back to the SML. 5956 */ 5957 5958void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd) 5959{ 5960 struct pqi_scsi_dev *device; 5961 struct completion *wait; 5962 5963 if (!scmd->device) { 5964 set_host_byte(scmd, DID_NO_CONNECT); 5965 return; 5966 } 5967 5968 device = scmd->device->hostdata; 5969 if (!device) { 5970 set_host_byte(scmd, DID_NO_CONNECT); 5971 return; 5972 } 5973 5974 atomic_dec(&device->scsi_cmds_outstanding[scmd->device->lun]); 5975 5976 wait = (struct completion *)xchg(&scmd->host_scribble, NULL); 5977 if (wait != PQI_NO_COMPLETION) 5978 complete(wait); 5979} 5980 5981static bool pqi_is_parity_write_stream(struct pqi_ctrl_info *ctrl_info, 5982 struct scsi_cmnd *scmd) 5983{ 5984 u32 oldest_jiffies; 5985 u8 lru_index; 5986 int i; 5987 int rc; 5988 struct pqi_scsi_dev *device; 5989 struct pqi_stream_data *pqi_stream_data; 5990 struct pqi_scsi_dev_raid_map_data rmd = { 0 }; 5991 5992 if (!ctrl_info->enable_stream_detection) 5993 return false; 5994 5995 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 5996 if (rc) 5997 return false; 5998 5999 /* Check writes only. */ 6000 if (!rmd.is_write) 6001 return false; 6002 6003 device = scmd->device->hostdata; 6004 6005 /* Check for RAID 5/6 streams. */ 6006 if (device->raid_level != SA_RAID_5 && device->raid_level != SA_RAID_6) 6007 return false; 6008 6009 /* 6010 * If controller does not support AIO RAID{5,6} writes, need to send 6011 * requests down non-AIO path. 6012 */ 6013 if ((device->raid_level == SA_RAID_5 && !ctrl_info->enable_r5_writes) || 6014 (device->raid_level == SA_RAID_6 && !ctrl_info->enable_r6_writes)) 6015 return true; 6016 6017 lru_index = 0; 6018 oldest_jiffies = INT_MAX; 6019 for (i = 0; i < NUM_STREAMS_PER_LUN; i++) { 6020 pqi_stream_data = &device->stream_data[i]; 6021 /* 6022 * Check for adjacent request or request is within 6023 * the previous request. 6024 */ 6025 if ((pqi_stream_data->next_lba && 6026 rmd.first_block >= pqi_stream_data->next_lba) && 6027 rmd.first_block <= pqi_stream_data->next_lba + 6028 rmd.block_cnt) { 6029 pqi_stream_data->next_lba = rmd.first_block + 6030 rmd.block_cnt; 6031 pqi_stream_data->last_accessed = jiffies; 6032 per_cpu_ptr(device->raid_io_stats, raw_smp_processor_id())->write_stream_cnt++; 6033 return true; 6034 } 6035 6036 /* unused entry */ 6037 if (pqi_stream_data->last_accessed == 0) { 6038 lru_index = i; 6039 break; 6040 } 6041 6042 /* Find entry with oldest last accessed time. */ 6043 if (pqi_stream_data->last_accessed <= oldest_jiffies) { 6044 oldest_jiffies = pqi_stream_data->last_accessed; 6045 lru_index = i; 6046 } 6047 } 6048 6049 /* Set LRU entry. */ 6050 pqi_stream_data = &device->stream_data[lru_index]; 6051 pqi_stream_data->last_accessed = jiffies; 6052 pqi_stream_data->next_lba = rmd.first_block + rmd.block_cnt; 6053 6054 return false; 6055} 6056 6057static int pqi_scsi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd) 6058{ 6059 int rc; 6060 struct pqi_ctrl_info *ctrl_info; 6061 struct pqi_scsi_dev *device; 6062 u16 hw_queue; 6063 struct pqi_queue_group *queue_group; 6064 bool raid_bypassed; 6065 u8 lun; 6066 6067 scmd->host_scribble = PQI_NO_COMPLETION; 6068 6069 device = scmd->device->hostdata; 6070 6071 if (!device) { 6072 set_host_byte(scmd, DID_NO_CONNECT); 6073 pqi_scsi_done(scmd); 6074 return 0; 6075 } 6076 6077 lun = (u8)scmd->device->lun; 6078 6079 atomic_inc(&device->scsi_cmds_outstanding[lun]); 6080 6081 ctrl_info = shost_to_hba(shost); 6082 6083 if (pqi_ctrl_offline(ctrl_info) || pqi_device_offline(device) || pqi_device_in_remove(device)) { 6084 set_host_byte(scmd, DID_NO_CONNECT); 6085 pqi_scsi_done(scmd); 6086 return 0; 6087 } 6088 6089 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device, lun)) { 6090 rc = SCSI_MLQUEUE_HOST_BUSY; 6091 goto out; 6092 } 6093 6094 /* 6095 * This is necessary because the SML doesn't zero out this field during 6096 * error recovery. 6097 */ 6098 scmd->result = 0; 6099 6100 hw_queue = pqi_get_hw_queue(ctrl_info, scmd); 6101 queue_group = &ctrl_info->queue_groups[hw_queue]; 6102 6103 if (pqi_is_logical_device(device)) { 6104 raid_bypassed = false; 6105 if (device->raid_bypass_enabled && 6106 pqi_is_bypass_eligible_request(scmd) && 6107 !pqi_is_parity_write_stream(ctrl_info, scmd)) { 6108 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6109 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) { 6110 raid_bypassed = true; 6111 per_cpu_ptr(device->raid_io_stats, raw_smp_processor_id())->raid_bypass_cnt++; 6112 } 6113 } 6114 if (!raid_bypassed) 6115 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6116 } else { 6117 if (device->aio_enabled) 6118 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6119 else 6120 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6121 } 6122 6123out: 6124 if (rc) { 6125 scmd->host_scribble = NULL; 6126 atomic_dec(&device->scsi_cmds_outstanding[lun]); 6127 } 6128 6129 return rc; 6130} 6131 6132static unsigned int pqi_queued_io_count(struct pqi_ctrl_info *ctrl_info) 6133{ 6134 unsigned int i; 6135 unsigned int path; 6136 unsigned long flags; 6137 unsigned int queued_io_count; 6138 struct pqi_queue_group *queue_group; 6139 struct pqi_io_request *io_request; 6140 6141 queued_io_count = 0; 6142 6143 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6144 queue_group = &ctrl_info->queue_groups[i]; 6145 for (path = 0; path < 2; path++) { 6146 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 6147 list_for_each_entry(io_request, &queue_group->request_list[path], request_list_entry) 6148 queued_io_count++; 6149 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 6150 } 6151 } 6152 6153 return queued_io_count; 6154} 6155 6156static unsigned int pqi_nonempty_inbound_queue_count(struct pqi_ctrl_info *ctrl_info) 6157{ 6158 unsigned int i; 6159 unsigned int path; 6160 unsigned int nonempty_inbound_queue_count; 6161 struct pqi_queue_group *queue_group; 6162 pqi_index_t iq_pi; 6163 pqi_index_t iq_ci; 6164 6165 nonempty_inbound_queue_count = 0; 6166 6167 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6168 queue_group = &ctrl_info->queue_groups[i]; 6169 for (path = 0; path < 2; path++) { 6170 iq_pi = queue_group->iq_pi_copy[path]; 6171 iq_ci = readl(queue_group->iq_ci[path]); 6172 if (iq_ci != iq_pi) 6173 nonempty_inbound_queue_count++; 6174 } 6175 } 6176 6177 return nonempty_inbound_queue_count; 6178} 6179 6180#define PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS 10 6181 6182static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info) 6183{ 6184 unsigned long start_jiffies; 6185 unsigned long warning_timeout; 6186 unsigned int queued_io_count; 6187 unsigned int nonempty_inbound_queue_count; 6188 bool displayed_warning; 6189 6190 displayed_warning = false; 6191 start_jiffies = jiffies; 6192 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 6193 6194 while (1) { 6195 queued_io_count = pqi_queued_io_count(ctrl_info); 6196 nonempty_inbound_queue_count = pqi_nonempty_inbound_queue_count(ctrl_info); 6197 if (queued_io_count == 0 && nonempty_inbound_queue_count == 0) 6198 break; 6199 pqi_check_ctrl_health(ctrl_info); 6200 if (pqi_ctrl_offline(ctrl_info)) 6201 return -ENXIO; 6202 if (time_after(jiffies, warning_timeout)) { 6203 dev_warn(&ctrl_info->pci_dev->dev, 6204 "waiting %u seconds for queued I/O to drain (queued I/O count: %u; non-empty inbound queue count: %u)\n", 6205 jiffies_to_msecs(jiffies - start_jiffies) / 1000, queued_io_count, nonempty_inbound_queue_count); 6206 displayed_warning = true; 6207 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + jiffies; 6208 } 6209 usleep_range(1000, 2000); 6210 } 6211 6212 if (displayed_warning) 6213 dev_warn(&ctrl_info->pci_dev->dev, 6214 "queued I/O drained after waiting for %u seconds\n", 6215 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 6216 6217 return 0; 6218} 6219 6220static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info, 6221 struct pqi_scsi_dev *device, u8 lun) 6222{ 6223 unsigned int i; 6224 unsigned int path; 6225 struct pqi_queue_group *queue_group; 6226 unsigned long flags; 6227 struct pqi_io_request *io_request; 6228 struct pqi_io_request *next; 6229 struct scsi_cmnd *scmd; 6230 struct pqi_scsi_dev *scsi_device; 6231 6232 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6233 queue_group = &ctrl_info->queue_groups[i]; 6234 6235 for (path = 0; path < 2; path++) { 6236 spin_lock_irqsave( 6237 &queue_group->submit_lock[path], flags); 6238 6239 list_for_each_entry_safe(io_request, next, 6240 &queue_group->request_list[path], 6241 request_list_entry) { 6242 6243 scmd = io_request->scmd; 6244 if (!scmd) 6245 continue; 6246 6247 scsi_device = scmd->device->hostdata; 6248 6249 list_del(&io_request->request_list_entry); 6250 if (scsi_device == device && (u8)scmd->device->lun == lun) 6251 set_host_byte(scmd, DID_RESET); 6252 else 6253 set_host_byte(scmd, DID_REQUEUE); 6254 pqi_free_io_request(io_request); 6255 scsi_dma_unmap(scmd); 6256 pqi_scsi_done(scmd); 6257 } 6258 6259 spin_unlock_irqrestore( 6260 &queue_group->submit_lock[path], flags); 6261 } 6262 } 6263} 6264 6265#define PQI_PENDING_IO_WARNING_TIMEOUT_SECS 10 6266 6267static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 6268 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs) 6269{ 6270 int cmds_outstanding; 6271 unsigned long start_jiffies; 6272 unsigned long warning_timeout; 6273 unsigned long msecs_waiting; 6274 6275 start_jiffies = jiffies; 6276 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 6277 6278 while ((cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun])) > 0) { 6279 if (ctrl_info->ctrl_removal_state != PQI_CTRL_GRACEFUL_REMOVAL) { 6280 pqi_check_ctrl_health(ctrl_info); 6281 if (pqi_ctrl_offline(ctrl_info)) 6282 return -ENXIO; 6283 } 6284 msecs_waiting = jiffies_to_msecs(jiffies - start_jiffies); 6285 if (msecs_waiting >= timeout_msecs) { 6286 dev_err(&ctrl_info->pci_dev->dev, 6287 "scsi %d:%d:%d:%d: timed out after %lu seconds waiting for %d outstanding command(s)\n", 6288 ctrl_info->scsi_host->host_no, device->bus, device->target, 6289 lun, msecs_waiting / 1000, cmds_outstanding); 6290 return -ETIMEDOUT; 6291 } 6292 if (time_after(jiffies, warning_timeout)) { 6293 dev_warn(&ctrl_info->pci_dev->dev, 6294 "scsi %d:%d:%d:%d: waiting %lu seconds for %d outstanding command(s)\n", 6295 ctrl_info->scsi_host->host_no, device->bus, device->target, 6296 lun, msecs_waiting / 1000, cmds_outstanding); 6297 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + jiffies; 6298 } 6299 usleep_range(1000, 2000); 6300 } 6301 6302 return 0; 6303} 6304 6305static void pqi_lun_reset_complete(struct pqi_io_request *io_request, 6306 void *context) 6307{ 6308 struct completion *waiting = context; 6309 6310 complete(waiting); 6311} 6312 6313#define PQI_LUN_RESET_POLL_COMPLETION_SECS 10 6314 6315static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, 6316 struct pqi_scsi_dev *device, u8 lun, struct completion *wait) 6317{ 6318 int rc; 6319 unsigned int wait_secs; 6320 int cmds_outstanding; 6321 6322 wait_secs = 0; 6323 6324 while (1) { 6325 if (wait_for_completion_io_timeout(wait, 6326 PQI_LUN_RESET_POLL_COMPLETION_SECS * HZ)) { 6327 rc = 0; 6328 break; 6329 } 6330 6331 pqi_check_ctrl_health(ctrl_info); 6332 if (pqi_ctrl_offline(ctrl_info)) { 6333 rc = -ENXIO; 6334 break; 6335 } 6336 6337 wait_secs += PQI_LUN_RESET_POLL_COMPLETION_SECS; 6338 cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun]); 6339 dev_warn(&ctrl_info->pci_dev->dev, 6340 "scsi %d:%d:%d:%d: waiting %u seconds for LUN reset to complete (%d command(s) outstanding)\n", 6341 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, wait_secs, cmds_outstanding); 6342 } 6343 6344 return rc; 6345} 6346 6347#define PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS 30 6348 6349static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun) 6350{ 6351 int rc; 6352 struct pqi_io_request *io_request; 6353 DECLARE_COMPLETION_ONSTACK(wait); 6354 struct pqi_task_management_request *request; 6355 6356 io_request = pqi_alloc_io_request(ctrl_info, NULL); 6357 io_request->io_complete_callback = pqi_lun_reset_complete; 6358 io_request->context = &wait; 6359 6360 request = io_request->iu; 6361 memset(request, 0, sizeof(*request)); 6362 6363 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; 6364 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, 6365 &request->header.iu_length); 6366 put_unaligned_le16(io_request->index, &request->request_id); 6367 memcpy(request->lun_number, device->scsi3addr, 6368 sizeof(request->lun_number)); 6369 if (!pqi_is_logical_device(device) && ctrl_info->multi_lun_device_supported) 6370 request->ml_device_lun_number = lun; 6371 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; 6372 if (ctrl_info->tmf_iu_timeout_supported) 6373 put_unaligned_le16(PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS, &request->timeout); 6374 6375 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 6376 io_request); 6377 6378 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, lun, &wait); 6379 if (rc == 0) 6380 rc = io_request->status; 6381 6382 pqi_free_io_request(io_request); 6383 6384 return rc; 6385} 6386 6387#define PQI_LUN_RESET_RETRIES 3 6388#define PQI_LUN_RESET_RETRY_INTERVAL_MSECS (10 * 1000) 6389#define PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS (10 * 60 * 1000) 6390#define PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS (2 * 60 * 1000) 6391 6392static int pqi_lun_reset_with_retries(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun) 6393{ 6394 int reset_rc; 6395 int wait_rc; 6396 unsigned int retries; 6397 unsigned long timeout_msecs; 6398 6399 for (retries = 0;;) { 6400 reset_rc = pqi_lun_reset(ctrl_info, device, lun); 6401 if (reset_rc == 0 || reset_rc == -ENODEV || reset_rc == -ENXIO || ++retries > PQI_LUN_RESET_RETRIES) 6402 break; 6403 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS); 6404 } 6405 6406 timeout_msecs = reset_rc ? PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS : 6407 PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS; 6408 6409 wait_rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun, timeout_msecs); 6410 if (wait_rc && reset_rc == 0) 6411 reset_rc = wait_rc; 6412 6413 return reset_rc == 0 ? SUCCESS : FAILED; 6414} 6415 6416static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun) 6417{ 6418 int rc; 6419 6420 pqi_ctrl_block_requests(ctrl_info); 6421 pqi_ctrl_wait_until_quiesced(ctrl_info); 6422 pqi_fail_io_queued_for_device(ctrl_info, device, lun); 6423 rc = pqi_wait_until_inbound_queues_empty(ctrl_info); 6424 pqi_device_reset_start(device, lun); 6425 pqi_ctrl_unblock_requests(ctrl_info); 6426 if (rc) 6427 rc = FAILED; 6428 else 6429 rc = pqi_lun_reset_with_retries(ctrl_info, device, lun); 6430 pqi_device_reset_done(device, lun); 6431 6432 return rc; 6433} 6434 6435static int pqi_device_reset_handler(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun, struct scsi_cmnd *scmd, u8 scsi_opcode) 6436{ 6437 unsigned long flags; 6438 int rc; 6439 6440 mutex_lock(&ctrl_info->lun_reset_mutex); 6441 6442 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6443 if (pqi_find_scsi_dev(ctrl_info, device->bus, device->target, device->lun) == NULL) { 6444 dev_warn(&ctrl_info->pci_dev->dev, 6445 "skipping reset of scsi %d:%d:%d:%u, device has been removed\n", 6446 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 6447 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6448 mutex_unlock(&ctrl_info->lun_reset_mutex); 6449 return 0; 6450 } 6451 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6452 6453 dev_err(&ctrl_info->pci_dev->dev, 6454 "resetting scsi %d:%d:%d:%u SCSI cmd at %p due to cmd opcode 0x%02x\n", 6455 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, scmd, scsi_opcode); 6456 6457 pqi_check_ctrl_health(ctrl_info); 6458 if (pqi_ctrl_offline(ctrl_info)) 6459 rc = FAILED; 6460 else 6461 rc = pqi_device_reset(ctrl_info, device, lun); 6462 6463 dev_err(&ctrl_info->pci_dev->dev, 6464 "reset of scsi %d:%d:%d:%u: %s\n", 6465 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, 6466 rc == SUCCESS ? "SUCCESS" : "FAILED"); 6467 6468 mutex_unlock(&ctrl_info->lun_reset_mutex); 6469 6470 return rc; 6471} 6472 6473static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) 6474{ 6475 struct Scsi_Host *shost; 6476 struct pqi_ctrl_info *ctrl_info; 6477 struct pqi_scsi_dev *device; 6478 u8 scsi_opcode; 6479 6480 shost = scmd->device->host; 6481 ctrl_info = shost_to_hba(shost); 6482 device = scmd->device->hostdata; 6483 scsi_opcode = scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff; 6484 6485 return pqi_device_reset_handler(ctrl_info, device, (u8)scmd->device->lun, scmd, scsi_opcode); 6486} 6487 6488static void pqi_tmf_worker(struct work_struct *work) 6489{ 6490 struct pqi_tmf_work *tmf_work; 6491 struct scsi_cmnd *scmd; 6492 6493 tmf_work = container_of(work, struct pqi_tmf_work, work_struct); 6494 scmd = (struct scsi_cmnd *)xchg(&tmf_work->scmd, NULL); 6495 6496 pqi_device_reset_handler(tmf_work->ctrl_info, tmf_work->device, tmf_work->lun, scmd, tmf_work->scsi_opcode); 6497} 6498 6499static int pqi_eh_abort_handler(struct scsi_cmnd *scmd) 6500{ 6501 struct Scsi_Host *shost; 6502 struct pqi_ctrl_info *ctrl_info; 6503 struct pqi_scsi_dev *device; 6504 struct pqi_tmf_work *tmf_work; 6505 DECLARE_COMPLETION_ONSTACK(wait); 6506 6507 shost = scmd->device->host; 6508 ctrl_info = shost_to_hba(shost); 6509 device = scmd->device->hostdata; 6510 6511 dev_err(&ctrl_info->pci_dev->dev, 6512 "attempting TASK ABORT on scsi %d:%d:%d:%d for SCSI cmd at %p\n", 6513 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd); 6514 6515 if (cmpxchg(&scmd->host_scribble, PQI_NO_COMPLETION, (void *)&wait) == NULL) { 6516 dev_err(&ctrl_info->pci_dev->dev, 6517 "scsi %d:%d:%d:%d for SCSI cmd at %p already completed\n", 6518 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd); 6519 scmd->result = DID_RESET << 16; 6520 goto out; 6521 } 6522 6523 tmf_work = &device->tmf_work[scmd->device->lun]; 6524 6525 if (cmpxchg(&tmf_work->scmd, NULL, scmd) == NULL) { 6526 tmf_work->ctrl_info = ctrl_info; 6527 tmf_work->device = device; 6528 tmf_work->lun = (u8)scmd->device->lun; 6529 tmf_work->scsi_opcode = scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff; 6530 schedule_work(&tmf_work->work_struct); 6531 } 6532 6533 wait_for_completion(&wait); 6534 6535 dev_err(&ctrl_info->pci_dev->dev, 6536 "TASK ABORT on scsi %d:%d:%d:%d for SCSI cmd at %p: SUCCESS\n", 6537 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd); 6538 6539out: 6540 6541 return SUCCESS; 6542} 6543 6544static int pqi_sdev_init(struct scsi_device *sdev) 6545{ 6546 struct pqi_scsi_dev *device; 6547 unsigned long flags; 6548 struct pqi_ctrl_info *ctrl_info; 6549 struct scsi_target *starget; 6550 struct sas_rphy *rphy; 6551 6552 ctrl_info = shost_to_hba(sdev->host); 6553 6554 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6555 6556 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { 6557 starget = scsi_target(sdev); 6558 rphy = target_to_rphy(starget); 6559 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 6560 if (device) { 6561 if (device->target_lun_valid) { 6562 device->ignore_device = true; 6563 } else { 6564 device->target = sdev_id(sdev); 6565 device->lun = sdev->lun; 6566 device->target_lun_valid = true; 6567 } 6568 } 6569 } else { 6570 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), 6571 sdev_id(sdev), sdev->lun); 6572 } 6573 6574 if (device) { 6575 sdev->hostdata = device; 6576 device->sdev = sdev; 6577 if (device->queue_depth) { 6578 device->advertised_queue_depth = device->queue_depth; 6579 scsi_change_queue_depth(sdev, 6580 device->advertised_queue_depth); 6581 } 6582 if (pqi_is_logical_device(device)) { 6583 pqi_disable_write_same(sdev); 6584 } else { 6585 sdev->allow_restart = 1; 6586 if (device->device_type == SA_DEVICE_TYPE_NVME) 6587 pqi_disable_write_same(sdev); 6588 } 6589 } 6590 6591 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6592 6593 return 0; 6594} 6595 6596static void pqi_map_queues(struct Scsi_Host *shost) 6597{ 6598 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6599 6600 if (!ctrl_info->disable_managed_interrupts) 6601 blk_mq_map_hw_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT], 6602 &ctrl_info->pci_dev->dev, 0); 6603 else 6604 blk_mq_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT]); 6605} 6606 6607static inline bool pqi_is_tape_changer_device(struct pqi_scsi_dev *device) 6608{ 6609 return device->devtype == TYPE_TAPE || device->devtype == TYPE_MEDIUM_CHANGER; 6610} 6611 6612static int pqi_sdev_configure(struct scsi_device *sdev, 6613 struct queue_limits *lim) 6614{ 6615 int rc = 0; 6616 struct pqi_scsi_dev *device; 6617 6618 device = sdev->hostdata; 6619 device->devtype = sdev->type; 6620 6621 if (pqi_is_tape_changer_device(device) && device->ignore_device) { 6622 rc = -ENXIO; 6623 device->ignore_device = false; 6624 } 6625 6626 return rc; 6627} 6628 6629static void pqi_sdev_destroy(struct scsi_device *sdev) 6630{ 6631 struct pqi_ctrl_info *ctrl_info; 6632 struct pqi_scsi_dev *device; 6633 struct pqi_tmf_work *tmf_work; 6634 int mutex_acquired; 6635 unsigned int lun; 6636 unsigned long flags; 6637 6638 ctrl_info = shost_to_hba(sdev->host); 6639 6640 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 6641 if (!mutex_acquired) 6642 return; 6643 6644 device = sdev->hostdata; 6645 if (!device) { 6646 mutex_unlock(&ctrl_info->scan_mutex); 6647 return; 6648 } 6649 6650 device->lun_count--; 6651 if (device->lun_count > 0) { 6652 mutex_unlock(&ctrl_info->scan_mutex); 6653 return; 6654 } 6655 6656 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6657 list_del(&device->scsi_device_list_entry); 6658 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6659 6660 mutex_unlock(&ctrl_info->scan_mutex); 6661 6662 for (lun = 0, tmf_work = device->tmf_work; lun < PQI_MAX_LUNS_PER_DEVICE; lun++, tmf_work++) 6663 cancel_work_sync(&tmf_work->work_struct); 6664 6665 mutex_lock(&ctrl_info->lun_reset_mutex); 6666 pqi_dev_info(ctrl_info, "removed", device); 6667 pqi_free_device(device); 6668 mutex_unlock(&ctrl_info->lun_reset_mutex); 6669} 6670 6671static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6672{ 6673 struct pci_dev *pci_dev; 6674 u32 subsystem_vendor; 6675 u32 subsystem_device; 6676 cciss_pci_info_struct pci_info; 6677 6678 if (!arg) 6679 return -EINVAL; 6680 6681 pci_dev = ctrl_info->pci_dev; 6682 6683 pci_info.domain = pci_domain_nr(pci_dev->bus); 6684 pci_info.bus = pci_dev->bus->number; 6685 pci_info.dev_fn = pci_dev->devfn; 6686 subsystem_vendor = pci_dev->subsystem_vendor; 6687 subsystem_device = pci_dev->subsystem_device; 6688 pci_info.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor; 6689 6690 if (copy_to_user(arg, &pci_info, sizeof(pci_info))) 6691 return -EFAULT; 6692 6693 return 0; 6694} 6695 6696static int pqi_getdrivver_ioctl(void __user *arg) 6697{ 6698 u32 version; 6699 6700 if (!arg) 6701 return -EINVAL; 6702 6703 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | 6704 (DRIVER_RELEASE << 16) | DRIVER_REVISION; 6705 6706 if (copy_to_user(arg, &version, sizeof(version))) 6707 return -EFAULT; 6708 6709 return 0; 6710} 6711 6712struct ciss_error_info { 6713 u8 scsi_status; 6714 int command_status; 6715 size_t sense_data_length; 6716}; 6717 6718static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, 6719 struct ciss_error_info *ciss_error_info) 6720{ 6721 int ciss_cmd_status; 6722 size_t sense_data_length; 6723 6724 switch (pqi_error_info->data_out_result) { 6725 case PQI_DATA_IN_OUT_GOOD: 6726 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; 6727 break; 6728 case PQI_DATA_IN_OUT_UNDERFLOW: 6729 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; 6730 break; 6731 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 6732 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; 6733 break; 6734 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 6735 case PQI_DATA_IN_OUT_BUFFER_ERROR: 6736 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 6737 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 6738 case PQI_DATA_IN_OUT_ERROR: 6739 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; 6740 break; 6741 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 6742 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 6743 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 6744 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 6745 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 6746 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 6747 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 6748 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 6749 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 6750 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 6751 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; 6752 break; 6753 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 6754 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; 6755 break; 6756 case PQI_DATA_IN_OUT_ABORTED: 6757 ciss_cmd_status = CISS_CMD_STATUS_ABORTED; 6758 break; 6759 case PQI_DATA_IN_OUT_TIMEOUT: 6760 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; 6761 break; 6762 default: 6763 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; 6764 break; 6765 } 6766 6767 sense_data_length = 6768 get_unaligned_le16(&pqi_error_info->sense_data_length); 6769 if (sense_data_length == 0) 6770 sense_data_length = 6771 get_unaligned_le16(&pqi_error_info->response_data_length); 6772 if (sense_data_length) 6773 if (sense_data_length > sizeof(pqi_error_info->data)) 6774 sense_data_length = sizeof(pqi_error_info->data); 6775 6776 ciss_error_info->scsi_status = pqi_error_info->status; 6777 ciss_error_info->command_status = ciss_cmd_status; 6778 ciss_error_info->sense_data_length = sense_data_length; 6779} 6780 6781static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6782{ 6783 int rc; 6784 char *kernel_buffer = NULL; 6785 u16 iu_length; 6786 size_t sense_data_length; 6787 IOCTL_Command_struct iocommand; 6788 struct pqi_raid_path_request request; 6789 struct pqi_raid_error_info pqi_error_info; 6790 struct ciss_error_info ciss_error_info; 6791 6792 if (pqi_ctrl_offline(ctrl_info)) 6793 return -ENXIO; 6794 if (pqi_ofa_in_progress(ctrl_info) && pqi_ctrl_blocked(ctrl_info)) 6795 return -EBUSY; 6796 if (!arg) 6797 return -EINVAL; 6798 if (!capable(CAP_SYS_RAWIO)) 6799 return -EPERM; 6800 if (copy_from_user(&iocommand, arg, sizeof(iocommand))) 6801 return -EFAULT; 6802 if (iocommand.buf_size < 1 && 6803 iocommand.Request.Type.Direction != XFER_NONE) 6804 return -EINVAL; 6805 if (iocommand.Request.CDBLen > sizeof(request.cdb)) 6806 return -EINVAL; 6807 if (iocommand.Request.Type.Type != TYPE_CMD) 6808 return -EINVAL; 6809 6810 switch (iocommand.Request.Type.Direction) { 6811 case XFER_NONE: 6812 case XFER_WRITE: 6813 case XFER_READ: 6814 case XFER_READ | XFER_WRITE: 6815 break; 6816 default: 6817 return -EINVAL; 6818 } 6819 6820 if (iocommand.buf_size > 0) { 6821 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6822 kernel_buffer = memdup_user(iocommand.buf, 6823 iocommand.buf_size); 6824 if (IS_ERR(kernel_buffer)) 6825 return PTR_ERR(kernel_buffer); 6826 } else { 6827 kernel_buffer = kzalloc(iocommand.buf_size, GFP_KERNEL); 6828 if (!kernel_buffer) 6829 return -ENOMEM; 6830 } 6831 } 6832 6833 memset(&request, 0, sizeof(request)); 6834 6835 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 6836 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 6837 PQI_REQUEST_HEADER_LENGTH; 6838 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, 6839 sizeof(request.lun_number)); 6840 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); 6841 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 6842 6843 switch (iocommand.Request.Type.Direction) { 6844 case XFER_NONE: 6845 request.data_direction = SOP_NO_DIRECTION_FLAG; 6846 break; 6847 case XFER_WRITE: 6848 request.data_direction = SOP_WRITE_FLAG; 6849 break; 6850 case XFER_READ: 6851 request.data_direction = SOP_READ_FLAG; 6852 break; 6853 case XFER_READ | XFER_WRITE: 6854 request.data_direction = SOP_BIDIRECTIONAL; 6855 break; 6856 } 6857 6858 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 6859 6860 if (iocommand.buf_size > 0) { 6861 put_unaligned_le32(iocommand.buf_size, &request.buffer_length); 6862 6863 rc = pqi_map_single(ctrl_info->pci_dev, 6864 &request.sg_descriptors[0], kernel_buffer, 6865 iocommand.buf_size, DMA_BIDIRECTIONAL); 6866 if (rc) 6867 goto out; 6868 6869 iu_length += sizeof(request.sg_descriptors[0]); 6870 } 6871 6872 put_unaligned_le16(iu_length, &request.header.iu_length); 6873 6874 if (ctrl_info->raid_iu_timeout_supported) 6875 put_unaligned_le32(iocommand.Request.Timeout, &request.timeout); 6876 6877 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 6878 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info); 6879 6880 if (iocommand.buf_size > 0) 6881 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 6882 DMA_BIDIRECTIONAL); 6883 6884 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); 6885 6886 if (rc == 0) { 6887 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); 6888 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; 6889 iocommand.error_info.CommandStatus = 6890 ciss_error_info.command_status; 6891 sense_data_length = ciss_error_info.sense_data_length; 6892 if (sense_data_length) { 6893 if (sense_data_length > 6894 sizeof(iocommand.error_info.SenseInfo)) 6895 sense_data_length = 6896 sizeof(iocommand.error_info.SenseInfo); 6897 memcpy(iocommand.error_info.SenseInfo, 6898 pqi_error_info.data, sense_data_length); 6899 iocommand.error_info.SenseLen = sense_data_length; 6900 } 6901 } 6902 6903 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { 6904 rc = -EFAULT; 6905 goto out; 6906 } 6907 6908 if (rc == 0 && iocommand.buf_size > 0 && 6909 (iocommand.Request.Type.Direction & XFER_READ)) { 6910 if (copy_to_user(iocommand.buf, kernel_buffer, 6911 iocommand.buf_size)) { 6912 rc = -EFAULT; 6913 } 6914 } 6915 6916out: 6917 kfree(kernel_buffer); 6918 6919 return rc; 6920} 6921 6922static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd, 6923 void __user *arg) 6924{ 6925 int rc; 6926 struct pqi_ctrl_info *ctrl_info; 6927 6928 ctrl_info = shost_to_hba(sdev->host); 6929 6930 switch (cmd) { 6931 case CCISS_DEREGDISK: 6932 case CCISS_REGNEWDISK: 6933 case CCISS_REGNEWD: 6934 rc = pqi_scan_scsi_devices(ctrl_info); 6935 break; 6936 case CCISS_GETPCIINFO: 6937 rc = pqi_getpciinfo_ioctl(ctrl_info, arg); 6938 break; 6939 case CCISS_GETDRIVVER: 6940 rc = pqi_getdrivver_ioctl(arg); 6941 break; 6942 case CCISS_PASSTHRU: 6943 rc = pqi_passthru_ioctl(ctrl_info, arg); 6944 break; 6945 default: 6946 rc = -EINVAL; 6947 break; 6948 } 6949 6950 return rc; 6951} 6952 6953static ssize_t pqi_firmware_version_show(struct device *dev, 6954 struct device_attribute *attr, char *buffer) 6955{ 6956 struct Scsi_Host *shost; 6957 struct pqi_ctrl_info *ctrl_info; 6958 6959 shost = class_to_shost(dev); 6960 ctrl_info = shost_to_hba(shost); 6961 6962 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version); 6963} 6964 6965static ssize_t pqi_serial_number_show(struct device *dev, 6966 struct device_attribute *attr, char *buffer) 6967{ 6968 struct Scsi_Host *shost; 6969 struct pqi_ctrl_info *ctrl_info; 6970 6971 shost = class_to_shost(dev); 6972 ctrl_info = shost_to_hba(shost); 6973 6974 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number); 6975} 6976 6977static ssize_t pqi_model_show(struct device *dev, 6978 struct device_attribute *attr, char *buffer) 6979{ 6980 struct Scsi_Host *shost; 6981 struct pqi_ctrl_info *ctrl_info; 6982 6983 shost = class_to_shost(dev); 6984 ctrl_info = shost_to_hba(shost); 6985 6986 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model); 6987} 6988 6989static ssize_t pqi_vendor_show(struct device *dev, 6990 struct device_attribute *attr, char *buffer) 6991{ 6992 struct Scsi_Host *shost; 6993 struct pqi_ctrl_info *ctrl_info; 6994 6995 shost = class_to_shost(dev); 6996 ctrl_info = shost_to_hba(shost); 6997 6998 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor); 6999} 7000 7001static ssize_t pqi_host_rescan_store(struct device *dev, 7002 struct device_attribute *attr, const char *buffer, size_t count) 7003{ 7004 struct Scsi_Host *shost = class_to_shost(dev); 7005 7006 pqi_scan_start(shost); 7007 7008 return count; 7009} 7010 7011static ssize_t pqi_lockup_action_show(struct device *dev, 7012 struct device_attribute *attr, char *buffer) 7013{ 7014 int count = 0; 7015 unsigned int i; 7016 7017 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 7018 if (pqi_lockup_actions[i].action == pqi_lockup_action) 7019 count += scnprintf(buffer + count, PAGE_SIZE - count, 7020 "[%s] ", pqi_lockup_actions[i].name); 7021 else 7022 count += scnprintf(buffer + count, PAGE_SIZE - count, 7023 "%s ", pqi_lockup_actions[i].name); 7024 } 7025 7026 count += scnprintf(buffer + count, PAGE_SIZE - count, "\n"); 7027 7028 return count; 7029} 7030 7031static ssize_t pqi_lockup_action_store(struct device *dev, 7032 struct device_attribute *attr, const char *buffer, size_t count) 7033{ 7034 unsigned int i; 7035 char *action_name; 7036 char action_name_buffer[32]; 7037 7038 strscpy(action_name_buffer, buffer, sizeof(action_name_buffer)); 7039 action_name = strstrip(action_name_buffer); 7040 7041 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 7042 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) { 7043 pqi_lockup_action = pqi_lockup_actions[i].action; 7044 return count; 7045 } 7046 } 7047 7048 return -EINVAL; 7049} 7050 7051static ssize_t pqi_host_enable_stream_detection_show(struct device *dev, 7052 struct device_attribute *attr, char *buffer) 7053{ 7054 struct Scsi_Host *shost = class_to_shost(dev); 7055 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7056 7057 return scnprintf(buffer, 10, "%x\n", 7058 ctrl_info->enable_stream_detection); 7059} 7060 7061static ssize_t pqi_host_enable_stream_detection_store(struct device *dev, 7062 struct device_attribute *attr, const char *buffer, size_t count) 7063{ 7064 struct Scsi_Host *shost = class_to_shost(dev); 7065 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7066 u8 set_stream_detection = 0; 7067 7068 if (kstrtou8(buffer, 0, &set_stream_detection)) 7069 return -EINVAL; 7070 7071 if (set_stream_detection > 0) 7072 set_stream_detection = 1; 7073 7074 ctrl_info->enable_stream_detection = set_stream_detection; 7075 7076 return count; 7077} 7078 7079static ssize_t pqi_host_enable_r5_writes_show(struct device *dev, 7080 struct device_attribute *attr, char *buffer) 7081{ 7082 struct Scsi_Host *shost = class_to_shost(dev); 7083 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7084 7085 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes); 7086} 7087 7088static ssize_t pqi_host_enable_r5_writes_store(struct device *dev, 7089 struct device_attribute *attr, const char *buffer, size_t count) 7090{ 7091 struct Scsi_Host *shost = class_to_shost(dev); 7092 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7093 u8 set_r5_writes = 0; 7094 7095 if (kstrtou8(buffer, 0, &set_r5_writes)) 7096 return -EINVAL; 7097 7098 if (set_r5_writes > 0) 7099 set_r5_writes = 1; 7100 7101 ctrl_info->enable_r5_writes = set_r5_writes; 7102 7103 return count; 7104} 7105 7106static ssize_t pqi_host_enable_r6_writes_show(struct device *dev, 7107 struct device_attribute *attr, char *buffer) 7108{ 7109 struct Scsi_Host *shost = class_to_shost(dev); 7110 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7111 7112 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes); 7113} 7114 7115static ssize_t pqi_host_enable_r6_writes_store(struct device *dev, 7116 struct device_attribute *attr, const char *buffer, size_t count) 7117{ 7118 struct Scsi_Host *shost = class_to_shost(dev); 7119 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7120 u8 set_r6_writes = 0; 7121 7122 if (kstrtou8(buffer, 0, &set_r6_writes)) 7123 return -EINVAL; 7124 7125 if (set_r6_writes > 0) 7126 set_r6_writes = 1; 7127 7128 ctrl_info->enable_r6_writes = set_r6_writes; 7129 7130 return count; 7131} 7132 7133static DEVICE_STRING_ATTR_RO(driver_version, 0444, 7134 DRIVER_VERSION BUILD_TIMESTAMP); 7135static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL); 7136static DEVICE_ATTR(model, 0444, pqi_model_show, NULL); 7137static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL); 7138static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL); 7139static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 7140static DEVICE_ATTR(lockup_action, 0644, pqi_lockup_action_show, 7141 pqi_lockup_action_store); 7142static DEVICE_ATTR(enable_stream_detection, 0644, 7143 pqi_host_enable_stream_detection_show, 7144 pqi_host_enable_stream_detection_store); 7145static DEVICE_ATTR(enable_r5_writes, 0644, 7146 pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store); 7147static DEVICE_ATTR(enable_r6_writes, 0644, 7148 pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store); 7149 7150static struct attribute *pqi_shost_attrs[] = { 7151 &dev_attr_driver_version.attr.attr, 7152 &dev_attr_firmware_version.attr, 7153 &dev_attr_model.attr, 7154 &dev_attr_serial_number.attr, 7155 &dev_attr_vendor.attr, 7156 &dev_attr_rescan.attr, 7157 &dev_attr_lockup_action.attr, 7158 &dev_attr_enable_stream_detection.attr, 7159 &dev_attr_enable_r5_writes.attr, 7160 &dev_attr_enable_r6_writes.attr, 7161 NULL 7162}; 7163 7164ATTRIBUTE_GROUPS(pqi_shost); 7165 7166static ssize_t pqi_unique_id_show(struct device *dev, 7167 struct device_attribute *attr, char *buffer) 7168{ 7169 struct pqi_ctrl_info *ctrl_info; 7170 struct scsi_device *sdev; 7171 struct pqi_scsi_dev *device; 7172 unsigned long flags; 7173 u8 unique_id[16]; 7174 7175 sdev = to_scsi_device(dev); 7176 ctrl_info = shost_to_hba(sdev->host); 7177 7178 if (pqi_ctrl_offline(ctrl_info)) 7179 return -ENODEV; 7180 7181 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7182 7183 device = sdev->hostdata; 7184 if (!device) { 7185 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7186 return -ENODEV; 7187 } 7188 7189 if (device->is_physical_device) 7190 memcpy(unique_id, device->wwid, sizeof(device->wwid)); 7191 else 7192 memcpy(unique_id, device->volume_id, sizeof(device->volume_id)); 7193 7194 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7195 7196 return scnprintf(buffer, PAGE_SIZE, 7197 "%02X%02X%02X%02X%02X%02X%02X%02X" 7198 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 7199 unique_id[0], unique_id[1], unique_id[2], unique_id[3], 7200 unique_id[4], unique_id[5], unique_id[6], unique_id[7], 7201 unique_id[8], unique_id[9], unique_id[10], unique_id[11], 7202 unique_id[12], unique_id[13], unique_id[14], unique_id[15]); 7203} 7204 7205static ssize_t pqi_lunid_show(struct device *dev, 7206 struct device_attribute *attr, char *buffer) 7207{ 7208 struct pqi_ctrl_info *ctrl_info; 7209 struct scsi_device *sdev; 7210 struct pqi_scsi_dev *device; 7211 unsigned long flags; 7212 u8 lunid[8]; 7213 7214 sdev = to_scsi_device(dev); 7215 ctrl_info = shost_to_hba(sdev->host); 7216 7217 if (pqi_ctrl_offline(ctrl_info)) 7218 return -ENODEV; 7219 7220 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7221 7222 device = sdev->hostdata; 7223 if (!device) { 7224 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7225 return -ENODEV; 7226 } 7227 7228 memcpy(lunid, device->scsi3addr, sizeof(lunid)); 7229 7230 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7231 7232 return scnprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid); 7233} 7234 7235#define MAX_PATHS 8 7236 7237static ssize_t pqi_path_info_show(struct device *dev, 7238 struct device_attribute *attr, char *buf) 7239{ 7240 struct pqi_ctrl_info *ctrl_info; 7241 struct scsi_device *sdev; 7242 struct pqi_scsi_dev *device; 7243 unsigned long flags; 7244 int i; 7245 int output_len = 0; 7246 u8 box; 7247 u8 bay; 7248 u8 path_map_index; 7249 char *active; 7250 u8 phys_connector[2]; 7251 7252 sdev = to_scsi_device(dev); 7253 ctrl_info = shost_to_hba(sdev->host); 7254 7255 if (pqi_ctrl_offline(ctrl_info)) 7256 return -ENODEV; 7257 7258 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7259 7260 device = sdev->hostdata; 7261 if (!device) { 7262 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7263 return -ENODEV; 7264 } 7265 7266 bay = device->bay; 7267 for (i = 0; i < MAX_PATHS; i++) { 7268 path_map_index = 1 << i; 7269 if (i == device->active_path_index) 7270 active = "Active"; 7271 else if (device->path_map & path_map_index) 7272 active = "Inactive"; 7273 else 7274 continue; 7275 7276 output_len += scnprintf(buf + output_len, 7277 PAGE_SIZE - output_len, 7278 "[%d:%d:%d:%d] %20.20s ", 7279 ctrl_info->scsi_host->host_no, 7280 device->bus, device->target, 7281 device->lun, 7282 scsi_device_type(device->devtype)); 7283 7284 if (device->devtype == TYPE_RAID || 7285 pqi_is_logical_device(device)) 7286 goto end_buffer; 7287 7288 memcpy(&phys_connector, &device->phys_connector[i], 7289 sizeof(phys_connector)); 7290 if (phys_connector[0] < '0') 7291 phys_connector[0] = '0'; 7292 if (phys_connector[1] < '0') 7293 phys_connector[1] = '0'; 7294 7295 output_len += scnprintf(buf + output_len, 7296 PAGE_SIZE - output_len, 7297 "PORT: %.2s ", phys_connector); 7298 7299 box = device->box[i]; 7300 if (box != 0 && box != 0xFF) 7301 output_len += scnprintf(buf + output_len, 7302 PAGE_SIZE - output_len, 7303 "BOX: %hhu ", box); 7304 7305 if ((device->devtype == TYPE_DISK || 7306 device->devtype == TYPE_ZBC) && 7307 pqi_expose_device(device)) 7308 output_len += scnprintf(buf + output_len, 7309 PAGE_SIZE - output_len, 7310 "BAY: %hhu ", bay); 7311 7312end_buffer: 7313 output_len += scnprintf(buf + output_len, 7314 PAGE_SIZE - output_len, 7315 "%s\n", active); 7316 } 7317 7318 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7319 7320 return output_len; 7321} 7322 7323static ssize_t pqi_sas_address_show(struct device *dev, 7324 struct device_attribute *attr, char *buffer) 7325{ 7326 struct pqi_ctrl_info *ctrl_info; 7327 struct scsi_device *sdev; 7328 struct pqi_scsi_dev *device; 7329 unsigned long flags; 7330 u64 sas_address; 7331 7332 sdev = to_scsi_device(dev); 7333 ctrl_info = shost_to_hba(sdev->host); 7334 7335 if (pqi_ctrl_offline(ctrl_info)) 7336 return -ENODEV; 7337 7338 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7339 7340 device = sdev->hostdata; 7341 if (!device) { 7342 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7343 return -ENODEV; 7344 } 7345 7346 sas_address = device->sas_address; 7347 7348 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7349 7350 return scnprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); 7351} 7352 7353static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, 7354 struct device_attribute *attr, char *buffer) 7355{ 7356 struct pqi_ctrl_info *ctrl_info; 7357 struct scsi_device *sdev; 7358 struct pqi_scsi_dev *device; 7359 unsigned long flags; 7360 7361 sdev = to_scsi_device(dev); 7362 ctrl_info = shost_to_hba(sdev->host); 7363 7364 if (pqi_ctrl_offline(ctrl_info)) 7365 return -ENODEV; 7366 7367 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7368 7369 device = sdev->hostdata; 7370 if (!device) { 7371 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7372 return -ENODEV; 7373 } 7374 7375 buffer[0] = device->raid_bypass_enabled ? '1' : '0'; 7376 buffer[1] = '\n'; 7377 buffer[2] = '\0'; 7378 7379 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7380 7381 return 2; 7382} 7383 7384static ssize_t pqi_raid_level_show(struct device *dev, 7385 struct device_attribute *attr, char *buffer) 7386{ 7387 struct pqi_ctrl_info *ctrl_info; 7388 struct scsi_device *sdev; 7389 struct pqi_scsi_dev *device; 7390 unsigned long flags; 7391 char *raid_level; 7392 7393 sdev = to_scsi_device(dev); 7394 ctrl_info = shost_to_hba(sdev->host); 7395 7396 if (pqi_ctrl_offline(ctrl_info)) 7397 return -ENODEV; 7398 7399 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7400 7401 device = sdev->hostdata; 7402 if (!device) { 7403 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7404 return -ENODEV; 7405 } 7406 7407 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) 7408 raid_level = pqi_raid_level_to_string(device->raid_level); 7409 else 7410 raid_level = "N/A"; 7411 7412 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7413 7414 return scnprintf(buffer, PAGE_SIZE, "%s\n", raid_level); 7415} 7416 7417static ssize_t pqi_raid_bypass_cnt_show(struct device *dev, 7418 struct device_attribute *attr, char *buffer) 7419{ 7420 struct pqi_ctrl_info *ctrl_info; 7421 struct scsi_device *sdev; 7422 struct pqi_scsi_dev *device; 7423 unsigned long flags; 7424 u64 raid_bypass_cnt; 7425 int cpu; 7426 7427 sdev = to_scsi_device(dev); 7428 ctrl_info = shost_to_hba(sdev->host); 7429 7430 if (pqi_ctrl_offline(ctrl_info)) 7431 return -ENODEV; 7432 7433 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7434 7435 device = sdev->hostdata; 7436 if (!device) { 7437 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7438 return -ENODEV; 7439 } 7440 7441 raid_bypass_cnt = 0; 7442 7443 if (device->raid_io_stats) { 7444 for_each_online_cpu(cpu) { 7445 raid_bypass_cnt += per_cpu_ptr(device->raid_io_stats, cpu)->raid_bypass_cnt; 7446 } 7447 } 7448 7449 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7450 7451 return scnprintf(buffer, PAGE_SIZE, "0x%llx\n", raid_bypass_cnt); 7452} 7453 7454static ssize_t pqi_sas_ncq_prio_enable_show(struct device *dev, 7455 struct device_attribute *attr, char *buf) 7456{ 7457 struct pqi_ctrl_info *ctrl_info; 7458 struct scsi_device *sdev; 7459 struct pqi_scsi_dev *device; 7460 unsigned long flags; 7461 int output_len = 0; 7462 7463 sdev = to_scsi_device(dev); 7464 ctrl_info = shost_to_hba(sdev->host); 7465 7466 if (pqi_ctrl_offline(ctrl_info)) 7467 return -ENODEV; 7468 7469 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7470 7471 device = sdev->hostdata; 7472 if (!device) { 7473 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7474 return -ENODEV; 7475 } 7476 7477 output_len = snprintf(buf, PAGE_SIZE, "%d\n", 7478 device->ncq_prio_enable); 7479 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7480 7481 return output_len; 7482} 7483 7484static ssize_t pqi_sas_ncq_prio_enable_store(struct device *dev, 7485 struct device_attribute *attr, 7486 const char *buf, size_t count) 7487{ 7488 struct pqi_ctrl_info *ctrl_info; 7489 struct scsi_device *sdev; 7490 struct pqi_scsi_dev *device; 7491 unsigned long flags; 7492 u8 ncq_prio_enable = 0; 7493 7494 if (kstrtou8(buf, 0, &ncq_prio_enable)) 7495 return -EINVAL; 7496 7497 sdev = to_scsi_device(dev); 7498 ctrl_info = shost_to_hba(sdev->host); 7499 7500 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7501 7502 device = sdev->hostdata; 7503 7504 if (!device) { 7505 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7506 return -ENODEV; 7507 } 7508 7509 if (!device->ncq_prio_support) { 7510 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7511 return -EINVAL; 7512 } 7513 7514 device->ncq_prio_enable = ncq_prio_enable; 7515 7516 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7517 7518 return strlen(buf); 7519} 7520 7521static ssize_t pqi_numa_node_show(struct device *dev, 7522 struct device_attribute *attr, char *buffer) 7523{ 7524 struct scsi_device *sdev; 7525 struct pqi_ctrl_info *ctrl_info; 7526 7527 sdev = to_scsi_device(dev); 7528 ctrl_info = shost_to_hba(sdev->host); 7529 7530 return scnprintf(buffer, PAGE_SIZE, "%d\n", ctrl_info->numa_node); 7531} 7532 7533static ssize_t pqi_write_stream_cnt_show(struct device *dev, 7534 struct device_attribute *attr, char *buffer) 7535{ 7536 struct pqi_ctrl_info *ctrl_info; 7537 struct scsi_device *sdev; 7538 struct pqi_scsi_dev *device; 7539 unsigned long flags; 7540 u64 write_stream_cnt; 7541 int cpu; 7542 7543 sdev = to_scsi_device(dev); 7544 ctrl_info = shost_to_hba(sdev->host); 7545 7546 if (pqi_ctrl_offline(ctrl_info)) 7547 return -ENODEV; 7548 7549 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7550 7551 device = sdev->hostdata; 7552 if (!device) { 7553 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7554 return -ENODEV; 7555 } 7556 7557 write_stream_cnt = 0; 7558 7559 if (device->raid_io_stats) { 7560 for_each_online_cpu(cpu) { 7561 write_stream_cnt += per_cpu_ptr(device->raid_io_stats, cpu)->write_stream_cnt; 7562 } 7563 } 7564 7565 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7566 7567 return scnprintf(buffer, PAGE_SIZE, "0x%llx\n", write_stream_cnt); 7568} 7569 7570static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL); 7571static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL); 7572static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL); 7573static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL); 7574static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL); 7575static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL); 7576static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL); 7577static DEVICE_ATTR(sas_ncq_prio_enable, 0644, 7578 pqi_sas_ncq_prio_enable_show, pqi_sas_ncq_prio_enable_store); 7579static DEVICE_ATTR(numa_node, 0444, pqi_numa_node_show, NULL); 7580static DEVICE_ATTR(write_stream_cnt, 0444, pqi_write_stream_cnt_show, NULL); 7581 7582static struct attribute *pqi_sdev_attrs[] = { 7583 &dev_attr_lunid.attr, 7584 &dev_attr_unique_id.attr, 7585 &dev_attr_path_info.attr, 7586 &dev_attr_sas_address.attr, 7587 &dev_attr_ssd_smart_path_enabled.attr, 7588 &dev_attr_raid_level.attr, 7589 &dev_attr_raid_bypass_cnt.attr, 7590 &dev_attr_sas_ncq_prio_enable.attr, 7591 &dev_attr_numa_node.attr, 7592 &dev_attr_write_stream_cnt.attr, 7593 NULL 7594}; 7595 7596ATTRIBUTE_GROUPS(pqi_sdev); 7597 7598static const struct scsi_host_template pqi_driver_template = { 7599 .module = THIS_MODULE, 7600 .name = DRIVER_NAME_SHORT, 7601 .proc_name = DRIVER_NAME_SHORT, 7602 .queuecommand = pqi_scsi_queue_command, 7603 .scan_start = pqi_scan_start, 7604 .scan_finished = pqi_scan_finished, 7605 .this_id = -1, 7606 .eh_device_reset_handler = pqi_eh_device_reset_handler, 7607 .eh_abort_handler = pqi_eh_abort_handler, 7608 .ioctl = pqi_ioctl, 7609 .sdev_init = pqi_sdev_init, 7610 .sdev_configure = pqi_sdev_configure, 7611 .sdev_destroy = pqi_sdev_destroy, 7612 .map_queues = pqi_map_queues, 7613 .sdev_groups = pqi_sdev_groups, 7614 .shost_groups = pqi_shost_groups, 7615 .cmd_size = sizeof(struct pqi_cmd_priv), 7616}; 7617 7618static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) 7619{ 7620 int rc; 7621 struct Scsi_Host *shost; 7622 7623 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); 7624 if (!shost) { 7625 dev_err(&ctrl_info->pci_dev->dev, "scsi_host_alloc failed\n"); 7626 return -ENOMEM; 7627 } 7628 7629 shost->io_port = 0; 7630 shost->n_io_port = 0; 7631 shost->this_id = -1; 7632 shost->max_channel = PQI_MAX_BUS; 7633 shost->max_cmd_len = MAX_COMMAND_SIZE; 7634 shost->max_lun = PQI_MAX_LUNS_PER_DEVICE; 7635 shost->max_id = ~0; 7636 shost->max_sectors = ctrl_info->max_sectors; 7637 shost->can_queue = ctrl_info->scsi_ml_can_queue; 7638 shost->cmd_per_lun = shost->can_queue; 7639 shost->sg_tablesize = ctrl_info->sg_tablesize; 7640 shost->transportt = pqi_sas_transport_template; 7641 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); 7642 shost->unique_id = shost->irq; 7643 shost->nr_hw_queues = ctrl_info->num_queue_groups; 7644 shost->host_tagset = 1; 7645 shost->hostdata[0] = (unsigned long)ctrl_info; 7646 7647 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); 7648 if (rc) { 7649 dev_err(&ctrl_info->pci_dev->dev, "scsi_add_host failed\n"); 7650 goto free_host; 7651 } 7652 7653 rc = pqi_add_sas_host(shost, ctrl_info); 7654 if (rc) { 7655 dev_err(&ctrl_info->pci_dev->dev, "add SAS host failed\n"); 7656 goto remove_host; 7657 } 7658 7659 ctrl_info->scsi_host = shost; 7660 7661 return 0; 7662 7663remove_host: 7664 scsi_remove_host(shost); 7665free_host: 7666 scsi_host_put(shost); 7667 7668 return rc; 7669} 7670 7671static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) 7672{ 7673 struct Scsi_Host *shost; 7674 7675 pqi_delete_sas_host(ctrl_info); 7676 7677 shost = ctrl_info->scsi_host; 7678 if (!shost) 7679 return; 7680 7681 scsi_remove_host(shost); 7682 scsi_host_put(shost); 7683} 7684 7685static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info) 7686{ 7687 int rc = 0; 7688 struct pqi_device_registers __iomem *pqi_registers; 7689 unsigned long timeout; 7690 unsigned int timeout_msecs; 7691 union pqi_reset_register reset_reg; 7692 7693 pqi_registers = ctrl_info->pqi_registers; 7694 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100; 7695 timeout = msecs_to_jiffies(timeout_msecs) + jiffies; 7696 7697 while (1) { 7698 msleep(PQI_RESET_POLL_INTERVAL_MSECS); 7699 reset_reg.all_bits = readl(&pqi_registers->device_reset); 7700 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED) 7701 break; 7702 if (!sis_is_firmware_running(ctrl_info)) { 7703 rc = -ENXIO; 7704 break; 7705 } 7706 if (time_after(jiffies, timeout)) { 7707 rc = -ETIMEDOUT; 7708 break; 7709 } 7710 } 7711 7712 return rc; 7713} 7714 7715static int pqi_reset(struct pqi_ctrl_info *ctrl_info) 7716{ 7717 int rc; 7718 union pqi_reset_register reset_reg; 7719 7720 if (ctrl_info->pqi_reset_quiesce_supported) { 7721 rc = sis_pqi_reset_quiesce(ctrl_info); 7722 if (rc) { 7723 dev_err(&ctrl_info->pci_dev->dev, 7724 "PQI reset failed during quiesce with error %d\n", rc); 7725 return rc; 7726 } 7727 } 7728 7729 reset_reg.all_bits = 0; 7730 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET; 7731 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET; 7732 7733 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset); 7734 7735 rc = pqi_wait_for_pqi_reset_completion(ctrl_info); 7736 if (rc) 7737 dev_err(&ctrl_info->pci_dev->dev, 7738 "PQI reset failed with error %d\n", rc); 7739 7740 return rc; 7741} 7742 7743static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info) 7744{ 7745 int rc; 7746 struct bmic_sense_subsystem_info *sense_info; 7747 7748 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL); 7749 if (!sense_info) 7750 return -ENOMEM; 7751 7752 rc = pqi_sense_subsystem_info(ctrl_info, sense_info); 7753 if (rc) 7754 goto out; 7755 7756 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number, 7757 sizeof(sense_info->ctrl_serial_number)); 7758 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0'; 7759 7760out: 7761 kfree(sense_info); 7762 7763 return rc; 7764} 7765 7766static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info) 7767{ 7768 int rc; 7769 struct bmic_identify_controller *identify; 7770 7771 identify = kmalloc(sizeof(*identify), GFP_KERNEL); 7772 if (!identify) 7773 return -ENOMEM; 7774 7775 rc = pqi_identify_controller(ctrl_info, identify); 7776 if (rc) 7777 goto out; 7778 7779 if (get_unaligned_le32(&identify->extra_controller_flags) & 7780 BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED) { 7781 memcpy(ctrl_info->firmware_version, 7782 identify->firmware_version_long, 7783 sizeof(identify->firmware_version_long)); 7784 } else { 7785 memcpy(ctrl_info->firmware_version, 7786 identify->firmware_version_short, 7787 sizeof(identify->firmware_version_short)); 7788 ctrl_info->firmware_version 7789 [sizeof(identify->firmware_version_short)] = '\0'; 7790 snprintf(ctrl_info->firmware_version + 7791 strlen(ctrl_info->firmware_version), 7792 sizeof(ctrl_info->firmware_version) - 7793 sizeof(identify->firmware_version_short), 7794 "-%u", 7795 get_unaligned_le16(&identify->firmware_build_number)); 7796 } 7797 7798 memcpy(ctrl_info->model, identify->product_id, 7799 sizeof(identify->product_id)); 7800 ctrl_info->model[sizeof(identify->product_id)] = '\0'; 7801 7802 memcpy(ctrl_info->vendor, identify->vendor_id, 7803 sizeof(identify->vendor_id)); 7804 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0'; 7805 7806 dev_info(&ctrl_info->pci_dev->dev, 7807 "Firmware version: %s\n", ctrl_info->firmware_version); 7808 7809out: 7810 kfree(identify); 7811 7812 return rc; 7813} 7814 7815struct pqi_config_table_section_info { 7816 struct pqi_ctrl_info *ctrl_info; 7817 void *section; 7818 u32 section_offset; 7819 void __iomem *section_iomem_addr; 7820}; 7821 7822static inline bool pqi_is_firmware_feature_supported( 7823 struct pqi_config_table_firmware_features *firmware_features, 7824 unsigned int bit_position) 7825{ 7826 unsigned int byte_index; 7827 7828 byte_index = bit_position / BITS_PER_BYTE; 7829 7830 if (byte_index >= le16_to_cpu(firmware_features->num_elements)) 7831 return false; 7832 7833 return firmware_features->features_supported[byte_index] & 7834 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7835} 7836 7837static inline bool pqi_is_firmware_feature_enabled( 7838 struct pqi_config_table_firmware_features *firmware_features, 7839 void __iomem *firmware_features_iomem_addr, 7840 unsigned int bit_position) 7841{ 7842 unsigned int byte_index; 7843 u8 __iomem *features_enabled_iomem_addr; 7844 7845 byte_index = (bit_position / BITS_PER_BYTE) + 7846 (le16_to_cpu(firmware_features->num_elements) * 2); 7847 7848 features_enabled_iomem_addr = firmware_features_iomem_addr + 7849 offsetof(struct pqi_config_table_firmware_features, 7850 features_supported) + byte_index; 7851 7852 return *((__force u8 *)features_enabled_iomem_addr) & 7853 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7854} 7855 7856static inline void pqi_request_firmware_feature( 7857 struct pqi_config_table_firmware_features *firmware_features, 7858 unsigned int bit_position) 7859{ 7860 unsigned int byte_index; 7861 7862 byte_index = (bit_position / BITS_PER_BYTE) + 7863 le16_to_cpu(firmware_features->num_elements); 7864 7865 firmware_features->features_supported[byte_index] |= 7866 (1 << (bit_position % BITS_PER_BYTE)); 7867} 7868 7869static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info, 7870 u16 first_section, u16 last_section) 7871{ 7872 struct pqi_vendor_general_request request; 7873 7874 memset(&request, 0, sizeof(request)); 7875 7876 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 7877 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 7878 &request.header.iu_length); 7879 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE, 7880 &request.function_code); 7881 put_unaligned_le16(first_section, 7882 &request.data.config_table_update.first_section); 7883 put_unaligned_le16(last_section, 7884 &request.data.config_table_update.last_section); 7885 7886 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 7887} 7888 7889static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info, 7890 struct pqi_config_table_firmware_features *firmware_features, 7891 void __iomem *firmware_features_iomem_addr) 7892{ 7893 void *features_requested; 7894 void __iomem *features_requested_iomem_addr; 7895 void __iomem *host_max_known_feature_iomem_addr; 7896 7897 features_requested = firmware_features->features_supported + 7898 le16_to_cpu(firmware_features->num_elements); 7899 7900 features_requested_iomem_addr = firmware_features_iomem_addr + 7901 (features_requested - (void *)firmware_features); 7902 7903 memcpy_toio(features_requested_iomem_addr, features_requested, 7904 le16_to_cpu(firmware_features->num_elements)); 7905 7906 if (pqi_is_firmware_feature_supported(firmware_features, 7907 PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE)) { 7908 host_max_known_feature_iomem_addr = 7909 features_requested_iomem_addr + 7910 (le16_to_cpu(firmware_features->num_elements) * 2) + 7911 sizeof(__le16); 7912 writeb(PQI_FIRMWARE_FEATURE_MAXIMUM & 0xFF, host_max_known_feature_iomem_addr); 7913 writeb((PQI_FIRMWARE_FEATURE_MAXIMUM & 0xFF00) >> 8, host_max_known_feature_iomem_addr + 1); 7914 } 7915 7916 return pqi_config_table_update(ctrl_info, 7917 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES, 7918 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES); 7919} 7920 7921struct pqi_firmware_feature { 7922 char *feature_name; 7923 unsigned int feature_bit; 7924 bool supported; 7925 bool enabled; 7926 void (*feature_status)(struct pqi_ctrl_info *ctrl_info, 7927 struct pqi_firmware_feature *firmware_feature); 7928}; 7929 7930static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info, 7931 struct pqi_firmware_feature *firmware_feature) 7932{ 7933 if (!firmware_feature->supported) { 7934 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n", 7935 firmware_feature->feature_name); 7936 return; 7937 } 7938 7939 if (firmware_feature->enabled) { 7940 dev_info(&ctrl_info->pci_dev->dev, 7941 "%s enabled\n", firmware_feature->feature_name); 7942 return; 7943 } 7944 7945 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n", 7946 firmware_feature->feature_name); 7947} 7948 7949static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info, 7950 struct pqi_firmware_feature *firmware_feature) 7951{ 7952 switch (firmware_feature->feature_bit) { 7953 case PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS: 7954 ctrl_info->enable_r1_writes = firmware_feature->enabled; 7955 break; 7956 case PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS: 7957 ctrl_info->enable_r5_writes = firmware_feature->enabled; 7958 break; 7959 case PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS: 7960 ctrl_info->enable_r6_writes = firmware_feature->enabled; 7961 break; 7962 case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE: 7963 ctrl_info->soft_reset_handshake_supported = 7964 firmware_feature->enabled && 7965 pqi_read_soft_reset_status(ctrl_info); 7966 break; 7967 case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT: 7968 ctrl_info->raid_iu_timeout_supported = firmware_feature->enabled; 7969 break; 7970 case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT: 7971 ctrl_info->tmf_iu_timeout_supported = firmware_feature->enabled; 7972 break; 7973 case PQI_FIRMWARE_FEATURE_FW_TRIAGE: 7974 ctrl_info->firmware_triage_supported = firmware_feature->enabled; 7975 pqi_save_fw_triage_setting(ctrl_info, firmware_feature->enabled); 7976 break; 7977 case PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5: 7978 ctrl_info->rpl_extended_format_4_5_supported = firmware_feature->enabled; 7979 break; 7980 case PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT: 7981 ctrl_info->multi_lun_device_supported = firmware_feature->enabled; 7982 break; 7983 case PQI_FIRMWARE_FEATURE_CTRL_LOGGING: 7984 ctrl_info->ctrl_logging_supported = firmware_feature->enabled; 7985 break; 7986 } 7987 7988 pqi_firmware_feature_status(ctrl_info, firmware_feature); 7989} 7990 7991static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info, 7992 struct pqi_firmware_feature *firmware_feature) 7993{ 7994 if (firmware_feature->feature_status) 7995 firmware_feature->feature_status(ctrl_info, firmware_feature); 7996} 7997 7998static DEFINE_MUTEX(pqi_firmware_features_mutex); 7999 8000static struct pqi_firmware_feature pqi_firmware_features[] = { 8001 { 8002 .feature_name = "Online Firmware Activation", 8003 .feature_bit = PQI_FIRMWARE_FEATURE_OFA, 8004 .feature_status = pqi_firmware_feature_status, 8005 }, 8006 { 8007 .feature_name = "Serial Management Protocol", 8008 .feature_bit = PQI_FIRMWARE_FEATURE_SMP, 8009 .feature_status = pqi_firmware_feature_status, 8010 }, 8011 { 8012 .feature_name = "Maximum Known Feature", 8013 .feature_bit = PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE, 8014 .feature_status = pqi_firmware_feature_status, 8015 }, 8016 { 8017 .feature_name = "RAID 0 Read Bypass", 8018 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS, 8019 .feature_status = pqi_firmware_feature_status, 8020 }, 8021 { 8022 .feature_name = "RAID 1 Read Bypass", 8023 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS, 8024 .feature_status = pqi_firmware_feature_status, 8025 }, 8026 { 8027 .feature_name = "RAID 5 Read Bypass", 8028 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS, 8029 .feature_status = pqi_firmware_feature_status, 8030 }, 8031 { 8032 .feature_name = "RAID 6 Read Bypass", 8033 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS, 8034 .feature_status = pqi_firmware_feature_status, 8035 }, 8036 { 8037 .feature_name = "RAID 0 Write Bypass", 8038 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS, 8039 .feature_status = pqi_firmware_feature_status, 8040 }, 8041 { 8042 .feature_name = "RAID 1 Write Bypass", 8043 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS, 8044 .feature_status = pqi_ctrl_update_feature_flags, 8045 }, 8046 { 8047 .feature_name = "RAID 5 Write Bypass", 8048 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS, 8049 .feature_status = pqi_ctrl_update_feature_flags, 8050 }, 8051 { 8052 .feature_name = "RAID 6 Write Bypass", 8053 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS, 8054 .feature_status = pqi_ctrl_update_feature_flags, 8055 }, 8056 { 8057 .feature_name = "New Soft Reset Handshake", 8058 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE, 8059 .feature_status = pqi_ctrl_update_feature_flags, 8060 }, 8061 { 8062 .feature_name = "RAID IU Timeout", 8063 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT, 8064 .feature_status = pqi_ctrl_update_feature_flags, 8065 }, 8066 { 8067 .feature_name = "TMF IU Timeout", 8068 .feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT, 8069 .feature_status = pqi_ctrl_update_feature_flags, 8070 }, 8071 { 8072 .feature_name = "RAID Bypass on encrypted logical volumes on NVMe", 8073 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME, 8074 .feature_status = pqi_firmware_feature_status, 8075 }, 8076 { 8077 .feature_name = "Firmware Triage", 8078 .feature_bit = PQI_FIRMWARE_FEATURE_FW_TRIAGE, 8079 .feature_status = pqi_ctrl_update_feature_flags, 8080 }, 8081 { 8082 .feature_name = "RPL Extended Formats 4 and 5", 8083 .feature_bit = PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5, 8084 .feature_status = pqi_ctrl_update_feature_flags, 8085 }, 8086 { 8087 .feature_name = "Multi-LUN Target", 8088 .feature_bit = PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT, 8089 .feature_status = pqi_ctrl_update_feature_flags, 8090 }, 8091 { 8092 .feature_name = "Controller Data Logging", 8093 .feature_bit = PQI_FIRMWARE_FEATURE_CTRL_LOGGING, 8094 .feature_status = pqi_ctrl_update_feature_flags, 8095 }, 8096}; 8097 8098static void pqi_process_firmware_features( 8099 struct pqi_config_table_section_info *section_info) 8100{ 8101 int rc; 8102 struct pqi_ctrl_info *ctrl_info; 8103 struct pqi_config_table_firmware_features *firmware_features; 8104 void __iomem *firmware_features_iomem_addr; 8105 unsigned int i; 8106 unsigned int num_features_supported; 8107 8108 ctrl_info = section_info->ctrl_info; 8109 firmware_features = section_info->section; 8110 firmware_features_iomem_addr = section_info->section_iomem_addr; 8111 8112 for (i = 0, num_features_supported = 0; 8113 i < ARRAY_SIZE(pqi_firmware_features); i++) { 8114 if (pqi_is_firmware_feature_supported(firmware_features, 8115 pqi_firmware_features[i].feature_bit)) { 8116 pqi_firmware_features[i].supported = true; 8117 num_features_supported++; 8118 } else { 8119 pqi_firmware_feature_update(ctrl_info, 8120 &pqi_firmware_features[i]); 8121 } 8122 } 8123 8124 if (num_features_supported == 0) 8125 return; 8126 8127 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8128 if (!pqi_firmware_features[i].supported) 8129 continue; 8130 pqi_request_firmware_feature(firmware_features, 8131 pqi_firmware_features[i].feature_bit); 8132 } 8133 8134 rc = pqi_enable_firmware_features(ctrl_info, firmware_features, 8135 firmware_features_iomem_addr); 8136 if (rc) { 8137 dev_err(&ctrl_info->pci_dev->dev, 8138 "failed to enable firmware features in PQI configuration table\n"); 8139 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8140 if (!pqi_firmware_features[i].supported) 8141 continue; 8142 pqi_firmware_feature_update(ctrl_info, 8143 &pqi_firmware_features[i]); 8144 } 8145 return; 8146 } 8147 8148 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8149 if (!pqi_firmware_features[i].supported) 8150 continue; 8151 if (pqi_is_firmware_feature_enabled(firmware_features, 8152 firmware_features_iomem_addr, 8153 pqi_firmware_features[i].feature_bit)) { 8154 pqi_firmware_features[i].enabled = true; 8155 } 8156 pqi_firmware_feature_update(ctrl_info, 8157 &pqi_firmware_features[i]); 8158 } 8159} 8160 8161static void pqi_init_firmware_features(void) 8162{ 8163 unsigned int i; 8164 8165 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8166 pqi_firmware_features[i].supported = false; 8167 pqi_firmware_features[i].enabled = false; 8168 } 8169} 8170 8171static void pqi_process_firmware_features_section( 8172 struct pqi_config_table_section_info *section_info) 8173{ 8174 mutex_lock(&pqi_firmware_features_mutex); 8175 pqi_init_firmware_features(); 8176 pqi_process_firmware_features(section_info); 8177 mutex_unlock(&pqi_firmware_features_mutex); 8178} 8179 8180/* 8181 * Reset all controller settings that can be initialized during the processing 8182 * of the PQI Configuration Table. 8183 */ 8184 8185static void pqi_ctrl_reset_config(struct pqi_ctrl_info *ctrl_info) 8186{ 8187 ctrl_info->heartbeat_counter = NULL; 8188 ctrl_info->soft_reset_status = NULL; 8189 ctrl_info->soft_reset_handshake_supported = false; 8190 ctrl_info->enable_r1_writes = false; 8191 ctrl_info->enable_r5_writes = false; 8192 ctrl_info->enable_r6_writes = false; 8193 ctrl_info->raid_iu_timeout_supported = false; 8194 ctrl_info->tmf_iu_timeout_supported = false; 8195 ctrl_info->firmware_triage_supported = false; 8196 ctrl_info->rpl_extended_format_4_5_supported = false; 8197 ctrl_info->multi_lun_device_supported = false; 8198 ctrl_info->ctrl_logging_supported = false; 8199} 8200 8201static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info) 8202{ 8203 u32 table_length; 8204 u32 section_offset; 8205 bool firmware_feature_section_present; 8206 void __iomem *table_iomem_addr; 8207 struct pqi_config_table *config_table; 8208 struct pqi_config_table_section_header *section; 8209 struct pqi_config_table_section_info section_info; 8210 struct pqi_config_table_section_info feature_section_info = {0}; 8211 8212 table_length = ctrl_info->config_table_length; 8213 if (table_length == 0) 8214 return 0; 8215 8216 config_table = kmalloc(table_length, GFP_KERNEL); 8217 if (!config_table) { 8218 dev_err(&ctrl_info->pci_dev->dev, 8219 "failed to allocate memory for PQI configuration table\n"); 8220 return -ENOMEM; 8221 } 8222 8223 /* 8224 * Copy the config table contents from I/O memory space into the 8225 * temporary buffer. 8226 */ 8227 table_iomem_addr = ctrl_info->iomem_base + ctrl_info->config_table_offset; 8228 memcpy_fromio(config_table, table_iomem_addr, table_length); 8229 8230 firmware_feature_section_present = false; 8231 section_info.ctrl_info = ctrl_info; 8232 section_offset = get_unaligned_le32(&config_table->first_section_offset); 8233 8234 while (section_offset) { 8235 section = (void *)config_table + section_offset; 8236 8237 section_info.section = section; 8238 section_info.section_offset = section_offset; 8239 section_info.section_iomem_addr = table_iomem_addr + section_offset; 8240 8241 switch (get_unaligned_le16(§ion->section_id)) { 8242 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES: 8243 firmware_feature_section_present = true; 8244 feature_section_info = section_info; 8245 break; 8246 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT: 8247 if (pqi_disable_heartbeat) 8248 dev_warn(&ctrl_info->pci_dev->dev, 8249 "heartbeat disabled by module parameter\n"); 8250 else 8251 ctrl_info->heartbeat_counter = 8252 table_iomem_addr + 8253 section_offset + 8254 offsetof(struct pqi_config_table_heartbeat, 8255 heartbeat_counter); 8256 break; 8257 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET: 8258 ctrl_info->soft_reset_status = 8259 table_iomem_addr + 8260 section_offset + 8261 offsetof(struct pqi_config_table_soft_reset, 8262 soft_reset_status); 8263 break; 8264 } 8265 8266 section_offset = get_unaligned_le16(§ion->next_section_offset); 8267 } 8268 8269 /* 8270 * We process the firmware feature section after all other sections 8271 * have been processed so that the feature bit callbacks can take 8272 * into account the settings configured by other sections. 8273 */ 8274 if (firmware_feature_section_present) 8275 pqi_process_firmware_features_section(&feature_section_info); 8276 8277 kfree(config_table); 8278 8279 return 0; 8280} 8281 8282/* Switches the controller from PQI mode back into SIS mode. */ 8283 8284static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) 8285{ 8286 int rc; 8287 8288 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE); 8289 rc = pqi_reset(ctrl_info); 8290 if (rc) 8291 return rc; 8292 rc = sis_reenable_sis_mode(ctrl_info); 8293 if (rc) { 8294 dev_err(&ctrl_info->pci_dev->dev, 8295 "re-enabling SIS mode failed with error %d\n", rc); 8296 return rc; 8297 } 8298 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 8299 8300 return 0; 8301} 8302 8303/* 8304 * If the controller isn't already in SIS mode, this function forces it into 8305 * SIS mode. 8306 */ 8307 8308static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) 8309{ 8310 if (!sis_is_firmware_running(ctrl_info)) 8311 return -ENXIO; 8312 8313 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) 8314 return 0; 8315 8316 if (sis_is_kernel_up(ctrl_info)) { 8317 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 8318 return 0; 8319 } 8320 8321 return pqi_revert_to_sis_mode(ctrl_info); 8322} 8323 8324static void pqi_perform_lockup_action(void) 8325{ 8326 switch (pqi_lockup_action) { 8327 case PANIC: 8328 panic("FATAL: Smart Family Controller lockup detected"); 8329 break; 8330 case REBOOT: 8331 emergency_restart(); 8332 break; 8333 case NONE: 8334 default: 8335 break; 8336 } 8337} 8338 8339#define PQI_CTRL_LOG_TOTAL_SIZE (4 * 1024 * 1024) 8340#define PQI_CTRL_LOG_MIN_SIZE (PQI_CTRL_LOG_TOTAL_SIZE / PQI_HOST_MAX_SG_DESCRIPTORS) 8341 8342static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) 8343{ 8344 int rc; 8345 u32 product_id; 8346 8347 if (reset_devices) { 8348 if (is_kdump_kernel() && pqi_is_fw_triage_supported(ctrl_info)) { 8349 rc = sis_wait_for_fw_triage_completion(ctrl_info); 8350 if (rc) 8351 return rc; 8352 } 8353 if (is_kdump_kernel() && sis_is_ctrl_logging_supported(ctrl_info)) { 8354 sis_notify_kdump(ctrl_info); 8355 rc = sis_wait_for_ctrl_logging_completion(ctrl_info); 8356 if (rc) 8357 return rc; 8358 } 8359 sis_soft_reset(ctrl_info); 8360 ssleep(PQI_POST_RESET_DELAY_SECS); 8361 } else { 8362 rc = pqi_force_sis_mode(ctrl_info); 8363 if (rc) 8364 return rc; 8365 } 8366 8367 /* 8368 * Wait until the controller is ready to start accepting SIS 8369 * commands. 8370 */ 8371 rc = sis_wait_for_ctrl_ready(ctrl_info); 8372 if (rc) { 8373 if (reset_devices) { 8374 dev_err(&ctrl_info->pci_dev->dev, 8375 "kdump init failed with error %d\n", rc); 8376 pqi_lockup_action = REBOOT; 8377 pqi_perform_lockup_action(); 8378 } 8379 return rc; 8380 } 8381 8382 /* 8383 * Get the controller properties. This allows us to determine 8384 * whether or not it supports PQI mode. 8385 */ 8386 rc = sis_get_ctrl_properties(ctrl_info); 8387 if (rc) { 8388 dev_err(&ctrl_info->pci_dev->dev, 8389 "error obtaining controller properties\n"); 8390 return rc; 8391 } 8392 8393 rc = sis_get_pqi_capabilities(ctrl_info); 8394 if (rc) { 8395 dev_err(&ctrl_info->pci_dev->dev, 8396 "error obtaining controller capabilities\n"); 8397 return rc; 8398 } 8399 8400 product_id = sis_get_product_id(ctrl_info); 8401 ctrl_info->product_id = (u8)product_id; 8402 ctrl_info->product_revision = (u8)(product_id >> 8); 8403 8404 if (is_kdump_kernel()) { 8405 if (ctrl_info->max_outstanding_requests > 8406 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP) 8407 ctrl_info->max_outstanding_requests = 8408 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP; 8409 } else { 8410 if (ctrl_info->max_outstanding_requests > 8411 PQI_MAX_OUTSTANDING_REQUESTS) 8412 ctrl_info->max_outstanding_requests = 8413 PQI_MAX_OUTSTANDING_REQUESTS; 8414 } 8415 8416 pqi_calculate_io_resources(ctrl_info); 8417 8418 rc = pqi_alloc_error_buffer(ctrl_info); 8419 if (rc) { 8420 dev_err(&ctrl_info->pci_dev->dev, 8421 "failed to allocate PQI error buffer\n"); 8422 return rc; 8423 } 8424 8425 /* 8426 * If the function we are about to call succeeds, the 8427 * controller will transition from legacy SIS mode 8428 * into PQI mode. 8429 */ 8430 rc = sis_init_base_struct_addr(ctrl_info); 8431 if (rc) { 8432 dev_err(&ctrl_info->pci_dev->dev, 8433 "error initializing PQI mode\n"); 8434 return rc; 8435 } 8436 8437 /* Wait for the controller to complete the SIS -> PQI transition. */ 8438 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8439 if (rc) { 8440 dev_err(&ctrl_info->pci_dev->dev, 8441 "transition to PQI mode failed\n"); 8442 return rc; 8443 } 8444 8445 /* From here on, we are running in PQI mode. */ 8446 ctrl_info->pqi_mode_enabled = true; 8447 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8448 8449 rc = pqi_alloc_admin_queues(ctrl_info); 8450 if (rc) { 8451 dev_err(&ctrl_info->pci_dev->dev, 8452 "failed to allocate admin queues\n"); 8453 return rc; 8454 } 8455 8456 rc = pqi_create_admin_queues(ctrl_info); 8457 if (rc) { 8458 dev_err(&ctrl_info->pci_dev->dev, 8459 "error creating admin queues\n"); 8460 return rc; 8461 } 8462 8463 rc = pqi_report_device_capability(ctrl_info); 8464 if (rc) { 8465 dev_err(&ctrl_info->pci_dev->dev, 8466 "obtaining device capability failed\n"); 8467 return rc; 8468 } 8469 8470 rc = pqi_validate_device_capability(ctrl_info); 8471 if (rc) 8472 return rc; 8473 8474 pqi_calculate_queue_resources(ctrl_info); 8475 8476 rc = pqi_enable_msix_interrupts(ctrl_info); 8477 if (rc) 8478 return rc; 8479 8480 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { 8481 ctrl_info->max_msix_vectors = 8482 ctrl_info->num_msix_vectors_enabled; 8483 pqi_calculate_queue_resources(ctrl_info); 8484 } 8485 8486 rc = pqi_alloc_io_resources(ctrl_info); 8487 if (rc) 8488 return rc; 8489 8490 rc = pqi_alloc_operational_queues(ctrl_info); 8491 if (rc) { 8492 dev_err(&ctrl_info->pci_dev->dev, 8493 "failed to allocate operational queues\n"); 8494 return rc; 8495 } 8496 8497 pqi_init_operational_queues(ctrl_info); 8498 8499 rc = pqi_create_queues(ctrl_info); 8500 if (rc) 8501 return rc; 8502 8503 rc = pqi_request_irqs(ctrl_info); 8504 if (rc) 8505 return rc; 8506 8507 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8508 8509 ctrl_info->controller_online = true; 8510 8511 rc = pqi_process_config_table(ctrl_info); 8512 if (rc) 8513 return rc; 8514 8515 pqi_start_heartbeat_timer(ctrl_info); 8516 8517 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8518 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8519 if (rc) { /* Supported features not returned correctly. */ 8520 dev_err(&ctrl_info->pci_dev->dev, 8521 "error obtaining advanced RAID bypass configuration\n"); 8522 return rc; 8523 } 8524 ctrl_info->ciss_report_log_flags |= 8525 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8526 } 8527 8528 rc = pqi_enable_events(ctrl_info); 8529 if (rc) { 8530 dev_err(&ctrl_info->pci_dev->dev, 8531 "error enabling events\n"); 8532 return rc; 8533 } 8534 8535 /* Register with the SCSI subsystem. */ 8536 rc = pqi_register_scsi(ctrl_info); 8537 if (rc) 8538 return rc; 8539 8540 if (ctrl_info->ctrl_logging_supported && !is_kdump_kernel()) { 8541 pqi_host_setup_buffer(ctrl_info, &ctrl_info->ctrl_log_memory, PQI_CTRL_LOG_TOTAL_SIZE, PQI_CTRL_LOG_MIN_SIZE); 8542 pqi_host_memory_update(ctrl_info, &ctrl_info->ctrl_log_memory, PQI_VENDOR_GENERAL_CTRL_LOG_MEMORY_UPDATE); 8543 } 8544 8545 rc = pqi_get_ctrl_product_details(ctrl_info); 8546 if (rc) { 8547 dev_err(&ctrl_info->pci_dev->dev, 8548 "error obtaining product details\n"); 8549 return rc; 8550 } 8551 8552 rc = pqi_get_ctrl_serial_number(ctrl_info); 8553 if (rc) { 8554 dev_err(&ctrl_info->pci_dev->dev, 8555 "error obtaining ctrl serial number\n"); 8556 return rc; 8557 } 8558 8559 rc = pqi_set_diag_rescan(ctrl_info); 8560 if (rc) { 8561 dev_err(&ctrl_info->pci_dev->dev, 8562 "error enabling multi-lun rescan\n"); 8563 return rc; 8564 } 8565 8566 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8567 if (rc) { 8568 dev_err(&ctrl_info->pci_dev->dev, 8569 "error updating host wellness\n"); 8570 return rc; 8571 } 8572 8573 pqi_schedule_update_time_worker(ctrl_info); 8574 8575 pqi_scan_scsi_devices(ctrl_info); 8576 8577 return 0; 8578} 8579 8580static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info) 8581{ 8582 unsigned int i; 8583 struct pqi_admin_queues *admin_queues; 8584 struct pqi_event_queue *event_queue; 8585 8586 admin_queues = &ctrl_info->admin_queues; 8587 admin_queues->iq_pi_copy = 0; 8588 admin_queues->oq_ci_copy = 0; 8589 writel(0, admin_queues->oq_pi); 8590 8591 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 8592 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0; 8593 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0; 8594 ctrl_info->queue_groups[i].oq_ci_copy = 0; 8595 8596 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]); 8597 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]); 8598 writel(0, ctrl_info->queue_groups[i].oq_pi); 8599 } 8600 8601 event_queue = &ctrl_info->event_queue; 8602 writel(0, event_queue->oq_pi); 8603 event_queue->oq_ci_copy = 0; 8604} 8605 8606static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info) 8607{ 8608 int rc; 8609 8610 rc = pqi_force_sis_mode(ctrl_info); 8611 if (rc) 8612 return rc; 8613 8614 /* 8615 * Wait until the controller is ready to start accepting SIS 8616 * commands. 8617 */ 8618 rc = sis_wait_for_ctrl_ready_resume(ctrl_info); 8619 if (rc) 8620 return rc; 8621 8622 /* 8623 * Get the controller properties. This allows us to determine 8624 * whether or not it supports PQI mode. 8625 */ 8626 rc = sis_get_ctrl_properties(ctrl_info); 8627 if (rc) { 8628 dev_err(&ctrl_info->pci_dev->dev, 8629 "error obtaining controller properties\n"); 8630 return rc; 8631 } 8632 8633 rc = sis_get_pqi_capabilities(ctrl_info); 8634 if (rc) { 8635 dev_err(&ctrl_info->pci_dev->dev, 8636 "error obtaining controller capabilities\n"); 8637 return rc; 8638 } 8639 8640 /* 8641 * If the function we are about to call succeeds, the 8642 * controller will transition from legacy SIS mode 8643 * into PQI mode. 8644 */ 8645 rc = sis_init_base_struct_addr(ctrl_info); 8646 if (rc) { 8647 dev_err(&ctrl_info->pci_dev->dev, 8648 "error initializing PQI mode\n"); 8649 return rc; 8650 } 8651 8652 /* Wait for the controller to complete the SIS -> PQI transition. */ 8653 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8654 if (rc) { 8655 dev_err(&ctrl_info->pci_dev->dev, 8656 "transition to PQI mode failed\n"); 8657 return rc; 8658 } 8659 8660 /* From here on, we are running in PQI mode. */ 8661 ctrl_info->pqi_mode_enabled = true; 8662 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8663 8664 pqi_reinit_queues(ctrl_info); 8665 8666 rc = pqi_create_admin_queues(ctrl_info); 8667 if (rc) { 8668 dev_err(&ctrl_info->pci_dev->dev, 8669 "error creating admin queues\n"); 8670 return rc; 8671 } 8672 8673 rc = pqi_create_queues(ctrl_info); 8674 if (rc) 8675 return rc; 8676 8677 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8678 8679 ctrl_info->controller_online = true; 8680 pqi_ctrl_unblock_requests(ctrl_info); 8681 8682 pqi_ctrl_reset_config(ctrl_info); 8683 8684 rc = pqi_process_config_table(ctrl_info); 8685 if (rc) 8686 return rc; 8687 8688 pqi_start_heartbeat_timer(ctrl_info); 8689 8690 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8691 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8692 if (rc) { 8693 dev_err(&ctrl_info->pci_dev->dev, 8694 "error obtaining advanced RAID bypass configuration\n"); 8695 return rc; 8696 } 8697 ctrl_info->ciss_report_log_flags |= 8698 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8699 } 8700 8701 rc = pqi_enable_events(ctrl_info); 8702 if (rc) { 8703 dev_err(&ctrl_info->pci_dev->dev, 8704 "error enabling events\n"); 8705 return rc; 8706 } 8707 8708 rc = pqi_get_ctrl_product_details(ctrl_info); 8709 if (rc) { 8710 dev_err(&ctrl_info->pci_dev->dev, 8711 "error obtaining product details\n"); 8712 return rc; 8713 } 8714 8715 rc = pqi_set_diag_rescan(ctrl_info); 8716 if (rc) { 8717 dev_err(&ctrl_info->pci_dev->dev, 8718 "error enabling multi-lun rescan\n"); 8719 return rc; 8720 } 8721 8722 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8723 if (rc) { 8724 dev_err(&ctrl_info->pci_dev->dev, 8725 "error updating host wellness\n"); 8726 return rc; 8727 } 8728 8729 if (pqi_ofa_in_progress(ctrl_info)) { 8730 pqi_ctrl_unblock_scan(ctrl_info); 8731 if (ctrl_info->ctrl_logging_supported) { 8732 if (!ctrl_info->ctrl_log_memory.host_memory) 8733 pqi_host_setup_buffer(ctrl_info, 8734 &ctrl_info->ctrl_log_memory, 8735 PQI_CTRL_LOG_TOTAL_SIZE, 8736 PQI_CTRL_LOG_MIN_SIZE); 8737 pqi_host_memory_update(ctrl_info, 8738 &ctrl_info->ctrl_log_memory, PQI_VENDOR_GENERAL_CTRL_LOG_MEMORY_UPDATE); 8739 } else { 8740 if (ctrl_info->ctrl_log_memory.host_memory) 8741 pqi_host_free_buffer(ctrl_info, 8742 &ctrl_info->ctrl_log_memory); 8743 } 8744 } 8745 8746 pqi_scan_scsi_devices(ctrl_info); 8747 8748 return 0; 8749} 8750 8751static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, u16 timeout) 8752{ 8753 int rc; 8754 8755 rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, 8756 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); 8757 8758 return pcibios_err_to_errno(rc); 8759} 8760 8761static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) 8762{ 8763 int rc; 8764 u64 mask; 8765 8766 rc = pci_enable_device(ctrl_info->pci_dev); 8767 if (rc) { 8768 dev_err(&ctrl_info->pci_dev->dev, 8769 "failed to enable PCI device\n"); 8770 return rc; 8771 } 8772 8773 if (sizeof(dma_addr_t) > 4) 8774 mask = DMA_BIT_MASK(64); 8775 else 8776 mask = DMA_BIT_MASK(32); 8777 8778 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask); 8779 if (rc) { 8780 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); 8781 goto disable_device; 8782 } 8783 8784 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); 8785 if (rc) { 8786 dev_err(&ctrl_info->pci_dev->dev, 8787 "failed to obtain PCI resources\n"); 8788 goto disable_device; 8789 } 8790 8791 ctrl_info->iomem_base = ioremap(pci_resource_start( 8792 ctrl_info->pci_dev, 0), 8793 pci_resource_len(ctrl_info->pci_dev, 0)); 8794 if (!ctrl_info->iomem_base) { 8795 dev_err(&ctrl_info->pci_dev->dev, 8796 "failed to map memory for controller registers\n"); 8797 rc = -ENOMEM; 8798 goto release_regions; 8799 } 8800 8801#define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 8802 8803 /* Increase the PCIe completion timeout. */ 8804 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, 8805 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); 8806 if (rc) { 8807 dev_err(&ctrl_info->pci_dev->dev, 8808 "failed to set PCIe completion timeout\n"); 8809 goto release_regions; 8810 } 8811 8812 /* Enable bus mastering. */ 8813 pci_set_master(ctrl_info->pci_dev); 8814 8815 ctrl_info->registers = ctrl_info->iomem_base; 8816 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; 8817 8818 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); 8819 8820 return 0; 8821 8822release_regions: 8823 pci_release_regions(ctrl_info->pci_dev); 8824disable_device: 8825 pci_disable_device(ctrl_info->pci_dev); 8826 8827 return rc; 8828} 8829 8830static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) 8831{ 8832 iounmap(ctrl_info->iomem_base); 8833 pci_release_regions(ctrl_info->pci_dev); 8834 if (pci_is_enabled(ctrl_info->pci_dev)) 8835 pci_disable_device(ctrl_info->pci_dev); 8836 pci_set_drvdata(ctrl_info->pci_dev, NULL); 8837} 8838 8839static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) 8840{ 8841 struct pqi_ctrl_info *ctrl_info; 8842 8843 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), 8844 GFP_KERNEL, numa_node); 8845 if (!ctrl_info) 8846 return NULL; 8847 8848 mutex_init(&ctrl_info->scan_mutex); 8849 mutex_init(&ctrl_info->lun_reset_mutex); 8850 mutex_init(&ctrl_info->ofa_mutex); 8851 8852 INIT_LIST_HEAD(&ctrl_info->scsi_device_list); 8853 spin_lock_init(&ctrl_info->scsi_device_list_lock); 8854 8855 INIT_WORK(&ctrl_info->event_work, pqi_event_worker); 8856 atomic_set(&ctrl_info->num_interrupts, 0); 8857 8858 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); 8859 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); 8860 8861 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0); 8862 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker); 8863 8864 INIT_WORK(&ctrl_info->ofa_memory_alloc_work, pqi_ofa_memory_alloc_worker); 8865 INIT_WORK(&ctrl_info->ofa_quiesce_work, pqi_ofa_quiesce_worker); 8866 8867 sema_init(&ctrl_info->sync_request_sem, 8868 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); 8869 init_waitqueue_head(&ctrl_info->block_requests_wait); 8870 8871 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; 8872 ctrl_info->irq_mode = IRQ_MODE_NONE; 8873 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; 8874 8875 ctrl_info->ciss_report_log_flags = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID; 8876 ctrl_info->max_transfer_encrypted_sas_sata = 8877 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA; 8878 ctrl_info->max_transfer_encrypted_nvme = 8879 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME; 8880 ctrl_info->max_write_raid_5_6 = PQI_DEFAULT_MAX_WRITE_RAID_5_6; 8881 ctrl_info->max_write_raid_1_10_2drive = ~0; 8882 ctrl_info->max_write_raid_1_10_3drive = ~0; 8883 ctrl_info->disable_managed_interrupts = pqi_disable_managed_interrupts; 8884 8885 return ctrl_info; 8886} 8887 8888static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) 8889{ 8890 kfree(ctrl_info); 8891} 8892 8893static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) 8894{ 8895 pqi_free_irqs(ctrl_info); 8896 pqi_disable_msix_interrupts(ctrl_info); 8897} 8898 8899static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) 8900{ 8901 pqi_free_interrupts(ctrl_info); 8902 if (ctrl_info->queue_memory_base) 8903 dma_free_coherent(&ctrl_info->pci_dev->dev, 8904 ctrl_info->queue_memory_length, 8905 ctrl_info->queue_memory_base, 8906 ctrl_info->queue_memory_base_dma_handle); 8907 if (ctrl_info->admin_queue_memory_base) 8908 dma_free_coherent(&ctrl_info->pci_dev->dev, 8909 ctrl_info->admin_queue_memory_length, 8910 ctrl_info->admin_queue_memory_base, 8911 ctrl_info->admin_queue_memory_base_dma_handle); 8912 pqi_free_all_io_requests(ctrl_info); 8913 if (ctrl_info->error_buffer) 8914 dma_free_coherent(&ctrl_info->pci_dev->dev, 8915 ctrl_info->error_buffer_length, 8916 ctrl_info->error_buffer, 8917 ctrl_info->error_buffer_dma_handle); 8918 if (ctrl_info->iomem_base) 8919 pqi_cleanup_pci_init(ctrl_info); 8920 pqi_free_ctrl_info(ctrl_info); 8921} 8922 8923static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) 8924{ 8925 ctrl_info->controller_online = false; 8926 pqi_stop_heartbeat_timer(ctrl_info); 8927 pqi_ctrl_block_requests(ctrl_info); 8928 pqi_cancel_rescan_worker(ctrl_info); 8929 pqi_cancel_update_time_worker(ctrl_info); 8930 if (ctrl_info->ctrl_removal_state == PQI_CTRL_SURPRISE_REMOVAL) { 8931 pqi_fail_all_outstanding_requests(ctrl_info); 8932 ctrl_info->pqi_mode_enabled = false; 8933 } 8934 pqi_host_free_buffer(ctrl_info, &ctrl_info->ctrl_log_memory); 8935 pqi_unregister_scsi(ctrl_info); 8936 if (ctrl_info->pqi_mode_enabled) 8937 pqi_revert_to_sis_mode(ctrl_info); 8938 pqi_free_ctrl_resources(ctrl_info); 8939} 8940 8941static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info) 8942{ 8943 pqi_ctrl_block_scan(ctrl_info); 8944 pqi_scsi_block_requests(ctrl_info); 8945 pqi_ctrl_block_device_reset(ctrl_info); 8946 pqi_ctrl_block_requests(ctrl_info); 8947 pqi_ctrl_wait_until_quiesced(ctrl_info); 8948 pqi_stop_heartbeat_timer(ctrl_info); 8949} 8950 8951static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info) 8952{ 8953 pqi_start_heartbeat_timer(ctrl_info); 8954 pqi_ctrl_unblock_requests(ctrl_info); 8955 pqi_ctrl_unblock_device_reset(ctrl_info); 8956 pqi_scsi_unblock_requests(ctrl_info); 8957 pqi_ctrl_unblock_scan(ctrl_info); 8958} 8959 8960static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs) 8961{ 8962 ssleep(delay_secs); 8963 8964 return pqi_ctrl_init_resume(ctrl_info); 8965} 8966 8967static int pqi_host_alloc_mem(struct pqi_ctrl_info *ctrl_info, 8968 struct pqi_host_memory_descriptor *host_memory_descriptor, 8969 u32 total_size, u32 chunk_size) 8970{ 8971 int i; 8972 u32 sg_count; 8973 struct device *dev; 8974 struct pqi_host_memory *host_memory; 8975 struct pqi_sg_descriptor *mem_descriptor; 8976 dma_addr_t dma_handle; 8977 8978 sg_count = DIV_ROUND_UP(total_size, chunk_size); 8979 if (sg_count == 0 || sg_count > PQI_HOST_MAX_SG_DESCRIPTORS) 8980 goto out; 8981 8982 host_memory_descriptor->host_chunk_virt_address = 8983 kmalloc_array(sg_count, sizeof(void *), GFP_KERNEL); 8984 if (!host_memory_descriptor->host_chunk_virt_address) 8985 goto out; 8986 8987 dev = &ctrl_info->pci_dev->dev; 8988 host_memory = host_memory_descriptor->host_memory; 8989 8990 for (i = 0; i < sg_count; i++) { 8991 host_memory_descriptor->host_chunk_virt_address[i] = dma_alloc_coherent(dev, chunk_size, &dma_handle, GFP_KERNEL); 8992 if (!host_memory_descriptor->host_chunk_virt_address[i]) 8993 goto out_free_chunks; 8994 mem_descriptor = &host_memory->sg_descriptor[i]; 8995 put_unaligned_le64((u64)dma_handle, &mem_descriptor->address); 8996 put_unaligned_le32(chunk_size, &mem_descriptor->length); 8997 } 8998 8999 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags); 9000 put_unaligned_le16(sg_count, &host_memory->num_memory_descriptors); 9001 put_unaligned_le32(sg_count * chunk_size, &host_memory->bytes_allocated); 9002 9003 return 0; 9004 9005out_free_chunks: 9006 while (--i >= 0) { 9007 mem_descriptor = &host_memory->sg_descriptor[i]; 9008 dma_free_coherent(dev, chunk_size, 9009 host_memory_descriptor->host_chunk_virt_address[i], 9010 get_unaligned_le64(&mem_descriptor->address)); 9011 } 9012 kfree(host_memory_descriptor->host_chunk_virt_address); 9013out: 9014 return -ENOMEM; 9015} 9016 9017static int pqi_host_alloc_buffer(struct pqi_ctrl_info *ctrl_info, 9018 struct pqi_host_memory_descriptor *host_memory_descriptor, 9019 u32 total_required_size, u32 min_required_size) 9020{ 9021 u32 chunk_size; 9022 u32 min_chunk_size; 9023 9024 if (total_required_size == 0 || min_required_size == 0) 9025 return 0; 9026 9027 total_required_size = PAGE_ALIGN(total_required_size); 9028 min_required_size = PAGE_ALIGN(min_required_size); 9029 min_chunk_size = DIV_ROUND_UP(total_required_size, PQI_HOST_MAX_SG_DESCRIPTORS); 9030 min_chunk_size = PAGE_ALIGN(min_chunk_size); 9031 9032 while (total_required_size >= min_required_size) { 9033 for (chunk_size = total_required_size; chunk_size >= min_chunk_size;) { 9034 if (pqi_host_alloc_mem(ctrl_info, 9035 host_memory_descriptor, total_required_size, 9036 chunk_size) == 0) 9037 return 0; 9038 chunk_size /= 2; 9039 chunk_size = PAGE_ALIGN(chunk_size); 9040 } 9041 total_required_size /= 2; 9042 total_required_size = PAGE_ALIGN(total_required_size); 9043 } 9044 9045 return -ENOMEM; 9046} 9047 9048static void pqi_host_setup_buffer(struct pqi_ctrl_info *ctrl_info, 9049 struct pqi_host_memory_descriptor *host_memory_descriptor, 9050 u32 total_size, u32 min_size) 9051{ 9052 struct device *dev; 9053 struct pqi_host_memory *host_memory; 9054 9055 dev = &ctrl_info->pci_dev->dev; 9056 9057 host_memory = dma_alloc_coherent(dev, sizeof(*host_memory), 9058 &host_memory_descriptor->host_memory_dma_handle, GFP_KERNEL); 9059 if (!host_memory) 9060 return; 9061 9062 host_memory_descriptor->host_memory = host_memory; 9063 9064 if (pqi_host_alloc_buffer(ctrl_info, host_memory_descriptor, 9065 total_size, min_size) < 0) { 9066 dev_err(dev, "failed to allocate firmware usable host buffer\n"); 9067 dma_free_coherent(dev, sizeof(*host_memory), host_memory, 9068 host_memory_descriptor->host_memory_dma_handle); 9069 host_memory_descriptor->host_memory = NULL; 9070 return; 9071 } 9072} 9073 9074static void pqi_host_free_buffer(struct pqi_ctrl_info *ctrl_info, 9075 struct pqi_host_memory_descriptor *host_memory_descriptor) 9076{ 9077 unsigned int i; 9078 struct device *dev; 9079 struct pqi_host_memory *host_memory; 9080 struct pqi_sg_descriptor *mem_descriptor; 9081 unsigned int num_memory_descriptors; 9082 9083 host_memory = host_memory_descriptor->host_memory; 9084 if (!host_memory) 9085 return; 9086 9087 dev = &ctrl_info->pci_dev->dev; 9088 9089 if (get_unaligned_le32(&host_memory->bytes_allocated) == 0) 9090 goto out; 9091 9092 mem_descriptor = host_memory->sg_descriptor; 9093 num_memory_descriptors = get_unaligned_le16(&host_memory->num_memory_descriptors); 9094 9095 for (i = 0; i < num_memory_descriptors; i++) { 9096 dma_free_coherent(dev, 9097 get_unaligned_le32(&mem_descriptor[i].length), 9098 host_memory_descriptor->host_chunk_virt_address[i], 9099 get_unaligned_le64(&mem_descriptor[i].address)); 9100 } 9101 kfree(host_memory_descriptor->host_chunk_virt_address); 9102 9103out: 9104 dma_free_coherent(dev, sizeof(*host_memory), host_memory, 9105 host_memory_descriptor->host_memory_dma_handle); 9106 host_memory_descriptor->host_memory = NULL; 9107} 9108 9109static int pqi_host_memory_update(struct pqi_ctrl_info *ctrl_info, 9110 struct pqi_host_memory_descriptor *host_memory_descriptor, 9111 u16 function_code) 9112{ 9113 u32 buffer_length; 9114 struct pqi_vendor_general_request request; 9115 struct pqi_host_memory *host_memory; 9116 9117 memset(&request, 0, sizeof(request)); 9118 9119 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 9120 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 9121 put_unaligned_le16(function_code, &request.function_code); 9122 9123 host_memory = host_memory_descriptor->host_memory; 9124 9125 if (host_memory) { 9126 buffer_length = offsetof(struct pqi_host_memory, sg_descriptor) + get_unaligned_le16(&host_memory->num_memory_descriptors) * sizeof(struct pqi_sg_descriptor); 9127 put_unaligned_le64((u64)host_memory_descriptor->host_memory_dma_handle, &request.data.host_memory_allocation.buffer_address); 9128 put_unaligned_le32(buffer_length, &request.data.host_memory_allocation.buffer_length); 9129 9130 if (function_code == PQI_VENDOR_GENERAL_OFA_MEMORY_UPDATE) { 9131 put_unaligned_le16(PQI_OFA_VERSION, &host_memory->version); 9132 memcpy(&host_memory->signature, PQI_OFA_SIGNATURE, sizeof(host_memory->signature)); 9133 } else if (function_code == PQI_VENDOR_GENERAL_CTRL_LOG_MEMORY_UPDATE) { 9134 put_unaligned_le16(PQI_CTRL_LOG_VERSION, &host_memory->version); 9135 memcpy(&host_memory->signature, PQI_CTRL_LOG_SIGNATURE, sizeof(host_memory->signature)); 9136 } 9137 } 9138 9139 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 9140} 9141 9142static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = { 9143 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR, 9144 .status = SAM_STAT_CHECK_CONDITION, 9145}; 9146 9147static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info) 9148{ 9149 unsigned int i; 9150 struct pqi_io_request *io_request; 9151 struct scsi_cmnd *scmd; 9152 struct scsi_device *sdev; 9153 9154 for (i = 0; i < ctrl_info->max_io_slots; i++) { 9155 io_request = &ctrl_info->io_request_pool[i]; 9156 if (atomic_read(&io_request->refcount) == 0) 9157 continue; 9158 9159 scmd = io_request->scmd; 9160 if (scmd) { 9161 sdev = scmd->device; 9162 if (!sdev || !scsi_device_online(sdev)) { 9163 pqi_free_io_request(io_request); 9164 continue; 9165 } else { 9166 set_host_byte(scmd, DID_NO_CONNECT); 9167 } 9168 } else { 9169 io_request->status = -ENXIO; 9170 io_request->error_info = 9171 &pqi_ctrl_offline_raid_error_info; 9172 } 9173 9174 io_request->io_complete_callback(io_request, 9175 io_request->context); 9176 } 9177} 9178 9179static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info) 9180{ 9181 pqi_perform_lockup_action(); 9182 pqi_stop_heartbeat_timer(ctrl_info); 9183 pqi_free_interrupts(ctrl_info); 9184 pqi_cancel_rescan_worker(ctrl_info); 9185 pqi_cancel_update_time_worker(ctrl_info); 9186 pqi_ctrl_wait_until_quiesced(ctrl_info); 9187 pqi_fail_all_outstanding_requests(ctrl_info); 9188 pqi_ctrl_unblock_requests(ctrl_info); 9189 pqi_take_ctrl_devices_offline(ctrl_info); 9190} 9191 9192static void pqi_ctrl_offline_worker(struct work_struct *work) 9193{ 9194 struct pqi_ctrl_info *ctrl_info; 9195 9196 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work); 9197 pqi_take_ctrl_offline_deferred(ctrl_info); 9198} 9199 9200static char *pqi_ctrl_shutdown_reason_to_string(enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 9201{ 9202 char *string; 9203 9204 switch (ctrl_shutdown_reason) { 9205 case PQI_IQ_NOT_DRAINED_TIMEOUT: 9206 string = "inbound queue not drained timeout"; 9207 break; 9208 case PQI_LUN_RESET_TIMEOUT: 9209 string = "LUN reset timeout"; 9210 break; 9211 case PQI_IO_PENDING_POST_LUN_RESET_TIMEOUT: 9212 string = "I/O pending timeout after LUN reset"; 9213 break; 9214 case PQI_NO_HEARTBEAT: 9215 string = "no controller heartbeat detected"; 9216 break; 9217 case PQI_FIRMWARE_KERNEL_NOT_UP: 9218 string = "firmware kernel not ready"; 9219 break; 9220 case PQI_OFA_RESPONSE_TIMEOUT: 9221 string = "OFA response timeout"; 9222 break; 9223 case PQI_INVALID_REQ_ID: 9224 string = "invalid request ID"; 9225 break; 9226 case PQI_UNMATCHED_REQ_ID: 9227 string = "unmatched request ID"; 9228 break; 9229 case PQI_IO_PI_OUT_OF_RANGE: 9230 string = "I/O queue producer index out of range"; 9231 break; 9232 case PQI_EVENT_PI_OUT_OF_RANGE: 9233 string = "event queue producer index out of range"; 9234 break; 9235 case PQI_UNEXPECTED_IU_TYPE: 9236 string = "unexpected IU type"; 9237 break; 9238 default: 9239 string = "unknown reason"; 9240 break; 9241 } 9242 9243 return string; 9244} 9245 9246static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 9247 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 9248{ 9249 if (!ctrl_info->controller_online) 9250 return; 9251 9252 ctrl_info->controller_online = false; 9253 ctrl_info->pqi_mode_enabled = false; 9254 pqi_ctrl_block_requests(ctrl_info); 9255 if (!pqi_disable_ctrl_shutdown) 9256 sis_shutdown_ctrl(ctrl_info, ctrl_shutdown_reason); 9257 pci_disable_device(ctrl_info->pci_dev); 9258 dev_err(&ctrl_info->pci_dev->dev, 9259 "controller offline: reason code 0x%x (%s)\n", 9260 ctrl_shutdown_reason, pqi_ctrl_shutdown_reason_to_string(ctrl_shutdown_reason)); 9261 schedule_work(&ctrl_info->ctrl_offline_work); 9262} 9263 9264static void pqi_take_ctrl_devices_offline(struct pqi_ctrl_info *ctrl_info) 9265{ 9266 int rc; 9267 unsigned long flags; 9268 struct pqi_scsi_dev *device; 9269 9270 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 9271 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 9272 rc = list_is_last(&device->scsi_device_list_entry, &ctrl_info->scsi_device_list); 9273 if (rc) 9274 continue; 9275 9276 /* 9277 * Is the sdev pointer NULL? 9278 */ 9279 if (device->sdev) 9280 scsi_device_set_state(device->sdev, SDEV_OFFLINE); 9281 } 9282 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 9283} 9284 9285static void pqi_print_ctrl_info(struct pci_dev *pci_dev, 9286 const struct pci_device_id *id) 9287{ 9288 char *ctrl_description; 9289 9290 if (id->driver_data) 9291 ctrl_description = (char *)id->driver_data; 9292 else 9293 ctrl_description = "Microchip Smart Family Controller"; 9294 9295 dev_info(&pci_dev->dev, "%s found\n", ctrl_description); 9296} 9297 9298static int pqi_pci_probe(struct pci_dev *pci_dev, 9299 const struct pci_device_id *id) 9300{ 9301 int rc; 9302 int node; 9303 struct pqi_ctrl_info *ctrl_info; 9304 9305 pqi_print_ctrl_info(pci_dev, id); 9306 9307 if (pqi_disable_device_id_wildcards && 9308 id->subvendor == PCI_ANY_ID && 9309 id->subdevice == PCI_ANY_ID) { 9310 dev_warn(&pci_dev->dev, 9311 "controller not probed because device ID wildcards are disabled\n"); 9312 return -ENODEV; 9313 } 9314 9315 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) 9316 dev_warn(&pci_dev->dev, 9317 "controller device ID matched using wildcards\n"); 9318 9319 node = dev_to_node(&pci_dev->dev); 9320 if (node == NUMA_NO_NODE) { 9321 node = cpu_to_node(0); 9322 if (node == NUMA_NO_NODE) 9323 node = 0; 9324 set_dev_node(&pci_dev->dev, node); 9325 } 9326 9327 ctrl_info = pqi_alloc_ctrl_info(node); 9328 if (!ctrl_info) { 9329 dev_err(&pci_dev->dev, 9330 "failed to allocate controller info block\n"); 9331 return -ENOMEM; 9332 } 9333 ctrl_info->numa_node = node; 9334 9335 ctrl_info->pci_dev = pci_dev; 9336 9337 rc = pqi_pci_init(ctrl_info); 9338 if (rc) 9339 goto error; 9340 9341 rc = pqi_ctrl_init(ctrl_info); 9342 if (rc) 9343 goto error; 9344 9345 return 0; 9346 9347error: 9348 pqi_remove_ctrl(ctrl_info); 9349 9350 return rc; 9351} 9352 9353static void pqi_pci_remove(struct pci_dev *pci_dev) 9354{ 9355 struct pqi_ctrl_info *ctrl_info; 9356 u16 vendor_id; 9357 int rc; 9358 9359 ctrl_info = pci_get_drvdata(pci_dev); 9360 if (!ctrl_info) 9361 return; 9362 9363 pci_read_config_word(ctrl_info->pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor_id); 9364 if (vendor_id == 0xffff) 9365 ctrl_info->ctrl_removal_state = PQI_CTRL_SURPRISE_REMOVAL; 9366 else 9367 ctrl_info->ctrl_removal_state = PQI_CTRL_GRACEFUL_REMOVAL; 9368 9369 if (ctrl_info->ctrl_removal_state == PQI_CTRL_GRACEFUL_REMOVAL) { 9370 rc = pqi_flush_cache(ctrl_info, RESTART); 9371 if (rc) 9372 dev_err(&pci_dev->dev, 9373 "unable to flush controller cache during remove\n"); 9374 } 9375 9376 pqi_remove_ctrl(ctrl_info); 9377} 9378 9379static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info) 9380{ 9381 unsigned int i; 9382 struct pqi_io_request *io_request; 9383 struct scsi_cmnd *scmd; 9384 9385 for (i = 0; i < ctrl_info->max_io_slots; i++) { 9386 io_request = &ctrl_info->io_request_pool[i]; 9387 if (atomic_read(&io_request->refcount) == 0) 9388 continue; 9389 scmd = io_request->scmd; 9390 WARN_ON(scmd != NULL); /* IO command from SML */ 9391 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/ 9392 } 9393} 9394 9395static void pqi_shutdown(struct pci_dev *pci_dev) 9396{ 9397 int rc; 9398 struct pqi_ctrl_info *ctrl_info; 9399 enum bmic_flush_cache_shutdown_event shutdown_event; 9400 9401 ctrl_info = pci_get_drvdata(pci_dev); 9402 if (!ctrl_info) { 9403 dev_err(&pci_dev->dev, 9404 "cache could not be flushed\n"); 9405 return; 9406 } 9407 9408 pqi_wait_until_ofa_finished(ctrl_info); 9409 9410 pqi_scsi_block_requests(ctrl_info); 9411 pqi_ctrl_block_device_reset(ctrl_info); 9412 pqi_ctrl_block_requests(ctrl_info); 9413 pqi_ctrl_wait_until_quiesced(ctrl_info); 9414 9415 if (system_state == SYSTEM_RESTART) 9416 shutdown_event = RESTART; 9417 else 9418 shutdown_event = SHUTDOWN; 9419 9420 /* 9421 * Write all data in the controller's battery-backed cache to 9422 * storage. 9423 */ 9424 rc = pqi_flush_cache(ctrl_info, shutdown_event); 9425 if (rc) 9426 dev_err(&pci_dev->dev, 9427 "unable to flush controller cache during shutdown\n"); 9428 9429 pqi_crash_if_pending_command(ctrl_info); 9430 pqi_reset(ctrl_info); 9431} 9432 9433static void pqi_process_lockup_action_param(void) 9434{ 9435 unsigned int i; 9436 9437 if (!pqi_lockup_action_param) 9438 return; 9439 9440 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 9441 if (strcmp(pqi_lockup_action_param, 9442 pqi_lockup_actions[i].name) == 0) { 9443 pqi_lockup_action = pqi_lockup_actions[i].action; 9444 return; 9445 } 9446 } 9447 9448 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n", 9449 DRIVER_NAME_SHORT, pqi_lockup_action_param); 9450} 9451 9452#define PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS 30 9453#define PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS (30 * 60) 9454 9455static void pqi_process_ctrl_ready_timeout_param(void) 9456{ 9457 if (pqi_ctrl_ready_timeout_secs == 0) 9458 return; 9459 9460 if (pqi_ctrl_ready_timeout_secs < PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS) { 9461 pr_warn("%s: ctrl_ready_timeout parm of %u second(s) is less than minimum timeout of %d seconds - setting timeout to %d seconds\n", 9462 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS); 9463 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS; 9464 } else if (pqi_ctrl_ready_timeout_secs > PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS) { 9465 pr_warn("%s: ctrl_ready_timeout parm of %u seconds is greater than maximum timeout of %d seconds - setting timeout to %d seconds\n", 9466 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS); 9467 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS; 9468 } 9469 9470 sis_ctrl_ready_timeout_secs = pqi_ctrl_ready_timeout_secs; 9471} 9472 9473static void pqi_process_module_params(void) 9474{ 9475 pqi_process_lockup_action_param(); 9476 pqi_process_ctrl_ready_timeout_param(); 9477} 9478 9479#if defined(CONFIG_PM) 9480 9481static inline enum bmic_flush_cache_shutdown_event pqi_get_flush_cache_shutdown_event(struct pci_dev *pci_dev) 9482{ 9483 if (pci_dev->subsystem_vendor == PCI_VENDOR_ID_ADAPTEC2 && pci_dev->subsystem_device == 0x1304) 9484 return RESTART; 9485 9486 return SUSPEND; 9487} 9488 9489static int pqi_suspend_or_freeze(struct device *dev, bool suspend) 9490{ 9491 struct pci_dev *pci_dev; 9492 struct pqi_ctrl_info *ctrl_info; 9493 9494 pci_dev = to_pci_dev(dev); 9495 ctrl_info = pci_get_drvdata(pci_dev); 9496 9497 pqi_wait_until_ofa_finished(ctrl_info); 9498 9499 pqi_ctrl_block_scan(ctrl_info); 9500 pqi_scsi_block_requests(ctrl_info); 9501 pqi_ctrl_block_device_reset(ctrl_info); 9502 pqi_ctrl_block_requests(ctrl_info); 9503 pqi_ctrl_wait_until_quiesced(ctrl_info); 9504 9505 if (suspend) { 9506 enum bmic_flush_cache_shutdown_event shutdown_event; 9507 9508 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev); 9509 pqi_flush_cache(ctrl_info, shutdown_event); 9510 } 9511 9512 pqi_stop_heartbeat_timer(ctrl_info); 9513 pqi_crash_if_pending_command(ctrl_info); 9514 pqi_free_irqs(ctrl_info); 9515 9516 ctrl_info->controller_online = false; 9517 ctrl_info->pqi_mode_enabled = false; 9518 9519 return 0; 9520} 9521 9522static __maybe_unused int pqi_suspend(struct device *dev) 9523{ 9524 return pqi_suspend_or_freeze(dev, true); 9525} 9526 9527static int pqi_resume_or_restore(struct device *dev) 9528{ 9529 int rc; 9530 struct pci_dev *pci_dev; 9531 struct pqi_ctrl_info *ctrl_info; 9532 9533 pci_dev = to_pci_dev(dev); 9534 ctrl_info = pci_get_drvdata(pci_dev); 9535 9536 rc = pqi_request_irqs(ctrl_info); 9537 if (rc) 9538 return rc; 9539 9540 pqi_ctrl_unblock_device_reset(ctrl_info); 9541 pqi_ctrl_unblock_requests(ctrl_info); 9542 pqi_scsi_unblock_requests(ctrl_info); 9543 pqi_ctrl_unblock_scan(ctrl_info); 9544 9545 ssleep(PQI_POST_RESET_DELAY_SECS); 9546 9547 return pqi_ctrl_init_resume(ctrl_info); 9548} 9549 9550static int pqi_freeze(struct device *dev) 9551{ 9552 return pqi_suspend_or_freeze(dev, false); 9553} 9554 9555static int pqi_thaw(struct device *dev) 9556{ 9557 int rc; 9558 struct pci_dev *pci_dev; 9559 struct pqi_ctrl_info *ctrl_info; 9560 9561 pci_dev = to_pci_dev(dev); 9562 ctrl_info = pci_get_drvdata(pci_dev); 9563 9564 rc = pqi_request_irqs(ctrl_info); 9565 if (rc) 9566 return rc; 9567 9568 ctrl_info->controller_online = true; 9569 ctrl_info->pqi_mode_enabled = true; 9570 9571 pqi_ctrl_unblock_device_reset(ctrl_info); 9572 pqi_ctrl_unblock_requests(ctrl_info); 9573 pqi_scsi_unblock_requests(ctrl_info); 9574 pqi_ctrl_unblock_scan(ctrl_info); 9575 9576 return 0; 9577} 9578 9579static int pqi_poweroff(struct device *dev) 9580{ 9581 struct pci_dev *pci_dev; 9582 struct pqi_ctrl_info *ctrl_info; 9583 enum bmic_flush_cache_shutdown_event shutdown_event; 9584 9585 pci_dev = to_pci_dev(dev); 9586 ctrl_info = pci_get_drvdata(pci_dev); 9587 9588 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev); 9589 pqi_flush_cache(ctrl_info, shutdown_event); 9590 9591 return 0; 9592} 9593 9594static const struct dev_pm_ops pqi_pm_ops = { 9595 .suspend = pqi_suspend, 9596 .resume = pqi_resume_or_restore, 9597 .freeze = pqi_freeze, 9598 .thaw = pqi_thaw, 9599 .poweroff = pqi_poweroff, 9600 .restore = pqi_resume_or_restore, 9601}; 9602 9603#endif /* CONFIG_PM */ 9604 9605/* Define the PCI IDs for the controllers that we support. */ 9606static const struct pci_device_id pqi_pci_id_table[] = { 9607 { 9608 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9609 0x105b, 0x1211) 9610 }, 9611 { 9612 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9613 0x105b, 0x1321) 9614 }, 9615 { 9616 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9617 0x152d, 0x8a22) 9618 }, 9619 { 9620 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9621 0x152d, 0x8a23) 9622 }, 9623 { 9624 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9625 0x152d, 0x8a24) 9626 }, 9627 { 9628 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9629 0x152d, 0x8a36) 9630 }, 9631 { 9632 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9633 0x152d, 0x8a37) 9634 }, 9635 { 9636 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9637 0x193d, 0x0462) 9638 }, 9639 { 9640 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9641 0x193d, 0x1104) 9642 }, 9643 { 9644 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9645 0x193d, 0x1105) 9646 }, 9647 { 9648 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9649 0x193d, 0x1106) 9650 }, 9651 { 9652 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9653 0x193d, 0x1107) 9654 }, 9655 { 9656 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9657 0x193d, 0x1108) 9658 }, 9659 { 9660 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9661 0x193d, 0x1109) 9662 }, 9663 { 9664 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9665 0x193d, 0x110b) 9666 }, 9667 { 9668 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9669 0x193d, 0x1110) 9670 }, 9671 { 9672 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9673 0x193d, 0x8460) 9674 }, 9675 { 9676 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9677 0x193d, 0x8461) 9678 }, 9679 { 9680 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9681 0x193d, 0x8462) 9682 }, 9683 { 9684 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9685 0x193d, 0xc460) 9686 }, 9687 { 9688 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9689 0x193d, 0xc461) 9690 }, 9691 { 9692 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9693 0x193d, 0xf460) 9694 }, 9695 { 9696 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9697 0x193d, 0xf461) 9698 }, 9699 { 9700 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9701 0x1bd4, 0x0045) 9702 }, 9703 { 9704 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9705 0x1bd4, 0x0046) 9706 }, 9707 { 9708 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9709 0x1bd4, 0x0047) 9710 }, 9711 { 9712 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9713 0x1bd4, 0x0048) 9714 }, 9715 { 9716 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9717 0x1bd4, 0x004a) 9718 }, 9719 { 9720 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9721 0x1bd4, 0x004b) 9722 }, 9723 { 9724 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9725 0x1bd4, 0x004c) 9726 }, 9727 { 9728 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9729 0x1bd4, 0x004f) 9730 }, 9731 { 9732 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9733 0x1bd4, 0x0051) 9734 }, 9735 { 9736 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9737 0x1bd4, 0x0052) 9738 }, 9739 { 9740 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9741 0x1bd4, 0x0053) 9742 }, 9743 { 9744 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9745 0x1bd4, 0x0054) 9746 }, 9747 { 9748 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9749 0x1bd4, 0x006b) 9750 }, 9751 { 9752 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9753 0x1bd4, 0x006c) 9754 }, 9755 { 9756 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9757 0x1bd4, 0x006d) 9758 }, 9759 { 9760 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9761 0x1bd4, 0x006f) 9762 }, 9763 { 9764 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9765 0x1bd4, 0x0070) 9766 }, 9767 { 9768 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9769 0x1bd4, 0x0071) 9770 }, 9771 { 9772 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9773 0x1bd4, 0x0072) 9774 }, 9775 { 9776 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9777 0x1bd4, 0x0086) 9778 }, 9779 { 9780 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9781 0x1bd4, 0x0087) 9782 }, 9783 { 9784 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9785 0x1bd4, 0x0088) 9786 }, 9787 { 9788 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9789 0x1bd4, 0x0089) 9790 }, 9791 { 9792 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9793 0x1bd4, 0x00a3) 9794 }, 9795 { 9796 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9797 0x1ff9, 0x00a1) 9798 }, 9799 { 9800 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9801 0x1f3a, 0x0104) 9802 }, 9803 { 9804 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9805 0x19e5, 0xd227) 9806 }, 9807 { 9808 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9809 0x19e5, 0xd228) 9810 }, 9811 { 9812 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9813 0x19e5, 0xd229) 9814 }, 9815 { 9816 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9817 0x19e5, 0xd22a) 9818 }, 9819 { 9820 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9821 0x19e5, 0xd22b) 9822 }, 9823 { 9824 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9825 0x19e5, 0xd22c) 9826 }, 9827 { 9828 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9829 PCI_VENDOR_ID_ADAPTEC2, 0x0110) 9830 }, 9831 { 9832 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9833 PCI_VENDOR_ID_ADAPTEC2, 0x0608) 9834 }, 9835 { 9836 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9837 PCI_VENDOR_ID_ADAPTEC2, 0x0659) 9838 }, 9839 { 9840 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9841 PCI_VENDOR_ID_ADAPTEC2, 0x0800) 9842 }, 9843 { 9844 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9845 PCI_VENDOR_ID_ADAPTEC2, 0x0801) 9846 }, 9847 { 9848 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9849 PCI_VENDOR_ID_ADAPTEC2, 0x0802) 9850 }, 9851 { 9852 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9853 PCI_VENDOR_ID_ADAPTEC2, 0x0803) 9854 }, 9855 { 9856 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9857 PCI_VENDOR_ID_ADAPTEC2, 0x0804) 9858 }, 9859 { 9860 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9861 PCI_VENDOR_ID_ADAPTEC2, 0x0805) 9862 }, 9863 { 9864 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9865 PCI_VENDOR_ID_ADAPTEC2, 0x0806) 9866 }, 9867 { 9868 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9869 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 9870 }, 9871 { 9872 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9873 PCI_VENDOR_ID_ADAPTEC2, 0x0808) 9874 }, 9875 { 9876 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9877 PCI_VENDOR_ID_ADAPTEC2, 0x0809) 9878 }, 9879 { 9880 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9881 PCI_VENDOR_ID_ADAPTEC2, 0x080a) 9882 }, 9883 { 9884 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9885 PCI_VENDOR_ID_ADAPTEC2, 0x0900) 9886 }, 9887 { 9888 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9889 PCI_VENDOR_ID_ADAPTEC2, 0x0901) 9890 }, 9891 { 9892 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9893 PCI_VENDOR_ID_ADAPTEC2, 0x0902) 9894 }, 9895 { 9896 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9897 PCI_VENDOR_ID_ADAPTEC2, 0x0903) 9898 }, 9899 { 9900 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9901 PCI_VENDOR_ID_ADAPTEC2, 0x0904) 9902 }, 9903 { 9904 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9905 PCI_VENDOR_ID_ADAPTEC2, 0x0905) 9906 }, 9907 { 9908 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9909 PCI_VENDOR_ID_ADAPTEC2, 0x0906) 9910 }, 9911 { 9912 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9913 PCI_VENDOR_ID_ADAPTEC2, 0x0907) 9914 }, 9915 { 9916 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9917 PCI_VENDOR_ID_ADAPTEC2, 0x0908) 9918 }, 9919 { 9920 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9921 PCI_VENDOR_ID_ADAPTEC2, 0x090a) 9922 }, 9923 { 9924 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9925 PCI_VENDOR_ID_ADAPTEC2, 0x1200) 9926 }, 9927 { 9928 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9929 PCI_VENDOR_ID_ADAPTEC2, 0x1201) 9930 }, 9931 { 9932 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9933 PCI_VENDOR_ID_ADAPTEC2, 0x1202) 9934 }, 9935 { 9936 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9937 PCI_VENDOR_ID_ADAPTEC2, 0x1280) 9938 }, 9939 { 9940 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9941 PCI_VENDOR_ID_ADAPTEC2, 0x1281) 9942 }, 9943 { 9944 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9945 PCI_VENDOR_ID_ADAPTEC2, 0x1282) 9946 }, 9947 { 9948 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9949 PCI_VENDOR_ID_ADAPTEC2, 0x1300) 9950 }, 9951 { 9952 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9953 PCI_VENDOR_ID_ADAPTEC2, 0x1301) 9954 }, 9955 { 9956 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9957 PCI_VENDOR_ID_ADAPTEC2, 0x1302) 9958 }, 9959 { 9960 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9961 PCI_VENDOR_ID_ADAPTEC2, 0x1303) 9962 }, 9963 { 9964 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9965 PCI_VENDOR_ID_ADAPTEC2, 0x1304) 9966 }, 9967 { 9968 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9969 PCI_VENDOR_ID_ADAPTEC2, 0x1380) 9970 }, 9971 { 9972 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9973 PCI_VENDOR_ID_ADAPTEC2, 0x1400) 9974 }, 9975 { 9976 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9977 PCI_VENDOR_ID_ADAPTEC2, 0x1402) 9978 }, 9979 { 9980 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9981 PCI_VENDOR_ID_ADAPTEC2, 0x1410) 9982 }, 9983 { 9984 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9985 PCI_VENDOR_ID_ADAPTEC2, 0x1411) 9986 }, 9987 { 9988 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9989 PCI_VENDOR_ID_ADAPTEC2, 0x1412) 9990 }, 9991 { 9992 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9993 PCI_VENDOR_ID_ADAPTEC2, 0x1420) 9994 }, 9995 { 9996 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9997 PCI_VENDOR_ID_ADAPTEC2, 0x1430) 9998 }, 9999 { 10000 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10001 PCI_VENDOR_ID_ADAPTEC2, 0x1440) 10002 }, 10003 { 10004 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10005 PCI_VENDOR_ID_ADAPTEC2, 0x1441) 10006 }, 10007 { 10008 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10009 PCI_VENDOR_ID_ADAPTEC2, 0x1450) 10010 }, 10011 { 10012 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10013 PCI_VENDOR_ID_ADAPTEC2, 0x1452) 10014 }, 10015 { 10016 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10017 PCI_VENDOR_ID_ADAPTEC2, 0x1460) 10018 }, 10019 { 10020 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10021 PCI_VENDOR_ID_ADAPTEC2, 0x1461) 10022 }, 10023 { 10024 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10025 PCI_VENDOR_ID_ADAPTEC2, 0x1462) 10026 }, 10027 { 10028 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10029 PCI_VENDOR_ID_ADAPTEC2, 0x1463) 10030 }, 10031 { 10032 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10033 PCI_VENDOR_ID_ADAPTEC2, 0x1470) 10034 }, 10035 { 10036 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10037 PCI_VENDOR_ID_ADAPTEC2, 0x1471) 10038 }, 10039 { 10040 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10041 PCI_VENDOR_ID_ADAPTEC2, 0x1472) 10042 }, 10043 { 10044 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10045 PCI_VENDOR_ID_ADAPTEC2, 0x1473) 10046 }, 10047 { 10048 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10049 PCI_VENDOR_ID_ADAPTEC2, 0x1474) 10050 }, 10051 { 10052 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10053 PCI_VENDOR_ID_ADAPTEC2, 0x1475) 10054 }, 10055 { 10056 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10057 PCI_VENDOR_ID_ADAPTEC2, 0x1480) 10058 }, 10059 { 10060 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10061 PCI_VENDOR_ID_ADAPTEC2, 0x1490) 10062 }, 10063 { 10064 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10065 PCI_VENDOR_ID_ADAPTEC2, 0x1491) 10066 }, 10067 { 10068 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10069 PCI_VENDOR_ID_ADAPTEC2, 0x14a0) 10070 }, 10071 { 10072 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10073 PCI_VENDOR_ID_ADAPTEC2, 0x14a1) 10074 }, 10075 { 10076 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10077 PCI_VENDOR_ID_ADAPTEC2, 0x14a2) 10078 }, 10079 { 10080 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10081 PCI_VENDOR_ID_ADAPTEC2, 0x14a4) 10082 }, 10083 { 10084 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10085 PCI_VENDOR_ID_ADAPTEC2, 0x14a5) 10086 }, 10087 { 10088 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10089 PCI_VENDOR_ID_ADAPTEC2, 0x14a6) 10090 }, 10091 { 10092 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10093 PCI_VENDOR_ID_ADAPTEC2, 0x14b0) 10094 }, 10095 { 10096 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10097 PCI_VENDOR_ID_ADAPTEC2, 0x14b1) 10098 }, 10099 { 10100 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10101 PCI_VENDOR_ID_ADAPTEC2, 0x14c0) 10102 }, 10103 { 10104 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10105 PCI_VENDOR_ID_ADAPTEC2, 0x14c1) 10106 }, 10107 { 10108 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10109 PCI_VENDOR_ID_ADAPTEC2, 0x14c2) 10110 }, 10111 { 10112 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10113 PCI_VENDOR_ID_ADAPTEC2, 0x14c3) 10114 }, 10115 { 10116 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10117 PCI_VENDOR_ID_ADAPTEC2, 0x14c4) 10118 }, 10119 { 10120 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10121 PCI_VENDOR_ID_ADAPTEC2, 0x14d0) 10122 }, 10123 { 10124 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10125 PCI_VENDOR_ID_ADAPTEC2, 0x14e0) 10126 }, 10127 { 10128 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10129 PCI_VENDOR_ID_ADAPTEC2, 0x14f0) 10130 }, 10131 { 10132 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10133 0x207d, 0x4044) 10134 }, 10135 { 10136 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10137 0x207d, 0x4054) 10138 }, 10139 { 10140 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10141 0x207d, 0x4084) 10142 }, 10143 { 10144 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10145 0x207d, 0x4094) 10146 }, 10147 { 10148 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10149 0x207d, 0x4140) 10150 }, 10151 { 10152 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10153 0x207d, 0x4240) 10154 }, 10155 { 10156 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10157 0x207d, 0x4840) 10158 }, 10159 { 10160 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10161 PCI_VENDOR_ID_ADVANTECH, 0x8312) 10162 }, 10163 { 10164 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10165 PCI_VENDOR_ID_DELL, 0x1fe0) 10166 }, 10167 { 10168 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10169 PCI_VENDOR_ID_HP, 0x0600) 10170 }, 10171 { 10172 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10173 PCI_VENDOR_ID_HP, 0x0601) 10174 }, 10175 { 10176 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10177 PCI_VENDOR_ID_HP, 0x0602) 10178 }, 10179 { 10180 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10181 PCI_VENDOR_ID_HP, 0x0603) 10182 }, 10183 { 10184 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10185 PCI_VENDOR_ID_HP, 0x0609) 10186 }, 10187 { 10188 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10189 PCI_VENDOR_ID_HP, 0x0650) 10190 }, 10191 { 10192 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10193 PCI_VENDOR_ID_HP, 0x0651) 10194 }, 10195 { 10196 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10197 PCI_VENDOR_ID_HP, 0x0652) 10198 }, 10199 { 10200 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10201 PCI_VENDOR_ID_HP, 0x0653) 10202 }, 10203 { 10204 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10205 PCI_VENDOR_ID_HP, 0x0654) 10206 }, 10207 { 10208 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10209 PCI_VENDOR_ID_HP, 0x0655) 10210 }, 10211 { 10212 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10213 PCI_VENDOR_ID_HP, 0x0700) 10214 }, 10215 { 10216 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10217 PCI_VENDOR_ID_HP, 0x0701) 10218 }, 10219 { 10220 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10221 PCI_VENDOR_ID_HP, 0x1001) 10222 }, 10223 { 10224 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10225 PCI_VENDOR_ID_HP, 0x1002) 10226 }, 10227 { 10228 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10229 PCI_VENDOR_ID_HP, 0x1100) 10230 }, 10231 { 10232 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10233 PCI_VENDOR_ID_HP, 0x1101) 10234 }, 10235 { 10236 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10237 0x1590, 0x0294) 10238 }, 10239 { 10240 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10241 0x1590, 0x02db) 10242 }, 10243 { 10244 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10245 0x1590, 0x02dc) 10246 }, 10247 { 10248 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10249 0x1590, 0x032e) 10250 }, 10251 { 10252 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10253 0x1590, 0x036f) 10254 }, 10255 { 10256 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10257 0x1590, 0x0381) 10258 }, 10259 { 10260 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10261 0x1590, 0x0382) 10262 }, 10263 { 10264 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10265 0x1590, 0x0383) 10266 }, 10267 { 10268 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10269 0x1d8d, 0x0800) 10270 }, 10271 { 10272 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10273 0x1d8d, 0x0908) 10274 }, 10275 { 10276 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10277 0x1d8d, 0x0806) 10278 }, 10279 { 10280 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10281 0x1d8d, 0x0916) 10282 }, 10283 { 10284 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10285 PCI_VENDOR_ID_GIGABYTE, 0x1000) 10286 }, 10287 { 10288 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10289 0x1dfc, 0x3161) 10290 }, 10291 { 10292 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10293 0x1f0c, 0x3161) 10294 }, 10295 { 10296 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10297 0x1cf2, 0x0804) 10298 }, 10299 { 10300 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10301 0x1cf2, 0x0805) 10302 }, 10303 { 10304 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10305 0x1cf2, 0x0806) 10306 }, 10307 { 10308 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10309 0x1cf2, 0x5445) 10310 }, 10311 { 10312 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10313 0x1cf2, 0x5446) 10314 }, 10315 { 10316 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10317 0x1cf2, 0x5447) 10318 }, 10319 { 10320 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10321 0x1cf2, 0x5449) 10322 }, 10323 { 10324 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10325 0x1cf2, 0x544a) 10326 }, 10327 { 10328 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10329 0x1cf2, 0x544b) 10330 }, 10331 { 10332 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10333 0x1cf2, 0x544d) 10334 }, 10335 { 10336 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10337 0x1cf2, 0x544e) 10338 }, 10339 { 10340 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10341 0x1cf2, 0x544f) 10342 }, 10343 { 10344 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10345 0x1cf2, 0x54da) 10346 }, 10347 { 10348 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10349 0x1cf2, 0x54db) 10350 }, 10351 { 10352 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10353 0x1cf2, 0x54dc) 10354 }, 10355 { 10356 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10357 0x1cf2, 0x0b27) 10358 }, 10359 { 10360 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10361 0x1cf2, 0x0b29) 10362 }, 10363 { 10364 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10365 0x1cf2, 0x0b45) 10366 }, 10367 { 10368 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10369 0x1cc4, 0x0101) 10370 }, 10371 { 10372 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10373 0x1cc4, 0x0201) 10374 }, 10375 { 10376 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10377 0x1018, 0x8238) 10378 }, 10379 { 10380 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10381 0x1f3f, 0x0610) 10382 }, 10383 { 10384 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10385 PCI_VENDOR_ID_LENOVO, 0x0220) 10386 }, 10387 { 10388 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10389 PCI_VENDOR_ID_LENOVO, 0x0221) 10390 }, 10391 { 10392 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10393 PCI_VENDOR_ID_LENOVO, 0x0222) 10394 }, 10395 { 10396 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10397 PCI_VENDOR_ID_LENOVO, 0x0223) 10398 }, 10399 { 10400 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10401 PCI_VENDOR_ID_LENOVO, 0x0224) 10402 }, 10403 { 10404 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10405 PCI_VENDOR_ID_LENOVO, 0x0225) 10406 }, 10407 { 10408 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10409 PCI_VENDOR_ID_LENOVO, 0x0520) 10410 }, 10411 { 10412 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10413 PCI_VENDOR_ID_LENOVO, 0x0521) 10414 }, 10415 { 10416 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10417 PCI_VENDOR_ID_LENOVO, 0x0522) 10418 }, 10419 { 10420 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10421 PCI_VENDOR_ID_LENOVO, 0x0620) 10422 }, 10423 { 10424 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10425 PCI_VENDOR_ID_LENOVO, 0x0621) 10426 }, 10427 { 10428 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10429 PCI_VENDOR_ID_LENOVO, 0x0622) 10430 }, 10431 { 10432 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10433 PCI_VENDOR_ID_LENOVO, 0x0623) 10434 }, 10435 { 10436 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10437 PCI_VENDOR_ID_LENOVO, 0x0624) 10438 }, 10439 { 10440 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10441 PCI_VENDOR_ID_LENOVO, 0x0625) 10442 }, 10443 { 10444 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10445 PCI_VENDOR_ID_LENOVO, 0x0626) 10446 }, 10447 { 10448 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10449 PCI_VENDOR_ID_LENOVO, 0x0627) 10450 }, 10451 { 10452 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10453 PCI_VENDOR_ID_LENOVO, 0x0628) 10454 }, 10455 { 10456 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10457 0x1014, 0x0718) 10458 }, 10459 { 10460 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10461 0x1137, 0x02f8) 10462 }, 10463 { 10464 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10465 0x1137, 0x02f9) 10466 }, 10467 { 10468 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10469 0x1137, 0x02fa) 10470 }, 10471 { 10472 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10473 0x1137, 0x02fe) 10474 }, 10475 { 10476 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10477 0x1137, 0x02ff) 10478 }, 10479 { 10480 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10481 0x1137, 0x0300) 10482 }, 10483 { 10484 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10485 0x1ded, 0x3301) 10486 }, 10487 { 10488 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10489 0x1ff9, 0x0045) 10490 }, 10491 { 10492 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10493 0x1ff9, 0x0046) 10494 }, 10495 { 10496 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10497 0x1ff9, 0x0047) 10498 }, 10499 { 10500 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10501 0x1ff9, 0x0048) 10502 }, 10503 { 10504 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10505 0x1ff9, 0x004a) 10506 }, 10507 { 10508 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10509 0x1ff9, 0x004b) 10510 }, 10511 { 10512 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10513 0x1ff9, 0x004c) 10514 }, 10515 { 10516 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10517 0x1ff9, 0x004f) 10518 }, 10519 { 10520 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10521 0x1ff9, 0x0051) 10522 }, 10523 { 10524 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10525 0x1ff9, 0x0052) 10526 }, 10527 { 10528 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10529 0x1ff9, 0x0053) 10530 }, 10531 { 10532 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10533 0x1ff9, 0x0054) 10534 }, 10535 { 10536 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10537 0x1ff9, 0x006b) 10538 }, 10539 { 10540 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10541 0x1ff9, 0x006c) 10542 }, 10543 { 10544 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10545 0x1ff9, 0x006d) 10546 }, 10547 { 10548 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10549 0x1ff9, 0x006f) 10550 }, 10551 { 10552 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10553 0x1ff9, 0x0070) 10554 }, 10555 { 10556 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10557 0x1ff9, 0x0071) 10558 }, 10559 { 10560 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10561 0x1ff9, 0x0072) 10562 }, 10563 { 10564 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10565 0x1ff9, 0x0086) 10566 }, 10567 { 10568 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10569 0x1ff9, 0x0087) 10570 }, 10571 { 10572 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10573 0x1ff9, 0x0088) 10574 }, 10575 { 10576 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10577 0x1ff9, 0x0089) 10578 }, 10579 { 10580 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10581 0x1e93, 0x1000) 10582 }, 10583 { 10584 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10585 0x1e93, 0x1001) 10586 }, 10587 { 10588 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10589 0x1e93, 0x1002) 10590 }, 10591 { 10592 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10593 0x1e93, 0x1005) 10594 }, 10595 { 10596 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10597 0x1f51, 0x1001) 10598 }, 10599 { 10600 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10601 0x1f51, 0x1002) 10602 }, 10603 { 10604 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10605 0x1f51, 0x1003) 10606 }, 10607 { 10608 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10609 0x1f51, 0x1004) 10610 }, 10611 { 10612 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10613 0x1f51, 0x1005) 10614 }, 10615 { 10616 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10617 0x1f51, 0x1006) 10618 }, 10619 { 10620 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10621 0x1f51, 0x1007) 10622 }, 10623 { 10624 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10625 0x1f51, 0x1008) 10626 }, 10627 { 10628 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10629 0x1f51, 0x1009) 10630 }, 10631 { 10632 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10633 0x1f51, 0x100a) 10634 }, 10635 { 10636 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10637 0x1f51, 0x100b) 10638 }, 10639 { 10640 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10641 0x1f51, 0x100e) 10642 }, 10643 { 10644 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10645 0x1f51, 0x100f) 10646 }, 10647 { 10648 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10649 0x1f51, 0x1010) 10650 }, 10651 { 10652 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10653 0x1f51, 0x1011) 10654 }, 10655 { 10656 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10657 0x1f51, 0x1043) 10658 }, 10659 { 10660 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10661 0x1f51, 0x1044) 10662 }, 10663 { 10664 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10665 0x1f51, 0x1045) 10666 }, 10667 { 10668 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10669 0x1ff9, 0x00a3) 10670 }, 10671 { 10672 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10673 PCI_ANY_ID, PCI_ANY_ID) 10674 }, 10675 { 0 } 10676}; 10677 10678MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); 10679 10680static struct pci_driver pqi_pci_driver = { 10681 .name = DRIVER_NAME_SHORT, 10682 .id_table = pqi_pci_id_table, 10683 .probe = pqi_pci_probe, 10684 .remove = pqi_pci_remove, 10685 .shutdown = pqi_shutdown, 10686#if defined(CONFIG_PM) 10687 .driver = { 10688 .pm = &pqi_pm_ops 10689 }, 10690#endif 10691}; 10692 10693static int __init pqi_init(void) 10694{ 10695 int rc; 10696 10697 pr_info(DRIVER_NAME "\n"); 10698 pqi_verify_structures(); 10699 sis_verify_structures(); 10700 10701 pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions); 10702 if (!pqi_sas_transport_template) 10703 return -ENODEV; 10704 10705 pqi_process_module_params(); 10706 10707 rc = pci_register_driver(&pqi_pci_driver); 10708 if (rc) 10709 sas_release_transport(pqi_sas_transport_template); 10710 10711 return rc; 10712} 10713 10714static void __exit pqi_cleanup(void) 10715{ 10716 pci_unregister_driver(&pqi_pci_driver); 10717 sas_release_transport(pqi_sas_transport_template); 10718} 10719 10720module_init(pqi_init); 10721module_exit(pqi_cleanup); 10722 10723static void pqi_verify_structures(void) 10724{ 10725 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10726 sis_host_to_ctrl_doorbell) != 0x20); 10727 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10728 sis_interrupt_mask) != 0x34); 10729 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10730 sis_ctrl_to_host_doorbell) != 0x9c); 10731 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10732 sis_ctrl_to_host_doorbell_clear) != 0xa0); 10733 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10734 sis_driver_scratch) != 0xb0); 10735 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10736 sis_product_identifier) != 0xb4); 10737 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10738 sis_firmware_status) != 0xbc); 10739 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10740 sis_ctrl_shutdown_reason_code) != 0xcc); 10741 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10742 sis_mailbox) != 0x1000); 10743 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10744 pqi_registers) != 0x4000); 10745 10746 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10747 iu_type) != 0x0); 10748 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10749 iu_length) != 0x2); 10750 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10751 response_queue_id) != 0x4); 10752 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10753 driver_flags) != 0x6); 10754 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); 10755 10756 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10757 status) != 0x0); 10758 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10759 service_response) != 0x1); 10760 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10761 data_present) != 0x2); 10762 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10763 reserved) != 0x3); 10764 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10765 residual_count) != 0x4); 10766 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10767 data_length) != 0x8); 10768 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10769 reserved1) != 0xa); 10770 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10771 data) != 0xc); 10772 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); 10773 10774 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10775 data_in_result) != 0x0); 10776 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10777 data_out_result) != 0x1); 10778 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10779 reserved) != 0x2); 10780 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10781 status) != 0x5); 10782 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10783 status_qualifier) != 0x6); 10784 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10785 sense_data_length) != 0x8); 10786 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10787 response_data_length) != 0xa); 10788 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10789 data_in_transferred) != 0xc); 10790 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10791 data_out_transferred) != 0x10); 10792 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10793 data) != 0x14); 10794 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); 10795 10796 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10797 signature) != 0x0); 10798 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10799 function_and_status_code) != 0x8); 10800 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10801 max_admin_iq_elements) != 0x10); 10802 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10803 max_admin_oq_elements) != 0x11); 10804 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10805 admin_iq_element_length) != 0x12); 10806 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10807 admin_oq_element_length) != 0x13); 10808 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10809 max_reset_timeout) != 0x14); 10810 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10811 legacy_intx_status) != 0x18); 10812 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10813 legacy_intx_mask_set) != 0x1c); 10814 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10815 legacy_intx_mask_clear) != 0x20); 10816 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10817 device_status) != 0x40); 10818 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10819 admin_iq_pi_offset) != 0x48); 10820 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10821 admin_oq_ci_offset) != 0x50); 10822 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10823 admin_iq_element_array_addr) != 0x58); 10824 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10825 admin_oq_element_array_addr) != 0x60); 10826 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10827 admin_iq_ci_addr) != 0x68); 10828 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10829 admin_oq_pi_addr) != 0x70); 10830 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10831 admin_iq_num_elements) != 0x78); 10832 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10833 admin_oq_num_elements) != 0x79); 10834 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10835 admin_queue_int_msg_num) != 0x7a); 10836 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10837 device_error) != 0x80); 10838 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10839 error_details) != 0x88); 10840 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10841 device_reset) != 0x90); 10842 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10843 power_action) != 0x94); 10844 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); 10845 10846 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10847 header.iu_type) != 0); 10848 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10849 header.iu_length) != 2); 10850 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10851 header.driver_flags) != 6); 10852 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10853 request_id) != 8); 10854 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10855 function_code) != 10); 10856 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10857 data.report_device_capability.buffer_length) != 44); 10858 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10859 data.report_device_capability.sg_descriptor) != 48); 10860 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10861 data.create_operational_iq.queue_id) != 12); 10862 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10863 data.create_operational_iq.element_array_addr) != 16); 10864 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10865 data.create_operational_iq.ci_addr) != 24); 10866 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10867 data.create_operational_iq.num_elements) != 32); 10868 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10869 data.create_operational_iq.element_length) != 34); 10870 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10871 data.create_operational_iq.queue_protocol) != 36); 10872 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10873 data.create_operational_oq.queue_id) != 12); 10874 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10875 data.create_operational_oq.element_array_addr) != 16); 10876 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10877 data.create_operational_oq.pi_addr) != 24); 10878 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10879 data.create_operational_oq.num_elements) != 32); 10880 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10881 data.create_operational_oq.element_length) != 34); 10882 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10883 data.create_operational_oq.queue_protocol) != 36); 10884 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10885 data.create_operational_oq.int_msg_num) != 40); 10886 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10887 data.create_operational_oq.coalescing_count) != 42); 10888 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10889 data.create_operational_oq.min_coalescing_time) != 44); 10890 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10891 data.create_operational_oq.max_coalescing_time) != 48); 10892 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10893 data.delete_operational_queue.queue_id) != 12); 10894 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); 10895 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10896 data.create_operational_iq) != 64 - 11); 10897 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10898 data.create_operational_oq) != 64 - 11); 10899 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10900 data.delete_operational_queue) != 64 - 11); 10901 10902 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10903 header.iu_type) != 0); 10904 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10905 header.iu_length) != 2); 10906 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10907 header.driver_flags) != 6); 10908 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10909 request_id) != 8); 10910 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10911 function_code) != 10); 10912 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10913 status) != 11); 10914 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10915 data.create_operational_iq.status_descriptor) != 12); 10916 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10917 data.create_operational_iq.iq_pi_offset) != 16); 10918 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10919 data.create_operational_oq.status_descriptor) != 12); 10920 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10921 data.create_operational_oq.oq_ci_offset) != 16); 10922 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); 10923 10924 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10925 header.iu_type) != 0); 10926 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10927 header.iu_length) != 2); 10928 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10929 header.response_queue_id) != 4); 10930 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10931 header.driver_flags) != 6); 10932 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10933 request_id) != 8); 10934 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10935 nexus_id) != 10); 10936 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10937 buffer_length) != 12); 10938 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10939 lun_number) != 16); 10940 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10941 protocol_specific) != 24); 10942 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10943 error_index) != 27); 10944 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10945 cdb) != 32); 10946 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10947 timeout) != 60); 10948 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10949 sg_descriptors) != 64); 10950 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != 10951 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 10952 10953 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10954 header.iu_type) != 0); 10955 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10956 header.iu_length) != 2); 10957 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10958 header.response_queue_id) != 4); 10959 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10960 header.driver_flags) != 6); 10961 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10962 request_id) != 8); 10963 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10964 nexus_id) != 12); 10965 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10966 buffer_length) != 16); 10967 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10968 data_encryption_key_index) != 22); 10969 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10970 encrypt_tweak_lower) != 24); 10971 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10972 encrypt_tweak_upper) != 28); 10973 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10974 cdb) != 32); 10975 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10976 error_index) != 48); 10977 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10978 num_sg_descriptors) != 50); 10979 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10980 cdb_length) != 51); 10981 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10982 lun_number) != 52); 10983 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10984 sg_descriptors) != 64); 10985 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != 10986 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 10987 10988 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10989 header.iu_type) != 0); 10990 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10991 header.iu_length) != 2); 10992 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10993 request_id) != 8); 10994 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10995 error_index) != 10); 10996 10997 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10998 header.iu_type) != 0); 10999 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11000 header.iu_length) != 2); 11001 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11002 header.response_queue_id) != 4); 11003 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11004 request_id) != 8); 11005 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11006 data.report_event_configuration.buffer_length) != 12); 11007 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11008 data.report_event_configuration.sg_descriptors) != 16); 11009 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11010 data.set_event_configuration.global_event_oq_id) != 10); 11011 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11012 data.set_event_configuration.buffer_length) != 12); 11013 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 11014 data.set_event_configuration.sg_descriptors) != 16); 11015 11016 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 11017 max_inbound_iu_length) != 6); 11018 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 11019 max_outbound_iu_length) != 14); 11020 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); 11021 11022 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11023 data_length) != 0); 11024 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11025 iq_arbitration_priority_support_bitmask) != 8); 11026 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11027 maximum_aw_a) != 9); 11028 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11029 maximum_aw_b) != 10); 11030 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11031 maximum_aw_c) != 11); 11032 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11033 max_inbound_queues) != 16); 11034 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11035 max_elements_per_iq) != 18); 11036 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11037 max_iq_element_length) != 24); 11038 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11039 min_iq_element_length) != 26); 11040 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11041 max_outbound_queues) != 30); 11042 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11043 max_elements_per_oq) != 32); 11044 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11045 intr_coalescing_time_granularity) != 34); 11046 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11047 max_oq_element_length) != 36); 11048 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11049 min_oq_element_length) != 38); 11050 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 11051 iu_layer_descriptors) != 64); 11052 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); 11053 11054 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 11055 event_type) != 0); 11056 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 11057 oq_id) != 2); 11058 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); 11059 11060 BUILD_BUG_ON(offsetof(struct pqi_event_config, 11061 num_event_descriptors) != 2); 11062 BUILD_BUG_ON(offsetof(struct pqi_event_config, 11063 descriptors) != 4); 11064 11065 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS != 11066 ARRAY_SIZE(pqi_supported_event_types)); 11067 11068 BUILD_BUG_ON(offsetof(struct pqi_event_response, 11069 header.iu_type) != 0); 11070 BUILD_BUG_ON(offsetof(struct pqi_event_response, 11071 header.iu_length) != 2); 11072 BUILD_BUG_ON(offsetof(struct pqi_event_response, 11073 event_type) != 8); 11074 BUILD_BUG_ON(offsetof(struct pqi_event_response, 11075 event_id) != 10); 11076 BUILD_BUG_ON(offsetof(struct pqi_event_response, 11077 additional_event_id) != 12); 11078 BUILD_BUG_ON(offsetof(struct pqi_event_response, 11079 data) != 16); 11080 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); 11081 11082 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 11083 header.iu_type) != 0); 11084 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 11085 header.iu_length) != 2); 11086 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 11087 event_type) != 8); 11088 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 11089 event_id) != 10); 11090 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 11091 additional_event_id) != 12); 11092 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); 11093 11094 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11095 header.iu_type) != 0); 11096 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11097 header.iu_length) != 2); 11098 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11099 request_id) != 8); 11100 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11101 nexus_id) != 10); 11102 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11103 timeout) != 14); 11104 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11105 lun_number) != 16); 11106 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11107 protocol_specific) != 24); 11108 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11109 outbound_queue_id_to_manage) != 26); 11110 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11111 request_id_to_manage) != 28); 11112 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 11113 task_management_function) != 30); 11114 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); 11115 11116 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 11117 header.iu_type) != 0); 11118 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 11119 header.iu_length) != 2); 11120 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 11121 request_id) != 8); 11122 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 11123 nexus_id) != 10); 11124 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 11125 additional_response_info) != 12); 11126 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 11127 response_code) != 15); 11128 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); 11129 11130 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11131 configured_logical_drive_count) != 0); 11132 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11133 configuration_signature) != 1); 11134 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11135 firmware_version_short) != 5); 11136 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11137 extended_logical_unit_count) != 154); 11138 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11139 firmware_build_number) != 190); 11140 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11141 vendor_id) != 200); 11142 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11143 product_id) != 208); 11144 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11145 extra_controller_flags) != 286); 11146 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11147 controller_mode) != 292); 11148 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11149 spare_part_number) != 293); 11150 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 11151 firmware_version_long) != 325); 11152 11153 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11154 phys_bay_in_box) != 115); 11155 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11156 device_type) != 120); 11157 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11158 redundant_path_present_map) != 1736); 11159 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11160 active_path_number) != 1738); 11161 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11162 alternate_paths_phys_connector) != 1739); 11163 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11164 alternate_paths_phys_box_on_port) != 1755); 11165 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 11166 current_queue_depth_limit) != 1796); 11167 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560); 11168 11169 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_buffer_header) != 4); 11170 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 11171 page_code) != 0); 11172 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 11173 subpage_code) != 1); 11174 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 11175 buffer_length) != 2); 11176 11177 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_page_header) != 4); 11178 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 11179 page_code) != 0); 11180 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 11181 subpage_code) != 1); 11182 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 11183 page_length) != 2); 11184 11185 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_io_page_aio_subpage) 11186 != 18); 11187 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11188 header) != 0); 11189 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11190 firmware_read_support) != 4); 11191 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11192 driver_read_support) != 5); 11193 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11194 firmware_write_support) != 6); 11195 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11196 driver_write_support) != 7); 11197 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11198 max_transfer_encrypted_sas_sata) != 8); 11199 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11200 max_transfer_encrypted_nvme) != 10); 11201 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11202 max_write_raid_5_6) != 12); 11203 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11204 max_write_raid_1_10_2drive) != 14); 11205 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 11206 max_write_raid_1_10_3drive) != 16); 11207 11208 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); 11209 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); 11210 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % 11211 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 11212 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % 11213 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 11214 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); 11215 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % 11216 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 11217 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); 11218 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % 11219 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 11220 11221 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); 11222 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= 11223 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP); 11224}
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