qla_init.c

    1// SPDX-License-Identifier: GPL-2.0-only
    2/*
    3 * QLogic Fibre Channel HBA Driver
    4 * Copyright (c)  2003-2014 QLogic Corporation
    5 */
    6#include "qla_def.h"
    7#include "qla_gbl.h"
    8
    9#include <linux/delay.h>
   10#include <linux/slab.h>
   11#include <linux/vmalloc.h>
   12
   13#include "qla_devtbl.h"
   14
   15#ifdef CONFIG_SPARC
   16#include <asm/prom.h>
   17#endif
   18
   19#include "qla_target.h"
   20
   21/*
   22*  QLogic ISP2x00 Hardware Support Function Prototypes.
   23*/
   24static int qla2x00_isp_firmware(scsi_qla_host_t *);
   25static int qla2x00_setup_chip(scsi_qla_host_t *);
   26static int qla2x00_fw_ready(scsi_qla_host_t *);
   27static int qla2x00_configure_hba(scsi_qla_host_t *);
   28static int qla2x00_configure_loop(scsi_qla_host_t *);
   29static int qla2x00_configure_local_loop(scsi_qla_host_t *);
   30static int qla2x00_configure_fabric(scsi_qla_host_t *);
   31static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
   32static int qla2x00_restart_isp(scsi_qla_host_t *);
   33
   34static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
   35static int qla84xx_init_chip(scsi_qla_host_t *);
   36static int qla25xx_init_queues(struct qla_hw_data *);
   37static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
   38				      struct event_arg *ea);
   39static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
   40    struct event_arg *);
   41static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
   42
   43/* SRB Extensions ---------------------------------------------------------- */
   44
   45void
   46qla2x00_sp_timeout(struct timer_list *t)
   47{
   48	srb_t *sp = timer_container_of(sp, t, u.iocb_cmd.timer);
   49	struct srb_iocb *iocb;
   50	scsi_qla_host_t *vha = sp->vha;
   51
   52	WARN_ON(irqs_disabled());
   53	iocb = &sp->u.iocb_cmd;
   54	iocb->timeout(sp);
   55
   56	/* ref: TMR */
   57	kref_put(&sp->cmd_kref, qla2x00_sp_release);
   58
   59	if (vha && qla2x00_isp_reg_stat(vha->hw)) {
   60		ql_log(ql_log_info, vha, 0x9008,
   61		    "PCI/Register disconnect.\n");
   62		qla_pci_set_eeh_busy(vha);
   63	}
   64}
   65
   66void qla2x00_sp_free(srb_t *sp)
   67{
   68	struct srb_iocb *iocb = &sp->u.iocb_cmd;
   69
   70	timer_delete(&iocb->timer);
   71	qla2x00_rel_sp(sp);
   72}
   73
   74void qla2xxx_rel_done_warning(srb_t *sp, int res)
   75{
   76	WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
   77}
   78
   79void qla2xxx_rel_free_warning(srb_t *sp)
   80{
   81	WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
   82}
   83
   84/* Asynchronous Login/Logout Routines -------------------------------------- */
   85
   86unsigned long
   87qla2x00_get_async_timeout(struct scsi_qla_host *vha)
   88{
   89	unsigned long tmo;
   90	struct qla_hw_data *ha = vha->hw;
   91
   92	/* Firmware should use switch negotiated r_a_tov for timeout. */
   93	tmo = ha->r_a_tov / 10 * 2;
   94	if (IS_QLAFX00(ha)) {
   95		tmo = FX00_DEF_RATOV * 2;
   96	} else if (!IS_FWI2_CAPABLE(ha)) {
   97		/*
   98		 * Except for earlier ISPs where the timeout is seeded from the
   99		 * initialization control block.
  100		 */
  101		tmo = ha->login_timeout;
  102	}
  103	return tmo;
  104}
  105
  106static void qla24xx_abort_iocb_timeout(void *data)
  107{
  108	srb_t *sp = data;
  109	struct srb_iocb *abt = &sp->u.iocb_cmd;
  110	struct qla_qpair *qpair = sp->qpair;
  111	u32 handle;
  112	unsigned long flags;
  113	int sp_found = 0, cmdsp_found = 0;
  114
  115	if (sp->cmd_sp)
  116		ql_dbg(ql_dbg_async, sp->vha, 0x507c,
  117		    "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
  118		    sp->cmd_sp->handle, sp->cmd_sp->type,
  119		    sp->handle, sp->type);
  120	else
  121		ql_dbg(ql_dbg_async, sp->vha, 0x507c,
  122		    "Abort timeout 2 - hdl=%x, type=%x\n",
  123		    sp->handle, sp->type);
  124
  125	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
  126	for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
  127		if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
  128		    sp->cmd_sp)) {
  129			qpair->req->outstanding_cmds[handle] = NULL;
  130			cmdsp_found = 1;
  131			qla_put_fw_resources(qpair, &sp->cmd_sp->iores);
  132		}
  133
  134		/* removing the abort */
  135		if (qpair->req->outstanding_cmds[handle] == sp) {
  136			qpair->req->outstanding_cmds[handle] = NULL;
  137			sp_found = 1;
  138			qla_put_fw_resources(qpair, &sp->iores);
  139			break;
  140		}
  141	}
  142	spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
  143
  144	if (cmdsp_found && sp->cmd_sp) {
  145		/*
  146		 * This done function should take care of
  147		 * original command ref: INIT
  148		 */
  149		sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
  150	}
  151
  152	if (sp_found) {
  153		abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
  154		sp->done(sp, QLA_OS_TIMER_EXPIRED);
  155	}
  156}
  157
  158static void qla24xx_abort_sp_done(srb_t *sp, int res)
  159{
  160	struct srb_iocb *abt = &sp->u.iocb_cmd;
  161	srb_t *orig_sp = sp->cmd_sp;
  162
  163	if (orig_sp)
  164		qla_wait_nvme_release_cmd_kref(orig_sp);
  165
  166	if (sp->flags & SRB_WAKEUP_ON_COMP)
  167		complete(&abt->u.abt.comp);
  168	else
  169		/* ref: INIT */
  170		kref_put(&sp->cmd_kref, qla2x00_sp_release);
  171}
  172
  173int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
  174{
  175	scsi_qla_host_t *vha = cmd_sp->vha;
  176	struct srb_iocb *abt_iocb;
  177	srb_t *sp;
  178	int rval = QLA_FUNCTION_FAILED;
  179
  180	/* ref: INIT for ABTS command */
  181	sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
  182				  GFP_ATOMIC);
  183	if (!sp)
  184		return QLA_MEMORY_ALLOC_FAILED;
  185
  186	qla_vha_mark_busy(vha);
  187	abt_iocb = &sp->u.iocb_cmd;
  188	sp->type = SRB_ABT_CMD;
  189	sp->name = "abort";
  190	sp->qpair = cmd_sp->qpair;
  191	sp->cmd_sp = cmd_sp;
  192	if (wait)
  193		sp->flags = SRB_WAKEUP_ON_COMP;
  194
  195	init_completion(&abt_iocb->u.abt.comp);
  196	/* FW can send 2 x ABTS's timeout/20s */
  197	qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done);
  198	sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout;
  199
  200	abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
  201	abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
  202
  203	ql_dbg(ql_dbg_async, vha, 0x507c,
  204	       "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
  205	       cmd_sp->type);
  206
  207	rval = qla2x00_start_sp(sp);
  208	if (rval != QLA_SUCCESS) {
  209		/* ref: INIT */
  210		kref_put(&sp->cmd_kref, qla2x00_sp_release);
  211		return rval;
  212	}
  213
  214	if (wait) {
  215		wait_for_completion(&abt_iocb->u.abt.comp);
  216		rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
  217			QLA_SUCCESS : QLA_ERR_FROM_FW;
  218		/* ref: INIT */
  219		kref_put(&sp->cmd_kref, qla2x00_sp_release);
  220	}
  221
  222	return rval;
  223}
  224
  225void
  226qla2x00_async_iocb_timeout(void *data)
  227{
  228	srb_t *sp = data;
  229	fc_port_t *fcport = sp->fcport;
  230	struct srb_iocb *lio = &sp->u.iocb_cmd;
  231	int rc, h;
  232	unsigned long flags;
  233
  234	if (fcport) {
  235		ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
  236		    "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
  237		    sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
  238
  239		fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  240	} else {
  241		pr_info("Async-%s timeout - hdl=%x.\n",
  242		    sp->name, sp->handle);
  243	}
  244
  245	switch (sp->type) {
  246	case SRB_LOGIN_CMD:
  247		rc = qla24xx_async_abort_cmd(sp, false);
  248		if (rc) {
  249			/* Retry as needed. */
  250			lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  251			lio->u.logio.data[1] =
  252				lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  253				QLA_LOGIO_LOGIN_RETRIED : 0;
  254			spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
  255			for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
  256			    h++) {
  257				if (sp->qpair->req->outstanding_cmds[h] ==
  258				    sp) {
  259					sp->qpair->req->outstanding_cmds[h] =
  260					    NULL;
  261					break;
  262				}
  263			}
  264			spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
  265			sp->done(sp, QLA_FUNCTION_TIMEOUT);
  266		}
  267		break;
  268	case SRB_LOGOUT_CMD:
  269	case SRB_CT_PTHRU_CMD:
  270	case SRB_MB_IOCB:
  271	case SRB_NACK_PLOGI:
  272	case SRB_NACK_PRLI:
  273	case SRB_NACK_LOGO:
  274	case SRB_CTRL_VP:
  275	default:
  276		rc = qla24xx_async_abort_cmd(sp, false);
  277		if (rc) {
  278			spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
  279			for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
  280			    h++) {
  281				if (sp->qpair->req->outstanding_cmds[h] ==
  282				    sp) {
  283					sp->qpair->req->outstanding_cmds[h] =
  284					    NULL;
  285					break;
  286				}
  287			}
  288			spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
  289			sp->done(sp, QLA_FUNCTION_TIMEOUT);
  290		}
  291		break;
  292	}
  293}
  294
  295static void qla2x00_async_login_sp_done(srb_t *sp, int res)
  296{
  297	struct scsi_qla_host *vha = sp->vha;
  298	struct srb_iocb *lio = &sp->u.iocb_cmd;
  299	struct event_arg ea;
  300
  301	ql_dbg(ql_dbg_disc, vha, 0x20dd,
  302	    "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
  303
  304	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  305
  306	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
  307		memset(&ea, 0, sizeof(ea));
  308		ea.fcport = sp->fcport;
  309		ea.data[0] = lio->u.logio.data[0];
  310		ea.data[1] = lio->u.logio.data[1];
  311		ea.iop[0] = lio->u.logio.iop[0];
  312		ea.iop[1] = lio->u.logio.iop[1];
  313		ea.sp = sp;
  314		if (res)
  315			ea.data[0] = MBS_COMMAND_ERROR;
  316		qla24xx_handle_plogi_done_event(vha, &ea);
  317	}
  318
  319	/* ref: INIT */
  320	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  321}
  322
  323int
  324qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  325    uint16_t *data)
  326{
  327	srb_t *sp;
  328	struct srb_iocb *lio;
  329	int rval = QLA_FUNCTION_FAILED;
  330
  331	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
  332	    fcport->loop_id == FC_NO_LOOP_ID) {
  333		ql_log(ql_log_warn, vha, 0xffff,
  334		    "%s: %8phC - not sending command.\n",
  335		    __func__, fcport->port_name);
  336		return rval;
  337	}
  338
  339	/* ref: INIT */
  340	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  341	if (!sp)
  342		goto done;
  343
  344	qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
  345	fcport->flags |= FCF_ASYNC_SENT;
  346	fcport->logout_completed = 0;
  347
  348	sp->type = SRB_LOGIN_CMD;
  349	sp->name = "login";
  350	sp->gen1 = fcport->rscn_gen;
  351	sp->gen2 = fcport->login_gen;
  352	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
  353			      qla2x00_async_login_sp_done);
  354
  355	lio = &sp->u.iocb_cmd;
  356	if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
  357		lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
  358	} else {
  359		if (vha->hw->flags.edif_enabled &&
  360		    DBELL_ACTIVE(vha)) {
  361			lio->u.logio.flags |=
  362				(SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
  363		} else {
  364			lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  365		}
  366	}
  367
  368	if (NVME_TARGET(vha->hw, fcport))
  369		lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
  370
  371	rval = qla2x00_start_sp(sp);
  372
  373	ql_dbg(ql_dbg_disc, vha, 0x2072,
  374	       "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
  375	       fcport->port_name, sp->handle, fcport->loop_id,
  376	       fcport->d_id.b24, fcport->login_retry,
  377	       lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : "");
  378
  379	if (rval != QLA_SUCCESS) {
  380		fcport->flags |= FCF_LOGIN_NEEDED;
  381		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  382		goto done_free_sp;
  383	}
  384
  385	return rval;
  386
  387done_free_sp:
  388	/* ref: INIT */
  389	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  390	fcport->flags &= ~FCF_ASYNC_SENT;
  391done:
  392	fcport->flags &= ~FCF_ASYNC_ACTIVE;
  393
  394	/*
  395	 * async login failed. Could be due to iocb/exchange resource
  396	 * being low. Set state DELETED for re-login process to start again.
  397	 */
  398	qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
  399	return rval;
  400}
  401
  402static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
  403{
  404	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  405	sp->fcport->login_gen++;
  406	qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
  407	/* ref: INIT */
  408	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  409}
  410
  411int
  412qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  413{
  414	srb_t *sp;
  415	int rval = QLA_FUNCTION_FAILED;
  416
  417	fcport->flags |= FCF_ASYNC_SENT;
  418	/* ref: INIT */
  419	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  420	if (!sp)
  421		goto done;
  422
  423	sp->type = SRB_LOGOUT_CMD;
  424	sp->name = "logout";
  425	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
  426			      qla2x00_async_logout_sp_done);
  427
  428	ql_dbg(ql_dbg_disc, vha, 0x2070,
  429	    "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
  430	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
  431		fcport->d_id.b.area, fcport->d_id.b.al_pa,
  432		fcport->port_name, fcport->explicit_logout);
  433
  434	rval = qla2x00_start_sp(sp);
  435	if (rval != QLA_SUCCESS)
  436		goto done_free_sp;
  437	return rval;
  438
  439done_free_sp:
  440	/* ref: INIT */
  441	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  442done:
  443	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  444	return rval;
  445}
  446
  447void
  448qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  449    uint16_t *data)
  450{
  451	fcport->flags &= ~FCF_ASYNC_ACTIVE;
  452	/* Don't re-login in target mode */
  453	if (!fcport->tgt_session)
  454		qla2x00_mark_device_lost(vha, fcport, 1);
  455	qlt_logo_completion_handler(fcport, data[0]);
  456}
  457
  458static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
  459{
  460	struct srb_iocb *lio = &sp->u.iocb_cmd;
  461	struct scsi_qla_host *vha = sp->vha;
  462
  463	sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
  464	if (!test_bit(UNLOADING, &vha->dpc_flags))
  465		qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
  466		    lio->u.logio.data);
  467	/* ref: INIT */
  468	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  469}
  470
  471int
  472qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
  473{
  474	srb_t *sp;
  475	int rval;
  476
  477	rval = QLA_FUNCTION_FAILED;
  478	/* ref: INIT */
  479	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  480	if (!sp)
  481		goto done;
  482
  483	sp->type = SRB_PRLO_CMD;
  484	sp->name = "prlo";
  485	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
  486			      qla2x00_async_prlo_sp_done);
  487
  488	ql_dbg(ql_dbg_disc, vha, 0x2070,
  489	    "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
  490	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
  491	    fcport->d_id.b.area, fcport->d_id.b.al_pa);
  492
  493	rval = qla2x00_start_sp(sp);
  494	if (rval != QLA_SUCCESS)
  495		goto done_free_sp;
  496
  497	return rval;
  498
  499done_free_sp:
  500	/* ref: INIT */
  501	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  502done:
  503	fcport->flags &= ~FCF_ASYNC_ACTIVE;
  504	return rval;
  505}
  506
  507static
  508void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
  509{
  510	struct fc_port *fcport = ea->fcport;
  511	unsigned long flags;
  512
  513	ql_dbg(ql_dbg_disc, vha, 0x20d2,
  514	    "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
  515	    __func__, fcport->port_name, fcport->disc_state,
  516	    fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
  517	    fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
  518
  519	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
  520		  ea->data[0]);
  521
  522	if (ea->data[0] != MBS_COMMAND_COMPLETE) {
  523		ql_dbg(ql_dbg_disc, vha, 0x2066,
  524		    "%s %8phC: adisc fail: post delete\n",
  525		    __func__, ea->fcport->port_name);
  526
  527		spin_lock_irqsave(&vha->work_lock, flags);
  528		/* deleted = 0 & logout_on_delete = force fw cleanup */
  529		if (fcport->deleted == QLA_SESS_DELETED)
  530			fcport->deleted = 0;
  531
  532		fcport->logout_on_delete = 1;
  533		spin_unlock_irqrestore(&vha->work_lock, flags);
  534
  535		qlt_schedule_sess_for_deletion(ea->fcport);
  536		return;
  537	}
  538
  539	if (ea->fcport->disc_state == DSC_DELETE_PEND)
  540		return;
  541
  542	if (ea->sp->gen2 != ea->fcport->login_gen) {
  543		/* target side must have changed it. */
  544		ql_dbg(ql_dbg_disc, vha, 0x20d3,
  545		    "%s %8phC generation changed\n",
  546		    __func__, ea->fcport->port_name);
  547		return;
  548	} else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
  549		qla_rscn_replay(fcport);
  550		qlt_schedule_sess_for_deletion(fcport);
  551		return;
  552	}
  553
  554	__qla24xx_handle_gpdb_event(vha, ea);
  555}
  556
  557static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
  558{
  559	struct qla_work_evt *e;
  560
  561	e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
  562	if (!e)
  563		return QLA_FUNCTION_FAILED;
  564
  565	e->u.fcport.fcport = fcport;
  566	fcport->flags |= FCF_ASYNC_ACTIVE;
  567	qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
  568	return qla2x00_post_work(vha, e);
  569}
  570
  571static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
  572{
  573	struct scsi_qla_host *vha = sp->vha;
  574	struct event_arg ea;
  575	struct srb_iocb *lio = &sp->u.iocb_cmd;
  576
  577	ql_dbg(ql_dbg_disc, vha, 0x2066,
  578	    "Async done-%s res %x %8phC\n",
  579	    sp->name, res, sp->fcport->port_name);
  580
  581	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  582
  583	memset(&ea, 0, sizeof(ea));
  584	ea.rc = res;
  585	ea.data[0] = lio->u.logio.data[0];
  586	ea.data[1] = lio->u.logio.data[1];
  587	ea.iop[0] = lio->u.logio.iop[0];
  588	ea.iop[1] = lio->u.logio.iop[1];
  589	ea.fcport = sp->fcport;
  590	ea.sp = sp;
  591	if (res)
  592		ea.data[0] = MBS_COMMAND_ERROR;
  593
  594	qla24xx_handle_adisc_event(vha, &ea);
  595	/* ref: INIT */
  596	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  597}
  598
  599int
  600qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  601    uint16_t *data)
  602{
  603	srb_t *sp;
  604	struct srb_iocb *lio;
  605	int rval = QLA_FUNCTION_FAILED;
  606
  607	if (IS_SESSION_DELETED(fcport)) {
  608		ql_log(ql_log_warn, vha, 0xffff,
  609		       "%s: %8phC is being delete - not sending command.\n",
  610		       __func__, fcport->port_name);
  611		fcport->flags &= ~FCF_ASYNC_ACTIVE;
  612		return rval;
  613	}
  614
  615	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
  616		return rval;
  617
  618	fcport->flags |= FCF_ASYNC_SENT;
  619	/* ref: INIT */
  620	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  621	if (!sp)
  622		goto done;
  623
  624	sp->type = SRB_ADISC_CMD;
  625	sp->name = "adisc";
  626	sp->gen1 = fcport->rscn_gen;
  627	sp->gen2 = fcport->login_gen;
  628	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
  629			      qla2x00_async_adisc_sp_done);
  630
  631	if (data[1] & QLA_LOGIO_LOGIN_RETRIED) {
  632		lio = &sp->u.iocb_cmd;
  633		lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  634	}
  635
  636	ql_dbg(ql_dbg_disc, vha, 0x206f,
  637	    "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
  638	    sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
  639
  640	rval = qla2x00_start_sp(sp);
  641	if (rval != QLA_SUCCESS)
  642		goto done_free_sp;
  643
  644	return rval;
  645
  646done_free_sp:
  647	/* ref: INIT */
  648	kref_put(&sp->cmd_kref, qla2x00_sp_release);
  649done:
  650	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
  651	qla2x00_post_async_adisc_work(vha, fcport, data);
  652	return rval;
  653}
  654
  655static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
  656{
  657	struct qla_hw_data *ha = vha->hw;
  658
  659	if (IS_FWI2_CAPABLE(ha))
  660		return loop_id > NPH_LAST_HANDLE;
  661
  662	return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
  663		loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
  664}
  665
  666/**
  667 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
  668 * @vha: adapter state pointer.
  669 * @dev: port structure pointer.
  670 *
  671 * Returns:
  672 *	qla2x00 local function return status code.
  673 *
  674 * Context:
  675 *	Kernel context.
  676 */
  677static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  678{
  679	int	rval;
  680	struct qla_hw_data *ha = vha->hw;
  681	unsigned long flags = 0;
  682
  683	rval = QLA_SUCCESS;
  684
  685	spin_lock_irqsave(&ha->vport_slock, flags);
  686
  687	dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
  688	if (dev->loop_id >= LOOPID_MAP_SIZE ||
  689	    qla2x00_is_reserved_id(vha, dev->loop_id)) {
  690		dev->loop_id = FC_NO_LOOP_ID;
  691		rval = QLA_FUNCTION_FAILED;
  692	} else {
  693		set_bit(dev->loop_id, ha->loop_id_map);
  694	}
  695	spin_unlock_irqrestore(&ha->vport_slock, flags);
  696
  697	if (rval == QLA_SUCCESS)
  698		ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
  699		       "Assigning new loopid=%x, portid=%x.\n",
  700		       dev->loop_id, dev->d_id.b24);
  701	else
  702		ql_log(ql_log_warn, dev->vha, 0x2087,
  703		       "No loop_id's available, portid=%x.\n",
  704		       dev->d_id.b24);
  705
  706	return rval;
  707}
  708
  709void qla2x00_clear_loop_id(fc_port_t *fcport)
  710{
  711	struct qla_hw_data *ha = fcport->vha->hw;
  712
  713	if (fcport->loop_id == FC_NO_LOOP_ID ||
  714	    qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
  715		return;
  716
  717	clear_bit(fcport->loop_id, ha->loop_id_map);
  718	fcport->loop_id = FC_NO_LOOP_ID;
  719}
  720
  721static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
  722	struct event_arg *ea)
  723{
  724	fc_port_t *fcport, *conflict_fcport;
  725	struct get_name_list_extended *e;
  726	u16 i, n, found = 0, loop_id;
  727	port_id_t id;
  728	u64 wwn;
  729	u16 data[2];
  730	u8 current_login_state, nvme_cls;
  731
  732	fcport = ea->fcport;
  733	ql_dbg(ql_dbg_disc, vha, 0xffff,
  734	    "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
  735	    __func__, fcport->port_name, fcport->disc_state,
  736	    fcport->fw_login_state, ea->rc,
  737	    fcport->login_gen, fcport->last_login_gen,
  738	    fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
  739
  740	if (fcport->disc_state == DSC_DELETE_PEND)
  741		return;
  742
  743	if (ea->rc) { /* rval */
  744		if (fcport->login_retry == 0) {
  745			ql_dbg(ql_dbg_disc, vha, 0x20de,
  746			    "GNL failed Port login retry %8phN, retry cnt=%d.\n",
  747			    fcport->port_name, fcport->login_retry);
  748		}
  749		return;
  750	}
  751
  752	if (fcport->last_rscn_gen != fcport->rscn_gen) {
  753		qla_rscn_replay(fcport);
  754		qlt_schedule_sess_for_deletion(fcport);
  755		return;
  756	} else if (fcport->last_login_gen != fcport->login_gen) {
  757		ql_dbg(ql_dbg_disc, vha, 0x20e0,
  758		    "%s %8phC login gen changed\n",
  759		    __func__, fcport->port_name);
  760		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  761		return;
  762	}
  763
  764	n = ea->data[0] / sizeof(struct get_name_list_extended);
  765
  766	ql_dbg(ql_dbg_disc, vha, 0x20e1,
  767	    "%s %d %8phC n %d %02x%02x%02x lid %d \n",
  768	    __func__, __LINE__, fcport->port_name, n,
  769	    fcport->d_id.b.domain, fcport->d_id.b.area,
  770	    fcport->d_id.b.al_pa, fcport->loop_id);
  771
  772	for (i = 0; i < n; i++) {
  773		e = &vha->gnl.l[i];
  774		wwn = wwn_to_u64(e->port_name);
  775		id.b.domain = e->port_id[2];
  776		id.b.area = e->port_id[1];
  777		id.b.al_pa = e->port_id[0];
  778		id.b.rsvd_1 = 0;
  779
  780		if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
  781			continue;
  782
  783		if (IS_SW_RESV_ADDR(id))
  784			continue;
  785
  786		found = 1;
  787
  788		loop_id = le16_to_cpu(e->nport_handle);
  789		loop_id = (loop_id & 0x7fff);
  790		nvme_cls = e->current_login_state >> 4;
  791		current_login_state = e->current_login_state & 0xf;
  792
  793		if (PRLI_PHASE(nvme_cls)) {
  794			current_login_state = nvme_cls;
  795			fcport->fc4_type &= ~FS_FC4TYPE_FCP;
  796			fcport->fc4_type |= FS_FC4TYPE_NVME;
  797		} else if (PRLI_PHASE(current_login_state)) {
  798			fcport->fc4_type |= FS_FC4TYPE_FCP;
  799			fcport->fc4_type &= ~FS_FC4TYPE_NVME;
  800		}
  801
  802		ql_dbg(ql_dbg_disc, vha, 0x20e2,
  803		    "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
  804		    __func__, fcport->port_name,
  805		    e->current_login_state, fcport->fw_login_state,
  806		    fcport->fc4_type, id.b24, fcport->d_id.b24,
  807		    loop_id, fcport->loop_id);
  808
  809		switch (fcport->disc_state) {
  810		case DSC_DELETE_PEND:
  811		case DSC_DELETED:
  812			break;
  813		default:
  814			if ((id.b24 != fcport->d_id.b24 &&
  815			    fcport->d_id.b24 &&
  816			    fcport->loop_id != FC_NO_LOOP_ID) ||
  817			    (fcport->loop_id != FC_NO_LOOP_ID &&
  818				fcport->loop_id != loop_id)) {
  819				ql_dbg(ql_dbg_disc, vha, 0x20e3,
  820				    "%s %d %8phC post del sess\n",
  821				    __func__, __LINE__, fcport->port_name);
  822				if (fcport->n2n_flag)
  823					fcport->d_id.b24 = 0;
  824				qlt_schedule_sess_for_deletion(fcport);
  825				return;
  826			}
  827			break;
  828		}
  829
  830		fcport->loop_id = loop_id;
  831		if (fcport->n2n_flag)
  832			fcport->d_id.b24 = id.b24;
  833
  834		wwn = wwn_to_u64(fcport->port_name);
  835		qlt_find_sess_invalidate_other(vha, wwn,
  836			id, loop_id, &conflict_fcport);
  837
  838		if (conflict_fcport) {
  839			/*
  840			 * Another share fcport share the same loop_id &
  841			 * nport id. Conflict fcport needs to finish
  842			 * cleanup before this fcport can proceed to login.
  843			 */
  844			conflict_fcport->conflict = fcport;
  845			fcport->login_pause = 1;
  846		}
  847
  848		switch (vha->hw->current_topology) {
  849		default:
  850			switch (current_login_state) {
  851			case DSC_LS_PRLI_COMP:
  852				ql_dbg(ql_dbg_disc,
  853				    vha, 0x20e4, "%s %d %8phC post gpdb\n",
  854				    __func__, __LINE__, fcport->port_name);
  855
  856				if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
  857					fcport->port_type = FCT_INITIATOR;
  858				else
  859					fcport->port_type = FCT_TARGET;
  860				data[0] = data[1] = 0;
  861				qla2x00_post_async_adisc_work(vha, fcport,
  862				    data);
  863				break;
  864			case DSC_LS_PLOGI_COMP:
  865				if (vha->hw->flags.edif_enabled) {
  866					/* check to see if App support Secure */
  867					qla24xx_post_gpdb_work(vha, fcport, 0);
  868					break;
  869				}
  870				fallthrough;
  871			case DSC_LS_PORT_UNAVAIL:
  872			default:
  873				if (fcport->loop_id == FC_NO_LOOP_ID) {
  874					qla2x00_find_new_loop_id(vha, fcport);
  875					fcport->fw_login_state =
  876					    DSC_LS_PORT_UNAVAIL;
  877				}
  878				ql_dbg(ql_dbg_disc, vha, 0x20e5,
  879				    "%s %d %8phC\n", __func__, __LINE__,
  880				    fcport->port_name);
  881				qla24xx_fcport_handle_login(vha, fcport);
  882				break;
  883			}
  884			break;
  885		case ISP_CFG_N:
  886			fcport->fw_login_state = current_login_state;
  887			fcport->d_id = id;
  888			switch (current_login_state) {
  889			case DSC_LS_PRLI_PEND:
  890				/*
  891				 * In the middle of PRLI. Let it finish.
  892				 * Allow relogin code to recheck state again
  893				 * with GNL. Push disc_state back to DELETED
  894				 * so GNL can go out again
  895				 */
  896				qla2x00_set_fcport_disc_state(fcport,
  897				    DSC_DELETED);
  898				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  899				break;
  900			case DSC_LS_PRLI_COMP:
  901				if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
  902					fcport->port_type = FCT_INITIATOR;
  903				else
  904					fcport->port_type = FCT_TARGET;
  905
  906				data[0] = data[1] = 0;
  907				qla2x00_post_async_adisc_work(vha, fcport,
  908				    data);
  909				break;
  910			case DSC_LS_PLOGI_COMP:
  911				if (vha->hw->flags.edif_enabled &&
  912				    DBELL_ACTIVE(vha)) {
  913					/* check to see if App support secure or not */
  914					qla24xx_post_gpdb_work(vha, fcport, 0);
  915					break;
  916				}
  917				if (fcport_is_bigger(fcport)) {
  918					/* local adapter is smaller */
  919					if (fcport->loop_id != FC_NO_LOOP_ID)
  920						qla2x00_clear_loop_id(fcport);
  921
  922					fcport->loop_id = loop_id;
  923					qla24xx_fcport_handle_login(vha,
  924					    fcport);
  925					break;
  926				}
  927				fallthrough;
  928			default:
  929				if (fcport_is_smaller(fcport)) {
  930					/* local adapter is bigger */
  931					if (fcport->loop_id != FC_NO_LOOP_ID)
  932						qla2x00_clear_loop_id(fcport);
  933
  934					fcport->loop_id = loop_id;
  935					qla24xx_fcport_handle_login(vha,
  936					    fcport);
  937				}
  938				break;
  939			}
  940			break;
  941		} /* switch (ha->current_topology) */
  942	}
  943
  944	if (!found) {
  945		switch (vha->hw->current_topology) {
  946		case ISP_CFG_F:
  947		case ISP_CFG_FL:
  948			for (i = 0; i < n; i++) {
  949				e = &vha->gnl.l[i];
  950				id.b.domain = e->port_id[0];
  951				id.b.area = e->port_id[1];
  952				id.b.al_pa = e->port_id[2];
  953				id.b.rsvd_1 = 0;
  954				loop_id = le16_to_cpu(e->nport_handle);
  955
  956				if (fcport->d_id.b24 == id.b24) {
  957					conflict_fcport =
  958					    qla2x00_find_fcport_by_wwpn(vha,
  959						e->port_name, 0);
  960					if (conflict_fcport) {
  961						ql_dbg(ql_dbg_disc + ql_dbg_verbose,
  962						    vha, 0x20e5,
  963						    "%s %d %8phC post del sess\n",
  964						    __func__, __LINE__,
  965						    conflict_fcport->port_name);
  966						qlt_schedule_sess_for_deletion
  967							(conflict_fcport);
  968					}
  969				}
  970				/*
  971				 * FW already picked this loop id for
  972				 * another fcport
  973				 */
  974				if (fcport->loop_id == loop_id)
  975					fcport->loop_id = FC_NO_LOOP_ID;
  976			}
  977			qla24xx_fcport_handle_login(vha, fcport);
  978			break;
  979		case ISP_CFG_N:
  980			qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
  981			if (time_after_eq(jiffies, fcport->dm_login_expire)) {
  982				if (fcport->n2n_link_reset_cnt < 2) {
  983					fcport->n2n_link_reset_cnt++;
  984					/*
  985					 * remote port is not sending PLOGI.
  986					 * Reset link to kick start his state
  987					 * machine
  988					 */
  989					set_bit(N2N_LINK_RESET,
  990					    &vha->dpc_flags);
  991				} else {
  992					if (fcport->n2n_chip_reset < 1) {
  993						ql_log(ql_log_info, vha, 0x705d,
  994						    "Chip reset to bring laser down");
  995						set_bit(ISP_ABORT_NEEDED,
  996						    &vha->dpc_flags);
  997						fcport->n2n_chip_reset++;
  998					} else {
  999						ql_log(ql_log_info, vha, 0x705d,
 1000						    "Remote port %8ph is not coming back\n",
 1001						    fcport->port_name);
 1002						fcport->scan_state = 0;
 1003					}
 1004				}
 1005				qla2xxx_wake_dpc(vha);
 1006			} else {
 1007				/*
 1008				 * report port suppose to do PLOGI. Give him
 1009				 * more time. FW will catch it.
 1010				 */
 1011				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1012			}
 1013			break;
 1014		case ISP_CFG_NL:
 1015			qla24xx_fcport_handle_login(vha, fcport);
 1016			break;
 1017		default:
 1018			break;
 1019		}
 1020	}
 1021} /* gnl_event */
 1022
 1023static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
 1024{
 1025	struct scsi_qla_host *vha = sp->vha;
 1026	unsigned long flags;
 1027	struct fc_port *fcport = NULL, *tf;
 1028	u16 i, n = 0, loop_id;
 1029	struct event_arg ea;
 1030	struct get_name_list_extended *e;
 1031	u64 wwn;
 1032	struct list_head h;
 1033	bool found = false;
 1034
 1035	ql_dbg(ql_dbg_disc, vha, 0x20e7,
 1036	    "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
 1037	    sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
 1038	    sp->u.iocb_cmd.u.mbx.in_mb[2]);
 1039
 1040
 1041	sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
 1042	memset(&ea, 0, sizeof(ea));
 1043	ea.sp = sp;
 1044	ea.rc = res;
 1045
 1046	if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
 1047	    sizeof(struct get_name_list_extended)) {
 1048		n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
 1049		    sizeof(struct get_name_list_extended);
 1050		ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
 1051	}
 1052
 1053	for (i = 0; i < n; i++) {
 1054		e = &vha->gnl.l[i];
 1055		loop_id = le16_to_cpu(e->nport_handle);
 1056		/* mask out reserve bit */
 1057		loop_id = (loop_id & 0x7fff);
 1058		set_bit(loop_id, vha->hw->loop_id_map);
 1059		wwn = wwn_to_u64(e->port_name);
 1060
 1061		ql_dbg(ql_dbg_disc, vha, 0x20e8,
 1062		    "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
 1063		    __func__, &wwn, e->port_id[2], e->port_id[1],
 1064		    e->port_id[0], e->current_login_state, e->last_login_state,
 1065		    (loop_id & 0x7fff));
 1066	}
 1067
 1068	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 1069
 1070	INIT_LIST_HEAD(&h);
 1071	fcport = tf = NULL;
 1072	if (!list_empty(&vha->gnl.fcports))
 1073		list_splice_init(&vha->gnl.fcports, &h);
 1074	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1075
 1076	list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
 1077		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 1078		list_del_init(&fcport->gnl_entry);
 1079		fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
 1080		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1081		ea.fcport = fcport;
 1082
 1083		qla24xx_handle_gnl_done_event(vha, &ea);
 1084	}
 1085
 1086	/* create new fcport if fw has knowledge of new sessions */
 1087	for (i = 0; i < n; i++) {
 1088		port_id_t id;
 1089		u64 wwnn;
 1090
 1091		e = &vha->gnl.l[i];
 1092		wwn = wwn_to_u64(e->port_name);
 1093
 1094		found = false;
 1095		list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
 1096			if (!memcmp((u8 *)&wwn, fcport->port_name,
 1097			    WWN_SIZE)) {
 1098				found = true;
 1099				break;
 1100			}
 1101		}
 1102
 1103		id.b.domain = e->port_id[2];
 1104		id.b.area = e->port_id[1];
 1105		id.b.al_pa = e->port_id[0];
 1106		id.b.rsvd_1 = 0;
 1107
 1108		if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
 1109			ql_dbg(ql_dbg_disc, vha, 0x2065,
 1110			    "%s %d %8phC %06x post new sess\n",
 1111			    __func__, __LINE__, (u8 *)&wwn, id.b24);
 1112			wwnn = wwn_to_u64(e->node_name);
 1113			qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
 1114			    (u8 *)&wwnn, NULL, 0);
 1115		}
 1116	}
 1117
 1118	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 1119	vha->gnl.sent = 0;
 1120	if (!list_empty(&vha->gnl.fcports)) {
 1121		/* retrigger gnl */
 1122		list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
 1123		    gnl_entry) {
 1124			list_del_init(&fcport->gnl_entry);
 1125			fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
 1126			if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
 1127				break;
 1128		}
 1129	}
 1130	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1131
 1132	/* ref: INIT */
 1133	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 1134}
 1135
 1136int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
 1137{
 1138	srb_t *sp;
 1139	int rval = QLA_FUNCTION_FAILED;
 1140	unsigned long flags;
 1141	u16 *mb;
 1142
 1143	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
 1144		goto done;
 1145
 1146	ql_dbg(ql_dbg_disc, vha, 0x20d9,
 1147	    "Async-gnlist WWPN %8phC \n", fcport->port_name);
 1148
 1149	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 1150	fcport->flags |= FCF_ASYNC_SENT;
 1151	qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
 1152	fcport->last_rscn_gen = fcport->rscn_gen;
 1153	fcport->last_login_gen = fcport->login_gen;
 1154
 1155	list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
 1156	if (vha->gnl.sent) {
 1157		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1158		return QLA_SUCCESS;
 1159	}
 1160	vha->gnl.sent = 1;
 1161	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1162
 1163	/* ref: INIT */
 1164	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
 1165	if (!sp)
 1166		goto done;
 1167
 1168	sp->type = SRB_MB_IOCB;
 1169	sp->name = "gnlist";
 1170	sp->gen1 = fcport->rscn_gen;
 1171	sp->gen2 = fcport->login_gen;
 1172	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
 1173			      qla24xx_async_gnl_sp_done);
 1174
 1175	mb = sp->u.iocb_cmd.u.mbx.out_mb;
 1176	mb[0] = MBC_PORT_NODE_NAME_LIST;
 1177	mb[1] = BIT_2 | BIT_3;
 1178	mb[2] = MSW(vha->gnl.ldma);
 1179	mb[3] = LSW(vha->gnl.ldma);
 1180	mb[6] = MSW(MSD(vha->gnl.ldma));
 1181	mb[7] = LSW(MSD(vha->gnl.ldma));
 1182	mb[8] = vha->gnl.size;
 1183	mb[9] = vha->vp_idx;
 1184
 1185	ql_dbg(ql_dbg_disc, vha, 0x20da,
 1186	    "Async-%s - OUT WWPN %8phC hndl %x\n",
 1187	    sp->name, fcport->port_name, sp->handle);
 1188
 1189	rval = qla2x00_start_sp(sp);
 1190	if (rval != QLA_SUCCESS)
 1191		goto done_free_sp;
 1192
 1193	return rval;
 1194
 1195done_free_sp:
 1196	/*
 1197	 * use qla24xx_async_gnl_sp_done to purge all pending gnl request.
 1198	 * kref_put is call behind the scene.
 1199	 */
 1200	sp->u.iocb_cmd.u.mbx.in_mb[0] = MBS_COMMAND_ERROR;
 1201	qla24xx_async_gnl_sp_done(sp, QLA_COMMAND_ERROR);
 1202	fcport->flags &= ~(FCF_ASYNC_SENT);
 1203done:
 1204	fcport->flags &= ~(FCF_ASYNC_ACTIVE);
 1205	return rval;
 1206}
 1207
 1208int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
 1209{
 1210	struct qla_work_evt *e;
 1211
 1212	e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
 1213	if (!e)
 1214		return QLA_FUNCTION_FAILED;
 1215
 1216	e->u.fcport.fcport = fcport;
 1217	fcport->flags |= FCF_ASYNC_ACTIVE;
 1218	return qla2x00_post_work(vha, e);
 1219}
 1220
 1221static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
 1222{
 1223	struct scsi_qla_host *vha = sp->vha;
 1224	struct qla_hw_data *ha = vha->hw;
 1225	fc_port_t *fcport = sp->fcport;
 1226	u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
 1227	struct event_arg ea;
 1228
 1229	ql_dbg(ql_dbg_disc, vha, 0x20db,
 1230	    "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
 1231	    sp->name, res, fcport->port_name, mb[1], mb[2]);
 1232
 1233	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
 1234
 1235	if (res == QLA_FUNCTION_TIMEOUT)
 1236		goto done;
 1237
 1238	memset(&ea, 0, sizeof(ea));
 1239	ea.fcport = fcport;
 1240	ea.sp = sp;
 1241
 1242	qla24xx_handle_gpdb_event(vha, &ea);
 1243
 1244done:
 1245	dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
 1246		sp->u.iocb_cmd.u.mbx.in_dma);
 1247
 1248	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 1249}
 1250
 1251int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
 1252{
 1253	struct qla_work_evt *e;
 1254
 1255	if (vha->host->active_mode == MODE_TARGET)
 1256		return QLA_FUNCTION_FAILED;
 1257
 1258	e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
 1259	if (!e)
 1260		return QLA_FUNCTION_FAILED;
 1261
 1262	e->u.fcport.fcport = fcport;
 1263
 1264	return qla2x00_post_work(vha, e);
 1265}
 1266
 1267static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
 1268{
 1269	struct scsi_qla_host *vha = sp->vha;
 1270	struct srb_iocb *lio = &sp->u.iocb_cmd;
 1271	struct event_arg ea;
 1272
 1273	ql_dbg(ql_dbg_disc, vha, 0x2129,
 1274	    "%s %8phC res %x\n", __func__,
 1275	    sp->fcport->port_name, res);
 1276
 1277	sp->fcport->flags &= ~FCF_ASYNC_SENT;
 1278
 1279	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
 1280		memset(&ea, 0, sizeof(ea));
 1281		ea.fcport = sp->fcport;
 1282		ea.data[0] = lio->u.logio.data[0];
 1283		ea.data[1] = lio->u.logio.data[1];
 1284		ea.iop[0] = lio->u.logio.iop[0];
 1285		ea.iop[1] = lio->u.logio.iop[1];
 1286		ea.sp = sp;
 1287		if (res == QLA_OS_TIMER_EXPIRED)
 1288			ea.data[0] = QLA_OS_TIMER_EXPIRED;
 1289		else if (res)
 1290			ea.data[0] = MBS_COMMAND_ERROR;
 1291
 1292		qla24xx_handle_prli_done_event(vha, &ea);
 1293	}
 1294
 1295	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 1296}
 1297
 1298int
 1299qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
 1300{
 1301	srb_t *sp;
 1302	struct srb_iocb *lio;
 1303	int rval = QLA_FUNCTION_FAILED;
 1304
 1305	if (!vha->flags.online) {
 1306		ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
 1307		    __func__, __LINE__, fcport->port_name);
 1308		return rval;
 1309	}
 1310
 1311	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
 1312	    fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
 1313	    qla_dual_mode_enabled(vha)) {
 1314		ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
 1315		    __func__, __LINE__, fcport->port_name);
 1316		return rval;
 1317	}
 1318
 1319	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
 1320	if (!sp)
 1321		return rval;
 1322
 1323	fcport->flags |= FCF_ASYNC_SENT;
 1324	fcport->logout_completed = 0;
 1325
 1326	sp->type = SRB_PRLI_CMD;
 1327	sp->name = "prli";
 1328	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
 1329			      qla2x00_async_prli_sp_done);
 1330
 1331	lio = &sp->u.iocb_cmd;
 1332	lio->u.logio.flags = 0;
 1333
 1334	if (NVME_TARGET(vha->hw, fcport))
 1335		lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
 1336
 1337	ql_dbg(ql_dbg_disc, vha, 0x211b,
 1338	    "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
 1339	    fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
 1340	    fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
 1341	    NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
 1342
 1343	rval = qla2x00_start_sp(sp);
 1344	if (rval != QLA_SUCCESS) {
 1345		fcport->flags |= FCF_LOGIN_NEEDED;
 1346		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1347		goto done_free_sp;
 1348	}
 1349
 1350	return rval;
 1351
 1352done_free_sp:
 1353	/* ref: INIT */
 1354	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 1355	fcport->flags &= ~FCF_ASYNC_SENT;
 1356	return rval;
 1357}
 1358
 1359int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
 1360{
 1361	struct qla_work_evt *e;
 1362
 1363	e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
 1364	if (!e)
 1365		return QLA_FUNCTION_FAILED;
 1366
 1367	e->u.fcport.fcport = fcport;
 1368	e->u.fcport.opt = opt;
 1369	fcport->flags |= FCF_ASYNC_ACTIVE;
 1370	return qla2x00_post_work(vha, e);
 1371}
 1372
 1373int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
 1374{
 1375	srb_t *sp;
 1376	struct srb_iocb *mbx;
 1377	int rval = QLA_FUNCTION_FAILED;
 1378	u16 *mb;
 1379	dma_addr_t pd_dma;
 1380	struct port_database_24xx *pd;
 1381	struct qla_hw_data *ha = vha->hw;
 1382
 1383	if (IS_SESSION_DELETED(fcport)) {
 1384		ql_log(ql_log_warn, vha, 0xffff,
 1385		       "%s: %8phC is being delete - not sending command.\n",
 1386		       __func__, fcport->port_name);
 1387		fcport->flags &= ~FCF_ASYNC_ACTIVE;
 1388		return rval;
 1389	}
 1390
 1391	if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
 1392		ql_log(ql_log_warn, vha, 0xffff,
 1393		    "%s: %8phC online %d flags %x - not sending command.\n",
 1394		    __func__, fcport->port_name, vha->flags.online, fcport->flags);
 1395		goto done;
 1396	}
 1397
 1398	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
 1399	if (!sp)
 1400		goto done;
 1401
 1402	qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
 1403
 1404	fcport->flags |= FCF_ASYNC_SENT;
 1405	sp->type = SRB_MB_IOCB;
 1406	sp->name = "gpdb";
 1407	sp->gen1 = fcport->rscn_gen;
 1408	sp->gen2 = fcport->login_gen;
 1409	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
 1410			      qla24xx_async_gpdb_sp_done);
 1411
 1412	pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
 1413	if (pd == NULL) {
 1414		ql_log(ql_log_warn, vha, 0xd043,
 1415		    "Failed to allocate port database structure.\n");
 1416		goto done_free_sp;
 1417	}
 1418
 1419	mb = sp->u.iocb_cmd.u.mbx.out_mb;
 1420	mb[0] = MBC_GET_PORT_DATABASE;
 1421	mb[1] = fcport->loop_id;
 1422	mb[2] = MSW(pd_dma);
 1423	mb[3] = LSW(pd_dma);
 1424	mb[6] = MSW(MSD(pd_dma));
 1425	mb[7] = LSW(MSD(pd_dma));
 1426	mb[9] = vha->vp_idx;
 1427	mb[10] = opt;
 1428
 1429	mbx = &sp->u.iocb_cmd;
 1430	mbx->u.mbx.in = (void *)pd;
 1431	mbx->u.mbx.in_dma = pd_dma;
 1432
 1433	ql_dbg(ql_dbg_disc, vha, 0x20dc,
 1434	    "Async-%s %8phC hndl %x opt %x\n",
 1435	    sp->name, fcport->port_name, sp->handle, opt);
 1436
 1437	rval = qla2x00_start_sp(sp);
 1438	if (rval != QLA_SUCCESS)
 1439		goto done_free_sp;
 1440	return rval;
 1441
 1442done_free_sp:
 1443	if (pd)
 1444		dma_pool_free(ha->s_dma_pool, pd, pd_dma);
 1445
 1446	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 1447	fcport->flags &= ~FCF_ASYNC_SENT;
 1448done:
 1449	fcport->flags &= ~FCF_ASYNC_ACTIVE;
 1450	qla24xx_post_gpdb_work(vha, fcport, opt);
 1451	return rval;
 1452}
 1453
 1454static
 1455void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
 1456{
 1457	unsigned long flags;
 1458
 1459	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 1460	ea->fcport->login_gen++;
 1461	ea->fcport->logout_on_delete = 1;
 1462
 1463	if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
 1464		vha->fcport_count++;
 1465		ea->fcport->login_succ = 1;
 1466
 1467		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1468		qla24xx_sched_upd_fcport(ea->fcport);
 1469		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 1470	} else if (ea->fcport->login_succ) {
 1471		/*
 1472		 * We have an existing session. A late RSCN delivery
 1473		 * must have triggered the session to be re-validate.
 1474		 * Session is still valid.
 1475		 */
 1476		ql_dbg(ql_dbg_disc, vha, 0x20d6,
 1477		    "%s %d %8phC session revalidate success\n",
 1478		    __func__, __LINE__, ea->fcport->port_name);
 1479		qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
 1480	}
 1481	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 1482}
 1483
 1484static int	qla_chk_secure_login(scsi_qla_host_t	*vha, fc_port_t *fcport,
 1485	struct port_database_24xx *pd)
 1486{
 1487	int rc = 0;
 1488
 1489	if (pd->secure_login) {
 1490		ql_dbg(ql_dbg_disc, vha, 0x104d,
 1491		    "Secure Login established on %8phC\n",
 1492		    fcport->port_name);
 1493		fcport->flags |= FCF_FCSP_DEVICE;
 1494	} else {
 1495		ql_dbg(ql_dbg_disc, vha, 0x104d,
 1496		    "non-Secure Login %8phC",
 1497		    fcport->port_name);
 1498		fcport->flags &= ~FCF_FCSP_DEVICE;
 1499	}
 1500	if (vha->hw->flags.edif_enabled) {
 1501		if (fcport->flags & FCF_FCSP_DEVICE) {
 1502			qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND);
 1503			/* Start edif prli timer & ring doorbell for app */
 1504			fcport->edif.rx_sa_set = 0;
 1505			fcport->edif.tx_sa_set = 0;
 1506			fcport->edif.rx_sa_pending = 0;
 1507			fcport->edif.tx_sa_pending = 0;
 1508
 1509			qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
 1510			    fcport->d_id.b24);
 1511
 1512			if (DBELL_ACTIVE(vha)) {
 1513				ql_dbg(ql_dbg_disc, vha, 0x20ef,
 1514				    "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
 1515				    __func__, __LINE__, fcport->port_name);
 1516				fcport->edif.app_sess_online = 1;
 1517
 1518				qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
 1519				    fcport->d_id.b24, 0, fcport);
 1520			}
 1521
 1522			rc = 1;
 1523		} else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
 1524			ql_dbg(ql_dbg_disc, vha, 0x2117,
 1525			    "%s %d %8phC post prli\n",
 1526			    __func__, __LINE__, fcport->port_name);
 1527			qla24xx_post_prli_work(vha, fcport);
 1528			rc = 1;
 1529		}
 1530	}
 1531	return rc;
 1532}
 1533
 1534static
 1535void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
 1536{
 1537	fc_port_t *fcport = ea->fcport;
 1538	struct port_database_24xx *pd;
 1539	struct srb *sp = ea->sp;
 1540	uint8_t	ls;
 1541
 1542	pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
 1543
 1544	fcport->flags &= ~FCF_ASYNC_SENT;
 1545
 1546	ql_dbg(ql_dbg_disc, vha, 0x20d2,
 1547	    "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
 1548	    fcport->port_name, fcport->disc_state, pd->current_login_state,
 1549	    fcport->fc4_type, ea->rc);
 1550
 1551	if (fcport->disc_state == DSC_DELETE_PEND) {
 1552		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n",
 1553		       __func__, __LINE__, fcport->port_name);
 1554		return;
 1555	}
 1556
 1557	if (NVME_TARGET(vha->hw, fcport))
 1558		ls = pd->current_login_state >> 4;
 1559	else
 1560		ls = pd->current_login_state & 0xf;
 1561
 1562	if (ea->sp->gen2 != fcport->login_gen) {
 1563		/* target side must have changed it. */
 1564
 1565		ql_dbg(ql_dbg_disc, vha, 0x20d3,
 1566		    "%s %8phC generation changed\n",
 1567		    __func__, fcport->port_name);
 1568		return;
 1569	} else if (ea->sp->gen1 != fcport->rscn_gen) {
 1570		qla_rscn_replay(fcport);
 1571		qlt_schedule_sess_for_deletion(fcport);
 1572		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
 1573		       __func__, __LINE__, fcport->port_name, ls);
 1574		return;
 1575	}
 1576
 1577	switch (ls) {
 1578	case PDS_PRLI_COMPLETE:
 1579		__qla24xx_parse_gpdb(vha, fcport, pd);
 1580		break;
 1581	case PDS_PLOGI_COMPLETE:
 1582		if (qla_chk_secure_login(vha, fcport, pd)) {
 1583			ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
 1584			       __func__, __LINE__, fcport->port_name, ls);
 1585			return;
 1586		}
 1587		fallthrough;
 1588	case PDS_PLOGI_PENDING:
 1589	case PDS_PRLI_PENDING:
 1590	case PDS_PRLI2_PENDING:
 1591		/* Set discovery state back to GNL to Relogin attempt */
 1592		if (qla_dual_mode_enabled(vha) ||
 1593		    qla_ini_mode_enabled(vha)) {
 1594			qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
 1595			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1596		}
 1597		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
 1598		       __func__, __LINE__, fcport->port_name, ls);
 1599		return;
 1600	case PDS_LOGO_PENDING:
 1601	case PDS_PORT_UNAVAILABLE:
 1602	default:
 1603		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
 1604		    __func__, __LINE__, fcport->port_name);
 1605		qlt_schedule_sess_for_deletion(fcport);
 1606		return;
 1607	}
 1608	__qla24xx_handle_gpdb_event(vha, ea);
 1609} /* gpdb event */
 1610
 1611static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
 1612{
 1613	u8 login = 0;
 1614	int rc;
 1615
 1616	ql_dbg(ql_dbg_disc, vha, 0x307b,
 1617	    "%s %8phC DS %d LS %d lid %d retries=%d\n",
 1618	    __func__, fcport->port_name, fcport->disc_state,
 1619	    fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
 1620
 1621	if (qla_tgt_mode_enabled(vha))
 1622		return;
 1623
 1624	if (qla_dual_mode_enabled(vha)) {
 1625		if (N2N_TOPO(vha->hw)) {
 1626			u64 mywwn, wwn;
 1627
 1628			mywwn = wwn_to_u64(vha->port_name);
 1629			wwn = wwn_to_u64(fcport->port_name);
 1630			if (mywwn > wwn)
 1631				login = 1;
 1632			else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
 1633			    && time_after_eq(jiffies,
 1634				    fcport->plogi_nack_done_deadline))
 1635				login = 1;
 1636		} else {
 1637			login = 1;
 1638		}
 1639	} else {
 1640		/* initiator mode */
 1641		login = 1;
 1642	}
 1643
 1644	if (login && fcport->login_retry) {
 1645		fcport->login_retry--;
 1646		if (fcport->loop_id == FC_NO_LOOP_ID) {
 1647			fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
 1648			rc = qla2x00_find_new_loop_id(vha, fcport);
 1649			if (rc) {
 1650				ql_dbg(ql_dbg_disc, vha, 0x20e6,
 1651				    "%s %d %8phC post del sess - out of loopid\n",
 1652				    __func__, __LINE__, fcport->port_name);
 1653				fcport->scan_state = 0;
 1654				qlt_schedule_sess_for_deletion(fcport);
 1655				return;
 1656			}
 1657		}
 1658		ql_dbg(ql_dbg_disc, vha, 0x20bf,
 1659		    "%s %d %8phC post login\n",
 1660		    __func__, __LINE__, fcport->port_name);
 1661		qla2x00_post_async_login_work(vha, fcport, NULL);
 1662	}
 1663}
 1664
 1665int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
 1666{
 1667	u16 data[2];
 1668	u16 sec;
 1669
 1670	ql_dbg(ql_dbg_disc, vha, 0x20d8,
 1671	    "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
 1672	    __func__, fcport->port_name, fcport->disc_state,
 1673	    fcport->fw_login_state, fcport->login_pause, fcport->flags,
 1674	    fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
 1675	    fcport->login_gen, fcport->loop_id, fcport->scan_state,
 1676	    fcport->fc4_type);
 1677
 1678	if (fcport->scan_state != QLA_FCPORT_FOUND ||
 1679	    fcport->disc_state == DSC_DELETE_PEND)
 1680		return 0;
 1681
 1682	if ((fcport->loop_id != FC_NO_LOOP_ID) &&
 1683	    qla_dual_mode_enabled(vha) &&
 1684	    ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
 1685	     (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
 1686		return 0;
 1687
 1688	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
 1689	    !N2N_TOPO(vha->hw)) {
 1690		if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
 1691			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1692			return 0;
 1693		}
 1694	}
 1695
 1696	/* Target won't initiate port login if fabric is present */
 1697	if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
 1698		return 0;
 1699
 1700	if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
 1701		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1702		return 0;
 1703	}
 1704
 1705	switch (fcport->disc_state) {
 1706	case DSC_DELETED:
 1707		switch (vha->hw->current_topology) {
 1708		case ISP_CFG_N:
 1709			if (fcport_is_smaller(fcport)) {
 1710				/* this adapter is bigger */
 1711				if (fcport->login_retry) {
 1712					if (fcport->loop_id == FC_NO_LOOP_ID) {
 1713						qla2x00_find_new_loop_id(vha,
 1714						    fcport);
 1715						fcport->fw_login_state =
 1716						    DSC_LS_PORT_UNAVAIL;
 1717					}
 1718					fcport->login_retry--;
 1719					qla_post_els_plogi_work(vha, fcport);
 1720				} else {
 1721					ql_log(ql_log_info, vha, 0x705d,
 1722					    "Unable to reach remote port %8phC",
 1723					    fcport->port_name);
 1724				}
 1725			} else {
 1726				qla24xx_post_gnl_work(vha, fcport);
 1727			}
 1728			break;
 1729		default:
 1730			if (fcport->loop_id == FC_NO_LOOP_ID) {
 1731				ql_dbg(ql_dbg_disc, vha, 0x20bd,
 1732				    "%s %d %8phC post gnl\n",
 1733				    __func__, __LINE__, fcport->port_name);
 1734				qla24xx_post_gnl_work(vha, fcport);
 1735			} else {
 1736				qla_chk_n2n_b4_login(vha, fcport);
 1737			}
 1738			break;
 1739		}
 1740		break;
 1741
 1742	case DSC_GNL:
 1743		switch (vha->hw->current_topology) {
 1744		case ISP_CFG_N:
 1745			if ((fcport->current_login_state & 0xf) == 0x6) {
 1746				ql_dbg(ql_dbg_disc, vha, 0x2118,
 1747				    "%s %d %8phC post GPDB work\n",
 1748				    __func__, __LINE__, fcport->port_name);
 1749				fcport->chip_reset =
 1750					vha->hw->base_qpair->chip_reset;
 1751				qla24xx_post_gpdb_work(vha, fcport, 0);
 1752			}  else {
 1753				ql_dbg(ql_dbg_disc, vha, 0x2118,
 1754				    "%s %d %8phC post %s PRLI\n",
 1755				    __func__, __LINE__, fcport->port_name,
 1756				    NVME_TARGET(vha->hw, fcport) ? "NVME" :
 1757				    "FC");
 1758				qla24xx_post_prli_work(vha, fcport);
 1759			}
 1760			break;
 1761		default:
 1762			if (fcport->login_pause) {
 1763				ql_dbg(ql_dbg_disc, vha, 0x20d8,
 1764				    "%s %d %8phC exit\n",
 1765				    __func__, __LINE__,
 1766				    fcport->port_name);
 1767				fcport->last_rscn_gen = fcport->rscn_gen;
 1768				fcport->last_login_gen = fcport->login_gen;
 1769				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1770				break;
 1771			}
 1772			qla_chk_n2n_b4_login(vha, fcport);
 1773			break;
 1774		}
 1775		break;
 1776
 1777	case DSC_LOGIN_FAILED:
 1778		if (N2N_TOPO(vha->hw))
 1779			qla_chk_n2n_b4_login(vha, fcport);
 1780		else
 1781			qlt_schedule_sess_for_deletion(fcport);
 1782		break;
 1783
 1784	case DSC_LOGIN_COMPLETE:
 1785		/* recheck login state */
 1786		data[0] = data[1] = 0;
 1787		qla2x00_post_async_adisc_work(vha, fcport, data);
 1788		break;
 1789
 1790	case DSC_LOGIN_PEND:
 1791		if (vha->hw->flags.edif_enabled)
 1792			break;
 1793
 1794		if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
 1795			ql_dbg(ql_dbg_disc, vha, 0x2118,
 1796			       "%s %d %8phC post %s PRLI\n",
 1797			       __func__, __LINE__, fcport->port_name,
 1798			       NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC");
 1799			qla24xx_post_prli_work(vha, fcport);
 1800		}
 1801		break;
 1802
 1803	case DSC_UPD_FCPORT:
 1804		sec =  jiffies_to_msecs(jiffies -
 1805		    fcport->jiffies_at_registration)/1000;
 1806		if (fcport->sec_since_registration < sec && sec &&
 1807		    !(sec % 60)) {
 1808			fcport->sec_since_registration = sec;
 1809			ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
 1810			    "%s %8phC - Slow Rport registration(%d Sec)\n",
 1811			    __func__, fcport->port_name, sec);
 1812		}
 1813
 1814		if (fcport->next_disc_state != DSC_DELETE_PEND)
 1815			fcport->next_disc_state = DSC_ADISC;
 1816		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 1817		break;
 1818
 1819	default:
 1820		break;
 1821	}
 1822
 1823	return 0;
 1824}
 1825
 1826int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
 1827    u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
 1828{
 1829	struct qla_work_evt *e;
 1830
 1831	e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
 1832	if (!e)
 1833		return QLA_FUNCTION_FAILED;
 1834
 1835	e->u.new_sess.id = *id;
 1836	e->u.new_sess.pla = pla;
 1837	e->u.new_sess.fc4_type = fc4_type;
 1838	memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
 1839	if (node_name)
 1840		memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
 1841
 1842	return qla2x00_post_work(vha, e);
 1843}
 1844
 1845static void qla_rscn_gen_tick(scsi_qla_host_t *vha, u32 *ret_rscn_gen)
 1846{
 1847	*ret_rscn_gen = atomic_inc_return(&vha->rscn_gen);
 1848	/* memory barrier */
 1849	wmb();
 1850}
 1851
 1852void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
 1853{
 1854	fc_port_t *fcport;
 1855	unsigned long flags;
 1856	u32 rscn_gen;
 1857
 1858	switch (ea->id.b.rsvd_1) {
 1859	case RSCN_PORT_ADDR:
 1860		fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
 1861		if (fcport) {
 1862			if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) {
 1863				/*
 1864				 * On ipsec start by remote port, Target port
 1865				 * may use RSCN to trigger initiator to
 1866				 * relogin. If driver is already in the
 1867				 * process of a relogin, then ignore the RSCN
 1868				 * and allow the current relogin to continue.
 1869				 * This reduces thrashing of the connection.
 1870				 */
 1871				if (atomic_read(&fcport->state) == FCS_ONLINE) {
 1872					/*
 1873					 * If state = online, then set scan_needed=1 to do relogin.
 1874					 * Otherwise we're already in the middle of a relogin
 1875					 */
 1876					fcport->scan_needed = 1;
 1877					qla_rscn_gen_tick(vha, &fcport->rscn_gen);
 1878				}
 1879			} else {
 1880				fcport->scan_needed = 1;
 1881				qla_rscn_gen_tick(vha, &fcport->rscn_gen);
 1882			}
 1883		}
 1884		break;
 1885	case RSCN_AREA_ADDR:
 1886		qla_rscn_gen_tick(vha, &rscn_gen);
 1887		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 1888			if (fcport->flags & FCF_FCP2_DEVICE &&
 1889			    atomic_read(&fcport->state) == FCS_ONLINE)
 1890				continue;
 1891
 1892			if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
 1893				fcport->scan_needed = 1;
 1894				fcport->rscn_gen = rscn_gen;
 1895			}
 1896		}
 1897		break;
 1898	case RSCN_DOM_ADDR:
 1899		qla_rscn_gen_tick(vha, &rscn_gen);
 1900		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 1901			if (fcport->flags & FCF_FCP2_DEVICE &&
 1902			    atomic_read(&fcport->state) == FCS_ONLINE)
 1903				continue;
 1904
 1905			if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
 1906				fcport->scan_needed = 1;
 1907				fcport->rscn_gen = rscn_gen;
 1908			}
 1909		}
 1910		break;
 1911	case RSCN_FAB_ADDR:
 1912	default:
 1913		qla_rscn_gen_tick(vha, &rscn_gen);
 1914		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 1915			if (fcport->flags & FCF_FCP2_DEVICE &&
 1916			    atomic_read(&fcport->state) == FCS_ONLINE)
 1917				continue;
 1918
 1919			fcport->scan_needed = 1;
 1920			fcport->rscn_gen = rscn_gen;
 1921		}
 1922		break;
 1923	}
 1924
 1925	spin_lock_irqsave(&vha->work_lock, flags);
 1926	if (vha->scan.scan_flags == 0) {
 1927		ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
 1928		vha->scan.scan_flags |= SF_QUEUED;
 1929		vha->scan.rscn_gen_start = atomic_read(&vha->rscn_gen);
 1930		schedule_delayed_work(&vha->scan.scan_work, 5);
 1931	}
 1932	spin_unlock_irqrestore(&vha->work_lock, flags);
 1933}
 1934
 1935void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
 1936	struct event_arg *ea)
 1937{
 1938	fc_port_t *fcport = ea->fcport;
 1939
 1940	if (test_bit(UNLOADING, &vha->dpc_flags))
 1941		return;
 1942
 1943	ql_dbg(ql_dbg_disc, vha, 0x2102,
 1944	    "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
 1945	    __func__, fcport->port_name, fcport->disc_state,
 1946	    fcport->fw_login_state, fcport->login_pause,
 1947	    fcport->deleted, fcport->conflict,
 1948	    fcport->last_rscn_gen, fcport->rscn_gen,
 1949	    fcport->last_login_gen, fcport->login_gen,
 1950	    fcport->flags);
 1951
 1952	if (fcport->last_rscn_gen != fcport->rscn_gen) {
 1953		ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
 1954		    __func__, __LINE__, fcport->port_name);
 1955		qla24xx_post_gnl_work(vha, fcport);
 1956		return;
 1957	}
 1958
 1959	qla24xx_fcport_handle_login(vha, fcport);
 1960}
 1961
 1962void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
 1963				      struct event_arg *ea)
 1964{
 1965	if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) &&
 1966	    vha->hw->flags.edif_enabled) {
 1967		/* check to see if App support Secure */
 1968		qla24xx_post_gpdb_work(vha, ea->fcport, 0);
 1969		return;
 1970	}
 1971
 1972	/* for pure Target Mode, PRLI will not be initiated */
 1973	if (vha->host->active_mode == MODE_TARGET)
 1974		return;
 1975
 1976	ql_dbg(ql_dbg_disc, vha, 0x2118,
 1977	    "%s %d %8phC post PRLI\n",
 1978	    __func__, __LINE__, ea->fcport->port_name);
 1979	qla24xx_post_prli_work(vha, ea->fcport);
 1980}
 1981
 1982/*
 1983 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
 1984 * to be consumed by the fcport
 1985 */
 1986void qla_rscn_replay(fc_port_t *fcport)
 1987{
 1988	struct event_arg ea;
 1989
 1990	switch (fcport->disc_state) {
 1991	case DSC_DELETE_PEND:
 1992		return;
 1993	default:
 1994		break;
 1995	}
 1996
 1997	if (fcport->scan_needed) {
 1998		memset(&ea, 0, sizeof(ea));
 1999		ea.id = fcport->d_id;
 2000		ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
 2001		qla2x00_handle_rscn(fcport->vha, &ea);
 2002	}
 2003}
 2004
 2005static void
 2006qla2x00_tmf_iocb_timeout(void *data)
 2007{
 2008	srb_t *sp = data;
 2009	struct srb_iocb *tmf = &sp->u.iocb_cmd;
 2010	int rc, h;
 2011	unsigned long flags;
 2012
 2013	if (sp->type == SRB_MARKER)
 2014		rc = QLA_FUNCTION_FAILED;
 2015	else
 2016		rc = qla24xx_async_abort_cmd(sp, false);
 2017
 2018	if (rc) {
 2019		spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
 2020		for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
 2021			if (sp->qpair->req->outstanding_cmds[h] == sp) {
 2022				sp->qpair->req->outstanding_cmds[h] = NULL;
 2023				qla_put_fw_resources(sp->qpair, &sp->iores);
 2024				break;
 2025			}
 2026		}
 2027		spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
 2028		tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
 2029		tmf->u.tmf.data = QLA_FUNCTION_FAILED;
 2030		complete(&tmf->u.tmf.comp);
 2031	}
 2032}
 2033
 2034static void qla_marker_sp_done(srb_t *sp, int res)
 2035{
 2036	struct srb_iocb *tmf = &sp->u.iocb_cmd;
 2037
 2038	if (res != QLA_SUCCESS)
 2039		ql_dbg(ql_dbg_taskm, sp->vha, 0x8004,
 2040		    "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n",
 2041		    sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags,
 2042		    sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id);
 2043
 2044	sp->u.iocb_cmd.u.tmf.data = res;
 2045	complete(&tmf->u.tmf.comp);
 2046}
 2047
 2048#define  START_SP_W_RETRIES(_sp, _rval, _chip_gen, _login_gen) \
 2049{\
 2050	int cnt = 5; \
 2051	do { \
 2052		if (_chip_gen != sp->vha->hw->chip_reset || _login_gen != sp->fcport->login_gen) {\
 2053			_rval = -EINVAL; \
 2054			break; \
 2055		} \
 2056		_rval = qla2x00_start_sp(_sp); \
 2057		if (_rval == -EAGAIN) \
 2058			msleep(1); \
 2059		else \
 2060			break; \
 2061		cnt--; \
 2062	} while (cnt); \
 2063}
 2064
 2065/**
 2066 * qla26xx_marker: send marker IOCB and wait for the completion of it.
 2067 * @arg: pointer to argument list.
 2068 *    It is assume caller will provide an fcport pointer and modifier
 2069 */
 2070static int
 2071qla26xx_marker(struct tmf_arg *arg)
 2072{
 2073	struct scsi_qla_host *vha = arg->vha;
 2074	struct srb_iocb *tm_iocb;
 2075	srb_t *sp;
 2076	int rval = QLA_FUNCTION_FAILED;
 2077	fc_port_t *fcport = arg->fcport;
 2078	u32 chip_gen, login_gen;
 2079
 2080	if (TMF_NOT_READY(arg->fcport)) {
 2081		ql_dbg(ql_dbg_taskm, vha, 0x8039,
 2082		    "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
 2083		    fcport->loop_id, fcport->d_id.b24,
 2084		    arg->modifier, arg->lun, arg->qpair->id);
 2085		return QLA_SUSPENDED;
 2086	}
 2087
 2088	chip_gen = vha->hw->chip_reset;
 2089	login_gen = fcport->login_gen;
 2090
 2091	/* ref: INIT */
 2092	sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL);
 2093	if (!sp)
 2094		goto done;
 2095
 2096	sp->type = SRB_MARKER;
 2097	sp->name = "marker";
 2098	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), qla_marker_sp_done);
 2099	sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
 2100
 2101	tm_iocb = &sp->u.iocb_cmd;
 2102	init_completion(&tm_iocb->u.tmf.comp);
 2103	tm_iocb->u.tmf.modifier = arg->modifier;
 2104	tm_iocb->u.tmf.lun = arg->lun;
 2105	tm_iocb->u.tmf.loop_id = fcport->loop_id;
 2106	tm_iocb->u.tmf.vp_index = vha->vp_idx;
 2107
 2108	START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
 2109
 2110	ql_dbg(ql_dbg_taskm, vha, 0x8006,
 2111	    "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
 2112	    sp->handle, fcport->loop_id, fcport->d_id.b24,
 2113	    arg->modifier, arg->lun, sp->qpair->id, rval);
 2114
 2115	if (rval != QLA_SUCCESS) {
 2116		ql_log(ql_log_warn, vha, 0x8031,
 2117		    "Marker IOCB send failure (%x).\n", rval);
 2118		goto done_free_sp;
 2119	}
 2120
 2121	wait_for_completion(&tm_iocb->u.tmf.comp);
 2122	rval = tm_iocb->u.tmf.data;
 2123
 2124	if (rval != QLA_SUCCESS) {
 2125		ql_log(ql_log_warn, vha, 0x8019,
 2126		    "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
 2127		    sp->handle, fcport->loop_id, fcport->d_id.b24,
 2128		    arg->modifier, arg->lun, sp->qpair->id, rval);
 2129	}
 2130
 2131done_free_sp:
 2132	/* ref: INIT */
 2133	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 2134done:
 2135	return rval;
 2136}
 2137
 2138static void qla2x00_tmf_sp_done(srb_t *sp, int res)
 2139{
 2140	struct srb_iocb *tmf = &sp->u.iocb_cmd;
 2141
 2142	if (res)
 2143		tmf->u.tmf.data = res;
 2144	complete(&tmf->u.tmf.comp);
 2145}
 2146
 2147static int qla_tmf_wait(struct tmf_arg *arg)
 2148{
 2149	/* there are only 2 types of error handling that reaches here, lun or target reset */
 2150	if (arg->flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET | TCF_CLEAR_TASK_SET))
 2151		return qla2x00_eh_wait_for_pending_commands(arg->vha,
 2152		    arg->fcport->d_id.b24, arg->lun, WAIT_LUN);
 2153	else
 2154		return qla2x00_eh_wait_for_pending_commands(arg->vha,
 2155		    arg->fcport->d_id.b24, arg->lun, WAIT_TARGET);
 2156}
 2157
 2158static int
 2159__qla2x00_async_tm_cmd(struct tmf_arg *arg)
 2160{
 2161	struct scsi_qla_host *vha = arg->vha;
 2162	struct srb_iocb *tm_iocb;
 2163	srb_t *sp;
 2164	int rval = QLA_FUNCTION_FAILED;
 2165	fc_port_t *fcport = arg->fcport;
 2166	u32 chip_gen, login_gen;
 2167	u64 jif;
 2168
 2169	if (TMF_NOT_READY(arg->fcport)) {
 2170		ql_dbg(ql_dbg_taskm, vha, 0x8032,
 2171		    "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
 2172		    fcport->loop_id, fcport->d_id.b24,
 2173		    arg->modifier, arg->lun, arg->qpair->id);
 2174		return QLA_SUSPENDED;
 2175	}
 2176
 2177	chip_gen = vha->hw->chip_reset;
 2178	login_gen = fcport->login_gen;
 2179
 2180	/* ref: INIT */
 2181	sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL);
 2182	if (!sp)
 2183		goto done;
 2184
 2185	qla_vha_mark_busy(vha);
 2186	sp->type = SRB_TM_CMD;
 2187	sp->name = "tmf";
 2188	qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha),
 2189			      qla2x00_tmf_sp_done);
 2190	sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
 2191
 2192	tm_iocb = &sp->u.iocb_cmd;
 2193	init_completion(&tm_iocb->u.tmf.comp);
 2194	tm_iocb->u.tmf.flags = arg->flags;
 2195	tm_iocb->u.tmf.lun = arg->lun;
 2196
 2197	START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
 2198
 2199	ql_dbg(ql_dbg_taskm, vha, 0x802f,
 2200	    "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n",
 2201	    sp->handle, fcport->loop_id, fcport->d_id.b24,
 2202	    arg->flags, arg->lun, sp->qpair->id, rval);
 2203
 2204	if (rval != QLA_SUCCESS)
 2205		goto done_free_sp;
 2206	wait_for_completion(&tm_iocb->u.tmf.comp);
 2207
 2208	rval = tm_iocb->u.tmf.data;
 2209
 2210	if (rval != QLA_SUCCESS) {
 2211		ql_log(ql_log_warn, vha, 0x8030,
 2212		    "TM IOCB failed (%x).\n", rval);
 2213	}
 2214
 2215	if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
 2216		jif = jiffies;
 2217		if (qla_tmf_wait(arg)) {
 2218			ql_log(ql_log_info, vha, 0x803e,
 2219			       "Waited %u ms Nexus=%ld:%06x:%llu.\n",
 2220			       jiffies_to_msecs(jiffies - jif), vha->host_no,
 2221			       fcport->d_id.b24, arg->lun);
 2222		}
 2223
 2224		if (chip_gen == vha->hw->chip_reset && login_gen == fcport->login_gen) {
 2225			rval = qla26xx_marker(arg);
 2226		} else {
 2227			ql_log(ql_log_info, vha, 0x803e,
 2228			       "Skip Marker due to disruption. Nexus=%ld:%06x:%llu.\n",
 2229			       vha->host_no, fcport->d_id.b24, arg->lun);
 2230			rval = QLA_FUNCTION_FAILED;
 2231		}
 2232	}
 2233	if (tm_iocb->u.tmf.data)
 2234		rval = tm_iocb->u.tmf.data;
 2235
 2236done_free_sp:
 2237	/* ref: INIT */
 2238	kref_put(&sp->cmd_kref, qla2x00_sp_release);
 2239done:
 2240	return rval;
 2241}
 2242
 2243static void qla_put_tmf(struct tmf_arg *arg)
 2244{
 2245	struct scsi_qla_host *vha = arg->vha;
 2246	struct qla_hw_data *ha = vha->hw;
 2247	unsigned long flags;
 2248
 2249	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
 2250	ha->active_tmf--;
 2251	list_del(&arg->tmf_elem);
 2252	spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
 2253}
 2254
 2255static
 2256int qla_get_tmf(struct tmf_arg *arg)
 2257{
 2258	struct scsi_qla_host *vha = arg->vha;
 2259	struct qla_hw_data *ha = vha->hw;
 2260	unsigned long flags;
 2261	fc_port_t *fcport = arg->fcport;
 2262	int rc = 0;
 2263	struct tmf_arg *t;
 2264
 2265	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
 2266	list_for_each_entry(t, &ha->tmf_active, tmf_elem) {
 2267		if (t->fcport == arg->fcport && t->lun == arg->lun) {
 2268			/* reject duplicate TMF */
 2269			ql_log(ql_log_warn, vha, 0x802c,
 2270			       "found duplicate TMF.  Nexus=%ld:%06x:%llu.\n",
 2271			       vha->host_no, fcport->d_id.b24, arg->lun);
 2272			spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
 2273			return -EINVAL;
 2274		}
 2275	}
 2276
 2277	list_add_tail(&arg->tmf_elem, &ha->tmf_pending);
 2278	while (ha->active_tmf >= MAX_ACTIVE_TMF) {
 2279		spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
 2280
 2281		msleep(1);
 2282
 2283		spin_lock_irqsave(&ha->tgt.sess_lock, flags);
 2284		if (TMF_NOT_READY(fcport)) {
 2285			ql_log(ql_log_warn, vha, 0x802c,
 2286			    "Unable to acquire TM resource due to disruption.\n");
 2287			rc = EIO;
 2288			break;
 2289		}
 2290		if (ha->active_tmf < MAX_ACTIVE_TMF &&
 2291		    list_is_first(&arg->tmf_elem, &ha->tmf_pending))
 2292			break;
 2293	}
 2294
 2295	list_del(&arg->tmf_elem);
 2296
 2297	if (!rc) {
 2298		ha->active_tmf++;
 2299		list_add_tail(&arg->tmf_elem, &ha->tmf_active);
 2300	}
 2301
 2302	spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
 2303
 2304	return rc;
 2305}
 2306
 2307int
 2308qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun,
 2309		     uint32_t tag)
 2310{
 2311	struct scsi_qla_host *vha = fcport->vha;
 2312	struct tmf_arg a;
 2313	int rval = QLA_SUCCESS;
 2314
 2315	if (TMF_NOT_READY(fcport))
 2316		return QLA_SUSPENDED;
 2317
 2318	a.vha = fcport->vha;
 2319	a.fcport = fcport;
 2320	a.lun = lun;
 2321	a.flags = flags;
 2322	INIT_LIST_HEAD(&a.tmf_elem);
 2323
 2324	if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) {
 2325		a.modifier = MK_SYNC_ID_LUN;
 2326	} else {
 2327		a.modifier = MK_SYNC_ID;
 2328	}
 2329
 2330	if (qla_get_tmf(&a))
 2331		return QLA_FUNCTION_FAILED;
 2332
 2333	a.qpair = vha->hw->base_qpair;
 2334	rval = __qla2x00_async_tm_cmd(&a);
 2335
 2336	qla_put_tmf(&a);
 2337	return rval;
 2338}
 2339
 2340int
 2341qla24xx_async_abort_command(srb_t *sp)
 2342{
 2343	unsigned long   flags = 0;
 2344
 2345	uint32_t	handle;
 2346	fc_port_t	*fcport = sp->fcport;
 2347	struct qla_qpair *qpair = sp->qpair;
 2348	struct scsi_qla_host *vha = fcport->vha;
 2349	struct req_que *req = qpair->req;
 2350
 2351	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
 2352	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
 2353		if (req->outstanding_cmds[handle] == sp)
 2354			break;
 2355	}
 2356	spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
 2357
 2358	if (handle == req->num_outstanding_cmds) {
 2359		/* Command not found. */
 2360		return QLA_ERR_NOT_FOUND;
 2361	}
 2362	if (sp->type == SRB_FXIOCB_DCMD)
 2363		return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
 2364		    FXDISC_ABORT_IOCTL);
 2365
 2366	return qla24xx_async_abort_cmd(sp, true);
 2367}
 2368
 2369static void
 2370qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
 2371{
 2372	struct srb *sp;
 2373	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
 2374		  ea->data[0]);
 2375
 2376	switch (ea->data[0]) {
 2377	case MBS_COMMAND_COMPLETE:
 2378		ql_dbg(ql_dbg_disc, vha, 0x2118,
 2379		    "%s %d %8phC post gpdb\n",
 2380		    __func__, __LINE__, ea->fcport->port_name);
 2381
 2382		ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
 2383		ea->fcport->logout_on_delete = 1;
 2384		ea->fcport->nvme_prli_service_param = ea->iop[0];
 2385		if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
 2386			ea->fcport->nvme_first_burst_size =
 2387			    (ea->iop[1] & 0xffff) * 512;
 2388		else
 2389			ea->fcport->nvme_first_burst_size = 0;
 2390		qla24xx_post_gpdb_work(vha, ea->fcport, 0);
 2391		break;
 2392	default:
 2393		sp = ea->sp;
 2394		ql_dbg(ql_dbg_disc, vha, 0x2118,
 2395		       "%s %d %8phC priority %s, fc4type %x prev try %s\n",
 2396		       __func__, __LINE__, ea->fcport->port_name,
 2397		       vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
 2398		       "FCP" : "NVMe", ea->fcport->fc4_type,
 2399		       (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
 2400			"NVME" : "FCP");
 2401
 2402		if (NVME_FCP_TARGET(ea->fcport)) {
 2403			if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
 2404				ea->fcport->do_prli_nvme = 0;
 2405			else
 2406				ea->fcport->do_prli_nvme = 1;
 2407		} else {
 2408			ea->fcport->do_prli_nvme = 0;
 2409		}
 2410
 2411		if (N2N_TOPO(vha->hw)) {
 2412			if (ea->fcport->n2n_link_reset_cnt ==
 2413			    vha->hw->login_retry_count &&
 2414			    ea->fcport->flags & FCF_FCSP_DEVICE) {
 2415				/* remote authentication app just started */
 2416				ea->fcport->n2n_link_reset_cnt = 0;
 2417			}
 2418
 2419			if (ea->fcport->n2n_link_reset_cnt <
 2420			    vha->hw->login_retry_count) {
 2421				ea->fcport->n2n_link_reset_cnt++;
 2422				vha->relogin_jif = jiffies + 2 * HZ;
 2423				/*
 2424				 * PRLI failed. Reset link to kick start
 2425				 * state machine
 2426				 */
 2427				set_bit(N2N_LINK_RESET, &vha->dpc_flags);
 2428				qla2xxx_wake_dpc(vha);
 2429			} else {
 2430				ql_log(ql_log_warn, vha, 0x2119,
 2431				       "%s %d %8phC Unable to reconnect\n",
 2432				       __func__, __LINE__,
 2433				       ea->fcport->port_name);
 2434			}
 2435		} else {
 2436			/*
 2437			 * switch connect. login failed. Take connection down
 2438			 * and allow relogin to retrigger
 2439			 */
 2440			ea->fcport->flags &= ~FCF_ASYNC_SENT;
 2441			ea->fcport->keep_nport_handle = 0;
 2442			ea->fcport->logout_on_delete = 1;
 2443			qlt_schedule_sess_for_deletion(ea->fcport);
 2444		}
 2445		break;
 2446	}
 2447}
 2448
 2449void
 2450qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
 2451{
 2452	port_id_t cid;	/* conflict Nport id */
 2453	u16 lid;
 2454	struct fc_port *conflict_fcport;
 2455	unsigned long flags;
 2456	struct fc_port *fcport = ea->fcport;
 2457
 2458	ql_dbg(ql_dbg_disc, vha, 0xffff,
 2459	    "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
 2460	    __func__, fcport->port_name, fcport->disc_state,
 2461	    fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
 2462	    ea->sp->gen1, fcport->rscn_gen,
 2463	    ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
 2464
 2465	if (fcport->fw_login_state == DSC_LS_PLOGI_PEND) {
 2466		ql_dbg(ql_dbg_disc, vha, 0x20ea,
 2467		    "%s %d %8phC Remote is trying to login\n",
 2468		    __func__, __LINE__, fcport->port_name);
 2469		/*
 2470		 * If we get here, there is port thats already logged in,
 2471		 * but it's state has not moved ahead. Recheck with FW on
 2472		 * what state it is in and proceed ahead
 2473		 */
 2474		if (!N2N_TOPO(vha->hw)) {
 2475			fcport->fw_login_state = DSC_LS_PRLI_COMP;
 2476			qla24xx_post_gpdb_work(vha, fcport, 0);
 2477		}
 2478		return;
 2479	}
 2480
 2481	if (fcport->fw_login_state == DSC_LS_PRLI_PEND) {
 2482		ql_dbg(ql_dbg_disc, vha, 0x20ea,
 2483		    "%s %d %8phC Remote is trying to login\n",
 2484		    __func__, __LINE__, fcport->port_name);
 2485		return;
 2486	}
 2487
 2488	if ((fcport->disc_state == DSC_DELETE_PEND) ||
 2489	    (fcport->disc_state == DSC_DELETED)) {
 2490		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 2491		return;
 2492	}
 2493
 2494	if (ea->sp->gen2 != fcport->login_gen) {
 2495		/* target side must have changed it. */
 2496		ql_dbg(ql_dbg_disc, vha, 0x20d3,
 2497		    "%s %8phC generation changed\n",
 2498		    __func__, fcport->port_name);
 2499		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 2500		return;
 2501	} else if (ea->sp->gen1 != fcport->rscn_gen) {
 2502		ql_dbg(ql_dbg_disc, vha, 0x20d3,
 2503		    "%s %8phC RSCN generation changed\n",
 2504		    __func__, fcport->port_name);
 2505		qla_rscn_replay(fcport);
 2506		qlt_schedule_sess_for_deletion(fcport);
 2507		return;
 2508	}
 2509
 2510	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
 2511		  ea->data[0]);
 2512
 2513	switch (ea->data[0]) {
 2514	case MBS_COMMAND_COMPLETE:
 2515		/*
 2516		 * Driver must validate login state - If PRLI not complete,
 2517		 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
 2518		 * requests.
 2519		 */
 2520		if (vha->hw->flags.edif_enabled) {
 2521			set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
 2522			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 2523			ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
 2524			ea->fcport->logout_on_delete = 1;
 2525			ea->fcport->send_els_logo = 0;
 2526			ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
 2527			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 2528
 2529			qla24xx_post_gpdb_work(vha, ea->fcport, 0);
 2530		} else {
 2531			if (NVME_TARGET(vha->hw, fcport)) {
 2532				ql_dbg(ql_dbg_disc, vha, 0x2117,
 2533				    "%s %d %8phC post prli\n",
 2534				    __func__, __LINE__, fcport->port_name);
 2535				qla24xx_post_prli_work(vha, fcport);
 2536			} else {
 2537				ql_dbg(ql_dbg_disc, vha, 0x20ea,
 2538				    "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
 2539				    __func__, __LINE__, fcport->port_name,
 2540				    fcport->loop_id, fcport->d_id.b24);
 2541
 2542				set_bit(fcport->loop_id, vha->hw->loop_id_map);
 2543				spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 2544				fcport->chip_reset = vha->hw->base_qpair->chip_reset;
 2545				fcport->logout_on_delete = 1;
 2546				fcport->send_els_logo = 0;
 2547				fcport->fw_login_state = DSC_LS_PRLI_COMP;
 2548				spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 2549
 2550				qla24xx_post_gpdb_work(vha, fcport, 0);
 2551			}
 2552		}
 2553		break;
 2554	case MBS_COMMAND_ERROR:
 2555		ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
 2556		    __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
 2557
 2558		qlt_schedule_sess_for_deletion(ea->fcport);
 2559		break;
 2560	case MBS_LOOP_ID_USED:
 2561		/* data[1] = IO PARAM 1 = nport ID  */
 2562		cid.b.domain = (ea->iop[1] >> 16) & 0xff;
 2563		cid.b.area   = (ea->iop[1] >>  8) & 0xff;
 2564		cid.b.al_pa  = ea->iop[1] & 0xff;
 2565		cid.b.rsvd_1 = 0;
 2566
 2567		ql_dbg(ql_dbg_disc, vha, 0x20ec,
 2568		    "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
 2569		    __func__, __LINE__, ea->fcport->port_name,
 2570		    ea->fcport->loop_id, cid.b24);
 2571
 2572		set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
 2573		ea->fcport->loop_id = FC_NO_LOOP_ID;
 2574		qla24xx_post_gnl_work(vha, ea->fcport);
 2575		break;
 2576	case MBS_PORT_ID_USED:
 2577		lid = ea->iop[1] & 0xffff;
 2578		qlt_find_sess_invalidate_other(vha,
 2579		    wwn_to_u64(ea->fcport->port_name),
 2580		    ea->fcport->d_id, lid, &conflict_fcport);
 2581
 2582		if (conflict_fcport) {
 2583			/*
 2584			 * Another fcport share the same loop_id/nport id.
 2585			 * Conflict fcport needs to finish cleanup before this
 2586			 * fcport can proceed to login.
 2587			 */
 2588			conflict_fcport->conflict = ea->fcport;
 2589			ea->fcport->login_pause = 1;
 2590
 2591			ql_dbg(ql_dbg_disc, vha, 0x20ed,
 2592			    "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n",
 2593			    __func__, __LINE__, ea->fcport->port_name,
 2594			    ea->fcport->d_id.b24, lid);
 2595		} else {
 2596			ql_dbg(ql_dbg_disc, vha, 0x20ed,
 2597			    "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
 2598			    __func__, __LINE__, ea->fcport->port_name,
 2599			    ea->fcport->d_id.b24, lid);
 2600
 2601			qla2x00_clear_loop_id(ea->fcport);
 2602			set_bit(lid, vha->hw->loop_id_map);
 2603			ea->fcport->loop_id = lid;
 2604			ea->fcport->keep_nport_handle = 0;
 2605			ea->fcport->logout_on_delete = 1;
 2606			qlt_schedule_sess_for_deletion(ea->fcport);
 2607		}
 2608		break;
 2609	}
 2610	return;
 2611}
 2612
 2613/****************************************************************************/
 2614/*                QLogic ISP2x00 Hardware Support Functions.                */
 2615/****************************************************************************/
 2616
 2617static int
 2618qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
 2619{
 2620	int rval = QLA_SUCCESS;
 2621	struct qla_hw_data *ha = vha->hw;
 2622	uint32_t idc_major_ver, idc_minor_ver;
 2623	uint16_t config[4];
 2624
 2625	qla83xx_idc_lock(vha, 0);
 2626
 2627	/* SV: TODO: Assign initialization timeout from
 2628	 * flash-info / other param
 2629	 */
 2630	ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
 2631	ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
 2632
 2633	/* Set our fcoe function presence */
 2634	if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
 2635		ql_dbg(ql_dbg_p3p, vha, 0xb077,
 2636		    "Error while setting DRV-Presence.\n");
 2637		rval = QLA_FUNCTION_FAILED;
 2638		goto exit;
 2639	}
 2640
 2641	/* Decide the reset ownership */
 2642	qla83xx_reset_ownership(vha);
 2643
 2644	/*
 2645	 * On first protocol driver load:
 2646	 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
 2647	 * register.
 2648	 * Others: Check compatibility with current IDC Major version.
 2649	 */
 2650	qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
 2651	if (ha->flags.nic_core_reset_owner) {
 2652		/* Set IDC Major version */
 2653		idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
 2654		qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
 2655
 2656		/* Clearing IDC-Lock-Recovery register */
 2657		qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
 2658	} else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
 2659		/*
 2660		 * Clear further IDC participation if we are not compatible with
 2661		 * the current IDC Major Version.
 2662		 */
 2663		ql_log(ql_log_warn, vha, 0xb07d,
 2664		    "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
 2665		    idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
 2666		__qla83xx_clear_drv_presence(vha);
 2667		rval = QLA_FUNCTION_FAILED;
 2668		goto exit;
 2669	}
 2670	/* Each function sets its supported Minor version. */
 2671	qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
 2672	idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
 2673	qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
 2674
 2675	if (ha->flags.nic_core_reset_owner) {
 2676		memset(config, 0, sizeof(config));
 2677		if (!qla81xx_get_port_config(vha, config))
 2678			qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
 2679			    QLA8XXX_DEV_READY);
 2680	}
 2681
 2682	rval = qla83xx_idc_state_handler(vha);
 2683
 2684exit:
 2685	qla83xx_idc_unlock(vha, 0);
 2686
 2687	return rval;
 2688}
 2689
 2690void qla_enable_fce_trace(scsi_qla_host_t *vha)
 2691{
 2692	int rval;
 2693	struct qla_hw_data *ha = vha->hw;
 2694
 2695	if (ha->fce) {
 2696		ha->flags.fce_enabled = 1;
 2697		memset(ha->fce, 0, fce_calc_size(ha->fce_bufs));
 2698		rval = qla2x00_enable_fce_trace(vha,
 2699		    ha->fce_dma, ha->fce_bufs, ha->fce_mb, &ha->fce_bufs);
 2700
 2701		if (rval) {
 2702			ql_log(ql_log_warn, vha, 0x8033,
 2703			    "Unable to reinitialize FCE (%d).\n", rval);
 2704			ha->flags.fce_enabled = 0;
 2705		}
 2706	}
 2707}
 2708
 2709static void qla_enable_eft_trace(scsi_qla_host_t *vha)
 2710{
 2711	int rval;
 2712	struct qla_hw_data *ha = vha->hw;
 2713
 2714	if (ha->eft) {
 2715		memset(ha->eft, 0, EFT_SIZE);
 2716		rval = qla2x00_enable_eft_trace(vha, ha->eft_dma, EFT_NUM_BUFFERS);
 2717
 2718		if (rval) {
 2719			ql_log(ql_log_warn, vha, 0x8034,
 2720			    "Unable to reinitialize EFT (%d).\n", rval);
 2721		}
 2722	}
 2723}
 2724/*
 2725* qla2x00_initialize_adapter
 2726*      Initialize board.
 2727*
 2728* Input:
 2729*      ha = adapter block pointer.
 2730*
 2731* Returns:
 2732*      0 = success
 2733*/
 2734int
 2735qla2x00_initialize_adapter(scsi_qla_host_t *vha)
 2736{
 2737	int	rval;
 2738	struct qla_hw_data *ha = vha->hw;
 2739	struct req_que *req = ha->req_q_map[0];
 2740	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 2741
 2742	memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
 2743	memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
 2744
 2745	/* Clear adapter flags. */
 2746	vha->flags.online = 0;
 2747	ha->flags.chip_reset_done = 0;
 2748	vha->flags.reset_active = 0;
 2749	ha->flags.pci_channel_io_perm_failure = 0;
 2750	ha->flags.eeh_busy = 0;
 2751	vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
 2752	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
 2753	atomic_set(&vha->loop_state, LOOP_DOWN);
 2754	vha->device_flags = DFLG_NO_CABLE;
 2755	vha->dpc_flags = 0;
 2756	vha->flags.management_server_logged_in = 0;
 2757	vha->marker_needed = 0;
 2758	ha->isp_abort_cnt = 0;
 2759	ha->beacon_blink_led = 0;
 2760
 2761	set_bit(0, ha->req_qid_map);
 2762	set_bit(0, ha->rsp_qid_map);
 2763
 2764	ql_dbg(ql_dbg_init, vha, 0x0040,
 2765	    "Configuring PCI space...\n");
 2766	rval = ha->isp_ops->pci_config(vha);
 2767	if (rval) {
 2768		ql_log(ql_log_warn, vha, 0x0044,
 2769		    "Unable to configure PCI space.\n");
 2770		return (rval);
 2771	}
 2772
 2773	ha->isp_ops->reset_chip(vha);
 2774
 2775	/* Check for secure flash support */
 2776	if (IS_QLA28XX(ha)) {
 2777		if (rd_reg_word(&reg->mailbox12) & BIT_0)
 2778			ha->flags.secure_adapter = 1;
 2779		ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
 2780		    (ha->flags.secure_adapter) ? "Yes" : "No");
 2781	}
 2782
 2783
 2784	rval = qla2xxx_get_flash_info(vha);
 2785	if (rval) {
 2786		ql_log(ql_log_fatal, vha, 0x004f,
 2787		    "Unable to validate FLASH data.\n");
 2788		return rval;
 2789	}
 2790
 2791	if (IS_QLA8044(ha)) {
 2792		qla8044_read_reset_template(vha);
 2793
 2794		/* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
 2795		 * If DONRESET_BIT0 is set, drivers should not set dev_state
 2796		 * to NEED_RESET. But if NEED_RESET is set, drivers should
 2797		 * should honor the reset. */
 2798		if (ql2xdontresethba == 1)
 2799			qla8044_set_idc_dontreset(vha);
 2800	}
 2801
 2802	ha->isp_ops->get_flash_version(vha, req->ring);
 2803	ql_dbg(ql_dbg_init, vha, 0x0061,
 2804	    "Configure NVRAM parameters...\n");
 2805
 2806	/* Let priority default to FCP, can be overridden by nvram_config */
 2807	ha->fc4_type_priority = FC4_PRIORITY_FCP;
 2808
 2809	ha->isp_ops->nvram_config(vha);
 2810
 2811	if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
 2812	    ha->fc4_type_priority != FC4_PRIORITY_NVME)
 2813		ha->fc4_type_priority = FC4_PRIORITY_FCP;
 2814
 2815	ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
 2816	       ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
 2817
 2818	if (ha->flags.disable_serdes) {
 2819		/* Mask HBA via NVRAM settings? */
 2820		ql_log(ql_log_info, vha, 0x0077,
 2821		    "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
 2822		return QLA_FUNCTION_FAILED;
 2823	}
 2824
 2825	ql_dbg(ql_dbg_init, vha, 0x0078,
 2826	    "Verifying loaded RISC code...\n");
 2827
 2828	/* If smartsan enabled then require fdmi and rdp enabled */
 2829	if (ql2xsmartsan) {
 2830		ql2xfdmienable = 1;
 2831		ql2xrdpenable = 1;
 2832	}
 2833
 2834	if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
 2835		rval = ha->isp_ops->chip_diag(vha);
 2836		if (rval)
 2837			return (rval);
 2838		rval = qla2x00_setup_chip(vha);
 2839		if (rval)
 2840			return (rval);
 2841	}
 2842
 2843	if (IS_QLA84XX(ha)) {
 2844		ha->cs84xx = qla84xx_get_chip(vha);
 2845		if (!ha->cs84xx) {
 2846			ql_log(ql_log_warn, vha, 0x00d0,
 2847			    "Unable to configure ISP84XX.\n");
 2848			return QLA_FUNCTION_FAILED;
 2849		}
 2850	}
 2851
 2852	if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
 2853		rval = qla2x00_init_rings(vha);
 2854
 2855	/* No point in continuing if firmware initialization failed. */
 2856	if (rval != QLA_SUCCESS)
 2857		return rval;
 2858
 2859	ha->flags.chip_reset_done = 1;
 2860
 2861	if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
 2862		/* Issue verify 84xx FW IOCB to complete 84xx initialization */
 2863		rval = qla84xx_init_chip(vha);
 2864		if (rval != QLA_SUCCESS) {
 2865			ql_log(ql_log_warn, vha, 0x00d4,
 2866			    "Unable to initialize ISP84XX.\n");
 2867			qla84xx_put_chip(vha);
 2868		}
 2869	}
 2870
 2871	/* Load the NIC Core f/w if we are the first protocol driver. */
 2872	if (IS_QLA8031(ha)) {
 2873		rval = qla83xx_nic_core_fw_load(vha);
 2874		if (rval)
 2875			ql_log(ql_log_warn, vha, 0x0124,
 2876			    "Error in initializing NIC Core f/w.\n");
 2877	}
 2878
 2879	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
 2880		qla24xx_read_fcp_prio_cfg(vha);
 2881
 2882	if (IS_P3P_TYPE(ha))
 2883		qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
 2884	else
 2885		qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
 2886
 2887	return (rval);
 2888}
 2889
 2890/**
 2891 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
 2892 * @vha: HA context
 2893 *
 2894 * Returns 0 on success.
 2895 */
 2896int
 2897qla2100_pci_config(scsi_qla_host_t *vha)
 2898{
 2899	uint16_t w;
 2900	unsigned long flags;
 2901	struct qla_hw_data *ha = vha->hw;
 2902	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 2903
 2904	pci_set_master(ha->pdev);
 2905	pci_try_set_mwi(ha->pdev);
 2906
 2907	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
 2908	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
 2909	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
 2910
 2911	pci_disable_rom(ha->pdev);
 2912
 2913	/* Get PCI bus information. */
 2914	spin_lock_irqsave(&ha->hardware_lock, flags);
 2915	ha->pci_attr = rd_reg_word(&reg->ctrl_status);
 2916	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 2917
 2918	return QLA_SUCCESS;
 2919}
 2920
 2921/**
 2922 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
 2923 * @vha: HA context
 2924 *
 2925 * Returns 0 on success.
 2926 */
 2927int
 2928qla2300_pci_config(scsi_qla_host_t *vha)
 2929{
 2930	uint16_t	w;
 2931	unsigned long   flags = 0;
 2932	uint32_t	cnt;
 2933	struct qla_hw_data *ha = vha->hw;
 2934	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 2935
 2936	pci_set_master(ha->pdev);
 2937	pci_try_set_mwi(ha->pdev);
 2938
 2939	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
 2940	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
 2941
 2942	if (IS_QLA2322(ha) || IS_QLA6322(ha))
 2943		w &= ~PCI_COMMAND_INTX_DISABLE;
 2944	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
 2945
 2946	/*
 2947	 * If this is a 2300 card and not 2312, reset the
 2948	 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
 2949	 * the 2310 also reports itself as a 2300 so we need to get the
 2950	 * fb revision level -- a 6 indicates it really is a 2300 and
 2951	 * not a 2310.
 2952	 */
 2953	if (IS_QLA2300(ha)) {
 2954		spin_lock_irqsave(&ha->hardware_lock, flags);
 2955
 2956		/* Pause RISC. */
 2957		wrt_reg_word(&reg->hccr, HCCR_PAUSE_RISC);
 2958		for (cnt = 0; cnt < 30000; cnt++) {
 2959			if ((rd_reg_word(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
 2960				break;
 2961
 2962			udelay(10);
 2963		}
 2964
 2965		/* Select FPM registers. */
 2966		wrt_reg_word(&reg->ctrl_status, 0x20);
 2967		rd_reg_word(&reg->ctrl_status);
 2968
 2969		/* Get the fb rev level */
 2970		ha->fb_rev = RD_FB_CMD_REG(ha, reg);
 2971
 2972		if (ha->fb_rev == FPM_2300)
 2973			pci_clear_mwi(ha->pdev);
 2974
 2975		/* Deselect FPM registers. */
 2976		wrt_reg_word(&reg->ctrl_status, 0x0);
 2977		rd_reg_word(&reg->ctrl_status);
 2978
 2979		/* Release RISC module. */
 2980		wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
 2981		for (cnt = 0; cnt < 30000; cnt++) {
 2982			if ((rd_reg_word(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
 2983				break;
 2984
 2985			udelay(10);
 2986		}
 2987
 2988		spin_unlock_irqrestore(&ha->hardware_lock, flags);
 2989	}
 2990
 2991	pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
 2992
 2993	pci_disable_rom(ha->pdev);
 2994
 2995	/* Get PCI bus information. */
 2996	spin_lock_irqsave(&ha->hardware_lock, flags);
 2997	ha->pci_attr = rd_reg_word(&reg->ctrl_status);
 2998	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 2999
 3000	return QLA_SUCCESS;
 3001}
 3002
 3003/**
 3004 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
 3005 * @vha: HA context
 3006 *
 3007 * Returns 0 on success.
 3008 */
 3009int
 3010qla24xx_pci_config(scsi_qla_host_t *vha)
 3011{
 3012	uint16_t w;
 3013	unsigned long flags = 0;
 3014	struct qla_hw_data *ha = vha->hw;
 3015	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 3016
 3017	pci_set_master(ha->pdev);
 3018	pci_try_set_mwi(ha->pdev);
 3019
 3020	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
 3021	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
 3022	w &= ~PCI_COMMAND_INTX_DISABLE;
 3023	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
 3024
 3025	pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
 3026
 3027	/* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
 3028	if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
 3029		pcix_set_mmrbc(ha->pdev, 2048);
 3030
 3031	/* PCIe -- adjust Maximum Read Request Size (2048). */
 3032	if (pci_is_pcie(ha->pdev))
 3033		pcie_set_readrq(ha->pdev, 4096);
 3034
 3035	pci_disable_rom(ha->pdev);
 3036
 3037	ha->chip_revision = ha->pdev->revision;
 3038
 3039	/* Get PCI bus information. */
 3040	spin_lock_irqsave(&ha->hardware_lock, flags);
 3041	ha->pci_attr = rd_reg_dword(&reg->ctrl_status);
 3042	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 3043
 3044	return QLA_SUCCESS;
 3045}
 3046
 3047/**
 3048 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
 3049 * @vha: HA context
 3050 *
 3051 * Returns 0 on success.
 3052 */
 3053int
 3054qla25xx_pci_config(scsi_qla_host_t *vha)
 3055{
 3056	uint16_t w;
 3057	struct qla_hw_data *ha = vha->hw;
 3058
 3059	pci_set_master(ha->pdev);
 3060	pci_try_set_mwi(ha->pdev);
 3061
 3062	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
 3063	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
 3064	w &= ~PCI_COMMAND_INTX_DISABLE;
 3065	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
 3066
 3067	/* PCIe -- adjust Maximum Read Request Size (2048). */
 3068	if (pci_is_pcie(ha->pdev))
 3069		pcie_set_readrq(ha->pdev, 4096);
 3070
 3071	pci_disable_rom(ha->pdev);
 3072
 3073	ha->chip_revision = ha->pdev->revision;
 3074
 3075	return QLA_SUCCESS;
 3076}
 3077
 3078/**
 3079 * qla2x00_isp_firmware() - Choose firmware image.
 3080 * @vha: HA context
 3081 *
 3082 * Returns 0 on success.
 3083 */
 3084static int
 3085qla2x00_isp_firmware(scsi_qla_host_t *vha)
 3086{
 3087	int  rval;
 3088	uint16_t loop_id, topo, sw_cap;
 3089	uint8_t domain, area, al_pa;
 3090	struct qla_hw_data *ha = vha->hw;
 3091
 3092	/* Assume loading risc code */
 3093	rval = QLA_FUNCTION_FAILED;
 3094
 3095	if (ha->flags.disable_risc_code_load) {
 3096		ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
 3097
 3098		/* Verify checksum of loaded RISC code. */
 3099		rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
 3100		if (rval == QLA_SUCCESS) {
 3101			/* And, verify we are not in ROM code. */
 3102			rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
 3103			    &area, &domain, &topo, &sw_cap);
 3104		}
 3105	}
 3106
 3107	if (rval)
 3108		ql_dbg(ql_dbg_init, vha, 0x007a,
 3109		    "**** Load RISC code ****.\n");
 3110
 3111	return (rval);
 3112}
 3113
 3114/**
 3115 * qla2x00_reset_chip() - Reset ISP chip.
 3116 * @vha: HA context
 3117 *
 3118 * Returns 0 on success.
 3119 */
 3120int
 3121qla2x00_reset_chip(scsi_qla_host_t *vha)
 3122{
 3123	unsigned long   flags = 0;
 3124	struct qla_hw_data *ha = vha->hw;
 3125	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 3126	uint32_t	cnt;
 3127	uint16_t	cmd;
 3128	int rval = QLA_FUNCTION_FAILED;
 3129
 3130	if (unlikely(pci_channel_offline(ha->pdev)))
 3131		return rval;
 3132
 3133	ha->isp_ops->disable_intrs(ha);
 3134
 3135	spin_lock_irqsave(&ha->hardware_lock, flags);
 3136
 3137	/* Turn off master enable */
 3138	cmd = 0;
 3139	pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
 3140	cmd &= ~PCI_COMMAND_MASTER;
 3141	pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
 3142
 3143	if (!IS_QLA2100(ha)) {
 3144		/* Pause RISC. */
 3145		wrt_reg_word(&reg->hccr, HCCR_PAUSE_RISC);
 3146		if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
 3147			for (cnt = 0; cnt < 30000; cnt++) {
 3148				if ((rd_reg_word(&reg->hccr) &
 3149				    HCCR_RISC_PAUSE) != 0)
 3150					break;
 3151				udelay(100);
 3152			}
 3153		} else {
 3154			rd_reg_word(&reg->hccr);	/* PCI Posting. */
 3155			udelay(10);
 3156		}
 3157
 3158		/* Select FPM registers. */
 3159		wrt_reg_word(&reg->ctrl_status, 0x20);
 3160		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */
 3161
 3162		/* FPM Soft Reset. */
 3163		wrt_reg_word(&reg->fpm_diag_config, 0x100);
 3164		rd_reg_word(&reg->fpm_diag_config);	/* PCI Posting. */
 3165
 3166		/* Toggle Fpm Reset. */
 3167		if (!IS_QLA2200(ha)) {
 3168			wrt_reg_word(&reg->fpm_diag_config, 0x0);
 3169			rd_reg_word(&reg->fpm_diag_config); /* PCI Posting. */
 3170		}
 3171
 3172		/* Select frame buffer registers. */
 3173		wrt_reg_word(&reg->ctrl_status, 0x10);
 3174		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */
 3175
 3176		/* Reset frame buffer FIFOs. */
 3177		if (IS_QLA2200(ha)) {
 3178			WRT_FB_CMD_REG(ha, reg, 0xa000);
 3179			RD_FB_CMD_REG(ha, reg);		/* PCI Posting. */
 3180		} else {
 3181			WRT_FB_CMD_REG(ha, reg, 0x00fc);
 3182
 3183			/* Read back fb_cmd until zero or 3 seconds max */
 3184			for (cnt = 0; cnt < 3000; cnt++) {
 3185				if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
 3186					break;
 3187				udelay(100);
 3188			}
 3189		}
 3190
 3191		/* Select RISC module registers. */
 3192		wrt_reg_word(&reg->ctrl_status, 0);
 3193		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */
 3194
 3195		/* Reset RISC processor. */
 3196		wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
 3197		rd_reg_word(&reg->hccr);		/* PCI Posting. */
 3198
 3199		/* Release RISC processor. */
 3200		wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
 3201		rd_reg_word(&reg->hccr);		/* PCI Posting. */
 3202	}
 3203
 3204	wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
 3205	wrt_reg_word(&reg->hccr, HCCR_CLR_HOST_INT);
 3206
 3207	/* Reset ISP chip. */
 3208	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
 3209
 3210	/* Wait for RISC to recover from reset. */
 3211	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
 3212		/*
 3213		 * It is necessary to for a delay here since the card doesn't
 3214		 * respond to PCI reads during a reset. On some architectures
 3215		 * this will result in an MCA.
 3216		 */
 3217		udelay(20);
 3218		for (cnt = 30000; cnt; cnt--) {
 3219			if ((rd_reg_word(&reg->ctrl_status) &
 3220			    CSR_ISP_SOFT_RESET) == 0)
 3221				break;
 3222			udelay(100);
 3223		}
 3224	} else
 3225		udelay(10);
 3226
 3227	/* Reset RISC processor. */
 3228	wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
 3229
 3230	wrt_reg_word(&reg->semaphore, 0);
 3231
 3232	/* Release RISC processor. */
 3233	wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
 3234	rd_reg_word(&reg->hccr);			/* PCI Posting. */
 3235
 3236	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
 3237		for (cnt = 0; cnt < 30000; cnt++) {
 3238			if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
 3239				break;
 3240
 3241			udelay(100);
 3242		}
 3243	} else
 3244		udelay(100);
 3245
 3246	/* Turn on master enable */
 3247	cmd |= PCI_COMMAND_MASTER;
 3248	pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
 3249
 3250	/* Disable RISC pause on FPM parity error. */
 3251	if (!IS_QLA2100(ha)) {
 3252		wrt_reg_word(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
 3253		rd_reg_word(&reg->hccr);		/* PCI Posting. */
 3254	}
 3255
 3256	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 3257
 3258	return QLA_SUCCESS;
 3259}
 3260
 3261/**
 3262 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
 3263 * @vha: HA context
 3264 *
 3265 * Returns 0 on success.
 3266 */
 3267static int
 3268qla81xx_reset_mpi(scsi_qla_host_t *vha)
 3269{
 3270	uint16_t mb[4] = {0x1010, 0, 1, 0};
 3271
 3272	if (!IS_QLA81XX(vha->hw))
 3273		return QLA_SUCCESS;
 3274
 3275	return qla81xx_write_mpi_register(vha, mb);
 3276}
 3277
 3278static int
 3279qla_chk_risc_recovery(scsi_qla_host_t *vha)
 3280{
 3281	struct qla_hw_data *ha = vha->hw;
 3282	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 3283	__le16 __iomem *mbptr = &reg->mailbox0;
 3284	int i;
 3285	u16 mb[32];
 3286	int rc = QLA_SUCCESS;
 3287
 3288	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
 3289		return rc;
 3290
 3291	/* this check is only valid after RISC reset */
 3292	mb[0] = rd_reg_word(mbptr);
 3293	mbptr++;
 3294	if (mb[0] == 0xf) {
 3295		rc = QLA_FUNCTION_FAILED;
 3296
 3297		for (i = 1; i < 32; i++) {
 3298			mb[i] = rd_reg_word(mbptr);
 3299			mbptr++;
 3300		}
 3301
 3302		ql_log(ql_log_warn, vha, 0x1015,
 3303		       "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
 3304		       mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
 3305		ql_log(ql_log_warn, vha, 0x1015,
 3306		       "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
 3307		       mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
 3308		       mb[15]);
 3309		ql_log(ql_log_warn, vha, 0x1015,
 3310		       "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
 3311		       mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
 3312		       mb[23]);
 3313		ql_log(ql_log_warn, vha, 0x1015,
 3314		       "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
 3315		       mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
 3316		       mb[31]);
 3317	}
 3318	return rc;
 3319}
 3320
 3321/**
 3322 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
 3323 * @vha: HA context
 3324 *
 3325 * Returns 0 on success.
 3326 */
 3327static inline int
 3328qla24xx_reset_risc(scsi_qla_host_t *vha)
 3329{
 3330	unsigned long flags = 0;
 3331	struct qla_hw_data *ha = vha->hw;
 3332	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 3333	uint32_t cnt;
 3334	uint16_t wd;
 3335	static int abts_cnt; /* ISP abort retry counts */
 3336	int rval = QLA_SUCCESS;
 3337	int print = 1;
 3338
 3339	spin_lock_irqsave(&ha->hardware_lock, flags);
 3340
 3341	/* Reset RISC. */
 3342	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
 3343	for (cnt = 0; cnt < 30000; cnt++) {
 3344		if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
 3345			break;
 3346
 3347		udelay(10);
 3348	}
 3349
 3350	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
 3351		set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
 3352
 3353	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
 3354	    "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
 3355	    rd_reg_dword(&reg->hccr),
 3356	    rd_reg_dword(&reg->ctrl_status),
 3357	    (rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
 3358
 3359	wrt_reg_dword(&reg->ctrl_status,
 3360	    CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
 3361	pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
 3362
 3363	udelay(100);
 3364
 3365	/* Wait for firmware to complete NVRAM accesses. */
 3366	rd_reg_word(&reg->mailbox0);
 3367	for (cnt = 10000; rd_reg_word(&reg->mailbox0) != 0 &&
 3368	    rval == QLA_SUCCESS; cnt--) {
 3369		barrier();
 3370		if (cnt)
 3371			udelay(5);
 3372		else
 3373			rval = QLA_FUNCTION_TIMEOUT;
 3374	}
 3375
 3376	if (rval == QLA_SUCCESS)
 3377		set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
 3378
 3379	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
 3380	    "HCCR: 0x%x, MailBox0 Status 0x%x\n",
 3381	    rd_reg_dword(&reg->hccr),
 3382	    rd_reg_word(&reg->mailbox0));
 3383
 3384	/* Wait for soft-reset to complete. */
 3385	rd_reg_dword(&reg->ctrl_status);
 3386	for (cnt = 0; cnt < 60; cnt++) {
 3387		barrier();
 3388		if ((rd_reg_dword(&reg->ctrl_status) &
 3389		    CSRX_ISP_SOFT_RESET) == 0)
 3390			break;
 3391
 3392		udelay(5);
 3393	}
 3394	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
 3395		set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
 3396
 3397	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
 3398	    "HCCR: 0x%x, Soft Reset status: 0x%x\n",
 3399	    rd_reg_dword(&reg->hccr),
 3400	    rd_reg_dword(&reg->ctrl_status));
 3401
 3402	/* If required, do an MPI FW reset now */
 3403	if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
 3404		if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
 3405			if (++abts_cnt < 5) {
 3406				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 3407				set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
 3408			} else {
 3409				/*
 3410				 * We exhausted the ISP abort retries. We have to
 3411				 * set the board offline.
 3412				 */
 3413				abts_cnt = 0;
 3414				vha->flags.online = 0;
 3415			}
 3416		}
 3417	}
 3418
 3419	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);
 3420	rd_reg_dword(&reg->hccr);
 3421
 3422	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);
 3423	rd_reg_dword(&reg->hccr);
 3424
 3425	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET);
 3426	mdelay(10);
 3427	rd_reg_dword(&reg->hccr);
 3428
 3429	wd = rd_reg_word(&reg->mailbox0);
 3430	for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
 3431		barrier();
 3432		if (cnt) {
 3433			mdelay(1);
 3434			if (print && qla_chk_risc_recovery(vha))
 3435				print = 0;
 3436
 3437			wd = rd_reg_word(&reg->mailbox0);
 3438		} else {
 3439			rval = QLA_FUNCTION_TIMEOUT;
 3440
 3441			ql_log(ql_log_warn, vha, 0x015e,
 3442			       "RISC reset timeout\n");
 3443		}
 3444	}
 3445
 3446	if (rval == QLA_SUCCESS)
 3447		set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
 3448
 3449	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
 3450	    "Host Risc 0x%x, mailbox0 0x%x\n",
 3451	    rd_reg_dword(&reg->hccr),
 3452	     rd_reg_word(&reg->mailbox0));
 3453
 3454	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 3455
 3456	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
 3457	    "Driver in %s mode\n",
 3458	    IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
 3459
 3460	if (IS_NOPOLLING_TYPE(ha))
 3461		ha->isp_ops->enable_intrs(ha);
 3462
 3463	return rval;
 3464}
 3465
 3466static void
 3467qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
 3468{
 3469	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
 3470
 3471	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
 3472	*data = rd_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
 3473}
 3474
 3475static void
 3476qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
 3477{
 3478	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
 3479
 3480	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
 3481	wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
 3482}
 3483
 3484static void
 3485qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
 3486{
 3487	uint32_t wd32 = 0;
 3488	uint delta_msec = 100;
 3489	uint elapsed_msec = 0;
 3490	uint timeout_msec;
 3491	ulong n;
 3492
 3493	if (vha->hw->pdev->subsystem_device != 0x0175 &&
 3494	    vha->hw->pdev->subsystem_device != 0x0240)
 3495		return;
 3496
 3497	wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
 3498	udelay(100);
 3499
 3500attempt:
 3501	timeout_msec = TIMEOUT_SEMAPHORE;
 3502	n = timeout_msec / delta_msec;
 3503	while (n--) {
 3504		qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
 3505		qla25xx_read_risc_sema_reg(vha, &wd32);
 3506		if (wd32 & RISC_SEMAPHORE)
 3507			break;
 3508		msleep(delta_msec);
 3509		elapsed_msec += delta_msec;
 3510		if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
 3511			goto force;
 3512	}
 3513
 3514	if (!(wd32 & RISC_SEMAPHORE))
 3515		goto force;
 3516
 3517	if (!(wd32 & RISC_SEMAPHORE_FORCE))
 3518		goto acquired;
 3519
 3520	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
 3521	timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
 3522	n = timeout_msec / delta_msec;
 3523	while (n--) {
 3524		qla25xx_read_risc_sema_reg(vha, &wd32);
 3525		if (!(wd32 & RISC_SEMAPHORE_FORCE))
 3526			break;
 3527		msleep(delta_msec);
 3528		elapsed_msec += delta_msec;
 3529		if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
 3530			goto force;
 3531	}
 3532
 3533	if (wd32 & RISC_SEMAPHORE_FORCE)
 3534		qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
 3535
 3536	goto attempt;
 3537
 3538force:
 3539	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
 3540
 3541acquired:
 3542	return;
 3543}
 3544
 3545/**
 3546 * qla24xx_reset_chip() - Reset ISP24xx chip.
 3547 * @vha: HA context
 3548 *
 3549 * Returns 0 on success.
 3550 */
 3551int
 3552qla24xx_reset_chip(scsi_qla_host_t *vha)
 3553{
 3554	struct qla_hw_data *ha = vha->hw;
 3555	int rval = QLA_FUNCTION_FAILED;
 3556
 3557	if (pci_channel_offline(ha->pdev) &&
 3558	    ha->flags.pci_channel_io_perm_failure) {
 3559		return rval;
 3560	}
 3561
 3562	ha->isp_ops->disable_intrs(ha);
 3563
 3564	qla25xx_manipulate_risc_semaphore(vha);
 3565
 3566	/* Perform RISC reset. */
 3567	rval = qla24xx_reset_risc(vha);
 3568
 3569	return rval;
 3570}
 3571
 3572/**
 3573 * qla2x00_chip_diag() - Test chip for proper operation.
 3574 * @vha: HA context
 3575 *
 3576 * Returns 0 on success.
 3577 */
 3578int
 3579qla2x00_chip_diag(scsi_qla_host_t *vha)
 3580{
 3581	int		rval;
 3582	struct qla_hw_data *ha = vha->hw;
 3583	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 3584	unsigned long	flags = 0;
 3585	uint16_t	data;
 3586	uint32_t	cnt;
 3587	uint16_t	mb[5];
 3588	struct req_que *req = ha->req_q_map[0];
 3589
 3590	/* Assume a failed state */
 3591	rval = QLA_FUNCTION_FAILED;
 3592
 3593	ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
 3594	       &reg->flash_address);
 3595
 3596	spin_lock_irqsave(&ha->hardware_lock, flags);
 3597
 3598	/* Reset ISP chip. */
 3599	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
 3600
 3601	/*
 3602	 * We need to have a delay here since the card will not respond while
 3603	 * in reset causing an MCA on some architectures.
 3604	 */
 3605	udelay(20);
 3606	data = qla2x00_debounce_register(&reg->ctrl_status);
 3607	for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
 3608		udelay(5);
 3609		data = rd_reg_word(&reg->ctrl_status);
 3610		barrier();
 3611	}
 3612
 3613	if (!cnt)
 3614		goto chip_diag_failed;
 3615
 3616	ql_dbg(ql_dbg_init, vha, 0x007c,
 3617	    "Reset register cleared by chip reset.\n");
 3618
 3619	/* Reset RISC processor. */
 3620	wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
 3621	wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
 3622
 3623	/* Workaround for QLA2312 PCI parity error */
 3624	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
 3625		data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
 3626		for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
 3627			udelay(5);
 3628			data = RD_MAILBOX_REG(ha, reg, 0);
 3629			barrier();
 3630		}
 3631	} else
 3632		udelay(10);
 3633
 3634	if (!cnt)
 3635		goto chip_diag_failed;
 3636
 3637	/* Check product ID of chip */
 3638	ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
 3639
 3640	mb[1] = RD_MAILBOX_REG(ha, reg, 1);
 3641	mb[2] = RD_MAILBOX_REG(ha, reg, 2);
 3642	mb[3] = RD_MAILBOX_REG(ha, reg, 3);
 3643	mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
 3644	if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
 3645	    mb[3] != PROD_ID_3) {
 3646		ql_log(ql_log_warn, vha, 0x0062,
 3647		    "Wrong product ID = 0x%x,0x%x,0x%x.\n",
 3648		    mb[1], mb[2], mb[3]);
 3649
 3650		goto chip_diag_failed;
 3651	}
 3652	ha->product_id[0] = mb[1];
 3653	ha->product_id[1] = mb[2];
 3654	ha->product_id[2] = mb[3];
 3655	ha->product_id[3] = mb[4];
 3656
 3657	/* Adjust fw RISC transfer size */
 3658	if (req->length > 1024)
 3659		ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
 3660	else
 3661		ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
 3662		    req->length;
 3663
 3664	if (IS_QLA2200(ha) &&
 3665	    RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
 3666		/* Limit firmware transfer size with a 2200A */
 3667		ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
 3668
 3669		ha->device_type |= DT_ISP2200A;
 3670		ha->fw_transfer_size = 128;
 3671	}
 3672
 3673	/* Wrap Incoming Mailboxes Test. */
 3674	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 3675
 3676	ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
 3677	rval = qla2x00_mbx_reg_test(vha);
 3678	if (rval)
 3679		ql_log(ql_log_warn, vha, 0x0080,
 3680		    "Failed mailbox send register test.\n");
 3681	else
 3682		/* Flag a successful rval */
 3683		rval = QLA_SUCCESS;
 3684	spin_lock_irqsave(&ha->hardware_lock, flags);
 3685
 3686chip_diag_failed:
 3687	if (rval)
 3688		ql_log(ql_log_info, vha, 0x0081,
 3689		    "Chip diagnostics **** FAILED ****.\n");
 3690
 3691	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 3692
 3693	return (rval);
 3694}
 3695
 3696/**
 3697 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
 3698 * @vha: HA context
 3699 *
 3700 * Returns 0 on success.
 3701 */
 3702int
 3703qla24xx_chip_diag(scsi_qla_host_t *vha)
 3704{
 3705	int rval;
 3706	struct qla_hw_data *ha = vha->hw;
 3707	struct req_que *req = ha->req_q_map[0];
 3708
 3709	if (IS_P3P_TYPE(ha))
 3710		return QLA_SUCCESS;
 3711
 3712	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
 3713
 3714	rval = qla2x00_mbx_reg_test(vha);
 3715	if (rval) {
 3716		ql_log(ql_log_warn, vha, 0x0082,
 3717		    "Failed mailbox send register test.\n");
 3718	} else {
 3719		/* Flag a successful rval */
 3720		rval = QLA_SUCCESS;
 3721	}
 3722
 3723	return rval;
 3724}
 3725
 3726int qla2x00_alloc_fce_trace(scsi_qla_host_t *vha)
 3727{
 3728	dma_addr_t tc_dma;
 3729	void *tc;
 3730	struct qla_hw_data *ha = vha->hw;
 3731
 3732	if (!IS_FWI2_CAPABLE(ha))
 3733		return -EINVAL;
 3734
 3735	if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
 3736	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
 3737		return -EINVAL;
 3738
 3739	if (ha->fce) {
 3740		ql_dbg(ql_dbg_init, vha, 0x00bd,
 3741		       "%s: FCE Mem is already allocated.\n",
 3742		       __func__);
 3743		return -EIO;
 3744	}
 3745
 3746	/* Allocate memory for Fibre Channel Event Buffer. */
 3747	tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
 3748				GFP_KERNEL);
 3749	if (!tc) {
 3750		ql_log(ql_log_warn, vha, 0x00be,
 3751		       "Unable to allocate (%d KB) for FCE.\n",
 3752		       FCE_SIZE / 1024);
 3753		return -ENOMEM;
 3754	}
 3755
 3756	ql_dbg(ql_dbg_init, vha, 0x00c0,
 3757	       "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
 3758
 3759	ha->fce_dma = tc_dma;
 3760	ha->fce = tc;
 3761	ha->fce_bufs = FCE_NUM_BUFFERS;
 3762	return 0;
 3763}
 3764
 3765void qla2x00_free_fce_trace(struct qla_hw_data *ha)
 3766{
 3767	if (!ha->fce)
 3768		return;
 3769	dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, ha->fce_dma);
 3770	ha->fce = NULL;
 3771	ha->fce_dma = 0;
 3772}
 3773
 3774static void
 3775qla2x00_alloc_eft_trace(scsi_qla_host_t *vha)
 3776{
 3777	dma_addr_t tc_dma;
 3778	void *tc;
 3779	struct qla_hw_data *ha = vha->hw;
 3780
 3781	if (!IS_FWI2_CAPABLE(ha))
 3782		return;
 3783
 3784	if (ha->eft) {
 3785		ql_dbg(ql_dbg_init, vha, 0x00bd,
 3786		    "%s: EFT Mem is already allocated.\n",
 3787		    __func__);
 3788		return;
 3789	}
 3790
 3791	/* Allocate memory for Extended Trace Buffer. */
 3792	tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
 3793				GFP_KERNEL);
 3794	if (!tc) {
 3795		ql_log(ql_log_warn, vha, 0x00c1,
 3796		       "Unable to allocate (%d KB) for EFT.\n",
 3797		       EFT_SIZE / 1024);
 3798		return;
 3799	}
 3800
 3801	ql_dbg(ql_dbg_init, vha, 0x00c3,
 3802	       "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
 3803
 3804	ha->eft_dma = tc_dma;
 3805	ha->eft = tc;
 3806}
 3807
 3808void
 3809qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
 3810{
 3811	uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
 3812	    eft_size, fce_size, mq_size;
 3813	struct qla_hw_data *ha = vha->hw;
 3814	struct req_que *req = ha->req_q_map[0];
 3815	struct rsp_que *rsp = ha->rsp_q_map[0];
 3816	struct qla2xxx_fw_dump *fw_dump;
 3817
 3818	if (ha->fw_dump) {
 3819		ql_dbg(ql_dbg_init, vha, 0x00bd,
 3820		    "Firmware dump already allocated.\n");
 3821		return;
 3822	}
 3823
 3824	ha->fw_dumped = 0;
 3825	ha->fw_dump_cap_flags = 0;
 3826	dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
 3827	req_q_size = rsp_q_size = 0;
 3828
 3829	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
 3830		fixed_size = sizeof(struct qla2100_fw_dump);
 3831	} else if (IS_QLA23XX(ha)) {
 3832		fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
 3833		mem_size = (ha->fw_memory_size - 0x11000 + 1) *
 3834		    sizeof(uint16_t);
 3835	} else if (IS_FWI2_CAPABLE(ha)) {
 3836		if (IS_QLA83XX(ha))
 3837			fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
 3838		else if (IS_QLA81XX(ha))
 3839			fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
 3840		else if (IS_QLA25XX(ha))
 3841			fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
 3842		else
 3843			fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
 3844
 3845		mem_size = (ha->fw_memory_size - 0x100000 + 1) *
 3846		    sizeof(uint32_t);
 3847		if (ha->mqenable) {
 3848			if (!IS_QLA83XX(ha))
 3849				mq_size = sizeof(struct qla2xxx_mq_chain);
 3850			/*
 3851			 * Allocate maximum buffer size for all queues - Q0.
 3852			 * Resizing must be done at end-of-dump processing.
 3853			 */
 3854			mq_size += (ha->max_req_queues - 1) *
 3855			    (req->length * sizeof(request_t));
 3856			mq_size += (ha->max_rsp_queues - 1) *
 3857			    (rsp->length * sizeof(response_t));
 3858		}
 3859		if (ha->tgt.atio_ring)
 3860			mq_size += ha->tgt.atio_q_length * sizeof(request_t);
 3861
 3862		if (ha->fce) {
 3863			fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
 3864			ha->flags.fce_dump_buf_alloced = 1;
 3865		}
 3866		qla2x00_alloc_eft_trace(vha);
 3867		if (ha->eft)
 3868			eft_size = EFT_SIZE;
 3869	}
 3870
 3871	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
 3872		struct fwdt *fwdt = ha->fwdt;
 3873		uint j;
 3874
 3875		for (j = 0; j < 2; j++, fwdt++) {
 3876			if (!fwdt->template) {
 3877				ql_dbg(ql_dbg_init, vha, 0x00ba,
 3878				    "-> fwdt%u no template\n", j);
 3879				continue;
 3880			}
 3881			ql_dbg(ql_dbg_init, vha, 0x00fa,
 3882			    "-> fwdt%u calculating fwdump size...\n", j);
 3883			fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
 3884			    vha, fwdt->template);
 3885			ql_dbg(ql_dbg_init, vha, 0x00fa,
 3886			    "-> fwdt%u calculated fwdump size = %#lx bytes\n",
 3887			    j, fwdt->dump_size);
 3888			dump_size += fwdt->dump_size;
 3889		}
 3890		/* Add space for spare MPI fw dump. */
 3891		dump_size += ha->fwdt[1].dump_size;
 3892	} else {
 3893		req_q_size = req->length * sizeof(request_t);
 3894		rsp_q_size = rsp->length * sizeof(response_t);
 3895		dump_size = offsetof(struct qla2xxx_fw_dump, isp);
 3896		dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
 3897			+ eft_size;
 3898		ha->chain_offset = dump_size;
 3899		dump_size += mq_size + fce_size;
 3900		if (ha->exchoffld_buf)
 3901			dump_size += sizeof(struct qla2xxx_offld_chain) +
 3902				ha->exchoffld_size;
 3903		if (ha->exlogin_buf)
 3904			dump_size += sizeof(struct qla2xxx_offld_chain) +
 3905				ha->exlogin_size;
 3906	}
 3907
 3908	if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
 3909
 3910		ql_dbg(ql_dbg_init, vha, 0x00c5,
 3911		    "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
 3912		    __func__, dump_size, ha->fw_dump_len,
 3913		    ha->fw_dump_alloc_len);
 3914
 3915		fw_dump = vmalloc(dump_size);
 3916		if (!fw_dump) {
 3917			ql_log(ql_log_warn, vha, 0x00c4,
 3918			    "Unable to allocate (%d KB) for firmware dump.\n",
 3919			    dump_size / 1024);
 3920		} else {
 3921			mutex_lock(&ha->optrom_mutex);
 3922			if (ha->fw_dumped) {
 3923				memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
 3924				vfree(ha->fw_dump);
 3925				ha->fw_dump = fw_dump;
 3926				ha->fw_dump_alloc_len =  dump_size;
 3927				ql_dbg(ql_dbg_init, vha, 0x00c5,
 3928				    "Re-Allocated (%d KB) and save firmware dump.\n",
 3929				    dump_size / 1024);
 3930			} else {
 3931				vfree(ha->fw_dump);
 3932				ha->fw_dump = fw_dump;
 3933
 3934				ha->fw_dump_len = ha->fw_dump_alloc_len =
 3935				    dump_size;
 3936				ql_dbg(ql_dbg_init, vha, 0x00c5,
 3937				    "Allocated (%d KB) for firmware dump.\n",
 3938				    dump_size / 1024);
 3939
 3940				if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
 3941					ha->mpi_fw_dump = (char *)fw_dump +
 3942						ha->fwdt[1].dump_size;
 3943					mutex_unlock(&ha->optrom_mutex);
 3944					return;
 3945				}
 3946
 3947				ha->fw_dump->signature[0] = 'Q';
 3948				ha->fw_dump->signature[1] = 'L';
 3949				ha->fw_dump->signature[2] = 'G';
 3950				ha->fw_dump->signature[3] = 'C';
 3951				ha->fw_dump->version = htonl(1);
 3952
 3953				ha->fw_dump->fixed_size = htonl(fixed_size);
 3954				ha->fw_dump->mem_size = htonl(mem_size);
 3955				ha->fw_dump->req_q_size = htonl(req_q_size);
 3956				ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
 3957
 3958				ha->fw_dump->eft_size = htonl(eft_size);
 3959				ha->fw_dump->eft_addr_l =
 3960				    htonl(LSD(ha->eft_dma));
 3961				ha->fw_dump->eft_addr_h =
 3962				    htonl(MSD(ha->eft_dma));
 3963
 3964				ha->fw_dump->header_size =
 3965					htonl(offsetof
 3966					    (struct qla2xxx_fw_dump, isp));
 3967			}
 3968			mutex_unlock(&ha->optrom_mutex);
 3969		}
 3970	}
 3971}
 3972
 3973static int
 3974qla81xx_mpi_sync(scsi_qla_host_t *vha)
 3975{
 3976#define MPS_MASK	0xe0
 3977	int rval;
 3978	uint16_t dc;
 3979	uint32_t dw;
 3980
 3981	if (!IS_QLA81XX(vha->hw))
 3982		return QLA_SUCCESS;
 3983
 3984	rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
 3985	if (rval != QLA_SUCCESS) {
 3986		ql_log(ql_log_warn, vha, 0x0105,
 3987		    "Unable to acquire semaphore.\n");
 3988		goto done;
 3989	}
 3990
 3991	pci_read_config_word(vha->hw->pdev, 0x54, &dc);
 3992	rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
 3993	if (rval != QLA_SUCCESS) {
 3994		ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
 3995		goto done_release;
 3996	}
 3997
 3998	dc &= MPS_MASK;
 3999	if (dc == (dw & MPS_MASK))
 4000		goto done_release;
 4001
 4002	dw &= ~MPS_MASK;
 4003	dw |= dc;
 4004	rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
 4005	if (rval != QLA_SUCCESS) {
 4006		ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
 4007	}
 4008
 4009done_release:
 4010	rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
 4011	if (rval != QLA_SUCCESS) {
 4012		ql_log(ql_log_warn, vha, 0x006d,
 4013		    "Unable to release semaphore.\n");
 4014	}
 4015
 4016done:
 4017	return rval;
 4018}
 4019
 4020int
 4021qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
 4022{
 4023	/* Don't try to reallocate the array */
 4024	if (req->outstanding_cmds)
 4025		return QLA_SUCCESS;
 4026
 4027	if (!IS_FWI2_CAPABLE(ha))
 4028		req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
 4029	else {
 4030		if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
 4031			req->num_outstanding_cmds = ha->cur_fw_xcb_count;
 4032		else
 4033			req->num_outstanding_cmds = ha->cur_fw_iocb_count;
 4034	}
 4035
 4036	req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
 4037					sizeof(srb_t *),
 4038					GFP_KERNEL);
 4039
 4040	if (!req->outstanding_cmds) {
 4041		/*
 4042		 * Try to allocate a minimal size just so we can get through
 4043		 * initialization.
 4044		 */
 4045		req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
 4046		req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
 4047						sizeof(srb_t *),
 4048						GFP_KERNEL);
 4049
 4050		if (!req->outstanding_cmds) {
 4051			ql_log(ql_log_fatal, NULL, 0x0126,
 4052			    "Failed to allocate memory for "
 4053			    "outstanding_cmds for req_que %p.\n", req);
 4054			req->num_outstanding_cmds = 0;
 4055			return QLA_FUNCTION_FAILED;
 4056		}
 4057	}
 4058
 4059	return QLA_SUCCESS;
 4060}
 4061
 4062#define PRINT_FIELD(_field, _flag, _str) {		\
 4063	if (a0->_field & _flag) {\
 4064		if (p) {\
 4065			strcat(ptr, "|");\
 4066			ptr++;\
 4067			leftover--;\
 4068		} \
 4069		len = snprintf(ptr, leftover, "%s", _str);	\
 4070		p = 1;\
 4071		leftover -= len;\
 4072		ptr += len; \
 4073	} \
 4074}
 4075
 4076static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
 4077{
 4078#define STR_LEN 64
 4079	struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
 4080	u8 str[STR_LEN], *ptr, p;
 4081	int leftover, len;
 4082
 4083	memset(str, 0, STR_LEN);
 4084	snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
 4085	ql_dbg(ql_dbg_init, vha, 0x015a,
 4086	    "SFP MFG Name: %s\n", str);
 4087
 4088	memset(str, 0, STR_LEN);
 4089	snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
 4090	ql_dbg(ql_dbg_init, vha, 0x015c,
 4091	    "SFP Part Name: %s\n", str);
 4092
 4093	/* media */
 4094	memset(str, 0, STR_LEN);
 4095	ptr = str;
 4096	leftover = STR_LEN;
 4097	p = len = 0;
 4098	PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
 4099	PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
 4100	PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
 4101	PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
 4102	PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
 4103	PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
 4104	PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
 4105	ql_dbg(ql_dbg_init, vha, 0x0160,
 4106	    "SFP Media: %s\n", str);
 4107
 4108	/* link length */
 4109	memset(str, 0, STR_LEN);
 4110	ptr = str;
 4111	leftover = STR_LEN;
 4112	p = len = 0;
 4113	PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
 4114	PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
 4115	PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
 4116	PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
 4117	PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
 4118	ql_dbg(ql_dbg_init, vha, 0x0196,
 4119	    "SFP Link Length: %s\n", str);
 4120
 4121	memset(str, 0, STR_LEN);
 4122	ptr = str;
 4123	leftover = STR_LEN;
 4124	p = len = 0;
 4125	PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
 4126	PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
 4127	PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
 4128	PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
 4129	PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
 4130	ql_dbg(ql_dbg_init, vha, 0x016e,
 4131	    "SFP FC Link Tech: %s\n", str);
 4132
 4133	if (a0->length_km)
 4134		ql_dbg(ql_dbg_init, vha, 0x016f,
 4135		    "SFP Distant: %d km\n", a0->length_km);
 4136	if (a0->length_100m)
 4137		ql_dbg(ql_dbg_init, vha, 0x0170,
 4138		    "SFP Distant: %d m\n", a0->length_100m*100);
 4139	if (a0->length_50um_10m)
 4140		ql_dbg(ql_dbg_init, vha, 0x0189,
 4141		    "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
 4142	if (a0->length_62um_10m)
 4143		ql_dbg(ql_dbg_init, vha, 0x018a,
 4144		  "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
 4145	if (a0->length_om4_10m)
 4146		ql_dbg(ql_dbg_init, vha, 0x0194,
 4147		    "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
 4148	if (a0->length_om3_10m)
 4149		ql_dbg(ql_dbg_init, vha, 0x0195,
 4150		    "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
 4151}
 4152
 4153
 4154/**
 4155 * qla24xx_detect_sfp()
 4156 *
 4157 * @vha: adapter state pointer.
 4158 *
 4159 * @return
 4160 *	0 -- Configure firmware to use short-range settings -- normal
 4161 *	     buffer-to-buffer credits.
 4162 *
 4163 *	1 -- Configure firmware to use long-range settings -- extra
 4164 *	     buffer-to-buffer credits should be allocated with
 4165 *	     ha->lr_distance containing distance settings from NVRAM or SFP
 4166 *	     (if supported).
 4167 */
 4168int
 4169qla24xx_detect_sfp(scsi_qla_host_t *vha)
 4170{
 4171	int rc, used_nvram;
 4172	struct sff_8247_a0 *a;
 4173	struct qla_hw_data *ha = vha->hw;
 4174	struct nvram_81xx *nv = ha->nvram;
 4175#define LR_DISTANCE_UNKNOWN	2
 4176	static const char * const types[] = { "Short", "Long" };
 4177	static const char * const lengths[] = { "(10km)", "(5km)", "" };
 4178	u8 ll = 0;
 4179
 4180	/* Seed with NVRAM settings. */
 4181	used_nvram = 0;
 4182	ha->flags.lr_detected = 0;
 4183	if (IS_BPM_RANGE_CAPABLE(ha) &&
 4184	    (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
 4185		used_nvram = 1;
 4186		ha->flags.lr_detected = 1;
 4187		ha->lr_distance =
 4188		    (nv->enhanced_features >> LR_DIST_NV_POS)
 4189		     & LR_DIST_NV_MASK;
 4190	}
 4191
 4192	if (!IS_BPM_ENABLED(vha))
 4193		goto out;
 4194	/* Determine SR/LR capabilities of SFP/Transceiver. */
 4195	rc = qla2x00_read_sfp_dev(vha, NULL, 0);
 4196	if (rc)
 4197		goto out;
 4198
 4199	used_nvram = 0;
 4200	a = (struct sff_8247_a0 *)vha->hw->sfp_data;
 4201	qla2xxx_print_sfp_info(vha);
 4202
 4203	ha->flags.lr_detected = 0;
 4204	ll = a->fc_ll_cc7;
 4205	if (ll & FC_LL_VL || ll & FC_LL_L) {
 4206		/* Long range, track length. */
 4207		ha->flags.lr_detected = 1;
 4208
 4209		if (a->length_km > 5 || a->length_100m > 50)
 4210			ha->lr_distance = LR_DISTANCE_10K;
 4211		else
 4212			ha->lr_distance = LR_DISTANCE_5K;
 4213	}
 4214
 4215out:
 4216	ql_dbg(ql_dbg_async, vha, 0x507b,
 4217	    "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
 4218	    types[ha->flags.lr_detected],
 4219	    ha->flags.lr_detected ? lengths[ha->lr_distance] :
 4220	       lengths[LR_DISTANCE_UNKNOWN],
 4221	    used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
 4222	return ha->flags.lr_detected;
 4223}
 4224
 4225static void __qla_adjust_iocb_limit(struct qla_qpair *qpair)
 4226{
 4227	u8 num_qps;
 4228	u16 limit;
 4229	struct qla_hw_data *ha = qpair->vha->hw;
 4230
 4231	num_qps = ha->num_qpairs + 1;
 4232	limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
 4233
 4234	qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
 4235	qpair->fwres.iocbs_limit = limit;
 4236	qpair->fwres.iocbs_qp_limit = limit / num_qps;
 4237
 4238	qpair->fwres.exch_total = ha->orig_fw_xcb_count;
 4239	qpair->fwres.exch_limit = (ha->orig_fw_xcb_count *
 4240				   QLA_IOCB_PCT_LIMIT) / 100;
 4241}
 4242
 4243void qla_init_iocb_limit(scsi_qla_host_t *vha)
 4244{
 4245	u8 i;
 4246	struct qla_hw_data *ha = vha->hw;
 4247
 4248	__qla_adjust_iocb_limit(ha->base_qpair);
 4249	ha->base_qpair->fwres.iocbs_used = 0;
 4250	ha->base_qpair->fwres.exch_used  = 0;
 4251
 4252	for (i = 0; i < ha->max_qpairs; i++) {
 4253		if (ha->queue_pair_map[i])  {
 4254			__qla_adjust_iocb_limit(ha->queue_pair_map[i]);
 4255			ha->queue_pair_map[i]->fwres.iocbs_used = 0;
 4256			ha->queue_pair_map[i]->fwres.exch_used = 0;
 4257		}
 4258	}
 4259
 4260	ha->fwres.iocb_total = ha->orig_fw_iocb_count;
 4261	ha->fwres.iocb_limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
 4262	ha->fwres.exch_total = ha->orig_fw_xcb_count;
 4263	ha->fwres.exch_limit = (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100;
 4264
 4265	atomic_set(&ha->fwres.iocb_used, 0);
 4266	atomic_set(&ha->fwres.exch_used, 0);
 4267}
 4268
 4269void qla_adjust_iocb_limit(scsi_qla_host_t *vha)
 4270{
 4271	u8 i;
 4272	struct qla_hw_data *ha = vha->hw;
 4273
 4274	__qla_adjust_iocb_limit(ha->base_qpair);
 4275
 4276	for (i = 0; i < ha->max_qpairs; i++) {
 4277		if (ha->queue_pair_map[i])
 4278			__qla_adjust_iocb_limit(ha->queue_pair_map[i]);
 4279	}
 4280}
 4281
 4282/**
 4283 * qla2x00_setup_chip() - Load and start RISC firmware.
 4284 * @vha: HA context
 4285 *
 4286 * Returns 0 on success.
 4287 */
 4288static int
 4289qla2x00_setup_chip(scsi_qla_host_t *vha)
 4290{
 4291	int rval;
 4292	uint32_t srisc_address = 0;
 4293	struct qla_hw_data *ha = vha->hw;
 4294	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 4295	unsigned long flags;
 4296	int done_once = 0;
 4297
 4298	if (IS_P3P_TYPE(ha)) {
 4299		rval = ha->isp_ops->load_risc(vha, &srisc_address);
 4300		if (rval == QLA_SUCCESS) {
 4301			qla2x00_stop_firmware(vha);
 4302			goto enable_82xx_npiv;
 4303		} else
 4304			goto failed;
 4305	}
 4306
 4307	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
 4308		/* Disable SRAM, Instruction RAM and GP RAM parity.  */
 4309		spin_lock_irqsave(&ha->hardware_lock, flags);
 4310		wrt_reg_word(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
 4311		rd_reg_word(&reg->hccr);
 4312		spin_unlock_irqrestore(&ha->hardware_lock, flags);
 4313	}
 4314
 4315	qla81xx_mpi_sync(vha);
 4316
 4317execute_fw_with_lr:
 4318	/* Load firmware sequences */
 4319	rval = ha->isp_ops->load_risc(vha, &srisc_address);
 4320	if (rval == QLA_SUCCESS) {
 4321		ql_dbg(ql_dbg_init, vha, 0x00c9,
 4322		    "Verifying Checksum of loaded RISC code.\n");
 4323
 4324		rval = qla2x00_verify_checksum(vha, srisc_address);
 4325		if (rval == QLA_SUCCESS) {
 4326			/* Start firmware execution. */
 4327			ql_dbg(ql_dbg_init, vha, 0x00ca,
 4328			    "Starting firmware.\n");
 4329
 4330			if (ql2xexlogins)
 4331				ha->flags.exlogins_enabled = 1;
 4332
 4333			if (qla_is_exch_offld_enabled(vha))
 4334				ha->flags.exchoffld_enabled = 1;
 4335
 4336			rval = qla2x00_execute_fw(vha, srisc_address);
 4337			/* Retrieve firmware information. */
 4338			if (rval == QLA_SUCCESS) {
 4339				/* Enable BPM support? */
 4340				if (!done_once++ && qla24xx_detect_sfp(vha)) {
 4341					ql_dbg(ql_dbg_init, vha, 0x00ca,
 4342					    "Re-starting firmware -- BPM.\n");
 4343					/* Best-effort - re-init. */
 4344					ha->isp_ops->reset_chip(vha);
 4345					ha->isp_ops->chip_diag(vha);
 4346					goto execute_fw_with_lr;
 4347				}
 4348
 4349				if (IS_ZIO_THRESHOLD_CAPABLE(ha))
 4350					qla27xx_set_zio_threshold(vha,
 4351					    ha->last_zio_threshold);
 4352
 4353				rval = qla2x00_set_exlogins_buffer(vha);
 4354				if (rval != QLA_SUCCESS)
 4355					goto failed;
 4356
 4357				rval = qla2x00_set_exchoffld_buffer(vha);
 4358				if (rval != QLA_SUCCESS)
 4359					goto failed;
 4360
 4361enable_82xx_npiv:
 4362				if (IS_P3P_TYPE(ha))
 4363					qla82xx_check_md_needed(vha);
 4364				else
 4365					rval = qla2x00_get_fw_version(vha);
 4366				if (rval != QLA_SUCCESS)
 4367					goto failed;
 4368				ha->flags.npiv_supported = 0;
 4369				if (IS_QLA2XXX_MIDTYPE(ha) &&
 4370					 (ha->fw_attributes & BIT_2)) {
 4371					ha->flags.npiv_supported = 1;
 4372					if ((!ha->max_npiv_vports) ||
 4373					    ((ha->max_npiv_vports + 1) %
 4374					    MIN_MULTI_ID_FABRIC))
 4375						ha->max_npiv_vports =
 4376						    MIN_MULTI_ID_FABRIC - 1;
 4377				}
 4378				qlt_config_nvram_with_fw_version(vha);
 4379				qla2x00_get_resource_cnts(vha);
 4380				qla_init_iocb_limit(vha);
 4381
 4382				/*
 4383				 * Allocate the array of outstanding commands
 4384				 * now that we know the firmware resources.
 4385				 */
 4386				rval = qla2x00_alloc_outstanding_cmds(ha,
 4387				    vha->req);
 4388				if (rval != QLA_SUCCESS)
 4389					goto failed;
 4390
 4391				if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
 4392					qla2x00_alloc_fw_dump(vha);
 4393
 4394				qla_enable_fce_trace(vha);
 4395				qla_enable_eft_trace(vha);
 4396			} else {
 4397				goto failed;
 4398			}
 4399		} else {
 4400			ql_log(ql_log_fatal, vha, 0x00cd,
 4401			    "ISP Firmware failed checksum.\n");
 4402			goto failed;
 4403		}
 4404
 4405		/* Enable PUREX PASSTHRU */
 4406		if (ql2xrdpenable || ha->flags.scm_supported_f ||
 4407		    ha->flags.edif_enabled)
 4408			qla25xx_set_els_cmds_supported(vha);
 4409	} else
 4410		goto failed;
 4411
 4412	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
 4413		/* Enable proper parity. */
 4414		spin_lock_irqsave(&ha->hardware_lock, flags);
 4415		if (IS_QLA2300(ha))
 4416			/* SRAM parity */
 4417			wrt_reg_word(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
 4418		else
 4419			/* SRAM, Instruction RAM and GP RAM parity */
 4420			wrt_reg_word(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
 4421		rd_reg_word(&reg->hccr);
 4422		spin_unlock_irqrestore(&ha->hardware_lock, flags);
 4423	}
 4424
 4425	if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
 4426		ha->flags.fac_supported = 1;
 4427	else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
 4428		uint32_t size;
 4429
 4430		rval = qla81xx_fac_get_sector_size(vha, &size);
 4431		if (rval == QLA_SUCCESS) {
 4432			ha->flags.fac_supported = 1;
 4433			ha->fdt_block_size = size << 2;
 4434		} else {
 4435			ql_log(ql_log_warn, vha, 0x00ce,
 4436			    "Unsupported FAC firmware (%d.%02d.%02d).\n",
 4437			    ha->fw_major_version, ha->fw_minor_version,
 4438			    ha->fw_subminor_version);
 4439
 4440			if (IS_QLA83XX(ha)) {
 4441				ha->flags.fac_supported = 0;
 4442				rval = QLA_SUCCESS;
 4443			}
 4444		}
 4445	}
 4446failed:
 4447	if (rval) {
 4448		ql_log(ql_log_fatal, vha, 0x00cf,
 4449		    "Setup chip ****FAILED****.\n");
 4450	}
 4451
 4452	return (rval);
 4453}
 4454
 4455/**
 4456 * qla2x00_init_response_q_entries() - Initializes response queue entries.
 4457 * @rsp: response queue
 4458 *
 4459 * Beginning of request ring has initialization control block already built
 4460 * by nvram config routine.
 4461 *
 4462 * Returns 0 on success.
 4463 */
 4464void
 4465qla2x00_init_response_q_entries(struct rsp_que *rsp)
 4466{
 4467	uint16_t cnt;
 4468	response_t *pkt;
 4469
 4470	rsp->ring_ptr = rsp->ring;
 4471	rsp->ring_index    = 0;
 4472	rsp->status_srb = NULL;
 4473	pkt = rsp->ring_ptr;
 4474	for (cnt = 0; cnt < rsp->length; cnt++) {
 4475		pkt->signature = RESPONSE_PROCESSED;
 4476		pkt++;
 4477	}
 4478}
 4479
 4480/**
 4481 * qla2x00_update_fw_options() - Read and process firmware options.
 4482 * @vha: HA context
 4483 *
 4484 * Returns 0 on success.
 4485 */
 4486void
 4487qla2x00_update_fw_options(scsi_qla_host_t *vha)
 4488{
 4489	uint16_t swing, emphasis, tx_sens, rx_sens;
 4490	struct qla_hw_data *ha = vha->hw;
 4491
 4492	memset(ha->fw_options, 0, sizeof(ha->fw_options));
 4493	qla2x00_get_fw_options(vha, ha->fw_options);
 4494
 4495	if (IS_QLA2100(ha) || IS_QLA2200(ha))
 4496		return;
 4497
 4498	/* Serial Link options. */
 4499	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
 4500	    "Serial link options.\n");
 4501	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
 4502	    ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
 4503
 4504	ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
 4505	if (ha->fw_seriallink_options[3] & BIT_2) {
 4506		ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
 4507
 4508		/*  1G settings */
 4509		swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
 4510		emphasis = (ha->fw_seriallink_options[2] &
 4511		    (BIT_4 | BIT_3)) >> 3;
 4512		tx_sens = ha->fw_seriallink_options[0] &
 4513		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
 4514		rx_sens = (ha->fw_seriallink_options[0] &
 4515		    (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
 4516		ha->fw_options[10] = (emphasis << 14) | (swing << 8);
 4517		if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
 4518			if (rx_sens == 0x0)
 4519				rx_sens = 0x3;
 4520			ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
 4521		} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
 4522			ha->fw_options[10] |= BIT_5 |
 4523			    ((rx_sens & (BIT_1 | BIT_0)) << 2) |
 4524			    (tx_sens & (BIT_1 | BIT_0));
 4525
 4526		/*  2G settings */
 4527		swing = (ha->fw_seriallink_options[2] &
 4528		    (BIT_7 | BIT_6 | BIT_5)) >> 5;
 4529		emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
 4530		tx_sens = ha->fw_seriallink_options[1] &
 4531		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
 4532		rx_sens = (ha->fw_seriallink_options[1] &
 4533		    (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
 4534		ha->fw_options[11] = (emphasis << 14) | (swing << 8);
 4535		if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
 4536			if (rx_sens == 0x0)
 4537				rx_sens = 0x3;
 4538			ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
 4539		} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
 4540			ha->fw_options[11] |= BIT_5 |
 4541			    ((rx_sens & (BIT_1 | BIT_0)) << 2) |
 4542			    (tx_sens & (BIT_1 | BIT_0));
 4543	}
 4544
 4545	/* FCP2 options. */
 4546	/*  Return command IOCBs without waiting for an ABTS to complete. */
 4547	ha->fw_options[3] |= BIT_13;
 4548
 4549	/* LED scheme. */
 4550	if (ha->flags.enable_led_scheme)
 4551		ha->fw_options[2] |= BIT_12;
 4552
 4553	/* Detect ISP6312. */
 4554	if (IS_QLA6312(ha))
 4555		ha->fw_options[2] |= BIT_13;
 4556
 4557	/* Set Retry FLOGI in case of P2P connection */
 4558	if (ha->operating_mode == P2P) {
 4559		ha->fw_options[2] |= BIT_3;
 4560		ql_dbg(ql_dbg_disc, vha, 0x2100,
 4561		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
 4562			__func__, ha->fw_options[2]);
 4563	}
 4564
 4565	/* Update firmware options. */
 4566	qla2x00_set_fw_options(vha, ha->fw_options);
 4567}
 4568
 4569void
 4570qla24xx_update_fw_options(scsi_qla_host_t *vha)
 4571{
 4572	int rval;
 4573	struct qla_hw_data *ha = vha->hw;
 4574
 4575	if (IS_P3P_TYPE(ha))
 4576		return;
 4577
 4578	/*  Hold status IOCBs until ABTS response received. */
 4579	if (ql2xfwholdabts)
 4580		ha->fw_options[3] |= BIT_12;
 4581
 4582	/* Set Retry FLOGI in case of P2P connection */
 4583	if (ha->operating_mode == P2P) {
 4584		ha->fw_options[2] |= BIT_3;
 4585		ql_dbg(ql_dbg_disc, vha, 0x2101,
 4586		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
 4587			__func__, ha->fw_options[2]);
 4588	}
 4589
 4590	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
 4591	if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
 4592	    (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
 4593		if (qla_tgt_mode_enabled(vha) ||
 4594		    qla_dual_mode_enabled(vha))
 4595			ha->fw_options[2] |= BIT_11;
 4596		else
 4597			ha->fw_options[2] &= ~BIT_11;
 4598	}
 4599
 4600	if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
 4601	    IS_QLA28XX(ha)) {
 4602		/*
 4603		 * Tell FW to track each exchange to prevent
 4604		 * driver from using stale exchange.
 4605		 */
 4606		if (qla_tgt_mode_enabled(vha) ||
 4607		    qla_dual_mode_enabled(vha))
 4608			ha->fw_options[2] |= BIT_4;
 4609		else
 4610			ha->fw_options[2] &= ~(BIT_4);
 4611
 4612		/* Reserve 1/2 of emergency exchanges for ELS.*/
 4613		if (qla2xuseresexchforels)
 4614			ha->fw_options[2] |= BIT_8;
 4615		else
 4616			ha->fw_options[2] &= ~BIT_8;
 4617
 4618		/*
 4619		 * N2N: set Secure=1 for PLOGI ACC and
 4620		 * fw shal not send PRLI after PLOGI Acc
 4621		 */
 4622		if (ha->flags.edif_enabled &&
 4623		    DBELL_ACTIVE(vha)) {
 4624			ha->fw_options[3] |= BIT_15;
 4625			ha->flags.n2n_fw_acc_sec = 1;
 4626		} else {
 4627			ha->fw_options[3] &= ~BIT_15;
 4628			ha->flags.n2n_fw_acc_sec = 0;
 4629		}
 4630	}
 4631
 4632	if (ql2xrdpenable || ha->flags.scm_supported_f ||
 4633	    ha->flags.edif_enabled)
 4634		ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
 4635
 4636	/* Enable Async 8130/8131 events -- transceiver insertion/removal */
 4637	if (IS_BPM_RANGE_CAPABLE(ha))
 4638		ha->fw_options[3] |= BIT_10;
 4639
 4640	ql_dbg(ql_dbg_init, vha, 0x00e8,
 4641	    "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
 4642	    __func__, ha->fw_options[1], ha->fw_options[2],
 4643	    ha->fw_options[3], vha->host->active_mode);
 4644
 4645	if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
 4646		qla2x00_set_fw_options(vha, ha->fw_options);
 4647
 4648	/* Update Serial Link options. */
 4649	if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
 4650		return;
 4651
 4652	rval = qla2x00_set_serdes_params(vha,
 4653	    le16_to_cpu(ha->fw_seriallink_options24[1]),
 4654	    le16_to_cpu(ha->fw_seriallink_options24[2]),
 4655	    le16_to_cpu(ha->fw_seriallink_options24[3]));
 4656	if (rval != QLA_SUCCESS) {
 4657		ql_log(ql_log_warn, vha, 0x0104,
 4658		    "Unable to update Serial Link options (%x).\n", rval);
 4659	}
 4660}
 4661
 4662void
 4663qla2x00_config_rings(struct scsi_qla_host *vha)
 4664{
 4665	struct qla_hw_data *ha = vha->hw;
 4666	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 4667	struct req_que *req = ha->req_q_map[0];
 4668	struct rsp_que *rsp = ha->rsp_q_map[0];
 4669
 4670	/* Setup ring parameters in initialization control block. */
 4671	ha->init_cb->request_q_outpointer = cpu_to_le16(0);
 4672	ha->init_cb->response_q_inpointer = cpu_to_le16(0);
 4673	ha->init_cb->request_q_length = cpu_to_le16(req->length);
 4674	ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
 4675	put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
 4676	put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
 4677
 4678	wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
 4679	wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
 4680	wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
 4681	wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
 4682	rd_reg_word(ISP_RSP_Q_OUT(ha, reg));		/* PCI Posting. */
 4683}
 4684
 4685void
 4686qla24xx_config_rings(struct scsi_qla_host *vha)
 4687{
 4688	struct qla_hw_data *ha = vha->hw;
 4689	device_reg_t *reg = ISP_QUE_REG(ha, 0);
 4690	struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
 4691	struct qla_msix_entry *msix;
 4692	struct init_cb_24xx *icb;
 4693	uint16_t rid = 0;
 4694	struct req_que *req = ha->req_q_map[0];
 4695	struct rsp_que *rsp = ha->rsp_q_map[0];
 4696
 4697	/* Setup ring parameters in initialization control block. */
 4698	icb = (struct init_cb_24xx *)ha->init_cb;
 4699	icb->request_q_outpointer = cpu_to_le16(0);
 4700	icb->response_q_inpointer = cpu_to_le16(0);
 4701	icb->request_q_length = cpu_to_le16(req->length);
 4702	icb->response_q_length = cpu_to_le16(rsp->length);
 4703	put_unaligned_le64(req->dma, &icb->request_q_address);
 4704	put_unaligned_le64(rsp->dma, &icb->response_q_address);
 4705
 4706	/* Setup ATIO queue dma pointers for target mode */
 4707	icb->atio_q_inpointer = cpu_to_le16(0);
 4708	icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
 4709	put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
 4710
 4711	if (IS_SHADOW_REG_CAPABLE(ha))
 4712		icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
 4713
 4714	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
 4715	    IS_QLA28XX(ha)) {
 4716		icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
 4717		icb->rid = cpu_to_le16(rid);
 4718		if (ha->flags.msix_enabled) {
 4719			msix = &ha->msix_entries[1];
 4720			ql_dbg(ql_dbg_init, vha, 0x0019,
 4721			    "Registering vector 0x%x for base que.\n",
 4722			    msix->entry);
 4723			icb->msix = cpu_to_le16(msix->entry);
 4724		}
 4725		/* Use alternate PCI bus number */
 4726		if (MSB(rid))
 4727			icb->firmware_options_2 |= cpu_to_le32(BIT_19);
 4728		/* Use alternate PCI devfn */
 4729		if (LSB(rid))
 4730			icb->firmware_options_2 |= cpu_to_le32(BIT_18);
 4731
 4732		/* Use Disable MSIX Handshake mode for capable adapters */
 4733		if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
 4734		    (ha->flags.msix_enabled)) {
 4735			icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
 4736			ha->flags.disable_msix_handshake = 1;
 4737			ql_dbg(ql_dbg_init, vha, 0x00fe,
 4738			    "MSIX Handshake Disable Mode turned on.\n");
 4739		} else {
 4740			icb->firmware_options_2 |= cpu_to_le32(BIT_22);
 4741		}
 4742		icb->firmware_options_2 |= cpu_to_le32(BIT_23);
 4743
 4744		wrt_reg_dword(&reg->isp25mq.req_q_in, 0);
 4745		wrt_reg_dword(&reg->isp25mq.req_q_out, 0);
 4746		wrt_reg_dword(&reg->isp25mq.rsp_q_in, 0);
 4747		wrt_reg_dword(&reg->isp25mq.rsp_q_out, 0);
 4748	} else {
 4749		wrt_reg_dword(&reg->isp24.req_q_in, 0);
 4750		wrt_reg_dword(&reg->isp24.req_q_out, 0);
 4751		wrt_reg_dword(&reg->isp24.rsp_q_in, 0);
 4752		wrt_reg_dword(&reg->isp24.rsp_q_out, 0);
 4753	}
 4754
 4755	qlt_24xx_config_rings(vha);
 4756
 4757	/* If the user has configured the speed, set it here */
 4758	if (ha->set_data_rate) {
 4759		ql_dbg(ql_dbg_init, vha, 0x00fd,
 4760		    "Speed set by user : %s Gbps \n",
 4761		    qla2x00_get_link_speed_str(ha, ha->set_data_rate));
 4762		icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
 4763	}
 4764
 4765	/* PCI posting */
 4766	rd_reg_word(&ioreg->hccr);
 4767}
 4768
 4769/**
 4770 * qla2x00_init_rings() - Initializes firmware.
 4771 * @vha: HA context
 4772 *
 4773 * Beginning of request ring has initialization control block already built
 4774 * by nvram config routine.
 4775 *
 4776 * Returns 0 on success.
 4777 */
 4778int
 4779qla2x00_init_rings(scsi_qla_host_t *vha)
 4780{
 4781	int	rval;
 4782	unsigned long flags = 0;
 4783	int cnt, que;
 4784	struct qla_hw_data *ha = vha->hw;
 4785	struct req_que *req;
 4786	struct rsp_que *rsp;
 4787	struct mid_init_cb_24xx *mid_init_cb =
 4788	    (struct mid_init_cb_24xx *) ha->init_cb;
 4789
 4790	spin_lock_irqsave(&ha->hardware_lock, flags);
 4791
 4792	/* Clear outstanding commands array. */
 4793	for (que = 0; que < ha->max_req_queues; que++) {
 4794		req = ha->req_q_map[que];
 4795		if (!req || !test_bit(que, ha->req_qid_map))
 4796			continue;
 4797		req->out_ptr = (uint16_t *)(req->ring + req->length);
 4798		*req->out_ptr = 0;
 4799		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
 4800			req->outstanding_cmds[cnt] = NULL;
 4801
 4802		req->current_outstanding_cmd = 1;
 4803
 4804		/* Initialize firmware. */
 4805		req->ring_ptr  = req->ring;
 4806		req->ring_index    = 0;
 4807		req->cnt      = req->length;
 4808	}
 4809
 4810	for (que = 0; que < ha->max_rsp_queues; que++) {
 4811		rsp = ha->rsp_q_map[que];
 4812		if (!rsp || !test_bit(que, ha->rsp_qid_map))
 4813			continue;
 4814		rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
 4815		*rsp->in_ptr = 0;
 4816		/* Initialize response queue entries */
 4817		if (IS_QLAFX00(ha))
 4818			qlafx00_init_response_q_entries(rsp);
 4819		else
 4820			qla2x00_init_response_q_entries(rsp);
 4821	}
 4822
 4823	ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
 4824	ha->tgt.atio_ring_index = 0;
 4825	/* Initialize ATIO queue entries */
 4826	qlt_init_atio_q_entries(vha);
 4827
 4828	ha->isp_ops->config_rings(vha);
 4829
 4830	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 4831
 4832	if (IS_QLAFX00(ha)) {
 4833		rval = qlafx00_init_firmware(vha, ha->init_cb_size);
 4834		goto next_check;
 4835	}
 4836
 4837	/* Update any ISP specific firmware options before initialization. */
 4838	ha->isp_ops->update_fw_options(vha);
 4839
 4840	ql_dbg(ql_dbg_init, vha, 0x00d1,
 4841	       "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
 4842	       le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
 4843	       le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
 4844	       le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
 4845
 4846	if (ha->flags.npiv_supported) {
 4847		if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
 4848			ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
 4849		mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
 4850	}
 4851
 4852	if (IS_FWI2_CAPABLE(ha)) {
 4853		mid_init_cb->options = cpu_to_le16(BIT_1);
 4854		mid_init_cb->init_cb.execution_throttle =
 4855		    cpu_to_le16(ha->cur_fw_xcb_count);
 4856		ha->flags.dport_enabled =
 4857			(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
 4858			 BIT_7) != 0;
 4859		ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
 4860		    (ha->flags.dport_enabled) ? "enabled" : "disabled");
 4861		/* FA-WWPN Status */
 4862		ha->flags.fawwpn_enabled =
 4863			(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
 4864			 BIT_6) != 0;
 4865		ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
 4866		    (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
 4867		/* Init_cb will be reused for other command(s).  Save a backup copy of port_name */
 4868		memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
 4869	}
 4870
 4871	/* ELS pass through payload is limit by frame size. */
 4872	if (ha->flags.edif_enabled)
 4873		mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
 4874
 4875	QLA_FW_STARTED(ha);
 4876	rval = qla2x00_init_firmware(vha, ha->init_cb_size);
 4877next_check:
 4878	if (rval) {
 4879		QLA_FW_STOPPED(ha);
 4880		ql_log(ql_log_fatal, vha, 0x00d2,
 4881		    "Init Firmware **** FAILED ****.\n");
 4882	} else {
 4883		ql_dbg(ql_dbg_init, vha, 0x00d3,
 4884		    "Init Firmware -- success.\n");
 4885		vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
 4886	}
 4887
 4888	return (rval);
 4889}
 4890
 4891/**
 4892 * qla2x00_fw_ready() - Waits for firmware ready.
 4893 * @vha: HA context
 4894 *
 4895 * Returns 0 on success.
 4896 */
 4897static int
 4898qla2x00_fw_ready(scsi_qla_host_t *vha)
 4899{
 4900	int		rval;
 4901	unsigned long	wtime, mtime, cs84xx_time;
 4902	uint16_t	min_wait;	/* Minimum wait time if loop is down */
 4903	uint16_t	wait_time;	/* Wait time if loop is coming ready */
 4904	uint16_t	state[6];
 4905	struct qla_hw_data *ha = vha->hw;
 4906
 4907	if (IS_QLAFX00(vha->hw))
 4908		return qlafx00_fw_ready(vha);
 4909
 4910	/* Time to wait for loop down */
 4911	if (IS_P3P_TYPE(ha))
 4912		min_wait = 30;
 4913	else
 4914		min_wait = 20;
 4915
 4916	/*
 4917	 * Firmware should take at most one RATOV to login, plus 5 seconds for
 4918	 * our own processing.
 4919	 */
 4920	if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
 4921		wait_time = min_wait;
 4922	}
 4923
 4924	/* Min wait time if loop down */
 4925	mtime = jiffies + (min_wait * HZ);
 4926
 4927	/* wait time before firmware ready */
 4928	wtime = jiffies + (wait_time * HZ);
 4929
 4930	/* Wait for ISP to finish LIP */
 4931	if (!vha->flags.init_done)
 4932		ql_log(ql_log_info, vha, 0x801e,
 4933		    "Waiting for LIP to complete.\n");
 4934
 4935	do {
 4936		memset(state, -1, sizeof(state));
 4937		rval = qla2x00_get_firmware_state(vha, state);
 4938		if (rval == QLA_SUCCESS) {
 4939			if (state[0] < FSTATE_LOSS_OF_SYNC) {
 4940				vha->device_flags &= ~DFLG_NO_CABLE;
 4941			}
 4942			if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
 4943				ql_dbg(ql_dbg_taskm, vha, 0x801f,
 4944				    "fw_state=%x 84xx=%x.\n", state[0],
 4945				    state[2]);
 4946				if ((state[2] & FSTATE_LOGGED_IN) &&
 4947				     (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
 4948					ql_dbg(ql_dbg_taskm, vha, 0x8028,
 4949					    "Sending verify iocb.\n");
 4950
 4951					cs84xx_time = jiffies;
 4952					rval = qla84xx_init_chip(vha);
 4953					if (rval != QLA_SUCCESS) {
 4954						ql_log(ql_log_warn,
 4955						    vha, 0x8007,
 4956						    "Init chip failed.\n");
 4957						break;
 4958					}
 4959
 4960					/* Add time taken to initialize. */
 4961					cs84xx_time = jiffies - cs84xx_time;
 4962					wtime += cs84xx_time;
 4963					mtime += cs84xx_time;
 4964					ql_dbg(ql_dbg_taskm, vha, 0x8008,
 4965					    "Increasing wait time by %ld. "
 4966					    "New time %ld.\n", cs84xx_time,
 4967					    wtime);
 4968				}
 4969			} else if (state[0] == FSTATE_READY) {
 4970				ql_dbg(ql_dbg_taskm, vha, 0x8037,
 4971				    "F/W Ready - OK.\n");
 4972
 4973				qla2x00_get_retry_cnt(vha, &ha->retry_count,
 4974				    &ha->login_timeout, &ha->r_a_tov);
 4975
 4976				rval = QLA_SUCCESS;
 4977				break;
 4978			}
 4979
 4980			rval = QLA_FUNCTION_FAILED;
 4981
 4982			if (atomic_read(&vha->loop_down_timer) &&
 4983			    state[0] != FSTATE_READY) {
 4984				/* Loop down. Timeout on min_wait for states
 4985				 * other than Wait for Login.
 4986				 */
 4987				if (time_after_eq(jiffies, mtime)) {
 4988					ql_log(ql_log_info, vha, 0x8038,
 4989					    "Cable is unplugged...\n");
 4990
 4991					vha->device_flags |= DFLG_NO_CABLE;
 4992					break;
 4993				}
 4994			}
 4995		} else {
 4996			/* Mailbox cmd failed. Timeout on min_wait. */
 4997			if (time_after_eq(jiffies, mtime) ||
 4998				ha->flags.isp82xx_fw_hung)
 4999				break;
 5000		}
 5001
 5002		if (time_after_eq(jiffies, wtime))
 5003			break;
 5004
 5005		/* Delay for a while */
 5006		msleep(500);
 5007	} while (1);
 5008
 5009	ql_dbg(ql_dbg_taskm, vha, 0x803a,
 5010	    "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
 5011	    state[1], state[2], state[3], state[4], state[5], jiffies);
 5012
 5013	if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
 5014		ql_log(ql_log_warn, vha, 0x803b,
 5015		    "Firmware ready **** FAILED ****.\n");
 5016	}
 5017
 5018	return (rval);
 5019}
 5020
 5021/*
 5022*  qla2x00_configure_hba
 5023*      Setup adapter context.
 5024*
 5025* Input:
 5026*      ha = adapter state pointer.
 5027*
 5028* Returns:
 5029*      0 = success
 5030*
 5031* Context:
 5032*      Kernel context.
 5033*/
 5034static int
 5035qla2x00_configure_hba(scsi_qla_host_t *vha)
 5036{
 5037	int       rval;
 5038	uint16_t      loop_id;
 5039	uint16_t      topo;
 5040	uint16_t      sw_cap;
 5041	uint8_t       al_pa;
 5042	uint8_t       area;
 5043	uint8_t       domain;
 5044	char		connect_type[22];
 5045	struct qla_hw_data *ha = vha->hw;
 5046	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 5047	port_id_t id;
 5048	unsigned long flags;
 5049
 5050	/* Get host addresses. */
 5051	rval = qla2x00_get_adapter_id(vha,
 5052	    &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
 5053	if (rval != QLA_SUCCESS) {
 5054		if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
 5055		    IS_CNA_CAPABLE(ha) ||
 5056		    (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
 5057			ql_dbg(ql_dbg_disc, vha, 0x2008,
 5058			    "Loop is in a transition state.\n");
 5059		} else {
 5060			ql_log(ql_log_warn, vha, 0x2009,
 5061			    "Unable to get host loop ID.\n");
 5062			if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
 5063			    (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
 5064				ql_log(ql_log_warn, vha, 0x1151,
 5065				    "Doing link init.\n");
 5066				if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
 5067					return rval;
 5068			}
 5069			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 5070		}
 5071		return (rval);
 5072	}
 5073
 5074	if (topo == 4) {
 5075		ql_log(ql_log_info, vha, 0x200a,
 5076		    "Cannot get topology - retrying.\n");
 5077		return (QLA_FUNCTION_FAILED);
 5078	}
 5079
 5080	vha->loop_id = loop_id;
 5081
 5082	/* initialize */
 5083	ha->min_external_loopid = SNS_FIRST_LOOP_ID;
 5084	ha->operating_mode = LOOP;
 5085
 5086	switch (topo) {
 5087	case 0:
 5088		ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
 5089		ha->switch_cap = 0;
 5090		ha->current_topology = ISP_CFG_NL;
 5091		strcpy(connect_type, "(Loop)");
 5092		break;
 5093
 5094	case 1:
 5095		ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
 5096		ha->switch_cap = sw_cap;
 5097		ha->current_topology = ISP_CFG_FL;
 5098		strcpy(connect_type, "(FL_Port)");
 5099		break;
 5100
 5101	case 2:
 5102		ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
 5103		ha->switch_cap = 0;
 5104		ha->operating_mode = P2P;
 5105		ha->current_topology = ISP_CFG_N;
 5106		strcpy(connect_type, "(N_Port-to-N_Port)");
 5107		break;
 5108
 5109	case 3:
 5110		ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
 5111		ha->switch_cap = sw_cap;
 5112		ha->operating_mode = P2P;
 5113		ha->current_topology = ISP_CFG_F;
 5114		strcpy(connect_type, "(F_Port)");
 5115		break;
 5116
 5117	default:
 5118		ql_dbg(ql_dbg_disc, vha, 0x200f,
 5119		    "HBA in unknown topology %x, using NL.\n", topo);
 5120		ha->switch_cap = 0;
 5121		ha->current_topology = ISP_CFG_NL;
 5122		strcpy(connect_type, "(Loop)");
 5123		break;
 5124	}
 5125
 5126	/* Save Host port and loop ID. */
 5127	/* byte order - Big Endian */
 5128	id.b.domain = domain;
 5129	id.b.area = area;
 5130	id.b.al_pa = al_pa;
 5131	id.b.rsvd_1 = 0;
 5132	spin_lock_irqsave(&ha->hardware_lock, flags);
 5133	if (vha->hw->flags.edif_enabled) {
 5134		if (topo != 2)
 5135			qla_update_host_map(vha, id);
 5136	} else if (!(topo == 2 && ha->flags.n2n_bigger))
 5137		qla_update_host_map(vha, id);
 5138	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 5139
 5140	if (!vha->flags.init_done)
 5141		ql_log(ql_log_info, vha, 0x2010,
 5142		    "Topology - %s, Host Loop address 0x%x.\n",
 5143		    connect_type, vha->loop_id);
 5144
 5145	return(rval);
 5146}
 5147
 5148inline void
 5149qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
 5150		       const char *def)
 5151{
 5152	char *st, *en;
 5153	uint16_t index;
 5154	uint64_t zero[2] = { 0 };
 5155	struct qla_hw_data *ha = vha->hw;
 5156	int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
 5157	    !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
 5158
 5159	if (len > sizeof(zero))
 5160		len = sizeof(zero);
 5161	if (memcmp(model, &zero, len) != 0) {
 5162		memcpy(ha->model_number, model, len);
 5163		st = en = ha->model_number;
 5164		en += len - 1;
 5165		while (en > st) {
 5166			if (*en != 0x20 && *en != 0x00)
 5167				break;
 5168			*en-- = '\0';
 5169		}
 5170
 5171		index = (ha->pdev->subsystem_device & 0xff);
 5172		if (use_tbl &&
 5173		    ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
 5174		    index < QLA_MODEL_NAMES)
 5175			strscpy(ha->model_desc,
 5176			    qla2x00_model_name[index * 2 + 1],
 5177			    sizeof(ha->model_desc));
 5178	} else {
 5179		index = (ha->pdev->subsystem_device & 0xff);
 5180		if (use_tbl &&
 5181		    ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
 5182		    index < QLA_MODEL_NAMES) {
 5183			strscpy(ha->model_number,
 5184				qla2x00_model_name[index * 2],
 5185				sizeof(ha->model_number));
 5186			strscpy(ha->model_desc,
 5187			    qla2x00_model_name[index * 2 + 1],
 5188			    sizeof(ha->model_desc));
 5189		} else {
 5190			strscpy(ha->model_number, def,
 5191				sizeof(ha->model_number));
 5192		}
 5193	}
 5194	if (IS_FWI2_CAPABLE(ha))
 5195		qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
 5196		    sizeof(ha->model_desc));
 5197}
 5198
 5199/* On sparc systems, obtain port and node WWN from firmware
 5200 * properties.
 5201 */
 5202static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
 5203{
 5204#ifdef CONFIG_SPARC
 5205	struct qla_hw_data *ha = vha->hw;
 5206	struct pci_dev *pdev = ha->pdev;
 5207	struct device_node *dp = pci_device_to_OF_node(pdev);
 5208	const u8 *val;
 5209	int len;
 5210
 5211	val = of_get_property(dp, "port-wwn", &len);
 5212	if (val && len >= WWN_SIZE)
 5213		memcpy(nv->port_name, val, WWN_SIZE);
 5214
 5215	val = of_get_property(dp, "node-wwn", &len);
 5216	if (val && len >= WWN_SIZE)
 5217		memcpy(nv->node_name, val, WWN_SIZE);
 5218#endif
 5219}
 5220
 5221/*
 5222* NVRAM configuration for ISP 2xxx
 5223*
 5224* Input:
 5225*      ha                = adapter block pointer.
 5226*
 5227* Output:
 5228*      initialization control block in response_ring
 5229*      host adapters parameters in host adapter block
 5230*
 5231* Returns:
 5232*      0 = success.
 5233*/
 5234int
 5235qla2x00_nvram_config(scsi_qla_host_t *vha)
 5236{
 5237	int             rval;
 5238	uint8_t         chksum = 0;
 5239	uint16_t        cnt;
 5240	uint8_t         *dptr1, *dptr2;
 5241	struct qla_hw_data *ha = vha->hw;
 5242	init_cb_t       *icb = ha->init_cb;
 5243	nvram_t         *nv = ha->nvram;
 5244	uint8_t         *ptr = ha->nvram;
 5245	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 5246
 5247	rval = QLA_SUCCESS;
 5248
 5249	/* Determine NVRAM starting address. */
 5250	ha->nvram_size = sizeof(*nv);
 5251	ha->nvram_base = 0;
 5252	if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
 5253		if ((rd_reg_word(&reg->ctrl_status) >> 14) == 1)
 5254			ha->nvram_base = 0x80;
 5255
 5256	/* Get NVRAM data and calculate checksum. */
 5257	ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
 5258	for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
 5259		chksum += *ptr++;
 5260
 5261	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
 5262	    "Contents of NVRAM.\n");
 5263	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
 5264	    nv, ha->nvram_size);
 5265
 5266	/* Bad NVRAM data, set defaults parameters. */
 5267	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
 5268	    nv->nvram_version < 1) {
 5269		/* Reset NVRAM data. */
 5270		ql_log(ql_log_warn, vha, 0x0064,
 5271		    "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
 5272		    chksum, nv->id, nv->nvram_version);
 5273		ql_log(ql_log_warn, vha, 0x0065,
 5274		    "Falling back to "
 5275		    "functioning (yet invalid -- WWPN) defaults.\n");
 5276
 5277		/*
 5278		 * Set default initialization control block.
 5279		 */
 5280		memset(nv, 0, ha->nvram_size);
 5281		nv->parameter_block_version = ICB_VERSION;
 5282
 5283		if (IS_QLA23XX(ha)) {
 5284			nv->firmware_options[0] = BIT_2 | BIT_1;
 5285			nv->firmware_options[1] = BIT_7 | BIT_5;
 5286			nv->add_firmware_options[0] = BIT_5;
 5287			nv->add_firmware_options[1] = BIT_5 | BIT_4;
 5288			nv->frame_payload_size = cpu_to_le16(2048);
 5289			nv->special_options[1] = BIT_7;
 5290		} else if (IS_QLA2200(ha)) {
 5291			nv->firmware_options[0] = BIT_2 | BIT_1;
 5292			nv->firmware_options[1] = BIT_7 | BIT_5;
 5293			nv->add_firmware_options[0] = BIT_5;
 5294			nv->add_firmware_options[1] = BIT_5 | BIT_4;
 5295			nv->frame_payload_size = cpu_to_le16(1024);
 5296		} else if (IS_QLA2100(ha)) {
 5297			nv->firmware_options[0] = BIT_3 | BIT_1;
 5298			nv->firmware_options[1] = BIT_5;
 5299			nv->frame_payload_size = cpu_to_le16(1024);
 5300		}
 5301
 5302		nv->max_iocb_allocation = cpu_to_le16(256);
 5303		nv->execution_throttle = cpu_to_le16(16);
 5304		nv->retry_count = 8;
 5305		nv->retry_delay = 1;
 5306
 5307		nv->port_name[0] = 33;
 5308		nv->port_name[3] = 224;
 5309		nv->port_name[4] = 139;
 5310
 5311		qla2xxx_nvram_wwn_from_ofw(vha, nv);
 5312
 5313		nv->login_timeout = 4;
 5314
 5315		/*
 5316		 * Set default host adapter parameters
 5317		 */
 5318		nv->host_p[1] = BIT_2;
 5319		nv->reset_delay = 5;
 5320		nv->port_down_retry_count = 8;
 5321		nv->max_luns_per_target = cpu_to_le16(8);
 5322		nv->link_down_timeout = 60;
 5323
 5324		rval = 1;
 5325	}
 5326
 5327	/* Reset Initialization control block */
 5328	memset(icb, 0, ha->init_cb_size);
 5329
 5330	/*
 5331	 * Setup driver NVRAM options.
 5332	 */
 5333	nv->firmware_options[0] |= (BIT_6 | BIT_1);
 5334	nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
 5335	nv->firmware_options[1] |= (BIT_5 | BIT_0);
 5336	nv->firmware_options[1] &= ~BIT_4;
 5337
 5338	if (IS_QLA23XX(ha)) {
 5339		nv->firmware_options[0] |= BIT_2;
 5340		nv->firmware_options[0] &= ~BIT_3;
 5341		nv->special_options[0] &= ~BIT_6;
 5342		nv->add_firmware_options[1] |= BIT_5 | BIT_4;
 5343
 5344		if (IS_QLA2300(ha)) {
 5345			if (ha->fb_rev == FPM_2310) {
 5346				strcpy(ha->model_number, "QLA2310");
 5347			} else {
 5348				strcpy(ha->model_number, "QLA2300");
 5349			}
 5350		} else {
 5351			qla2x00_set_model_info(vha, nv->model_number,
 5352			    sizeof(nv->model_number), "QLA23xx");
 5353		}
 5354	} else if (IS_QLA2200(ha)) {
 5355		nv->firmware_options[0] |= BIT_2;
 5356		/*
 5357		 * 'Point-to-point preferred, else loop' is not a safe
 5358		 * connection mode setting.
 5359		 */
 5360		if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
 5361		    (BIT_5 | BIT_4)) {
 5362			/* Force 'loop preferred, else point-to-point'. */
 5363			nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
 5364			nv->add_firmware_options[0] |= BIT_5;
 5365		}
 5366		strcpy(ha->model_number, "QLA22xx");
 5367	} else /*if (IS_QLA2100(ha))*/ {
 5368		strcpy(ha->model_number, "QLA2100");
 5369	}
 5370
 5371	/*
 5372	 * Copy over NVRAM RISC parameter block to initialization control block.
 5373	 */
 5374	dptr1 = (uint8_t *)icb;
 5375	dptr2 = (uint8_t *)&nv->parameter_block_version;
 5376	cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
 5377	while (cnt--)
 5378		*dptr1++ = *dptr2++;
 5379
 5380	/* Copy 2nd half. */
 5381	dptr1 = (uint8_t *)icb->add_firmware_options;
 5382	cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
 5383	while (cnt--)
 5384		*dptr1++ = *dptr2++;
 5385	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
 5386	/* Use alternate WWN? */
 5387	if (nv->host_p[1] & BIT_7) {
 5388		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
 5389		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
 5390	}
 5391
 5392	/* Prepare nodename */
 5393	if ((icb->firmware_options[1] & BIT_6) == 0) {
 5394		/*
 5395		 * Firmware will apply the following mask if the nodename was
 5396		 * not provided.
 5397		 */
 5398		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
 5399		icb->node_name[0] &= 0xF0;
 5400	}
 5401
 5402	/*
 5403	 * Set host adapter parameters.
 5404	 */
 5405
 5406	/*
 5407	 * BIT_7 in the host-parameters section allows for modification to
 5408	 * internal driver logging.
 5409	 */
 5410	if (nv->host_p[0] & BIT_7)
 5411		ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
 5412	ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
 5413	/* Always load RISC code on non ISP2[12]00 chips. */
 5414	if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
 5415		ha->flags.disable_risc_code_load = 0;
 5416	ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
 5417	ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
 5418	ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
 5419	ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
 5420	ha->flags.disable_serdes = 0;
 5421
 5422	ha->operating_mode =
 5423	    (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
 5424
 5425	memcpy(ha->fw_seriallink_options, nv->seriallink_options,
 5426	    sizeof(ha->fw_seriallink_options));
 5427
 5428	/* save HBA serial number */
 5429	ha->serial0 = icb->port_name[5];
 5430	ha->serial1 = icb->port_name[6];
 5431	ha->serial2 = icb->port_name[7];
 5432	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
 5433	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
 5434
 5435	icb->execution_throttle = cpu_to_le16(0xFFFF);
 5436
 5437	ha->retry_count = nv->retry_count;
 5438
 5439	/* Set minimum login_timeout to 4 seconds. */
 5440	if (nv->login_timeout != ql2xlogintimeout)
 5441		nv->login_timeout = ql2xlogintimeout;
 5442	if (nv->login_timeout < 4)
 5443		nv->login_timeout = 4;
 5444	ha->login_timeout = nv->login_timeout;
 5445
 5446	/* Set minimum RATOV to 100 tenths of a second. */
 5447	ha->r_a_tov = 100;
 5448
 5449	ha->loop_reset_delay = nv->reset_delay;
 5450
 5451	/* Link Down Timeout = 0:
 5452	 *
 5453	 * 	When Port Down timer expires we will start returning
 5454	 *	I/O's to OS with "DID_NO_CONNECT".
 5455	 *
 5456	 * Link Down Timeout != 0:
 5457	 *
 5458	 *	 The driver waits for the link to come up after link down
 5459	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
 5460	 */
 5461	if (nv->link_down_timeout == 0) {
 5462		ha->loop_down_abort_time =
 5463		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
 5464	} else {
 5465		ha->link_down_timeout =	 nv->link_down_timeout;
 5466		ha->loop_down_abort_time =
 5467		    (LOOP_DOWN_TIME - ha->link_down_timeout);
 5468	}
 5469
 5470	/*
 5471	 * Need enough time to try and get the port back.
 5472	 */
 5473	ha->port_down_retry_count = nv->port_down_retry_count;
 5474	if (qlport_down_retry)
 5475		ha->port_down_retry_count = qlport_down_retry;
 5476	/* Set login_retry_count */
 5477	ha->login_retry_count  = nv->retry_count;
 5478	if (ha->port_down_retry_count == nv->port_down_retry_count &&
 5479	    ha->port_down_retry_count > 3)
 5480		ha->login_retry_count = ha->port_down_retry_count;
 5481	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
 5482		ha->login_retry_count = ha->port_down_retry_count;
 5483	if (ql2xloginretrycount)
 5484		ha->login_retry_count = ql2xloginretrycount;
 5485
 5486	icb->lun_enables = cpu_to_le16(0);
 5487	icb->command_resource_count = 0;
 5488	icb->immediate_notify_resource_count = 0;
 5489	icb->timeout = cpu_to_le16(0);
 5490
 5491	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
 5492		/* Enable RIO */
 5493		icb->firmware_options[0] &= ~BIT_3;
 5494		icb->add_firmware_options[0] &=
 5495		    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
 5496		icb->add_firmware_options[0] |= BIT_2;
 5497		icb->response_accumulation_timer = 3;
 5498		icb->interrupt_delay_timer = 5;
 5499
 5500		vha->flags.process_response_queue = 1;
 5501	} else {
 5502		/* Enable ZIO. */
 5503		if (!vha->flags.init_done) {
 5504			ha->zio_mode = icb->add_firmware_options[0] &
 5505			    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
 5506			ha->zio_timer = icb->interrupt_delay_timer ?
 5507			    icb->interrupt_delay_timer : 2;
 5508		}
 5509		icb->add_firmware_options[0] &=
 5510		    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
 5511		vha->flags.process_response_queue = 0;
 5512		if (ha->zio_mode != QLA_ZIO_DISABLED) {
 5513			ha->zio_mode = QLA_ZIO_MODE_6;
 5514
 5515			ql_log(ql_log_info, vha, 0x0068,
 5516			    "ZIO mode %d enabled; timer delay (%d us).\n",
 5517			    ha->zio_mode, ha->zio_timer * 100);
 5518
 5519			icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
 5520			icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
 5521			vha->flags.process_response_queue = 1;
 5522		}
 5523	}
 5524
 5525	if (rval) {
 5526		ql_log(ql_log_warn, vha, 0x0069,
 5527		    "NVRAM configuration failed.\n");
 5528	}
 5529	return (rval);
 5530}
 5531
 5532void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
 5533{
 5534	int old_state;
 5535
 5536	old_state = atomic_read(&fcport->state);
 5537	atomic_set(&fcport->state, state);
 5538
 5539	/* Don't print state transitions during initial allocation of fcport */
 5540	if (old_state && old_state != state) {
 5541		ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
 5542		       "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
 5543		       fcport->port_name, port_state_str[old_state],
 5544		       port_state_str[state], fcport->d_id.b.domain,
 5545		       fcport->d_id.b.area, fcport->d_id.b.al_pa);
 5546	}
 5547}
 5548
 5549/**
 5550 * qla2x00_alloc_fcport() - Allocate a generic fcport.
 5551 * @vha: HA context
 5552 * @flags: allocation flags
 5553 *
 5554 * Returns a pointer to the allocated fcport, or NULL, if none available.
 5555 */
 5556fc_port_t *
 5557qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
 5558{
 5559	fc_port_t *fcport;
 5560
 5561	fcport = kzalloc(sizeof(fc_port_t), flags);
 5562	if (!fcport)
 5563		return NULL;
 5564
 5565	fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
 5566		sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
 5567		flags);
 5568	if (!fcport->ct_desc.ct_sns) {
 5569		ql_log(ql_log_warn, vha, 0xd049,
 5570		    "Failed to allocate ct_sns request.\n");
 5571		kfree(fcport);
 5572		return NULL;
 5573	}
 5574
 5575	/* Setup fcport template structure. */
 5576	fcport->vha = vha;
 5577	fcport->port_type = FCT_UNKNOWN;
 5578	fcport->loop_id = FC_NO_LOOP_ID;
 5579	qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
 5580	fcport->supported_classes = FC_COS_UNSPECIFIED;
 5581	fcport->fp_speed = PORT_SPEED_UNKNOWN;
 5582
 5583	fcport->disc_state = DSC_DELETED;
 5584	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
 5585	fcport->deleted = QLA_SESS_DELETED;
 5586	fcport->login_retry = vha->hw->login_retry_count;
 5587	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
 5588	fcport->logout_on_delete = 1;
 5589	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
 5590	fcport->tgt_short_link_down_cnt = 0;
 5591	fcport->dev_loss_tmo = 0;
 5592
 5593	if (!fcport->ct_desc.ct_sns) {
 5594		ql_log(ql_log_warn, vha, 0xd049,
 5595		    "Failed to allocate ct_sns request.\n");
 5596		kfree(fcport);
 5597		return NULL;
 5598	}
 5599
 5600	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
 5601	INIT_WORK(&fcport->free_work, qlt_free_session_done);
 5602	INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
 5603	INIT_LIST_HEAD(&fcport->gnl_entry);
 5604	INIT_LIST_HEAD(&fcport->list);
 5605	INIT_LIST_HEAD(&fcport->unsol_ctx_head);
 5606
 5607	INIT_LIST_HEAD(&fcport->sess_cmd_list);
 5608	spin_lock_init(&fcport->sess_cmd_lock);
 5609
 5610	spin_lock_init(&fcport->edif.sa_list_lock);
 5611	INIT_LIST_HEAD(&fcport->edif.tx_sa_list);
 5612	INIT_LIST_HEAD(&fcport->edif.rx_sa_list);
 5613
 5614	spin_lock_init(&fcport->edif.indx_list_lock);
 5615	INIT_LIST_HEAD(&fcport->edif.edif_indx_list);
 5616
 5617	return fcport;
 5618}
 5619
 5620void
 5621qla2x00_free_fcport(fc_port_t *fcport)
 5622{
 5623	if (fcport->ct_desc.ct_sns) {
 5624		dma_free_coherent(&fcport->vha->hw->pdev->dev,
 5625			sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
 5626			fcport->ct_desc.ct_sns_dma);
 5627
 5628		fcport->ct_desc.ct_sns = NULL;
 5629	}
 5630
 5631	qla_edif_flush_sa_ctl_lists(fcport);
 5632	list_del(&fcport->list);
 5633	qla2x00_clear_loop_id(fcport);
 5634
 5635	qla_edif_list_del(fcport);
 5636
 5637	kfree(fcport);
 5638}
 5639
 5640static void qla_get_login_template(scsi_qla_host_t *vha)
 5641{
 5642	struct qla_hw_data *ha = vha->hw;
 5643	int rval;
 5644	u32 *bp, sz;
 5645	__be32 *q;
 5646
 5647	memset(ha->init_cb, 0, ha->init_cb_size);
 5648	sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
 5649	rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
 5650					    ha->init_cb, sz);
 5651	if (rval != QLA_SUCCESS) {
 5652		ql_dbg(ql_dbg_init, vha, 0x00d1,
 5653		       "PLOGI ELS param read fail.\n");
 5654		return;
 5655	}
 5656	q = (__be32 *)&ha->plogi_els_payld.fl_csp;
 5657
 5658	bp = (uint32_t *)ha->init_cb;
 5659	cpu_to_be32_array(q, bp, sz / 4);
 5660	ha->flags.plogi_template_valid = 1;
 5661}
 5662
 5663/*
 5664 * qla2x00_configure_loop
 5665 *      Updates Fibre Channel Device Database with what is actually on loop.
 5666 *
 5667 * Input:
 5668 *      ha                = adapter block pointer.
 5669 *
 5670 * Returns:
 5671 *      0 = success.
 5672 *      1 = error.
 5673 *      2 = database was full and device was not configured.
 5674 */
 5675static int
 5676qla2x00_configure_loop(scsi_qla_host_t *vha)
 5677{
 5678	int  rval;
 5679	unsigned long flags, save_flags;
 5680	struct qla_hw_data *ha = vha->hw;
 5681
 5682	rval = QLA_SUCCESS;
 5683
 5684	/* Get Initiator ID */
 5685	if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
 5686		rval = qla2x00_configure_hba(vha);
 5687		if (rval != QLA_SUCCESS) {
 5688			ql_dbg(ql_dbg_disc, vha, 0x2013,
 5689			    "Unable to configure HBA.\n");
 5690			return (rval);
 5691		}
 5692	}
 5693
 5694	save_flags = flags = vha->dpc_flags;
 5695	ql_dbg(ql_dbg_disc, vha, 0x2014,
 5696	    "Configure loop -- dpc flags = 0x%lx.\n", flags);
 5697
 5698	/*
 5699	 * If we have both an RSCN and PORT UPDATE pending then handle them
 5700	 * both at the same time.
 5701	 */
 5702	clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
 5703	clear_bit(RSCN_UPDATE, &vha->dpc_flags);
 5704
 5705	qla2x00_get_data_rate(vha);
 5706	qla_get_login_template(vha);
 5707
 5708	/* Determine what we need to do */
 5709	if ((ha->current_topology == ISP_CFG_FL ||
 5710	    ha->current_topology == ISP_CFG_F) &&
 5711	    (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
 5712
 5713		set_bit(RSCN_UPDATE, &flags);
 5714		clear_bit(LOCAL_LOOP_UPDATE, &flags);
 5715
 5716	} else if (ha->current_topology == ISP_CFG_NL ||
 5717		   ha->current_topology == ISP_CFG_N) {
 5718		clear_bit(RSCN_UPDATE, &flags);
 5719		set_bit(LOCAL_LOOP_UPDATE, &flags);
 5720	} else if (!vha->flags.online ||
 5721	    (test_bit(ABORT_ISP_ACTIVE, &flags))) {
 5722		set_bit(RSCN_UPDATE, &flags);
 5723		set_bit(LOCAL_LOOP_UPDATE, &flags);
 5724	}
 5725
 5726	if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
 5727		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
 5728			ql_dbg(ql_dbg_disc, vha, 0x2015,
 5729			    "Loop resync needed, failing.\n");
 5730			rval = QLA_FUNCTION_FAILED;
 5731		} else
 5732			rval = qla2x00_configure_local_loop(vha);
 5733	}
 5734
 5735	if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
 5736		if (LOOP_TRANSITION(vha)) {
 5737			ql_dbg(ql_dbg_disc, vha, 0x2099,
 5738			    "Needs RSCN update and loop transition.\n");
 5739			rval = QLA_FUNCTION_FAILED;
 5740		}
 5741		else
 5742			rval = qla2x00_configure_fabric(vha);
 5743	}
 5744
 5745	if (rval == QLA_SUCCESS) {
 5746		if (atomic_read(&vha->loop_down_timer) ||
 5747		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
 5748			rval = QLA_FUNCTION_FAILED;
 5749		} else {
 5750			atomic_set(&vha->loop_state, LOOP_READY);
 5751			ql_dbg(ql_dbg_disc, vha, 0x2069,
 5752			    "LOOP READY.\n");
 5753			ha->flags.fw_init_done = 1;
 5754
 5755			/*
 5756			 * use link up to wake up app to get ready for
 5757			 * authentication.
 5758			 */
 5759			if (ha->flags.edif_enabled && DBELL_INACTIVE(vha))
 5760				qla2x00_post_aen_work(vha, FCH_EVT_LINKUP,
 5761						      ha->link_data_rate);
 5762
 5763			/*
 5764			 * Process any ATIO queue entries that came in
 5765			 * while we weren't online.
 5766			 */
 5767			if (qla_tgt_mode_enabled(vha) ||
 5768			    qla_dual_mode_enabled(vha)) {
 5769				spin_lock_irqsave(&ha->tgt.atio_lock, flags);
 5770				qlt_24xx_process_atio_queue(vha, 0);
 5771				spin_unlock_irqrestore(&ha->tgt.atio_lock,
 5772				    flags);
 5773			}
 5774		}
 5775	}
 5776
 5777	if (rval) {
 5778		ql_dbg(ql_dbg_disc, vha, 0x206a,
 5779		    "%s *** FAILED ***.\n", __func__);
 5780	} else {
 5781		ql_dbg(ql_dbg_disc, vha, 0x206b,
 5782		    "%s: exiting normally. local port wwpn %8phN id %06x)\n",
 5783		    __func__, vha->port_name, vha->d_id.b24);
 5784	}
 5785
 5786	/* Restore state if a resync event occurred during processing */
 5787	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
 5788		if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
 5789			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
 5790		if (test_bit(RSCN_UPDATE, &save_flags)) {
 5791			set_bit(RSCN_UPDATE, &vha->dpc_flags);
 5792		}
 5793	}
 5794
 5795	return (rval);
 5796}
 5797
 5798static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
 5799{
 5800	unsigned long flags;
 5801	fc_port_t *fcport;
 5802
 5803	ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__);
 5804
 5805	if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
 5806		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
 5807
 5808	list_for_each_entry(fcport, &vha->vp_fcports, list) {
 5809		if (fcport->n2n_flag) {
 5810			qla24xx_fcport_handle_login(vha, fcport);
 5811			return QLA_SUCCESS;
 5812		}
 5813	}
 5814
 5815	spin_lock_irqsave(&vha->work_lock, flags);
 5816	vha->scan.scan_retry++;
 5817	spin_unlock_irqrestore(&vha->work_lock, flags);
 5818
 5819	if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
 5820		set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
 5821		set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 5822	}
 5823	return QLA_FUNCTION_FAILED;
 5824}
 5825
 5826static void
 5827qla_reinitialize_link(scsi_qla_host_t *vha)
 5828{
 5829	int rval;
 5830
 5831	atomic_set(&vha->loop_state, LOOP_DOWN);
 5832	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
 5833	rval = qla2x00_full_login_lip(vha);
 5834	if (rval == QLA_SUCCESS) {
 5835		ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n");
 5836	} else {
 5837		ql_dbg(ql_dbg_disc, vha, 0xd051,
 5838			"Link reinitialization failed (%d)\n", rval);
 5839	}
 5840}
 5841
 5842/*
 5843 * qla2x00_configure_local_loop
 5844 *	Updates Fibre Channel Device Database with local loop devices.
 5845 *
 5846 * Input:
 5847 *	ha = adapter block pointer.
 5848 *
 5849 * Returns:
 5850 *	0 = success.
 5851 */
 5852static int
 5853qla2x00_configure_local_loop(scsi_qla_host_t *vha)
 5854{
 5855	int		rval, rval2;
 5856	int		found;
 5857	fc_port_t	*fcport, *new_fcport;
 5858	uint16_t	index;
 5859	uint16_t	entries;
 5860	struct gid_list_info *gid;
 5861	uint16_t	loop_id;
 5862	uint8_t		domain, area, al_pa;
 5863	struct qla_hw_data *ha = vha->hw;
 5864	unsigned long flags;
 5865
 5866	/* Inititae N2N login. */
 5867	if (N2N_TOPO(ha))
 5868		return qla2x00_configure_n2n_loop(vha);
 5869
 5870	new_fcport = NULL;
 5871	entries = MAX_FIBRE_DEVICES_LOOP;
 5872
 5873	/* Get list of logged in devices. */
 5874	memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
 5875	rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
 5876	    &entries);
 5877	if (rval != QLA_SUCCESS)
 5878		goto err;
 5879
 5880	ql_dbg(ql_dbg_disc, vha, 0x2011,
 5881	    "Entries in ID list (%d).\n", entries);
 5882	ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
 5883	    ha->gid_list, entries * sizeof(*ha->gid_list));
 5884
 5885	if (entries == 0) {
 5886		spin_lock_irqsave(&vha->work_lock, flags);
 5887		vha->scan.scan_retry++;
 5888		spin_unlock_irqrestore(&vha->work_lock, flags);
 5889
 5890		if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
 5891			u8 loop_map_entries = 0;
 5892			int rc;
 5893
 5894			rc = qla2x00_get_fcal_position_map(vha, NULL,
 5895						&loop_map_entries);
 5896			if (rc == QLA_SUCCESS && loop_map_entries > 1) {
 5897				/*
 5898				 * There are devices that are still not logged
 5899				 * in. Reinitialize to give them a chance.
 5900				 */
 5901				qla_reinitialize_link(vha);
 5902				return QLA_FUNCTION_FAILED;
 5903			}
 5904			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
 5905			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 5906		}
 5907	} else {
 5908		vha->scan.scan_retry = 0;
 5909	}
 5910
 5911	list_for_each_entry(fcport, &vha->vp_fcports, list) {
 5912		fcport->scan_state = QLA_FCPORT_SCAN;
 5913	}
 5914
 5915	/* Allocate temporary fcport for any new fcports discovered. */
 5916	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
 5917	if (new_fcport == NULL) {
 5918		ql_log(ql_log_warn, vha, 0x2012,
 5919		    "Memory allocation failed for fcport.\n");
 5920		rval = QLA_MEMORY_ALLOC_FAILED;
 5921		goto err;
 5922	}
 5923	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
 5924
 5925	/* Add devices to port list. */
 5926	gid = ha->gid_list;
 5927	for (index = 0; index < entries; index++) {
 5928		domain = gid->domain;
 5929		area = gid->area;
 5930		al_pa = gid->al_pa;
 5931		if (IS_QLA2100(ha) || IS_QLA2200(ha))
 5932			loop_id = gid->loop_id_2100;
 5933		else
 5934			loop_id = le16_to_cpu(gid->loop_id);
 5935		gid = (void *)gid + ha->gid_list_info_size;
 5936
 5937		/* Bypass reserved domain fields. */
 5938		if ((domain & 0xf0) == 0xf0)
 5939			continue;
 5940
 5941		/* Bypass if not same domain and area of adapter. */
 5942		if (area && domain && ((area != vha->d_id.b.area) ||
 5943		    (domain != vha->d_id.b.domain)) &&
 5944		    (ha->current_topology == ISP_CFG_NL))
 5945			continue;
 5946
 5947
 5948		/* Bypass invalid local loop ID. */
 5949		if (loop_id > LAST_LOCAL_LOOP_ID)
 5950			continue;
 5951
 5952		memset(new_fcport->port_name, 0, WWN_SIZE);
 5953
 5954		/* Fill in member data. */
 5955		new_fcport->d_id.b.domain = domain;
 5956		new_fcport->d_id.b.area = area;
 5957		new_fcport->d_id.b.al_pa = al_pa;
 5958		new_fcport->loop_id = loop_id;
 5959		new_fcport->scan_state = QLA_FCPORT_FOUND;
 5960
 5961		rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
 5962		if (rval2 != QLA_SUCCESS) {
 5963			ql_dbg(ql_dbg_disc, vha, 0x2097,
 5964			    "Failed to retrieve fcport information "
 5965			    "-- get_port_database=%x, loop_id=0x%04x.\n",
 5966			    rval2, new_fcport->loop_id);
 5967			/* Skip retry if N2N */
 5968			if (ha->current_topology != ISP_CFG_N) {
 5969				ql_dbg(ql_dbg_disc, vha, 0x2105,
 5970				    "Scheduling resync.\n");
 5971				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 5972				continue;
 5973			}
 5974		}
 5975
 5976		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 5977		/* Check for matching device in port list. */
 5978		found = 0;
 5979		fcport = NULL;
 5980		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 5981			if (memcmp(new_fcport->port_name, fcport->port_name,
 5982			    WWN_SIZE))
 5983				continue;
 5984
 5985			fcport->flags &= ~FCF_FABRIC_DEVICE;
 5986			fcport->loop_id = new_fcport->loop_id;
 5987			fcport->port_type = new_fcport->port_type;
 5988			fcport->d_id.b24 = new_fcport->d_id.b24;
 5989			memcpy(fcport->node_name, new_fcport->node_name,
 5990			    WWN_SIZE);
 5991			fcport->scan_state = QLA_FCPORT_FOUND;
 5992			if (fcport->login_retry == 0) {
 5993				fcport->login_retry = vha->hw->login_retry_count;
 5994				ql_dbg(ql_dbg_disc, vha, 0x2135,
 5995				    "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
 5996				    fcport->port_name, fcport->loop_id,
 5997				    fcport->login_retry);
 5998			}
 5999			found++;
 6000			break;
 6001		}
 6002
 6003		if (!found) {
 6004			/* New device, add to fcports list. */
 6005			list_add_tail(&new_fcport->list, &vha->vp_fcports);
 6006
 6007			/* Allocate a new replacement fcport. */
 6008			fcport = new_fcport;
 6009
 6010			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 6011
 6012			new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
 6013
 6014			if (new_fcport == NULL) {
 6015				ql_log(ql_log_warn, vha, 0xd031,
 6016				    "Failed to allocate memory for fcport.\n");
 6017				rval = QLA_MEMORY_ALLOC_FAILED;
 6018				goto err;
 6019			}
 6020			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 6021			new_fcport->flags &= ~FCF_FABRIC_DEVICE;
 6022		}
 6023
 6024		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 6025
 6026		/* Base iIDMA settings on HBA port speed. */
 6027		fcport->fp_speed = ha->link_data_rate;
 6028	}
 6029
 6030	list_for_each_entry(fcport, &vha->vp_fcports, list) {
 6031		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6032			break;
 6033
 6034		if (fcport->scan_state == QLA_FCPORT_SCAN) {
 6035			if ((qla_dual_mode_enabled(vha) ||
 6036			    qla_ini_mode_enabled(vha)) &&
 6037			    atomic_read(&fcport->state) == FCS_ONLINE) {
 6038				qla2x00_mark_device_lost(vha, fcport,
 6039					ql2xplogiabsentdevice);
 6040				if (fcport->loop_id != FC_NO_LOOP_ID &&
 6041				    (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
 6042				    fcport->port_type != FCT_INITIATOR &&
 6043				    fcport->port_type != FCT_BROADCAST) {
 6044					ql_dbg(ql_dbg_disc, vha, 0x20f0,
 6045					    "%s %d %8phC post del sess\n",
 6046					    __func__, __LINE__,
 6047					    fcport->port_name);
 6048
 6049					qlt_schedule_sess_for_deletion(fcport);
 6050					continue;
 6051				}
 6052			}
 6053		}
 6054
 6055		if (fcport->scan_state == QLA_FCPORT_FOUND)
 6056			qla24xx_fcport_handle_login(vha, fcport);
 6057	}
 6058
 6059	qla2x00_free_fcport(new_fcport);
 6060
 6061	return rval;
 6062
 6063err:
 6064	ql_dbg(ql_dbg_disc, vha, 0x2098,
 6065	       "Configure local loop error exit: rval=%x.\n", rval);
 6066	return rval;
 6067}
 6068
 6069static void
 6070qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
 6071{
 6072	int rval;
 6073	uint16_t mb[MAILBOX_REGISTER_COUNT];
 6074	struct qla_hw_data *ha = vha->hw;
 6075
 6076	if (!IS_IIDMA_CAPABLE(ha))
 6077		return;
 6078
 6079	if (atomic_read(&fcport->state) != FCS_ONLINE)
 6080		return;
 6081
 6082	if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
 6083	    fcport->fp_speed > ha->link_data_rate ||
 6084	    !ha->flags.gpsc_supported)
 6085		return;
 6086
 6087	rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
 6088	    mb);
 6089	if (rval != QLA_SUCCESS) {
 6090		ql_dbg(ql_dbg_disc, vha, 0x2004,
 6091		    "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
 6092		    fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
 6093	} else {
 6094		ql_dbg(ql_dbg_disc, vha, 0x2005,
 6095		    "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
 6096		    qla2x00_get_link_speed_str(ha, fcport->fp_speed),
 6097		    fcport->fp_speed, fcport->port_name);
 6098	}
 6099}
 6100
 6101void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
 6102{
 6103	qla2x00_iidma_fcport(vha, fcport);
 6104	qla24xx_update_fcport_fcp_prio(vha, fcport);
 6105}
 6106
 6107int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
 6108{
 6109	struct qla_work_evt *e;
 6110
 6111	e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
 6112	if (!e)
 6113		return QLA_FUNCTION_FAILED;
 6114
 6115	e->u.fcport.fcport = fcport;
 6116	return qla2x00_post_work(vha, e);
 6117}
 6118
 6119/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
 6120static void
 6121qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
 6122{
 6123	struct fc_rport_identifiers rport_ids;
 6124	struct fc_rport *rport;
 6125	unsigned long flags;
 6126
 6127	if (atomic_read(&fcport->state) == FCS_ONLINE)
 6128		return;
 6129
 6130	rport_ids.node_name = wwn_to_u64(fcport->node_name);
 6131	rport_ids.port_name = wwn_to_u64(fcport->port_name);
 6132	rport_ids.port_id = fcport->d_id.b.domain << 16 |
 6133	    fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
 6134	rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
 6135	fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
 6136	if (!rport) {
 6137		ql_log(ql_log_warn, vha, 0x2006,
 6138		    "Unable to allocate fc remote port.\n");
 6139		return;
 6140	}
 6141
 6142	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
 6143	*((fc_port_t **)rport->dd_data) = fcport;
 6144	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
 6145	fcport->dev_loss_tmo = rport->dev_loss_tmo;
 6146
 6147	rport->supported_classes = fcport->supported_classes;
 6148
 6149	rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
 6150	if (fcport->port_type == FCT_INITIATOR)
 6151		rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
 6152	if (fcport->port_type == FCT_TARGET)
 6153		rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
 6154	if (fcport->port_type & FCT_NVME_INITIATOR)
 6155		rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
 6156	if (fcport->port_type & FCT_NVME_TARGET)
 6157		rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
 6158	if (fcport->port_type & FCT_NVME_DISCOVERY)
 6159		rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
 6160
 6161	fc_remote_port_rolechg(rport, rport_ids.roles);
 6162
 6163	ql_dbg(ql_dbg_disc, vha, 0x20ee,
 6164	    "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
 6165	    __func__, fcport->port_name, vha->host_no,
 6166	    rport->scsi_target_id, rport,
 6167	    (fcport->port_type == FCT_TARGET) ? "tgt" :
 6168	    ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
 6169}
 6170
 6171/*
 6172 * qla2x00_update_fcport
 6173 *	Updates device on list.
 6174 *
 6175 * Input:
 6176 *	ha = adapter block pointer.
 6177 *	fcport = port structure pointer.
 6178 *
 6179 * Return:
 6180 *	0  - Success
 6181 *  BIT_0 - error
 6182 *
 6183 * Context:
 6184 *	Kernel context.
 6185 */
 6186void
 6187qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
 6188{
 6189	unsigned long flags;
 6190
 6191	if (IS_SW_RESV_ADDR(fcport->d_id))
 6192		return;
 6193
 6194	ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
 6195	    __func__, fcport->port_name);
 6196
 6197	qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
 6198	fcport->login_retry = vha->hw->login_retry_count;
 6199	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
 6200
 6201	spin_lock_irqsave(&vha->work_lock, flags);
 6202	fcport->deleted = 0;
 6203	spin_unlock_irqrestore(&vha->work_lock, flags);
 6204
 6205	if (vha->hw->current_topology == ISP_CFG_NL)
 6206		fcport->logout_on_delete = 0;
 6207	else
 6208		fcport->logout_on_delete = 1;
 6209	fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
 6210
 6211	if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
 6212		fcport->tgt_short_link_down_cnt++;
 6213		fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
 6214	}
 6215
 6216	switch (vha->hw->current_topology) {
 6217	case ISP_CFG_N:
 6218	case ISP_CFG_NL:
 6219		fcport->keep_nport_handle = 1;
 6220		break;
 6221	default:
 6222		break;
 6223	}
 6224
 6225	qla2x00_iidma_fcport(vha, fcport);
 6226
 6227	qla2x00_dfs_create_rport(vha, fcport);
 6228
 6229	qla24xx_update_fcport_fcp_prio(vha, fcport);
 6230
 6231	switch (vha->host->active_mode) {
 6232	case MODE_INITIATOR:
 6233		qla2x00_reg_remote_port(vha, fcport);
 6234		break;
 6235	case MODE_TARGET:
 6236		if (!vha->vha_tgt.qla_tgt->tgt_stop &&
 6237			!vha->vha_tgt.qla_tgt->tgt_stopped)
 6238			qlt_fc_port_added(vha, fcport);
 6239		break;
 6240	case MODE_DUAL:
 6241		qla2x00_reg_remote_port(vha, fcport);
 6242		if (!vha->vha_tgt.qla_tgt->tgt_stop &&
 6243			!vha->vha_tgt.qla_tgt->tgt_stopped)
 6244			qlt_fc_port_added(vha, fcport);
 6245		break;
 6246	default:
 6247		break;
 6248	}
 6249
 6250	if (NVME_TARGET(vha->hw, fcport))
 6251		qla_nvme_register_remote(vha, fcport);
 6252
 6253	qla2x00_set_fcport_state(fcport, FCS_ONLINE);
 6254
 6255	if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
 6256		if (fcport->id_changed) {
 6257			fcport->id_changed = 0;
 6258			ql_dbg(ql_dbg_disc, vha, 0x20d7,
 6259			    "%s %d %8phC post gfpnid fcp_cnt %d\n",
 6260			    __func__, __LINE__, fcport->port_name,
 6261			    vha->fcport_count);
 6262			qla24xx_post_gfpnid_work(vha, fcport);
 6263		} else {
 6264			ql_dbg(ql_dbg_disc, vha, 0x20d7,
 6265			    "%s %d %8phC post gpsc fcp_cnt %d\n",
 6266			    __func__, __LINE__, fcport->port_name,
 6267			    vha->fcport_count);
 6268			qla24xx_post_gpsc_work(vha, fcport);
 6269		}
 6270	}
 6271
 6272	qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
 6273}
 6274
 6275void qla_register_fcport_fn(struct work_struct *work)
 6276{
 6277	fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
 6278	u32 rscn_gen = fcport->rscn_gen;
 6279	u16 data[2];
 6280
 6281	if (IS_SW_RESV_ADDR(fcport->d_id))
 6282		return;
 6283
 6284	qla2x00_update_fcport(fcport->vha, fcport);
 6285
 6286	ql_dbg(ql_dbg_disc, fcport->vha, 0x911e,
 6287	       "%s rscn gen %d/%d next DS %d\n", __func__,
 6288	       rscn_gen, fcport->rscn_gen, fcport->next_disc_state);
 6289
 6290	if (rscn_gen != fcport->rscn_gen) {
 6291		/* RSCN(s) came in while registration */
 6292		switch (fcport->next_disc_state) {
 6293		case DSC_DELETE_PEND:
 6294			qlt_schedule_sess_for_deletion(fcport);
 6295			break;
 6296		case DSC_ADISC:
 6297			data[0] = data[1] = 0;
 6298			qla2x00_post_async_adisc_work(fcport->vha, fcport,
 6299			    data);
 6300			break;
 6301		default:
 6302			break;
 6303		}
 6304	}
 6305}
 6306
 6307/*
 6308 * qla2x00_configure_fabric
 6309 *      Setup SNS devices with loop ID's.
 6310 *
 6311 * Input:
 6312 *      ha = adapter block pointer.
 6313 *
 6314 * Returns:
 6315 *      0 = success.
 6316 *      BIT_0 = error
 6317 */
 6318static int
 6319qla2x00_configure_fabric(scsi_qla_host_t *vha)
 6320{
 6321	int	rval;
 6322	fc_port_t	*fcport;
 6323	uint16_t	mb[MAILBOX_REGISTER_COUNT];
 6324	uint16_t	loop_id;
 6325	struct qla_hw_data *ha = vha->hw;
 6326	int		discovery_gen;
 6327
 6328	/* If FL port exists, then SNS is present */
 6329	if (IS_FWI2_CAPABLE(ha))
 6330		loop_id = NPH_F_PORT;
 6331	else
 6332		loop_id = SNS_FL_PORT;
 6333	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
 6334	if (rval != QLA_SUCCESS) {
 6335		ql_dbg(ql_dbg_disc, vha, 0x20a0,
 6336		    "MBX_GET_PORT_NAME failed, No FL Port.\n");
 6337
 6338		vha->device_flags &= ~SWITCH_FOUND;
 6339		return (QLA_SUCCESS);
 6340	}
 6341	vha->device_flags |= SWITCH_FOUND;
 6342
 6343	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
 6344	if (rval != QLA_SUCCESS)
 6345		ql_dbg(ql_dbg_disc, vha, 0x20ff,
 6346		    "Failed to get Fabric Port Name\n");
 6347
 6348	if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
 6349		rval = qla2x00_send_change_request(vha, 0x3, 0);
 6350		if (rval != QLA_SUCCESS)
 6351			ql_log(ql_log_warn, vha, 0x121,
 6352			    "Failed to enable receiving of RSCN requests: 0x%x.\n",
 6353			    rval);
 6354	}
 6355
 6356	do {
 6357		qla2x00_mgmt_svr_login(vha);
 6358
 6359		/* Ensure we are logged into the SNS. */
 6360		loop_id = NPH_SNS_LID(ha);
 6361		rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
 6362		    0xfc, mb, BIT_1|BIT_0);
 6363		if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
 6364			ql_dbg(ql_dbg_disc, vha, 0x20a1,
 6365			    "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
 6366			    loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
 6367			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 6368			return rval;
 6369		}
 6370
 6371		/* FDMI support. */
 6372		if (ql2xfdmienable &&
 6373		    test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
 6374			qla2x00_fdmi_register(vha);
 6375
 6376		if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
 6377			if (qla2x00_rft_id(vha)) {
 6378				/* EMPTY */
 6379				ql_dbg(ql_dbg_disc, vha, 0x20a2,
 6380				    "Register FC-4 TYPE failed.\n");
 6381				if (test_bit(LOOP_RESYNC_NEEDED,
 6382				    &vha->dpc_flags))
 6383					break;
 6384			}
 6385			if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
 6386				/* EMPTY */
 6387				ql_dbg(ql_dbg_disc, vha, 0x209a,
 6388				    "Register FC-4 Features failed.\n");
 6389				if (test_bit(LOOP_RESYNC_NEEDED,
 6390				    &vha->dpc_flags))
 6391					break;
 6392			}
 6393			if (vha->flags.nvme_enabled) {
 6394				if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
 6395					ql_dbg(ql_dbg_disc, vha, 0x2049,
 6396					    "Register NVME FC Type Features failed.\n");
 6397				}
 6398			}
 6399			if (qla2x00_rnn_id(vha)) {
 6400				/* EMPTY */
 6401				ql_dbg(ql_dbg_disc, vha, 0x2104,
 6402				    "Register Node Name failed.\n");
 6403				if (test_bit(LOOP_RESYNC_NEEDED,
 6404				    &vha->dpc_flags))
 6405					break;
 6406			} else if (qla2x00_rsnn_nn(vha)) {
 6407				/* EMPTY */
 6408				ql_dbg(ql_dbg_disc, vha, 0x209b,
 6409				    "Register Symbolic Node Name failed.\n");
 6410				if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6411					break;
 6412			}
 6413		}
 6414
 6415
 6416		/* Mark the time right before querying FW for connected ports.
 6417		 * This process is long, asynchronous and by the time it's done,
 6418		 * collected information might not be accurate anymore. E.g.
 6419		 * disconnected port might have re-connected and a brand new
 6420		 * session has been created. In this case session's generation
 6421		 * will be newer than discovery_gen. */
 6422		qlt_do_generation_tick(vha, &discovery_gen);
 6423
 6424		if (USE_ASYNC_SCAN(ha)) {
 6425			/* start of scan begins here */
 6426			vha->scan.rscn_gen_end = atomic_read(&vha->rscn_gen);
 6427			qla_fab_scan_start(vha);
 6428		} else  {
 6429			list_for_each_entry(fcport, &vha->vp_fcports, list)
 6430				fcport->scan_state = QLA_FCPORT_SCAN;
 6431
 6432			rval = qla2x00_find_all_fabric_devs(vha);
 6433		}
 6434		if (rval != QLA_SUCCESS)
 6435			break;
 6436	} while (0);
 6437
 6438	if (!vha->nvme_local_port && vha->flags.nvme_enabled)
 6439		qla_nvme_register_hba(vha);
 6440
 6441	if (rval)
 6442		ql_dbg(ql_dbg_disc, vha, 0x2068,
 6443		    "Configure fabric error exit rval=%d.\n", rval);
 6444
 6445	return (rval);
 6446}
 6447
 6448/*
 6449 * qla2x00_find_all_fabric_devs
 6450 *
 6451 * Input:
 6452 *	ha = adapter block pointer.
 6453 *	dev = database device entry pointer.
 6454 *
 6455 * Returns:
 6456 *	0 = success.
 6457 *
 6458 * Context:
 6459 *	Kernel context.
 6460 */
 6461static int
 6462qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
 6463{
 6464	int		rval;
 6465	uint16_t	loop_id;
 6466	fc_port_t	*fcport, *new_fcport;
 6467	int		found;
 6468
 6469	sw_info_t	*swl;
 6470	int		swl_idx;
 6471	int		first_dev, last_dev;
 6472	port_id_t	wrap = {}, nxt_d_id;
 6473	struct qla_hw_data *ha = vha->hw;
 6474	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 6475	unsigned long flags;
 6476
 6477	rval = QLA_SUCCESS;
 6478
 6479	/* Try GID_PT to get device list, else GAN. */
 6480	if (!ha->swl)
 6481		ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
 6482		    GFP_KERNEL);
 6483	swl = ha->swl;
 6484	if (!swl) {
 6485		/*EMPTY*/
 6486		ql_dbg(ql_dbg_disc, vha, 0x209c,
 6487		    "GID_PT allocations failed, fallback on GA_NXT.\n");
 6488	} else {
 6489		memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
 6490		if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
 6491			swl = NULL;
 6492			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6493				return rval;
 6494		} else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
 6495			swl = NULL;
 6496			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6497				return rval;
 6498		} else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
 6499			swl = NULL;
 6500			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6501				return rval;
 6502		} else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
 6503			swl = NULL;
 6504			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6505				return rval;
 6506		}
 6507
 6508		/* If other queries succeeded probe for FC-4 type */
 6509		if (swl) {
 6510			qla2x00_gff_id(vha, swl);
 6511			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6512				return rval;
 6513		}
 6514	}
 6515	swl_idx = 0;
 6516
 6517	/* Allocate temporary fcport for any new fcports discovered. */
 6518	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
 6519	if (new_fcport == NULL) {
 6520		ql_log(ql_log_warn, vha, 0x209d,
 6521		    "Failed to allocate memory for fcport.\n");
 6522		return (QLA_MEMORY_ALLOC_FAILED);
 6523	}
 6524	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
 6525	/* Set start port ID scan at adapter ID. */
 6526	first_dev = 1;
 6527	last_dev = 0;
 6528
 6529	/* Starting free loop ID. */
 6530	loop_id = ha->min_external_loopid;
 6531	for (; loop_id <= ha->max_loop_id; loop_id++) {
 6532		if (qla2x00_is_reserved_id(vha, loop_id))
 6533			continue;
 6534
 6535		if (ha->current_topology == ISP_CFG_FL &&
 6536		    (atomic_read(&vha->loop_down_timer) ||
 6537		     LOOP_TRANSITION(vha))) {
 6538			atomic_set(&vha->loop_down_timer, 0);
 6539			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 6540			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
 6541			break;
 6542		}
 6543
 6544		if (swl != NULL) {
 6545			if (last_dev) {
 6546				wrap.b24 = new_fcport->d_id.b24;
 6547			} else {
 6548				new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
 6549				memcpy(new_fcport->node_name,
 6550				    swl[swl_idx].node_name, WWN_SIZE);
 6551				memcpy(new_fcport->port_name,
 6552				    swl[swl_idx].port_name, WWN_SIZE);
 6553				memcpy(new_fcport->fabric_port_name,
 6554				    swl[swl_idx].fabric_port_name, WWN_SIZE);
 6555				new_fcport->fp_speed = swl[swl_idx].fp_speed;
 6556				new_fcport->fc4_type = swl[swl_idx].fc4_type;
 6557
 6558				new_fcport->nvme_flag = 0;
 6559				if (vha->flags.nvme_enabled &&
 6560				    swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
 6561					ql_log(ql_log_info, vha, 0x2131,
 6562					    "FOUND: NVME port %8phC as FC Type 28h\n",
 6563					    new_fcport->port_name);
 6564				}
 6565
 6566				if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
 6567					last_dev = 1;
 6568				}
 6569				swl_idx++;
 6570			}
 6571		} else {
 6572			/* Send GA_NXT to the switch */
 6573			rval = qla2x00_ga_nxt(vha, new_fcport);
 6574			if (rval != QLA_SUCCESS) {
 6575				ql_log(ql_log_warn, vha, 0x209e,
 6576				    "SNS scan failed -- assuming "
 6577				    "zero-entry result.\n");
 6578				rval = QLA_SUCCESS;
 6579				break;
 6580			}
 6581		}
 6582
 6583		/* If wrap on switch device list, exit. */
 6584		if (first_dev) {
 6585			wrap.b24 = new_fcport->d_id.b24;
 6586			first_dev = 0;
 6587		} else if (new_fcport->d_id.b24 == wrap.b24) {
 6588			ql_dbg(ql_dbg_disc, vha, 0x209f,
 6589			    "Device wrap (%02x%02x%02x).\n",
 6590			    new_fcport->d_id.b.domain,
 6591			    new_fcport->d_id.b.area,
 6592			    new_fcport->d_id.b.al_pa);
 6593			break;
 6594		}
 6595
 6596		/* Bypass if same physical adapter. */
 6597		if (new_fcport->d_id.b24 == base_vha->d_id.b24)
 6598			continue;
 6599
 6600		/* Bypass virtual ports of the same host. */
 6601		if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
 6602			continue;
 6603
 6604		/* Bypass if same domain and area of adapter. */
 6605		if (((new_fcport->d_id.b24 & 0xffff00) ==
 6606		    (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
 6607			ISP_CFG_FL)
 6608			    continue;
 6609
 6610		/* Bypass reserved domain fields. */
 6611		if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
 6612			continue;
 6613
 6614		/* Bypass ports whose FCP-4 type is not FCP_SCSI */
 6615		if (ql2xgffidenable &&
 6616		    (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
 6617		    new_fcport->fc4_type != 0))
 6618			continue;
 6619
 6620		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
 6621
 6622		/* Locate matching device in database. */
 6623		found = 0;
 6624		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 6625			if (memcmp(new_fcport->port_name, fcport->port_name,
 6626			    WWN_SIZE))
 6627				continue;
 6628
 6629			fcport->scan_state = QLA_FCPORT_FOUND;
 6630
 6631			found++;
 6632
 6633			/* Update port state. */
 6634			memcpy(fcport->fabric_port_name,
 6635			    new_fcport->fabric_port_name, WWN_SIZE);
 6636			fcport->fp_speed = new_fcport->fp_speed;
 6637
 6638			/*
 6639			 * If address the same and state FCS_ONLINE
 6640			 * (or in target mode), nothing changed.
 6641			 */
 6642			if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
 6643			    (atomic_read(&fcport->state) == FCS_ONLINE ||
 6644			     (vha->host->active_mode == MODE_TARGET))) {
 6645				break;
 6646			}
 6647
 6648			if (fcport->login_retry == 0)
 6649				fcport->login_retry =
 6650					vha->hw->login_retry_count;
 6651			/*
 6652			 * If device was not a fabric device before.
 6653			 */
 6654			if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
 6655				fcport->d_id.b24 = new_fcport->d_id.b24;
 6656				qla2x00_clear_loop_id(fcport);
 6657				fcport->flags |= (FCF_FABRIC_DEVICE |
 6658				    FCF_LOGIN_NEEDED);
 6659				break;
 6660			}
 6661
 6662			/*
 6663			 * Port ID changed or device was marked to be updated;
 6664			 * Log it out if still logged in and mark it for
 6665			 * relogin later.
 6666			 */
 6667			if (qla_tgt_mode_enabled(base_vha)) {
 6668				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
 6669					 "port changed FC ID, %8phC"
 6670					 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
 6671					 fcport->port_name,
 6672					 fcport->d_id.b.domain,
 6673					 fcport->d_id.b.area,
 6674					 fcport->d_id.b.al_pa,
 6675					 fcport->loop_id,
 6676					 new_fcport->d_id.b.domain,
 6677					 new_fcport->d_id.b.area,
 6678					 new_fcport->d_id.b.al_pa);
 6679				fcport->d_id.b24 = new_fcport->d_id.b24;
 6680				break;
 6681			}
 6682
 6683			fcport->d_id.b24 = new_fcport->d_id.b24;
 6684			fcport->flags |= FCF_LOGIN_NEEDED;
 6685			break;
 6686		}
 6687
 6688		if (found && NVME_TARGET(vha->hw, fcport)) {
 6689			if (fcport->disc_state == DSC_DELETE_PEND) {
 6690				qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
 6691				vha->fcport_count--;
 6692				fcport->login_succ = 0;
 6693			}
 6694		}
 6695
 6696		if (found) {
 6697			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 6698			continue;
 6699		}
 6700		/* If device was not in our fcports list, then add it. */
 6701		new_fcport->scan_state = QLA_FCPORT_FOUND;
 6702		list_add_tail(&new_fcport->list, &vha->vp_fcports);
 6703
 6704		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
 6705
 6706
 6707		/* Allocate a new replacement fcport. */
 6708		nxt_d_id.b24 = new_fcport->d_id.b24;
 6709		new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
 6710		if (new_fcport == NULL) {
 6711			ql_log(ql_log_warn, vha, 0xd032,
 6712			    "Memory allocation failed for fcport.\n");
 6713			return (QLA_MEMORY_ALLOC_FAILED);
 6714		}
 6715		new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
 6716		new_fcport->d_id.b24 = nxt_d_id.b24;
 6717	}
 6718
 6719	qla2x00_free_fcport(new_fcport);
 6720
 6721	/*
 6722	 * Logout all previous fabric dev marked lost, except FCP2 devices.
 6723	 */
 6724	list_for_each_entry(fcport, &vha->vp_fcports, list) {
 6725		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
 6726			break;
 6727
 6728		if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
 6729			continue;
 6730
 6731		if (fcport->scan_state == QLA_FCPORT_SCAN) {
 6732			if ((qla_dual_mode_enabled(vha) ||
 6733			    qla_ini_mode_enabled(vha)) &&
 6734			    atomic_read(&fcport->state) == FCS_ONLINE) {
 6735				qla2x00_mark_device_lost(vha, fcport,
 6736					ql2xplogiabsentdevice);
 6737				if (fcport->loop_id != FC_NO_LOOP_ID &&
 6738				    (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
 6739				    fcport->port_type != FCT_INITIATOR &&
 6740				    fcport->port_type != FCT_BROADCAST) {
 6741					ql_dbg(ql_dbg_disc, vha, 0x20f0,
 6742					    "%s %d %8phC post del sess\n",
 6743					    __func__, __LINE__,
 6744					    fcport->port_name);
 6745					qlt_schedule_sess_for_deletion(fcport);
 6746					continue;
 6747				}
 6748			}
 6749		}
 6750
 6751		if (fcport->scan_state == QLA_FCPORT_FOUND &&
 6752		    (fcport->flags & FCF_LOGIN_NEEDED) != 0)
 6753			qla24xx_fcport_handle_login(vha, fcport);
 6754	}
 6755	return (rval);
 6756}
 6757
 6758/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
 6759int
 6760qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
 6761{
 6762	int loop_id = FC_NO_LOOP_ID;
 6763	int lid = NPH_MGMT_SERVER - vha->vp_idx;
 6764	unsigned long flags;
 6765	struct qla_hw_data *ha = vha->hw;
 6766
 6767	if (vha->vp_idx == 0) {
 6768		set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
 6769		return NPH_MGMT_SERVER;
 6770	}
 6771
 6772	/* pick id from high and work down to low */
 6773	spin_lock_irqsave(&ha->vport_slock, flags);
 6774	for (; lid > 0; lid--) {
 6775		if (!test_bit(lid, vha->hw->loop_id_map)) {
 6776			set_bit(lid, vha->hw->loop_id_map);
 6777			loop_id = lid;
 6778			break;
 6779		}
 6780	}
 6781	spin_unlock_irqrestore(&ha->vport_slock, flags);
 6782
 6783	return loop_id;
 6784}
 6785
 6786/*
 6787 * qla2x00_fabric_login
 6788 *	Issue fabric login command.
 6789 *
 6790 * Input:
 6791 *	ha = adapter block pointer.
 6792 *	device = pointer to FC device type structure.
 6793 *
 6794 * Returns:
 6795 *      0 - Login successfully
 6796 *      1 - Login failed
 6797 *      2 - Initiator device
 6798 *      3 - Fatal error
 6799 */
 6800int
 6801qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
 6802    uint16_t *next_loopid)
 6803{
 6804	int	rval;
 6805	int	retry;
 6806	uint16_t tmp_loopid;
 6807	uint16_t mb[MAILBOX_REGISTER_COUNT];
 6808	struct qla_hw_data *ha = vha->hw;
 6809
 6810	retry = 0;
 6811	tmp_loopid = 0;
 6812
 6813	for (;;) {
 6814		ql_dbg(ql_dbg_disc, vha, 0x2000,
 6815		    "Trying Fabric Login w/loop id 0x%04x for port "
 6816		    "%02x%02x%02x.\n",
 6817		    fcport->loop_id, fcport->d_id.b.domain,
 6818		    fcport->d_id.b.area, fcport->d_id.b.al_pa);
 6819
 6820		/* Login fcport on switch. */
 6821		rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
 6822		    fcport->d_id.b.domain, fcport->d_id.b.area,
 6823		    fcport->d_id.b.al_pa, mb, BIT_0);
 6824		if (rval != QLA_SUCCESS) {
 6825			return rval;
 6826		}
 6827		if (mb[0] == MBS_PORT_ID_USED) {
 6828			/*
 6829			 * Device has another loop ID.  The firmware team
 6830			 * recommends the driver perform an implicit login with
 6831			 * the specified ID again. The ID we just used is save
 6832			 * here so we return with an ID that can be tried by
 6833			 * the next login.
 6834			 */
 6835			retry++;
 6836			tmp_loopid = fcport->loop_id;
 6837			fcport->loop_id = mb[1];
 6838
 6839			ql_dbg(ql_dbg_disc, vha, 0x2001,
 6840			    "Fabric Login: port in use - next loop "
 6841			    "id=0x%04x, port id= %02x%02x%02x.\n",
 6842			    fcport->loop_id, fcport->d_id.b.domain,
 6843			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
 6844
 6845		} else if (mb[0] == MBS_COMMAND_COMPLETE) {
 6846			/*
 6847			 * Login succeeded.
 6848			 */
 6849			if (retry) {
 6850				/* A retry occurred before. */
 6851				*next_loopid = tmp_loopid;
 6852			} else {
 6853				/*
 6854				 * No retry occurred before. Just increment the
 6855				 * ID value for next login.
 6856				 */
 6857				*next_loopid = (fcport->loop_id + 1);
 6858			}
 6859
 6860			if (mb[1] & BIT_0) {
 6861				fcport->port_type = FCT_INITIATOR;
 6862			} else {
 6863				fcport->port_type = FCT_TARGET;
 6864				if (mb[1] & BIT_1) {
 6865					fcport->flags |= FCF_FCP2_DEVICE;
 6866				}
 6867			}
 6868
 6869			if (mb[10] & BIT_0)
 6870				fcport->supported_classes |= FC_COS_CLASS2;
 6871			if (mb[10] & BIT_1)
 6872				fcport->supported_classes |= FC_COS_CLASS3;
 6873
 6874			if (IS_FWI2_CAPABLE(ha)) {
 6875				if (mb[10] & BIT_7)
 6876					fcport->flags |=
 6877					    FCF_CONF_COMP_SUPPORTED;
 6878			}
 6879
 6880			rval = QLA_SUCCESS;
 6881			break;
 6882		} else if (mb[0] == MBS_LOOP_ID_USED) {
 6883			/*
 6884			 * Loop ID already used, try next loop ID.
 6885			 */
 6886			fcport->loop_id++;
 6887			rval = qla2x00_find_new_loop_id(vha, fcport);
 6888			if (rval != QLA_SUCCESS) {
 6889				/* Ran out of loop IDs to use */
 6890				break;
 6891			}
 6892		} else if (mb[0] == MBS_COMMAND_ERROR) {
 6893			/*
 6894			 * Firmware possibly timed out during login. If NO
 6895			 * retries are left to do then the device is declared
 6896			 * dead.
 6897			 */
 6898			*next_loopid = fcport->loop_id;
 6899			ha->isp_ops->fabric_logout(vha, fcport->loop_id,
 6900			    fcport->d_id.b.domain, fcport->d_id.b.area,
 6901			    fcport->d_id.b.al_pa);
 6902			qla2x00_mark_device_lost(vha, fcport, 1);
 6903
 6904			rval = 1;
 6905			break;
 6906		} else {
 6907			/*
 6908			 * unrecoverable / not handled error
 6909			 */
 6910			ql_dbg(ql_dbg_disc, vha, 0x2002,
 6911			    "Failed=%x port_id=%02x%02x%02x loop_id=%x "
 6912			    "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
 6913			    fcport->d_id.b.area, fcport->d_id.b.al_pa,
 6914			    fcport->loop_id, jiffies);
 6915
 6916			*next_loopid = fcport->loop_id;
 6917			ha->isp_ops->fabric_logout(vha, fcport->loop_id,
 6918			    fcport->d_id.b.domain, fcport->d_id.b.area,
 6919			    fcport->d_id.b.al_pa);
 6920			qla2x00_clear_loop_id(fcport);
 6921			fcport->login_retry = 0;
 6922
 6923			rval = 3;
 6924			break;
 6925		}
 6926	}
 6927
 6928	return (rval);
 6929}
 6930
 6931/*
 6932 * qla2x00_local_device_login
 6933 *	Issue local device login command.
 6934 *
 6935 * Input:
 6936 *	ha = adapter block pointer.
 6937 *	loop_id = loop id of device to login to.
 6938 *
 6939 * Returns (Where's the #define!!!!):
 6940 *      0 - Login successfully
 6941 *      1 - Login failed
 6942 *      3 - Fatal error
 6943 */
 6944int
 6945qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
 6946{
 6947	int		rval;
 6948	uint16_t	mb[MAILBOX_REGISTER_COUNT];
 6949
 6950	memset(mb, 0, sizeof(mb));
 6951	rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
 6952	if (rval == QLA_SUCCESS) {
 6953		/* Interrogate mailbox registers for any errors */
 6954		if (mb[0] == MBS_COMMAND_ERROR)
 6955			rval = 1;
 6956		else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
 6957			/* device not in PCB table */
 6958			rval = 3;
 6959	}
 6960
 6961	return (rval);
 6962}
 6963
 6964/*
 6965 *  qla2x00_loop_resync
 6966 *      Resync with fibre channel devices.
 6967 *
 6968 * Input:
 6969 *      ha = adapter block pointer.
 6970 *
 6971 * Returns:
 6972 *      0 = success
 6973 */
 6974int
 6975qla2x00_loop_resync(scsi_qla_host_t *vha)
 6976{
 6977	int rval = QLA_SUCCESS;
 6978	uint32_t wait_time;
 6979
 6980	clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
 6981	if (vha->flags.online) {
 6982		if (!(rval = qla2x00_fw_ready(vha))) {
 6983			/* Wait at most MAX_TARGET RSCNs for a stable link. */
 6984			wait_time = 256;
 6985			do {
 6986				if (!IS_QLAFX00(vha->hw)) {
 6987					/*
 6988					 * Issue a marker after FW becomes
 6989					 * ready.
 6990					 */
 6991					qla2x00_marker(vha, vha->hw->base_qpair,
 6992					    0, 0, MK_SYNC_ALL);
 6993					vha->marker_needed = 0;
 6994				}
 6995
 6996				/* Remap devices on Loop. */
 6997				clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 6998
 6999				if (IS_QLAFX00(vha->hw))
 7000					qlafx00_configure_devices(vha);
 7001				else
 7002					qla2x00_configure_loop(vha);
 7003
 7004				wait_time--;
 7005			} while (!atomic_read(&vha->loop_down_timer) &&
 7006				!(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
 7007				&& wait_time && (test_bit(LOOP_RESYNC_NEEDED,
 7008				&vha->dpc_flags)));
 7009		}
 7010	}
 7011
 7012	if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
 7013		return (QLA_FUNCTION_FAILED);
 7014
 7015	if (rval)
 7016		ql_dbg(ql_dbg_disc, vha, 0x206c,
 7017		    "%s *** FAILED ***.\n", __func__);
 7018
 7019	return (rval);
 7020}
 7021
 7022/*
 7023* qla2x00_perform_loop_resync
 7024* Description: This function will set the appropriate flags and call
 7025*              qla2x00_loop_resync. If successful loop will be resynced
 7026* Arguments : scsi_qla_host_t pointer
 7027* returm    : Success or Failure
 7028*/
 7029
 7030int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
 7031{
 7032	int32_t rval = 0;
 7033
 7034	if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
 7035		/*Configure the flags so that resync happens properly*/
 7036		atomic_set(&ha->loop_down_timer, 0);
 7037		if (!(ha->device_flags & DFLG_NO_CABLE)) {
 7038			atomic_set(&ha->loop_state, LOOP_UP);
 7039			set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
 7040			set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
 7041			set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
 7042
 7043			rval = qla2x00_loop_resync(ha);
 7044		} else
 7045			atomic_set(&ha->loop_state, LOOP_DEAD);
 7046
 7047		clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
 7048	}
 7049
 7050	return rval;
 7051}
 7052
 7053/* Assumes idc_lock always held on entry */
 7054void
 7055qla83xx_reset_ownership(scsi_qla_host_t *vha)
 7056{
 7057	struct qla_hw_data *ha = vha->hw;
 7058	uint32_t drv_presence, drv_presence_mask;
 7059	uint32_t dev_part_info1, dev_part_info2, class_type;
 7060	uint32_t class_type_mask = 0x3;
 7061	uint16_t fcoe_other_function = 0xffff, i;
 7062
 7063	if (IS_QLA8044(ha)) {
 7064		drv_presence = qla8044_rd_direct(vha,
 7065		    QLA8044_CRB_DRV_ACTIVE_INDEX);
 7066		dev_part_info1 = qla8044_rd_direct(vha,
 7067		    QLA8044_CRB_DEV_PART_INFO_INDEX);
 7068		dev_part_info2 = qla8044_rd_direct(vha,
 7069		    QLA8044_CRB_DEV_PART_INFO2);
 7070	} else {
 7071		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
 7072		qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
 7073		qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
 7074	}
 7075	for (i = 0; i < 8; i++) {
 7076		class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
 7077		if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
 7078		    (i != ha->portnum)) {
 7079			fcoe_other_function = i;
 7080			break;
 7081		}
 7082	}
 7083	if (fcoe_other_function == 0xffff) {
 7084		for (i = 0; i < 8; i++) {
 7085			class_type = ((dev_part_info2 >> (i * 4)) &
 7086			    class_type_mask);
 7087			if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
 7088			    ((i + 8) != ha->portnum)) {
 7089				fcoe_other_function = i + 8;
 7090				break;
 7091			}
 7092		}
 7093	}
 7094	/*
 7095	 * Prepare drv-presence mask based on fcoe functions present.
 7096	 * However consider only valid physical fcoe function numbers (0-15).
 7097	 */
 7098	drv_presence_mask = ~((1 << (ha->portnum)) |
 7099			((fcoe_other_function == 0xffff) ?
 7100			 0 : (1 << (fcoe_other_function))));
 7101
 7102	/* We are the reset owner iff:
 7103	 *    - No other protocol drivers present.
 7104	 *    - This is the lowest among fcoe functions. */
 7105	if (!(drv_presence & drv_presence_mask) &&
 7106			(ha->portnum < fcoe_other_function)) {
 7107		ql_dbg(ql_dbg_p3p, vha, 0xb07f,
 7108		    "This host is Reset owner.\n");
 7109		ha->flags.nic_core_reset_owner = 1;
 7110	}
 7111}
 7112
 7113static int
 7114__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
 7115{
 7116	int rval = QLA_SUCCESS;
 7117	struct qla_hw_data *ha = vha->hw;
 7118	uint32_t drv_ack;
 7119
 7120	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
 7121	if (rval == QLA_SUCCESS) {
 7122		drv_ack |= (1 << ha->portnum);
 7123		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
 7124	}
 7125
 7126	return rval;
 7127}
 7128
 7129static int
 7130__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
 7131{
 7132	int rval = QLA_SUCCESS;
 7133	struct qla_hw_data *ha = vha->hw;
 7134	uint32_t drv_ack;
 7135
 7136	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
 7137	if (rval == QLA_SUCCESS) {
 7138		drv_ack &= ~(1 << ha->portnum);
 7139		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
 7140	}
 7141
 7142	return rval;
 7143}
 7144
 7145/* Assumes idc-lock always held on entry */
 7146void
 7147qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
 7148{
 7149	struct qla_hw_data *ha = vha->hw;
 7150	uint32_t idc_audit_reg = 0, duration_secs = 0;
 7151
 7152	switch (audit_type) {
 7153	case IDC_AUDIT_TIMESTAMP:
 7154		ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
 7155		idc_audit_reg = (ha->portnum) |
 7156		    (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
 7157		qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
 7158		break;
 7159
 7160	case IDC_AUDIT_COMPLETION:
 7161		duration_secs = ((jiffies_to_msecs(jiffies) -
 7162		    jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
 7163		idc_audit_reg = (ha->portnum) |
 7164		    (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
 7165		qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
 7166		break;
 7167
 7168	default:
 7169		ql_log(ql_log_warn, vha, 0xb078,
 7170		    "Invalid audit type specified.\n");
 7171		break;
 7172	}
 7173}
 7174
 7175/* Assumes idc_lock always held on entry */
 7176static int
 7177qla83xx_initiating_reset(scsi_qla_host_t *vha)
 7178{
 7179	struct qla_hw_data *ha = vha->hw;
 7180	uint32_t  idc_control, dev_state;
 7181
 7182	__qla83xx_get_idc_control(vha, &idc_control);
 7183	if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
 7184		ql_log(ql_log_info, vha, 0xb080,
 7185		    "NIC Core reset has been disabled. idc-control=0x%x\n",
 7186		    idc_control);
 7187		return QLA_FUNCTION_FAILED;
 7188	}
 7189
 7190	/* Set NEED-RESET iff in READY state and we are the reset-owner */
 7191	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
 7192	if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
 7193		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
 7194		    QLA8XXX_DEV_NEED_RESET);
 7195		ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
 7196		qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
 7197	} else {
 7198		ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n",
 7199				qdev_state(dev_state));
 7200
 7201		/* SV: XXX: Is timeout required here? */
 7202		/* Wait for IDC state change READY -> NEED_RESET */
 7203		while (dev_state == QLA8XXX_DEV_READY) {
 7204			qla83xx_idc_unlock(vha, 0);
 7205			msleep(200);
 7206			qla83xx_idc_lock(vha, 0);
 7207			qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
 7208		}
 7209	}
 7210
 7211	/* Send IDC ack by writing to drv-ack register */
 7212	__qla83xx_set_drv_ack(vha);
 7213
 7214	return QLA_SUCCESS;
 7215}
 7216
 7217int
 7218__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
 7219{
 7220	return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
 7221}
 7222
 7223int
 7224__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
 7225{
 7226	return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
 7227}
 7228
 7229static int
 7230qla83xx_check_driver_presence(scsi_qla_host_t *vha)
 7231{
 7232	uint32_t drv_presence = 0;
 7233	struct qla_hw_data *ha = vha->hw;
 7234
 7235	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
 7236	if (drv_presence & (1 << ha->portnum))
 7237		return QLA_SUCCESS;
 7238	else
 7239		return QLA_TEST_FAILED;
 7240}
 7241
 7242int
 7243qla83xx_nic_core_reset(scsi_qla_host_t *vha)
 7244{
 7245	int rval = QLA_SUCCESS;
 7246	struct qla_hw_data *ha = vha->hw;
 7247
 7248	ql_dbg(ql_dbg_p3p, vha, 0xb058,
 7249	    "Entered  %s().\n", __func__);
 7250
 7251	if (vha->device_flags & DFLG_DEV_FAILED) {
 7252		ql_log(ql_log_warn, vha, 0xb059,
 7253		    "Device in unrecoverable FAILED state.\n");
 7254		return QLA_FUNCTION_FAILED;
 7255	}
 7256
 7257	qla83xx_idc_lock(vha, 0);
 7258
 7259	if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
 7260		ql_log(ql_log_warn, vha, 0xb05a,
 7261		    "Function=0x%x has been removed from IDC participation.\n",
 7262		    ha->portnum);
 7263		rval = QLA_FUNCTION_FAILED;
 7264		goto exit;
 7265	}
 7266
 7267	qla83xx_reset_ownership(vha);
 7268
 7269	rval = qla83xx_initiating_reset(vha);
 7270
 7271	/*
 7272	 * Perform reset if we are the reset-owner,
 7273	 * else wait till IDC state changes to READY/FAILED.
 7274	 */
 7275	if (rval == QLA_SUCCESS) {
 7276		rval = qla83xx_idc_state_handler(vha);
 7277
 7278		if (rval == QLA_SUCCESS)
 7279			ha->flags.nic_core_hung = 0;
 7280		__qla83xx_clear_drv_ack(vha);
 7281	}
 7282
 7283exit:
 7284	qla83xx_idc_unlock(vha, 0);
 7285
 7286	ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
 7287
 7288	return rval;
 7289}
 7290
 7291int
 7292qla2xxx_mctp_dump(scsi_qla_host_t *vha)
 7293{
 7294	struct qla_hw_data *ha = vha->hw;
 7295	int rval = QLA_FUNCTION_FAILED;
 7296
 7297	if (!IS_MCTP_CAPABLE(ha)) {
 7298		/* This message can be removed from the final version */
 7299		ql_log(ql_log_info, vha, 0x506d,
 7300		    "This board is not MCTP capable\n");
 7301		return rval;
 7302	}
 7303
 7304	if (!ha->mctp_dump) {
 7305		ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
 7306		    MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
 7307
 7308		if (!ha->mctp_dump) {
 7309			ql_log(ql_log_warn, vha, 0x506e,
 7310			    "Failed to allocate memory for mctp dump\n");
 7311			return rval;
 7312		}
 7313	}
 7314
 7315#define MCTP_DUMP_STR_ADDR	0x00000000
 7316	rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
 7317	    MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
 7318	if (rval != QLA_SUCCESS) {
 7319		ql_log(ql_log_warn, vha, 0x506f,
 7320		    "Failed to capture mctp dump\n");
 7321	} else {
 7322		ql_log(ql_log_info, vha, 0x5070,
 7323		    "Mctp dump capture for host (%ld/%p).\n",
 7324		    vha->host_no, ha->mctp_dump);
 7325		ha->mctp_dumped = 1;
 7326	}
 7327
 7328	if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
 7329		ha->flags.nic_core_reset_hdlr_active = 1;
 7330		rval = qla83xx_restart_nic_firmware(vha);
 7331		if (rval)
 7332			/* NIC Core reset failed. */
 7333			ql_log(ql_log_warn, vha, 0x5071,
 7334			    "Failed to restart nic firmware\n");
 7335		else
 7336			ql_dbg(ql_dbg_p3p, vha, 0xb084,
 7337			    "Restarted NIC firmware successfully.\n");
 7338		ha->flags.nic_core_reset_hdlr_active = 0;
 7339	}
 7340
 7341	return rval;
 7342
 7343}
 7344
 7345/*
 7346* qla2x00_quiesce_io
 7347* Description: This function will block the new I/Os
 7348*              Its not aborting any I/Os as context
 7349*              is not destroyed during quiescence
 7350* Arguments: scsi_qla_host_t
 7351* return   : void
 7352*/
 7353void
 7354qla2x00_quiesce_io(scsi_qla_host_t *vha)
 7355{
 7356	struct qla_hw_data *ha = vha->hw;
 7357	struct scsi_qla_host *vp, *tvp;
 7358	unsigned long flags;
 7359
 7360	ql_dbg(ql_dbg_dpc, vha, 0x401d,
 7361	    "Quiescing I/O - ha=%p.\n", ha);
 7362
 7363	atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
 7364	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
 7365		atomic_set(&vha->loop_state, LOOP_DOWN);
 7366		qla2x00_mark_all_devices_lost(vha);
 7367
 7368		spin_lock_irqsave(&ha->vport_slock, flags);
 7369		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
 7370			atomic_inc(&vp->vref_count);
 7371			spin_unlock_irqrestore(&ha->vport_slock, flags);
 7372
 7373			qla2x00_mark_all_devices_lost(vp);
 7374
 7375			spin_lock_irqsave(&ha->vport_slock, flags);
 7376			atomic_dec(&vp->vref_count);
 7377		}
 7378		spin_unlock_irqrestore(&ha->vport_slock, flags);
 7379	} else {
 7380		if (!atomic_read(&vha->loop_down_timer))
 7381			atomic_set(&vha->loop_down_timer,
 7382					LOOP_DOWN_TIME);
 7383	}
 7384	/* Wait for pending cmds to complete */
 7385	WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
 7386		     != QLA_SUCCESS);
 7387}
 7388
 7389void
 7390qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
 7391{
 7392	struct qla_hw_data *ha = vha->hw;
 7393	struct scsi_qla_host *vp, *tvp;
 7394	unsigned long flags;
 7395	fc_port_t *fcport;
 7396	u16 i;
 7397
 7398	/* For ISP82XX, driver waits for completion of the commands.
 7399	 * online flag should be set.
 7400	 */
 7401	if (!(IS_P3P_TYPE(ha)))
 7402		vha->flags.online = 0;
 7403	ha->flags.chip_reset_done = 0;
 7404	clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 7405	vha->qla_stats.total_isp_aborts++;
 7406
 7407	ql_log(ql_log_info, vha, 0x00af,
 7408	    "Performing ISP error recovery - ha=%p.\n", ha);
 7409
 7410	ha->flags.purge_mbox = 1;
 7411	/* For ISP82XX, reset_chip is just disabling interrupts.
 7412	 * Driver waits for the completion of the commands.
 7413	 * the interrupts need to be enabled.
 7414	 */
 7415	if (!(IS_P3P_TYPE(ha)))
 7416		ha->isp_ops->reset_chip(vha);
 7417
 7418	ha->link_data_rate = PORT_SPEED_UNKNOWN;
 7419	SAVE_TOPO(ha);
 7420	ha->flags.rida_fmt2 = 0;
 7421	ha->flags.n2n_ae = 0;
 7422	ha->flags.lip_ae = 0;
 7423	ha->current_topology = 0;
 7424	QLA_FW_STOPPED(ha);
 7425	ha->flags.fw_init_done = 0;
 7426	ha->chip_reset++;
 7427	ha->base_qpair->chip_reset = ha->chip_reset;
 7428	ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
 7429	ha->base_qpair->prev_completion_cnt = 0;
 7430	for (i = 0; i < ha->max_qpairs; i++) {
 7431		if (ha->queue_pair_map[i]) {
 7432			ha->queue_pair_map[i]->chip_reset =
 7433				ha->base_qpair->chip_reset;
 7434			ha->queue_pair_map[i]->cmd_cnt =
 7435			    ha->queue_pair_map[i]->cmd_completion_cnt = 0;
 7436			ha->base_qpair->prev_completion_cnt = 0;
 7437		}
 7438	}
 7439
 7440	/* purge MBox commands */
 7441	spin_lock_irqsave(&ha->hardware_lock, flags);
 7442	if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) {
 7443		clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
 7444		complete(&ha->mbx_intr_comp);
 7445	}
 7446	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 7447
 7448	i = 0;
 7449	while (atomic_read(&ha->num_pend_mbx_stage2) ||
 7450	    atomic_read(&ha->num_pend_mbx_stage1)) {
 7451		msleep(20);
 7452		i++;
 7453		if (i > 50)
 7454			break;
 7455	}
 7456	ha->flags.purge_mbox = 0;
 7457
 7458	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
 7459	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
 7460		atomic_set(&vha->loop_state, LOOP_DOWN);
 7461		qla2x00_mark_all_devices_lost(vha);
 7462
 7463		spin_lock_irqsave(&ha->vport_slock, flags);
 7464		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
 7465			atomic_inc(&vp->vref_count);
 7466			spin_unlock_irqrestore(&ha->vport_slock, flags);
 7467
 7468			qla2x00_mark_all_devices_lost(vp);
 7469
 7470			spin_lock_irqsave(&ha->vport_slock, flags);
 7471			atomic_dec(&vp->vref_count);
 7472		}
 7473		spin_unlock_irqrestore(&ha->vport_slock, flags);
 7474	} else {
 7475		if (!atomic_read(&vha->loop_down_timer))
 7476			atomic_set(&vha->loop_down_timer,
 7477			    LOOP_DOWN_TIME);
 7478	}
 7479
 7480	/* Clear all async request states across all VPs. */
 7481	list_for_each_entry(fcport, &vha->vp_fcports, list) {
 7482		fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
 7483		fcport->scan_state = 0;
 7484	}
 7485	spin_lock_irqsave(&ha->vport_slock, flags);
 7486	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
 7487		atomic_inc(&vp->vref_count);
 7488		spin_unlock_irqrestore(&ha->vport_slock, flags);
 7489
 7490		list_for_each_entry(fcport, &vp->vp_fcports, list)
 7491			fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
 7492
 7493		spin_lock_irqsave(&ha->vport_slock, flags);
 7494		atomic_dec(&vp->vref_count);
 7495	}
 7496	spin_unlock_irqrestore(&ha->vport_slock, flags);
 7497
 7498	/* Make sure for ISP 82XX IO DMA is complete */
 7499	if (IS_P3P_TYPE(ha)) {
 7500		qla82xx_chip_reset_cleanup(vha);
 7501		ql_log(ql_log_info, vha, 0x00b4,
 7502		       "Done chip reset cleanup.\n");
 7503
 7504		/* Done waiting for pending commands. Reset online flag */
 7505		vha->flags.online = 0;
 7506	}
 7507
 7508	/* Requeue all commands in outstanding command list. */
 7509	qla2x00_abort_all_cmds(vha, DID_RESET << 16);
 7510	/* memory barrier */
 7511	wmb();
 7512}
 7513
 7514/*
 7515*  qla2x00_abort_isp
 7516*      Resets ISP and aborts all outstanding commands.
 7517*
 7518* Input:
 7519*      ha           = adapter block pointer.
 7520*
 7521* Returns:
 7522*      0 = success
 7523*/
 7524int
 7525qla2x00_abort_isp(scsi_qla_host_t *vha)
 7526{
 7527	uint8_t        status = 0;
 7528	struct qla_hw_data *ha = vha->hw;
 7529	struct scsi_qla_host *vp, *tvp;
 7530	struct req_que *req = ha->req_q_map[0];
 7531	unsigned long flags;
 7532	fc_port_t *fcport;
 7533
 7534	if (vha->flags.online) {
 7535		qla2x00_abort_isp_cleanup(vha);
 7536
 7537		vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS;
 7538		vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS;
 7539
 7540		if (vha->hw->flags.port_isolated)
 7541			return status;
 7542
 7543		if (qla2x00_isp_reg_stat(ha)) {
 7544			ql_log(ql_log_info, vha, 0x803f,
 7545			       "ISP Abort - ISP reg disconnect, exiting.\n");
 7546			return status;
 7547		}
 7548
 7549		if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
 7550			ha->flags.chip_reset_done = 1;
 7551			vha->flags.online = 1;
 7552			status = 0;
 7553			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
 7554			return status;
 7555		}
 7556
 7557		if (IS_QLA8031(ha)) {
 7558			ql_dbg(ql_dbg_p3p, vha, 0xb05c,
 7559			    "Clearing fcoe driver presence.\n");
 7560			if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
 7561				ql_dbg(ql_dbg_p3p, vha, 0xb073,
 7562				    "Error while clearing DRV-Presence.\n");
 7563		}
 7564
 7565		if (unlikely(pci_channel_offline(ha->pdev) &&
 7566		    ha->flags.pci_channel_io_perm_failure)) {
 7567			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
 7568			status = 0;
 7569			return status;
 7570		}
 7571
 7572		switch (vha->qlini_mode) {
 7573		case QLA2XXX_INI_MODE_DISABLED:
 7574			if (!qla_tgt_mode_enabled(vha))
 7575				return 0;
 7576			break;
 7577		case QLA2XXX_INI_MODE_DUAL:
 7578			if (!qla_dual_mode_enabled(vha) &&
 7579			    !qla_ini_mode_enabled(vha))
 7580				return 0;
 7581			break;
 7582		case QLA2XXX_INI_MODE_ENABLED:
 7583		default:
 7584			break;
 7585		}
 7586
 7587		ha->isp_ops->get_flash_version(vha, req->ring);
 7588
 7589		if (qla2x00_isp_reg_stat(ha)) {
 7590			ql_log(ql_log_info, vha, 0x803f,
 7591			       "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
 7592			return status;
 7593		}
 7594		ha->isp_ops->nvram_config(vha);
 7595
 7596		if (qla2x00_isp_reg_stat(ha)) {
 7597			ql_log(ql_log_info, vha, 0x803f,
 7598			       "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
 7599			return status;
 7600		}
 7601
 7602		/* User may have updated [fcp|nvme] prefer in flash */
 7603		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 7604			if (NVME_PRIORITY(ha, fcport))
 7605				fcport->do_prli_nvme = 1;
 7606			else
 7607				fcport->do_prli_nvme = 0;
 7608		}
 7609
 7610		if (!qla2x00_restart_isp(vha)) {
 7611			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
 7612
 7613			if (!atomic_read(&vha->loop_down_timer)) {
 7614				/*
 7615				 * Issue marker command only when we are going
 7616				 * to start the I/O .
 7617				 */
 7618				vha->marker_needed = 1;
 7619			}
 7620
 7621			vha->flags.online = 1;
 7622
 7623			ha->isp_ops->enable_intrs(ha);
 7624
 7625			ha->isp_abort_cnt = 0;
 7626			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
 7627
 7628			if (IS_QLA81XX(ha) || IS_QLA8031(ha))
 7629				qla2x00_get_fw_version(vha);
 7630
 7631		} else {	/* failed the ISP abort */
 7632			vha->flags.online = 1;
 7633			if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
 7634				if (ha->isp_abort_cnt == 0) {
 7635					ql_log(ql_log_fatal, vha, 0x8035,
 7636					    "ISP error recover failed - "
 7637					    "board disabled.\n");
 7638					/*
 7639					 * The next call disables the board
 7640					 * completely.
 7641					 */
 7642					qla2x00_abort_isp_cleanup(vha);
 7643					vha->flags.online = 0;
 7644					clear_bit(ISP_ABORT_RETRY,
 7645					    &vha->dpc_flags);
 7646					status = 0;
 7647				} else { /* schedule another ISP abort */
 7648					ha->isp_abort_cnt--;
 7649					ql_dbg(ql_dbg_taskm, vha, 0x8020,
 7650					    "ISP abort - retry remaining %d.\n",
 7651					    ha->isp_abort_cnt);
 7652					status = 1;
 7653				}
 7654			} else {
 7655				ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
 7656				ql_dbg(ql_dbg_taskm, vha, 0x8021,
 7657				    "ISP error recovery - retrying (%d) "
 7658				    "more times.\n", ha->isp_abort_cnt);
 7659				set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
 7660				status = 1;
 7661			}
 7662		}
 7663
 7664	}
 7665
 7666	if (vha->hw->flags.port_isolated) {
 7667		qla2x00_abort_isp_cleanup(vha);
 7668		return status;
 7669	}
 7670
 7671	if (!status) {
 7672		ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
 7673		qla2x00_configure_hba(vha);
 7674		spin_lock_irqsave(&ha->vport_slock, flags);
 7675		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
 7676			if (vp->vp_idx) {
 7677				atomic_inc(&vp->vref_count);
 7678				spin_unlock_irqrestore(&ha->vport_slock, flags);
 7679
 7680				/* User may have updated [fcp|nvme] prefer in flash */
 7681				list_for_each_entry(fcport, &vp->vp_fcports, list) {
 7682					if (NVME_PRIORITY(ha, fcport))
 7683						fcport->do_prli_nvme = 1;
 7684					else
 7685						fcport->do_prli_nvme = 0;
 7686				}
 7687
 7688				qla2x00_vp_abort_isp(vp);
 7689
 7690				spin_lock_irqsave(&ha->vport_slock, flags);
 7691				atomic_dec(&vp->vref_count);
 7692			}
 7693		}
 7694		spin_unlock_irqrestore(&ha->vport_slock, flags);
 7695
 7696		if (IS_QLA8031(ha)) {
 7697			ql_dbg(ql_dbg_p3p, vha, 0xb05d,
 7698			    "Setting back fcoe driver presence.\n");
 7699			if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
 7700				ql_dbg(ql_dbg_p3p, vha, 0xb074,
 7701				    "Error while setting DRV-Presence.\n");
 7702		}
 7703	} else {
 7704		ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
 7705		       __func__);
 7706	}
 7707
 7708	return(status);
 7709}
 7710
 7711/*
 7712*  qla2x00_restart_isp
 7713*      restarts the ISP after a reset
 7714*
 7715* Input:
 7716*      ha = adapter block pointer.
 7717*
 7718* Returns:
 7719*      0 = success
 7720*/
 7721static int
 7722qla2x00_restart_isp(scsi_qla_host_t *vha)
 7723{
 7724	int status;
 7725	struct qla_hw_data *ha = vha->hw;
 7726
 7727	/* If firmware needs to be loaded */
 7728	if (qla2x00_isp_firmware(vha)) {
 7729		vha->flags.online = 0;
 7730		status = ha->isp_ops->chip_diag(vha);
 7731		if (status)
 7732			return status;
 7733		status = qla2x00_setup_chip(vha);
 7734		if (status)
 7735			return status;
 7736	}
 7737
 7738	status = qla2x00_init_rings(vha);
 7739	if (status)
 7740		return status;
 7741
 7742	clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
 7743	ha->flags.chip_reset_done = 1;
 7744
 7745	/* Initialize the queues in use */
 7746	qla25xx_init_queues(ha);
 7747
 7748	status = qla2x00_fw_ready(vha);
 7749	if (status) {
 7750		/* if no cable then assume it's good */
 7751		return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
 7752	}
 7753
 7754	/* Issue a marker after FW becomes ready. */
 7755	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
 7756	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 7757
 7758	return 0;
 7759}
 7760
 7761static int
 7762qla25xx_init_queues(struct qla_hw_data *ha)
 7763{
 7764	struct rsp_que *rsp = NULL;
 7765	struct req_que *req = NULL;
 7766	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 7767	int ret = -1;
 7768	int i;
 7769
 7770	for (i = 1; i < ha->max_rsp_queues; i++) {
 7771		rsp = ha->rsp_q_map[i];
 7772		if (rsp && test_bit(i, ha->rsp_qid_map)) {
 7773			rsp->options &= ~BIT_0;
 7774			ret = qla25xx_init_rsp_que(base_vha, rsp);
 7775			if (ret != QLA_SUCCESS)
 7776				ql_dbg(ql_dbg_init, base_vha, 0x00ff,
 7777				    "%s Rsp que: %d init failed.\n",
 7778				    __func__, rsp->id);
 7779			else
 7780				ql_dbg(ql_dbg_init, base_vha, 0x0100,
 7781				    "%s Rsp que: %d inited.\n",
 7782				    __func__, rsp->id);
 7783		}
 7784	}
 7785	for (i = 1; i < ha->max_req_queues; i++) {
 7786		req = ha->req_q_map[i];
 7787		if (req && test_bit(i, ha->req_qid_map)) {
 7788			/* Clear outstanding commands array. */
 7789			req->options &= ~BIT_0;
 7790			ret = qla25xx_init_req_que(base_vha, req);
 7791			if (ret != QLA_SUCCESS)
 7792				ql_dbg(ql_dbg_init, base_vha, 0x0101,
 7793				    "%s Req que: %d init failed.\n",
 7794				    __func__, req->id);
 7795			else
 7796				ql_dbg(ql_dbg_init, base_vha, 0x0102,
 7797				    "%s Req que: %d inited.\n",
 7798				    __func__, req->id);
 7799		}
 7800	}
 7801	return ret;
 7802}
 7803
 7804/*
 7805* qla2x00_reset_adapter
 7806*      Reset adapter.
 7807*
 7808* Input:
 7809*      ha = adapter block pointer.
 7810*/
 7811int
 7812qla2x00_reset_adapter(scsi_qla_host_t *vha)
 7813{
 7814	unsigned long flags = 0;
 7815	struct qla_hw_data *ha = vha->hw;
 7816	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 7817
 7818	vha->flags.online = 0;
 7819	ha->isp_ops->disable_intrs(ha);
 7820
 7821	spin_lock_irqsave(&ha->hardware_lock, flags);
 7822	wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
 7823	rd_reg_word(&reg->hccr);			/* PCI Posting. */
 7824	wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
 7825	rd_reg_word(&reg->hccr);			/* PCI Posting. */
 7826	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 7827
 7828	return QLA_SUCCESS;
 7829}
 7830
 7831int
 7832qla24xx_reset_adapter(scsi_qla_host_t *vha)
 7833{
 7834	unsigned long flags = 0;
 7835	struct qla_hw_data *ha = vha->hw;
 7836	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 7837
 7838	if (IS_P3P_TYPE(ha))
 7839		return QLA_SUCCESS;
 7840
 7841	vha->flags.online = 0;
 7842	ha->isp_ops->disable_intrs(ha);
 7843
 7844	spin_lock_irqsave(&ha->hardware_lock, flags);
 7845	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);
 7846	rd_reg_dword(&reg->hccr);
 7847	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);
 7848	rd_reg_dword(&reg->hccr);
 7849	spin_unlock_irqrestore(&ha->hardware_lock, flags);
 7850
 7851	if (IS_NOPOLLING_TYPE(ha))
 7852		ha->isp_ops->enable_intrs(ha);
 7853
 7854	return QLA_SUCCESS;
 7855}
 7856
 7857/* On sparc systems, obtain port and node WWN from firmware
 7858 * properties.
 7859 */
 7860static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
 7861	struct nvram_24xx *nv)
 7862{
 7863#ifdef CONFIG_SPARC
 7864	struct qla_hw_data *ha = vha->hw;
 7865	struct pci_dev *pdev = ha->pdev;
 7866	struct device_node *dp = pci_device_to_OF_node(pdev);
 7867	const u8 *val;
 7868	int len;
 7869
 7870	val = of_get_property(dp, "port-wwn", &len);
 7871	if (val && len >= WWN_SIZE)
 7872		memcpy(nv->port_name, val, WWN_SIZE);
 7873
 7874	val = of_get_property(dp, "node-wwn", &len);
 7875	if (val && len >= WWN_SIZE)
 7876		memcpy(nv->node_name, val, WWN_SIZE);
 7877#endif
 7878}
 7879
 7880int
 7881qla24xx_nvram_config(scsi_qla_host_t *vha)
 7882{
 7883	int   rval;
 7884	struct init_cb_24xx *icb;
 7885	struct nvram_24xx *nv;
 7886	__le32 *dptr;
 7887	uint8_t  *dptr1, *dptr2;
 7888	uint32_t chksum;
 7889	uint16_t cnt;
 7890	struct qla_hw_data *ha = vha->hw;
 7891
 7892	rval = QLA_SUCCESS;
 7893	icb = (struct init_cb_24xx *)ha->init_cb;
 7894	nv = ha->nvram;
 7895
 7896	/* Determine NVRAM starting address. */
 7897	if (ha->port_no == 0) {
 7898		ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
 7899		ha->vpd_base = FA_NVRAM_VPD0_ADDR;
 7900	} else {
 7901		ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
 7902		ha->vpd_base = FA_NVRAM_VPD1_ADDR;
 7903	}
 7904
 7905	ha->nvram_size = sizeof(*nv);
 7906	ha->vpd_size = FA_NVRAM_VPD_SIZE;
 7907
 7908	/* Get VPD data into cache */
 7909	ha->vpd = ha->nvram + VPD_OFFSET;
 7910	ha->isp_ops->read_nvram(vha, ha->vpd,
 7911	    ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
 7912
 7913	/* Get NVRAM data into cache and calculate checksum. */
 7914	dptr = (__force __le32 *)nv;
 7915	ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
 7916	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
 7917		chksum += le32_to_cpu(*dptr);
 7918
 7919	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
 7920	    "Contents of NVRAM\n");
 7921	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
 7922	    nv, ha->nvram_size);
 7923
 7924	/* Bad NVRAM data, set defaults parameters. */
 7925	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
 7926	    le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
 7927		/* Reset NVRAM data. */
 7928		ql_log(ql_log_warn, vha, 0x006b,
 7929		    "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
 7930		    chksum, nv->id, nv->nvram_version);
 7931		ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
 7932		ql_log(ql_log_warn, vha, 0x006c,
 7933		    "Falling back to functioning (yet invalid -- WWPN) "
 7934		    "defaults.\n");
 7935
 7936		/*
 7937		 * Set default initialization control block.
 7938		 */
 7939		memset(nv, 0, ha->nvram_size);
 7940		nv->nvram_version = cpu_to_le16(ICB_VERSION);
 7941		nv->version = cpu_to_le16(ICB_VERSION);
 7942		nv->frame_payload_size = cpu_to_le16(2048);
 7943		nv->execution_throttle = cpu_to_le16(0xFFFF);
 7944		nv->exchange_count = cpu_to_le16(0);
 7945		nv->hard_address = cpu_to_le16(124);
 7946		nv->port_name[0] = 0x21;
 7947		nv->port_name[1] = 0x00 + ha->port_no + 1;
 7948		nv->port_name[2] = 0x00;
 7949		nv->port_name[3] = 0xe0;
 7950		nv->port_name[4] = 0x8b;
 7951		nv->port_name[5] = 0x1c;
 7952		nv->port_name[6] = 0x55;
 7953		nv->port_name[7] = 0x86;
 7954		nv->node_name[0] = 0x20;
 7955		nv->node_name[1] = 0x00;
 7956		nv->node_name[2] = 0x00;
 7957		nv->node_name[3] = 0xe0;
 7958		nv->node_name[4] = 0x8b;
 7959		nv->node_name[5] = 0x1c;
 7960		nv->node_name[6] = 0x55;
 7961		nv->node_name[7] = 0x86;
 7962		qla24xx_nvram_wwn_from_ofw(vha, nv);
 7963		nv->login_retry_count = cpu_to_le16(8);
 7964		nv->interrupt_delay_timer = cpu_to_le16(0);
 7965		nv->login_timeout = cpu_to_le16(0);
 7966		nv->firmware_options_1 =
 7967		    cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
 7968		nv->firmware_options_2 = cpu_to_le32(2 << 4);
 7969		nv->firmware_options_2 |= cpu_to_le32(BIT_12);
 7970		nv->firmware_options_3 = cpu_to_le32(2 << 13);
 7971		nv->host_p = cpu_to_le32(BIT_11|BIT_10);
 7972		nv->efi_parameters = cpu_to_le32(0);
 7973		nv->reset_delay = 5;
 7974		nv->max_luns_per_target = cpu_to_le16(128);
 7975		nv->port_down_retry_count = cpu_to_le16(30);
 7976		nv->link_down_timeout = cpu_to_le16(30);
 7977
 7978		rval = 1;
 7979	}
 7980
 7981	if (qla_tgt_mode_enabled(vha)) {
 7982		/* Don't enable full login after initial LIP */
 7983		nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
 7984		/* Don't enable LIP full login for initiator */
 7985		nv->host_p &= cpu_to_le32(~BIT_10);
 7986	}
 7987
 7988	qlt_24xx_config_nvram_stage1(vha, nv);
 7989
 7990	/* Reset Initialization control block */
 7991	memset(icb, 0, ha->init_cb_size);
 7992
 7993	/* Copy 1st segment. */
 7994	dptr1 = (uint8_t *)icb;
 7995	dptr2 = (uint8_t *)&nv->version;
 7996	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
 7997	while (cnt--)
 7998		*dptr1++ = *dptr2++;
 7999
 8000	icb->login_retry_count = nv->login_retry_count;
 8001	icb->link_down_on_nos = nv->link_down_on_nos;
 8002
 8003	/* Copy 2nd segment. */
 8004	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
 8005	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
 8006	cnt = (uint8_t *)&icb->reserved_3 -
 8007	    (uint8_t *)&icb->interrupt_delay_timer;
 8008	while (cnt--)
 8009		*dptr1++ = *dptr2++;
 8010	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
 8011	/*
 8012	 * Setup driver NVRAM options.
 8013	 */
 8014	qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
 8015	    "QLA2462");
 8016
 8017	qlt_24xx_config_nvram_stage2(vha, icb);
 8018
 8019	if (nv->host_p & cpu_to_le32(BIT_15)) {
 8020		/* Use alternate WWN? */
 8021		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
 8022		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
 8023	}
 8024
 8025	/* Prepare nodename */
 8026	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
 8027		/*
 8028		 * Firmware will apply the following mask if the nodename was
 8029		 * not provided.
 8030		 */
 8031		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
 8032		icb->node_name[0] &= 0xF0;
 8033	}
 8034
 8035	/* Set host adapter parameters. */
 8036	ha->flags.disable_risc_code_load = 0;
 8037	ha->flags.enable_lip_reset = 0;
 8038	ha->flags.enable_lip_full_login =
 8039	    le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
 8040	ha->flags.enable_target_reset =
 8041	    le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
 8042	ha->flags.enable_led_scheme = 0;
 8043	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
 8044
 8045	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
 8046	    (BIT_6 | BIT_5 | BIT_4)) >> 4;
 8047
 8048	memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
 8049	    sizeof(ha->fw_seriallink_options24));
 8050
 8051	/* save HBA serial number */
 8052	ha->serial0 = icb->port_name[5];
 8053	ha->serial1 = icb->port_name[6];
 8054	ha->serial2 = icb->port_name[7];
 8055	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
 8056	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
 8057
 8058	icb->execution_throttle = cpu_to_le16(0xFFFF);
 8059
 8060	ha->retry_count = le16_to_cpu(nv->login_retry_count);
 8061
 8062	/* Set minimum login_timeout to 4 seconds. */
 8063	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
 8064		nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
 8065	if (le16_to_cpu(nv->login_timeout) < 4)
 8066		nv->login_timeout = cpu_to_le16(4);
 8067	ha->login_timeout = le16_to_cpu(nv->login_timeout);
 8068
 8069	/* Set minimum RATOV to 100 tenths of a second. */
 8070	ha->r_a_tov = 100;
 8071
 8072	ha->loop_reset_delay = nv->reset_delay;
 8073
 8074	/* Link Down Timeout = 0:
 8075	 *
 8076	 * 	When Port Down timer expires we will start returning
 8077	 *	I/O's to OS with "DID_NO_CONNECT".
 8078	 *
 8079	 * Link Down Timeout != 0:
 8080	 *
 8081	 *	 The driver waits for the link to come up after link down
 8082	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
 8083	 */
 8084	if (le16_to_cpu(nv->link_down_timeout) == 0) {
 8085		ha->loop_down_abort_time =
 8086		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
 8087	} else {
 8088		ha->link_down_timeout =	le16_to_cpu(nv->link_down_timeout);
 8089		ha->loop_down_abort_time =
 8090		    (LOOP_DOWN_TIME - ha->link_down_timeout);
 8091	}
 8092
 8093	/* Need enough time to try and get the port back. */
 8094	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
 8095	if (qlport_down_retry)
 8096		ha->port_down_retry_count = qlport_down_retry;
 8097
 8098	/* Set login_retry_count */
 8099	ha->login_retry_count  = le16_to_cpu(nv->login_retry_count);
 8100	if (ha->port_down_retry_count ==
 8101	    le16_to_cpu(nv->port_down_retry_count) &&
 8102	    ha->port_down_retry_count > 3)
 8103		ha->login_retry_count = ha->port_down_retry_count;
 8104	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
 8105		ha->login_retry_count = ha->port_down_retry_count;
 8106	if (ql2xloginretrycount)
 8107		ha->login_retry_count = ql2xloginretrycount;
 8108
 8109	/* N2N: driver will initiate Login instead of FW */
 8110	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
 8111
 8112	/* Enable ZIO. */
 8113	if (!vha->flags.init_done) {
 8114		ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
 8115		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
 8116		ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
 8117		    le16_to_cpu(icb->interrupt_delay_timer) : 2;
 8118	}
 8119	icb->firmware_options_2 &= cpu_to_le32(
 8120	    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
 8121	if (ha->zio_mode != QLA_ZIO_DISABLED) {
 8122		ha->zio_mode = QLA_ZIO_MODE_6;
 8123
 8124		ql_log(ql_log_info, vha, 0x006f,
 8125		    "ZIO mode %d enabled; timer delay (%d us).\n",
 8126		    ha->zio_mode, ha->zio_timer * 100);
 8127
 8128		icb->firmware_options_2 |= cpu_to_le32(
 8129		    (uint32_t)ha->zio_mode);
 8130		icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
 8131	}
 8132
 8133	if (rval) {
 8134		ql_log(ql_log_warn, vha, 0x0070,
 8135		    "NVRAM configuration failed.\n");
 8136	}
 8137	return (rval);
 8138}
 8139
 8140static void
 8141qla27xx_print_image(struct scsi_qla_host *vha, char *name,
 8142    struct qla27xx_image_status *image_status)
 8143{
 8144	ql_dbg(ql_dbg_init, vha, 0x018b,
 8145	    "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
 8146	    name, "status",
 8147	    image_status->image_status_mask,
 8148	    le16_to_cpu(image_status->generation),
 8149	    image_status->ver_major,
 8150	    image_status->ver_minor,
 8151	    image_status->bitmap,
 8152	    le32_to_cpu(image_status->checksum),
 8153	    le32_to_cpu(image_status->signature));
 8154}
 8155
 8156static bool
 8157qla28xx_check_aux_image_status_signature(
 8158    struct qla27xx_image_status *image_status)
 8159{
 8160	ulong signature = le32_to_cpu(image_status->signature);
 8161
 8162	return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
 8163}
 8164
 8165static bool
 8166qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
 8167{
 8168	ulong signature = le32_to_cpu(image_status->signature);
 8169
 8170	return
 8171	    signature != QLA27XX_IMG_STATUS_SIGN &&
 8172	    signature != QLA28XX_IMG_STATUS_SIGN;
 8173}
 8174
 8175static ulong
 8176qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
 8177{
 8178	__le32 *p = (__force __le32 *)image_status;
 8179	uint n = sizeof(*image_status) / sizeof(*p);
 8180	uint32_t sum = 0;
 8181
 8182	for ( ; n--; p++)
 8183		sum += le32_to_cpup(p);
 8184
 8185	return sum;
 8186}
 8187
 8188static inline uint
 8189qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
 8190{
 8191	return aux->bitmap & bitmask ?
 8192	    QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
 8193}
 8194
 8195static void
 8196qla28xx_component_status(
 8197    struct active_regions *active_regions, struct qla27xx_image_status *aux)
 8198{
 8199	active_regions->aux.board_config =
 8200	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
 8201
 8202	active_regions->aux.vpd_nvram =
 8203	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
 8204
 8205	active_regions->aux.npiv_config_0_1 =
 8206	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
 8207
 8208	active_regions->aux.npiv_config_2_3 =
 8209	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
 8210
 8211	active_regions->aux.nvme_params =
 8212	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS);
 8213}
 8214
 8215static int
 8216qla27xx_compare_image_generation(
 8217    struct qla27xx_image_status *pri_image_status,
 8218    struct qla27xx_image_status *sec_image_status)
 8219{
 8220	/* calculate generation delta as uint16 (this accounts for wrap) */
 8221	int16_t delta =
 8222	    le16_to_cpu(pri_image_status->generation) -
 8223	    le16_to_cpu(sec_image_status->generation);
 8224
 8225	ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
 8226
 8227	return delta;
 8228}
 8229
 8230void
 8231qla28xx_get_aux_images(
 8232	struct scsi_qla_host *vha, struct active_regions *active_regions)
 8233{
 8234	struct qla_hw_data *ha = vha->hw;
 8235	struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
 8236	bool valid_pri_image = false, valid_sec_image = false;
 8237	bool active_pri_image = false, active_sec_image = false;
 8238	int rc;
 8239
 8240	if (!ha->flt_region_aux_img_status_pri) {
 8241		ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
 8242		goto check_sec_image;
 8243	}
 8244
 8245	rc = qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
 8246	    ha->flt_region_aux_img_status_pri,
 8247	    sizeof(pri_aux_image_status) >> 2);
 8248	if (rc) {
 8249		ql_log(ql_log_info, vha, 0x01a1,
 8250		    "Unable to read Primary aux image(%x).\n", rc);
 8251		goto check_sec_image;
 8252	}
 8253	qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
 8254
 8255	if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
 8256		ql_dbg(ql_dbg_init, vha, 0x018b,
 8257		    "Primary aux image signature (%#x) not valid\n",
 8258		    le32_to_cpu(pri_aux_image_status.signature));
 8259		goto check_sec_image;
 8260	}
 8261
 8262	if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
 8263		ql_dbg(ql_dbg_init, vha, 0x018c,
 8264		    "Primary aux image checksum failed\n");
 8265		goto check_sec_image;
 8266	}
 8267
 8268	valid_pri_image = true;
 8269
 8270	if (pri_aux_image_status.image_status_mask & 1) {
 8271		ql_dbg(ql_dbg_init, vha, 0x018d,
 8272		    "Primary aux image is active\n");
 8273		active_pri_image = true;
 8274	}
 8275
 8276check_sec_image:
 8277	if (!ha->flt_region_aux_img_status_sec) {
 8278		ql_dbg(ql_dbg_init, vha, 0x018a,
 8279		    "Secondary aux image not addressed\n");
 8280		goto check_valid_image;
 8281	}
 8282
 8283	rc = qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
 8284	    ha->flt_region_aux_img_status_sec,
 8285	    sizeof(sec_aux_image_status) >> 2);
 8286	if (rc) {
 8287		ql_log(ql_log_info, vha, 0x01a2,
 8288		    "Unable to read Secondary aux image(%x).\n", rc);
 8289		goto check_valid_image;
 8290	}
 8291
 8292	qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
 8293
 8294	if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
 8295		ql_dbg(ql_dbg_init, vha, 0x018b,
 8296		    "Secondary aux image signature (%#x) not valid\n",
 8297		    le32_to_cpu(sec_aux_image_status.signature));
 8298		goto check_valid_image;
 8299	}
 8300
 8301	if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
 8302		ql_dbg(ql_dbg_init, vha, 0x018c,
 8303		    "Secondary aux image checksum failed\n");
 8304		goto check_valid_image;
 8305	}
 8306
 8307	valid_sec_image = true;
 8308
 8309	if (sec_aux_image_status.image_status_mask & 1) {
 8310		ql_dbg(ql_dbg_init, vha, 0x018d,
 8311		    "Secondary aux image is active\n");
 8312		active_sec_image = true;
 8313	}
 8314
 8315check_valid_image:
 8316	if (valid_pri_image && active_pri_image &&
 8317	    valid_sec_image && active_sec_image) {
 8318		if (qla27xx_compare_image_generation(&pri_aux_image_status,
 8319		    &sec_aux_image_status) >= 0) {
 8320			qla28xx_component_status(active_regions,
 8321			    &pri_aux_image_status);
 8322		} else {
 8323			qla28xx_component_status(active_regions,
 8324			    &sec_aux_image_status);
 8325		}
 8326	} else if (valid_pri_image && active_pri_image) {
 8327		qla28xx_component_status(active_regions, &pri_aux_image_status);
 8328	} else if (valid_sec_image && active_sec_image) {
 8329		qla28xx_component_status(active_regions, &sec_aux_image_status);
 8330	}
 8331
 8332	ql_dbg(ql_dbg_init, vha, 0x018f,
 8333	    "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n",
 8334	    active_regions->aux.board_config,
 8335	    active_regions->aux.vpd_nvram,
 8336	    active_regions->aux.npiv_config_0_1,
 8337	    active_regions->aux.npiv_config_2_3,
 8338	    active_regions->aux.nvme_params);
 8339}
 8340
 8341void
 8342qla27xx_get_active_image(struct scsi_qla_host *vha,
 8343    struct active_regions *active_regions)
 8344{
 8345	struct qla_hw_data *ha = vha->hw;
 8346	struct qla27xx_image_status pri_image_status, sec_image_status;
 8347	bool valid_pri_image = false, valid_sec_image = false;
 8348	bool active_pri_image = false, active_sec_image = false;
 8349	int rc;
 8350
 8351	if (!ha->flt_region_img_status_pri) {
 8352		ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
 8353		goto check_sec_image;
 8354	}
 8355
 8356	if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
 8357	    ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
 8358	    QLA_SUCCESS) {
 8359		WARN_ON_ONCE(true);
 8360		goto check_sec_image;
 8361	}
 8362	qla27xx_print_image(vha, "Primary image", &pri_image_status);
 8363
 8364	if (qla27xx_check_image_status_signature(&pri_image_status)) {
 8365		ql_dbg(ql_dbg_init, vha, 0x018b,
 8366		    "Primary image signature (%#x) not valid\n",
 8367		    le32_to_cpu(pri_image_status.signature));
 8368		goto check_sec_image;
 8369	}
 8370
 8371	if (qla27xx_image_status_checksum(&pri_image_status)) {
 8372		ql_dbg(ql_dbg_init, vha, 0x018c,
 8373		    "Primary image checksum failed\n");
 8374		goto check_sec_image;
 8375	}
 8376
 8377	valid_pri_image = true;
 8378
 8379	if (pri_image_status.image_status_mask & 1) {
 8380		ql_dbg(ql_dbg_init, vha, 0x018d,
 8381		    "Primary image is active\n");
 8382		active_pri_image = true;
 8383	}
 8384
 8385check_sec_image:
 8386	if (!ha->flt_region_img_status_sec) {
 8387		ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
 8388		goto check_valid_image;
 8389	}
 8390
 8391	rc = qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
 8392	    ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
 8393	if (rc) {
 8394		ql_log(ql_log_info, vha, 0x01a3,
 8395		    "Unable to read Secondary image status(%x).\n", rc);
 8396		goto check_valid_image;
 8397	}
 8398
 8399	qla27xx_print_image(vha, "Secondary image", &sec_image_status);
 8400
 8401	if (qla27xx_check_image_status_signature(&sec_image_status)) {
 8402		ql_dbg(ql_dbg_init, vha, 0x018b,
 8403		    "Secondary image signature (%#x) not valid\n",
 8404		    le32_to_cpu(sec_image_status.signature));
 8405		goto check_valid_image;
 8406	}
 8407
 8408	if (qla27xx_image_status_checksum(&sec_image_status)) {
 8409		ql_dbg(ql_dbg_init, vha, 0x018c,
 8410		    "Secondary image checksum failed\n");
 8411		goto check_valid_image;
 8412	}
 8413
 8414	valid_sec_image = true;
 8415
 8416	if (sec_image_status.image_status_mask & 1) {
 8417		ql_dbg(ql_dbg_init, vha, 0x018d,
 8418		    "Secondary image is active\n");
 8419		active_sec_image = true;
 8420	}
 8421
 8422check_valid_image:
 8423	if (valid_pri_image && active_pri_image)
 8424		active_regions->global = QLA27XX_PRIMARY_IMAGE;
 8425
 8426	if (valid_sec_image && active_sec_image) {
 8427		if (!active_regions->global ||
 8428		    qla27xx_compare_image_generation(
 8429			&pri_image_status, &sec_image_status) < 0) {
 8430			active_regions->global = QLA27XX_SECONDARY_IMAGE;
 8431		}
 8432	}
 8433
 8434	ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
 8435	    active_regions->global == QLA27XX_DEFAULT_IMAGE ?
 8436		"default (boot/fw)" :
 8437	    active_regions->global == QLA27XX_PRIMARY_IMAGE ?
 8438		"primary" :
 8439	    active_regions->global == QLA27XX_SECONDARY_IMAGE ?
 8440		"secondary" : "invalid",
 8441	    active_regions->global);
 8442}
 8443
 8444bool qla24xx_risc_firmware_invalid(uint32_t *dword)
 8445{
 8446	return
 8447	    !(dword[4] | dword[5] | dword[6] | dword[7]) ||
 8448	    !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
 8449}
 8450
 8451static int
 8452qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
 8453    uint32_t faddr)
 8454{
 8455	int rval;
 8456	uint templates, segments, fragment;
 8457	ulong i;
 8458	uint j;
 8459	ulong dlen;
 8460	uint32_t *dcode;
 8461	uint32_t risc_addr, risc_size, risc_attr = 0;
 8462	struct qla_hw_data *ha = vha->hw;
 8463	struct req_que *req = ha->req_q_map[0];
 8464	struct fwdt *fwdt = ha->fwdt;
 8465
 8466	ql_dbg(ql_dbg_init, vha, 0x008b,
 8467	    "FW: Loading firmware from flash (%x).\n", faddr);
 8468
 8469	dcode = (uint32_t *)req->ring;
 8470	rval = qla24xx_read_flash_data(vha, dcode, faddr, 8);
 8471	if (rval || qla24xx_risc_firmware_invalid(dcode)) {
 8472		ql_log(ql_log_fatal, vha, 0x008c,
 8473		    "Unable to verify the integrity of flash firmware image (rval %x).\n", rval);
 8474		ql_log(ql_log_fatal, vha, 0x008d,
 8475		    "Firmware data: %08x %08x %08x %08x.\n",
 8476		    dcode[0], dcode[1], dcode[2], dcode[3]);
 8477
 8478		return QLA_FUNCTION_FAILED;
 8479	}
 8480
 8481	dcode = (uint32_t *)req->ring;
 8482	*srisc_addr = 0;
 8483	segments = FA_RISC_CODE_SEGMENTS;
 8484	for (j = 0; j < segments; j++) {
 8485		ql_dbg(ql_dbg_init, vha, 0x008d,
 8486		    "-> Loading segment %u...\n", j);
 8487		rval = qla24xx_read_flash_data(vha, dcode, faddr, 10);
 8488		if (rval) {
 8489			ql_log(ql_log_fatal, vha, 0x016a,
 8490			    "-> Unable to read segment addr + size .\n");
 8491			return QLA_FUNCTION_FAILED;
 8492		}
 8493		risc_addr = be32_to_cpu((__force __be32)dcode[2]);
 8494		risc_size = be32_to_cpu((__force __be32)dcode[3]);
 8495		if (!*srisc_addr) {
 8496			*srisc_addr = risc_addr;
 8497			risc_attr = be32_to_cpu((__force __be32)dcode[9]);
 8498		}
 8499
 8500		dlen = ha->fw_transfer_size >> 2;
 8501		for (fragment = 0; risc_size; fragment++) {
 8502			if (dlen > risc_size)
 8503				dlen = risc_size;
 8504
 8505			ql_dbg(ql_dbg_init, vha, 0x008e,
 8506			    "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
 8507			    fragment, risc_addr, faddr, dlen);
 8508			rval = qla24xx_read_flash_data(vha, dcode, faddr, dlen);
 8509			if (rval) {
 8510				ql_log(ql_log_fatal, vha, 0x016b,
 8511				    "-> Unable to read fragment(faddr %#x dlen %#lx).\n",
 8512				    faddr, dlen);
 8513				return QLA_FUNCTION_FAILED;
 8514			}
 8515			for (i = 0; i < dlen; i++)
 8516				dcode[i] = swab32(dcode[i]);
 8517
 8518			rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
 8519			if (rval) {
 8520				ql_log(ql_log_fatal, vha, 0x008f,
 8521				    "-> Failed load firmware fragment %u.\n",
 8522				    fragment);
 8523				return QLA_FUNCTION_FAILED;
 8524			}
 8525
 8526			faddr += dlen;
 8527			risc_addr += dlen;
 8528			risc_size -= dlen;
 8529		}
 8530	}
 8531
 8532	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
 8533		return QLA_SUCCESS;
 8534
 8535	templates = (risc_attr & BIT_9) ? 2 : 1;
 8536	ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
 8537	for (j = 0; j < templates; j++, fwdt++) {
 8538		vfree(fwdt->template);
 8539		fwdt->template = NULL;
 8540		fwdt->length = 0;
 8541
 8542		dcode = (uint32_t *)req->ring;
 8543
 8544		rval = qla24xx_read_flash_data(vha, dcode, faddr, 7);
 8545		if (rval) {
 8546			ql_log(ql_log_fatal, vha, 0x016c,
 8547			    "-> Unable to read template size.\n");
 8548			goto failed;
 8549		}
 8550
 8551		risc_size = be32_to_cpu((__force __be32)dcode[2]);
 8552		ql_dbg(ql_dbg_init, vha, 0x0161,
 8553		    "-> fwdt%u template array at %#x (%#x dwords)\n",
 8554		    j, faddr, risc_size);
 8555		if (!risc_size || !~risc_size) {
 8556			ql_dbg(ql_dbg_init, vha, 0x0162,
 8557			    "-> fwdt%u failed to read array\n", j);
 8558			goto failed;
 8559		}
 8560
 8561		/* skip header and ignore checksum */
 8562		faddr += 7;
 8563		risc_size -= 8;
 8564
 8565		ql_dbg(ql_dbg_init, vha, 0x0163,
 8566		    "-> fwdt%u template allocate template %#x words...\n",
 8567		    j, risc_size);
 8568		fwdt->template = vmalloc_array(risc_size, sizeof(*dcode));
 8569		if (!fwdt->template) {
 8570			ql_log(ql_log_warn, vha, 0x0164,
 8571			    "-> fwdt%u failed allocate template.\n", j);
 8572			goto failed;
 8573		}
 8574
 8575		dcode = fwdt->template;
 8576		rval = qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
 8577
 8578		if (rval || !qla27xx_fwdt_template_valid(dcode)) {
 8579			ql_log(ql_log_warn, vha, 0x0165,
 8580			    "-> fwdt%u failed template validate (rval %x)\n",
 8581			    j, rval);
 8582			goto failed;
 8583		}
 8584
 8585		dlen = qla27xx_fwdt_template_size(dcode);
 8586		ql_dbg(ql_dbg_init, vha, 0x0166,
 8587		    "-> fwdt%u template size %#lx bytes (%#lx words)\n",
 8588		    j, dlen, dlen / sizeof(*dcode));
 8589		if (dlen > risc_size * sizeof(*dcode)) {
 8590			ql_log(ql_log_warn, vha, 0x0167,
 8591			    "-> fwdt%u template exceeds array (%-lu bytes)\n",
 8592			    j, dlen - risc_size * sizeof(*dcode));
 8593			goto failed;
 8594		}
 8595
 8596		fwdt->length = dlen;
 8597		ql_dbg(ql_dbg_init, vha, 0x0168,
 8598		    "-> fwdt%u loaded template ok\n", j);
 8599
 8600		faddr += risc_size + 1;
 8601	}
 8602
 8603	return QLA_SUCCESS;
 8604
 8605failed:
 8606	vfree(fwdt->template);
 8607	fwdt->template = NULL;
 8608	fwdt->length = 0;
 8609
 8610	return QLA_SUCCESS;
 8611}
 8612
 8613int
 8614qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
 8615{
 8616	int	rval;
 8617	int	i, fragment;
 8618	uint16_t *wcode;
 8619	__be16	 *fwcode;
 8620	uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
 8621	struct fw_blob *blob;
 8622	struct qla_hw_data *ha = vha->hw;
 8623	struct req_que *req = ha->req_q_map[0];
 8624
 8625	/* Load firmware blob. */
 8626	blob = qla2x00_request_firmware(vha);
 8627	if (!blob) {
 8628		ql_log(ql_log_info, vha, 0x0083,
 8629		    "Firmware image unavailable.\n");
 8630		return QLA_FUNCTION_FAILED;
 8631	}
 8632
 8633	rval = QLA_SUCCESS;
 8634
 8635	wcode = (uint16_t *)req->ring;
 8636	*srisc_addr = 0;
 8637	fwcode = (__force __be16 *)blob->fw->data;
 8638	fwclen = 0;
 8639
 8640	/* Validate firmware image by checking version. */
 8641	if (blob->fw->size < 8 * sizeof(uint16_t)) {
 8642		ql_log(ql_log_fatal, vha, 0x0085,
 8643		    "Unable to verify integrity of firmware image (%zd).\n",
 8644		    blob->fw->size);
 8645		goto fail_fw_integrity;
 8646	}
 8647	for (i = 0; i < 4; i++)
 8648		wcode[i] = be16_to_cpu(fwcode[i + 4]);
 8649	if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
 8650	    wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
 8651		wcode[2] == 0 && wcode[3] == 0)) {
 8652		ql_log(ql_log_fatal, vha, 0x0086,
 8653		    "Unable to verify integrity of firmware image.\n");
 8654		ql_log(ql_log_fatal, vha, 0x0087,
 8655		    "Firmware data: %04x %04x %04x %04x.\n",
 8656		    wcode[0], wcode[1], wcode[2], wcode[3]);
 8657		goto fail_fw_integrity;
 8658	}
 8659
 8660	seg = blob->segs;
 8661	while (*seg && rval == QLA_SUCCESS) {
 8662		risc_addr = *seg;
 8663		*srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
 8664		risc_size = be16_to_cpu(fwcode[3]);
 8665
 8666		/* Validate firmware image size. */
 8667		fwclen += risc_size * sizeof(uint16_t);
 8668		if (blob->fw->size < fwclen) {
 8669			ql_log(ql_log_fatal, vha, 0x0088,
 8670			    "Unable to verify integrity of firmware image "
 8671			    "(%zd).\n", blob->fw->size);
 8672			goto fail_fw_integrity;
 8673		}
 8674
 8675		fragment = 0;
 8676		while (risc_size > 0 && rval == QLA_SUCCESS) {
 8677			wlen = (uint16_t)(ha->fw_transfer_size >> 1);
 8678			if (wlen > risc_size)
 8679				wlen = risc_size;
 8680			ql_dbg(ql_dbg_init, vha, 0x0089,
 8681			    "Loading risc segment@ risc addr %x number of "
 8682			    "words 0x%x.\n", risc_addr, wlen);
 8683
 8684			for (i = 0; i < wlen; i++)
 8685				wcode[i] = swab16((__force u32)fwcode[i]);
 8686
 8687			rval = qla2x00_load_ram(vha, req->dma, risc_addr,
 8688			    wlen);
 8689			if (rval) {
 8690				ql_log(ql_log_fatal, vha, 0x008a,
 8691				    "Failed to load segment %d of firmware.\n",
 8692				    fragment);
 8693				break;
 8694			}
 8695
 8696			fwcode += wlen;
 8697			risc_addr += wlen;
 8698			risc_size -= wlen;
 8699			fragment++;
 8700		}
 8701
 8702		/* Next segment. */
 8703		seg++;
 8704	}
 8705	return rval;
 8706
 8707fail_fw_integrity:
 8708	return QLA_FUNCTION_FAILED;
 8709}
 8710
 8711static int
 8712qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
 8713{
 8714	int	rval;
 8715	uint templates, segments, fragment;
 8716	uint32_t *dcode;
 8717	ulong dlen;
 8718	uint32_t risc_addr, risc_size, risc_attr = 0;
 8719	ulong i;
 8720	uint j;
 8721	struct fw_blob *blob;
 8722	__be32 *fwcode;
 8723	struct qla_hw_data *ha = vha->hw;
 8724	struct req_que *req = ha->req_q_map[0];
 8725	struct fwdt *fwdt = ha->fwdt;
 8726
 8727	ql_dbg(ql_dbg_init, vha, 0x0090,
 8728	    "-> FW: Loading via request-firmware.\n");
 8729
 8730	blob = qla2x00_request_firmware(vha);
 8731	if (!blob) {
 8732		ql_log(ql_log_warn, vha, 0x0092,
 8733		    "-> Firmware file not found.\n");
 8734
 8735		return QLA_FUNCTION_FAILED;
 8736	}
 8737
 8738	fwcode = (__force __be32 *)blob->fw->data;
 8739	dcode = (__force uint32_t *)fwcode;
 8740	if (qla24xx_risc_firmware_invalid(dcode)) {
 8741		ql_log(ql_log_fatal, vha, 0x0093,
 8742		    "Unable to verify integrity of firmware image (%zd).\n",
 8743		    blob->fw->size);
 8744		ql_log(ql_log_fatal, vha, 0x0095,
 8745		    "Firmware data: %08x %08x %08x %08x.\n",
 8746		    dcode[0], dcode[1], dcode[2], dcode[3]);
 8747		return QLA_FUNCTION_FAILED;
 8748	}
 8749
 8750	dcode = (uint32_t *)req->ring;
 8751	*srisc_addr = 0;
 8752	segments = FA_RISC_CODE_SEGMENTS;
 8753	for (j = 0; j < segments; j++) {
 8754		ql_dbg(ql_dbg_init, vha, 0x0096,
 8755		    "-> Loading segment %u...\n", j);
 8756		risc_addr = be32_to_cpu(fwcode[2]);
 8757		risc_size = be32_to_cpu(fwcode[3]);
 8758
 8759		if (!*srisc_addr) {
 8760			*srisc_addr = risc_addr;
 8761			risc_attr = be32_to_cpu(fwcode[9]);
 8762		}
 8763
 8764		dlen = ha->fw_transfer_size >> 2;
 8765		for (fragment = 0; risc_size; fragment++) {
 8766			if (dlen > risc_size)
 8767				dlen = risc_size;
 8768
 8769			ql_dbg(ql_dbg_init, vha, 0x0097,
 8770			    "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
 8771			    fragment, risc_addr,
 8772			    (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
 8773			    dlen);
 8774
 8775			for (i = 0; i < dlen; i++)
 8776				dcode[i] = swab32((__force u32)fwcode[i]);
 8777
 8778			rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
 8779			if (rval) {
 8780				ql_log(ql_log_fatal, vha, 0x0098,
 8781				    "-> Failed load firmware fragment %u.\n",
 8782				    fragment);
 8783				return QLA_FUNCTION_FAILED;
 8784			}
 8785
 8786			fwcode += dlen;
 8787			risc_addr += dlen;
 8788			risc_size -= dlen;
 8789		}
 8790	}
 8791
 8792	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
 8793		return QLA_SUCCESS;
 8794
 8795	templates = (risc_attr & BIT_9) ? 2 : 1;
 8796	ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
 8797	for (j = 0; j < templates; j++, fwdt++) {
 8798		vfree(fwdt->template);
 8799		fwdt->template = NULL;
 8800		fwdt->length = 0;
 8801
 8802		risc_size = be32_to_cpu(fwcode[2]);
 8803		ql_dbg(ql_dbg_init, vha, 0x0171,
 8804		    "-> fwdt%u template array at %#x (%#x dwords)\n",
 8805		    j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
 8806		    risc_size);
 8807		if (!risc_size || !~risc_size) {
 8808			ql_dbg(ql_dbg_init, vha, 0x0172,
 8809			    "-> fwdt%u failed to read array\n", j);
 8810			goto failed;
 8811		}
 8812
 8813		/* skip header and ignore checksum */
 8814		fwcode += 7;
 8815		risc_size -= 8;
 8816
 8817		ql_dbg(ql_dbg_init, vha, 0x0173,
 8818		    "-> fwdt%u template allocate template %#x words...\n",
 8819		    j, risc_size);
 8820		fwdt->template = vmalloc_array(risc_size, sizeof(*dcode));
 8821		if (!fwdt->template) {
 8822			ql_log(ql_log_warn, vha, 0x0174,
 8823			    "-> fwdt%u failed allocate template.\n", j);
 8824			goto failed;
 8825		}
 8826
 8827		dcode = fwdt->template;
 8828		for (i = 0; i < risc_size; i++)
 8829			dcode[i] = (__force u32)fwcode[i];
 8830
 8831		if (!qla27xx_fwdt_template_valid(dcode)) {
 8832			ql_log(ql_log_warn, vha, 0x0175,
 8833			    "-> fwdt%u failed template validate\n", j);
 8834			goto failed;
 8835		}
 8836
 8837		dlen = qla27xx_fwdt_template_size(dcode);
 8838		ql_dbg(ql_dbg_init, vha, 0x0176,
 8839		    "-> fwdt%u template size %#lx bytes (%#lx words)\n",
 8840		    j, dlen, dlen / sizeof(*dcode));
 8841		if (dlen > risc_size * sizeof(*dcode)) {
 8842			ql_log(ql_log_warn, vha, 0x0177,
 8843			    "-> fwdt%u template exceeds array (%-lu bytes)\n",
 8844			    j, dlen - risc_size * sizeof(*dcode));
 8845			goto failed;
 8846		}
 8847
 8848		fwdt->length = dlen;
 8849		ql_dbg(ql_dbg_init, vha, 0x0178,
 8850		    "-> fwdt%u loaded template ok\n", j);
 8851
 8852		fwcode += risc_size + 1;
 8853	}
 8854
 8855	return QLA_SUCCESS;
 8856
 8857failed:
 8858	vfree(fwdt->template);
 8859	fwdt->template = NULL;
 8860	fwdt->length = 0;
 8861
 8862	return QLA_SUCCESS;
 8863}
 8864
 8865int
 8866qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
 8867{
 8868	int rval;
 8869
 8870	if (ql2xfwloadbin == 1)
 8871		return qla81xx_load_risc(vha, srisc_addr);
 8872
 8873	/*
 8874	 * FW Load priority:
 8875	 * 1) Firmware via request-firmware interface (.bin file).
 8876	 * 2) Firmware residing in flash.
 8877	 */
 8878	rval = qla24xx_load_risc_blob(vha, srisc_addr);
 8879	if (rval == QLA_SUCCESS)
 8880		return rval;
 8881
 8882	return qla24xx_load_risc_flash(vha, srisc_addr,
 8883	    vha->hw->flt_region_fw);
 8884}
 8885
 8886int
 8887qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
 8888{
 8889	int rval;
 8890	struct qla_hw_data *ha = vha->hw;
 8891	struct active_regions active_regions = { };
 8892
 8893	if (ql2xfwloadbin == 2)
 8894		goto try_blob_fw;
 8895
 8896	/* FW Load priority:
 8897	 * 1) Firmware residing in flash.
 8898	 * 2) Firmware via request-firmware interface (.bin file).
 8899	 * 3) Golden-Firmware residing in flash -- (limited operation).
 8900	 */
 8901
 8902	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
 8903		goto try_primary_fw;
 8904
 8905	qla27xx_get_active_image(vha, &active_regions);
 8906
 8907	if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
 8908		goto try_primary_fw;
 8909
 8910	ql_dbg(ql_dbg_init, vha, 0x008b,
 8911	    "Loading secondary firmware image.\n");
 8912	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
 8913	if (!rval)
 8914		return rval;
 8915
 8916try_primary_fw:
 8917	ql_dbg(ql_dbg_init, vha, 0x008b,
 8918	    "Loading primary firmware image.\n");
 8919	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
 8920	if (!rval)
 8921		return rval;
 8922
 8923try_blob_fw:
 8924	rval = qla24xx_load_risc_blob(vha, srisc_addr);
 8925	if (!rval || !ha->flt_region_gold_fw)
 8926		return rval;
 8927
 8928	ql_log(ql_log_info, vha, 0x0099,
 8929	    "Attempting to fallback to golden firmware.\n");
 8930	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
 8931	if (rval)
 8932		return rval;
 8933
 8934	ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
 8935	ha->flags.running_gold_fw = 1;
 8936	return rval;
 8937}
 8938
 8939void
 8940qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
 8941{
 8942	int ret, retries;
 8943	struct qla_hw_data *ha = vha->hw;
 8944
 8945	if (ha->flags.pci_channel_io_perm_failure)
 8946		return;
 8947	if (!IS_FWI2_CAPABLE(ha))
 8948		return;
 8949	if (!ha->fw_major_version)
 8950		return;
 8951	if (!ha->flags.fw_started)
 8952		return;
 8953
 8954	ret = qla2x00_stop_firmware(vha);
 8955	for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
 8956	    ret != QLA_INVALID_COMMAND && retries ; retries--) {
 8957		ha->isp_ops->reset_chip(vha);
 8958		if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
 8959			continue;
 8960		if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
 8961			continue;
 8962		ql_log(ql_log_info, vha, 0x8015,
 8963		    "Attempting retry of stop-firmware command.\n");
 8964		ret = qla2x00_stop_firmware(vha);
 8965	}
 8966
 8967	QLA_FW_STOPPED(ha);
 8968	ha->flags.fw_init_done = 0;
 8969}
 8970
 8971int
 8972qla24xx_configure_vhba(scsi_qla_host_t *vha)
 8973{
 8974	int rval = QLA_SUCCESS;
 8975	int rval2;
 8976	uint16_t mb[MAILBOX_REGISTER_COUNT];
 8977	struct qla_hw_data *ha = vha->hw;
 8978	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 8979
 8980	if (!vha->vp_idx)
 8981		return -EINVAL;
 8982
 8983	rval = qla2x00_fw_ready(base_vha);
 8984
 8985	if (rval == QLA_SUCCESS) {
 8986		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
 8987		qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
 8988	}
 8989
 8990	vha->flags.management_server_logged_in = 0;
 8991
 8992	/* Login to SNS first */
 8993	rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
 8994	    BIT_1);
 8995	if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
 8996		if (rval2 == QLA_MEMORY_ALLOC_FAILED)
 8997			ql_dbg(ql_dbg_init, vha, 0x0120,
 8998			    "Failed SNS login: loop_id=%x, rval2=%d\n",
 8999			    NPH_SNS, rval2);
 9000		else
 9001			ql_dbg(ql_dbg_init, vha, 0x0103,
 9002			    "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
 9003			    "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
 9004			    NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
 9005		return (QLA_FUNCTION_FAILED);
 9006	}
 9007
 9008	atomic_set(&vha->loop_down_timer, 0);
 9009	atomic_set(&vha->loop_state, LOOP_UP);
 9010	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 9011	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
 9012	rval = qla2x00_loop_resync(base_vha);
 9013
 9014	return rval;
 9015}
 9016
 9017/* 84XX Support **************************************************************/
 9018
 9019static LIST_HEAD(qla_cs84xx_list);
 9020static DEFINE_MUTEX(qla_cs84xx_mutex);
 9021
 9022static struct qla_chip_state_84xx *
 9023qla84xx_get_chip(struct scsi_qla_host *vha)
 9024{
 9025	struct qla_chip_state_84xx *cs84xx;
 9026	struct qla_hw_data *ha = vha->hw;
 9027
 9028	mutex_lock(&qla_cs84xx_mutex);
 9029
 9030	/* Find any shared 84xx chip. */
 9031	list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
 9032		if (cs84xx->bus == ha->pdev->bus) {
 9033			kref_get(&cs84xx->kref);
 9034			goto done;
 9035		}
 9036	}
 9037
 9038	cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
 9039	if (!cs84xx)
 9040		goto done;
 9041
 9042	kref_init(&cs84xx->kref);
 9043	spin_lock_init(&cs84xx->access_lock);
 9044	mutex_init(&cs84xx->fw_update_mutex);
 9045	cs84xx->bus = ha->pdev->bus;
 9046
 9047	list_add_tail(&cs84xx->list, &qla_cs84xx_list);
 9048done:
 9049	mutex_unlock(&qla_cs84xx_mutex);
 9050	return cs84xx;
 9051}
 9052
 9053static void
 9054__qla84xx_chip_release(struct kref *kref)
 9055{
 9056	struct qla_chip_state_84xx *cs84xx =
 9057	    container_of(kref, struct qla_chip_state_84xx, kref);
 9058
 9059	mutex_lock(&qla_cs84xx_mutex);
 9060	list_del(&cs84xx->list);
 9061	mutex_unlock(&qla_cs84xx_mutex);
 9062	kfree(cs84xx);
 9063}
 9064
 9065void
 9066qla84xx_put_chip(struct scsi_qla_host *vha)
 9067{
 9068	struct qla_hw_data *ha = vha->hw;
 9069
 9070	if (ha->cs84xx)
 9071		kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
 9072}
 9073
 9074static int
 9075qla84xx_init_chip(scsi_qla_host_t *vha)
 9076{
 9077	int rval;
 9078	uint16_t status[2];
 9079	struct qla_hw_data *ha = vha->hw;
 9080
 9081	mutex_lock(&ha->cs84xx->fw_update_mutex);
 9082
 9083	rval = qla84xx_verify_chip(vha, status);
 9084
 9085	mutex_unlock(&ha->cs84xx->fw_update_mutex);
 9086
 9087	return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
 9088	    QLA_SUCCESS;
 9089}
 9090
 9091/* 81XX Support **************************************************************/
 9092
 9093int
 9094qla81xx_nvram_config(scsi_qla_host_t *vha)
 9095{
 9096	int   rval;
 9097	struct init_cb_81xx *icb;
 9098	struct nvram_81xx *nv;
 9099	__le32 *dptr;
 9100	uint8_t  *dptr1, *dptr2;
 9101	uint32_t chksum;
 9102	uint16_t cnt;
 9103	struct qla_hw_data *ha = vha->hw;
 9104	uint32_t faddr;
 9105	struct active_regions active_regions = { };
 9106
 9107	rval = QLA_SUCCESS;
 9108	icb = (struct init_cb_81xx *)ha->init_cb;
 9109	nv = ha->nvram;
 9110
 9111	/* Determine NVRAM starting address. */
 9112	ha->nvram_size = sizeof(*nv);
 9113	ha->vpd_size = FA_NVRAM_VPD_SIZE;
 9114	if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
 9115		ha->vpd_size = FA_VPD_SIZE_82XX;
 9116
 9117	if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
 9118		qla28xx_get_aux_images(vha, &active_regions);
 9119
 9120	/* Get VPD data into cache */
 9121	ha->vpd = ha->nvram + VPD_OFFSET;
 9122
 9123	faddr = ha->flt_region_vpd;
 9124	if (IS_QLA28XX(ha)) {
 9125		if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
 9126			faddr = ha->flt_region_vpd_sec;
 9127		ql_dbg(ql_dbg_init, vha, 0x0110,
 9128		    "Loading %s nvram image.\n",
 9129		    active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
 9130		    "primary" : "secondary");
 9131	}
 9132	ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
 9133
 9134	/* Get NVRAM data into cache and calculate checksum. */
 9135	faddr = ha->flt_region_nvram;
 9136	if (IS_QLA28XX(ha)) {
 9137		if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
 9138			faddr = ha->flt_region_nvram_sec;
 9139	}
 9140	ql_dbg(ql_dbg_init, vha, 0x0110,
 9141	    "Loading %s nvram image.\n",
 9142	    active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
 9143	    "primary" : "secondary");
 9144	ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
 9145
 9146	dptr = (__force __le32 *)nv;
 9147	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
 9148		chksum += le32_to_cpu(*dptr);
 9149
 9150	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
 9151	    "Contents of NVRAM:\n");
 9152	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
 9153	    nv, ha->nvram_size);
 9154
 9155	/* Bad NVRAM data, set defaults parameters. */
 9156	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
 9157	    le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
 9158		/* Reset NVRAM data. */
 9159		ql_log(ql_log_info, vha, 0x0073,
 9160		    "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
 9161		    chksum, nv->id, le16_to_cpu(nv->nvram_version));
 9162		ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
 9163		ql_log(ql_log_info, vha, 0x0074,
 9164		    "Falling back to functioning (yet invalid -- WWPN) "
 9165		    "defaults.\n");
 9166
 9167		/*
 9168		 * Set default initialization control block.
 9169		 */
 9170		memset(nv, 0, ha->nvram_size);
 9171		nv->nvram_version = cpu_to_le16(ICB_VERSION);
 9172		nv->version = cpu_to_le16(ICB_VERSION);
 9173		nv->frame_payload_size = cpu_to_le16(2048);
 9174		nv->execution_throttle = cpu_to_le16(0xFFFF);
 9175		nv->exchange_count = cpu_to_le16(0);
 9176		nv->port_name[0] = 0x21;
 9177		nv->port_name[1] = 0x00 + ha->port_no + 1;
 9178		nv->port_name[2] = 0x00;
 9179		nv->port_name[3] = 0xe0;
 9180		nv->port_name[4] = 0x8b;
 9181		nv->port_name[5] = 0x1c;
 9182		nv->port_name[6] = 0x55;
 9183		nv->port_name[7] = 0x86;
 9184		nv->node_name[0] = 0x20;
 9185		nv->node_name[1] = 0x00;
 9186		nv->node_name[2] = 0x00;
 9187		nv->node_name[3] = 0xe0;
 9188		nv->node_name[4] = 0x8b;
 9189		nv->node_name[5] = 0x1c;
 9190		nv->node_name[6] = 0x55;
 9191		nv->node_name[7] = 0x86;
 9192		nv->login_retry_count = cpu_to_le16(8);
 9193		nv->interrupt_delay_timer = cpu_to_le16(0);
 9194		nv->login_timeout = cpu_to_le16(0);
 9195		nv->firmware_options_1 =
 9196		    cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
 9197		nv->firmware_options_2 = cpu_to_le32(2 << 4);
 9198		nv->firmware_options_2 |= cpu_to_le32(BIT_12);
 9199		nv->firmware_options_3 = cpu_to_le32(2 << 13);
 9200		nv->host_p = cpu_to_le32(BIT_11|BIT_10);
 9201		nv->efi_parameters = cpu_to_le32(0);
 9202		nv->reset_delay = 5;
 9203		nv->max_luns_per_target = cpu_to_le16(128);
 9204		nv->port_down_retry_count = cpu_to_le16(30);
 9205		nv->link_down_timeout = cpu_to_le16(180);
 9206		nv->enode_mac[0] = 0x00;
 9207		nv->enode_mac[1] = 0xC0;
 9208		nv->enode_mac[2] = 0xDD;
 9209		nv->enode_mac[3] = 0x04;
 9210		nv->enode_mac[4] = 0x05;
 9211		nv->enode_mac[5] = 0x06 + ha->port_no + 1;
 9212
 9213		rval = 1;
 9214	}
 9215
 9216	if (IS_T10_PI_CAPABLE(ha))
 9217		nv->frame_payload_size &= cpu_to_le16(~7);
 9218
 9219	qlt_81xx_config_nvram_stage1(vha, nv);
 9220
 9221	/* Reset Initialization control block */
 9222	memset(icb, 0, ha->init_cb_size);
 9223
 9224	/* Copy 1st segment. */
 9225	dptr1 = (uint8_t *)icb;
 9226	dptr2 = (uint8_t *)&nv->version;
 9227	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
 9228	while (cnt--)
 9229		*dptr1++ = *dptr2++;
 9230
 9231	icb->login_retry_count = nv->login_retry_count;
 9232
 9233	/* Copy 2nd segment. */
 9234	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
 9235	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
 9236	cnt = (uint8_t *)&icb->reserved_5 -
 9237	    (uint8_t *)&icb->interrupt_delay_timer;
 9238	while (cnt--)
 9239		*dptr1++ = *dptr2++;
 9240
 9241	memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
 9242	/* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
 9243	if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
 9244		icb->enode_mac[0] = 0x00;
 9245		icb->enode_mac[1] = 0xC0;
 9246		icb->enode_mac[2] = 0xDD;
 9247		icb->enode_mac[3] = 0x04;
 9248		icb->enode_mac[4] = 0x05;
 9249		icb->enode_mac[5] = 0x06 + ha->port_no + 1;
 9250	}
 9251
 9252	/* Use extended-initialization control block. */
 9253	memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
 9254	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
 9255	/*
 9256	 * Setup driver NVRAM options.
 9257	 */
 9258	qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
 9259	    "QLE8XXX");
 9260
 9261	qlt_81xx_config_nvram_stage2(vha, icb);
 9262
 9263	/* Use alternate WWN? */
 9264	if (nv->host_p & cpu_to_le32(BIT_15)) {
 9265		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
 9266		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
 9267	}
 9268
 9269	/* Prepare nodename */
 9270	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
 9271		/*
 9272		 * Firmware will apply the following mask if the nodename was
 9273		 * not provided.
 9274		 */
 9275		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
 9276		icb->node_name[0] &= 0xF0;
 9277	}
 9278
 9279	if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
 9280		if ((nv->enhanced_features & BIT_7) == 0)
 9281			ha->flags.scm_supported_a = 1;
 9282	}
 9283
 9284	/* Set host adapter parameters. */
 9285	ha->flags.disable_risc_code_load = 0;
 9286	ha->flags.enable_lip_reset = 0;
 9287	ha->flags.enable_lip_full_login =
 9288	    le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
 9289	ha->flags.enable_target_reset =
 9290	    le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
 9291	ha->flags.enable_led_scheme = 0;
 9292	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
 9293
 9294	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
 9295	    (BIT_6 | BIT_5 | BIT_4)) >> 4;
 9296
 9297	/* save HBA serial number */
 9298	ha->serial0 = icb->port_name[5];
 9299	ha->serial1 = icb->port_name[6];
 9300	ha->serial2 = icb->port_name[7];
 9301	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
 9302	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
 9303
 9304	icb->execution_throttle = cpu_to_le16(0xFFFF);
 9305
 9306	ha->retry_count = le16_to_cpu(nv->login_retry_count);
 9307
 9308	/* Set minimum login_timeout to 4 seconds. */
 9309	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
 9310		nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
 9311	if (le16_to_cpu(nv->login_timeout) < 4)
 9312		nv->login_timeout = cpu_to_le16(4);
 9313	ha->login_timeout = le16_to_cpu(nv->login_timeout);
 9314
 9315	/* Set minimum RATOV to 100 tenths of a second. */
 9316	ha->r_a_tov = 100;
 9317
 9318	ha->loop_reset_delay = nv->reset_delay;
 9319
 9320	/* Link Down Timeout = 0:
 9321	 *
 9322	 *	When Port Down timer expires we will start returning
 9323	 *	I/O's to OS with "DID_NO_CONNECT".
 9324	 *
 9325	 * Link Down Timeout != 0:
 9326	 *
 9327	 *	 The driver waits for the link to come up after link down
 9328	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
 9329	 */
 9330	if (le16_to_cpu(nv->link_down_timeout) == 0) {
 9331		ha->loop_down_abort_time =
 9332		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
 9333	} else {
 9334		ha->link_down_timeout =	le16_to_cpu(nv->link_down_timeout);
 9335		ha->loop_down_abort_time =
 9336		    (LOOP_DOWN_TIME - ha->link_down_timeout);
 9337	}
 9338
 9339	/* Need enough time to try and get the port back. */
 9340	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
 9341	if (qlport_down_retry)
 9342		ha->port_down_retry_count = qlport_down_retry;
 9343
 9344	/* Set login_retry_count */
 9345	ha->login_retry_count  = le16_to_cpu(nv->login_retry_count);
 9346	if (ha->port_down_retry_count ==
 9347	    le16_to_cpu(nv->port_down_retry_count) &&
 9348	    ha->port_down_retry_count > 3)
 9349		ha->login_retry_count = ha->port_down_retry_count;
 9350	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
 9351		ha->login_retry_count = ha->port_down_retry_count;
 9352	if (ql2xloginretrycount)
 9353		ha->login_retry_count = ql2xloginretrycount;
 9354
 9355	/* if not running MSI-X we need handshaking on interrupts */
 9356	if (!vha->hw->flags.msix_enabled &&
 9357	    (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
 9358		icb->firmware_options_2 |= cpu_to_le32(BIT_22);
 9359
 9360	/* Enable ZIO. */
 9361	if (!vha->flags.init_done) {
 9362		ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
 9363		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
 9364		ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
 9365		    le16_to_cpu(icb->interrupt_delay_timer) : 2;
 9366	}
 9367	icb->firmware_options_2 &= cpu_to_le32(
 9368	    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
 9369	vha->flags.process_response_queue = 0;
 9370	if (ha->zio_mode != QLA_ZIO_DISABLED) {
 9371		ha->zio_mode = QLA_ZIO_MODE_6;
 9372
 9373		ql_log(ql_log_info, vha, 0x0075,
 9374		    "ZIO mode %d enabled; timer delay (%d us).\n",
 9375		    ha->zio_mode,
 9376		    ha->zio_timer * 100);
 9377
 9378		icb->firmware_options_2 |= cpu_to_le32(
 9379		    (uint32_t)ha->zio_mode);
 9380		icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
 9381		vha->flags.process_response_queue = 1;
 9382	}
 9383
 9384	 /* enable RIDA Format2 */
 9385	icb->firmware_options_3 |= cpu_to_le32(BIT_0);
 9386
 9387	/* N2N: driver will initiate Login instead of FW */
 9388	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
 9389
 9390	/* Determine NVMe/FCP priority for target ports */
 9391	ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
 9392
 9393	if (rval) {
 9394		ql_log(ql_log_warn, vha, 0x0076,
 9395		    "NVRAM configuration failed.\n");
 9396	}
 9397	return (rval);
 9398}
 9399
 9400int
 9401qla82xx_restart_isp(scsi_qla_host_t *vha)
 9402{
 9403	int status, rval;
 9404	struct qla_hw_data *ha = vha->hw;
 9405	struct scsi_qla_host *vp, *tvp;
 9406	unsigned long flags;
 9407
 9408	status = qla2x00_init_rings(vha);
 9409	if (!status) {
 9410		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
 9411		ha->flags.chip_reset_done = 1;
 9412
 9413		status = qla2x00_fw_ready(vha);
 9414		if (!status) {
 9415			/* Issue a marker after FW becomes ready. */
 9416			qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
 9417			vha->flags.online = 1;
 9418			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
 9419		}
 9420
 9421		/* if no cable then assume it's good */
 9422		if ((vha->device_flags & DFLG_NO_CABLE))
 9423			status = 0;
 9424	}
 9425
 9426	if (!status) {
 9427		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
 9428
 9429		if (!atomic_read(&vha->loop_down_timer)) {
 9430			/*
 9431			 * Issue marker command only when we are going
 9432			 * to start the I/O .
 9433			 */
 9434			vha->marker_needed = 1;
 9435		}
 9436
 9437		ha->isp_ops->enable_intrs(ha);
 9438
 9439		ha->isp_abort_cnt = 0;
 9440		clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
 9441
 9442		/* Update the firmware version */
 9443		status = qla82xx_check_md_needed(vha);
 9444
 9445		if (ha->fce) {
 9446			ha->flags.fce_enabled = 1;
 9447			memset(ha->fce, 0,
 9448			    fce_calc_size(ha->fce_bufs));
 9449			rval = qla2x00_enable_fce_trace(vha,
 9450			    ha->fce_dma, ha->fce_bufs, ha->fce_mb,
 9451			    &ha->fce_bufs);
 9452			if (rval) {
 9453				ql_log(ql_log_warn, vha, 0x8001,
 9454				    "Unable to reinitialize FCE (%d).\n",
 9455				    rval);
 9456				ha->flags.fce_enabled = 0;
 9457			}
 9458		}
 9459
 9460		if (ha->eft) {
 9461			memset(ha->eft, 0, EFT_SIZE);
 9462			rval = qla2x00_enable_eft_trace(vha,
 9463			    ha->eft_dma, EFT_NUM_BUFFERS);
 9464			if (rval) {
 9465				ql_log(ql_log_warn, vha, 0x8010,
 9466				    "Unable to reinitialize EFT (%d).\n",
 9467				    rval);
 9468			}
 9469		}
 9470	}
 9471
 9472	if (!status) {
 9473		ql_dbg(ql_dbg_taskm, vha, 0x8011,
 9474		    "qla82xx_restart_isp succeeded.\n");
 9475
 9476		spin_lock_irqsave(&ha->vport_slock, flags);
 9477		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
 9478			if (vp->vp_idx) {
 9479				atomic_inc(&vp->vref_count);
 9480				spin_unlock_irqrestore(&ha->vport_slock, flags);
 9481
 9482				qla2x00_vp_abort_isp(vp);
 9483
 9484				spin_lock_irqsave(&ha->vport_slock, flags);
 9485				atomic_dec(&vp->vref_count);
 9486			}
 9487		}
 9488		spin_unlock_irqrestore(&ha->vport_slock, flags);
 9489
 9490	} else {
 9491		ql_log(ql_log_warn, vha, 0x8016,
 9492		    "qla82xx_restart_isp **** FAILED ****.\n");
 9493	}
 9494
 9495	return status;
 9496}
 9497
 9498/*
 9499 * qla24xx_get_fcp_prio
 9500 *	Gets the fcp cmd priority value for the logged in port.
 9501 *	Looks for a match of the port descriptors within
 9502 *	each of the fcp prio config entries. If a match is found,
 9503 *	the tag (priority) value is returned.
 9504 *
 9505 * Input:
 9506 *	vha = scsi host structure pointer.
 9507 *	fcport = port structure pointer.
 9508 *
 9509 * Return:
 9510 *	non-zero (if found)
 9511 *	-1 (if not found)
 9512 *
 9513 * Context:
 9514 * 	Kernel context
 9515 */
 9516static int
 9517qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
 9518{
 9519	int i, entries;
 9520	uint8_t pid_match, wwn_match;
 9521	int priority;
 9522	uint32_t pid1, pid2;
 9523	uint64_t wwn1, wwn2;
 9524	struct qla_fcp_prio_entry *pri_entry;
 9525	struct qla_hw_data *ha = vha->hw;
 9526
 9527	if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
 9528		return -1;
 9529
 9530	priority = -1;
 9531	entries = ha->fcp_prio_cfg->num_entries;
 9532	pri_entry = &ha->fcp_prio_cfg->entry[0];
 9533
 9534	for (i = 0; i < entries; i++) {
 9535		pid_match = wwn_match = 0;
 9536
 9537		if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
 9538			pri_entry++;
 9539			continue;
 9540		}
 9541
 9542		/* check source pid for a match */
 9543		if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
 9544			pid1 = pri_entry->src_pid & INVALID_PORT_ID;
 9545			pid2 = vha->d_id.b24 & INVALID_PORT_ID;
 9546			if (pid1 == INVALID_PORT_ID)
 9547				pid_match++;
 9548			else if (pid1 == pid2)
 9549				pid_match++;
 9550		}
 9551
 9552		/* check destination pid for a match */
 9553		if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
 9554			pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
 9555			pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
 9556			if (pid1 == INVALID_PORT_ID)
 9557				pid_match++;
 9558			else if (pid1 == pid2)
 9559				pid_match++;
 9560		}
 9561
 9562		/* check source WWN for a match */
 9563		if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
 9564			wwn1 = wwn_to_u64(vha->port_name);
 9565			wwn2 = wwn_to_u64(pri_entry->src_wwpn);
 9566			if (wwn2 == (uint64_t)-1)
 9567				wwn_match++;
 9568			else if (wwn1 == wwn2)
 9569				wwn_match++;
 9570		}
 9571
 9572		/* check destination WWN for a match */
 9573		if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
 9574			wwn1 = wwn_to_u64(fcport->port_name);
 9575			wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
 9576			if (wwn2 == (uint64_t)-1)
 9577				wwn_match++;
 9578			else if (wwn1 == wwn2)
 9579				wwn_match++;
 9580		}
 9581
 9582		if (pid_match == 2 || wwn_match == 2) {
 9583			/* Found a matching entry */
 9584			if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
 9585				priority = pri_entry->tag;
 9586			break;
 9587		}
 9588
 9589		pri_entry++;
 9590	}
 9591
 9592	return priority;
 9593}
 9594
 9595/*
 9596 * qla24xx_update_fcport_fcp_prio
 9597 *	Activates fcp priority for the logged in fc port
 9598 *
 9599 * Input:
 9600 *	vha = scsi host structure pointer.
 9601 *	fcp = port structure pointer.
 9602 *
 9603 * Return:
 9604 *	QLA_SUCCESS or QLA_FUNCTION_FAILED
 9605 *
 9606 * Context:
 9607 *	Kernel context.
 9608 */
 9609int
 9610qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
 9611{
 9612	int ret;
 9613	int priority;
 9614	uint16_t mb[5];
 9615
 9616	if (fcport->port_type != FCT_TARGET ||
 9617	    fcport->loop_id == FC_NO_LOOP_ID)
 9618		return QLA_FUNCTION_FAILED;
 9619
 9620	priority = qla24xx_get_fcp_prio(vha, fcport);
 9621	if (priority < 0)
 9622		return QLA_FUNCTION_FAILED;
 9623
 9624	if (IS_P3P_TYPE(vha->hw)) {
 9625		fcport->fcp_prio = priority & 0xf;
 9626		return QLA_SUCCESS;
 9627	}
 9628
 9629	ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
 9630	if (ret == QLA_SUCCESS) {
 9631		if (fcport->fcp_prio != priority)
 9632			ql_dbg(ql_dbg_user, vha, 0x709e,
 9633			    "Updated FCP_CMND priority - value=%d loop_id=%d "
 9634			    "port_id=%02x%02x%02x.\n", priority,
 9635			    fcport->loop_id, fcport->d_id.b.domain,
 9636			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
 9637		fcport->fcp_prio = priority & 0xf;
 9638	} else
 9639		ql_dbg(ql_dbg_user, vha, 0x704f,
 9640		    "Unable to update FCP_CMND priority - ret=0x%x for "
 9641		    "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
 9642		    fcport->d_id.b.domain, fcport->d_id.b.area,
 9643		    fcport->d_id.b.al_pa);
 9644	return  ret;
 9645}
 9646
 9647/*
 9648 * qla24xx_update_all_fcp_prio
 9649 *	Activates fcp priority for all the logged in ports
 9650 *
 9651 * Input:
 9652 *	ha = adapter block pointer.
 9653 *
 9654 * Return:
 9655 *	QLA_SUCCESS or QLA_FUNCTION_FAILED
 9656 *
 9657 * Context:
 9658 *	Kernel context.
 9659 */
 9660int
 9661qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
 9662{
 9663	int ret;
 9664	fc_port_t *fcport;
 9665
 9666	ret = QLA_FUNCTION_FAILED;
 9667	/* We need to set priority for all logged in ports */
 9668	list_for_each_entry(fcport, &vha->vp_fcports, list)
 9669		ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
 9670
 9671	return ret;
 9672}
 9673
 9674struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
 9675	int vp_idx, bool startqp)
 9676{
 9677	int rsp_id = 0;
 9678	int  req_id = 0;
 9679	int i;
 9680	struct qla_hw_data *ha = vha->hw;
 9681	uint16_t qpair_id = 0;
 9682	struct qla_qpair *qpair = NULL;
 9683	struct qla_msix_entry *msix;
 9684
 9685	if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
 9686		ql_log(ql_log_warn, vha, 0x00181,
 9687		    "FW/Driver is not multi-queue capable.\n");
 9688		return NULL;
 9689	}
 9690
 9691	if (ql2xmqsupport || ql2xnvmeenable) {
 9692		qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 9693		if (qpair == NULL) {
 9694			ql_log(ql_log_warn, vha, 0x0182,
 9695			    "Failed to allocate memory for queue pair.\n");
 9696			return NULL;
 9697		}
 9698
 9699		qpair->hw = vha->hw;
 9700		qpair->vha = vha;
 9701		qpair->qp_lock_ptr = &qpair->qp_lock;
 9702		spin_lock_init(&qpair->qp_lock);
 9703		qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 9704
 9705		/* Assign available que pair id */
 9706		mutex_lock(&ha->mq_lock);
 9707		qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
 9708		if (ha->num_qpairs >= ha->max_qpairs) {
 9709			mutex_unlock(&ha->mq_lock);
 9710			ql_log(ql_log_warn, vha, 0x0183,
 9711			    "No resources to create additional q pair.\n");
 9712			goto fail_qid_map;
 9713		}
 9714		ha->num_qpairs++;
 9715		set_bit(qpair_id, ha->qpair_qid_map);
 9716		ha->queue_pair_map[qpair_id] = qpair;
 9717		qpair->id = qpair_id;
 9718		qpair->vp_idx = vp_idx;
 9719		qpair->fw_started = ha->flags.fw_started;
 9720		INIT_LIST_HEAD(&qpair->hints_list);
 9721		INIT_LIST_HEAD(&qpair->dsd_list);
 9722		qpair->chip_reset = ha->base_qpair->chip_reset;
 9723		qpair->enable_class_2 = ha->base_qpair->enable_class_2;
 9724		qpair->enable_explicit_conf =
 9725		    ha->base_qpair->enable_explicit_conf;
 9726
 9727		for (i = 0; i < ha->msix_count; i++) {
 9728			msix = &ha->msix_entries[i];
 9729			if (msix->in_use)
 9730				continue;
 9731			qpair->msix = msix;
 9732			ql_dbg(ql_dbg_multiq, vha, 0xc00f,
 9733			    "Vector %x selected for qpair\n", msix->vector);
 9734			break;
 9735		}
 9736		if (!qpair->msix) {
 9737			ql_log(ql_log_warn, vha, 0x0184,
 9738			    "Out of MSI-X vectors!.\n");
 9739			goto fail_msix;
 9740		}
 9741
 9742		qpair->msix->in_use = 1;
 9743		list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
 9744		qpair->pdev = ha->pdev;
 9745		if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 9746			qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 9747
 9748		mutex_unlock(&ha->mq_lock);
 9749
 9750		/* Create response queue first */
 9751		rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
 9752		if (!rsp_id) {
 9753			ql_log(ql_log_warn, vha, 0x0185,
 9754			    "Failed to create response queue.\n");
 9755			goto fail_rsp;
 9756		}
 9757
 9758		qpair->rsp = ha->rsp_q_map[rsp_id];
 9759
 9760		/* Create request queue */
 9761		req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
 9762		    startqp);
 9763		if (!req_id) {
 9764			ql_log(ql_log_warn, vha, 0x0186,
 9765			    "Failed to create request queue.\n");
 9766			goto fail_req;
 9767		}
 9768
 9769		qpair->req = ha->req_q_map[req_id];
 9770		qpair->rsp->req = qpair->req;
 9771		qpair->rsp->qpair = qpair;
 9772
 9773		if (!qpair->cpu_mapped)
 9774			qla_cpu_update(qpair, raw_smp_processor_id());
 9775
 9776		if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
 9777			if (ha->fw_attributes & BIT_4)
 9778				qpair->difdix_supported = 1;
 9779		}
 9780
 9781		qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
 9782		if (!qpair->srb_mempool) {
 9783			ql_log(ql_log_warn, vha, 0xd036,
 9784			    "Failed to create srb mempool for qpair %d\n",
 9785			    qpair->id);
 9786			goto fail_mempool;
 9787		}
 9788
 9789		if (qla_create_buf_pool(vha, qpair)) {
 9790			ql_log(ql_log_warn, vha, 0xd036,
 9791			    "Failed to initialize buf pool for qpair %d\n",
 9792			    qpair->id);
 9793			goto fail_bufpool;
 9794		}
 9795
 9796		/* Mark as online */
 9797		qpair->online = 1;
 9798
 9799		if (!vha->flags.qpairs_available)
 9800			vha->flags.qpairs_available = 1;
 9801
 9802		ql_dbg(ql_dbg_multiq, vha, 0xc00d,
 9803		    "Request/Response queue pair created, id %d\n",
 9804		    qpair->id);
 9805		ql_dbg(ql_dbg_init, vha, 0x0187,
 9806		    "Request/Response queue pair created, id %d\n",
 9807		    qpair->id);
 9808	}
 9809	return qpair;
 9810
 9811fail_bufpool:
 9812	mempool_destroy(qpair->srb_mempool);
 9813fail_mempool:
 9814	qla25xx_delete_req_que(vha, qpair->req);
 9815fail_req:
 9816	qla25xx_delete_rsp_que(vha, qpair->rsp);
 9817fail_rsp:
 9818	mutex_lock(&ha->mq_lock);
 9819	qpair->msix->in_use = 0;
 9820	list_del(&qpair->qp_list_elem);
 9821	if (list_empty(&vha->qp_list))
 9822		vha->flags.qpairs_available = 0;
 9823fail_msix:
 9824	ha->queue_pair_map[qpair_id] = NULL;
 9825	clear_bit(qpair_id, ha->qpair_qid_map);
 9826	ha->num_qpairs--;
 9827	mutex_unlock(&ha->mq_lock);
 9828fail_qid_map:
 9829	kfree(qpair);
 9830	return NULL;
 9831}
 9832
 9833int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
 9834{
 9835	int ret = QLA_FUNCTION_FAILED;
 9836	struct qla_hw_data *ha = qpair->hw;
 9837
 9838	qpair->delete_in_progress = 1;
 9839
 9840	qla_free_buf_pool(qpair);
 9841
 9842	ret = qla25xx_delete_req_que(vha, qpair->req);
 9843	if (ret != QLA_SUCCESS)
 9844		goto fail;
 9845
 9846	ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
 9847	if (ret != QLA_SUCCESS)
 9848		goto fail;
 9849
 9850	if (!list_empty(&qpair->dsd_list)) {
 9851		struct dsd_dma *dsd_ptr, *tdsd_ptr;
 9852
 9853		/* clean up allocated prev pool */
 9854		list_for_each_entry_safe(dsd_ptr, tdsd_ptr,
 9855					 &qpair->dsd_list, list) {
 9856			dma_pool_free(ha->dl_dma_pool, dsd_ptr->dsd_addr,
 9857				      dsd_ptr->dsd_list_dma);
 9858			list_del(&dsd_ptr->list);
 9859			kfree(dsd_ptr);
 9860		}
 9861	}
 9862
 9863	mutex_lock(&ha->mq_lock);
 9864	ha->queue_pair_map[qpair->id] = NULL;
 9865	clear_bit(qpair->id, ha->qpair_qid_map);
 9866	ha->num_qpairs--;
 9867	list_del(&qpair->qp_list_elem);
 9868	if (list_empty(&vha->qp_list)) {
 9869		vha->flags.qpairs_available = 0;
 9870		vha->flags.qpairs_req_created = 0;
 9871		vha->flags.qpairs_rsp_created = 0;
 9872	}
 9873	mempool_destroy(qpair->srb_mempool);
 9874	kfree(qpair);
 9875	mutex_unlock(&ha->mq_lock);
 9876
 9877	return QLA_SUCCESS;
 9878fail:
 9879	return ret;
 9880}
 9881
 9882uint64_t
 9883qla2x00_count_set_bits(uint32_t num)
 9884{
 9885	/* Brian Kernighan's Algorithm */
 9886	u64 count = 0;
 9887
 9888	while (num) {
 9889		num &= (num - 1);
 9890		count++;
 9891	}
 9892	return count;
 9893}
 9894
 9895uint64_t
 9896qla2x00_get_num_tgts(scsi_qla_host_t *vha)
 9897{
 9898	fc_port_t *f, *tf;
 9899	u64 count = 0;
 9900
 9901	f = NULL;
 9902	tf = NULL;
 9903
 9904	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
 9905		if (f->port_type != FCT_TARGET)
 9906			continue;
 9907		count++;
 9908	}
 9909	return count;
 9910}
 9911
 9912int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
 9913{
 9914	scsi_qla_host_t *vha = shost_priv(host);
 9915	fc_port_t *fcport = NULL;
 9916	unsigned long int_flags;
 9917
 9918	if (flags & QLA2XX_HW_ERROR)
 9919		vha->hw_err_cnt = 0;
 9920	if (flags & QLA2XX_SHT_LNK_DWN)
 9921		vha->short_link_down_cnt = 0;
 9922	if (flags & QLA2XX_INT_ERR)
 9923		vha->interface_err_cnt = 0;
 9924	if (flags & QLA2XX_CMD_TIMEOUT)
 9925		vha->cmd_timeout_cnt = 0;
 9926	if (flags & QLA2XX_RESET_CMD_ERR)
 9927		vha->reset_cmd_err_cnt = 0;
 9928	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
 9929		spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
 9930		list_for_each_entry(fcport, &vha->vp_fcports, list) {
 9931			fcport->tgt_short_link_down_cnt = 0;
 9932			fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
 9933		}
 9934		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
 9935	}
 9936	vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
 9937	return 0;
 9938}
 9939
 9940int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
 9941{
 9942	return qla2xxx_reset_stats(host, flags);
 9943}
 9944
 9945int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
 9946{
 9947	return qla2xxx_reset_stats(host, flags);
 9948}
 9949
 9950int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
 9951			  void *data, u64 size)
 9952{
 9953	scsi_qla_host_t *vha = shost_priv(host);
 9954	struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
 9955	struct ql_vnd_stats *rsp_data = &resp->stats;
 9956	u64 ini_entry_count = 0;
 9957	u64 i = 0;
 9958	u64 entry_count = 0;
 9959	u64 num_tgt = 0;
 9960	u32 tmp_stat_type = 0;
 9961	fc_port_t *fcport = NULL;
 9962	unsigned long int_flags;
 9963
 9964	/* Copy stat type to work on it */
 9965	tmp_stat_type = flags;
 9966
 9967	if (tmp_stat_type & BIT_17) {
 9968		num_tgt = qla2x00_get_num_tgts(vha);
 9969		/* unset BIT_17 */
 9970		tmp_stat_type &= ~(1 << 17);
 9971	}
 9972	ini_entry_count = qla2x00_count_set_bits(tmp_stat_type);
 9973
 9974	entry_count = ini_entry_count + num_tgt;
 9975
 9976	rsp_data->entry_count = entry_count;
 9977
 9978	i = 0;
 9979	if (flags & QLA2XX_HW_ERROR) {
 9980		rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
 9981		rsp_data->entry[i].tgt_num = 0x0;
 9982		rsp_data->entry[i].cnt = vha->hw_err_cnt;
 9983		i++;
 9984	}
 9985
 9986	if (flags & QLA2XX_SHT_LNK_DWN) {
 9987		rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
 9988		rsp_data->entry[i].tgt_num = 0x0;
 9989		rsp_data->entry[i].cnt = vha->short_link_down_cnt;
 9990		i++;
 9991	}
 9992
 9993	if (flags & QLA2XX_INT_ERR) {
 9994		rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
 9995		rsp_data->entry[i].tgt_num = 0x0;
 9996		rsp_data->entry[i].cnt = vha->interface_err_cnt;
 9997		i++;
 9998	}
 9999
10000	if (flags & QLA2XX_CMD_TIMEOUT) {
10001		rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
10002		rsp_data->entry[i].tgt_num = 0x0;
10003		rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
10004		i++;
10005	}
10006
10007	if (flags & QLA2XX_RESET_CMD_ERR) {
10008		rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
10009		rsp_data->entry[i].tgt_num = 0x0;
10010		rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
10011		i++;
10012	}
10013
10014	/* i will continue from previous loop, as target
10015	 * entries are after initiator
10016	 */
10017	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
10018		spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
10019		list_for_each_entry(fcport, &vha->vp_fcports, list) {
10020			if (fcport->port_type != FCT_TARGET)
10021				continue;
10022			if (!fcport->rport)
10023				continue;
10024			rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
10025			rsp_data->entry[i].tgt_num = fcport->rport->number;
10026			rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
10027			i++;
10028		}
10029		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
10030	}
10031	resp->status = EXT_STATUS_OK;
10032
10033	return 0;
10034}
10035
10036int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
10037			  struct fc_rport *rport, void *data, u64 size)
10038{
10039	struct ql_vnd_tgt_stats_resp *tgt_data = data;
10040	fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
10041
10042	tgt_data->status = 0;
10043	tgt_data->stats.entry_count = 1;
10044	tgt_data->stats.entry[0].stat_type = flags;
10045	tgt_data->stats.entry[0].tgt_num = rport->number;
10046	tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
10047
10048	return 0;
10049}
10050
10051int qla2xxx_disable_port(struct Scsi_Host *host)
10052{
10053	scsi_qla_host_t *vha = shost_priv(host);
10054
10055	vha->hw->flags.port_isolated = 1;
10056
10057	if (qla2x00_isp_reg_stat(vha->hw)) {
10058		ql_log(ql_log_info, vha, 0x9006,
10059		    "PCI/Register disconnect, exiting.\n");
10060		qla_pci_set_eeh_busy(vha);
10061		return FAILED;
10062	}
10063	if (qla2x00_chip_is_down(vha))
10064		return 0;
10065
10066	if (vha->flags.online) {
10067		qla2x00_abort_isp_cleanup(vha);
10068		qla2x00_wait_for_sess_deletion(vha);
10069	}
10070
10071	return 0;
10072}
10073
10074int qla2xxx_enable_port(struct Scsi_Host *host)
10075{
10076	scsi_qla_host_t *vha = shost_priv(host);
10077
10078	if (qla2x00_isp_reg_stat(vha->hw)) {
10079		ql_log(ql_log_info, vha, 0x9001,
10080		    "PCI/Register disconnect, exiting.\n");
10081		qla_pci_set_eeh_busy(vha);
10082		return FAILED;
10083	}
10084
10085	vha->hw->flags.port_isolated = 0;
10086	/* Set the flag to 1, so that isp_abort can proceed */
10087	vha->flags.online = 1;
10088	set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
10089	qla2xxx_wake_dpc(vha);
10090
10091	return 0;
10092}