esas2r_init.c

   1/*
   2 *  linux/drivers/scsi/esas2r/esas2r_init.c
   3 *      For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers
   4 *
   5 *  Copyright (c) 2001-2013 ATTO Technology, Inc.
   6 *  (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License
  10 * as published by the Free Software Foundation; either version 2
  11 * of the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * NO WARRANTY
  19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  23 * solely responsible for determining the appropriateness of using and
  24 * distributing the Program and assumes all risks associated with its
  25 * exercise of rights under this Agreement, including but not limited to
  26 * the risks and costs of program errors, damage to or loss of data,
  27 * programs or equipment, and unavailability or interruption of operations.
  28 *
  29 * DISCLAIMER OF LIABILITY
  30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37 *
  38 * You should have received a copy of the GNU General Public License
  39 * along with this program; if not, write to the Free Software
  40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
  41 * USA.
  42 */
  43
  44#include "esas2r.h"
  45
  46static bool esas2r_initmem_alloc(struct esas2r_adapter *a,
  47				 struct esas2r_mem_desc *mem_desc,
  48				 u32 align)
  49{
  50	mem_desc->esas2r_param = mem_desc->size + align;
  51	mem_desc->virt_addr = NULL;
  52	mem_desc->phys_addr = 0;
  53	mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev,
  54						   (size_t)mem_desc->
  55						   esas2r_param,
  56						   (dma_addr_t *)&mem_desc->
  57						   phys_addr,
  58						   GFP_KERNEL);
  59
  60	if (mem_desc->esas2r_data == NULL) {
  61		esas2r_log(ESAS2R_LOG_CRIT,
  62			   "failed to allocate %lu bytes of consistent memory!",
  63			   (long
  64			    unsigned
  65			    int)mem_desc->esas2r_param);
  66		return false;
  67	}
  68
  69	mem_desc->virt_addr = PTR_ALIGN(mem_desc->esas2r_data, align);
  70	mem_desc->phys_addr = ALIGN(mem_desc->phys_addr, align);
  71	memset(mem_desc->virt_addr, 0, mem_desc->size);
  72	return true;
  73}
  74
  75static void esas2r_initmem_free(struct esas2r_adapter *a,
  76				struct esas2r_mem_desc *mem_desc)
  77{
  78	if (mem_desc->virt_addr == NULL)
  79		return;
  80
  81	/*
  82	 * Careful!  phys_addr and virt_addr may have been adjusted from the
  83	 * original allocation in order to return the desired alignment.  That
  84	 * means we have to use the original address (in esas2r_data) and size
  85	 * (esas2r_param) and calculate the original physical address based on
  86	 * the difference between the requested and actual allocation size.
  87	 */
  88	if (mem_desc->phys_addr) {
  89		int unalign = ((u8 *)mem_desc->virt_addr) -
  90			      ((u8 *)mem_desc->esas2r_data);
  91
  92		dma_free_coherent(&a->pcid->dev,
  93				  (size_t)mem_desc->esas2r_param,
  94				  mem_desc->esas2r_data,
  95				  (dma_addr_t)(mem_desc->phys_addr - unalign));
  96	} else {
  97		kfree(mem_desc->esas2r_data);
  98	}
  99
 100	mem_desc->virt_addr = NULL;
 101}
 102
 103static bool alloc_vda_req(struct esas2r_adapter *a,
 104			  struct esas2r_request *rq)
 105{
 106	struct esas2r_mem_desc *memdesc = kzalloc(
 107		sizeof(struct esas2r_mem_desc), GFP_KERNEL);
 108
 109	if (memdesc == NULL) {
 110		esas2r_hdebug("could not alloc mem for vda request memdesc\n");
 111		return false;
 112	}
 113
 114	memdesc->size = sizeof(union atto_vda_req) +
 115			ESAS2R_DATA_BUF_LEN;
 116
 117	if (!esas2r_initmem_alloc(a, memdesc, 256)) {
 118		esas2r_hdebug("could not alloc mem for vda request\n");
 119		kfree(memdesc);
 120		return false;
 121	}
 122
 123	a->num_vrqs++;
 124	list_add(&memdesc->next_desc, &a->vrq_mds_head);
 125
 126	rq->vrq_md = memdesc;
 127	rq->vrq = (union atto_vda_req *)memdesc->virt_addr;
 128	rq->vrq->scsi.handle = a->num_vrqs;
 129
 130	return true;
 131}
 132
 133static void esas2r_unmap_regions(struct esas2r_adapter *a)
 134{
 135	if (a->regs)
 136		iounmap((void __iomem *)a->regs);
 137
 138	a->regs = NULL;
 139
 140	pci_release_region(a->pcid, 2);
 141
 142	if (a->data_window)
 143		iounmap((void __iomem *)a->data_window);
 144
 145	a->data_window = NULL;
 146
 147	pci_release_region(a->pcid, 0);
 148}
 149
 150static int esas2r_map_regions(struct esas2r_adapter *a)
 151{
 152	int error;
 153
 154	a->regs = NULL;
 155	a->data_window = NULL;
 156
 157	error = pci_request_region(a->pcid, 2, a->name);
 158	if (error != 0) {
 159		esas2r_log(ESAS2R_LOG_CRIT,
 160			   "pci_request_region(2) failed, error %d",
 161			   error);
 162
 163		return error;
 164	}
 165
 166	a->regs = (void __force *)ioremap(pci_resource_start(a->pcid, 2),
 167					  pci_resource_len(a->pcid, 2));
 168	if (a->regs == NULL) {
 169		esas2r_log(ESAS2R_LOG_CRIT,
 170			   "ioremap failed for regs mem region\n");
 171		pci_release_region(a->pcid, 2);
 172		return -EFAULT;
 173	}
 174
 175	error = pci_request_region(a->pcid, 0, a->name);
 176	if (error != 0) {
 177		esas2r_log(ESAS2R_LOG_CRIT,
 178			   "pci_request_region(2) failed, error %d",
 179			   error);
 180		esas2r_unmap_regions(a);
 181		return error;
 182	}
 183
 184	a->data_window = (void __force *)ioremap(pci_resource_start(a->pcid,
 185								    0),
 186						 pci_resource_len(a->pcid, 0));
 187	if (a->data_window == NULL) {
 188		esas2r_log(ESAS2R_LOG_CRIT,
 189			   "ioremap failed for data_window mem region\n");
 190		esas2r_unmap_regions(a);
 191		return -EFAULT;
 192	}
 193
 194	return 0;
 195}
 196
 197static void esas2r_setup_interrupts(struct esas2r_adapter *a, int intr_mode)
 198{
 199	int i;
 200
 201	/* Set up interrupt mode based on the requested value */
 202	switch (intr_mode) {
 203	case INTR_MODE_LEGACY:
 204use_legacy_interrupts:
 205		a->intr_mode = INTR_MODE_LEGACY;
 206		break;
 207
 208	case INTR_MODE_MSI:
 209		i = pci_enable_msi(a->pcid);
 210		if (i != 0) {
 211			esas2r_log(ESAS2R_LOG_WARN,
 212				   "failed to enable MSI for adapter %d, "
 213				   "falling back to legacy interrupts "
 214				   "(err=%d)", a->index,
 215				   i);
 216			goto use_legacy_interrupts;
 217		}
 218		a->intr_mode = INTR_MODE_MSI;
 219		set_bit(AF2_MSI_ENABLED, &a->flags2);
 220		break;
 221
 222
 223	default:
 224		esas2r_log(ESAS2R_LOG_WARN,
 225			   "unknown interrupt_mode %d requested, "
 226			   "falling back to legacy interrupt",
 227			   interrupt_mode);
 228		goto use_legacy_interrupts;
 229	}
 230}
 231
 232static void esas2r_claim_interrupts(struct esas2r_adapter *a)
 233{
 234	unsigned long flags = 0;
 235
 236	if (a->intr_mode == INTR_MODE_LEGACY)
 237		flags |= IRQF_SHARED;
 238
 239	esas2r_log(ESAS2R_LOG_INFO,
 240		   "esas2r_claim_interrupts irq=%d (%p, %s, %lx)",
 241		   a->pcid->irq, a, a->name, flags);
 242
 243	if (request_irq(a->pcid->irq,
 244			(a->intr_mode ==
 245			 INTR_MODE_LEGACY) ? esas2r_interrupt :
 246			esas2r_msi_interrupt,
 247			flags,
 248			a->name,
 249			a)) {
 250		esas2r_log(ESAS2R_LOG_CRIT, "unable to request IRQ %02X",
 251			   a->pcid->irq);
 252		return;
 253	}
 254
 255	set_bit(AF2_IRQ_CLAIMED, &a->flags2);
 256	esas2r_log(ESAS2R_LOG_INFO,
 257		   "claimed IRQ %d flags: 0x%lx",
 258		   a->pcid->irq, flags);
 259}
 260
 261int esas2r_init_adapter(struct Scsi_Host *host, struct pci_dev *pcid,
 262			int index)
 263{
 264	struct esas2r_adapter *a;
 265	u64 bus_addr = 0;
 266	int i;
 267	void *next_uncached;
 268	struct esas2r_request *first_request, *last_request;
 269	bool dma64 = false;
 270
 271	if (index >= MAX_ADAPTERS) {
 272		esas2r_log(ESAS2R_LOG_CRIT,
 273			   "tried to init invalid adapter index %u!",
 274			   index);
 275		return 0;
 276	}
 277
 278	if (esas2r_adapters[index]) {
 279		esas2r_log(ESAS2R_LOG_CRIT,
 280			   "tried to init existing adapter index %u!",
 281			   index);
 282		return 0;
 283	}
 284
 285	a = (struct esas2r_adapter *)host->hostdata;
 286	memset(a, 0, sizeof(struct esas2r_adapter));
 287	a->pcid = pcid;
 288	a->host = host;
 289
 290	if (sizeof(dma_addr_t) > 4 &&
 291	    dma_get_required_mask(&pcid->dev) > DMA_BIT_MASK(32) &&
 292	    !dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(64)))
 293		dma64 = true;
 294
 295	if (!dma64 && dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(32))) {
 296		esas2r_log(ESAS2R_LOG_CRIT, "failed to set DMA mask");
 297		esas2r_kill_adapter(index);
 298		return 0;
 299	}
 300
 301	esas2r_log_dev(ESAS2R_LOG_INFO, &pcid->dev,
 302		       "%s-bit PCI addressing enabled\n", dma64 ? "64" : "32");
 303
 304	esas2r_adapters[index] = a;
 305	sprintf(a->name, ESAS2R_DRVR_NAME "_%02d", index);
 306	esas2r_debug("new adapter %p, name %s", a, a->name);
 307	spin_lock_init(&a->request_lock);
 308	spin_lock_init(&a->fw_event_lock);
 309	mutex_init(&a->fm_api_mutex);
 310	mutex_init(&a->fs_api_mutex);
 311	sema_init(&a->nvram_semaphore, 1);
 312
 313	esas2r_fw_event_off(a);
 314	a->fw_event_q =
 315		alloc_ordered_workqueue("esas2r/%d", WQ_MEM_RECLAIM, a->index);
 316
 317	init_waitqueue_head(&a->buffered_ioctl_waiter);
 318	init_waitqueue_head(&a->nvram_waiter);
 319	init_waitqueue_head(&a->fm_api_waiter);
 320	init_waitqueue_head(&a->fs_api_waiter);
 321	init_waitqueue_head(&a->vda_waiter);
 322
 323	INIT_LIST_HEAD(&a->general_req.req_list);
 324	INIT_LIST_HEAD(&a->active_list);
 325	INIT_LIST_HEAD(&a->defer_list);
 326	INIT_LIST_HEAD(&a->free_sg_list_head);
 327	INIT_LIST_HEAD(&a->avail_request);
 328	INIT_LIST_HEAD(&a->vrq_mds_head);
 329	INIT_LIST_HEAD(&a->fw_event_list);
 330
 331	first_request = (struct esas2r_request *)((u8 *)(a + 1));
 332
 333	for (last_request = first_request, i = 1; i < num_requests;
 334	     last_request++, i++) {
 335		INIT_LIST_HEAD(&last_request->req_list);
 336		list_add_tail(&last_request->comp_list, &a->avail_request);
 337		if (!alloc_vda_req(a, last_request)) {
 338			esas2r_log(ESAS2R_LOG_CRIT,
 339				   "failed to allocate a VDA request!");
 340			esas2r_kill_adapter(index);
 341			return 0;
 342		}
 343	}
 344
 345	esas2r_debug("requests: %p to %p (%d, %d)", first_request,
 346		     last_request,
 347		     sizeof(*first_request),
 348		     num_requests);
 349
 350	if (esas2r_map_regions(a) != 0) {
 351		esas2r_log(ESAS2R_LOG_CRIT, "could not map PCI regions!");
 352		esas2r_kill_adapter(index);
 353		return 0;
 354	}
 355
 356	a->index = index;
 357
 358	/* interrupts will be disabled until we are done with init */
 359	atomic_inc(&a->dis_ints_cnt);
 360	atomic_inc(&a->disable_cnt);
 361	set_bit(AF_CHPRST_PENDING, &a->flags);
 362	set_bit(AF_DISC_PENDING, &a->flags);
 363	set_bit(AF_FIRST_INIT, &a->flags);
 364	set_bit(AF_LEGACY_SGE_MODE, &a->flags);
 365
 366	a->init_msg = ESAS2R_INIT_MSG_START;
 367	a->max_vdareq_size = 128;
 368	a->build_sgl = esas2r_build_sg_list_sge;
 369
 370	esas2r_setup_interrupts(a, interrupt_mode);
 371
 372	a->uncached_size = esas2r_get_uncached_size(a);
 373	a->uncached = dma_alloc_coherent(&pcid->dev,
 374					 (size_t)a->uncached_size,
 375					 (dma_addr_t *)&bus_addr,
 376					 GFP_KERNEL);
 377	if (a->uncached == NULL) {
 378		esas2r_log(ESAS2R_LOG_CRIT,
 379			   "failed to allocate %d bytes of consistent memory!",
 380			   a->uncached_size);
 381		esas2r_kill_adapter(index);
 382		return 0;
 383	}
 384
 385	a->uncached_phys = bus_addr;
 386
 387	esas2r_debug("%d bytes uncached memory allocated @ %p (%x:%x)",
 388		     a->uncached_size,
 389		     a->uncached,
 390		     upper_32_bits(bus_addr),
 391		     lower_32_bits(bus_addr));
 392	memset(a->uncached, 0, a->uncached_size);
 393	next_uncached = a->uncached;
 394
 395	if (!esas2r_init_adapter_struct(a,
 396					&next_uncached)) {
 397		esas2r_log(ESAS2R_LOG_CRIT,
 398			   "failed to initialize adapter structure (2)!");
 399		esas2r_kill_adapter(index);
 400		return 0;
 401	}
 402
 403	tasklet_init(&a->tasklet,
 404		     esas2r_adapter_tasklet,
 405		     (unsigned long)a);
 406
 407	/*
 408	 * Disable chip interrupts to prevent spurious interrupts
 409	 * until we claim the IRQ.
 410	 */
 411	esas2r_disable_chip_interrupts(a);
 412	esas2r_check_adapter(a);
 413
 414	if (!esas2r_init_adapter_hw(a, true)) {
 415		esas2r_log(ESAS2R_LOG_CRIT, "failed to initialize hardware!");
 416	} else {
 417		esas2r_debug("esas2r_init_adapter ok");
 418	}
 419
 420	esas2r_claim_interrupts(a);
 421
 422	if (test_bit(AF2_IRQ_CLAIMED, &a->flags2))
 423		esas2r_enable_chip_interrupts(a);
 424
 425	set_bit(AF2_INIT_DONE, &a->flags2);
 426	if (!test_bit(AF_DEGRADED_MODE, &a->flags))
 427		esas2r_kickoff_timer(a);
 428	esas2r_debug("esas2r_init_adapter done for %p (%d)",
 429		     a, a->disable_cnt);
 430
 431	return 1;
 432}
 433
 434static void esas2r_adapter_power_down(struct esas2r_adapter *a,
 435				      int power_management)
 436{
 437	struct esas2r_mem_desc *memdesc, *next;
 438
 439	if ((test_bit(AF2_INIT_DONE, &a->flags2))
 440	    &&  (!test_bit(AF_DEGRADED_MODE, &a->flags))) {
 441		if (!power_management) {
 442			timer_delete_sync(&a->timer);
 443			tasklet_kill(&a->tasklet);
 444		}
 445		esas2r_power_down(a);
 446
 447		/*
 448		 * There are versions of firmware that do not handle the sync
 449		 * cache command correctly.  Stall here to ensure that the
 450		 * cache is lazily flushed.
 451		 */
 452		mdelay(500);
 453		esas2r_debug("chip halted");
 454	}
 455
 456	/* Remove sysfs binary files */
 457	if (a->sysfs_fw_created) {
 458		sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fw);
 459		a->sysfs_fw_created = 0;
 460	}
 461
 462	if (a->sysfs_fs_created) {
 463		sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fs);
 464		a->sysfs_fs_created = 0;
 465	}
 466
 467	if (a->sysfs_vda_created) {
 468		sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_vda);
 469		a->sysfs_vda_created = 0;
 470	}
 471
 472	if (a->sysfs_hw_created) {
 473		sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_hw);
 474		a->sysfs_hw_created = 0;
 475	}
 476
 477	if (a->sysfs_live_nvram_created) {
 478		sysfs_remove_bin_file(&a->host->shost_dev.kobj,
 479				      &bin_attr_live_nvram);
 480		a->sysfs_live_nvram_created = 0;
 481	}
 482
 483	if (a->sysfs_default_nvram_created) {
 484		sysfs_remove_bin_file(&a->host->shost_dev.kobj,
 485				      &bin_attr_default_nvram);
 486		a->sysfs_default_nvram_created = 0;
 487	}
 488
 489	/* Clean up interrupts */
 490	if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) {
 491		esas2r_log_dev(ESAS2R_LOG_INFO,
 492			       &(a->pcid->dev),
 493			       "free_irq(%d) called", a->pcid->irq);
 494
 495		free_irq(a->pcid->irq, a);
 496		esas2r_debug("IRQ released");
 497		clear_bit(AF2_IRQ_CLAIMED, &a->flags2);
 498	}
 499
 500	if (test_bit(AF2_MSI_ENABLED, &a->flags2)) {
 501		pci_disable_msi(a->pcid);
 502		clear_bit(AF2_MSI_ENABLED, &a->flags2);
 503		esas2r_debug("MSI disabled");
 504	}
 505
 506	if (a->inbound_list_md.virt_addr)
 507		esas2r_initmem_free(a, &a->inbound_list_md);
 508
 509	if (a->outbound_list_md.virt_addr)
 510		esas2r_initmem_free(a, &a->outbound_list_md);
 511
 512	list_for_each_entry_safe(memdesc, next, &a->free_sg_list_head,
 513				 next_desc) {
 514		esas2r_initmem_free(a, memdesc);
 515	}
 516
 517	/* Following frees everything allocated via alloc_vda_req */
 518	list_for_each_entry_safe(memdesc, next, &a->vrq_mds_head, next_desc) {
 519		esas2r_initmem_free(a, memdesc);
 520		list_del(&memdesc->next_desc);
 521		kfree(memdesc);
 522	}
 523
 524	kfree(a->first_ae_req);
 525	a->first_ae_req = NULL;
 526
 527	kfree(a->sg_list_mds);
 528	a->sg_list_mds = NULL;
 529
 530	kfree(a->req_table);
 531	a->req_table = NULL;
 532
 533	if (a->regs) {
 534		esas2r_unmap_regions(a);
 535		a->regs = NULL;
 536		a->data_window = NULL;
 537		esas2r_debug("regions unmapped");
 538	}
 539}
 540
 541/* Release/free allocated resources for specified adapters. */
 542void esas2r_kill_adapter(int i)
 543{
 544	struct esas2r_adapter *a = esas2r_adapters[i];
 545
 546	if (a) {
 547		unsigned long flags;
 548		struct workqueue_struct *wq;
 549		esas2r_debug("killing adapter %p [%d] ", a, i);
 550		esas2r_fw_event_off(a);
 551		esas2r_adapter_power_down(a, 0);
 552		if (esas2r_buffered_ioctl &&
 553		    (a->pcid == esas2r_buffered_ioctl_pcid)) {
 554			dma_free_coherent(&a->pcid->dev,
 555					  (size_t)esas2r_buffered_ioctl_size,
 556					  esas2r_buffered_ioctl,
 557					  esas2r_buffered_ioctl_addr);
 558			esas2r_buffered_ioctl = NULL;
 559		}
 560
 561		if (a->vda_buffer) {
 562			dma_free_coherent(&a->pcid->dev,
 563					  (size_t)VDA_MAX_BUFFER_SIZE,
 564					  a->vda_buffer,
 565					  (dma_addr_t)a->ppvda_buffer);
 566			a->vda_buffer = NULL;
 567		}
 568		if (a->fs_api_buffer) {
 569			dma_free_coherent(&a->pcid->dev,
 570					  (size_t)a->fs_api_buffer_size,
 571					  a->fs_api_buffer,
 572					  (dma_addr_t)a->ppfs_api_buffer);
 573			a->fs_api_buffer = NULL;
 574		}
 575
 576		kfree(a->local_atto_ioctl);
 577		a->local_atto_ioctl = NULL;
 578
 579		spin_lock_irqsave(&a->fw_event_lock, flags);
 580		wq = a->fw_event_q;
 581		a->fw_event_q = NULL;
 582		spin_unlock_irqrestore(&a->fw_event_lock, flags);
 583		if (wq)
 584			destroy_workqueue(wq);
 585
 586		if (a->uncached) {
 587			dma_free_coherent(&a->pcid->dev,
 588					  (size_t)a->uncached_size,
 589					  a->uncached,
 590					  (dma_addr_t)a->uncached_phys);
 591			a->uncached = NULL;
 592			esas2r_debug("uncached area freed");
 593		}
 594
 595		esas2r_log_dev(ESAS2R_LOG_INFO,
 596			       &(a->pcid->dev),
 597			       "pci_disable_device() called.  msix_enabled: %d "
 598			       "msi_enabled: %d irq: %d pin: %d",
 599			       a->pcid->msix_enabled,
 600			       a->pcid->msi_enabled,
 601			       a->pcid->irq,
 602			       a->pcid->pin);
 603
 604		esas2r_log_dev(ESAS2R_LOG_INFO,
 605			       &(a->pcid->dev),
 606			       "before pci_disable_device() enable_cnt: %d",
 607			       a->pcid->enable_cnt.counter);
 608
 609		pci_disable_device(a->pcid);
 610		esas2r_log_dev(ESAS2R_LOG_INFO,
 611			       &(a->pcid->dev),
 612			       "after pci_disable_device() enable_cnt: %d",
 613			       a->pcid->enable_cnt.counter);
 614
 615		esas2r_log_dev(ESAS2R_LOG_INFO,
 616			       &(a->pcid->dev),
 617			       "pci_set_drv_data(%p, NULL) called",
 618			       a->pcid);
 619
 620		pci_set_drvdata(a->pcid, NULL);
 621		esas2r_adapters[i] = NULL;
 622
 623		if (test_bit(AF2_INIT_DONE, &a->flags2)) {
 624			clear_bit(AF2_INIT_DONE, &a->flags2);
 625
 626			set_bit(AF_DEGRADED_MODE, &a->flags);
 627
 628			esas2r_log_dev(ESAS2R_LOG_INFO,
 629				       &(a->host->shost_gendev),
 630				       "scsi_remove_host() called");
 631
 632			scsi_remove_host(a->host);
 633
 634			esas2r_log_dev(ESAS2R_LOG_INFO,
 635				       &(a->host->shost_gendev),
 636				       "scsi_host_put() called");
 637
 638			scsi_host_put(a->host);
 639		}
 640	}
 641}
 642
 643static int __maybe_unused esas2r_suspend(struct device *dev)
 644{
 645	struct Scsi_Host *host = dev_get_drvdata(dev);
 646	struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata;
 647
 648	esas2r_log_dev(ESAS2R_LOG_INFO, dev, "suspending adapter()");
 649	if (!a)
 650		return -ENODEV;
 651
 652	esas2r_adapter_power_down(a, 1);
 653	esas2r_log_dev(ESAS2R_LOG_INFO, dev, "esas2r_suspend(): 0");
 654	return 0;
 655}
 656
 657static int __maybe_unused esas2r_resume(struct device *dev)
 658{
 659	struct Scsi_Host *host = dev_get_drvdata(dev);
 660	struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata;
 661	int rez = 0;
 662
 663	esas2r_log_dev(ESAS2R_LOG_INFO, dev, "resuming adapter()");
 664
 665	if (!a) {
 666		rez = -ENODEV;
 667		goto error_exit;
 668	}
 669
 670	if (esas2r_map_regions(a) != 0) {
 671		esas2r_log(ESAS2R_LOG_CRIT, "could not re-map PCI regions!");
 672		rez = -ENOMEM;
 673		goto error_exit;
 674	}
 675
 676	/* Set up interupt mode */
 677	esas2r_setup_interrupts(a, a->intr_mode);
 678
 679	/*
 680	 * Disable chip interrupts to prevent spurious interrupts until we
 681	 * claim the IRQ.
 682	 */
 683	esas2r_disable_chip_interrupts(a);
 684	if (!esas2r_power_up(a, true)) {
 685		esas2r_debug("yikes, esas2r_power_up failed");
 686		rez = -ENOMEM;
 687		goto error_exit;
 688	}
 689
 690	esas2r_claim_interrupts(a);
 691
 692	if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) {
 693		/*
 694		 * Now that system interrupt(s) are claimed, we can enable
 695		 * chip interrupts.
 696		 */
 697		esas2r_enable_chip_interrupts(a);
 698		esas2r_kickoff_timer(a);
 699	} else {
 700		esas2r_debug("yikes, unable to claim IRQ");
 701		esas2r_log(ESAS2R_LOG_CRIT, "could not re-claim IRQ!");
 702		rez = -ENOMEM;
 703		goto error_exit;
 704	}
 705
 706error_exit:
 707	esas2r_log_dev(ESAS2R_LOG_CRIT, dev, "esas2r_resume(): %d",
 708		       rez);
 709	return rez;
 710}
 711
 712SIMPLE_DEV_PM_OPS(esas2r_pm_ops, esas2r_suspend, esas2r_resume);
 713
 714bool esas2r_set_degraded_mode(struct esas2r_adapter *a, char *error_str)
 715{
 716	set_bit(AF_DEGRADED_MODE, &a->flags);
 717	esas2r_log(ESAS2R_LOG_CRIT,
 718		   "setting adapter to degraded mode: %s\n", error_str);
 719	return false;
 720}
 721
 722u32 esas2r_get_uncached_size(struct esas2r_adapter *a)
 723{
 724	return sizeof(struct esas2r_sas_nvram)
 725	       + ALIGN(ESAS2R_DISC_BUF_LEN, 8)
 726	       + ALIGN(sizeof(u32), 8) /* outbound list copy pointer */
 727	       + 8
 728	       + (num_sg_lists * (u16)sgl_page_size)
 729	       + ALIGN((num_requests + num_ae_requests + 1 +
 730			ESAS2R_LIST_EXTRA) *
 731		       sizeof(struct esas2r_inbound_list_source_entry),
 732		       8)
 733	       + ALIGN((num_requests + num_ae_requests + 1 +
 734			ESAS2R_LIST_EXTRA) *
 735		       sizeof(struct atto_vda_ob_rsp), 8)
 736	       + 256; /* VDA request and buffer align */
 737}
 738
 739static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a)
 740{
 741	if (pci_is_pcie(a->pcid)) {
 742		u16 devcontrol;
 743
 744		pcie_capability_read_word(a->pcid, PCI_EXP_DEVCTL, &devcontrol);
 745
 746		if ((devcontrol & PCI_EXP_DEVCTL_READRQ) >
 747		     PCI_EXP_DEVCTL_READRQ_512B) {
 748			esas2r_log(ESAS2R_LOG_INFO,
 749				   "max read request size > 512B");
 750
 751			devcontrol &= ~PCI_EXP_DEVCTL_READRQ;
 752			devcontrol |= PCI_EXP_DEVCTL_READRQ_512B;
 753			pcie_capability_write_word(a->pcid, PCI_EXP_DEVCTL,
 754						   devcontrol);
 755		}
 756	}
 757}
 758
 759/*
 760 * Determine the organization of the uncached data area and
 761 * finish initializing the adapter structure
 762 */
 763bool esas2r_init_adapter_struct(struct esas2r_adapter *a,
 764				void **uncached_area)
 765{
 766	u32 i;
 767	u8 *high;
 768	struct esas2r_inbound_list_source_entry *element;
 769	struct esas2r_request *rq;
 770	struct esas2r_mem_desc *sgl;
 771
 772	spin_lock_init(&a->sg_list_lock);
 773	spin_lock_init(&a->mem_lock);
 774	spin_lock_init(&a->queue_lock);
 775
 776	a->targetdb_end = &a->targetdb[ESAS2R_MAX_TARGETS];
 777
 778	if (!alloc_vda_req(a, &a->general_req)) {
 779		esas2r_hdebug(
 780			"failed to allocate a VDA request for the general req!");
 781		return false;
 782	}
 783
 784	/* allocate requests for asynchronous events */
 785	a->first_ae_req =
 786		kcalloc(num_ae_requests, sizeof(struct esas2r_request),
 787			GFP_KERNEL);
 788
 789	if (a->first_ae_req == NULL) {
 790		esas2r_log(ESAS2R_LOG_CRIT,
 791			   "failed to allocate memory for asynchronous events");
 792		return false;
 793	}
 794
 795	/* allocate the S/G list memory descriptors */
 796	a->sg_list_mds = kcalloc(num_sg_lists, sizeof(struct esas2r_mem_desc),
 797				 GFP_KERNEL);
 798
 799	if (a->sg_list_mds == NULL) {
 800		esas2r_log(ESAS2R_LOG_CRIT,
 801			   "failed to allocate memory for s/g list descriptors");
 802		return false;
 803	}
 804
 805	/* allocate the request table */
 806	a->req_table =
 807		kcalloc(num_requests + num_ae_requests + 1,
 808			sizeof(struct esas2r_request *),
 809			GFP_KERNEL);
 810
 811	if (a->req_table == NULL) {
 812		esas2r_log(ESAS2R_LOG_CRIT,
 813			   "failed to allocate memory for the request table");
 814		return false;
 815	}
 816
 817	/* initialize PCI configuration space */
 818	esas2r_init_pci_cfg_space(a);
 819
 820	/*
 821	 * the thunder_stream boards all have a serial flash part that has a
 822	 * different base address on the AHB bus.
 823	 */
 824	if ((a->pcid->subsystem_vendor == ATTO_VENDOR_ID)
 825	    && (a->pcid->subsystem_device & ATTO_SSDID_TBT))
 826		a->flags2 |= AF2_THUNDERBOLT;
 827
 828	if (test_bit(AF2_THUNDERBOLT, &a->flags2))
 829		a->flags2 |= AF2_SERIAL_FLASH;
 830
 831	if (a->pcid->subsystem_device == ATTO_TLSH_1068)
 832		a->flags2 |= AF2_THUNDERLINK;
 833
 834	/* Uncached Area */
 835	high = (u8 *)*uncached_area;
 836
 837	/* initialize the scatter/gather table pages */
 838
 839	for (i = 0, sgl = a->sg_list_mds; i < num_sg_lists; i++, sgl++) {
 840		sgl->size = sgl_page_size;
 841
 842		list_add_tail(&sgl->next_desc, &a->free_sg_list_head);
 843
 844		if (!esas2r_initmem_alloc(a, sgl, ESAS2R_SGL_ALIGN)) {
 845			/* Allow the driver to load if the minimum count met. */
 846			if (i < NUM_SGL_MIN)
 847				return false;
 848			break;
 849		}
 850	}
 851
 852	/* compute the size of the lists */
 853	a->list_size = num_requests + ESAS2R_LIST_EXTRA;
 854
 855	/* allocate the inbound list */
 856	a->inbound_list_md.size = a->list_size *
 857				  sizeof(struct
 858					 esas2r_inbound_list_source_entry);
 859
 860	if (!esas2r_initmem_alloc(a, &a->inbound_list_md, ESAS2R_LIST_ALIGN)) {
 861		esas2r_hdebug("failed to allocate IB list");
 862		return false;
 863	}
 864
 865	/* allocate the outbound list */
 866	a->outbound_list_md.size = a->list_size *
 867				   sizeof(struct atto_vda_ob_rsp);
 868
 869	if (!esas2r_initmem_alloc(a, &a->outbound_list_md,
 870				  ESAS2R_LIST_ALIGN)) {
 871		esas2r_hdebug("failed to allocate IB list");
 872		return false;
 873	}
 874
 875	/* allocate the NVRAM structure */
 876	a->nvram = (struct esas2r_sas_nvram *)high;
 877	high += sizeof(struct esas2r_sas_nvram);
 878
 879	/* allocate the discovery buffer */
 880	a->disc_buffer = high;
 881	high += ESAS2R_DISC_BUF_LEN;
 882	high = PTR_ALIGN(high, 8);
 883
 884	/* allocate the outbound list copy pointer */
 885	a->outbound_copy = (u32 volatile *)high;
 886	high += sizeof(u32);
 887
 888	if (!test_bit(AF_NVR_VALID, &a->flags))
 889		esas2r_nvram_set_defaults(a);
 890
 891	/* update the caller's uncached memory area pointer */
 892	*uncached_area = (void *)high;
 893
 894	/* initialize the allocated memory */
 895	if (test_bit(AF_FIRST_INIT, &a->flags)) {
 896		esas2r_targ_db_initialize(a);
 897
 898		/* prime parts of the inbound list */
 899		element =
 900			(struct esas2r_inbound_list_source_entry *)a->
 901			inbound_list_md.
 902			virt_addr;
 903
 904		for (i = 0; i < a->list_size; i++) {
 905			element->address = 0;
 906			element->reserved = 0;
 907			element->length = cpu_to_le32(HWILSE_INTERFACE_F0
 908						      | (sizeof(union
 909								atto_vda_req)
 910							 /
 911							 sizeof(u32)));
 912			element++;
 913		}
 914
 915		/* init the AE requests */
 916		for (rq = a->first_ae_req, i = 0; i < num_ae_requests; rq++,
 917		     i++) {
 918			INIT_LIST_HEAD(&rq->req_list);
 919			if (!alloc_vda_req(a, rq)) {
 920				esas2r_hdebug(
 921					"failed to allocate a VDA request!");
 922				return false;
 923			}
 924
 925			esas2r_rq_init_request(rq, a);
 926
 927			/* override the completion function */
 928			rq->comp_cb = esas2r_ae_complete;
 929		}
 930	}
 931
 932	return true;
 933}
 934
 935/* This code will verify that the chip is operational. */
 936bool esas2r_check_adapter(struct esas2r_adapter *a)
 937{
 938	u32 starttime;
 939	u32 doorbell;
 940	u64 ppaddr;
 941	u32 dw;
 942
 943	/*
 944	 * if the chip reset detected flag is set, we can bypass a bunch of
 945	 * stuff.
 946	 */
 947	if (test_bit(AF_CHPRST_DETECTED, &a->flags))
 948		goto skip_chip_reset;
 949
 950	/*
 951	 * BEFORE WE DO ANYTHING, disable the chip interrupts!  the boot driver
 952	 * may have left them enabled or we may be recovering from a fault.
 953	 */
 954	esas2r_write_register_dword(a, MU_INT_MASK_OUT, ESAS2R_INT_DIS_MASK);
 955	esas2r_flush_register_dword(a, MU_INT_MASK_OUT);
 956
 957	/*
 958	 * wait for the firmware to become ready by forcing an interrupt and
 959	 * waiting for a response.
 960	 */
 961	starttime = jiffies_to_msecs(jiffies);
 962
 963	while (true) {
 964		esas2r_force_interrupt(a);
 965		doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
 966		if (doorbell == 0xFFFFFFFF) {
 967			/*
 968			 * Give the firmware up to two seconds to enable
 969			 * register access after a reset.
 970			 */
 971			if ((jiffies_to_msecs(jiffies) - starttime) > 2000)
 972				return esas2r_set_degraded_mode(a,
 973								"unable to access registers");
 974		} else if (doorbell & DRBL_FORCE_INT) {
 975			u32 ver = (doorbell & DRBL_FW_VER_MSK);
 976
 977			/*
 978			 * This driver supports version 0 and version 1 of
 979			 * the API
 980			 */
 981			esas2r_write_register_dword(a, MU_DOORBELL_OUT,
 982						    doorbell);
 983
 984			if (ver == DRBL_FW_VER_0) {
 985				set_bit(AF_LEGACY_SGE_MODE, &a->flags);
 986
 987				a->max_vdareq_size = 128;
 988				a->build_sgl = esas2r_build_sg_list_sge;
 989			} else if (ver == DRBL_FW_VER_1) {
 990				clear_bit(AF_LEGACY_SGE_MODE, &a->flags);
 991
 992				a->max_vdareq_size = 1024;
 993				a->build_sgl = esas2r_build_sg_list_prd;
 994			} else {
 995				return esas2r_set_degraded_mode(a,
 996								"unknown firmware version");
 997			}
 998			break;
 999		}
1000
1001		schedule_timeout_interruptible(msecs_to_jiffies(100));
1002
1003		if ((jiffies_to_msecs(jiffies) - starttime) > 180000) {
1004			esas2r_hdebug("FW ready TMO");
1005			esas2r_bugon();
1006
1007			return esas2r_set_degraded_mode(a,
1008							"firmware start has timed out");
1009		}
1010	}
1011
1012	/* purge any asynchronous events since we will repost them later */
1013	esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_DOWN);
1014	starttime = jiffies_to_msecs(jiffies);
1015
1016	while (true) {
1017		doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1018		if (doorbell & DRBL_MSG_IFC_DOWN) {
1019			esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1020						    doorbell);
1021			break;
1022		}
1023
1024		schedule_timeout_interruptible(msecs_to_jiffies(50));
1025
1026		if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1027			esas2r_hdebug("timeout waiting for interface down");
1028			break;
1029		}
1030	}
1031skip_chip_reset:
1032	/*
1033	 * first things first, before we go changing any of these registers
1034	 * disable the communication lists.
1035	 */
1036	dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG);
1037	dw &= ~MU_ILC_ENABLE;
1038	esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw);
1039	dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG);
1040	dw &= ~MU_OLC_ENABLE;
1041	esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw);
1042
1043	/* configure the communication list addresses */
1044	ppaddr = a->inbound_list_md.phys_addr;
1045	esas2r_write_register_dword(a, MU_IN_LIST_ADDR_LO,
1046				    lower_32_bits(ppaddr));
1047	esas2r_write_register_dword(a, MU_IN_LIST_ADDR_HI,
1048				    upper_32_bits(ppaddr));
1049	ppaddr = a->outbound_list_md.phys_addr;
1050	esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_LO,
1051				    lower_32_bits(ppaddr));
1052	esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_HI,
1053				    upper_32_bits(ppaddr));
1054	ppaddr = a->uncached_phys +
1055		 ((u8 *)a->outbound_copy - a->uncached);
1056	esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_LO,
1057				    lower_32_bits(ppaddr));
1058	esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_HI,
1059				    upper_32_bits(ppaddr));
1060
1061	/* reset the read and write pointers */
1062	*a->outbound_copy =
1063		a->last_write =
1064			a->last_read = a->list_size - 1;
1065	set_bit(AF_COMM_LIST_TOGGLE, &a->flags);
1066	esas2r_write_register_dword(a, MU_IN_LIST_WRITE, MU_ILW_TOGGLE |
1067				    a->last_write);
1068	esas2r_write_register_dword(a, MU_OUT_LIST_COPY, MU_OLC_TOGGLE |
1069				    a->last_write);
1070	esas2r_write_register_dword(a, MU_IN_LIST_READ, MU_ILR_TOGGLE |
1071				    a->last_write);
1072	esas2r_write_register_dword(a, MU_OUT_LIST_WRITE,
1073				    MU_OLW_TOGGLE | a->last_write);
1074
1075	/* configure the interface select fields */
1076	dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG);
1077	dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST);
1078	esas2r_write_register_dword(a, MU_IN_LIST_IFC_CONFIG,
1079				    (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR));
1080	dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG);
1081	dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE);
1082	esas2r_write_register_dword(a, MU_OUT_LIST_IFC_CONFIG,
1083				    (dw | MU_OLIC_LIST_F0 |
1084				     MU_OLIC_SOURCE_DDR));
1085
1086	/* finish configuring the communication lists */
1087	dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG);
1088	dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK);
1089	dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC
1090	      | (a->list_size << MU_ILC_NUMBER_SHIFT);
1091	esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw);
1092	dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG);
1093	dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK);
1094	dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT);
1095	esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw);
1096
1097	/*
1098	 * notify the firmware that we're done setting up the communication
1099	 * list registers.  wait here until the firmware is done configuring
1100	 * its lists.  it will signal that it is done by enabling the lists.
1101	 */
1102	esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_INIT);
1103	starttime = jiffies_to_msecs(jiffies);
1104
1105	while (true) {
1106		doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1107		if (doorbell & DRBL_MSG_IFC_INIT) {
1108			esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1109						    doorbell);
1110			break;
1111		}
1112
1113		schedule_timeout_interruptible(msecs_to_jiffies(100));
1114
1115		if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1116			esas2r_hdebug(
1117				"timeout waiting for communication list init");
1118			esas2r_bugon();
1119			return esas2r_set_degraded_mode(a,
1120							"timeout waiting for communication list init");
1121		}
1122	}
1123
1124	/*
1125	 * flag whether the firmware supports the power down doorbell.  we
1126	 * determine this by reading the inbound doorbell enable mask.
1127	 */
1128	doorbell = esas2r_read_register_dword(a, MU_DOORBELL_IN_ENB);
1129	if (doorbell & DRBL_POWER_DOWN)
1130		set_bit(AF2_VDA_POWER_DOWN, &a->flags2);
1131	else
1132		clear_bit(AF2_VDA_POWER_DOWN, &a->flags2);
1133
1134	/*
1135	 * enable assertion of outbound queue and doorbell interrupts in the
1136	 * main interrupt cause register.
1137	 */
1138	esas2r_write_register_dword(a, MU_OUT_LIST_INT_MASK, MU_OLIS_MASK);
1139	esas2r_write_register_dword(a, MU_DOORBELL_OUT_ENB, DRBL_ENB_MASK);
1140	return true;
1141}
1142
1143/* Process the initialization message just completed and format the next one. */
1144static bool esas2r_format_init_msg(struct esas2r_adapter *a,
1145				   struct esas2r_request *rq)
1146{
1147	u32 msg = a->init_msg;
1148	struct atto_vda_cfg_init *ci;
1149
1150	a->init_msg = 0;
1151
1152	switch (msg) {
1153	case ESAS2R_INIT_MSG_START:
1154	case ESAS2R_INIT_MSG_REINIT:
1155	{
1156		esas2r_hdebug("CFG init");
1157		esas2r_build_cfg_req(a,
1158				     rq,
1159				     VDA_CFG_INIT,
1160				     0,
1161				     NULL);
1162		ci = (struct atto_vda_cfg_init *)&rq->vrq->cfg.data.init;
1163		ci->sgl_page_size = cpu_to_le32(sgl_page_size);
1164		/* firmware interface overflows in y2106 */
1165		ci->epoch_time = cpu_to_le32(ktime_get_real_seconds());
1166		rq->flags |= RF_FAILURE_OK;
1167		a->init_msg = ESAS2R_INIT_MSG_INIT;
1168		break;
1169	}
1170
1171	case ESAS2R_INIT_MSG_INIT:
1172		if (rq->req_stat == RS_SUCCESS) {
1173			u32 major;
1174			u32 minor;
1175			u16 fw_release;
1176
1177			a->fw_version = le16_to_cpu(
1178				rq->func_rsp.cfg_rsp.vda_version);
1179			a->fw_build = rq->func_rsp.cfg_rsp.fw_build;
1180			fw_release = le16_to_cpu(
1181				rq->func_rsp.cfg_rsp.fw_release);
1182			major = LOBYTE(fw_release);
1183			minor = HIBYTE(fw_release);
1184			a->fw_version += (major << 16) + (minor << 24);
1185		} else {
1186			esas2r_hdebug("FAILED");
1187		}
1188
1189		/*
1190		 * the 2.71 and earlier releases of R6xx firmware did not error
1191		 * unsupported config requests correctly.
1192		 */
1193
1194		if ((test_bit(AF2_THUNDERBOLT, &a->flags2))
1195		    || (be32_to_cpu(a->fw_version) > 0x00524702)) {
1196			esas2r_hdebug("CFG get init");
1197			esas2r_build_cfg_req(a,
1198					     rq,
1199					     VDA_CFG_GET_INIT2,
1200					     sizeof(struct atto_vda_cfg_init),
1201					     NULL);
1202
1203			rq->vrq->cfg.sg_list_offset = offsetof(
1204				struct atto_vda_cfg_req,
1205				data.sge);
1206			rq->vrq->cfg.data.prde.ctl_len =
1207				cpu_to_le32(sizeof(struct atto_vda_cfg_init));
1208			rq->vrq->cfg.data.prde.address = cpu_to_le64(
1209				rq->vrq_md->phys_addr +
1210				sizeof(union atto_vda_req));
1211			rq->flags |= RF_FAILURE_OK;
1212			a->init_msg = ESAS2R_INIT_MSG_GET_INIT;
1213			break;
1214		}
1215		fallthrough;
1216
1217	case ESAS2R_INIT_MSG_GET_INIT:
1218		if (msg == ESAS2R_INIT_MSG_GET_INIT) {
1219			ci = (struct atto_vda_cfg_init *)rq->data_buf;
1220			if (rq->req_stat == RS_SUCCESS) {
1221				a->num_targets_backend =
1222					le32_to_cpu(ci->num_targets_backend);
1223				a->ioctl_tunnel =
1224					le32_to_cpu(ci->ioctl_tunnel);
1225			} else {
1226				esas2r_hdebug("FAILED");
1227			}
1228		}
1229		fallthrough;
1230
1231	default:
1232		rq->req_stat = RS_SUCCESS;
1233		return false;
1234	}
1235	return true;
1236}
1237
1238/*
1239 * Perform initialization messages via the request queue.  Messages are
1240 * performed with interrupts disabled.
1241 */
1242bool esas2r_init_msgs(struct esas2r_adapter *a)
1243{
1244	bool success = true;
1245	struct esas2r_request *rq = &a->general_req;
1246
1247	esas2r_rq_init_request(rq, a);
1248	rq->comp_cb = esas2r_dummy_complete;
1249
1250	if (a->init_msg == 0)
1251		a->init_msg = ESAS2R_INIT_MSG_REINIT;
1252
1253	while (a->init_msg) {
1254		if (esas2r_format_init_msg(a, rq)) {
1255			unsigned long flags;
1256			while (true) {
1257				spin_lock_irqsave(&a->queue_lock, flags);
1258				esas2r_start_vda_request(a, rq);
1259				spin_unlock_irqrestore(&a->queue_lock, flags);
1260				esas2r_wait_request(a, rq);
1261				if (rq->req_stat != RS_PENDING)
1262					break;
1263			}
1264		}
1265
1266		if (rq->req_stat == RS_SUCCESS
1267		    || ((rq->flags & RF_FAILURE_OK)
1268			&& rq->req_stat != RS_TIMEOUT))
1269			continue;
1270
1271		esas2r_log(ESAS2R_LOG_CRIT, "init message %x failed (%x, %x)",
1272			   a->init_msg, rq->req_stat, rq->flags);
1273		a->init_msg = ESAS2R_INIT_MSG_START;
1274		success = false;
1275		break;
1276	}
1277
1278	esas2r_rq_destroy_request(rq, a);
1279	return success;
1280}
1281
1282/* Initialize the adapter chip */
1283bool esas2r_init_adapter_hw(struct esas2r_adapter *a, bool init_poll)
1284{
1285	bool rslt = false;
1286	struct esas2r_request *rq;
1287	u32 i;
1288
1289	if (test_bit(AF_DEGRADED_MODE, &a->flags))
1290		goto exit;
1291
1292	if (!test_bit(AF_NVR_VALID, &a->flags)) {
1293		if (!esas2r_nvram_read_direct(a))
1294			esas2r_log(ESAS2R_LOG_WARN,
1295				   "invalid/missing NVRAM parameters");
1296	}
1297
1298	if (!esas2r_init_msgs(a)) {
1299		esas2r_set_degraded_mode(a, "init messages failed");
1300		goto exit;
1301	}
1302
1303	/* The firmware is ready. */
1304	clear_bit(AF_DEGRADED_MODE, &a->flags);
1305	clear_bit(AF_CHPRST_PENDING, &a->flags);
1306
1307	/* Post all the async event requests */
1308	for (i = 0, rq = a->first_ae_req; i < num_ae_requests; i++, rq++)
1309		esas2r_start_ae_request(a, rq);
1310
1311	if (!a->flash_rev[0])
1312		esas2r_read_flash_rev(a);
1313
1314	if (!a->image_type[0])
1315		esas2r_read_image_type(a);
1316
1317	if (a->fw_version == 0)
1318		a->fw_rev[0] = 0;
1319	else
1320		sprintf(a->fw_rev, "%1d.%02d",
1321			(int)LOBYTE(HIWORD(a->fw_version)),
1322			(int)HIBYTE(HIWORD(a->fw_version)));
1323
1324	esas2r_hdebug("firmware revision: %s", a->fw_rev);
1325
1326	if (test_bit(AF_CHPRST_DETECTED, &a->flags)
1327	    && (test_bit(AF_FIRST_INIT, &a->flags))) {
1328		esas2r_enable_chip_interrupts(a);
1329		return true;
1330	}
1331
1332	/* initialize discovery */
1333	esas2r_disc_initialize(a);
1334
1335	/*
1336	 * wait for the device wait time to expire here if requested.  this is
1337	 * usually requested during initial driver load and possibly when
1338	 * resuming from a low power state.  deferred device waiting will use
1339	 * interrupts.  chip reset recovery always defers device waiting to
1340	 * avoid being in a TASKLET too long.
1341	 */
1342	if (init_poll) {
1343		u32 currtime = a->disc_start_time;
1344		u32 nexttick = 100;
1345		u32 deltatime;
1346
1347		/*
1348		 * Block Tasklets from getting scheduled and indicate this is
1349		 * polled discovery.
1350		 */
1351		set_bit(AF_TASKLET_SCHEDULED, &a->flags);
1352		set_bit(AF_DISC_POLLED, &a->flags);
1353
1354		/*
1355		 * Temporarily bring the disable count to zero to enable
1356		 * deferred processing.  Note that the count is already zero
1357		 * after the first initialization.
1358		 */
1359		if (test_bit(AF_FIRST_INIT, &a->flags))
1360			atomic_dec(&a->disable_cnt);
1361
1362		while (test_bit(AF_DISC_PENDING, &a->flags)) {
1363			schedule_timeout_interruptible(msecs_to_jiffies(100));
1364
1365			/*
1366			 * Determine the need for a timer tick based on the
1367			 * delta time between this and the last iteration of
1368			 * this loop.  We don't use the absolute time because
1369			 * then we would have to worry about when nexttick
1370			 * wraps and currtime hasn't yet.
1371			 */
1372			deltatime = jiffies_to_msecs(jiffies) - currtime;
1373			currtime += deltatime;
1374
1375			/*
1376			 * Process any waiting discovery as long as the chip is
1377			 * up.  If a chip reset happens during initial polling,
1378			 * we have to make sure the timer tick processes the
1379			 * doorbell indicating the firmware is ready.
1380			 */
1381			if (!test_bit(AF_CHPRST_PENDING, &a->flags))
1382				esas2r_disc_check_for_work(a);
1383
1384			/* Simulate a timer tick. */
1385			if (nexttick <= deltatime) {
1386
1387				/* Time for a timer tick */
1388				nexttick += 100;
1389				esas2r_timer_tick(a);
1390			}
1391
1392			if (nexttick > deltatime)
1393				nexttick -= deltatime;
1394
1395			/* Do any deferred processing */
1396			if (esas2r_is_tasklet_pending(a))
1397				esas2r_do_tasklet_tasks(a);
1398
1399		}
1400
1401		if (test_bit(AF_FIRST_INIT, &a->flags))
1402			atomic_inc(&a->disable_cnt);
1403
1404		clear_bit(AF_DISC_POLLED, &a->flags);
1405		clear_bit(AF_TASKLET_SCHEDULED, &a->flags);
1406	}
1407
1408
1409	esas2r_targ_db_report_changes(a);
1410
1411	/*
1412	 * For cases where (a) the initialization messages processing may
1413	 * handle an interrupt for a port event and a discovery is waiting, but
1414	 * we are not waiting for devices, or (b) the device wait time has been
1415	 * exhausted but there is still discovery pending, start any leftover
1416	 * discovery in interrupt driven mode.
1417	 */
1418	esas2r_disc_start_waiting(a);
1419
1420	/* Enable chip interrupts */
1421	a->int_mask = ESAS2R_INT_STS_MASK;
1422	esas2r_enable_chip_interrupts(a);
1423	esas2r_enable_heartbeat(a);
1424	rslt = true;
1425
1426exit:
1427	/*
1428	 * Regardless of whether initialization was successful, certain things
1429	 * need to get done before we exit.
1430	 */
1431
1432	if (test_bit(AF_CHPRST_DETECTED, &a->flags) &&
1433	    test_bit(AF_FIRST_INIT, &a->flags)) {
1434		/*
1435		 * Reinitialization was performed during the first
1436		 * initialization.  Only clear the chip reset flag so the
1437		 * original device polling is not cancelled.
1438		 */
1439		if (!rslt)
1440			clear_bit(AF_CHPRST_PENDING, &a->flags);
1441	} else {
1442		/* First initialization or a subsequent re-init is complete. */
1443		if (!rslt) {
1444			clear_bit(AF_CHPRST_PENDING, &a->flags);
1445			clear_bit(AF_DISC_PENDING, &a->flags);
1446		}
1447
1448
1449		/* Enable deferred processing after the first initialization. */
1450		if (test_bit(AF_FIRST_INIT, &a->flags)) {
1451			clear_bit(AF_FIRST_INIT, &a->flags);
1452
1453			if (atomic_dec_return(&a->disable_cnt) == 0)
1454				esas2r_do_deferred_processes(a);
1455		}
1456	}
1457
1458	return rslt;
1459}
1460
1461void esas2r_reset_adapter(struct esas2r_adapter *a)
1462{
1463	set_bit(AF_OS_RESET, &a->flags);
1464	esas2r_local_reset_adapter(a);
1465	esas2r_schedule_tasklet(a);
1466}
1467
1468void esas2r_reset_chip(struct esas2r_adapter *a)
1469{
1470	if (!esas2r_is_adapter_present(a))
1471		return;
1472
1473	/*
1474	 * Before we reset the chip, save off the VDA core dump.  The VDA core
1475	 * dump is located in the upper 512KB of the onchip SRAM.  Make sure
1476	 * to not overwrite a previous crash that was saved.
1477	 */
1478	if (test_bit(AF2_COREDUMP_AVAIL, &a->flags2) &&
1479	    !test_bit(AF2_COREDUMP_SAVED, &a->flags2)) {
1480		esas2r_read_mem_block(a,
1481				      a->fw_coredump_buff,
1482				      MW_DATA_ADDR_SRAM + 0x80000,
1483				      ESAS2R_FWCOREDUMP_SZ);
1484
1485		set_bit(AF2_COREDUMP_SAVED, &a->flags2);
1486	}
1487
1488	clear_bit(AF2_COREDUMP_AVAIL, &a->flags2);
1489
1490	/* Reset the chip */
1491	if (a->pcid->revision == MVR_FREY_B2)
1492		esas2r_write_register_dword(a, MU_CTL_STATUS_IN_B2,
1493					    MU_CTL_IN_FULL_RST2);
1494	else
1495		esas2r_write_register_dword(a, MU_CTL_STATUS_IN,
1496					    MU_CTL_IN_FULL_RST);
1497
1498
1499	/* Stall a little while to let the reset condition clear */
1500	mdelay(10);
1501}
1502
1503static void esas2r_power_down_notify_firmware(struct esas2r_adapter *a)
1504{
1505	u32 starttime;
1506	u32 doorbell;
1507
1508	esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_POWER_DOWN);
1509	starttime = jiffies_to_msecs(jiffies);
1510
1511	while (true) {
1512		doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1513		if (doorbell & DRBL_POWER_DOWN) {
1514			esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1515						    doorbell);
1516			break;
1517		}
1518
1519		schedule_timeout_interruptible(msecs_to_jiffies(100));
1520
1521		if ((jiffies_to_msecs(jiffies) - starttime) > 30000) {
1522			esas2r_hdebug("Timeout waiting for power down");
1523			break;
1524		}
1525	}
1526}
1527
1528/*
1529 * Perform power management processing including managing device states, adapter
1530 * states, interrupts, and I/O.
1531 */
1532void esas2r_power_down(struct esas2r_adapter *a)
1533{
1534	set_bit(AF_POWER_MGT, &a->flags);
1535	set_bit(AF_POWER_DOWN, &a->flags);
1536
1537	if (!test_bit(AF_DEGRADED_MODE, &a->flags)) {
1538		u32 starttime;
1539		u32 doorbell;
1540
1541		/*
1542		 * We are currently running OK and will be reinitializing later.
1543		 * increment the disable count to coordinate with
1544		 * esas2r_init_adapter.  We don't have to do this in degraded
1545		 * mode since we never enabled interrupts in the first place.
1546		 */
1547		esas2r_disable_chip_interrupts(a);
1548		esas2r_disable_heartbeat(a);
1549
1550		/* wait for any VDA activity to clear before continuing */
1551		esas2r_write_register_dword(a, MU_DOORBELL_IN,
1552					    DRBL_MSG_IFC_DOWN);
1553		starttime = jiffies_to_msecs(jiffies);
1554
1555		while (true) {
1556			doorbell =
1557				esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1558			if (doorbell & DRBL_MSG_IFC_DOWN) {
1559				esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1560							    doorbell);
1561				break;
1562			}
1563
1564			schedule_timeout_interruptible(msecs_to_jiffies(100));
1565
1566			if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1567				esas2r_hdebug(
1568					"timeout waiting for interface down");
1569				break;
1570			}
1571		}
1572
1573		/*
1574		 * For versions of firmware that support it tell them the driver
1575		 * is powering down.
1576		 */
1577		if (test_bit(AF2_VDA_POWER_DOWN, &a->flags2))
1578			esas2r_power_down_notify_firmware(a);
1579	}
1580
1581	/* Suspend I/O processing. */
1582	set_bit(AF_OS_RESET, &a->flags);
1583	set_bit(AF_DISC_PENDING, &a->flags);
1584	set_bit(AF_CHPRST_PENDING, &a->flags);
1585
1586	esas2r_process_adapter_reset(a);
1587
1588	/* Remove devices now that I/O is cleaned up. */
1589	a->prev_dev_cnt = esas2r_targ_db_get_tgt_cnt(a);
1590	esas2r_targ_db_remove_all(a, false);
1591}
1592
1593/*
1594 * Perform power management processing including managing device states, adapter
1595 * states, interrupts, and I/O.
1596 */
1597bool esas2r_power_up(struct esas2r_adapter *a, bool init_poll)
1598{
1599	bool ret;
1600
1601	clear_bit(AF_POWER_DOWN, &a->flags);
1602	esas2r_init_pci_cfg_space(a);
1603	set_bit(AF_FIRST_INIT, &a->flags);
1604	atomic_inc(&a->disable_cnt);
1605
1606	/* reinitialize the adapter */
1607	ret = esas2r_check_adapter(a);
1608	if (!esas2r_init_adapter_hw(a, init_poll))
1609		ret = false;
1610
1611	/* send the reset asynchronous event */
1612	esas2r_send_reset_ae(a, true);
1613
1614	/* clear this flag after initialization. */
1615	clear_bit(AF_POWER_MGT, &a->flags);
1616	return ret;
1617}
1618
1619bool esas2r_is_adapter_present(struct esas2r_adapter *a)
1620{
1621	if (test_bit(AF_NOT_PRESENT, &a->flags))
1622		return false;
1623
1624	if (esas2r_read_register_dword(a, MU_DOORBELL_OUT) == 0xFFFFFFFF) {
1625		set_bit(AF_NOT_PRESENT, &a->flags);
1626
1627		return false;
1628	}
1629	return true;
1630}
1631
1632const char *esas2r_get_model_name(struct esas2r_adapter *a)
1633{
1634	switch (a->pcid->subsystem_device) {
1635	case ATTO_ESAS_R680:
1636		return "ATTO ExpressSAS R680";
1637
1638	case ATTO_ESAS_R608:
1639		return "ATTO ExpressSAS R608";
1640
1641	case ATTO_ESAS_R60F:
1642		return "ATTO ExpressSAS R60F";
1643
1644	case ATTO_ESAS_R6F0:
1645		return "ATTO ExpressSAS R6F0";
1646
1647	case ATTO_ESAS_R644:
1648		return "ATTO ExpressSAS R644";
1649
1650	case ATTO_ESAS_R648:
1651		return "ATTO ExpressSAS R648";
1652
1653	case ATTO_TSSC_3808:
1654		return "ATTO ThunderStream SC 3808D";
1655
1656	case ATTO_TSSC_3808E:
1657		return "ATTO ThunderStream SC 3808E";
1658
1659	case ATTO_TLSH_1068:
1660		return "ATTO ThunderLink SH 1068";
1661	}
1662
1663	return "ATTO SAS Controller";
1664}
1665
1666const char *esas2r_get_model_name_short(struct esas2r_adapter *a)
1667{
1668	switch (a->pcid->subsystem_device) {
1669	case ATTO_ESAS_R680:
1670		return "R680";
1671
1672	case ATTO_ESAS_R608:
1673		return "R608";
1674
1675	case ATTO_ESAS_R60F:
1676		return "R60F";
1677
1678	case ATTO_ESAS_R6F0:
1679		return "R6F0";
1680
1681	case ATTO_ESAS_R644:
1682		return "R644";
1683
1684	case ATTO_ESAS_R648:
1685		return "R648";
1686
1687	case ATTO_TSSC_3808:
1688		return "SC 3808D";
1689
1690	case ATTO_TSSC_3808E:
1691		return "SC 3808E";
1692
1693	case ATTO_TLSH_1068:
1694		return "SH 1068";
1695	}
1696
1697	return "unknown";
1698}