rtc-sa1100.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  4 *
  5 * Copyright (c) 2000 Nils Faerber
  6 *
  7 * Based on rtc.c by Paul Gortmaker
  8 *
  9 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
 10 *
 11 * Modifications from:
 12 *   CIH <cih@coventive.com>
 13 *   Nicolas Pitre <nico@fluxnic.net>
 14 *   Andrew Christian <andrew.christian@hp.com>
 15 *
 16 * Converted to the RTC subsystem and Driver Model
 17 *   by Richard Purdie <rpurdie@rpsys.net>
 18 */
 19
 20#include <linux/platform_device.h>
 21#include <linux/module.h>
 22#include <linux/clk.h>
 23#include <linux/rtc.h>
 24#include <linux/init.h>
 25#include <linux/fs.h>
 26#include <linux/interrupt.h>
 27#include <linux/slab.h>
 28#include <linux/string.h>
 29#include <linux/of.h>
 30#include <linux/pm.h>
 31#include <linux/bitops.h>
 32#include <linux/io.h>
 33
 34#define RTSR_HZE		BIT(3)	/* HZ interrupt enable */
 35#define RTSR_ALE		BIT(2)	/* RTC alarm interrupt enable */
 36#define RTSR_HZ			BIT(1)	/* HZ rising-edge detected */
 37#define RTSR_AL			BIT(0)	/* RTC alarm detected */
 38
 39#include "rtc-sa1100.h"
 40
 41#define RTC_DEF_DIVIDER		(32768 - 1)
 42#define RTC_DEF_TRIM		0
 43
 44static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
 45{
 46	struct sa1100_rtc *info = dev_get_drvdata(dev_id);
 47	struct rtc_device *rtc = info->rtc;
 48	unsigned int rtsr;
 49	unsigned long events = 0;
 50
 51	spin_lock(&info->lock);
 52
 53	rtsr = readl_relaxed(info->rtsr);
 54	/* clear interrupt sources */
 55	writel_relaxed(0, info->rtsr);
 56	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
 57	 * See also the comments in sa1100_rtc_probe(). */
 58	if (rtsr & (RTSR_ALE | RTSR_HZE)) {
 59		/* This is the original code, before there was the if test
 60		 * above. This code does not clear interrupts that were not
 61		 * enabled. */
 62		writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr);
 63	} else {
 64		/* For some reason, it is possible to enter this routine
 65		 * without interruptions enabled, it has been tested with
 66		 * several units (Bug in SA11xx chip?).
 67		 *
 68		 * This situation leads to an infinite "loop" of interrupt
 69		 * routine calling and as a result the processor seems to
 70		 * lock on its first call to open(). */
 71		writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
 72	}
 73
 74	/* clear alarm interrupt if it has occurred */
 75	if (rtsr & RTSR_AL)
 76		rtsr &= ~RTSR_ALE;
 77	writel_relaxed(rtsr & (RTSR_ALE | RTSR_HZE), info->rtsr);
 78
 79	/* update irq data & counter */
 80	if (rtsr & RTSR_AL)
 81		events |= RTC_AF | RTC_IRQF;
 82	if (rtsr & RTSR_HZ)
 83		events |= RTC_UF | RTC_IRQF;
 84
 85	rtc_update_irq(rtc, 1, events);
 86
 87	spin_unlock(&info->lock);
 88
 89	return IRQ_HANDLED;
 90}
 91
 92static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 93{
 94	u32 rtsr;
 95	struct sa1100_rtc *info = dev_get_drvdata(dev);
 96
 97	spin_lock_irq(&info->lock);
 98	rtsr = readl_relaxed(info->rtsr);
 99	if (enabled)
100		rtsr |= RTSR_ALE;
101	else
102		rtsr &= ~RTSR_ALE;
103	writel_relaxed(rtsr, info->rtsr);
104	spin_unlock_irq(&info->lock);
105	return 0;
106}
107
108static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
109{
110	struct sa1100_rtc *info = dev_get_drvdata(dev);
111
112	rtc_time64_to_tm(readl_relaxed(info->rcnr), tm);
113	return 0;
114}
115
116static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
117{
118	struct sa1100_rtc *info = dev_get_drvdata(dev);
119
120	writel_relaxed(rtc_tm_to_time64(tm), info->rcnr);
121
122	return 0;
123}
124
125static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
126{
127	u32	rtsr;
128	struct sa1100_rtc *info = dev_get_drvdata(dev);
129
130	rtsr = readl_relaxed(info->rtsr);
131	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
132	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
133	return 0;
134}
135
136static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
137{
138	struct sa1100_rtc *info = dev_get_drvdata(dev);
139
140	spin_lock_irq(&info->lock);
141	writel_relaxed(readl_relaxed(info->rtsr) &
142		(RTSR_HZE | RTSR_ALE | RTSR_AL), info->rtsr);
143	writel_relaxed(rtc_tm_to_time64(&alrm->time), info->rtar);
144	if (alrm->enabled)
145		writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr);
146	else
147		writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
148	spin_unlock_irq(&info->lock);
149
150	return 0;
151}
152
153static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
154{
155	struct sa1100_rtc *info = dev_get_drvdata(dev);
156
157	seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr));
158	seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
159
160	return 0;
161}
162
163static const struct rtc_class_ops sa1100_rtc_ops = {
164	.read_time = sa1100_rtc_read_time,
165	.set_time = sa1100_rtc_set_time,
166	.read_alarm = sa1100_rtc_read_alarm,
167	.set_alarm = sa1100_rtc_set_alarm,
168	.proc = sa1100_rtc_proc,
169	.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
170};
171
172int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info)
173{
174	int ret;
175
176	spin_lock_init(&info->lock);
177
178	info->clk = devm_clk_get(&pdev->dev, NULL);
179	if (IS_ERR(info->clk)) {
180		dev_err(&pdev->dev, "failed to find rtc clock source\n");
181		return PTR_ERR(info->clk);
182	}
183
184	ret = clk_prepare_enable(info->clk);
185	if (ret)
186		return ret;
187	/*
188	 * According to the manual we should be able to let RTTR be zero
189	 * and then a default diviser for a 32.768KHz clock is used.
190	 * Apparently this doesn't work, at least for my SA1110 rev 5.
191	 * If the clock divider is uninitialized then reset it to the
192	 * default value to get the 1Hz clock.
193	 */
194	if (readl_relaxed(info->rttr) == 0) {
195		writel_relaxed(RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16), info->rttr);
196		dev_warn(&pdev->dev, "warning: "
197			"initializing default clock divider/trim value\n");
198		/* The current RTC value probably doesn't make sense either */
199		writel_relaxed(0, info->rcnr);
200	}
201
202	info->rtc->ops = &sa1100_rtc_ops;
203	info->rtc->range_max = U32_MAX;
204
205	ret = devm_rtc_register_device(info->rtc);
206	if (ret) {
207		clk_disable_unprepare(info->clk);
208		return ret;
209	}
210
211	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
212	 * See also the comments in sa1100_rtc_interrupt().
213	 *
214	 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
215	 * interrupt pending, even though interrupts were never enabled.
216	 * In this case, this bit it must be reset before enabling
217	 * interruptions to avoid a nonexistent interrupt to occur.
218	 *
219	 * In principle, the same problem would apply to bit 0, although it has
220	 * never been observed to happen.
221	 *
222	 * This issue is addressed both here and in sa1100_rtc_interrupt().
223	 * If the issue is not addressed here, in the times when the processor
224	 * wakes up with the bit set there will be one spurious interrupt.
225	 *
226	 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
227	 * safe side, once the condition that lead to this strange
228	 * initialization is unknown and could in principle happen during
229	 * normal processing.
230	 *
231	 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
232	 * the corresponding bits in RTSR. */
233	writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
234
235	return 0;
236}
237EXPORT_SYMBOL_GPL(sa1100_rtc_init);
238
239static int sa1100_rtc_probe(struct platform_device *pdev)
240{
241	struct sa1100_rtc *info;
242	void __iomem *base;
243	int irq_1hz, irq_alarm;
244	int ret;
245
246	irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
247	irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
248	if (irq_1hz < 0 || irq_alarm < 0)
249		return -ENODEV;
250
251	info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
252	if (!info)
253		return -ENOMEM;
254	info->irq_1hz = irq_1hz;
255	info->irq_alarm = irq_alarm;
256
257	info->rtc = devm_rtc_allocate_device(&pdev->dev);
258	if (IS_ERR(info->rtc))
259		return PTR_ERR(info->rtc);
260
261	ret = devm_request_irq(&pdev->dev, irq_1hz, sa1100_rtc_interrupt, 0,
262			       "rtc 1Hz", &pdev->dev);
263	if (ret) {
264		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_1hz);
265		return ret;
266	}
267	ret = devm_request_irq(&pdev->dev, irq_alarm, sa1100_rtc_interrupt, 0,
268			       "rtc Alrm", &pdev->dev);
269	if (ret) {
270		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_alarm);
271		return ret;
272	}
273
274	base = devm_platform_ioremap_resource(pdev, 0);
275	if (IS_ERR(base))
276		return PTR_ERR(base);
277
278	if (IS_ENABLED(CONFIG_ARCH_SA1100) ||
279	    of_device_is_compatible(pdev->dev.of_node, "mrvl,sa1100-rtc")) {
280		info->rcnr = base + 0x04;
281		info->rtsr = base + 0x10;
282		info->rtar = base + 0x00;
283		info->rttr = base + 0x08;
284	} else {
285		info->rcnr = base + 0x0;
286		info->rtsr = base + 0x8;
287		info->rtar = base + 0x4;
288		info->rttr = base + 0xc;
289	}
290
291	platform_set_drvdata(pdev, info);
292	device_init_wakeup(&pdev->dev, true);
293
294	return sa1100_rtc_init(pdev, info);
295}
296
297static void sa1100_rtc_remove(struct platform_device *pdev)
298{
299	struct sa1100_rtc *info = platform_get_drvdata(pdev);
300
301	if (info) {
302		spin_lock_irq(&info->lock);
303		writel_relaxed(0, info->rtsr);
304		spin_unlock_irq(&info->lock);
305		clk_disable_unprepare(info->clk);
306	}
307}
308
309#ifdef CONFIG_PM_SLEEP
310static int sa1100_rtc_suspend(struct device *dev)
311{
312	struct sa1100_rtc *info = dev_get_drvdata(dev);
313	if (device_may_wakeup(dev))
314		enable_irq_wake(info->irq_alarm);
315	return 0;
316}
317
318static int sa1100_rtc_resume(struct device *dev)
319{
320	struct sa1100_rtc *info = dev_get_drvdata(dev);
321	if (device_may_wakeup(dev))
322		disable_irq_wake(info->irq_alarm);
323	return 0;
324}
325#endif
326
327static SIMPLE_DEV_PM_OPS(sa1100_rtc_pm_ops, sa1100_rtc_suspend,
328			sa1100_rtc_resume);
329
330#ifdef CONFIG_OF
331static const struct of_device_id sa1100_rtc_dt_ids[] = {
332	{ .compatible = "mrvl,sa1100-rtc", },
333	{ .compatible = "mrvl,mmp-rtc", },
334	{}
335};
336MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
337#endif
338
339static struct platform_driver sa1100_rtc_driver = {
340	.probe		= sa1100_rtc_probe,
341	.remove		= sa1100_rtc_remove,
342	.driver		= {
343		.name	= "sa1100-rtc",
344		.pm	= &sa1100_rtc_pm_ops,
345		.of_match_table = of_match_ptr(sa1100_rtc_dt_ids),
346	},
347};
348
349module_platform_driver(sa1100_rtc_driver);
350
351MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
352MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
353MODULE_LICENSE("GPL");
354MODULE_ALIAS("platform:sa1100-rtc");