FILE
rtc-max77686.c
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linux-6.19.14/drivers/rtc/rtc-max77686.c
1// SPDX-License-Identifier: GPL-2.0+ 2// 3// RTC driver for Maxim MAX77686 and MAX77802 4// 5// Copyright (C) 2012 Samsung Electronics Co.Ltd 6// 7// based on rtc-max8997.c 8 9#include <linux/i2c.h> 10#include <linux/slab.h> 11#include <linux/rtc.h> 12#include <linux/delay.h> 13#include <linux/mutex.h> 14#include <linux/module.h> 15#include <linux/platform_device.h> 16#include <linux/mfd/max77686-private.h> 17#include <linux/irqdomain.h> 18#include <linux/regmap.h> 19 20#define MAX77686_I2C_ADDR_RTC (0x0C >> 1) 21#define MAX77620_I2C_ADDR_RTC 0x68 22#define MAX77714_I2C_ADDR_RTC 0x48 23#define MAX77686_INVALID_I2C_ADDR (-1) 24 25/* Define non existing register */ 26#define MAX77686_INVALID_REG (-1) 27 28/* RTC Control Register */ 29#define BCD_EN_SHIFT 0 30#define BCD_EN_MASK BIT(BCD_EN_SHIFT) 31#define MODEL24_SHIFT 1 32#define MODEL24_MASK BIT(MODEL24_SHIFT) 33/* RTC Update Register1 */ 34#define RTC_UDR_SHIFT 0 35#define RTC_UDR_MASK BIT(RTC_UDR_SHIFT) 36#define RTC_RBUDR_SHIFT 4 37#define RTC_RBUDR_MASK BIT(RTC_RBUDR_SHIFT) 38/* RTC Alarm Enable */ 39#define ALARM_ENABLE_SHIFT 7 40#define ALARM_ENABLE_MASK BIT(ALARM_ENABLE_SHIFT) 41 42#define REG_RTC_NONE 0xdeadbeef 43 44/* 45 * MAX77802 has separate register (RTCAE1) for alarm enable instead 46 * using 1 bit from registers RTC{SEC,MIN,HOUR,DAY,MONTH,YEAR,DATE} 47 * as in done in MAX77686. 48 */ 49#define MAX77802_ALARM_ENABLE_VALUE 0x77 50 51enum { 52 RTC_SEC = 0, 53 RTC_MIN, 54 RTC_HOUR, 55 RTC_WEEKDAY, 56 RTC_MONTH, 57 RTC_YEAR, 58 RTC_MONTHDAY, 59 RTC_NR_TIME 60}; 61 62/** 63 * struct max77686_rtc_driver_data - model-specific configuration 64 * @delay: Minimum usecs needed for a RTC update 65 * @mask: Mask used to read RTC registers value 66 * @map: Registers offset to I2C addresses map 67 * @alarm_enable_reg: Has a separate alarm enable register? 68 * @rtc_i2c_addr: I2C address for RTC block 69 * @rtc_irq_from_platform: RTC interrupt via platform resource 70 * @alarm_pending_status_reg: Pending alarm status register 71 * @rtc_irq_chip: RTC IRQ CHIP for regmap 72 * @regmap_config: regmap configuration for the chip 73 */ 74struct max77686_rtc_driver_data { 75 unsigned long delay; 76 u8 mask; 77 const unsigned int *map; 78 bool alarm_enable_reg; 79 int rtc_i2c_addr; 80 bool rtc_irq_from_platform; 81 int alarm_pending_status_reg; 82 const struct regmap_irq_chip *rtc_irq_chip; 83 const struct regmap_config *regmap_config; 84}; 85 86struct max77686_rtc_info { 87 struct device *dev; 88 struct rtc_device *rtc_dev; 89 struct mutex lock; 90 91 struct regmap *regmap; 92 struct regmap *rtc_regmap; 93 94 const struct max77686_rtc_driver_data *drv_data; 95 struct regmap_irq_chip_data *rtc_irq_data; 96 97 int rtc_irq; 98 int virq; 99}; 100 101enum MAX77686_RTC_OP { 102 MAX77686_RTC_WRITE, 103 MAX77686_RTC_READ, 104}; 105 106/* These are not registers but just offsets that are mapped to addresses */ 107enum max77686_rtc_reg_offset { 108 REG_RTC_CONTROLM = 0, 109 REG_RTC_CONTROL, 110 REG_RTC_UPDATE0, 111 REG_WTSR_SMPL_CNTL, 112 REG_RTC_SEC, 113 REG_RTC_MIN, 114 REG_RTC_HOUR, 115 REG_RTC_WEEKDAY, 116 REG_RTC_MONTH, 117 REG_RTC_YEAR, 118 REG_RTC_MONTHDAY, 119 REG_ALARM1_SEC, 120 REG_ALARM1_MIN, 121 REG_ALARM1_HOUR, 122 REG_ALARM1_WEEKDAY, 123 REG_ALARM1_MONTH, 124 REG_ALARM1_YEAR, 125 REG_ALARM1_DATE, 126 REG_ALARM2_SEC, 127 REG_ALARM2_MIN, 128 REG_ALARM2_HOUR, 129 REG_ALARM2_WEEKDAY, 130 REG_ALARM2_MONTH, 131 REG_ALARM2_YEAR, 132 REG_ALARM2_DATE, 133 REG_RTC_AE1, 134 REG_RTC_END, 135}; 136 137/* Maps RTC registers offset to the MAX77686 register addresses */ 138static const unsigned int max77686_map[REG_RTC_END] = { 139 [REG_RTC_CONTROLM] = MAX77686_RTC_CONTROLM, 140 [REG_RTC_CONTROL] = MAX77686_RTC_CONTROL, 141 [REG_RTC_UPDATE0] = MAX77686_RTC_UPDATE0, 142 [REG_WTSR_SMPL_CNTL] = MAX77686_WTSR_SMPL_CNTL, 143 [REG_RTC_SEC] = MAX77686_RTC_SEC, 144 [REG_RTC_MIN] = MAX77686_RTC_MIN, 145 [REG_RTC_HOUR] = MAX77686_RTC_HOUR, 146 [REG_RTC_WEEKDAY] = MAX77686_RTC_WEEKDAY, 147 [REG_RTC_MONTH] = MAX77686_RTC_MONTH, 148 [REG_RTC_YEAR] = MAX77686_RTC_YEAR, 149 [REG_RTC_MONTHDAY] = MAX77686_RTC_MONTHDAY, 150 [REG_ALARM1_SEC] = MAX77686_ALARM1_SEC, 151 [REG_ALARM1_MIN] = MAX77686_ALARM1_MIN, 152 [REG_ALARM1_HOUR] = MAX77686_ALARM1_HOUR, 153 [REG_ALARM1_WEEKDAY] = MAX77686_ALARM1_WEEKDAY, 154 [REG_ALARM1_MONTH] = MAX77686_ALARM1_MONTH, 155 [REG_ALARM1_YEAR] = MAX77686_ALARM1_YEAR, 156 [REG_ALARM1_DATE] = MAX77686_ALARM1_DATE, 157 [REG_ALARM2_SEC] = MAX77686_ALARM2_SEC, 158 [REG_ALARM2_MIN] = MAX77686_ALARM2_MIN, 159 [REG_ALARM2_HOUR] = MAX77686_ALARM2_HOUR, 160 [REG_ALARM2_WEEKDAY] = MAX77686_ALARM2_WEEKDAY, 161 [REG_ALARM2_MONTH] = MAX77686_ALARM2_MONTH, 162 [REG_ALARM2_YEAR] = MAX77686_ALARM2_YEAR, 163 [REG_ALARM2_DATE] = MAX77686_ALARM2_DATE, 164 [REG_RTC_AE1] = REG_RTC_NONE, 165}; 166 167static const struct regmap_irq max77686_rtc_irqs[] = { 168 /* RTC interrupts */ 169 REGMAP_IRQ_REG(0, 0, MAX77686_RTCINT_RTC60S_MSK), 170 REGMAP_IRQ_REG(1, 0, MAX77686_RTCINT_RTCA1_MSK), 171 REGMAP_IRQ_REG(2, 0, MAX77686_RTCINT_RTCA2_MSK), 172 REGMAP_IRQ_REG(3, 0, MAX77686_RTCINT_SMPL_MSK), 173 REGMAP_IRQ_REG(4, 0, MAX77686_RTCINT_RTC1S_MSK), 174 REGMAP_IRQ_REG(5, 0, MAX77686_RTCINT_WTSR_MSK), 175}; 176 177static const struct regmap_irq_chip max77686_rtc_irq_chip = { 178 .name = "max77686-rtc", 179 .status_base = MAX77686_RTC_INT, 180 .mask_base = MAX77686_RTC_INTM, 181 .num_regs = 1, 182 .irqs = max77686_rtc_irqs, 183 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs), 184}; 185 186static const struct regmap_config max77686_rtc_regmap_config = { 187 .reg_bits = 8, 188 .val_bits = 8, 189}; 190 191static const struct max77686_rtc_driver_data max77686_drv_data = { 192 .delay = 16000, 193 .mask = 0x7f, 194 .map = max77686_map, 195 .alarm_enable_reg = false, 196 .rtc_irq_from_platform = false, 197 .alarm_pending_status_reg = MAX77686_REG_STATUS2, 198 .rtc_i2c_addr = MAX77686_I2C_ADDR_RTC, 199 .rtc_irq_chip = &max77686_rtc_irq_chip, 200 .regmap_config = &max77686_rtc_regmap_config, 201}; 202 203static const struct regmap_irq_chip max77714_rtc_irq_chip = { 204 .name = "max77714-rtc", 205 .status_base = MAX77686_RTC_INT, 206 .mask_base = MAX77686_RTC_INTM, 207 .num_regs = 1, 208 .irqs = max77686_rtc_irqs, 209 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs) - 1, /* no WTSR on 77714 */ 210}; 211 212static const struct max77686_rtc_driver_data max77714_drv_data = { 213 .delay = 16000, 214 .mask = 0x7f, 215 .map = max77686_map, 216 .alarm_enable_reg = false, 217 .rtc_irq_from_platform = false, 218 /* On MAX77714 RTCA1 is BIT 1 of RTCINT (0x00). Not supported by this driver. */ 219 .alarm_pending_status_reg = MAX77686_INVALID_REG, 220 .rtc_i2c_addr = MAX77714_I2C_ADDR_RTC, 221 .rtc_irq_chip = &max77714_rtc_irq_chip, 222 .regmap_config = &max77686_rtc_regmap_config, 223}; 224 225static const struct regmap_config max77620_rtc_regmap_config = { 226 .reg_bits = 8, 227 .val_bits = 8, 228 .use_single_write = true, 229}; 230 231static const struct max77686_rtc_driver_data max77620_drv_data = { 232 .delay = 16000, 233 .mask = 0x7f, 234 .map = max77686_map, 235 .alarm_enable_reg = false, 236 .rtc_irq_from_platform = true, 237 .alarm_pending_status_reg = MAX77686_INVALID_REG, 238 .rtc_i2c_addr = MAX77620_I2C_ADDR_RTC, 239 .rtc_irq_chip = &max77686_rtc_irq_chip, 240 .regmap_config = &max77620_rtc_regmap_config, 241}; 242 243static const unsigned int max77802_map[REG_RTC_END] = { 244 [REG_RTC_CONTROLM] = MAX77802_RTC_CONTROLM, 245 [REG_RTC_CONTROL] = MAX77802_RTC_CONTROL, 246 [REG_RTC_UPDATE0] = MAX77802_RTC_UPDATE0, 247 [REG_WTSR_SMPL_CNTL] = MAX77802_WTSR_SMPL_CNTL, 248 [REG_RTC_SEC] = MAX77802_RTC_SEC, 249 [REG_RTC_MIN] = MAX77802_RTC_MIN, 250 [REG_RTC_HOUR] = MAX77802_RTC_HOUR, 251 [REG_RTC_WEEKDAY] = MAX77802_RTC_WEEKDAY, 252 [REG_RTC_MONTH] = MAX77802_RTC_MONTH, 253 [REG_RTC_YEAR] = MAX77802_RTC_YEAR, 254 [REG_RTC_MONTHDAY] = MAX77802_RTC_MONTHDAY, 255 [REG_ALARM1_SEC] = MAX77802_ALARM1_SEC, 256 [REG_ALARM1_MIN] = MAX77802_ALARM1_MIN, 257 [REG_ALARM1_HOUR] = MAX77802_ALARM1_HOUR, 258 [REG_ALARM1_WEEKDAY] = MAX77802_ALARM1_WEEKDAY, 259 [REG_ALARM1_MONTH] = MAX77802_ALARM1_MONTH, 260 [REG_ALARM1_YEAR] = MAX77802_ALARM1_YEAR, 261 [REG_ALARM1_DATE] = MAX77802_ALARM1_DATE, 262 [REG_ALARM2_SEC] = MAX77802_ALARM2_SEC, 263 [REG_ALARM2_MIN] = MAX77802_ALARM2_MIN, 264 [REG_ALARM2_HOUR] = MAX77802_ALARM2_HOUR, 265 [REG_ALARM2_WEEKDAY] = MAX77802_ALARM2_WEEKDAY, 266 [REG_ALARM2_MONTH] = MAX77802_ALARM2_MONTH, 267 [REG_ALARM2_YEAR] = MAX77802_ALARM2_YEAR, 268 [REG_ALARM2_DATE] = MAX77802_ALARM2_DATE, 269 [REG_RTC_AE1] = MAX77802_RTC_AE1, 270}; 271 272static const struct regmap_irq_chip max77802_rtc_irq_chip = { 273 .name = "max77802-rtc", 274 .status_base = MAX77802_RTC_INT, 275 .mask_base = MAX77802_RTC_INTM, 276 .num_regs = 1, 277 .irqs = max77686_rtc_irqs, /* same masks as 77686 */ 278 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs), 279}; 280 281static const struct max77686_rtc_driver_data max77802_drv_data = { 282 .delay = 200, 283 .mask = 0xff, 284 .map = max77802_map, 285 .alarm_enable_reg = true, 286 .rtc_irq_from_platform = false, 287 .alarm_pending_status_reg = MAX77686_REG_STATUS2, 288 .rtc_i2c_addr = MAX77686_INVALID_I2C_ADDR, 289 .rtc_irq_chip = &max77802_rtc_irq_chip, 290}; 291 292static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm, 293 struct max77686_rtc_info *info) 294{ 295 u8 mask = info->drv_data->mask; 296 297 tm->tm_sec = data[RTC_SEC] & mask; 298 tm->tm_min = data[RTC_MIN] & mask; 299 tm->tm_hour = data[RTC_HOUR] & 0x1f; 300 301 /* Only a single bit is set in data[], so fls() would be equivalent */ 302 tm->tm_wday = ffs(data[RTC_WEEKDAY] & mask) - 1; 303 tm->tm_mday = data[RTC_MONTHDAY] & 0x1f; 304 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; 305 tm->tm_year = data[RTC_YEAR] & mask; 306 tm->tm_yday = 0; 307 tm->tm_isdst = 0; 308 309 /* 310 * MAX77686 uses 1 bit from sec/min/hour/etc RTC registers and the 311 * year values are just 0..99 so add 100 to support up to 2099. 312 */ 313 if (!info->drv_data->alarm_enable_reg) 314 tm->tm_year += 100; 315} 316 317static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data, 318 struct max77686_rtc_info *info) 319{ 320 data[RTC_SEC] = tm->tm_sec; 321 data[RTC_MIN] = tm->tm_min; 322 data[RTC_HOUR] = tm->tm_hour; 323 data[RTC_WEEKDAY] = 1 << tm->tm_wday; 324 data[RTC_MONTHDAY] = tm->tm_mday; 325 data[RTC_MONTH] = tm->tm_mon + 1; 326 327 if (info->drv_data->alarm_enable_reg) { 328 data[RTC_YEAR] = tm->tm_year; 329 return 0; 330 } 331 332 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 333 334 if (tm->tm_year < 100) { 335 dev_err(info->dev, "RTC cannot handle the year %d.\n", 336 1900 + tm->tm_year); 337 return -EINVAL; 338 } 339 340 return 0; 341} 342 343static int max77686_rtc_update(struct max77686_rtc_info *info, 344 enum MAX77686_RTC_OP op) 345{ 346 int ret; 347 unsigned int data; 348 unsigned long delay = info->drv_data->delay; 349 350 if (op == MAX77686_RTC_WRITE) 351 data = 1 << RTC_UDR_SHIFT; 352 else 353 data = 1 << RTC_RBUDR_SHIFT; 354 355 ret = regmap_update_bits(info->rtc_regmap, 356 info->drv_data->map[REG_RTC_UPDATE0], 357 data, data); 358 if (ret < 0) 359 dev_err(info->dev, "Fail to write update reg(ret=%d, data=0x%x)\n", 360 ret, data); 361 else { 362 /* Minimum delay required before RTC update. */ 363 usleep_range(delay, delay * 2); 364 } 365 366 return ret; 367} 368 369static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm) 370{ 371 struct max77686_rtc_info *info = dev_get_drvdata(dev); 372 u8 data[RTC_NR_TIME]; 373 int ret; 374 375 mutex_lock(&info->lock); 376 377 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 378 if (ret < 0) 379 goto out; 380 381 ret = regmap_bulk_read(info->rtc_regmap, 382 info->drv_data->map[REG_RTC_SEC], 383 data, ARRAY_SIZE(data)); 384 if (ret < 0) { 385 dev_err(info->dev, "Fail to read time reg(%d)\n", ret); 386 goto out; 387 } 388 389 max77686_rtc_data_to_tm(data, tm, info); 390 391out: 392 mutex_unlock(&info->lock); 393 return ret; 394} 395 396static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm) 397{ 398 struct max77686_rtc_info *info = dev_get_drvdata(dev); 399 u8 data[RTC_NR_TIME]; 400 int ret; 401 402 ret = max77686_rtc_tm_to_data(tm, data, info); 403 if (ret < 0) 404 return ret; 405 406 mutex_lock(&info->lock); 407 408 ret = regmap_bulk_write(info->rtc_regmap, 409 info->drv_data->map[REG_RTC_SEC], 410 data, ARRAY_SIZE(data)); 411 if (ret < 0) { 412 dev_err(info->dev, "Fail to write time reg(%d)\n", ret); 413 goto out; 414 } 415 416 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 417 418out: 419 mutex_unlock(&info->lock); 420 return ret; 421} 422 423static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 424{ 425 struct max77686_rtc_info *info = dev_get_drvdata(dev); 426 u8 data[RTC_NR_TIME]; 427 unsigned int val; 428 const unsigned int *map = info->drv_data->map; 429 int i, ret; 430 431 mutex_lock(&info->lock); 432 433 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 434 if (ret < 0) 435 goto out; 436 437 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 438 data, ARRAY_SIZE(data)); 439 if (ret < 0) { 440 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 441 goto out; 442 } 443 444 max77686_rtc_data_to_tm(data, &alrm->time, info); 445 446 alrm->enabled = 0; 447 448 if (info->drv_data->alarm_enable_reg) { 449 if (map[REG_RTC_AE1] == REG_RTC_NONE) { 450 ret = -EINVAL; 451 dev_err(info->dev, 452 "alarm enable register not set(%d)\n", ret); 453 goto out; 454 } 455 456 ret = regmap_read(info->rtc_regmap, map[REG_RTC_AE1], &val); 457 if (ret < 0) { 458 dev_err(info->dev, 459 "fail to read alarm enable(%d)\n", ret); 460 goto out; 461 } 462 463 if (val) 464 alrm->enabled = 1; 465 } else { 466 for (i = 0; i < ARRAY_SIZE(data); i++) { 467 if (data[i] & ALARM_ENABLE_MASK) { 468 alrm->enabled = 1; 469 break; 470 } 471 } 472 } 473 474 alrm->pending = 0; 475 476 if (info->drv_data->alarm_pending_status_reg == MAX77686_INVALID_REG) 477 goto out; 478 479 ret = regmap_read(info->regmap, 480 info->drv_data->alarm_pending_status_reg, &val); 481 if (ret < 0) { 482 dev_err(info->dev, 483 "Fail to read alarm pending status reg(%d)\n", ret); 484 goto out; 485 } 486 487 if (val & (1 << 4)) /* RTCA1 */ 488 alrm->pending = 1; 489 490out: 491 mutex_unlock(&info->lock); 492 return ret; 493} 494 495static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info) 496{ 497 u8 data[RTC_NR_TIME]; 498 int ret, i; 499 struct rtc_time tm; 500 const unsigned int *map = info->drv_data->map; 501 502 if (!mutex_is_locked(&info->lock)) 503 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 504 505 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 506 if (ret < 0) 507 goto out; 508 509 if (info->drv_data->alarm_enable_reg) { 510 if (map[REG_RTC_AE1] == REG_RTC_NONE) { 511 ret = -EINVAL; 512 dev_err(info->dev, 513 "alarm enable register not set(%d)\n", ret); 514 goto out; 515 } 516 517 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 0); 518 } else { 519 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 520 data, ARRAY_SIZE(data)); 521 if (ret < 0) { 522 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 523 goto out; 524 } 525 526 max77686_rtc_data_to_tm(data, &tm, info); 527 528 for (i = 0; i < ARRAY_SIZE(data); i++) 529 data[i] &= ~ALARM_ENABLE_MASK; 530 531 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC], 532 data, ARRAY_SIZE(data)); 533 } 534 535 if (ret < 0) { 536 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 537 goto out; 538 } 539 540 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 541out: 542 return ret; 543} 544 545static int max77686_rtc_start_alarm(struct max77686_rtc_info *info) 546{ 547 u8 data[RTC_NR_TIME]; 548 int ret; 549 struct rtc_time tm; 550 const unsigned int *map = info->drv_data->map; 551 552 if (!mutex_is_locked(&info->lock)) 553 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 554 555 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 556 if (ret < 0) 557 goto out; 558 559 if (info->drv_data->alarm_enable_reg) { 560 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 561 MAX77802_ALARM_ENABLE_VALUE); 562 } else { 563 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 564 data, ARRAY_SIZE(data)); 565 if (ret < 0) { 566 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 567 goto out; 568 } 569 570 max77686_rtc_data_to_tm(data, &tm, info); 571 572 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT); 573 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT); 574 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT); 575 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; 576 if (data[RTC_MONTH] & 0xf) 577 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT); 578 if (data[RTC_YEAR] & info->drv_data->mask) 579 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT); 580 if (data[RTC_MONTHDAY] & 0x1f) 581 data[RTC_MONTHDAY] |= (1 << ALARM_ENABLE_SHIFT); 582 583 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC], 584 data, ARRAY_SIZE(data)); 585 } 586 587 if (ret < 0) { 588 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 589 goto out; 590 } 591 592 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 593out: 594 return ret; 595} 596 597static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 598{ 599 struct max77686_rtc_info *info = dev_get_drvdata(dev); 600 u8 data[RTC_NR_TIME]; 601 int ret; 602 603 ret = max77686_rtc_tm_to_data(&alrm->time, data, info); 604 if (ret < 0) 605 return ret; 606 607 mutex_lock(&info->lock); 608 609 ret = max77686_rtc_stop_alarm(info); 610 if (ret < 0) 611 goto out; 612 613 ret = regmap_bulk_write(info->rtc_regmap, 614 info->drv_data->map[REG_ALARM1_SEC], 615 data, ARRAY_SIZE(data)); 616 617 if (ret < 0) { 618 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 619 goto out; 620 } 621 622 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 623 if (ret < 0) 624 goto out; 625 626 if (alrm->enabled) 627 ret = max77686_rtc_start_alarm(info); 628out: 629 mutex_unlock(&info->lock); 630 return ret; 631} 632 633static int max77686_rtc_alarm_irq_enable(struct device *dev, 634 unsigned int enabled) 635{ 636 struct max77686_rtc_info *info = dev_get_drvdata(dev); 637 int ret; 638 639 mutex_lock(&info->lock); 640 if (enabled) 641 ret = max77686_rtc_start_alarm(info); 642 else 643 ret = max77686_rtc_stop_alarm(info); 644 mutex_unlock(&info->lock); 645 646 return ret; 647} 648 649static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data) 650{ 651 struct max77686_rtc_info *info = data; 652 653 dev_dbg(info->dev, "RTC alarm IRQ: %d\n", irq); 654 655 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); 656 657 return IRQ_HANDLED; 658} 659 660static const struct rtc_class_ops max77686_rtc_ops = { 661 .read_time = max77686_rtc_read_time, 662 .set_time = max77686_rtc_set_time, 663 .read_alarm = max77686_rtc_read_alarm, 664 .set_alarm = max77686_rtc_set_alarm, 665 .alarm_irq_enable = max77686_rtc_alarm_irq_enable, 666}; 667 668static int max77686_rtc_init_reg(struct max77686_rtc_info *info) 669{ 670 u8 data[2]; 671 int ret; 672 673 /* Set RTC control register : Binary mode, 24hour mdoe */ 674 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 675 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 676 677 ret = regmap_bulk_write(info->rtc_regmap, 678 info->drv_data->map[REG_RTC_CONTROLM], 679 data, ARRAY_SIZE(data)); 680 if (ret < 0) { 681 dev_err(info->dev, "Fail to write controlm reg(%d)\n", ret); 682 return ret; 683 } 684 685 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 686 return ret; 687} 688 689static int max77686_init_rtc_regmap(struct max77686_rtc_info *info) 690{ 691 struct device *parent = info->dev->parent; 692 struct i2c_client *parent_i2c = to_i2c_client(parent); 693 struct i2c_client *client; 694 int ret; 695 696 if (info->drv_data->rtc_irq_from_platform) { 697 struct platform_device *pdev = to_platform_device(info->dev); 698 699 info->rtc_irq = platform_get_irq(pdev, 0); 700 if (info->rtc_irq < 0) 701 return info->rtc_irq; 702 } else { 703 info->rtc_irq = parent_i2c->irq; 704 } 705 706 info->regmap = dev_get_regmap(parent, NULL); 707 if (!info->regmap) 708 return dev_err_probe(info->dev, -ENODEV, 709 "Failed to get rtc regmap\n"); 710 711 if (info->drv_data->rtc_i2c_addr == MAX77686_INVALID_I2C_ADDR) { 712 info->rtc_regmap = info->regmap; 713 goto add_rtc_irq; 714 } 715 716 client = devm_i2c_new_dummy_device(info->dev, parent_i2c->adapter, 717 info->drv_data->rtc_i2c_addr); 718 if (IS_ERR(client)) 719 return dev_err_probe(info->dev, PTR_ERR(client), 720 "Failed to allocate I2C device for RTC\n"); 721 722 info->rtc_regmap = devm_regmap_init_i2c(client, 723 info->drv_data->regmap_config); 724 if (IS_ERR(info->rtc_regmap)) 725 return dev_err_probe(info->dev, PTR_ERR(info->rtc_regmap), 726 "Failed to allocate RTC regmap\n"); 727 728add_rtc_irq: 729 ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq, 730 IRQF_ONESHOT | IRQF_SHARED, 731 0, info->drv_data->rtc_irq_chip, 732 &info->rtc_irq_data); 733 if (ret < 0) 734 return dev_err_probe(info->dev, ret, 735 "Failed to add RTC irq chip\n"); 736 737 return 0; 738} 739 740static int max77686_rtc_probe(struct platform_device *pdev) 741{ 742 struct max77686_rtc_info *info; 743 const struct platform_device_id *id = platform_get_device_id(pdev); 744 int ret; 745 746 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info), 747 GFP_KERNEL); 748 if (!info) 749 return -ENOMEM; 750 751 mutex_init(&info->lock); 752 info->dev = &pdev->dev; 753 info->drv_data = (const struct max77686_rtc_driver_data *) 754 id->driver_data; 755 756 ret = max77686_init_rtc_regmap(info); 757 if (ret < 0) 758 return ret; 759 760 platform_set_drvdata(pdev, info); 761 762 ret = max77686_rtc_init_reg(info); 763 if (ret < 0) { 764 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret); 765 goto err_rtc; 766 } 767 768 device_init_wakeup(&pdev->dev, true); 769 770 info->rtc_dev = devm_rtc_device_register(&pdev->dev, id->name, 771 &max77686_rtc_ops, THIS_MODULE); 772 773 if (IS_ERR(info->rtc_dev)) { 774 ret = PTR_ERR(info->rtc_dev); 775 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret); 776 if (ret == 0) 777 ret = -EINVAL; 778 goto err_rtc; 779 } 780 781 info->virq = regmap_irq_get_virq(info->rtc_irq_data, 782 MAX77686_RTCIRQ_RTCA1); 783 if (info->virq <= 0) { 784 ret = -ENXIO; 785 goto err_rtc; 786 } 787 788 ret = request_threaded_irq(info->virq, NULL, max77686_rtc_alarm_irq, 0, 789 "rtc-alarm1", info); 790 if (ret < 0) { 791 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", 792 info->virq, ret); 793 goto err_rtc; 794 } 795 796 return 0; 797 798err_rtc: 799 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data); 800 801 return ret; 802} 803 804static void max77686_rtc_remove(struct platform_device *pdev) 805{ 806 struct max77686_rtc_info *info = platform_get_drvdata(pdev); 807 808 free_irq(info->virq, info); 809 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data); 810} 811 812#ifdef CONFIG_PM_SLEEP 813static int max77686_rtc_suspend(struct device *dev) 814{ 815 struct max77686_rtc_info *info = dev_get_drvdata(dev); 816 int ret = 0; 817 818 if (device_may_wakeup(dev)) { 819 struct max77686_rtc_info *info = dev_get_drvdata(dev); 820 821 ret = enable_irq_wake(info->virq); 822 } 823 824 /* 825 * If the main IRQ (not virtual) is the parent IRQ, then it must be 826 * disabled during suspend because if it happens while suspended it 827 * will be handled before resuming I2C. 828 * 829 * Since Main IRQ is shared, all its users should disable it to be sure 830 * it won't fire while one of them is still suspended. 831 */ 832 if (!info->drv_data->rtc_irq_from_platform) 833 disable_irq(info->rtc_irq); 834 835 return ret; 836} 837 838static int max77686_rtc_resume(struct device *dev) 839{ 840 struct max77686_rtc_info *info = dev_get_drvdata(dev); 841 842 if (!info->drv_data->rtc_irq_from_platform) 843 enable_irq(info->rtc_irq); 844 845 if (device_may_wakeup(dev)) { 846 struct max77686_rtc_info *info = dev_get_drvdata(dev); 847 848 return disable_irq_wake(info->virq); 849 } 850 851 return 0; 852} 853#endif 854 855static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops, 856 max77686_rtc_suspend, max77686_rtc_resume); 857 858static const struct platform_device_id rtc_id[] = { 859 { "max77686-rtc", .driver_data = (kernel_ulong_t)&max77686_drv_data, }, 860 { "max77802-rtc", .driver_data = (kernel_ulong_t)&max77802_drv_data, }, 861 { "max77620-rtc", .driver_data = (kernel_ulong_t)&max77620_drv_data, }, 862 { "max77714-rtc", .driver_data = (kernel_ulong_t)&max77714_drv_data, }, 863 {}, 864}; 865MODULE_DEVICE_TABLE(platform, rtc_id); 866 867static struct platform_driver max77686_rtc_driver = { 868 .driver = { 869 .name = "max77686-rtc", 870 .pm = &max77686_rtc_pm_ops, 871 }, 872 .probe = max77686_rtc_probe, 873 .remove = max77686_rtc_remove, 874 .id_table = rtc_id, 875}; 876 877module_platform_driver(max77686_rtc_driver); 878 879MODULE_DESCRIPTION("Maxim MAX77686 RTC driver"); 880MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>"); 881MODULE_LICENSE("GPL");
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