rtc-cmos.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   4 *
   5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   6 * Copyright (C) 2006 David Brownell (convert to new framework)
   7 */
   8
   9/*
  10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  11 * That defined the register interface now provided by all PCs, some
  12 * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  13 * integrate an MC146818 clone in their southbridge, and boards use
  14 * that instead of discrete clones like the DS12887 or M48T86.  There
  15 * are also clones that connect using the LPC bus.
  16 *
  17 * That register API is also used directly by various other drivers
  18 * (notably for integrated NVRAM), infrastructure (x86 has code to
  19 * bypass the RTC framework, directly reading the RTC during boot
  20 * and updating minutes/seconds for systems using NTP synch) and
  21 * utilities (like userspace 'hwclock', if no /dev node exists).
  22 *
  23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  24 * interrupts disabled, holding the global rtc_lock, to exclude those
  25 * other drivers and utilities on correctly configured systems.
  26 */
  27
  28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30#include <linux/kernel.h>
  31#include <linux/module.h>
  32#include <linux/init.h>
  33#include <linux/interrupt.h>
  34#include <linux/spinlock.h>
  35#include <linux/platform_device.h>
  36#include <linux/log2.h>
  37#include <linux/pm.h>
  38#include <linux/of.h>
  39#include <linux/of_platform.h>
  40#ifdef CONFIG_X86
  41#include <asm/i8259.h>
  42#include <asm/processor.h>
  43#include <linux/dmi.h>
  44#endif
  45
  46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  47#include <linux/mc146818rtc.h>
  48
  49#ifdef CONFIG_ACPI
  50/*
  51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
  52 *
  53 * If cleared, ACPI SCI is only used to wake up the system from suspend
  54 *
  55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
  56 */
  57
  58static bool use_acpi_alarm;
  59module_param(use_acpi_alarm, bool, 0444);
  60
  61static inline int cmos_use_acpi_alarm(void)
  62{
  63	return use_acpi_alarm;
  64}
  65#else /* !CONFIG_ACPI */
  66
  67static inline int cmos_use_acpi_alarm(void)
  68{
  69	return 0;
  70}
  71#endif
  72
  73struct cmos_rtc {
  74	struct rtc_device	*rtc;
  75	struct device		*dev;
  76	int			irq;
  77	struct resource		*iomem;
  78	time64_t		alarm_expires;
  79
  80	void			(*wake_on)(struct device *);
  81	void			(*wake_off)(struct device *);
  82
  83	u8			enabled_wake;
  84	u8			suspend_ctrl;
  85
  86	/* newer hardware extends the original register set */
  87	u8			day_alrm;
  88	u8			mon_alrm;
  89	u8			century;
  90
  91	struct rtc_wkalrm	saved_wkalrm;
  92};
  93
  94/* both platform and pnp busses use negative numbers for invalid irqs */
  95#define is_valid_irq(n)		((n) > 0)
  96
  97static const char driver_name[] = "rtc_cmos";
  98
  99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
 100 * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
 101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
 102 */
 103#define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF)
 104
 105static inline int is_intr(u8 rtc_intr)
 106{
 107	if (!(rtc_intr & RTC_IRQF))
 108		return 0;
 109	return rtc_intr & RTC_IRQMASK;
 110}
 111
 112/*----------------------------------------------------------------*/
 113
 114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
 115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
 116 * used in a broken "legacy replacement" mode.  The breakage includes
 117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
 118 * other (better) use.
 119 *
 120 * When that broken mode is in use, platform glue provides a partial
 121 * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
 122 * want to use HPET for anything except those IRQs though...
 123 */
 124#ifdef CONFIG_HPET_EMULATE_RTC
 125#include <asm/hpet.h>
 126#else
 127
 128static inline int is_hpet_enabled(void)
 129{
 130	return 0;
 131}
 132
 133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 134{
 135	return 0;
 136}
 137
 138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 139{
 140	return 0;
 141}
 142
 143static inline int
 144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 145{
 146	return 0;
 147}
 148
 149static inline int hpet_set_periodic_freq(unsigned long freq)
 150{
 151	return 0;
 152}
 153
 154static inline int hpet_rtc_timer_init(void)
 155{
 156	return 0;
 157}
 158
 159extern irq_handler_t hpet_rtc_interrupt;
 160
 161static inline int hpet_register_irq_handler(irq_handler_t handler)
 162{
 163	return 0;
 164}
 165
 166static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 167{
 168	return 0;
 169}
 170
 171#endif
 172
 173/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
 174static inline int use_hpet_alarm(void)
 175{
 176	return is_hpet_enabled() && !cmos_use_acpi_alarm();
 177}
 178
 179/*----------------------------------------------------------------*/
 180
 181#ifdef RTC_PORT
 182
 183/* Most newer x86 systems have two register banks, the first used
 184 * for RTC and NVRAM and the second only for NVRAM.  Caller must
 185 * own rtc_lock ... and we won't worry about access during NMI.
 186 */
 187#define can_bank2	true
 188
 189static inline unsigned char cmos_read_bank2(unsigned char addr)
 190{
 191	outb(addr, RTC_PORT(2));
 192	return inb(RTC_PORT(3));
 193}
 194
 195static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 196{
 197	outb(addr, RTC_PORT(2));
 198	outb(val, RTC_PORT(3));
 199}
 200
 201#else
 202
 203#define can_bank2	false
 204
 205static inline unsigned char cmos_read_bank2(unsigned char addr)
 206{
 207	return 0;
 208}
 209
 210static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 211{
 212}
 213
 214#endif
 215
 216/*----------------------------------------------------------------*/
 217
 218static int cmos_read_time(struct device *dev, struct rtc_time *t)
 219{
 220	int ret;
 221
 222	/*
 223	 * If pm_trace abused the RTC for storage, set the timespec to 0,
 224	 * which tells the caller that this RTC value is unusable.
 225	 */
 226	if (!pm_trace_rtc_valid())
 227		return -EIO;
 228
 229	ret = mc146818_get_time(t, 1000);
 230	if (ret < 0) {
 231		dev_err_ratelimited(dev, "unable to read current time\n");
 232		return ret;
 233	}
 234
 235	return 0;
 236}
 237
 238static int cmos_set_time(struct device *dev, struct rtc_time *t)
 239{
 240	/* NOTE: this ignores the issue whereby updating the seconds
 241	 * takes effect exactly 500ms after we write the register.
 242	 * (Also queueing and other delays before we get this far.)
 243	 */
 244	return mc146818_set_time(t);
 245}
 246
 247struct cmos_read_alarm_callback_param {
 248	struct cmos_rtc *cmos;
 249	struct rtc_time *time;
 250	unsigned char	rtc_control;
 251};
 252
 253static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
 254				     void *param_in)
 255{
 256	struct cmos_read_alarm_callback_param *p =
 257		(struct cmos_read_alarm_callback_param *)param_in;
 258	struct rtc_time *time = p->time;
 259
 260	time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 261	time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 262	time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 263
 264	if (p->cmos->day_alrm) {
 265		/* ignore upper bits on readback per ACPI spec */
 266		time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
 267		if (!time->tm_mday)
 268			time->tm_mday = -1;
 269
 270		if (p->cmos->mon_alrm) {
 271			time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
 272			if (!time->tm_mon)
 273				time->tm_mon = -1;
 274		}
 275	}
 276
 277	p->rtc_control = CMOS_READ(RTC_CONTROL);
 278}
 279
 280static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 281{
 282	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 283	struct cmos_read_alarm_callback_param p = {
 284		.cmos = cmos,
 285		.time = &t->time,
 286	};
 287
 288	/* This not only a rtc_op, but also called directly */
 289	if (!is_valid_irq(cmos->irq))
 290		return -ETIMEDOUT;
 291
 292	/* Basic alarms only support hour, minute, and seconds fields.
 293	 * Some also support day and month, for alarms up to a year in
 294	 * the future.
 295	 */
 296
 297	/* Some Intel chipsets disconnect the alarm registers when the clock
 298	 * update is in progress - during this time reads return bogus values
 299	 * and writes may fail silently. See for example "7th Generation Intel®
 300	 * Processor Family I/O for U/Y Platforms [...] Datasheet", section
 301	 * 27.7.1
 302	 *
 303	 * Use the mc146818_avoid_UIP() function to avoid this.
 304	 */
 305	if (!mc146818_avoid_UIP(cmos_read_alarm_callback, 10, &p))
 306		return -EIO;
 307
 308	if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 309		if (((unsigned)t->time.tm_sec) < 0x60)
 310			t->time.tm_sec = bcd2bin(t->time.tm_sec);
 311		else
 312			t->time.tm_sec = -1;
 313		if (((unsigned)t->time.tm_min) < 0x60)
 314			t->time.tm_min = bcd2bin(t->time.tm_min);
 315		else
 316			t->time.tm_min = -1;
 317		if (((unsigned)t->time.tm_hour) < 0x24)
 318			t->time.tm_hour = bcd2bin(t->time.tm_hour);
 319		else
 320			t->time.tm_hour = -1;
 321
 322		if (cmos->day_alrm) {
 323			if (((unsigned)t->time.tm_mday) <= 0x31)
 324				t->time.tm_mday = bcd2bin(t->time.tm_mday);
 325			else
 326				t->time.tm_mday = -1;
 327
 328			if (cmos->mon_alrm) {
 329				if (((unsigned)t->time.tm_mon) <= 0x12)
 330					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
 331				else
 332					t->time.tm_mon = -1;
 333			}
 334		}
 335	}
 336
 337	t->enabled = !!(p.rtc_control & RTC_AIE);
 338	t->pending = 0;
 339
 340	return 0;
 341}
 342
 343static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 344{
 345	unsigned char	rtc_intr;
 346
 347	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 348	 * allegedly some older rtcs need that to handle irqs properly
 349	 */
 350	rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 351
 352	if (use_hpet_alarm())
 353		return;
 354
 355	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 356	if (is_intr(rtc_intr))
 357		rtc_update_irq(cmos->rtc, 1, rtc_intr);
 358}
 359
 360static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 361{
 362	unsigned char	rtc_control;
 363
 364	/* flush any pending IRQ status, notably for update irqs,
 365	 * before we enable new IRQs
 366	 */
 367	rtc_control = CMOS_READ(RTC_CONTROL);
 368	cmos_checkintr(cmos, rtc_control);
 369
 370	rtc_control |= mask;
 371	CMOS_WRITE(rtc_control, RTC_CONTROL);
 372	if (use_hpet_alarm())
 373		hpet_set_rtc_irq_bit(mask);
 374
 375	if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
 376		if (cmos->wake_on)
 377			cmos->wake_on(cmos->dev);
 378	}
 379
 380	cmos_checkintr(cmos, rtc_control);
 381}
 382
 383static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 384{
 385	unsigned char	rtc_control;
 386
 387	rtc_control = CMOS_READ(RTC_CONTROL);
 388	rtc_control &= ~mask;
 389	CMOS_WRITE(rtc_control, RTC_CONTROL);
 390	if (use_hpet_alarm())
 391		hpet_mask_rtc_irq_bit(mask);
 392
 393	if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
 394		if (cmos->wake_off)
 395			cmos->wake_off(cmos->dev);
 396	}
 397
 398	cmos_checkintr(cmos, rtc_control);
 399}
 400
 401static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
 402{
 403	struct cmos_rtc *cmos = dev_get_drvdata(dev);
 404	struct rtc_time now;
 405
 406	cmos_read_time(dev, &now);
 407
 408	if (!cmos->day_alrm) {
 409		time64_t t_max_date;
 410		time64_t t_alrm;
 411
 412		t_max_date = rtc_tm_to_time64(&now);
 413		t_max_date += 24 * 60 * 60 - 1;
 414		t_alrm = rtc_tm_to_time64(&t->time);
 415		if (t_alrm > t_max_date) {
 416			dev_err(dev,
 417				"Alarms can be up to one day in the future\n");
 418			return -EINVAL;
 419		}
 420	} else if (!cmos->mon_alrm) {
 421		struct rtc_time max_date = now;
 422		time64_t t_max_date;
 423		time64_t t_alrm;
 424		int max_mday;
 425
 426		if (max_date.tm_mon == 11) {
 427			max_date.tm_mon = 0;
 428			max_date.tm_year += 1;
 429		} else {
 430			max_date.tm_mon += 1;
 431		}
 432		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
 433		if (max_date.tm_mday > max_mday)
 434			max_date.tm_mday = max_mday;
 435
 436		t_max_date = rtc_tm_to_time64(&max_date);
 437		t_max_date -= 1;
 438		t_alrm = rtc_tm_to_time64(&t->time);
 439		if (t_alrm > t_max_date) {
 440			dev_err(dev,
 441				"Alarms can be up to one month in the future\n");
 442			return -EINVAL;
 443		}
 444	} else {
 445		struct rtc_time max_date = now;
 446		time64_t t_max_date;
 447		time64_t t_alrm;
 448		int max_mday;
 449
 450		max_date.tm_year += 1;
 451		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
 452		if (max_date.tm_mday > max_mday)
 453			max_date.tm_mday = max_mday;
 454
 455		t_max_date = rtc_tm_to_time64(&max_date);
 456		t_max_date -= 1;
 457		t_alrm = rtc_tm_to_time64(&t->time);
 458		if (t_alrm > t_max_date) {
 459			dev_err(dev,
 460				"Alarms can be up to one year in the future\n");
 461			return -EINVAL;
 462		}
 463	}
 464
 465	return 0;
 466}
 467
 468struct cmos_set_alarm_callback_param {
 469	struct cmos_rtc *cmos;
 470	unsigned char mon, mday, hrs, min, sec;
 471	struct rtc_wkalrm *t;
 472};
 473
 474/* Note: this function may be executed by mc146818_avoid_UIP() more then
 475 *	 once
 476 */
 477static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
 478				    void *param_in)
 479{
 480	struct cmos_set_alarm_callback_param *p =
 481		(struct cmos_set_alarm_callback_param *)param_in;
 482
 483	/* next rtc irq must not be from previous alarm setting */
 484	cmos_irq_disable(p->cmos, RTC_AIE);
 485
 486	/* update alarm */
 487	CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
 488	CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
 489	CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
 490
 491	/* the system may support an "enhanced" alarm */
 492	if (p->cmos->day_alrm) {
 493		CMOS_WRITE(p->mday, p->cmos->day_alrm);
 494		if (p->cmos->mon_alrm)
 495			CMOS_WRITE(p->mon, p->cmos->mon_alrm);
 496	}
 497
 498	if (use_hpet_alarm()) {
 499		/*
 500		 * FIXME the HPET alarm glue currently ignores day_alrm
 501		 * and mon_alrm ...
 502		 */
 503		hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
 504				    p->t->time.tm_sec);
 505	}
 506
 507	if (p->t->enabled)
 508		cmos_irq_enable(p->cmos, RTC_AIE);
 509}
 510
 511static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 512{
 513	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 514	struct cmos_set_alarm_callback_param p = {
 515		.cmos = cmos,
 516		.t = t
 517	};
 518	unsigned char rtc_control;
 519	int ret;
 520
 521	/* This not only a rtc_op, but also called directly */
 522	if (!is_valid_irq(cmos->irq))
 523		return -EIO;
 524
 525	ret = cmos_validate_alarm(dev, t);
 526	if (ret < 0)
 527		return ret;
 528
 529	p.mon = t->time.tm_mon + 1;
 530	p.mday = t->time.tm_mday;
 531	p.hrs = t->time.tm_hour;
 532	p.min = t->time.tm_min;
 533	p.sec = t->time.tm_sec;
 534
 535	spin_lock_irq(&rtc_lock);
 536	rtc_control = CMOS_READ(RTC_CONTROL);
 537	spin_unlock_irq(&rtc_lock);
 538
 539	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 540		/* Writing 0xff means "don't care" or "match all".  */
 541		p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
 542		p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
 543		p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
 544		p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
 545		p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
 546	}
 547
 548	/*
 549	 * Some Intel chipsets disconnect the alarm registers when the clock
 550	 * update is in progress - during this time writes fail silently.
 551	 *
 552	 * Use mc146818_avoid_UIP() to avoid this.
 553	 */
 554	if (!mc146818_avoid_UIP(cmos_set_alarm_callback, 10, &p))
 555		return -ETIMEDOUT;
 556
 557	cmos->alarm_expires = rtc_tm_to_time64(&t->time);
 558
 559	return 0;
 560}
 561
 562static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 563{
 564	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 565	unsigned long	flags;
 566
 567	spin_lock_irqsave(&rtc_lock, flags);
 568
 569	if (enabled)
 570		cmos_irq_enable(cmos, RTC_AIE);
 571	else
 572		cmos_irq_disable(cmos, RTC_AIE);
 573
 574	spin_unlock_irqrestore(&rtc_lock, flags);
 575	return 0;
 576}
 577
 578#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
 579
 580static int cmos_procfs(struct device *dev, struct seq_file *seq)
 581{
 582	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 583	unsigned char	rtc_control, valid;
 584
 585	spin_lock_irq(&rtc_lock);
 586	rtc_control = CMOS_READ(RTC_CONTROL);
 587	valid = CMOS_READ(RTC_VALID);
 588	spin_unlock_irq(&rtc_lock);
 589
 590	/* NOTE:  at least ICH6 reports battery status using a different
 591	 * (non-RTC) bit; and SQWE is ignored on many current systems.
 592	 */
 593	seq_printf(seq,
 594		   "periodic_IRQ\t: %s\n"
 595		   "update_IRQ\t: %s\n"
 596		   "HPET_emulated\t: %s\n"
 597		   // "square_wave\t: %s\n"
 598		   "BCD\t\t: %s\n"
 599		   "DST_enable\t: %s\n"
 600		   "periodic_freq\t: %d\n"
 601		   "batt_status\t: %s\n",
 602		   (rtc_control & RTC_PIE) ? "yes" : "no",
 603		   (rtc_control & RTC_UIE) ? "yes" : "no",
 604		   use_hpet_alarm() ? "yes" : "no",
 605		   // (rtc_control & RTC_SQWE) ? "yes" : "no",
 606		   (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 607		   (rtc_control & RTC_DST_EN) ? "yes" : "no",
 608		   cmos->rtc->irq_freq,
 609		   (valid & RTC_VRT) ? "okay" : "dead");
 610
 611	return 0;
 612}
 613
 614#else
 615#define	cmos_procfs	NULL
 616#endif
 617
 618static const struct rtc_class_ops cmos_rtc_ops = {
 619	.read_time		= cmos_read_time,
 620	.set_time		= cmos_set_time,
 621	.read_alarm		= cmos_read_alarm,
 622	.set_alarm		= cmos_set_alarm,
 623	.proc			= cmos_procfs,
 624	.alarm_irq_enable	= cmos_alarm_irq_enable,
 625};
 626
 627/*----------------------------------------------------------------*/
 628
 629/*
 630 * All these chips have at least 64 bytes of address space, shared by
 631 * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 632 * by boot firmware.  Modern chips have 128 or 256 bytes.
 633 */
 634
 635#define NVRAM_OFFSET	(RTC_REG_D + 1)
 636
 637static int cmos_nvram_read(void *priv, unsigned int off, void *val,
 638			   size_t count)
 639{
 640	unsigned char *buf = val;
 641
 642	off += NVRAM_OFFSET;
 643	for (; count; count--, off++, buf++) {
 644		guard(spinlock_irq)(&rtc_lock);
 645		if (off < 128)
 646			*buf = CMOS_READ(off);
 647		else if (can_bank2)
 648			*buf = cmos_read_bank2(off);
 649		else
 650			return -EIO;
 651	}
 652
 653	return 0;
 654}
 655
 656static int cmos_nvram_write(void *priv, unsigned int off, void *val,
 657			    size_t count)
 658{
 659	struct cmos_rtc	*cmos = priv;
 660	unsigned char	*buf = val;
 661
 662	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 663	 * checksum on part of the NVRAM data.  That's currently ignored
 664	 * here.  If userspace is smart enough to know what fields of
 665	 * NVRAM to update, updating checksums is also part of its job.
 666	 */
 667	off += NVRAM_OFFSET;
 668	for (; count; count--, off++, buf++) {
 669		/* don't trash RTC registers */
 670		if (off == cmos->day_alrm
 671				|| off == cmos->mon_alrm
 672				|| off == cmos->century)
 673			continue;
 674
 675		guard(spinlock_irq)(&rtc_lock);
 676		if (off < 128)
 677			CMOS_WRITE(*buf, off);
 678		else if (can_bank2)
 679			cmos_write_bank2(*buf, off);
 680		else
 681			return -EIO;
 682	}
 683
 684	return 0;
 685}
 686
 687/*----------------------------------------------------------------*/
 688
 689static struct cmos_rtc	cmos_rtc;
 690
 691static irqreturn_t cmos_interrupt(int irq, void *p)
 692{
 693	u8		irqstat;
 694	u8		rtc_control;
 695	unsigned long	flags;
 696
 697	/* We cannot use spin_lock() here, as cmos_interrupt() is also called
 698	 * in a non-irq context.
 699	 */
 700	spin_lock_irqsave(&rtc_lock, flags);
 701
 702	/* When the HPET interrupt handler calls us, the interrupt
 703	 * status is passed as arg1 instead of the irq number.  But
 704	 * always clear irq status, even when HPET is in the way.
 705	 *
 706	 * Note that HPET and RTC are almost certainly out of phase,
 707	 * giving different IRQ status ...
 708	 */
 709	irqstat = CMOS_READ(RTC_INTR_FLAGS);
 710	rtc_control = CMOS_READ(RTC_CONTROL);
 711	if (use_hpet_alarm())
 712		irqstat = (unsigned long)irq & 0xF0;
 713
 714	/* If we were suspended, RTC_CONTROL may not be accurate since the
 715	 * bios may have cleared it.
 716	 */
 717	if (!cmos_rtc.suspend_ctrl)
 718		irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 719	else
 720		irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
 721
 722	/* All Linux RTC alarms should be treated as if they were oneshot.
 723	 * Similar code may be needed in system wakeup paths, in case the
 724	 * alarm woke the system.
 725	 */
 726	if (irqstat & RTC_AIE) {
 727		cmos_rtc.suspend_ctrl &= ~RTC_AIE;
 728		rtc_control &= ~RTC_AIE;
 729		CMOS_WRITE(rtc_control, RTC_CONTROL);
 730		if (use_hpet_alarm())
 731			hpet_mask_rtc_irq_bit(RTC_AIE);
 732		CMOS_READ(RTC_INTR_FLAGS);
 733	}
 734	spin_unlock_irqrestore(&rtc_lock, flags);
 735
 736	if (is_intr(irqstat)) {
 737		rtc_update_irq(p, 1, irqstat);
 738		return IRQ_HANDLED;
 739	} else
 740		return IRQ_NONE;
 741}
 742
 743#ifdef	CONFIG_ACPI
 744
 745#include <linux/acpi.h>
 746
 747static u32 rtc_handler(void *context)
 748{
 749	struct device *dev = context;
 750	struct cmos_rtc *cmos = dev_get_drvdata(dev);
 751	unsigned char rtc_control = 0;
 752	unsigned char rtc_intr;
 753	unsigned long flags;
 754
 755
 756	/*
 757	 * Always update rtc irq when ACPI is used as RTC Alarm.
 758	 * Or else, ACPI SCI is enabled during suspend/resume only,
 759	 * update rtc irq in that case.
 760	 */
 761	if (cmos_use_acpi_alarm())
 762		cmos_interrupt(0, (void *)cmos->rtc);
 763	else {
 764		/* Fix me: can we use cmos_interrupt() here as well? */
 765		spin_lock_irqsave(&rtc_lock, flags);
 766		if (cmos_rtc.suspend_ctrl)
 767			rtc_control = CMOS_READ(RTC_CONTROL);
 768		if (rtc_control & RTC_AIE) {
 769			cmos_rtc.suspend_ctrl &= ~RTC_AIE;
 770			CMOS_WRITE(rtc_control, RTC_CONTROL);
 771			rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 772			rtc_update_irq(cmos->rtc, 1, rtc_intr);
 773		}
 774		spin_unlock_irqrestore(&rtc_lock, flags);
 775	}
 776
 777	pm_wakeup_hard_event(dev);
 778	acpi_clear_event(ACPI_EVENT_RTC);
 779	acpi_disable_event(ACPI_EVENT_RTC, 0);
 780	return ACPI_INTERRUPT_HANDLED;
 781}
 782
 783static void acpi_rtc_event_setup(struct device *dev)
 784{
 785	if (acpi_disabled)
 786		return;
 787
 788	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
 789	/*
 790	 * After the RTC handler is installed, the Fixed_RTC event should
 791	 * be disabled. Only when the RTC alarm is set will it be enabled.
 792	 */
 793	acpi_clear_event(ACPI_EVENT_RTC);
 794	acpi_disable_event(ACPI_EVENT_RTC, 0);
 795}
 796
 797static void acpi_rtc_event_cleanup(void)
 798{
 799	if (acpi_disabled)
 800		return;
 801
 802	acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
 803}
 804
 805static void rtc_wake_on(struct device *dev)
 806{
 807	acpi_clear_event(ACPI_EVENT_RTC);
 808	acpi_enable_event(ACPI_EVENT_RTC, 0);
 809}
 810
 811static void rtc_wake_off(struct device *dev)
 812{
 813	acpi_disable_event(ACPI_EVENT_RTC, 0);
 814}
 815
 816#ifdef CONFIG_X86
 817static void use_acpi_alarm_quirks(void)
 818{
 819	switch (boot_cpu_data.x86_vendor) {
 820	case X86_VENDOR_INTEL:
 821		if (dmi_get_bios_year() < 2015)
 822			return;
 823		break;
 824	case X86_VENDOR_AMD:
 825	case X86_VENDOR_HYGON:
 826		if (dmi_get_bios_year() < 2021)
 827			return;
 828		break;
 829	default:
 830		return;
 831	}
 832	if (!is_hpet_enabled())
 833		return;
 834
 835	use_acpi_alarm = true;
 836}
 837#else
 838static inline void use_acpi_alarm_quirks(void) { }
 839#endif
 840
 841static void acpi_cmos_wake_setup(struct device *dev)
 842{
 843	if (acpi_disabled)
 844		return;
 845
 846	use_acpi_alarm_quirks();
 847
 848	cmos_rtc.wake_on = rtc_wake_on;
 849	cmos_rtc.wake_off = rtc_wake_off;
 850
 851	/* ACPI tables bug workaround. */
 852	if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
 853		dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
 854			acpi_gbl_FADT.month_alarm);
 855		acpi_gbl_FADT.month_alarm = 0;
 856	}
 857
 858	cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
 859	cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
 860	cmos_rtc.century = acpi_gbl_FADT.century;
 861
 862	if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
 863		dev_info(dev, "RTC can wake from S4\n");
 864
 865	/* RTC always wakes from S1/S2/S3, and often S4/STD */
 866	device_init_wakeup(dev, true);
 867}
 868
 869static void cmos_check_acpi_rtc_status(struct device *dev,
 870					      unsigned char *rtc_control)
 871{
 872	struct cmos_rtc *cmos = dev_get_drvdata(dev);
 873	acpi_event_status rtc_status;
 874	acpi_status status;
 875
 876	if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
 877		return;
 878
 879	status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
 880	if (ACPI_FAILURE(status)) {
 881		dev_err(dev, "Could not get RTC status\n");
 882	} else if (rtc_status & ACPI_EVENT_FLAG_SET) {
 883		unsigned char mask;
 884		*rtc_control &= ~RTC_AIE;
 885		CMOS_WRITE(*rtc_control, RTC_CONTROL);
 886		mask = CMOS_READ(RTC_INTR_FLAGS);
 887		rtc_update_irq(cmos->rtc, 1, mask);
 888	}
 889}
 890
 891#else /* !CONFIG_ACPI */
 892
 893static inline void acpi_rtc_event_setup(struct device *dev)
 894{
 895}
 896
 897static inline void acpi_rtc_event_cleanup(void)
 898{
 899}
 900
 901static inline void acpi_cmos_wake_setup(struct device *dev)
 902{
 903}
 904
 905static inline void cmos_check_acpi_rtc_status(struct device *dev,
 906					      unsigned char *rtc_control)
 907{
 908}
 909#endif /* CONFIG_ACPI */
 910
 911#ifdef	CONFIG_PNP
 912#define	INITSECTION
 913
 914#else
 915#define	INITSECTION	__init
 916#endif
 917
 918#define SECS_PER_DAY	(24 * 60 * 60)
 919#define SECS_PER_MONTH	(28 * SECS_PER_DAY)
 920#define SECS_PER_YEAR	(365 * SECS_PER_DAY)
 921
 922static int INITSECTION
 923cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 924{
 925	struct cmos_rtc_board_info	*info = dev_get_platdata(dev);
 926	int				retval = 0;
 927	unsigned char			rtc_control;
 928	unsigned			address_space;
 929	u32				flags = 0;
 930	struct nvmem_config nvmem_cfg = {
 931		.name = "cmos_nvram",
 932		.word_size = 1,
 933		.stride = 1,
 934		.reg_read = cmos_nvram_read,
 935		.reg_write = cmos_nvram_write,
 936		.priv = &cmos_rtc,
 937	};
 938
 939	/* there can be only one ... */
 940	if (cmos_rtc.dev)
 941		return -EBUSY;
 942
 943	if (!ports)
 944		return -ENODEV;
 945
 946	/* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 947	 *
 948	 * REVISIT non-x86 systems may instead use memory space resources
 949	 * (needing ioremap etc), not i/o space resources like this ...
 950	 */
 951	if (RTC_IOMAPPED)
 952		ports = request_region(ports->start, resource_size(ports),
 953				       driver_name);
 954	else
 955		ports = request_mem_region(ports->start, resource_size(ports),
 956					   driver_name);
 957	if (!ports) {
 958		dev_dbg(dev, "i/o registers already in use\n");
 959		return -EBUSY;
 960	}
 961
 962	cmos_rtc.irq = rtc_irq;
 963	cmos_rtc.iomem = ports;
 964
 965	/* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 966	 * driver did, but don't reject unknown configs.   Old hardware
 967	 * won't address 128 bytes.  Newer chips have multiple banks,
 968	 * though they may not be listed in one I/O resource.
 969	 */
 970#if	defined(CONFIG_ATARI)
 971	address_space = 64;
 972#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 973			|| defined(__sparc__) || defined(__mips__) \
 974			|| defined(__powerpc__)
 975	address_space = 128;
 976#else
 977#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 978	address_space = 128;
 979#endif
 980	if (can_bank2 && ports->end > (ports->start + 1))
 981		address_space = 256;
 982
 983	/* For ACPI systems extension info comes from the FADT.  On others,
 984	 * board specific setup provides it as appropriate.  Systems where
 985	 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 986	 * some almost-clones) can provide hooks to make that behave.
 987	 *
 988	 * Note that ACPI doesn't preclude putting these registers into
 989	 * "extended" areas of the chip, including some that we won't yet
 990	 * expect CMOS_READ and friends to handle.
 991	 */
 992	if (info) {
 993		if (info->flags)
 994			flags = info->flags;
 995		if (info->address_space)
 996			address_space = info->address_space;
 997
 998		cmos_rtc.day_alrm = info->rtc_day_alarm;
 999		cmos_rtc.mon_alrm = info->rtc_mon_alarm;
1000		cmos_rtc.century = info->rtc_century;
1001
1002		if (info->wake_on && info->wake_off) {
1003			cmos_rtc.wake_on = info->wake_on;
1004			cmos_rtc.wake_off = info->wake_off;
1005		}
1006	} else {
1007		acpi_cmos_wake_setup(dev);
1008	}
1009
1010	if (cmos_rtc.day_alrm >= 128)
1011		cmos_rtc.day_alrm = 0;
1012
1013	if (cmos_rtc.mon_alrm >= 128)
1014		cmos_rtc.mon_alrm = 0;
1015
1016	if (cmos_rtc.century >= 128)
1017		cmos_rtc.century = 0;
1018
1019	cmos_rtc.dev = dev;
1020	dev_set_drvdata(dev, &cmos_rtc);
1021
1022	cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1023	if (IS_ERR(cmos_rtc.rtc)) {
1024		retval = PTR_ERR(cmos_rtc.rtc);
1025		goto cleanup0;
1026	}
1027
1028	if (cmos_rtc.mon_alrm)
1029		cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1;
1030	else if (cmos_rtc.day_alrm)
1031		cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1;
1032	else
1033		cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1;
1034
1035	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1036
1037	if (!mc146818_does_rtc_work()) {
1038		dev_warn(dev, "broken or not accessible\n");
1039		retval = -ENXIO;
1040		goto cleanup1;
1041	}
1042
1043	spin_lock_irq(&rtc_lock);
1044
1045	if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1046		/* force periodic irq to CMOS reset default of 1024Hz;
1047		 *
1048		 * REVISIT it's been reported that at least one x86_64 ALI
1049		 * mobo doesn't use 32KHz here ... for portability we might
1050		 * need to do something about other clock frequencies.
1051		 */
1052		cmos_rtc.rtc->irq_freq = 1024;
1053		if (use_hpet_alarm())
1054			hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
1055		CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1056	}
1057
1058	/* disable irqs */
1059	if (is_valid_irq(rtc_irq))
1060		cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1061
1062	rtc_control = CMOS_READ(RTC_CONTROL);
1063
1064	spin_unlock_irq(&rtc_lock);
1065
1066	if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1067		dev_warn(dev, "only 24-hr supported\n");
1068		retval = -ENXIO;
1069		goto cleanup1;
1070	}
1071
1072	if (use_hpet_alarm())
1073		hpet_rtc_timer_init();
1074
1075	if (is_valid_irq(rtc_irq)) {
1076		irq_handler_t rtc_cmos_int_handler;
1077
1078		if (use_hpet_alarm()) {
1079			rtc_cmos_int_handler = hpet_rtc_interrupt;
1080			retval = hpet_register_irq_handler(cmos_interrupt);
1081			if (retval) {
1082				hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1083				dev_warn(dev, "hpet_register_irq_handler "
1084						" failed in rtc_init().");
1085				goto cleanup1;
1086			}
1087		} else
1088			rtc_cmos_int_handler = cmos_interrupt;
1089
1090		retval = request_irq(rtc_irq, rtc_cmos_int_handler,
1091				0, dev_name(&cmos_rtc.rtc->dev),
1092				cmos_rtc.rtc);
1093		if (retval < 0) {
1094			dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1095			goto cleanup1;
1096		}
1097	} else {
1098		clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
1099	}
1100
1101	cmos_rtc.rtc->ops = &cmos_rtc_ops;
1102
1103	retval = devm_rtc_register_device(cmos_rtc.rtc);
1104	if (retval)
1105		goto cleanup2;
1106
1107	/* Set the sync offset for the periodic 11min update correct */
1108	cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1109
1110	/* export at least the first block of NVRAM */
1111	nvmem_cfg.size = address_space - NVRAM_OFFSET;
1112	devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
1113
1114	/*
1115	 * Everything has gone well so far, so by default register a handler for
1116	 * the ACPI RTC fixed event.
1117	 */
1118	if (!info)
1119		acpi_rtc_event_setup(dev);
1120
1121	dev_info(dev, "%s%s, %d bytes nvram%s\n",
1122		 !is_valid_irq(rtc_irq) ? "no alarms" :
1123		 cmos_rtc.mon_alrm ? "alarms up to one year" :
1124		 cmos_rtc.day_alrm ? "alarms up to one month" :
1125		 "alarms up to one day",
1126		 cmos_rtc.century ? ", y3k" : "",
1127		 nvmem_cfg.size,
1128		 use_hpet_alarm() ? ", hpet irqs" : "");
1129
1130	return 0;
1131
1132cleanup2:
1133	if (is_valid_irq(rtc_irq))
1134		free_irq(rtc_irq, cmos_rtc.rtc);
1135cleanup1:
1136	cmos_rtc.dev = NULL;
1137cleanup0:
1138	if (RTC_IOMAPPED)
1139		release_region(ports->start, resource_size(ports));
1140	else
1141		release_mem_region(ports->start, resource_size(ports));
1142	return retval;
1143}
1144
1145static void cmos_do_shutdown(int rtc_irq)
1146{
1147	spin_lock_irq(&rtc_lock);
1148	if (is_valid_irq(rtc_irq))
1149		cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
1150	spin_unlock_irq(&rtc_lock);
1151}
1152
1153static void cmos_do_remove(struct device *dev)
1154{
1155	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1156	struct resource *ports;
1157
1158	cmos_do_shutdown(cmos->irq);
1159
1160	if (is_valid_irq(cmos->irq)) {
1161		free_irq(cmos->irq, cmos->rtc);
1162		if (use_hpet_alarm())
1163			hpet_unregister_irq_handler(cmos_interrupt);
1164	}
1165
1166	if (!dev_get_platdata(dev))
1167		acpi_rtc_event_cleanup();
1168
1169	cmos->rtc = NULL;
1170
1171	ports = cmos->iomem;
1172	if (RTC_IOMAPPED)
1173		release_region(ports->start, resource_size(ports));
1174	else
1175		release_mem_region(ports->start, resource_size(ports));
1176	cmos->iomem = NULL;
1177
1178	cmos->dev = NULL;
1179}
1180
1181static int cmos_aie_poweroff(struct device *dev)
1182{
1183	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1184	struct rtc_time now;
1185	time64_t t_now;
1186	int retval = 0;
1187	unsigned char rtc_control;
1188
1189	if (!cmos->alarm_expires)
1190		return -EINVAL;
1191
1192	spin_lock_irq(&rtc_lock);
1193	rtc_control = CMOS_READ(RTC_CONTROL);
1194	spin_unlock_irq(&rtc_lock);
1195
1196	/* We only care about the situation where AIE is disabled. */
1197	if (rtc_control & RTC_AIE)
1198		return -EBUSY;
1199
1200	cmos_read_time(dev, &now);
1201	t_now = rtc_tm_to_time64(&now);
1202
1203	/*
1204	 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1205	 * automatically right after shutdown on some buggy boxes.
1206	 * This automatic rebooting issue won't happen when the alarm
1207	 * time is larger than now+1 seconds.
1208	 *
1209	 * If the alarm time is equal to now+1 seconds, the issue can be
1210	 * prevented by cancelling the alarm.
1211	 */
1212	if (cmos->alarm_expires == t_now + 1) {
1213		struct rtc_wkalrm alarm;
1214
1215		/* Cancel the AIE timer by configuring the past time. */
1216		rtc_time64_to_tm(t_now - 1, &alarm.time);
1217		alarm.enabled = 0;
1218		retval = cmos_set_alarm(dev, &alarm);
1219	} else if (cmos->alarm_expires > t_now + 1) {
1220		retval = -EBUSY;
1221	}
1222
1223	return retval;
1224}
1225
1226static int cmos_suspend(struct device *dev)
1227{
1228	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1229	unsigned char	tmp;
1230
1231	/* only the alarm might be a wakeup event source */
1232	spin_lock_irq(&rtc_lock);
1233	cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1234	if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1235		unsigned char	mask;
1236
1237		if (device_may_wakeup(dev))
1238			mask = RTC_IRQMASK & ~RTC_AIE;
1239		else
1240			mask = RTC_IRQMASK;
1241		tmp &= ~mask;
1242		CMOS_WRITE(tmp, RTC_CONTROL);
1243		if (use_hpet_alarm())
1244			hpet_mask_rtc_irq_bit(mask);
1245		cmos_checkintr(cmos, tmp);
1246	}
1247	spin_unlock_irq(&rtc_lock);
1248
1249	if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1250		cmos->enabled_wake = 1;
1251		if (cmos->wake_on)
1252			cmos->wake_on(dev);
1253		else
1254			enable_irq_wake(cmos->irq);
1255	}
1256
1257	memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1258	cmos_read_alarm(dev, &cmos->saved_wkalrm);
1259
1260	dev_dbg(dev, "suspend%s, ctrl %02x\n",
1261			(tmp & RTC_AIE) ? ", alarm may wake" : "",
1262			tmp);
1263
1264	return 0;
1265}
1266
1267/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1268 * after a detour through G3 "mechanical off", although the ACPI spec
1269 * says wakeup should only work from G1/S4 "hibernate".  To most users,
1270 * distinctions between S4 and S5 are pointless.  So when the hardware
1271 * allows, don't draw that distinction.
1272 */
1273static inline int cmos_poweroff(struct device *dev)
1274{
1275	if (!IS_ENABLED(CONFIG_PM))
1276		return -ENOSYS;
1277
1278	return cmos_suspend(dev);
1279}
1280
1281static void cmos_check_wkalrm(struct device *dev)
1282{
1283	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1284	struct rtc_wkalrm current_alarm;
1285	time64_t t_now;
1286	time64_t t_current_expires;
1287	time64_t t_saved_expires;
1288	struct rtc_time now;
1289
1290	/* Check if we have RTC Alarm armed */
1291	if (!(cmos->suspend_ctrl & RTC_AIE))
1292		return;
1293
1294	cmos_read_time(dev, &now);
1295	t_now = rtc_tm_to_time64(&now);
1296
1297	/*
1298	 * ACPI RTC wake event is cleared after resume from STR,
1299	 * ACK the rtc irq here
1300	 */
1301	if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1302		cmos_interrupt(0, (void *)cmos->rtc);
1303		return;
1304	}
1305
1306	memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
1307	cmos_read_alarm(dev, &current_alarm);
1308	t_current_expires = rtc_tm_to_time64(&current_alarm.time);
1309	t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1310	if (t_current_expires != t_saved_expires ||
1311	    cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1312		cmos_set_alarm(dev, &cmos->saved_wkalrm);
1313	}
1314}
1315
1316static int __maybe_unused cmos_resume(struct device *dev)
1317{
1318	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1319	unsigned char tmp;
1320
1321	if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1322		if (cmos->wake_off)
1323			cmos->wake_off(dev);
1324		else
1325			disable_irq_wake(cmos->irq);
1326		cmos->enabled_wake = 0;
1327	}
1328
1329	/* The BIOS might have changed the alarm, restore it */
1330	cmos_check_wkalrm(dev);
1331
1332	spin_lock_irq(&rtc_lock);
1333	tmp = cmos->suspend_ctrl;
1334	cmos->suspend_ctrl = 0;
1335	/* re-enable any irqs previously active */
1336	if (tmp & RTC_IRQMASK) {
1337		unsigned char	mask;
1338
1339		if (device_may_wakeup(dev) && use_hpet_alarm())
1340			hpet_rtc_timer_init();
1341
1342		do {
1343			CMOS_WRITE(tmp, RTC_CONTROL);
1344			if (use_hpet_alarm())
1345				hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1346
1347			mask = CMOS_READ(RTC_INTR_FLAGS);
1348			mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1349			if (!use_hpet_alarm() || !is_intr(mask))
1350				break;
1351
1352			/* force one-shot behavior if HPET blocked
1353			 * the wake alarm's irq
1354			 */
1355			rtc_update_irq(cmos->rtc, 1, mask);
1356			tmp &= ~RTC_AIE;
1357			hpet_mask_rtc_irq_bit(RTC_AIE);
1358		} while (mask & RTC_AIE);
1359
1360		if (tmp & RTC_AIE)
1361			cmos_check_acpi_rtc_status(dev, &tmp);
1362	}
1363	spin_unlock_irq(&rtc_lock);
1364
1365	dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1366
1367	return 0;
1368}
1369
1370static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1371
1372/*----------------------------------------------------------------*/
1373
1374/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1375 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1376 * probably list them in similar PNPBIOS tables; so PNP is more common.
1377 *
1378 * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
1379 * predate even PNPBIOS should set up platform_bus devices.
1380 */
1381
1382#ifdef	CONFIG_PNP
1383
1384#include <linux/pnp.h>
1385
1386static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1387{
1388	int irq;
1389
1390	if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1391		irq = 0;
1392#ifdef CONFIG_X86
1393		/* Some machines contain a PNP entry for the RTC, but
1394		 * don't define the IRQ. It should always be safe to
1395		 * hardcode it on systems with a legacy PIC.
1396		 */
1397		if (nr_legacy_irqs())
1398			irq = RTC_IRQ;
1399#endif
1400	} else {
1401		irq = pnp_irq(pnp, 0);
1402	}
1403
1404	return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1405}
1406
1407static void cmos_pnp_remove(struct pnp_dev *pnp)
1408{
1409	cmos_do_remove(&pnp->dev);
1410}
1411
1412static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1413{
1414	struct device *dev = &pnp->dev;
1415	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1416
1417	if (system_state == SYSTEM_POWER_OFF) {
1418		int retval = cmos_poweroff(dev);
1419
1420		if (cmos_aie_poweroff(dev) < 0 && !retval)
1421			return;
1422	}
1423
1424	cmos_do_shutdown(cmos->irq);
1425}
1426
1427static const struct pnp_device_id rtc_ids[] = {
1428	{ .id = "PNP0b00", },
1429	{ .id = "PNP0b01", },
1430	{ .id = "PNP0b02", },
1431	{ },
1432};
1433MODULE_DEVICE_TABLE(pnp, rtc_ids);
1434
1435static struct pnp_driver cmos_pnp_driver = {
1436	.name		= driver_name,
1437	.id_table	= rtc_ids,
1438	.probe		= cmos_pnp_probe,
1439	.remove		= cmos_pnp_remove,
1440	.shutdown	= cmos_pnp_shutdown,
1441
1442	/* flag ensures resume() gets called, and stops syslog spam */
1443	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
1444	.driver		= {
1445			.pm = &cmos_pm_ops,
1446	},
1447};
1448
1449#endif	/* CONFIG_PNP */
1450
1451#ifdef CONFIG_OF
1452static const struct of_device_id of_cmos_match[] = {
1453	{
1454		.compatible = "motorola,mc146818",
1455	},
1456	{ },
1457};
1458MODULE_DEVICE_TABLE(of, of_cmos_match);
1459
1460static __init void cmos_of_init(struct platform_device *pdev)
1461{
1462	struct device_node *node = pdev->dev.of_node;
1463	const __be32 *val;
1464
1465	if (!node)
1466		return;
1467
1468	val = of_get_property(node, "ctrl-reg", NULL);
1469	if (val)
1470		CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1471
1472	val = of_get_property(node, "freq-reg", NULL);
1473	if (val)
1474		CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1475}
1476#else
1477static inline void cmos_of_init(struct platform_device *pdev) {}
1478#endif
1479/*----------------------------------------------------------------*/
1480
1481/* Platform setup should have set up an RTC device, when PNP is
1482 * unavailable ... this could happen even on (older) PCs.
1483 */
1484
1485static int __init cmos_platform_probe(struct platform_device *pdev)
1486{
1487	struct resource *resource;
1488	int irq;
1489
1490	cmos_of_init(pdev);
1491
1492	if (RTC_IOMAPPED)
1493		resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1494	else
1495		resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1496	irq = platform_get_irq(pdev, 0);
1497	if (irq < 0)
1498		irq = -1;
1499
1500	return cmos_do_probe(&pdev->dev, resource, irq);
1501}
1502
1503static void cmos_platform_remove(struct platform_device *pdev)
1504{
1505	cmos_do_remove(&pdev->dev);
1506}
1507
1508static void cmos_platform_shutdown(struct platform_device *pdev)
1509{
1510	struct device *dev = &pdev->dev;
1511	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1512
1513	if (system_state == SYSTEM_POWER_OFF) {
1514		int retval = cmos_poweroff(dev);
1515
1516		if (cmos_aie_poweroff(dev) < 0 && !retval)
1517			return;
1518	}
1519
1520	cmos_do_shutdown(cmos->irq);
1521}
1522
1523/* work with hotplug and coldplug */
1524MODULE_ALIAS("platform:rtc_cmos");
1525
1526static struct platform_driver cmos_platform_driver = {
1527	.remove		= cmos_platform_remove,
1528	.shutdown	= cmos_platform_shutdown,
1529	.driver = {
1530		.name		= driver_name,
1531		.pm		= &cmos_pm_ops,
1532		.of_match_table = of_match_ptr(of_cmos_match),
1533	}
1534};
1535
1536#ifdef CONFIG_PNP
1537static bool pnp_driver_registered;
1538#endif
1539static bool platform_driver_registered;
1540
1541static int __init cmos_init(void)
1542{
1543	int retval = 0;
1544
1545#ifdef	CONFIG_PNP
1546	retval = pnp_register_driver(&cmos_pnp_driver);
1547	if (retval == 0)
1548		pnp_driver_registered = true;
1549#endif
1550
1551	if (!cmos_rtc.dev) {
1552		retval = platform_driver_probe(&cmos_platform_driver,
1553					       cmos_platform_probe);
1554		if (retval == 0)
1555			platform_driver_registered = true;
1556	}
1557
1558	if (retval == 0)
1559		return 0;
1560
1561#ifdef	CONFIG_PNP
1562	if (pnp_driver_registered)
1563		pnp_unregister_driver(&cmos_pnp_driver);
1564#endif
1565	return retval;
1566}
1567module_init(cmos_init);
1568
1569static void __exit cmos_exit(void)
1570{
1571#ifdef	CONFIG_PNP
1572	if (pnp_driver_registered)
1573		pnp_unregister_driver(&cmos_pnp_driver);
1574#endif
1575	if (platform_driver_registered)
1576		platform_driver_unregister(&cmos_platform_driver);
1577}
1578module_exit(cmos_exit);
1579
1580
1581MODULE_AUTHOR("David Brownell");
1582MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1583MODULE_LICENSE("GPL");