xlnx_r5_remoteproc.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * ZynqMP R5 Remote Processor driver
   4 *
   5 */
   6
   7#include <dt-bindings/power/xlnx-zynqmp-power.h>
   8#include <linux/dma-mapping.h>
   9#include <linux/firmware/xlnx-zynqmp.h>
  10#include <linux/kernel.h>
  11#include <linux/mailbox_client.h>
  12#include <linux/mailbox/zynqmp-ipi-message.h>
  13#include <linux/module.h>
  14#include <linux/of_address.h>
  15#include <linux/of_platform.h>
  16#include <linux/of_reserved_mem.h>
  17#include <linux/platform_device.h>
  18#include <linux/remoteproc.h>
  19
  20#include "remoteproc_internal.h"
  21
  22/* IPI buffer MAX length */
  23#define IPI_BUF_LEN_MAX	32U
  24
  25/* RX mailbox client buffer max length */
  26#define MBOX_CLIENT_BUF_MAX	(IPI_BUF_LEN_MAX + \
  27				 sizeof(struct zynqmp_ipi_message))
  28
  29#define RSC_TBL_XLNX_MAGIC	((uint32_t)'x' << 24 | (uint32_t)'a' << 16 | \
  30				 (uint32_t)'m' << 8 | (uint32_t)'p')
  31
  32/*
  33 * settings for RPU cluster mode which
  34 * reflects possible values of xlnx,cluster-mode dt-property
  35 */
  36enum zynqmp_r5_cluster_mode {
  37	SPLIT_MODE = 0, /* When cores run as separate processor */
  38	LOCKSTEP_MODE = 1, /* cores execute same code in lockstep,clk-for-clk */
  39	SINGLE_CPU_MODE = 2, /* core0 is held in reset and only core1 runs */
  40};
  41
  42/**
  43 * struct mem_bank_data - Memory Bank description
  44 *
  45 * @addr: Start address of memory bank
  46 * @da: device address
  47 * @size: Size of Memory bank
  48 * @pm_domain_id: Power-domains id of memory bank for firmware to turn on/off
  49 * @bank_name: name of the bank for remoteproc framework
  50 */
  51struct mem_bank_data {
  52	phys_addr_t addr;
  53	u32 da;
  54	size_t size;
  55	u32 pm_domain_id;
  56	char *bank_name;
  57};
  58
  59/**
  60 * struct zynqmp_sram_bank - sram bank description
  61 *
  62 * @sram_res: sram address region information
  63 * @da: device address of sram
  64 */
  65struct zynqmp_sram_bank {
  66	struct resource sram_res;
  67	u32 da;
  68};
  69
  70/**
  71 * struct mbox_info - mailbox channel data
  72 *
  73 * @rx_mc_buf: to copy data from mailbox rx channel
  74 * @tx_mc_buf: to copy data to mailbox tx channel
  75 * @r5_core: this mailbox's corresponding r5_core pointer
  76 * @mbox_work: schedule work after receiving data from mailbox
  77 * @mbox_cl: mailbox client
  78 * @tx_chan: mailbox tx channel
  79 * @rx_chan: mailbox rx channel
  80 */
  81struct mbox_info {
  82	unsigned char rx_mc_buf[MBOX_CLIENT_BUF_MAX];
  83	unsigned char tx_mc_buf[MBOX_CLIENT_BUF_MAX];
  84	struct zynqmp_r5_core *r5_core;
  85	struct work_struct mbox_work;
  86	struct mbox_client mbox_cl;
  87	struct mbox_chan *tx_chan;
  88	struct mbox_chan *rx_chan;
  89};
  90
  91/**
  92 * struct rsc_tbl_data - resource table metadata
  93 *
  94 * Platform specific data structure used to sync resource table address.
  95 * It's important to maintain order and size of each field on remote side.
  96 *
  97 * @version: version of data structure
  98 * @magic_num: 32-bit magic number.
  99 * @comp_magic_num: complement of above magic number
 100 * @rsc_tbl_size: resource table size
 101 * @rsc_tbl: resource table address
 102 */
 103struct rsc_tbl_data {
 104	const int version;
 105	const u32 magic_num;
 106	const u32 comp_magic_num;
 107	const u32 rsc_tbl_size;
 108	const uintptr_t rsc_tbl;
 109} __packed;
 110
 111/*
 112 * Hardcoded TCM bank values. This will stay in driver to maintain backward
 113 * compatibility with device-tree that does not have TCM information.
 114 */
 115static const struct mem_bank_data zynqmp_tcm_banks_split[] = {
 116	{0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */
 117	{0xffe20000UL, 0x20000, 0x10000UL, PD_R5_0_BTCM, "btcm0"},
 118	{0xffe90000UL, 0x0, 0x10000UL, PD_R5_1_ATCM, "atcm1"},
 119	{0xffeb0000UL, 0x20000, 0x10000UL, PD_R5_1_BTCM, "btcm1"},
 120};
 121
 122/* In lockstep mode cluster uses each 64KB TCM from second core as well */
 123static const struct mem_bank_data zynqmp_tcm_banks_lockstep[] = {
 124	{0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */
 125	{0xffe20000UL, 0x20000, 0x10000UL, PD_R5_0_BTCM, "btcm0"},
 126	{0xffe10000UL, 0x10000, 0x10000UL, PD_R5_1_ATCM, "atcm1"},
 127	{0xffe30000UL, 0x30000, 0x10000UL, PD_R5_1_BTCM, "btcm1"},
 128};
 129
 130/**
 131 * struct zynqmp_r5_core - remoteproc core's internal data
 132 *
 133 * @rsc_tbl_va: resource table virtual address
 134 * @sram: Array of sram memories assigned to this core
 135 * @num_sram: number of sram for this core
 136 * @dev: device of RPU instance
 137 * @np: device node of RPU instance
 138 * @tcm_bank_count: number TCM banks accessible to this RPU
 139 * @tcm_banks: array of each TCM bank data
 140 * @rproc: rproc handle
 141 * @rsc_tbl_size: resource table size retrieved from remote
 142 * @pm_domain_id: RPU CPU power domain id
 143 * @ipi: pointer to mailbox information
 144 */
 145struct zynqmp_r5_core {
 146	void __iomem *rsc_tbl_va;
 147	struct zynqmp_sram_bank *sram;
 148	int num_sram;
 149	struct device *dev;
 150	struct device_node *np;
 151	int tcm_bank_count;
 152	struct mem_bank_data **tcm_banks;
 153	struct rproc *rproc;
 154	u32 rsc_tbl_size;
 155	u32 pm_domain_id;
 156	struct mbox_info *ipi;
 157};
 158
 159/**
 160 * struct zynqmp_r5_cluster - remoteproc cluster's internal data
 161 *
 162 * @dev: r5f subsystem cluster device node
 163 * @mode: cluster mode of type zynqmp_r5_cluster_mode
 164 * @core_count: number of r5 cores used for this cluster mode
 165 * @r5_cores: Array of pointers pointing to r5 core
 166 */
 167struct zynqmp_r5_cluster {
 168	struct device *dev;
 169	enum  zynqmp_r5_cluster_mode mode;
 170	int core_count;
 171	struct zynqmp_r5_core **r5_cores;
 172};
 173
 174/**
 175 * event_notified_idr_cb() - callback for vq_interrupt per notifyid
 176 * @id: rproc->notify id
 177 * @ptr: pointer to idr private data
 178 * @data: data passed to idr_for_each callback
 179 *
 180 * Pass notification to remoteproc virtio
 181 *
 182 * Return: 0. having return is to satisfy the idr_for_each() function
 183 *          pointer input argument requirement.
 184 **/
 185static int event_notified_idr_cb(int id, void *ptr, void *data)
 186{
 187	struct rproc *rproc = data;
 188
 189	if (rproc_vq_interrupt(rproc, id) == IRQ_NONE)
 190		dev_dbg(&rproc->dev, "data not found for vqid=%d\n", id);
 191
 192	return 0;
 193}
 194
 195/**
 196 * handle_event_notified() - remoteproc notification work function
 197 * @work: pointer to the work structure
 198 *
 199 * It checks each registered remoteproc notify IDs.
 200 */
 201static void handle_event_notified(struct work_struct *work)
 202{
 203	struct mbox_info *ipi;
 204	struct rproc *rproc;
 205
 206	ipi = container_of(work, struct mbox_info, mbox_work);
 207	rproc = ipi->r5_core->rproc;
 208
 209	/*
 210	 * We only use IPI for interrupt. The RPU firmware side may or may
 211	 * not write the notifyid when it trigger IPI.
 212	 * And thus, we scan through all the registered notifyids and
 213	 * find which one is valid to get the message.
 214	 * Even if message from firmware is NULL, we attempt to get vqid
 215	 */
 216	idr_for_each(&rproc->notifyids, event_notified_idr_cb, rproc);
 217}
 218
 219/**
 220 * zynqmp_r5_mb_rx_cb() - receive channel mailbox callback
 221 * @cl: mailbox client
 222 * @msg: message pointer
 223 *
 224 * Receive data from ipi buffer, ack interrupt and then
 225 * it will schedule the R5 notification work.
 226 */
 227static void zynqmp_r5_mb_rx_cb(struct mbox_client *cl, void *msg)
 228{
 229	struct zynqmp_ipi_message *ipi_msg, *buf_msg;
 230	struct mbox_info *ipi;
 231	size_t len;
 232
 233	ipi = container_of(cl, struct mbox_info, mbox_cl);
 234
 235	/* copy data from ipi buffer to r5_core */
 236	ipi_msg = (struct zynqmp_ipi_message *)msg;
 237	buf_msg = (struct zynqmp_ipi_message *)ipi->rx_mc_buf;
 238	len = ipi_msg->len;
 239	if (len > IPI_BUF_LEN_MAX) {
 240		dev_warn(cl->dev, "msg size exceeded than %d\n",
 241			 IPI_BUF_LEN_MAX);
 242		len = IPI_BUF_LEN_MAX;
 243	}
 244	buf_msg->len = len;
 245	memcpy(buf_msg->data, ipi_msg->data, len);
 246
 247	/* received and processed interrupt ack */
 248	if (mbox_send_message(ipi->rx_chan, NULL) < 0)
 249		dev_err(cl->dev, "ack failed to mbox rx_chan\n");
 250
 251	schedule_work(&ipi->mbox_work);
 252}
 253
 254/**
 255 * zynqmp_r5_setup_mbox() - Setup mailboxes related properties
 256 *			    this is used for each individual R5 core
 257 *
 258 * @cdev: child node device
 259 *
 260 * Function to setup mailboxes related properties
 261 * return : NULL if failed else pointer to mbox_info
 262 */
 263static struct mbox_info *zynqmp_r5_setup_mbox(struct device *cdev)
 264{
 265	struct mbox_client *mbox_cl;
 266	struct mbox_info *ipi;
 267
 268	ipi = kzalloc(sizeof(*ipi), GFP_KERNEL);
 269	if (!ipi)
 270		return NULL;
 271
 272	mbox_cl = &ipi->mbox_cl;
 273	mbox_cl->rx_callback = zynqmp_r5_mb_rx_cb;
 274	mbox_cl->tx_block = false;
 275	mbox_cl->knows_txdone = false;
 276	mbox_cl->tx_done = NULL;
 277	mbox_cl->dev = cdev;
 278
 279	/* Request TX and RX channels */
 280	ipi->tx_chan = mbox_request_channel_byname(mbox_cl, "tx");
 281	if (IS_ERR(ipi->tx_chan)) {
 282		ipi->tx_chan = NULL;
 283		kfree(ipi);
 284		dev_warn(cdev, "mbox tx channel request failed\n");
 285		return NULL;
 286	}
 287
 288	ipi->rx_chan = mbox_request_channel_byname(mbox_cl, "rx");
 289	if (IS_ERR(ipi->rx_chan)) {
 290		mbox_free_channel(ipi->tx_chan);
 291		ipi->rx_chan = NULL;
 292		ipi->tx_chan = NULL;
 293		kfree(ipi);
 294		dev_warn(cdev, "mbox rx channel request failed\n");
 295		return NULL;
 296	}
 297
 298	INIT_WORK(&ipi->mbox_work, handle_event_notified);
 299
 300	return ipi;
 301}
 302
 303static void zynqmp_r5_free_mbox(struct mbox_info *ipi)
 304{
 305	if (!ipi)
 306		return;
 307
 308	if (ipi->tx_chan) {
 309		mbox_free_channel(ipi->tx_chan);
 310		ipi->tx_chan = NULL;
 311	}
 312
 313	if (ipi->rx_chan) {
 314		mbox_free_channel(ipi->rx_chan);
 315		ipi->rx_chan = NULL;
 316	}
 317
 318	kfree(ipi);
 319}
 320
 321/*
 322 * zynqmp_r5_core_kick() - kick a firmware if mbox is provided
 323 * @rproc: r5 core's corresponding rproc structure
 324 * @vqid: virtqueue ID
 325 */
 326static void zynqmp_r5_rproc_kick(struct rproc *rproc, int vqid)
 327{
 328	struct zynqmp_r5_core *r5_core = rproc->priv;
 329	struct device *dev = r5_core->dev;
 330	struct zynqmp_ipi_message *mb_msg;
 331	struct mbox_info *ipi;
 332	int ret;
 333
 334	ipi = r5_core->ipi;
 335	if (!ipi)
 336		return;
 337
 338	mb_msg = (struct zynqmp_ipi_message *)ipi->tx_mc_buf;
 339	memcpy(mb_msg->data, &vqid, sizeof(vqid));
 340	mb_msg->len = sizeof(vqid);
 341	ret = mbox_send_message(ipi->tx_chan, mb_msg);
 342	if (ret < 0)
 343		dev_warn(dev, "failed to send message\n");
 344}
 345
 346/*
 347 * zynqmp_r5_rproc_start()
 348 * @rproc: single R5 core's corresponding rproc instance
 349 *
 350 * Start R5 Core from designated boot address.
 351 *
 352 * return 0 on success, otherwise non-zero value on failure
 353 */
 354static int zynqmp_r5_rproc_start(struct rproc *rproc)
 355{
 356	struct zynqmp_r5_core *r5_core = rproc->priv;
 357	enum rpu_boot_mem bootmem;
 358	int ret;
 359
 360	/*
 361	 * The exception vector pointers (EVP) refer to the base-address of
 362	 * exception vectors (for reset, IRQ, FIQ, etc). The reset-vector
 363	 * starts at the base-address and subsequent vectors are on 4-byte
 364	 * boundaries.
 365	 *
 366	 * Exception vectors can start either from 0x0000_0000 (LOVEC) or
 367	 * from 0xFFFF_0000 (HIVEC) which is mapped in the OCM (On-Chip Memory)
 368	 *
 369	 * Usually firmware will put Exception vectors at LOVEC.
 370	 *
 371	 * It is not recommend that you change the exception vector.
 372	 * Changing the EVP to HIVEC will result in increased interrupt latency
 373	 * and jitter. Also, if the OCM is secured and the Cortex-R5F processor
 374	 * is non-secured, then the Cortex-R5F processor cannot access the
 375	 * HIVEC exception vectors in the OCM.
 376	 */
 377	bootmem = (rproc->bootaddr >= 0xFFFC0000) ?
 378		   PM_RPU_BOOTMEM_HIVEC : PM_RPU_BOOTMEM_LOVEC;
 379
 380	dev_dbg(r5_core->dev, "RPU boot addr 0x%llx from %s.", rproc->bootaddr,
 381		bootmem == PM_RPU_BOOTMEM_HIVEC ? "OCM" : "TCM");
 382
 383	/* Request node before starting RPU core if new version of API is supported */
 384	if (zynqmp_pm_feature(PM_REQUEST_NODE) > 1) {
 385		ret = zynqmp_pm_request_node(r5_core->pm_domain_id,
 386					     ZYNQMP_PM_CAPABILITY_ACCESS, 0,
 387					     ZYNQMP_PM_REQUEST_ACK_BLOCKING);
 388		if (ret < 0) {
 389			dev_err(r5_core->dev, "failed to request 0x%x",
 390				r5_core->pm_domain_id);
 391			return ret;
 392		}
 393	}
 394
 395	ret = zynqmp_pm_request_wake(r5_core->pm_domain_id, 1,
 396				     bootmem, ZYNQMP_PM_REQUEST_ACK_NO);
 397	if (ret)
 398		dev_err(r5_core->dev,
 399			"failed to start RPU = 0x%x\n", r5_core->pm_domain_id);
 400	return ret;
 401}
 402
 403/*
 404 * zynqmp_r5_rproc_stop()
 405 * @rproc: single R5 core's corresponding rproc instance
 406 *
 407 * Power down  R5 Core.
 408 *
 409 * return 0 on success, otherwise non-zero value on failure
 410 */
 411static int zynqmp_r5_rproc_stop(struct rproc *rproc)
 412{
 413	struct zynqmp_r5_core *r5_core = rproc->priv;
 414	int ret;
 415
 416	/* Use release node API to stop core if new version of API is supported */
 417	if (zynqmp_pm_feature(PM_RELEASE_NODE) > 1) {
 418		ret = zynqmp_pm_release_node(r5_core->pm_domain_id);
 419		if (ret)
 420			dev_err(r5_core->dev, "failed to stop remoteproc RPU %d\n", ret);
 421		return ret;
 422	}
 423
 424	/*
 425	 * Check expected version of EEMI call before calling it. This avoids
 426	 * any error or warning prints from firmware as it is expected that fw
 427	 * doesn't support it.
 428	 */
 429	if (zynqmp_pm_feature(PM_FORCE_POWERDOWN) != 1) {
 430		dev_dbg(r5_core->dev, "EEMI interface %d ver 1 not supported\n",
 431			PM_FORCE_POWERDOWN);
 432		return -EOPNOTSUPP;
 433	}
 434
 435	/* maintain force pwr down for backward compatibility */
 436	ret = zynqmp_pm_force_pwrdwn(r5_core->pm_domain_id,
 437				     ZYNQMP_PM_REQUEST_ACK_BLOCKING);
 438	if (ret)
 439		dev_err(r5_core->dev, "core force power down failed\n");
 440
 441	return ret;
 442}
 443
 444/*
 445 * zynqmp_r5_mem_region_map()
 446 * @rproc: single R5 core's corresponding rproc instance
 447 * @mem: mem descriptor to map reserved memory-regions
 448 *
 449 * Callback to map va for memory-region's carveout.
 450 *
 451 * return 0 on success, otherwise non-zero value on failure
 452 */
 453static int zynqmp_r5_mem_region_map(struct rproc *rproc,
 454				    struct rproc_mem_entry *mem)
 455{
 456	void __iomem *va;
 457
 458	va = ioremap_wc(mem->dma, mem->len);
 459	if (IS_ERR_OR_NULL(va))
 460		return -ENOMEM;
 461
 462	mem->va = (void *)va;
 463
 464	return 0;
 465}
 466
 467/*
 468 * zynqmp_r5_rproc_mem_unmap
 469 * @rproc: single R5 core's corresponding rproc instance
 470 * @mem: mem entry to unmap
 471 *
 472 * Unmap memory-region carveout
 473 *
 474 * return: always returns 0
 475 */
 476static int zynqmp_r5_mem_region_unmap(struct rproc *rproc,
 477				      struct rproc_mem_entry *mem)
 478{
 479	iounmap((void __iomem *)mem->va);
 480	return 0;
 481}
 482
 483/*
 484 * add_mem_regions_carveout()
 485 * @rproc: single R5 core's corresponding rproc instance
 486 *
 487 * Construct rproc mem carveouts from memory-region property nodes
 488 *
 489 * return 0 on success, otherwise non-zero value on failure
 490 */
 491static int add_mem_regions_carveout(struct rproc *rproc)
 492{
 493	struct rproc_mem_entry *rproc_mem;
 494	struct zynqmp_r5_core *r5_core;
 495	int i = 0;
 496
 497	r5_core = rproc->priv;
 498
 499	/* Register associated reserved memory regions */
 500	while (1) {
 501		int err;
 502		struct resource res;
 503
 504		err = of_reserved_mem_region_to_resource(r5_core->np, i, &res);
 505		if (err)
 506			return 0;
 507
 508		if (strstarts(res.name, "vdev0buffer")) {
 509			/* Init reserved memory for vdev buffer */
 510			rproc_mem = rproc_of_resm_mem_entry_init(&rproc->dev, i,
 511								 resource_size(&res),
 512								 res.start,
 513								 "vdev0buffer");
 514		} else {
 515			/* Register associated reserved memory regions */
 516			rproc_mem = rproc_mem_entry_init(&rproc->dev, NULL,
 517							 (dma_addr_t)res.start,
 518							 resource_size(&res), res.start,
 519							 zynqmp_r5_mem_region_map,
 520							 zynqmp_r5_mem_region_unmap,
 521							 "%.*s",
 522							 strchrnul(res.name, '@') - res.name,
 523							 res.name);
 524		}
 525
 526		if (!rproc_mem)
 527			return -ENOMEM;
 528
 529		rproc_add_carveout(rproc, rproc_mem);
 530		rproc_coredump_add_segment(rproc, res.start, resource_size(&res));
 531
 532		dev_dbg(&rproc->dev, "reserved mem carveout %pR\n", &res);
 533		i++;
 534	}
 535}
 536
 537static int add_sram_carveouts(struct rproc *rproc)
 538{
 539	struct zynqmp_r5_core *r5_core = rproc->priv;
 540	struct rproc_mem_entry *rproc_mem;
 541	struct zynqmp_sram_bank *sram;
 542	dma_addr_t dma_addr;
 543	size_t len;
 544	int da, i;
 545
 546	for (i = 0; i < r5_core->num_sram; i++) {
 547		sram = &r5_core->sram[i];
 548
 549		dma_addr = (dma_addr_t)sram->sram_res.start;
 550
 551		len = resource_size(&sram->sram_res);
 552		da = sram->da;
 553
 554		rproc_mem = rproc_mem_entry_init(&rproc->dev, NULL,
 555						 dma_addr,
 556						 len, da,
 557						 zynqmp_r5_mem_region_map,
 558						 zynqmp_r5_mem_region_unmap,
 559						 sram->sram_res.name);
 560		if (!rproc_mem) {
 561			dev_err(&rproc->dev, "failed to add sram %s da=0x%x, size=0x%lx",
 562				sram->sram_res.name, da, len);
 563			return -ENOMEM;
 564		}
 565
 566		rproc_add_carveout(rproc, rproc_mem);
 567		rproc_coredump_add_segment(rproc, da, len);
 568
 569		dev_dbg(&rproc->dev, "sram carveout %s addr=%llx, da=0x%x, size=0x%lx",
 570			sram->sram_res.name, dma_addr, da, len);
 571	}
 572
 573	return 0;
 574}
 575
 576/*
 577 * tcm_mem_unmap()
 578 * @rproc: single R5 core's corresponding rproc instance
 579 * @mem: tcm mem entry to unmap
 580 *
 581 * Unmap TCM banks when powering down R5 core.
 582 *
 583 * return always 0
 584 */
 585static int tcm_mem_unmap(struct rproc *rproc, struct rproc_mem_entry *mem)
 586{
 587	iounmap((void __iomem *)mem->va);
 588
 589	return 0;
 590}
 591
 592/*
 593 * tcm_mem_map()
 594 * @rproc: single R5 core's corresponding rproc instance
 595 * @mem: tcm memory entry descriptor
 596 *
 597 * Given TCM bank entry, this func setup virtual address for TCM bank
 598 * remoteproc carveout. It also takes care of va to da address translation
 599 *
 600 * return 0 on success, otherwise non-zero value on failure
 601 */
 602static int tcm_mem_map(struct rproc *rproc,
 603		       struct rproc_mem_entry *mem)
 604{
 605	void __iomem *va;
 606
 607	va = ioremap_wc(mem->dma, mem->len);
 608	if (IS_ERR_OR_NULL(va))
 609		return -ENOMEM;
 610
 611	/* Update memory entry va */
 612	mem->va = (void *)va;
 613
 614	/* clear TCMs */
 615	memset_io(va, 0, mem->len);
 616
 617	return 0;
 618}
 619
 620/*
 621 * add_tcm_banks()
 622 * @rproc: single R5 core's corresponding rproc instance
 623 *
 624 * allocate and add remoteproc carveout for TCM memory
 625 *
 626 * return 0 on success, otherwise non-zero value on failure
 627 */
 628static int add_tcm_banks(struct rproc *rproc)
 629{
 630	struct rproc_mem_entry *rproc_mem;
 631	struct zynqmp_r5_core *r5_core;
 632	int i, num_banks, ret;
 633	phys_addr_t bank_addr;
 634	struct device *dev;
 635	u32 pm_domain_id;
 636	size_t bank_size;
 637	char *bank_name;
 638	u32 da;
 639
 640	r5_core = rproc->priv;
 641	dev = r5_core->dev;
 642	num_banks = r5_core->tcm_bank_count;
 643
 644	/*
 645	 * Power-on Each 64KB TCM,
 646	 * register its address space, map and unmap functions
 647	 * and add carveouts accordingly
 648	 */
 649	for (i = 0; i < num_banks; i++) {
 650		bank_addr = r5_core->tcm_banks[i]->addr;
 651		da = r5_core->tcm_banks[i]->da;
 652		bank_name = r5_core->tcm_banks[i]->bank_name;
 653		bank_size = r5_core->tcm_banks[i]->size;
 654		pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id;
 655
 656		ret = zynqmp_pm_request_node(pm_domain_id,
 657					     ZYNQMP_PM_CAPABILITY_ACCESS, 0,
 658					     ZYNQMP_PM_REQUEST_ACK_BLOCKING);
 659		if (ret < 0) {
 660			dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id);
 661			goto release_tcm;
 662		}
 663
 664		dev_dbg(dev, "TCM carveout %s addr=%llx, da=0x%x, size=0x%lx",
 665			bank_name, bank_addr, da, bank_size);
 666
 667		/*
 668		 * In DETACHED state firmware is already running so no need to
 669		 * request add TCM registers. However, request TCM PD node to let
 670		 * platform management firmware know that TCM is in use.
 671		 */
 672		if (rproc->state == RPROC_DETACHED)
 673			continue;
 674
 675		rproc_mem = rproc_mem_entry_init(dev, NULL, bank_addr,
 676						 bank_size, da,
 677						 tcm_mem_map, tcm_mem_unmap,
 678						 bank_name);
 679		if (!rproc_mem) {
 680			ret = -ENOMEM;
 681			zynqmp_pm_release_node(pm_domain_id);
 682			goto release_tcm;
 683		}
 684
 685		rproc_add_carveout(rproc, rproc_mem);
 686		rproc_coredump_add_segment(rproc, da, bank_size);
 687	}
 688
 689	return 0;
 690
 691release_tcm:
 692	/* If failed, Turn off all TCM banks turned on before */
 693	for (i--; i >= 0; i--) {
 694		pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id;
 695		zynqmp_pm_release_node(pm_domain_id);
 696	}
 697	return ret;
 698}
 699
 700/*
 701 * zynqmp_r5_parse_fw()
 702 * @rproc: single R5 core's corresponding rproc instance
 703 * @fw: ptr to firmware to be loaded onto r5 core
 704 *
 705 * get resource table if available
 706 *
 707 * return 0 on success, otherwise non-zero value on failure
 708 */
 709static int zynqmp_r5_parse_fw(struct rproc *rproc, const struct firmware *fw)
 710{
 711	int ret;
 712
 713	ret = rproc_elf_load_rsc_table(rproc, fw);
 714	if (ret == -EINVAL) {
 715		/*
 716		 * resource table only required for IPC.
 717		 * if not present, this is not necessarily an error;
 718		 * for example, loading r5 hello world application
 719		 * so simply inform user and keep going.
 720		 */
 721		dev_info(&rproc->dev, "no resource table found.\n");
 722		ret = 0;
 723	}
 724	return ret;
 725}
 726
 727/**
 728 * zynqmp_r5_rproc_prepare() - prepare core to boot/attach
 729 * adds carveouts for TCM bank and reserved memory regions
 730 *
 731 * @rproc: Device node of each rproc
 732 *
 733 * Return: 0 for success else < 0 error code
 734 */
 735static int zynqmp_r5_rproc_prepare(struct rproc *rproc)
 736{
 737	int ret;
 738
 739	ret = add_tcm_banks(rproc);
 740	if (ret) {
 741		dev_err(&rproc->dev, "failed to get TCM banks, err %d\n", ret);
 742		return ret;
 743	}
 744
 745	ret = add_mem_regions_carveout(rproc);
 746	if (ret) {
 747		dev_err(&rproc->dev, "failed to get reserve mem regions %d\n", ret);
 748		return ret;
 749	}
 750
 751	ret = add_sram_carveouts(rproc);
 752	if (ret) {
 753		dev_err(&rproc->dev, "failed to get sram carveout %d\n", ret);
 754		return ret;
 755	}
 756
 757	return 0;
 758}
 759
 760/**
 761 * zynqmp_r5_rproc_unprepare() - programming sequence after stop/detach.
 762 * Turns off TCM banks using power-domain id
 763 *
 764 * @rproc: Device node of each rproc
 765 *
 766 * Return: always 0
 767 */
 768static int zynqmp_r5_rproc_unprepare(struct rproc *rproc)
 769{
 770	struct zynqmp_r5_core *r5_core;
 771	u32 pm_domain_id;
 772	int i;
 773
 774	r5_core = rproc->priv;
 775
 776	for (i = 0; i < r5_core->tcm_bank_count; i++) {
 777		pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id;
 778		if (zynqmp_pm_release_node(pm_domain_id))
 779			dev_warn(r5_core->dev,
 780				 "can't turn off TCM bank 0x%x", pm_domain_id);
 781	}
 782
 783	return 0;
 784}
 785
 786static struct resource_table *zynqmp_r5_get_loaded_rsc_table(struct rproc *rproc,
 787							     size_t *size)
 788{
 789	struct zynqmp_r5_core *r5_core;
 790
 791	r5_core = rproc->priv;
 792
 793	*size = r5_core->rsc_tbl_size;
 794
 795	return (struct resource_table *)r5_core->rsc_tbl_va;
 796}
 797
 798static int zynqmp_r5_get_rsc_table_va(struct zynqmp_r5_core *r5_core)
 799{
 800	struct resource_table *rsc_tbl_addr;
 801	struct device *dev = r5_core->dev;
 802	struct rsc_tbl_data *rsc_data_va;
 803	struct resource res_mem;
 804	int ret;
 805
 806	/*
 807	 * It is expected from remote processor firmware to provide resource
 808	 * table address via struct rsc_tbl_data data structure.
 809	 * Start address of first entry under "memory-region" property list
 810	 * contains that data structure which holds resource table address, size
 811	 * and some magic number to validate correct resource table entry.
 812	 */
 813	ret = of_reserved_mem_region_to_resource(r5_core->np, 0, &res_mem);
 814	if (ret) {
 815		dev_err(dev, "failed to get memory-region resource addr\n");
 816		return -EINVAL;
 817	}
 818
 819	rsc_data_va = (struct rsc_tbl_data *)ioremap_wc(res_mem.start,
 820							sizeof(struct rsc_tbl_data));
 821	if (!rsc_data_va) {
 822		dev_err(dev, "failed to map resource table data address\n");
 823		return -EIO;
 824	}
 825
 826	/*
 827	 * If RSC_TBL_XLNX_MAGIC number and its complement isn't found then
 828	 * do not consider resource table address valid and don't attach
 829	 */
 830	if (rsc_data_va->magic_num != RSC_TBL_XLNX_MAGIC ||
 831	    rsc_data_va->comp_magic_num != ~RSC_TBL_XLNX_MAGIC) {
 832		dev_dbg(dev, "invalid magic number, won't attach\n");
 833		return -EINVAL;
 834	}
 835
 836	r5_core->rsc_tbl_va = ioremap_wc(rsc_data_va->rsc_tbl,
 837					 rsc_data_va->rsc_tbl_size);
 838	if (!r5_core->rsc_tbl_va) {
 839		dev_err(dev, "failed to get resource table va\n");
 840		return -EINVAL;
 841	}
 842
 843	rsc_tbl_addr = (struct resource_table *)r5_core->rsc_tbl_va;
 844
 845	/*
 846	 * As of now resource table version 1 is expected. Don't fail to attach
 847	 * but warn users about it.
 848	 */
 849	if (rsc_tbl_addr->ver != 1)
 850		dev_warn(dev, "unexpected resource table version %d\n",
 851			 rsc_tbl_addr->ver);
 852
 853	r5_core->rsc_tbl_size = rsc_data_va->rsc_tbl_size;
 854
 855	iounmap((void __iomem *)rsc_data_va);
 856
 857	return 0;
 858}
 859
 860static int zynqmp_r5_attach(struct rproc *rproc)
 861{
 862	dev_dbg(&rproc->dev, "rproc %d attached\n", rproc->index);
 863
 864	return 0;
 865}
 866
 867static int zynqmp_r5_detach(struct rproc *rproc)
 868{
 869	/*
 870	 * Generate last notification to remote after clearing virtio flag.
 871	 * Remote can avoid polling on virtio reset flag if kick is generated
 872	 * during detach by host and check virtio reset flag on kick interrupt.
 873	 */
 874	zynqmp_r5_rproc_kick(rproc, 0);
 875
 876	return 0;
 877}
 878
 879static const struct rproc_ops zynqmp_r5_rproc_ops = {
 880	.prepare	= zynqmp_r5_rproc_prepare,
 881	.unprepare	= zynqmp_r5_rproc_unprepare,
 882	.start		= zynqmp_r5_rproc_start,
 883	.stop		= zynqmp_r5_rproc_stop,
 884	.load		= rproc_elf_load_segments,
 885	.parse_fw	= zynqmp_r5_parse_fw,
 886	.find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
 887	.sanity_check	= rproc_elf_sanity_check,
 888	.get_boot_addr	= rproc_elf_get_boot_addr,
 889	.kick		= zynqmp_r5_rproc_kick,
 890	.get_loaded_rsc_table = zynqmp_r5_get_loaded_rsc_table,
 891	.attach		= zynqmp_r5_attach,
 892	.detach		= zynqmp_r5_detach,
 893};
 894
 895/**
 896 * zynqmp_r5_add_rproc_core() - Add core data to framework.
 897 * Allocate and add struct rproc object for each r5f core
 898 * This is called for each individual r5f core
 899 *
 900 * @cdev: Device node of each r5 core
 901 *
 902 * Return: zynqmp_r5_core object for success else error code pointer
 903 */
 904static struct zynqmp_r5_core *zynqmp_r5_add_rproc_core(struct device *cdev)
 905{
 906	struct zynqmp_r5_core *r5_core;
 907	struct rproc *r5_rproc;
 908	int ret;
 909
 910	/* Set up DMA mask */
 911	ret = dma_set_coherent_mask(cdev, DMA_BIT_MASK(32));
 912	if (ret)
 913		return ERR_PTR(ret);
 914
 915	/* Allocate remoteproc instance */
 916	r5_rproc = rproc_alloc(cdev, dev_name(cdev),
 917			       &zynqmp_r5_rproc_ops,
 918			       NULL, sizeof(struct zynqmp_r5_core));
 919	if (!r5_rproc) {
 920		dev_err(cdev, "failed to allocate memory for rproc instance\n");
 921		return ERR_PTR(-ENOMEM);
 922	}
 923
 924	rproc_coredump_set_elf_info(r5_rproc, ELFCLASS32, EM_ARM);
 925
 926	r5_rproc->recovery_disabled = true;
 927	r5_rproc->has_iommu = false;
 928	r5_rproc->auto_boot = false;
 929	r5_core = r5_rproc->priv;
 930	r5_core->dev = cdev;
 931	r5_core->np = dev_of_node(cdev);
 932	if (!r5_core->np) {
 933		dev_err(cdev, "can't get device node for r5 core\n");
 934		ret = -EINVAL;
 935		goto free_rproc;
 936	}
 937
 938	/* Add R5 remoteproc core */
 939	ret = rproc_add(r5_rproc);
 940	if (ret) {
 941		dev_err(cdev, "failed to add r5 remoteproc\n");
 942		goto free_rproc;
 943	}
 944
 945	/*
 946	 * If firmware is already available in the memory then move rproc state
 947	 * to DETACHED. Firmware can be preloaded via debugger or by any other
 948	 * agent (processors) in the system.
 949	 * If firmware isn't available in the memory and resource table isn't
 950	 * found, then rproc state remains OFFLINE.
 951	 */
 952	if (!zynqmp_r5_get_rsc_table_va(r5_core))
 953		r5_rproc->state = RPROC_DETACHED;
 954
 955	r5_core->rproc = r5_rproc;
 956	return r5_core;
 957
 958free_rproc:
 959	rproc_free(r5_rproc);
 960	return ERR_PTR(ret);
 961}
 962
 963static int zynqmp_r5_get_sram_banks(struct zynqmp_r5_core *r5_core)
 964{
 965	struct device_node *np = r5_core->np;
 966	struct device *dev = r5_core->dev;
 967	struct zynqmp_sram_bank *sram;
 968	struct device_node *sram_np;
 969	int num_sram, i, ret;
 970	u64 abs_addr, size;
 971
 972	/* "sram" is optional property. Do not fail, if unavailable. */
 973	if (!of_property_present(r5_core->np, "sram"))
 974		return 0;
 975
 976	num_sram = of_property_count_elems_of_size(np, "sram", sizeof(phandle));
 977	if (num_sram <= 0) {
 978		dev_err(dev, "Invalid sram property, ret = %d\n",
 979			num_sram);
 980		return -EINVAL;
 981	}
 982
 983	sram = devm_kcalloc(dev, num_sram,
 984			    sizeof(struct zynqmp_sram_bank), GFP_KERNEL);
 985	if (!sram)
 986		return -ENOMEM;
 987
 988	for (i = 0; i < num_sram; i++) {
 989		sram_np = of_parse_phandle(np, "sram", i);
 990		if (!sram_np) {
 991			dev_err(dev, "failed to get sram %d phandle\n", i);
 992			return -EINVAL;
 993		}
 994
 995		if (!of_device_is_available(sram_np)) {
 996			dev_err(dev, "sram device not available\n");
 997			ret = -EINVAL;
 998			goto fail_sram_get;
 999		}
1000
1001		ret = of_address_to_resource(sram_np, 0, &sram[i].sram_res);
1002		if (ret) {
1003			dev_err(dev, "addr to res failed\n");
1004			goto fail_sram_get;
1005		}
1006
1007		/* Get SRAM device address */
1008		ret = of_property_read_reg(sram_np, i, &abs_addr, &size);
1009		if (ret) {
1010			dev_err(dev, "failed to get reg property\n");
1011			goto fail_sram_get;
1012		}
1013
1014		sram[i].da = (u32)abs_addr;
1015
1016		of_node_put(sram_np);
1017
1018		dev_dbg(dev, "sram %d: name=%s, addr=0x%llx, da=0x%x, size=0x%llx\n",
1019			i, sram[i].sram_res.name, sram[i].sram_res.start,
1020			sram[i].da, resource_size(&sram[i].sram_res));
1021	}
1022
1023	r5_core->sram = sram;
1024	r5_core->num_sram = num_sram;
1025
1026	return 0;
1027
1028fail_sram_get:
1029	of_node_put(sram_np);
1030
1031	return ret;
1032}
1033
1034static int zynqmp_r5_get_tcm_node_from_dt(struct zynqmp_r5_cluster *cluster)
1035{
1036	int i, j, tcm_bank_count, ret, tcm_pd_idx, pd_count;
1037	struct of_phandle_args out_args;
1038	struct zynqmp_r5_core *r5_core;
1039	struct platform_device *cpdev;
1040	struct mem_bank_data *tcm;
1041	struct device_node *np;
1042	struct resource *res;
1043	u64 abs_addr, size;
1044	struct device *dev;
1045
1046	for (i = 0; i < cluster->core_count; i++) {
1047		r5_core = cluster->r5_cores[i];
1048		dev = r5_core->dev;
1049		np = r5_core->np;
1050
1051		pd_count = of_count_phandle_with_args(np, "power-domains",
1052						      "#power-domain-cells");
1053
1054		if (pd_count <= 0) {
1055			dev_err(dev, "invalid power-domains property, %d\n", pd_count);
1056			return -EINVAL;
1057		}
1058
1059		/* First entry in power-domains list is for r5 core, rest for TCM. */
1060		tcm_bank_count = pd_count - 1;
1061
1062		if (tcm_bank_count <= 0) {
1063			dev_err(dev, "invalid TCM count %d\n", tcm_bank_count);
1064			return -EINVAL;
1065		}
1066
1067		r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count,
1068						  sizeof(struct mem_bank_data *),
1069						  GFP_KERNEL);
1070		if (!r5_core->tcm_banks)
1071			return -ENOMEM;
1072
1073		r5_core->tcm_bank_count = tcm_bank_count;
1074		for (j = 0, tcm_pd_idx = 1; j < tcm_bank_count; j++, tcm_pd_idx++) {
1075			tcm = devm_kzalloc(dev, sizeof(struct mem_bank_data),
1076					   GFP_KERNEL);
1077			if (!tcm)
1078				return -ENOMEM;
1079
1080			r5_core->tcm_banks[j] = tcm;
1081
1082			/* Get power-domains id of TCM. */
1083			ret = of_parse_phandle_with_args(np, "power-domains",
1084							 "#power-domain-cells",
1085							 tcm_pd_idx, &out_args);
1086			if (ret) {
1087				dev_err(r5_core->dev,
1088					"failed to get tcm %d pm domain, ret %d\n",
1089					tcm_pd_idx, ret);
1090				return ret;
1091			}
1092			tcm->pm_domain_id = out_args.args[0];
1093			of_node_put(out_args.np);
1094
1095			/* Get TCM address without translation. */
1096			ret = of_property_read_reg(np, j, &abs_addr, &size);
1097			if (ret) {
1098				dev_err(dev, "failed to get reg property\n");
1099				return ret;
1100			}
1101
1102			/*
1103			 * Remote processor can address only 32 bits
1104			 * so convert 64-bits into 32-bits. This will discard
1105			 * any unwanted upper 32-bits.
1106			 */
1107			tcm->da = (u32)abs_addr;
1108			tcm->size = (u32)size;
1109
1110			cpdev = to_platform_device(dev);
1111			res = platform_get_resource(cpdev, IORESOURCE_MEM, j);
1112			if (!res) {
1113				dev_err(dev, "failed to get tcm resource\n");
1114				return -EINVAL;
1115			}
1116
1117			tcm->addr = (u32)res->start;
1118			tcm->bank_name = (char *)res->name;
1119			res = devm_request_mem_region(dev, tcm->addr, tcm->size,
1120						      tcm->bank_name);
1121			if (!res) {
1122				dev_err(dev, "failed to request tcm resource\n");
1123				return -EINVAL;
1124			}
1125		}
1126	}
1127
1128	return 0;
1129}
1130
1131/**
1132 * zynqmp_r5_get_tcm_node() - Get TCM info
1133 * Ideally this function should parse tcm node and store information
1134 * in r5_core instance. For now, Hardcoded TCM information is used.
1135 * This approach is used as TCM bindings for system-dt is being developed
1136 *
1137 * @cluster: pointer to zynqmp_r5_cluster type object
1138 *
1139 * Return: 0 for success and < 0 error code for failure.
1140 */
1141static int zynqmp_r5_get_tcm_node(struct zynqmp_r5_cluster *cluster)
1142{
1143	const struct mem_bank_data *zynqmp_tcm_banks;
1144	struct device *dev = cluster->dev;
1145	struct zynqmp_r5_core *r5_core;
1146	int tcm_bank_count, tcm_node;
1147	int i, j;
1148
1149	if (cluster->mode == SPLIT_MODE) {
1150		zynqmp_tcm_banks = zynqmp_tcm_banks_split;
1151		tcm_bank_count = ARRAY_SIZE(zynqmp_tcm_banks_split);
1152	} else {
1153		zynqmp_tcm_banks = zynqmp_tcm_banks_lockstep;
1154		tcm_bank_count = ARRAY_SIZE(zynqmp_tcm_banks_lockstep);
1155	}
1156
1157	/* count per core tcm banks */
1158	tcm_bank_count = tcm_bank_count / cluster->core_count;
1159
1160	/*
1161	 * r5 core 0 will use all of TCM banks in lockstep mode.
1162	 * In split mode, r5 core0 will use 128k and r5 core1 will use another
1163	 * 128k. Assign TCM banks to each core accordingly
1164	 */
1165	tcm_node = 0;
1166	for (i = 0; i < cluster->core_count; i++) {
1167		r5_core = cluster->r5_cores[i];
1168		r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count,
1169						  sizeof(struct mem_bank_data *),
1170						  GFP_KERNEL);
1171		if (!r5_core->tcm_banks)
1172			return -ENOMEM;
1173
1174		for (j = 0; j < tcm_bank_count; j++) {
1175			/*
1176			 * Use pre-defined TCM reg values.
1177			 * Eventually this should be replaced by values
1178			 * parsed from dts.
1179			 */
1180			r5_core->tcm_banks[j] =
1181				(struct mem_bank_data *)&zynqmp_tcm_banks[tcm_node];
1182			tcm_node++;
1183		}
1184
1185		r5_core->tcm_bank_count = tcm_bank_count;
1186	}
1187
1188	return 0;
1189}
1190
1191/*
1192 * zynqmp_r5_core_init()
1193 * Create and initialize zynqmp_r5_core type object
1194 *
1195 * @cluster: pointer to zynqmp_r5_cluster type object
1196 * @fw_reg_val: value expected by firmware to configure RPU cluster mode
1197 * @tcm_mode: value expected by fw to configure TCM mode (lockstep or split)
1198 *
1199 * Return: 0 for success and error code for failure.
1200 */
1201static int zynqmp_r5_core_init(struct zynqmp_r5_cluster *cluster,
1202			       enum rpu_oper_mode fw_reg_val,
1203			       enum rpu_tcm_comb tcm_mode)
1204{
1205	struct device *dev = cluster->dev;
1206	struct zynqmp_r5_core *r5_core;
1207	int ret = -EINVAL, i;
1208
1209	r5_core = cluster->r5_cores[0];
1210
1211	/* Maintain backward compatibility for zynqmp by using hardcode TCM address. */
1212	if (of_property_present(r5_core->np, "reg"))
1213		ret = zynqmp_r5_get_tcm_node_from_dt(cluster);
1214	else if (device_is_compatible(dev, "xlnx,zynqmp-r5fss"))
1215		ret = zynqmp_r5_get_tcm_node(cluster);
1216
1217	if (ret) {
1218		dev_err(dev, "can't get tcm, err %d\n", ret);
1219		return ret;
1220	}
1221
1222	for (i = 0; i < cluster->core_count; i++) {
1223		r5_core = cluster->r5_cores[i];
1224
1225		/* Initialize r5 cores with power-domains parsed from dts */
1226		ret = of_property_read_u32_index(r5_core->np, "power-domains",
1227						 1, &r5_core->pm_domain_id);
1228		if (ret) {
1229			dev_err(dev, "failed to get power-domains property\n");
1230			return ret;
1231		}
1232
1233		ret = zynqmp_pm_set_rpu_mode(r5_core->pm_domain_id, fw_reg_val);
1234		if (ret < 0) {
1235			dev_err(r5_core->dev, "failed to set RPU mode\n");
1236			return ret;
1237		}
1238
1239		if (of_property_present(dev_of_node(dev), "xlnx,tcm-mode") ||
1240		    device_is_compatible(dev, "xlnx,zynqmp-r5fss")) {
1241			ret = zynqmp_pm_set_tcm_config(r5_core->pm_domain_id,
1242						       tcm_mode);
1243			if (ret < 0) {
1244				dev_err(r5_core->dev, "failed to configure TCM\n");
1245				return ret;
1246			}
1247		}
1248
1249		ret = zynqmp_r5_get_sram_banks(r5_core);
1250		if (ret)
1251			return ret;
1252	}
1253
1254	return 0;
1255}
1256
1257/*
1258 * zynqmp_r5_cluster_init()
1259 * Create and initialize zynqmp_r5_cluster type object
1260 *
1261 * @cluster: pointer to zynqmp_r5_cluster type object
1262 *
1263 * Return: 0 for success and error code for failure.
1264 */
1265static int zynqmp_r5_cluster_init(struct zynqmp_r5_cluster *cluster)
1266{
1267	enum zynqmp_r5_cluster_mode cluster_mode = LOCKSTEP_MODE;
1268	struct device *dev = cluster->dev;
1269	struct device_node *dev_node = dev_of_node(dev);
1270	struct platform_device *child_pdev;
1271	struct zynqmp_r5_core **r5_cores;
1272	enum rpu_oper_mode fw_reg_val;
1273	struct device **child_devs;
1274	struct device_node *child;
1275	enum rpu_tcm_comb tcm_mode;
1276	int core_count, ret, i;
1277	struct mbox_info *ipi;
1278
1279	ret = of_property_read_u32(dev_node, "xlnx,cluster-mode", &cluster_mode);
1280
1281	/*
1282	 * on success returns 0, if not defined then returns -EINVAL,
1283	 * In that case, default is LOCKSTEP mode. Other than that
1284	 * returns relative error code < 0.
1285	 */
1286	if (ret != -EINVAL && ret != 0) {
1287		dev_err(dev, "Invalid xlnx,cluster-mode property\n");
1288		return ret;
1289	}
1290
1291	/*
1292	 * For now driver only supports split mode and lockstep mode.
1293	 * fail driver probe if either of that is not set in dts.
1294	 */
1295	if (cluster_mode == LOCKSTEP_MODE) {
1296		fw_reg_val = PM_RPU_MODE_LOCKSTEP;
1297	} else if (cluster_mode == SPLIT_MODE) {
1298		fw_reg_val = PM_RPU_MODE_SPLIT;
1299	} else {
1300		dev_err(dev, "driver does not support cluster mode %d\n", cluster_mode);
1301		return -EINVAL;
1302	}
1303
1304	if (of_property_present(dev_node, "xlnx,tcm-mode")) {
1305		ret = of_property_read_u32(dev_node, "xlnx,tcm-mode", (u32 *)&tcm_mode);
1306		if (ret)
1307			return ret;
1308	} else if (device_is_compatible(dev, "xlnx,zynqmp-r5fss")) {
1309		if (cluster_mode == LOCKSTEP_MODE)
1310			tcm_mode = PM_RPU_TCM_COMB;
1311		else
1312			tcm_mode = PM_RPU_TCM_SPLIT;
1313	} else {
1314		tcm_mode = PM_RPU_TCM_COMB;
1315	}
1316
1317	/*
1318	 * Number of cores is decided by number of child nodes of
1319	 * r5f subsystem node in dts.
1320	 * In split mode maximum two child nodes are expected.
1321	 * However, only single core can be enabled too.
1322	 * Driver can handle following configuration in split mode:
1323	 * 1) core0 enabled, core1 disabled
1324	 * 2) core0 disabled, core1 enabled
1325	 * 3) core0 and core1 both are enabled.
1326	 * For now, no more than two cores are expected per cluster
1327	 * in split mode.
1328	 * In lockstep mode if two child nodes are available,
1329	 * only use first child node and consider it as core0
1330	 * and ignore core1 dt node.
1331	 */
1332	core_count = of_get_available_child_count(dev_node);
1333	if (core_count == 0 || core_count > 2) {
1334		dev_err(dev, "Invalid number of r5 cores %d", core_count);
1335		return -EINVAL;
1336	} else if (cluster_mode == LOCKSTEP_MODE && core_count == 2) {
1337		dev_warn(dev, "Only r5 core0 will be used\n");
1338		core_count = 1;
1339	}
1340
1341	child_devs = kcalloc(core_count, sizeof(struct device *), GFP_KERNEL);
1342	if (!child_devs)
1343		return -ENOMEM;
1344
1345	r5_cores = kcalloc(core_count,
1346			   sizeof(struct zynqmp_r5_core *), GFP_KERNEL);
1347	if (!r5_cores) {
1348		kfree(child_devs);
1349		return -ENOMEM;
1350	}
1351
1352	i = 0;
1353	for_each_available_child_of_node(dev_node, child) {
1354		child_pdev = of_find_device_by_node(child);
1355		if (!child_pdev) {
1356			of_node_put(child);
1357			ret = -ENODEV;
1358			goto release_r5_cores;
1359		}
1360
1361		child_devs[i] = &child_pdev->dev;
1362
1363		/* create and add remoteproc instance of type struct rproc */
1364		r5_cores[i] = zynqmp_r5_add_rproc_core(&child_pdev->dev);
1365		if (IS_ERR(r5_cores[i])) {
1366			of_node_put(child);
1367			ret = PTR_ERR(r5_cores[i]);
1368			r5_cores[i] = NULL;
1369			goto release_r5_cores;
1370		}
1371
1372		/*
1373		 * If mailbox nodes are disabled using "status" property then
1374		 * setting up mailbox channels will fail.
1375		 */
1376		ipi = zynqmp_r5_setup_mbox(&child_pdev->dev);
1377		if (ipi) {
1378			r5_cores[i]->ipi = ipi;
1379			ipi->r5_core = r5_cores[i];
1380		}
1381
1382		/*
1383		 * If two child nodes are available in dts in lockstep mode,
1384		 * then ignore second child node.
1385		 */
1386		if (cluster_mode == LOCKSTEP_MODE) {
1387			of_node_put(child);
1388			break;
1389		}
1390
1391		i++;
1392	}
1393
1394	cluster->mode = cluster_mode;
1395	cluster->core_count = core_count;
1396	cluster->r5_cores = r5_cores;
1397
1398	ret = zynqmp_r5_core_init(cluster, fw_reg_val, tcm_mode);
1399	if (ret < 0) {
1400		dev_err(dev, "failed to init r5 core err %d\n", ret);
1401		cluster->core_count = 0;
1402		cluster->r5_cores = NULL;
1403
1404		/*
1405		 * at this point rproc resources for each core are allocated.
1406		 * adjust index to free resources in reverse order
1407		 */
1408		i = core_count - 1;
1409		goto release_r5_cores;
1410	}
1411
1412	kfree(child_devs);
1413	return 0;
1414
1415release_r5_cores:
1416	while (i >= 0) {
1417		put_device(child_devs[i]);
1418		if (r5_cores[i]) {
1419			zynqmp_r5_free_mbox(r5_cores[i]->ipi);
1420			of_reserved_mem_device_release(r5_cores[i]->dev);
1421			rproc_del(r5_cores[i]->rproc);
1422			rproc_free(r5_cores[i]->rproc);
1423		}
1424		i--;
1425	}
1426	kfree(r5_cores);
1427	kfree(child_devs);
1428	return ret;
1429}
1430
1431static void zynqmp_r5_cluster_exit(void *data)
1432{
1433	struct platform_device *pdev = data;
1434	struct zynqmp_r5_cluster *cluster;
1435	struct zynqmp_r5_core *r5_core;
1436	int i;
1437
1438	cluster = platform_get_drvdata(pdev);
1439	if (!cluster)
1440		return;
1441
1442	for (i = 0; i < cluster->core_count; i++) {
1443		r5_core = cluster->r5_cores[i];
1444		zynqmp_r5_free_mbox(r5_core->ipi);
1445		iounmap(r5_core->rsc_tbl_va);
1446		of_reserved_mem_device_release(r5_core->dev);
1447		put_device(r5_core->dev);
1448		rproc_del(r5_core->rproc);
1449		rproc_free(r5_core->rproc);
1450	}
1451
1452	kfree(cluster->r5_cores);
1453	kfree(cluster);
1454	platform_set_drvdata(pdev, NULL);
1455}
1456
1457/*
1458 * zynqmp_r5_remoteproc_shutdown()
1459 * Follow shutdown sequence in case of kexec call.
1460 *
1461 * @pdev: domain platform device for cluster
1462 *
1463 * Return: None.
1464 */
1465static void zynqmp_r5_remoteproc_shutdown(struct platform_device *pdev)
1466{
1467	const char *rproc_state_str = NULL;
1468	struct zynqmp_r5_cluster *cluster;
1469	struct zynqmp_r5_core *r5_core;
1470	struct rproc *rproc;
1471	int i, ret = 0;
1472
1473	cluster = platform_get_drvdata(pdev);
1474
1475	for (i = 0; i < cluster->core_count; i++) {
1476		r5_core = cluster->r5_cores[i];
1477		rproc = r5_core->rproc;
1478
1479		if (rproc->state == RPROC_RUNNING) {
1480			ret = rproc_shutdown(rproc);
1481			rproc_state_str = "shutdown";
1482		} else if (rproc->state == RPROC_ATTACHED) {
1483			ret = rproc_detach(rproc);
1484			rproc_state_str = "detach";
1485		} else {
1486			ret = 0;
1487		}
1488
1489		if (ret) {
1490			dev_err(cluster->dev, "failed to %s rproc %d\n",
1491				rproc_state_str, rproc->index);
1492		}
1493	}
1494}
1495
1496/*
1497 * zynqmp_r5_remoteproc_probe()
1498 * parse device-tree, initialize hardware and allocate required resources
1499 * and remoteproc ops
1500 *
1501 * @pdev: domain platform device for R5 cluster
1502 *
1503 * Return: 0 for success and < 0 for failure.
1504 */
1505static int zynqmp_r5_remoteproc_probe(struct platform_device *pdev)
1506{
1507	struct zynqmp_r5_cluster *cluster;
1508	struct device *dev = &pdev->dev;
1509	int ret;
1510
1511	cluster = kzalloc(sizeof(*cluster), GFP_KERNEL);
1512	if (!cluster)
1513		return -ENOMEM;
1514
1515	cluster->dev = dev;
1516
1517	ret = devm_of_platform_populate(dev);
1518	if (ret) {
1519		dev_err_probe(dev, ret, "failed to populate platform dev\n");
1520		kfree(cluster);
1521		return ret;
1522	}
1523
1524	/* wire in so each core can be cleaned up at driver remove */
1525	platform_set_drvdata(pdev, cluster);
1526
1527	ret = zynqmp_r5_cluster_init(cluster);
1528	if (ret) {
1529		kfree(cluster);
1530		platform_set_drvdata(pdev, NULL);
1531		dev_err_probe(dev, ret, "Invalid r5f subsystem device tree\n");
1532		return ret;
1533	}
1534
1535	ret = devm_add_action_or_reset(dev, zynqmp_r5_cluster_exit, pdev);
1536	if (ret)
1537		return ret;
1538
1539	return 0;
1540}
1541
1542/* Match table for OF platform binding */
1543static const struct of_device_id zynqmp_r5_remoteproc_match[] = {
1544	{ .compatible = "xlnx,versal-net-r52fss", },
1545	{ .compatible = "xlnx,versal-r5fss", },
1546	{ .compatible = "xlnx,zynqmp-r5fss", },
1547	{ /* end of list */ },
1548};
1549MODULE_DEVICE_TABLE(of, zynqmp_r5_remoteproc_match);
1550
1551static struct platform_driver zynqmp_r5_remoteproc_driver = {
1552	.probe = zynqmp_r5_remoteproc_probe,
1553	.driver = {
1554		.name = "zynqmp_r5_remoteproc",
1555		.of_match_table = zynqmp_r5_remoteproc_match,
1556	},
1557	.shutdown = zynqmp_r5_remoteproc_shutdown,
1558};
1559module_platform_driver(zynqmp_r5_remoteproc_driver);
1560
1561MODULE_DESCRIPTION("Xilinx R5F remote processor driver");
1562MODULE_AUTHOR("Xilinx Inc.");
1563MODULE_LICENSE("GPL");