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mt6363-regulator.c
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linux-6.19.14/drivers/regulator/mt6363-regulator.c
1// SPDX-License-Identifier: GPL-2.0 2// 3// Copyright (c) 2024 MediaTek Inc. 4// Copyright (c) 2025 Collabora Ltd 5// AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 6 7#include <linux/bitfield.h> 8#include <linux/delay.h> 9#include <linux/devm-helpers.h> 10#include <linux/err.h> 11#include <linux/interrupt.h> 12#include <linux/irq.h> 13#include <linux/irqdomain.h> 14#include <linux/kernel.h> 15#include <linux/module.h> 16#include <linux/of.h> 17#include <linux/of_device.h> 18#include <linux/of_irq.h> 19#include <linux/platform_device.h> 20#include <linux/regmap.h> 21#include <linux/spmi.h> 22 23#include <linux/regulator/driver.h> 24#include <linux/regulator/machine.h> 25#include <linux/regulator/mt6363-regulator.h> 26#include <linux/regulator/of_regulator.h> 27 28#define MT6363_REGULATOR_MODE_NORMAL 0 29#define MT6363_REGULATOR_MODE_FCCM 1 30#define MT6363_REGULATOR_MODE_LP 2 31#define MT6363_REGULATOR_MODE_ULP 3 32 33#define EN_SET_OFFSET 0x1 34#define EN_CLR_OFFSET 0x2 35#define OP_CFG_OFFSET 0x5 36 37#define NORMAL_OP_CFG 0x10 38#define NORMAL_OP_EN 0x800000 39 40#define OC_IRQ_ENABLE_DELAY_MS 10 41 42/* Unlock keys for TMA and BUCK_TOP */ 43#define MT6363_TMA_UNLOCK_VALUE 0x9c9c 44#define MT6363_BUCK_TOP_UNLOCK_VALUE 0x5543 45 46enum { 47 MT6363_ID_VBUCK1, 48 MT6363_ID_VBUCK2, 49 MT6363_ID_VBUCK3, 50 MT6363_ID_VBUCK4, 51 MT6363_ID_VBUCK5, 52 MT6363_ID_VBUCK6, 53 MT6363_ID_VBUCK7, 54 MT6363_ID_VS1, 55 MT6363_ID_VS2, 56 MT6363_ID_VS3, 57 MT6363_ID_VA12_1, 58 MT6363_ID_VA12_2, 59 MT6363_ID_VA15, 60 MT6363_ID_VAUX18, 61 MT6363_ID_VCN13, 62 MT6363_ID_VCN15, 63 MT6363_ID_VEMC, 64 MT6363_ID_VIO075, 65 MT6363_ID_VIO18, 66 MT6363_ID_VM18, 67 MT6363_ID_VSRAM_APU, 68 MT6363_ID_VSRAM_CPUB, 69 MT6363_ID_VSRAM_CPUM, 70 MT6363_ID_VSRAM_CPUL, 71 MT6363_ID_VSRAM_DIGRF, 72 MT6363_ID_VSRAM_MDFE, 73 MT6363_ID_VSRAM_MODEM, 74 MT6363_ID_VRF09, 75 MT6363_ID_VRF12, 76 MT6363_ID_VRF13, 77 MT6363_ID_VRF18, 78 MT6363_ID_VRFIO18, 79 MT6363_ID_VTREF18, 80 MT6363_ID_VUFS12, 81 MT6363_ID_VUFS18, 82}; 83 84/** 85 * struct mt6363_regulator_info - MT6363 regulators information 86 * @desc: Regulator description structure 87 * @lp_mode_reg: Low Power mode register (normal/idle) 88 * @lp_mode_mask: Low Power mode regulator mask 89 * @hw_lp_mode_reg: Hardware voted Low Power mode register (normal/idle) 90 * @hw_lp_mode_mask: Hardware voted Low Power mode regulator mask 91 * @modeset_reg: AUTO/PWM mode register 92 * @modeset_mask: AUTO/PWM regulator mask 93 * @lp_imax_uA: Maximum load current (microamps), for Low Power mode only 94 * @op_en_reg: Operation mode enablement register 95 * @orig_op_en: Backup of a regulator's operation mode enablement register 96 * @orig_op_cfg: Backup of a regulator's operation mode configuration register 97 * @oc_work: Delayed work for enabling overcurrent IRQ 98 * @hwirq: PMIC-Internal HW Interrupt for overcurrent event 99 * @virq: Mapped Interrupt for overcurrent event 100 */ 101struct mt6363_regulator_info { 102 struct regulator_desc desc; 103 u16 lp_mode_reg; 104 u16 lp_mode_mask; 105 u16 hw_lp_mode_reg; 106 u16 hw_lp_mode_mask; 107 u16 modeset_reg; 108 u16 modeset_mask; 109 int lp_imax_uA; 110 u16 op_en_reg; 111 u32 orig_op_en; 112 u8 orig_op_cfg; 113 struct delayed_work oc_work; 114 u8 hwirq; 115 int virq; 116}; 117 118#define MT6363_BUCK(match, vreg, min, max, step, en_reg, lp_reg, \ 119 mset_reg, ocp_intn) \ 120[MT6363_ID_##vreg] = { \ 121 .desc = { \ 122 .name = match, \ 123 .supply_name = "vsys-"match, \ 124 .of_match = of_match_ptr(match), \ 125 .ops = &mt6363_vreg_setclr_ops, \ 126 .type = REGULATOR_VOLTAGE, \ 127 .id = MT6363_ID_##vreg, \ 128 .owner = THIS_MODULE, \ 129 .n_voltages = (max - min) / step + 1, \ 130 .min_uV = min, \ 131 .uV_step = step, \ 132 .enable_reg = en_reg, \ 133 .enable_mask = BIT(MT6363_RG_BUCK_##vreg##_EN_BIT), \ 134 .vsel_reg = MT6363_RG_BUCK_##vreg##_VOSEL_ADDR, \ 135 .vsel_mask = MT6363_RG_BUCK_##vreg##_VOSEL_MASK, \ 136 .of_map_mode = mt6363_map_mode, \ 137 }, \ 138 .lp_mode_reg = lp_reg, \ 139 .lp_mode_mask = BIT(MT6363_RG_BUCK_##vreg##_LP_BIT), \ 140 .hw_lp_mode_reg = MT6363_BUCK_##vreg##_HW_LP_MODE, \ 141 .hw_lp_mode_mask = 0xc, \ 142 .modeset_reg = mset_reg, \ 143 .modeset_mask = BIT(MT6363_RG_##vreg##_FCCM_BIT), \ 144 .lp_imax_uA = 100000, \ 145 .op_en_reg = MT6363_BUCK_##vreg##_OP_EN_0, \ 146 .hwirq = ocp_intn, \ 147} 148 149#define MT6363_LDO_LINEAR_OPS(match, vreg, in_sup, vops, min, max, \ 150 step, buck_reg, ocp_intn) \ 151[MT6363_ID_##vreg] = { \ 152 .desc = { \ 153 .name = match, \ 154 .supply_name = in_sup, \ 155 .of_match = of_match_ptr(match), \ 156 .ops = &vops, \ 157 .type = REGULATOR_VOLTAGE, \ 158 .id = MT6363_ID_##vreg, \ 159 .owner = THIS_MODULE, \ 160 .n_voltages = (max - min) / step + 1, \ 161 .min_uV = min, \ 162 .uV_step = step, \ 163 .enable_reg = MT6363_RG_##buck_reg##_EN_ADDR, \ 164 .enable_mask = BIT(MT6363_RG_LDO_##vreg##_EN_BIT), \ 165 .vsel_reg = MT6363_RG_LDO_##vreg##_VOSEL_ADDR, \ 166 .vsel_mask = MT6363_RG_LDO_##vreg##_VOSEL_MASK, \ 167 .of_map_mode = mt6363_map_mode, \ 168 }, \ 169 .lp_mode_reg = MT6363_RG_##buck_reg##_LP_ADDR, \ 170 .lp_mode_mask = BIT(MT6363_RG_LDO_##vreg##_LP_BIT), \ 171 .hw_lp_mode_reg = MT6363_LDO_##vreg##_HW_LP_MODE, \ 172 .hw_lp_mode_mask = 0x4, \ 173 .hwirq = ocp_intn, \ 174} 175 176#define MT6363_LDO_L_SC(match, vreg, inp, min, max, step, buck_reg, \ 177 ocp_intn) \ 178 MT6363_LDO_LINEAR_OPS(match, vreg, inp, mt6363_vreg_setclr_ops, \ 179 min, max, step, buck_reg, ocp_intn) 180 181#define MT6363_LDO_L(match, vreg, inp, min, max, step, buck_reg, \ 182 ocp_intn) \ 183 MT6363_LDO_LINEAR_OPS(match, vreg, inp, mt6363_ldo_linear_ops, \ 184 min, max, step, buck_reg, ocp_intn) 185 186#define MT6363_LDO_LINEAR_CAL_OPS(match, vreg, in_sup, vops, vrnum, \ 187 ocp_intn) \ 188[MT6363_ID_##vreg] = { \ 189 .desc = { \ 190 .name = match, \ 191 .supply_name = in_sup, \ 192 .of_match = of_match_ptr(match), \ 193 .ops = &vops, \ 194 .type = REGULATOR_VOLTAGE, \ 195 .id = MT6363_ID_##vreg, \ 196 .owner = THIS_MODULE, \ 197 .n_voltages = ARRAY_SIZE(ldo_volt_ranges##vrnum) * 11, \ 198 .linear_ranges = ldo_volt_ranges##vrnum, \ 199 .n_linear_ranges = ARRAY_SIZE(ldo_volt_ranges##vrnum), \ 200 .linear_range_selectors_bitfield = ldos_cal_selectors, \ 201 .enable_reg = MT6363_RG_LDO_##vreg##_ADDR, \ 202 .enable_mask = BIT(MT6363_RG_LDO_##vreg##_EN_BIT), \ 203 .vsel_reg = MT6363_RG_##vreg##_VOCAL_ADDR, \ 204 .vsel_mask = MT6363_RG_##vreg##_VOCAL_MASK, \ 205 .vsel_range_reg = MT6363_RG_##vreg##_VOSEL_ADDR, \ 206 .vsel_range_mask = MT6363_RG_##vreg##_VOSEL_MASK, \ 207 .of_map_mode = mt6363_map_mode, \ 208 }, \ 209 .lp_mode_reg = MT6363_RG_LDO_##vreg##_ADDR, \ 210 .lp_mode_mask = BIT(MT6363_RG_LDO_##vreg##_LP_BIT), \ 211 .hw_lp_mode_reg = MT6363_LDO_##vreg##_HW_LP_MODE, \ 212 .hw_lp_mode_mask = 0x4, \ 213 .lp_imax_uA = 10000, \ 214 .op_en_reg = MT6363_LDO_##vreg##_OP_EN0, \ 215 .hwirq = ocp_intn, \ 216} 217 218#define MT6363_LDO_VT(match, vreg, inp, vranges_num, ocp_intn) \ 219 MT6363_LDO_LINEAR_CAL_OPS(match, vreg, inp, mt6363_ldo_vtable_ops,\ 220 vranges_num, ocp_intn) 221 222static const unsigned int ldos_cal_selectors[] = { 223 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 224}; 225 226static const struct linear_range ldo_volt_ranges0[] = { 227 REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), 228 REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), 229 REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), 230 REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), 231 REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), 232 REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), 233 REGULATOR_LINEAR_RANGE(2500000, 0, 10, 10000), 234 REGULATOR_LINEAR_RANGE(2600000, 0, 10, 10000), 235 REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), 236 REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), 237 REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), 238 REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), 239 REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), 240 REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), 241 REGULATOR_LINEAR_RANGE(3400000, 0, 10, 10000), 242 REGULATOR_LINEAR_RANGE(3500000, 0, 10, 10000) 243}; 244 245static const struct linear_range ldo_volt_ranges1[] = { 246 REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), 247 REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), 248 REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), 249 REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), 250 REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), 251 REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), 252 REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), 253 REGULATOR_LINEAR_RANGE(1810000, 0, 10, 10000) 254}; 255 256static const struct linear_range ldo_volt_ranges2[] = { 257 REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), 258 REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), 259 REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), 260 REGULATOR_LINEAR_RANGE(2100000, 0, 10, 10000), 261 REGULATOR_LINEAR_RANGE(2200000, 0, 10, 10000), 262 REGULATOR_LINEAR_RANGE(2300000, 0, 10, 10000), 263 REGULATOR_LINEAR_RANGE(2400000, 0, 10, 10000), 264 REGULATOR_LINEAR_RANGE(2500000, 0, 10, 10000), 265 REGULATOR_LINEAR_RANGE(2600000, 0, 10, 10000), 266 REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), 267 REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), 268 REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), 269 REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), 270 REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), 271 REGULATOR_LINEAR_RANGE(3200000, 0, 10, 10000), 272 REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000) 273}; 274 275static const struct linear_range ldo_volt_ranges3[] = { 276 REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), 277 REGULATOR_LINEAR_RANGE(700000, 0, 10, 10000), 278 REGULATOR_LINEAR_RANGE(800000, 0, 10, 10000), 279 REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), 280 REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), 281 REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), 282 REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), 283 REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), 284 REGULATOR_LINEAR_RANGE(1400000, 0, 10, 10000), 285 REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), 286 REGULATOR_LINEAR_RANGE(1600000, 0, 10, 10000), 287 REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), 288 REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), 289 REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), 290 REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), 291 REGULATOR_LINEAR_RANGE(2100000, 0, 10, 10000) 292}; 293 294static const struct linear_range ldo_volt_ranges4[] = { 295 REGULATOR_LINEAR_RANGE(550000, 0, 10, 5000), 296 REGULATOR_LINEAR_RANGE(600000, 0, 10, 5000), 297 REGULATOR_LINEAR_RANGE(650000, 0, 10, 5000), 298 REGULATOR_LINEAR_RANGE(700000, 0, 10, 5000), 299 REGULATOR_LINEAR_RANGE(750000, 0, 10, 5000), 300 REGULATOR_LINEAR_RANGE(800000, 0, 10, 5000), 301 REGULATOR_LINEAR_RANGE(900000, 0, 10, 5000), 302 REGULATOR_LINEAR_RANGE(950000, 0, 10, 5000), 303 REGULATOR_LINEAR_RANGE(1000000, 0, 10, 5000), 304 REGULATOR_LINEAR_RANGE(1050000, 0, 10, 5000), 305 REGULATOR_LINEAR_RANGE(1100000, 0, 10, 5000), 306 REGULATOR_LINEAR_RANGE(1150000, 0, 10, 5000), 307 REGULATOR_LINEAR_RANGE(1700000, 0, 10, 5000), 308 REGULATOR_LINEAR_RANGE(1750000, 0, 10, 5000), 309 REGULATOR_LINEAR_RANGE(1800000, 0, 10, 5000), 310 REGULATOR_LINEAR_RANGE(1850000, 0, 10, 5000) 311}; 312 313static const struct linear_range ldo_volt_ranges5[] = { 314 REGULATOR_LINEAR_RANGE(600000, 0, 10, 5000), 315 REGULATOR_LINEAR_RANGE(650000, 0, 10, 5000), 316 REGULATOR_LINEAR_RANGE(700000, 0, 10, 5000), 317 REGULATOR_LINEAR_RANGE(750000, 0, 10, 5000), 318 REGULATOR_LINEAR_RANGE(800000, 0, 10, 5000) 319}; 320 321static int mt6363_vreg_enable_setclr(struct regulator_dev *rdev) 322{ 323 return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_SET_OFFSET, 324 rdev->desc->enable_mask); 325} 326 327static int mt6363_vreg_disable_setclr(struct regulator_dev *rdev) 328{ 329 return regmap_write(rdev->regmap, rdev->desc->enable_reg + EN_CLR_OFFSET, 330 rdev->desc->enable_mask); 331} 332 333static inline unsigned int mt6363_map_mode(unsigned int mode) 334{ 335 switch (mode) { 336 case MT6363_REGULATOR_MODE_NORMAL: 337 return REGULATOR_MODE_NORMAL; 338 case MT6363_REGULATOR_MODE_FCCM: 339 return REGULATOR_MODE_FAST; 340 case MT6363_REGULATOR_MODE_LP: 341 return REGULATOR_MODE_IDLE; 342 case MT6363_REGULATOR_MODE_ULP: 343 return REGULATOR_MODE_STANDBY; 344 default: 345 return REGULATOR_MODE_INVALID; 346 } 347} 348 349static unsigned int mt6363_regulator_get_mode(struct regulator_dev *rdev) 350{ 351 struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); 352 unsigned int val; 353 int ret; 354 355 if (info->modeset_reg) { 356 ret = regmap_read(rdev->regmap, info->modeset_reg, &val); 357 if (ret) { 358 dev_err(&rdev->dev, "Failed to get mt6363 mode: %d\n", ret); 359 return ret; 360 } 361 362 if (val & info->modeset_mask) 363 return REGULATOR_MODE_FAST; 364 } else { 365 val = 0; 366 } 367 368 ret = regmap_read(rdev->regmap, info->hw_lp_mode_reg, &val); 369 val &= info->hw_lp_mode_mask; 370 371 if (ret) { 372 dev_err(&rdev->dev, "Failed to get lp mode: %d\n", ret); 373 return ret; 374 } 375 376 if (val) 377 return REGULATOR_MODE_IDLE; 378 else 379 return REGULATOR_MODE_NORMAL; 380} 381 382static int mt6363_buck_unlock(struct regmap *map, bool unlock) 383{ 384 u16 buf = unlock ? MT6363_BUCK_TOP_UNLOCK_VALUE : 0; 385 386 return regmap_bulk_write(map, MT6363_BUCK_TOP_KEY_PROT_LO, &buf, sizeof(buf)); 387} 388 389static int mt6363_regulator_set_mode(struct regulator_dev *rdev, 390 unsigned int mode) 391{ 392 struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); 393 struct regmap *regmap = rdev->regmap; 394 int cur_mode, ret; 395 396 if (!info->modeset_reg && mode == REGULATOR_MODE_FAST) 397 return -EOPNOTSUPP; 398 399 switch (mode) { 400 case REGULATOR_MODE_FAST: 401 ret = mt6363_buck_unlock(regmap, true); 402 if (ret) 403 break; 404 405 ret = regmap_set_bits(regmap, info->modeset_reg, info->modeset_mask); 406 407 mt6363_buck_unlock(regmap, false); 408 break; 409 case REGULATOR_MODE_NORMAL: 410 cur_mode = mt6363_regulator_get_mode(rdev); 411 if (cur_mode < 0) { 412 ret = cur_mode; 413 break; 414 } 415 416 if (cur_mode == REGULATOR_MODE_FAST) { 417 ret = mt6363_buck_unlock(regmap, true); 418 if (ret) 419 break; 420 421 ret = regmap_clear_bits(regmap, info->modeset_reg, info->modeset_mask); 422 423 mt6363_buck_unlock(regmap, false); 424 break; 425 } else if (cur_mode == REGULATOR_MODE_IDLE) { 426 ret = regmap_clear_bits(regmap, info->lp_mode_reg, info->lp_mode_mask); 427 if (ret == 0) 428 usleep_range(100, 200); 429 } else { 430 ret = 0; 431 } 432 break; 433 case REGULATOR_MODE_IDLE: 434 ret = regmap_set_bits(regmap, info->lp_mode_reg, info->lp_mode_mask); 435 break; 436 default: 437 ret = -EINVAL; 438 } 439 440 if (ret) { 441 dev_err(&rdev->dev, "Failed to set mode %u: %d\n", mode, ret); 442 return ret; 443 } 444 445 return 0; 446} 447 448static int mt6363_regulator_set_load(struct regulator_dev *rdev, int load_uA) 449{ 450 struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); 451 unsigned int opmode_cfg, opmode_en; 452 int i, ret; 453 454 if (!info->lp_imax_uA) 455 return -EINVAL; 456 457 if (load_uA >= info->lp_imax_uA) { 458 ret = mt6363_regulator_set_mode(rdev, REGULATOR_MODE_NORMAL); 459 if (ret) 460 return ret; 461 462 opmode_cfg = NORMAL_OP_CFG; 463 opmode_en = NORMAL_OP_EN; 464 } else { 465 opmode_cfg = info->orig_op_cfg; 466 opmode_en = info->orig_op_en; 467 } 468 469 ret = regmap_write(rdev->regmap, info->op_en_reg + OP_CFG_OFFSET, opmode_cfg); 470 if (ret) 471 return ret; 472 473 for (i = 0; i < 3; i++) { 474 ret = regmap_write(rdev->regmap, info->op_en_reg + i, 475 (opmode_en >> (i * 8)) & GENMASK(7, 0)); 476 if (ret) 477 return ret; 478 } 479 480 return 0; 481} 482 483static int mt6363_vemc_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) 484{ 485 const u16 tma_unlock_key = MT6363_TMA_UNLOCK_VALUE; 486 const struct regulator_desc *rdesc = rdev->desc; 487 struct regmap *regmap = rdev->regmap; 488 unsigned int range, val; 489 int i, ret; 490 u16 mask; 491 492 for (i = 0; i < rdesc->n_linear_ranges; i++) { 493 const struct linear_range *r = &rdesc->linear_ranges[i]; 494 unsigned int voltages_in_range = linear_range_values_in_range(r); 495 496 if (sel < voltages_in_range) 497 break; 498 sel -= voltages_in_range; 499 } 500 501 if (i == rdesc->n_linear_ranges) 502 return -EINVAL; 503 504 ret = regmap_read(rdev->regmap, MT6363_TOP_TRAP, &val); 505 if (ret) 506 return ret; 507 508 if (val > 1) 509 return -EINVAL; 510 511 /* Unlock TMA for writing */ 512 ret = regmap_bulk_write(rdev->regmap, MT6363_TOP_TMA_KEY_L, 513 &tma_unlock_key, sizeof(tma_unlock_key)); 514 if (ret) 515 return ret; 516 517 /* If HW trapping value is 1, use VEMC_VOSEL_1 instead of VEMC_VOSEL_0 */ 518 if (val == 1) { 519 mask = MT6363_RG_VEMC_VOSEL_1_MASK; 520 sel = FIELD_PREP(MT6363_RG_VEMC_VOSEL_1_MASK, sel); 521 } else { 522 mask = rdesc->vsel_mask; 523 } 524 525 sel <<= ffs(rdesc->vsel_mask) - 1; 526 sel += rdesc->linear_ranges[i].min_sel; 527 528 range = rdesc->linear_range_selectors_bitfield[i]; 529 range <<= ffs(rdesc->vsel_range_mask) - 1; 530 531 /* Write to the vreg calibration register for voltage finetuning */ 532 ret = regmap_update_bits(regmap, rdesc->vsel_range_reg, 533 rdesc->vsel_range_mask, range); 534 if (ret) 535 goto lock_tma; 536 537 /* Function must return the result of this write operation */ 538 ret = regmap_update_bits(regmap, rdesc->vsel_reg, mask, sel); 539 540lock_tma: 541 /* Unconditionally re-lock TMA */ 542 val = 0; 543 regmap_bulk_write(rdev->regmap, MT6363_TOP_TMA_KEY_L, &val, 2); 544 545 return ret; 546} 547 548static int mt6363_vemc_get_voltage_sel(struct regulator_dev *rdev) 549{ 550 const struct regulator_desc *rdesc = rdev->desc; 551 unsigned int vosel, trap, calsel; 552 int vcal, vsel, range, ret; 553 554 ret = regmap_read(rdev->regmap, rdesc->vsel_reg, &vosel); 555 if (ret) 556 return ret; 557 558 ret = regmap_read(rdev->regmap, rdesc->vsel_range_reg, &calsel); 559 if (ret) 560 return ret; 561 562 calsel &= rdesc->vsel_range_mask; 563 for (range = 0; range < rdesc->n_linear_ranges; range++) 564 if (rdesc->linear_range_selectors_bitfield[range] != calsel) 565 break; 566 567 if (range == rdesc->n_linear_ranges) 568 return -EINVAL; 569 570 ret = regmap_read(rdev->regmap, MT6363_TOP_TRAP, &trap); 571 if (ret) 572 return ret; 573 574 /* If HW trapping value is 1, use VEMC_VOSEL_1 instead of VEMC_VOSEL_0 */ 575 if (trap > 1) 576 return -EINVAL; 577 else if (trap == 1) 578 vsel = FIELD_GET(MT6363_RG_VEMC_VOSEL_1_MASK, vosel); 579 else 580 vsel = vosel & rdesc->vsel_mask; 581 582 vcal = linear_range_values_in_range_array(rdesc->linear_ranges, range); 583 584 return vsel + vcal; 585} 586 587static int mt6363_va15_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) 588{ 589 struct regmap *regmap = rdev->regmap; 590 int ret; 591 592 ret = mt6363_buck_unlock(regmap, true); 593 if (ret) 594 return ret; 595 596 ret = regulator_set_voltage_sel_pickable_regmap(rdev, sel); 597 if (ret) 598 goto va15_unlock; 599 600 ret = regmap_update_bits(regmap, MT6363_RG_BUCK_EFUSE_RSV1, 601 MT6363_RG_BUCK_EFUSE_RSV1_MASK, sel); 602 if (ret) 603 goto va15_unlock; 604 605va15_unlock: 606 mt6363_buck_unlock(rdev->regmap, false); 607 return ret; 608} 609 610static void mt6363_oc_irq_enable_work(struct work_struct *work) 611{ 612 struct delayed_work *dwork = to_delayed_work(work); 613 struct mt6363_regulator_info *info = 614 container_of(dwork, struct mt6363_regulator_info, oc_work); 615 616 enable_irq(info->virq); 617} 618 619static irqreturn_t mt6363_oc_isr(int irq, void *data) 620{ 621 struct regulator_dev *rdev = (struct regulator_dev *)data; 622 struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); 623 624 disable_irq_nosync(info->virq); 625 626 if (regulator_is_enabled_regmap(rdev)) 627 regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_CURRENT, NULL); 628 629 schedule_delayed_work(&info->oc_work, msecs_to_jiffies(OC_IRQ_ENABLE_DELAY_MS)); 630 631 return IRQ_HANDLED; 632} 633 634static int mt6363_set_ocp(struct regulator_dev *rdev, int lim, int severity, bool enable) 635{ 636 struct mt6363_regulator_info *info = rdev_get_drvdata(rdev); 637 638 /* MT6363 supports only enabling protection and does not support limits */ 639 if (lim || severity != REGULATOR_SEVERITY_PROT || !enable) 640 return -EOPNOTSUPP; 641 642 /* If there is no OCP interrupt, there's nothing to set */ 643 if (info->virq <= 0) 644 return -EOPNOTSUPP; 645 646 return devm_request_threaded_irq(&rdev->dev, info->virq, NULL, 647 mt6363_oc_isr, IRQF_ONESHOT, 648 info->desc.name, rdev); 649} 650 651static const struct regulator_ops mt6363_vreg_setclr_ops = { 652 .list_voltage = regulator_list_voltage_linear, 653 .map_voltage = regulator_map_voltage_linear, 654 .set_voltage_sel = regulator_set_voltage_sel_regmap, 655 .get_voltage_sel = regulator_get_voltage_sel_regmap, 656 .set_voltage_time_sel = regulator_set_voltage_time_sel, 657 .enable = mt6363_vreg_enable_setclr, 658 .disable = mt6363_vreg_disable_setclr, 659 .is_enabled = regulator_is_enabled_regmap, 660 .set_mode = mt6363_regulator_set_mode, 661 .get_mode = mt6363_regulator_get_mode, 662 .set_load = mt6363_regulator_set_load, 663 .set_over_current_protection = mt6363_set_ocp, 664}; 665 666static const struct regulator_ops mt6363_ldo_linear_ops = { 667 .list_voltage = regulator_list_voltage_linear, 668 .map_voltage = regulator_map_voltage_linear, 669 .set_voltage_sel = regulator_set_voltage_sel_regmap, 670 .get_voltage_sel = regulator_get_voltage_sel_regmap, 671 .set_voltage_time_sel = regulator_set_voltage_time_sel, 672 .enable = regulator_enable_regmap, 673 .disable = regulator_disable_regmap, 674 .is_enabled = regulator_is_enabled_regmap, 675 .set_mode = mt6363_regulator_set_mode, 676 .get_mode = mt6363_regulator_get_mode, 677 .set_over_current_protection = mt6363_set_ocp, 678}; 679 680static const struct regulator_ops mt6363_ldo_vtable_ops = { 681 .list_voltage = regulator_list_voltage_pickable_linear_range, 682 .map_voltage = regulator_map_voltage_pickable_linear_range, 683 .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, 684 .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, 685 .set_voltage_time_sel = regulator_set_voltage_time_sel, 686 .enable = regulator_enable_regmap, 687 .disable = regulator_disable_regmap, 688 .is_enabled = regulator_is_enabled_regmap, 689 .set_mode = mt6363_regulator_set_mode, 690 .get_mode = mt6363_regulator_get_mode, 691 .set_load = mt6363_regulator_set_load, 692 .set_over_current_protection = mt6363_set_ocp, 693}; 694 695static const struct regulator_ops mt6363_ldo_vemc_ops = { 696 .list_voltage = regulator_list_voltage_pickable_linear_range, 697 .map_voltage = regulator_map_voltage_pickable_linear_range, 698 .set_voltage_sel = mt6363_vemc_set_voltage_sel, 699 .get_voltage_sel = mt6363_vemc_get_voltage_sel, 700 .set_voltage_time_sel = regulator_set_voltage_time_sel, 701 .enable = regulator_enable_regmap, 702 .disable = regulator_disable_regmap, 703 .is_enabled = regulator_is_enabled_regmap, 704 .set_mode = mt6363_regulator_set_mode, 705 .get_mode = mt6363_regulator_get_mode, 706 .set_load = mt6363_regulator_set_load, 707 .set_over_current_protection = mt6363_set_ocp, 708}; 709 710static const struct regulator_ops mt6363_ldo_va15_ops = { 711 .list_voltage = regulator_list_voltage_pickable_linear_range, 712 .map_voltage = regulator_map_voltage_pickable_linear_range, 713 .set_voltage_sel = mt6363_va15_set_voltage_sel, 714 .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, 715 .set_voltage_time_sel = regulator_set_voltage_time_sel, 716 .enable = regulator_enable_regmap, 717 .disable = regulator_disable_regmap, 718 .is_enabled = regulator_is_enabled_regmap, 719 .set_mode = mt6363_regulator_set_mode, 720 .get_mode = mt6363_regulator_get_mode, 721 .set_load = mt6363_regulator_set_load, 722 .set_over_current_protection = mt6363_set_ocp, 723}; 724 725/* The array is indexed by id(MT6363_ID_XXX) */ 726static struct mt6363_regulator_info mt6363_regulators[] = { 727 MT6363_BUCK("vbuck1", VBUCK1, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 728 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 1), 729 MT6363_BUCK("vbuck2", VBUCK2, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 730 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 2), 731 MT6363_BUCK("vbuck3", VBUCK3, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 732 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 3), 733 MT6363_BUCK("vbuck4", VBUCK4, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 734 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 4), 735 MT6363_BUCK("vbuck5", VBUCK5, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 736 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 5), 737 MT6363_BUCK("vbuck6", VBUCK6, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 738 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 6), 739 MT6363_BUCK("vbuck7", VBUCK7, 0, 1193750, 6250, MT6363_RG_BUCK0_EN_ADDR, 740 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_1_FCCM_ADDR, 7), 741 MT6363_BUCK("vs1", VS1, 0, 2200000, 12500, MT6363_RG_BUCK1_EN_ADDR, 742 MT6363_RG_BUCK1_LP_ADDR, MT6363_RG_VS1_FCCM_ADDR, 8), 743 MT6363_BUCK("vs2", VS2, 0, 1600000, 12500, MT6363_RG_BUCK0_EN_ADDR, 744 MT6363_RG_BUCK0_LP_ADDR, MT6363_RG_BUCK0_FCCM_ADDR, 0), 745 MT6363_BUCK("vs3", VS3, 0, 1193750, 6250, MT6363_RG_BUCK1_EN_ADDR, 746 MT6363_RG_BUCK1_LP_ADDR, MT6363_RG_VS3_FCCM_ADDR, 9), 747 MT6363_LDO_VT("va12-1", VA12_1, "vs2-ldo2", 3, 37), 748 MT6363_LDO_VT("va12-2", VA12_2, "vs2-ldo2", 3, 38), 749 MT6363_LDO_LINEAR_CAL_OPS("va15", VA15, "vs1-ldo1", mt6363_ldo_va15_ops, 3, 39), 750 MT6363_LDO_VT("vaux18", VAUX18, "vsys-ldo1", 2, 31), 751 MT6363_LDO_VT("vcn13", VCN13, "vs2-ldo2", 1, 17), 752 MT6363_LDO_VT("vcn15", VCN15, "vs1-ldo2", 3, 16), 753 MT6363_LDO_LINEAR_CAL_OPS("vemc", VEMC, "vsys-ldo1", mt6363_ldo_vemc_ops, 0, 32), 754 MT6363_LDO_VT("vio0p75", VIO075, "vs1-ldo1", 5, 36), 755 MT6363_LDO_VT("vio18", VIO18, "vs1-ldo2", 3, 35), 756 MT6363_LDO_VT("vm18", VM18, "vs1-ldo1", 4, 40), 757 MT6363_LDO_L("vsram-apu", VSRAM_APU, "vs3-ldo1", 400000, 1193750, 6250, BUCK1, 30), 758 MT6363_LDO_L("vsram-cpub", VSRAM_CPUB, "vs2-ldo1", 400000, 1193750, 6250, BUCK1, 27), 759 MT6363_LDO_L("vsram-cpum", VSRAM_CPUM, "vs2-ldo1", 400000, 1193750, 6250, BUCK1, 28), 760 MT6363_LDO_L("vsram-cpul", VSRAM_CPUL, "vs2-ldo2", 400000, 1193750, 6250, BUCK1, 29), 761 MT6363_LDO_L_SC("vsram-digrf", VSRAM_DIGRF, "vs3-ldo1", 400000, 1193750, 6250, BUCK1, 23), 762 MT6363_LDO_L_SC("vsram-mdfe", VSRAM_MDFE, "vs3-ldo1", 400000, 1193750, 6250, BUCK1, 24), 763 MT6363_LDO_L_SC("vsram-modem", VSRAM_MODEM, "vs3-ldo2", 400000, 1193750, 6250, BUCK1, 25), 764 MT6363_LDO_VT("vrf0p9", VRF09, "vs3-ldo2", 1, 18), 765 MT6363_LDO_VT("vrf12", VRF12, "vs2-ldo1", 3, 19), 766 MT6363_LDO_VT("vrf13", VRF13, "vs2-ldo1", 1, 20), 767 MT6363_LDO_VT("vrf18", VRF18, "vs1-ldo1", 3, 21), 768 MT6363_LDO_VT("vrf-io18", VRFIO18, "vs1-ldo1", 3, 22), 769 MT6363_LDO_VT("vtref18", VTREF18, "vsys-ldo1", 2, 26), 770 MT6363_LDO_VT("vufs12", VUFS12, "vs2-ldo1", 4, 33), 771 MT6363_LDO_VT("vufs18", VUFS18, "vs1-ldo2", 3, 34), 772}; 773 774static int mt6363_backup_op_setting(struct regmap *map, struct mt6363_regulator_info *info) 775{ 776 unsigned int i, val; 777 int ret; 778 779 ret = regmap_read(map, info->op_en_reg + OP_CFG_OFFSET, &val); 780 if (ret) 781 return ret; 782 783 info->orig_op_cfg = val; 784 785 for (i = 0; i < 3; i++) { 786 ret = regmap_read(map, info->op_en_reg + i, &val); 787 if (ret) 788 return ret; 789 790 info->orig_op_en |= val << (i * 8); 791 } 792 793 return 0; 794} 795 796static void mt6363_irq_remove(void *data) 797{ 798 int *virq = data; 799 800 irq_dispose_mapping(*virq); 801} 802 803static void mt6363_spmi_remove(void *data) 804{ 805 struct spmi_device *sdev = data; 806 807 spmi_device_remove(sdev); 808}; 809 810static struct regmap *mt6363_spmi_register_regmap(struct device *dev) 811{ 812 struct regmap_config mt6363_regmap_config = { 813 .reg_bits = 16, 814 .val_bits = 16, 815 .max_register = 0x1f90, 816 .fast_io = true, 817 }; 818 struct spmi_device *sdev, *sparent; 819 u32 base; 820 int ret; 821 822 if (!dev->parent) 823 return ERR_PTR(-ENODEV); 824 825 ret = device_property_read_u32(dev, "reg", &base); 826 if (ret) 827 return ERR_PTR(ret); 828 829 sparent = to_spmi_device(dev->parent); 830 if (!sparent) 831 return ERR_PTR(-ENODEV); 832 833 sdev = spmi_device_alloc(sparent->ctrl); 834 if (!sdev) 835 return ERR_PTR(-ENODEV); 836 837 sdev->usid = sparent->usid; 838 dev_set_name(&sdev->dev, "%d-%02x-regulator", sdev->ctrl->nr, sdev->usid); 839 ret = device_add(&sdev->dev); 840 if (ret) { 841 put_device(&sdev->dev); 842 return ERR_PTR(ret); 843 }; 844 845 ret = devm_add_action_or_reset(dev, mt6363_spmi_remove, sdev); 846 if (ret) 847 return ERR_PTR(ret); 848 849 mt6363_regmap_config.reg_base = base; 850 851 return devm_regmap_init_spmi_ext(sdev, &mt6363_regmap_config); 852} 853 854static int mt6363_regulator_probe(struct platform_device *pdev) 855{ 856 struct device_node *interrupt_parent; 857 struct regulator_config config = {}; 858 struct mt6363_regulator_info *info; 859 struct device *dev = &pdev->dev; 860 struct regulator_dev *rdev; 861 struct irq_domain *domain; 862 struct irq_fwspec fwspec; 863 struct spmi_device *sdev; 864 int i, ret, val; 865 866 config.regmap = mt6363_spmi_register_regmap(dev); 867 if (IS_ERR(config.regmap)) 868 return dev_err_probe(dev, PTR_ERR(config.regmap), 869 "Cannot get regmap\n"); 870 config.dev = dev; 871 sdev = to_spmi_device(dev->parent); 872 873 /* 874 * The first read may fail if the bootloader sets sleep mode: wake up 875 * this PMIC with W/R on the SPMI bus and ignore the first result. 876 * This matches the MT6373 driver behavior. 877 */ 878 regmap_read(config.regmap, MT6363_TOP_TRAP, &val); 879 880 interrupt_parent = of_irq_find_parent(dev->of_node); 881 if (!interrupt_parent) 882 return dev_err_probe(dev, -EINVAL, "Cannot find IRQ parent\n"); 883 884 domain = irq_find_host(interrupt_parent); 885 of_node_put(interrupt_parent); 886 fwspec.fwnode = domain->fwnode; 887 888 fwspec.param_count = 3; 889 fwspec.param[0] = sdev->usid; 890 fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH; 891 892 for (i = 0; i < ARRAY_SIZE(mt6363_regulators); i++) { 893 info = &mt6363_regulators[i]; 894 895 fwspec.param[1] = info->hwirq; 896 info->virq = irq_create_fwspec_mapping(&fwspec); 897 if (!info->virq) 898 return dev_err_probe(dev, -EINVAL, 899 "Failed to map IRQ%d\n", info->hwirq); 900 901 ret = devm_add_action_or_reset(dev, mt6363_irq_remove, &info->virq); 902 if (ret) 903 return ret; 904 905 config.driver_data = info; 906 INIT_DELAYED_WORK(&info->oc_work, mt6363_oc_irq_enable_work); 907 908 rdev = devm_regulator_register(dev, &info->desc, &config); 909 if (IS_ERR(rdev)) 910 return dev_err_probe(dev, PTR_ERR(rdev), 911 "failed to register %s\n", info->desc.name); 912 913 if (info->lp_imax_uA) { 914 ret = mt6363_backup_op_setting(config.regmap, info); 915 if (ret) { 916 dev_warn(dev, "Failed to backup op_setting for %s\n", 917 info->desc.name); 918 info->lp_imax_uA = 0; 919 } 920 } 921 } 922 923 return 0; 924} 925 926static const struct of_device_id mt6363_regulator_match[] = { 927 { .compatible = "mediatek,mt6363-regulator" }, 928 { /* sentinel */ } 929}; 930 931static struct platform_driver mt6363_regulator_driver = { 932 .driver = { 933 .name = "mt6363-regulator", 934 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 935 .of_match_table = mt6363_regulator_match, 936 }, 937 .probe = mt6363_regulator_probe, 938}; 939module_platform_driver(mt6363_regulator_driver); 940 941MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>"); 942MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6363 PMIC"); 943MODULE_LICENSE("GPL");
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