pwm-adp5585.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Analog Devices ADP5585 PWM driver
  4 *
  5 * Copyright 2022 NXP
  6 * Copyright 2024 Ideas on Board Oy
  7 *
  8 * Limitations:
  9 * - The .apply() operation executes atomically, but may not wait for the
 10 *   period to complete (this is not documented and would need to be tested).
 11 * - Disabling the PWM drives the output pin to a low level immediately.
 12 * - The hardware can only generate normal polarity output.
 13 */
 14
 15#include <asm/byteorder.h>
 16
 17#include <linux/device.h>
 18#include <linux/err.h>
 19#include <linux/math64.h>
 20#include <linux/mfd/adp5585.h>
 21#include <linux/minmax.h>
 22#include <linux/module.h>
 23#include <linux/mod_devicetable.h>
 24#include <linux/platform_device.h>
 25#include <linux/pwm.h>
 26#include <linux/regmap.h>
 27#include <linux/time.h>
 28#include <linux/types.h>
 29
 30#define ADP5585_PWM_CHAN_NUM		1
 31
 32#define ADP5585_PWM_OSC_FREQ_HZ		1000000U
 33#define ADP5585_PWM_MIN_PERIOD_NS	(2ULL * NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ)
 34#define ADP5585_PWM_MAX_PERIOD_NS	(2ULL * 0xffff * NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ)
 35
 36struct adp5585_pwm_chip {
 37	unsigned int pwm_cfg;
 38	unsigned int pwm_offt_low;
 39	unsigned int pwm_ont_low;
 40};
 41
 42struct adp5585_pwm {
 43	const struct adp5585_pwm_chip *info;
 44	struct regmap *regmap;
 45	unsigned int ext_cfg;
 46};
 47
 48static int pwm_adp5585_request(struct pwm_chip *chip, struct pwm_device *pwm)
 49{
 50	struct adp5585_pwm *adp5585_pwm = pwmchip_get_drvdata(chip);
 51
 52	/* Configure the R3 pin as PWM output. */
 53	return regmap_update_bits(adp5585_pwm->regmap, adp5585_pwm->ext_cfg,
 54				  ADP5585_R3_EXTEND_CFG_MASK,
 55				  ADP5585_R3_EXTEND_CFG_PWM_OUT);
 56}
 57
 58static void pwm_adp5585_free(struct pwm_chip *chip, struct pwm_device *pwm)
 59{
 60	struct adp5585_pwm *adp5585_pwm = pwmchip_get_drvdata(chip);
 61
 62	regmap_update_bits(adp5585_pwm->regmap, adp5585_pwm->ext_cfg,
 63			   ADP5585_R3_EXTEND_CFG_MASK,
 64			   ADP5585_R3_EXTEND_CFG_GPIO4);
 65}
 66
 67static int pwm_adp5585_apply(struct pwm_chip *chip,
 68			     struct pwm_device *pwm,
 69			     const struct pwm_state *state)
 70{
 71	struct adp5585_pwm *adp5585_pwm = pwmchip_get_drvdata(chip);
 72	const struct adp5585_pwm_chip *info = adp5585_pwm->info;
 73	struct regmap *regmap = adp5585_pwm->regmap;
 74	u64 period, duty_cycle;
 75	u32 on, off;
 76	__le16 val;
 77	int ret;
 78
 79	if (!state->enabled) {
 80		regmap_clear_bits(regmap, info->pwm_cfg, ADP5585_PWM_EN);
 81		return 0;
 82	}
 83
 84	if (state->polarity != PWM_POLARITY_NORMAL)
 85		return -EINVAL;
 86
 87	if (state->period < ADP5585_PWM_MIN_PERIOD_NS)
 88		return -EINVAL;
 89
 90	period = min(state->period, ADP5585_PWM_MAX_PERIOD_NS);
 91	duty_cycle = min(state->duty_cycle, period);
 92
 93	/*
 94	 * Compute the on and off time. As the internal oscillator frequency is
 95	 * 1MHz, the calculation can be simplified without loss of precision.
 96	 */
 97	on = div_u64(duty_cycle, NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ);
 98	off = div_u64(period, NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ) - on;
 99
100	val = cpu_to_le16(off);
101	ret = regmap_bulk_write(regmap, info->pwm_offt_low, &val, 2);
102	if (ret)
103		return ret;
104
105	val = cpu_to_le16(on);
106	ret = regmap_bulk_write(regmap, info->pwm_ont_low, &val, 2);
107	if (ret)
108		return ret;
109
110	/* Enable PWM in continuous mode and no external AND'ing. */
111	ret = regmap_update_bits(regmap, info->pwm_cfg,
112				 ADP5585_PWM_IN_AND | ADP5585_PWM_MODE |
113				 ADP5585_PWM_EN, ADP5585_PWM_EN);
114	if (ret)
115		return ret;
116
117	return regmap_set_bits(regmap, info->pwm_cfg, ADP5585_PWM_EN);
118}
119
120static int pwm_adp5585_get_state(struct pwm_chip *chip,
121				 struct pwm_device *pwm,
122				 struct pwm_state *state)
123{
124	struct adp5585_pwm *adp5585_pwm = pwmchip_get_drvdata(chip);
125	const struct adp5585_pwm_chip *info = adp5585_pwm->info;
126	struct regmap *regmap = adp5585_pwm->regmap;
127	unsigned int on, off;
128	unsigned int val;
129	__le16 on_off;
130	int ret;
131
132	ret = regmap_bulk_read(regmap, info->pwm_offt_low, &on_off, 2);
133	if (ret)
134		return ret;
135	off = le16_to_cpu(on_off);
136
137	ret = regmap_bulk_read(regmap, info->pwm_ont_low, &on_off, 2);
138	if (ret)
139		return ret;
140	on = le16_to_cpu(on_off);
141
142	state->duty_cycle = on * (NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ);
143	state->period = (on + off) * (NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ);
144
145	state->polarity = PWM_POLARITY_NORMAL;
146
147	regmap_read(regmap, info->pwm_cfg, &val);
148	state->enabled = !!(val & ADP5585_PWM_EN);
149
150	return 0;
151}
152
153static const struct pwm_ops adp5585_pwm_ops = {
154	.request = pwm_adp5585_request,
155	.free = pwm_adp5585_free,
156	.apply = pwm_adp5585_apply,
157	.get_state = pwm_adp5585_get_state,
158};
159
160static int adp5585_pwm_probe(struct platform_device *pdev)
161{
162	const struct platform_device_id *id = platform_get_device_id(pdev);
163	struct device *dev = &pdev->dev;
164	struct adp5585_dev *adp5585 = dev_get_drvdata(dev->parent);
165	struct adp5585_pwm *adp5585_pwm;
166	struct pwm_chip *chip;
167	int ret;
168
169	chip = devm_pwmchip_alloc(dev, ADP5585_PWM_CHAN_NUM,
170				  sizeof(*adp5585_pwm));
171	if (IS_ERR(chip))
172		return PTR_ERR(chip);
173
174	adp5585_pwm = pwmchip_get_drvdata(chip);
175	adp5585_pwm->regmap = adp5585->regmap;
176	adp5585_pwm->ext_cfg = adp5585->regs->ext_cfg;
177
178	adp5585_pwm->info = (const struct adp5585_pwm_chip *)id->driver_data;
179	if (!adp5585_pwm->info)
180		return -ENODEV;
181
182	device_set_of_node_from_dev(dev, dev->parent);
183
184	chip->ops = &adp5585_pwm_ops;
185
186	ret = devm_pwmchip_add(dev, chip);
187	if (ret)
188		return dev_err_probe(dev, ret, "failed to add PWM chip\n");
189
190	return 0;
191}
192
193static const struct adp5585_pwm_chip adp5585_pwm_chip_info = {
194	.pwm_cfg = ADP5585_PWM_CFG,
195	.pwm_offt_low = ADP5585_PWM_OFFT_LOW,
196	.pwm_ont_low = ADP5585_PWM_ONT_LOW,
197};
198
199static const struct adp5585_pwm_chip adp5589_pwm_chip_info = {
200	.pwm_cfg = ADP5589_PWM_CFG,
201	.pwm_offt_low = ADP5589_PWM_OFFT_LOW,
202	.pwm_ont_low = ADP5589_PWM_ONT_LOW,
203};
204
205static const struct platform_device_id adp5585_pwm_id_table[] = {
206	{ "adp5585-pwm", (kernel_ulong_t)&adp5585_pwm_chip_info },
207	{ "adp5589-pwm", (kernel_ulong_t)&adp5589_pwm_chip_info },
208	{ /* Sentinel */ }
209};
210MODULE_DEVICE_TABLE(platform, adp5585_pwm_id_table);
211
212static struct platform_driver adp5585_pwm_driver = {
213	.driver	= {
214		.name = "adp5585-pwm",
215	},
216	.probe = adp5585_pwm_probe,
217	.id_table = adp5585_pwm_id_table,
218};
219module_platform_driver(adp5585_pwm_driver);
220
221MODULE_AUTHOR("Xiaoning Wang <xiaoning.wang@nxp.com>");
222MODULE_DESCRIPTION("ADP5585 PWM Driver");
223MODULE_LICENSE("GPL");