qcom_smbx.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
   4 * Copyright (c) 2023, Linaro Ltd.
   5 * Author: Casey Connolly <casey.connolly@linaro.org>
   6 *
   7 * This driver is for the switch-mode battery charger and boost
   8 * hardware found in pmi8998 and related PMICs.
   9 */
  10
  11#include <linux/bits.h>
  12#include <linux/devm-helpers.h>
  13#include <linux/iio/consumer.h>
  14#include <linux/interrupt.h>
  15#include <linux/kernel.h>
  16#include <linux/minmax.h>
  17#include <linux/module.h>
  18#include <linux/platform_device.h>
  19#include <linux/pm_wakeirq.h>
  20#include <linux/of.h>
  21#include <linux/power_supply.h>
  22#include <linux/regmap.h>
  23#include <linux/types.h>
  24#include <linux/workqueue.h>
  25
  26/* clang-format off */
  27#define BATTERY_CHARGER_STATUS_1			0x06
  28#define BVR_INITIAL_RAMP_BIT				BIT(7)
  29#define CC_SOFT_TERMINATE_BIT				BIT(6)
  30#define STEP_CHARGING_STATUS_SHIFT			3
  31#define STEP_CHARGING_STATUS_MASK			GENMASK(5, 3)
  32#define BATTERY_CHARGER_STATUS_MASK			GENMASK(2, 0)
  33
  34#define BATTERY_CHARGER_STATUS_2			0x07
  35#define INPUT_CURRENT_LIMITED_BIT			BIT(7)
  36#define CHARGER_ERROR_STATUS_SFT_EXPIRE_BIT		BIT(6)
  37#define CHARGER_ERROR_STATUS_BAT_OV_BIT			BIT(5)
  38#define CHARGER_ERROR_STATUS_BAT_TERM_MISSING_BIT	BIT(4)
  39#define BAT_TEMP_STATUS_MASK				GENMASK(3, 0)
  40#define BAT_TEMP_STATUS_SOFT_LIMIT_MASK			GENMASK(3, 2)
  41#define BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT		BIT(3)
  42#define BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT		BIT(2)
  43#define BAT_TEMP_STATUS_TOO_HOT_BIT			BIT(1)
  44#define BAT_TEMP_STATUS_TOO_COLD_BIT			BIT(0)
  45
  46#define BATTERY_CHARGER_STATUS_4			0x0A
  47#define CHARGE_CURRENT_POST_JEITA_MASK			GENMASK(7, 0)
  48
  49#define BATTERY_CHARGER_STATUS_7			0x0D
  50#define ENABLE_TRICKLE_BIT				BIT(7)
  51#define ENABLE_PRE_CHARGING_BIT				BIT(6)
  52#define ENABLE_FAST_CHARGING_BIT			BIT(5)
  53#define ENABLE_FULLON_MODE_BIT				BIT(4)
  54#define TOO_COLD_ADC_BIT				BIT(3)
  55#define TOO_HOT_ADC_BIT					BIT(2)
  56#define HOT_SL_ADC_BIT					BIT(1)
  57#define COLD_SL_ADC_BIT					BIT(0)
  58
  59#define CHARGING_ENABLE_CMD				0x42
  60#define CHARGING_ENABLE_CMD_BIT				BIT(0)
  61
  62#define CHGR_CFG2					0x51
  63#define CHG_EN_SRC_BIT					BIT(7)
  64#define CHG_EN_POLARITY_BIT				BIT(6)
  65#define PRETOFAST_TRANSITION_CFG_BIT			BIT(5)
  66#define BAT_OV_ECC_BIT					BIT(4)
  67#define I_TERM_BIT					BIT(3)
  68#define AUTO_RECHG_BIT					BIT(2)
  69#define EN_ANALOG_DROP_IN_VBATT_BIT			BIT(1)
  70#define CHARGER_INHIBIT_BIT				BIT(0)
  71
  72#define PRE_CHARGE_CURRENT_CFG				0x60
  73#define PRE_CHARGE_CURRENT_SETTING_MASK			GENMASK(5, 0)
  74
  75#define FAST_CHARGE_CURRENT_CFG				0x61
  76#define FAST_CHARGE_CURRENT_SETTING_MASK		GENMASK(7, 0)
  77
  78#define FLOAT_VOLTAGE_CFG				0x70
  79#define FLOAT_VOLTAGE_SETTING_MASK			GENMASK(7, 0)
  80
  81#define FG_UPDATE_CFG_2_SEL				0x7D
  82#define SOC_LT_OTG_THRESH_SEL_BIT			BIT(3)
  83#define SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(2)
  84#define VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT		BIT(1)
  85#define IBT_LT_CHG_TERM_THRESH_SEL_BIT			BIT(0)
  86
  87#define JEITA_EN_CFG					0x90
  88#define JEITA_EN_HARDLIMIT_BIT				BIT(4)
  89#define JEITA_EN_HOT_SL_FCV_BIT				BIT(3)
  90#define JEITA_EN_COLD_SL_FCV_BIT			BIT(2)
  91#define JEITA_EN_HOT_SL_CCC_BIT				BIT(1)
  92#define JEITA_EN_COLD_SL_CCC_BIT			BIT(0)
  93
  94#define INT_RT_STS					0x310
  95#define TYPE_C_CHANGE_RT_STS_BIT			BIT(7)
  96#define USBIN_ICL_CHANGE_RT_STS_BIT			BIT(6)
  97#define USBIN_SOURCE_CHANGE_RT_STS_BIT			BIT(5)
  98#define USBIN_PLUGIN_RT_STS_BIT				BIT(4)
  99#define USBIN_OV_RT_STS_BIT				BIT(3)
 100#define USBIN_UV_RT_STS_BIT				BIT(2)
 101#define USBIN_LT_3P6V_RT_STS_BIT			BIT(1)
 102#define USBIN_COLLAPSE_RT_STS_BIT			BIT(0)
 103
 104#define OTG_CFG						0x153
 105#define OTG_RESERVED_MASK				GENMASK(7, 6)
 106#define DIS_OTG_ON_TLIM_BIT				BIT(5)
 107#define QUICKSTART_OTG_FASTROLESWAP_BIT			BIT(4)
 108#define INCREASE_DFP_TIME_BIT				BIT(3)
 109#define ENABLE_OTG_IN_DEBUG_MODE_BIT			BIT(2)
 110#define OTG_EN_SRC_CFG_BIT				BIT(1)
 111#define CONCURRENT_MODE_CFG_BIT				BIT(0)
 112
 113#define OTG_ENG_OTG_CFG					0x1C0
 114#define ENG_BUCKBOOST_HALT1_8_MODE_BIT			BIT(0)
 115
 116#define APSD_STATUS					0x307
 117#define APSD_STATUS_7_BIT				BIT(7)
 118#define HVDCP_CHECK_TIMEOUT_BIT				BIT(6)
 119#define SLOW_PLUGIN_TIMEOUT_BIT				BIT(5)
 120#define ENUMERATION_DONE_BIT				BIT(4)
 121#define VADP_CHANGE_DONE_AFTER_AUTH_BIT			BIT(3)
 122#define QC_AUTH_DONE_STATUS_BIT				BIT(2)
 123#define QC_CHARGER_BIT					BIT(1)
 124#define APSD_DTC_STATUS_DONE_BIT			BIT(0)
 125
 126#define APSD_RESULT_STATUS				0x308
 127#define ICL_OVERRIDE_LATCH_BIT				BIT(7)
 128#define APSD_RESULT_STATUS_MASK				GENMASK(6, 0)
 129#define QC_3P0_BIT					BIT(6)
 130#define QC_2P0_BIT					BIT(5)
 131#define FLOAT_CHARGER_BIT				BIT(4)
 132#define DCP_CHARGER_BIT					BIT(3)
 133#define CDP_CHARGER_BIT					BIT(2)
 134#define OCP_CHARGER_BIT					BIT(1)
 135#define SDP_CHARGER_BIT					BIT(0)
 136
 137#define TYPE_C_STATUS_1					0x30B
 138#define UFP_TYPEC_MASK					GENMASK(7, 5)
 139#define UFP_TYPEC_RDSTD_BIT				BIT(7)
 140#define UFP_TYPEC_RD1P5_BIT				BIT(6)
 141#define UFP_TYPEC_RD3P0_BIT				BIT(5)
 142#define UFP_TYPEC_FMB_255K_BIT				BIT(4)
 143#define UFP_TYPEC_FMB_301K_BIT				BIT(3)
 144#define UFP_TYPEC_FMB_523K_BIT				BIT(2)
 145#define UFP_TYPEC_FMB_619K_BIT				BIT(1)
 146#define UFP_TYPEC_OPEN_OPEN_BIT				BIT(0)
 147
 148#define TYPE_C_STATUS_2					0x30C
 149#define DFP_RA_OPEN_BIT					BIT(7)
 150#define TIMER_STAGE_BIT					BIT(6)
 151#define EXIT_UFP_MODE_BIT				BIT(5)
 152#define EXIT_DFP_MODE_BIT				BIT(4)
 153#define DFP_TYPEC_MASK					GENMASK(3, 0)
 154#define DFP_RD_OPEN_BIT					BIT(3)
 155#define DFP_RD_RA_VCONN_BIT				BIT(2)
 156#define DFP_RD_RD_BIT					BIT(1)
 157#define DFP_RA_RA_BIT					BIT(0)
 158
 159#define TYPE_C_STATUS_3					0x30D
 160#define ENABLE_BANDGAP_BIT				BIT(7)
 161#define U_USB_GND_NOVBUS_BIT				BIT(6)
 162#define U_USB_FLOAT_NOVBUS_BIT				BIT(5)
 163#define U_USB_GND_BIT					BIT(4)
 164#define U_USB_FMB1_BIT					BIT(3)
 165#define U_USB_FLOAT1_BIT				BIT(2)
 166#define U_USB_FMB2_BIT					BIT(1)
 167#define U_USB_FLOAT2_BIT				BIT(0)
 168
 169#define TYPE_C_STATUS_4					0x30E
 170#define UFP_DFP_MODE_STATUS_BIT				BIT(7)
 171#define TYPEC_VBUS_STATUS_BIT				BIT(6)
 172#define TYPEC_VBUS_ERROR_STATUS_BIT			BIT(5)
 173#define TYPEC_DEBOUNCE_DONE_STATUS_BIT			BIT(4)
 174#define TYPEC_UFP_AUDIO_ADAPT_STATUS_BIT		BIT(3)
 175#define TYPEC_VCONN_OVERCURR_STATUS_BIT			BIT(2)
 176#define CC_ORIENTATION_BIT				BIT(1)
 177#define CC_ATTACHED_BIT					BIT(0)
 178
 179#define TYPE_C_STATUS_5					0x30F
 180#define TRY_SOURCE_FAILED_BIT				BIT(6)
 181#define TRY_SINK_FAILED_BIT				BIT(5)
 182#define TIMER_STAGE_2_BIT				BIT(4)
 183#define TYPEC_LEGACY_CABLE_STATUS_BIT			BIT(3)
 184#define TYPEC_NONCOMP_LEGACY_CABLE_STATUS_BIT		BIT(2)
 185#define TYPEC_TRYSOURCE_DETECT_STATUS_BIT		BIT(1)
 186#define TYPEC_TRYSINK_DETECT_STATUS_BIT			BIT(0)
 187
 188#define CMD_APSD					0x341
 189#define ICL_OVERRIDE_BIT				BIT(1)
 190#define APSD_RERUN_BIT					BIT(0)
 191
 192#define TYPE_C_CFG					0x358
 193#define APSD_START_ON_CC_BIT				BIT(7)
 194#define WAIT_FOR_APSD_BIT				BIT(6)
 195#define FACTORY_MODE_DETECTION_EN_BIT			BIT(5)
 196#define FACTORY_MODE_ICL_3A_4A_BIT			BIT(4)
 197#define FACTORY_MODE_DIS_CHGING_CFG_BIT			BIT(3)
 198#define SUSPEND_NON_COMPLIANT_CFG_BIT			BIT(2)
 199#define VCONN_OC_CFG_BIT				BIT(1)
 200#define TYPE_C_OR_U_USB_BIT				BIT(0)
 201
 202#define TYPE_C_CFG_2					0x359
 203#define TYPE_C_DFP_CURRSRC_MODE_BIT			BIT(7)
 204#define DFP_CC_1P4V_OR_1P6V_BIT				BIT(6)
 205#define VCONN_SOFTSTART_CFG_MASK			GENMASK(5, 4)
 206#define EN_TRY_SOURCE_MODE_BIT				BIT(3)
 207#define USB_FACTORY_MODE_ENABLE_BIT			BIT(2)
 208#define TYPE_C_UFP_MODE_BIT				BIT(1)
 209#define EN_80UA_180UA_CUR_SOURCE_BIT			BIT(0)
 210
 211#define TYPE_C_CFG_3					0x35A
 212#define TVBUS_DEBOUNCE_BIT				BIT(7)
 213#define TYPEC_LEGACY_CABLE_INT_EN_BIT			BIT(6)
 214#define TYPEC_NONCOMPLIANT_LEGACY_CABLE_INT_EN_B	BIT(5)
 215#define TYPEC_TRYSOURCE_DETECT_INT_EN_BIT		BIT(4)
 216#define TYPEC_TRYSINK_DETECT_INT_EN_BIT			BIT(3)
 217#define EN_TRYSINK_MODE_BIT				BIT(2)
 218#define EN_LEGACY_CABLE_DETECTION_BIT			BIT(1)
 219#define ALLOW_PD_DRING_UFP_TCCDB_BIT			BIT(0)
 220
 221#define USBIN_OPTIONS_1_CFG				0x362
 222#define CABLE_R_SEL_BIT					BIT(7)
 223#define HVDCP_AUTH_ALG_EN_CFG_BIT			BIT(6)
 224#define HVDCP_AUTONOMOUS_MODE_EN_CFG_BIT		BIT(5)
 225#define INPUT_PRIORITY_BIT				BIT(4)
 226#define AUTO_SRC_DETECT_BIT				BIT(3)
 227#define HVDCP_EN_BIT					BIT(2)
 228#define VADP_INCREMENT_VOLTAGE_LIMIT_BIT		BIT(1)
 229#define VADP_TAPER_TIMER_EN_BIT				BIT(0)
 230
 231#define USBIN_OPTIONS_2_CFG				0x363
 232#define WIPWR_RST_EUD_CFG_BIT				BIT(7)
 233#define SWITCHER_START_CFG_BIT				BIT(6)
 234#define DCD_TIMEOUT_SEL_BIT				BIT(5)
 235#define OCD_CURRENT_SEL_BIT				BIT(4)
 236#define SLOW_PLUGIN_TIMER_EN_CFG_BIT			BIT(3)
 237#define FLOAT_OPTIONS_MASK				GENMASK(2, 0)
 238#define FLOAT_DIS_CHGING_CFG_BIT			BIT(2)
 239#define SUSPEND_FLOAT_CFG_BIT				BIT(1)
 240#define FORCE_FLOAT_SDP_CFG_BIT				BIT(0)
 241
 242#define TAPER_TIMER_SEL_CFG				0x364
 243#define TYPEC_SPARE_CFG_BIT				BIT(7)
 244#define TYPEC_DRP_DFP_TIME_CFG_BIT			BIT(5)
 245#define TAPER_TIMER_SEL_MASK				GENMASK(1, 0)
 246
 247#define USBIN_LOAD_CFG					0x365
 248#define USBIN_OV_CH_LOAD_OPTION_BIT			BIT(7)
 249#define ICL_OVERRIDE_AFTER_APSD_BIT			BIT(4)
 250
 251#define USBIN_ICL_OPTIONS				0x366
 252#define CFG_USB3P0_SEL_BIT				BIT(2)
 253#define USB51_MODE_BIT					BIT(1)
 254#define USBIN_MODE_CHG_BIT				BIT(0)
 255
 256#define TYPE_C_INTRPT_ENB_SOFTWARE_CTRL			0x368
 257#define EXIT_SNK_BASED_ON_CC_BIT			BIT(7)
 258#define VCONN_EN_ORIENTATION_BIT			BIT(6)
 259#define TYPEC_VCONN_OVERCURR_INT_EN_BIT			BIT(5)
 260#define VCONN_EN_SRC_BIT				BIT(4)
 261#define VCONN_EN_VALUE_BIT				BIT(3)
 262#define TYPEC_POWER_ROLE_CMD_MASK			GENMASK(2, 0)
 263#define UFP_EN_CMD_BIT					BIT(2)
 264#define DFP_EN_CMD_BIT					BIT(1)
 265#define TYPEC_DISABLE_CMD_BIT				BIT(0)
 266
 267#define USBIN_CURRENT_LIMIT_CFG				0x370
 268#define USBIN_CURRENT_LIMIT_MASK			GENMASK(7, 0)
 269
 270#define USBIN_AICL_OPTIONS_CFG				0x380
 271#define SUSPEND_ON_COLLAPSE_USBIN_BIT			BIT(7)
 272#define USBIN_AICL_HDC_EN_BIT				BIT(6)
 273#define USBIN_AICL_START_AT_MAX_BIT			BIT(5)
 274#define USBIN_AICL_RERUN_EN_BIT				BIT(4)
 275#define USBIN_AICL_ADC_EN_BIT				BIT(3)
 276#define USBIN_AICL_EN_BIT				BIT(2)
 277#define USBIN_HV_COLLAPSE_RESPONSE_BIT			BIT(1)
 278#define USBIN_LV_COLLAPSE_RESPONSE_BIT			BIT(0)
 279
 280#define USBIN_5V_AICL_THRESHOLD_CFG			0x381
 281#define USBIN_5V_AICL_THRESHOLD_CFG_MASK		GENMASK(2, 0)
 282
 283#define USBIN_CONT_AICL_THRESHOLD_CFG			0x384
 284#define USBIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
 285
 286#define DC_ENG_SSUPPLY_CFG2				0x4C1
 287#define ENG_SSUPPLY_IVREF_OTG_SS_MASK			GENMASK(2, 0)
 288#define OTG_SS_SLOW					0x3
 289
 290#define DCIN_AICL_REF_SEL_CFG				0x481
 291#define DCIN_CONT_AICL_THRESHOLD_CFG_MASK		GENMASK(5, 0)
 292
 293#define WI_PWR_OPTIONS					0x495
 294#define CHG_OK_BIT					BIT(7)
 295#define WIPWR_UVLO_IRQ_OPT_BIT				BIT(6)
 296#define BUCK_HOLDOFF_ENABLE_BIT				BIT(5)
 297#define CHG_OK_HW_SW_SELECT_BIT				BIT(4)
 298#define WIPWR_RST_ENABLE_BIT				BIT(3)
 299#define DCIN_WIPWR_IRQ_SELECT_BIT			BIT(2)
 300#define AICL_SWITCH_ENABLE_BIT				BIT(1)
 301#define ZIN_ICL_ENABLE_BIT				BIT(0)
 302
 303#define ICL_STATUS					0x607
 304#define INPUT_CURRENT_LIMIT_MASK			GENMASK(7, 0)
 305
 306#define POWER_PATH_STATUS				0x60B
 307#define P_PATH_INPUT_SS_DONE_BIT			BIT(7)
 308#define P_PATH_USBIN_SUSPEND_STS_BIT			BIT(6)
 309#define P_PATH_DCIN_SUSPEND_STS_BIT			BIT(5)
 310#define P_PATH_USE_USBIN_BIT				BIT(4)
 311#define P_PATH_USE_DCIN_BIT				BIT(3)
 312#define P_PATH_POWER_PATH_MASK				GENMASK(2, 1)
 313#define P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT		BIT(0)
 314
 315#define BARK_BITE_WDOG_PET				0x643
 316#define BARK_BITE_WDOG_PET_BIT				BIT(0)
 317
 318#define WD_CFG						0x651
 319#define WATCHDOG_TRIGGER_AFP_EN_BIT			BIT(7)
 320#define BARK_WDOG_INT_EN_BIT				BIT(6)
 321#define BITE_WDOG_INT_EN_BIT				BIT(5)
 322#define SFT_AFTER_WDOG_IRQ_MASK				GENMASK(4, 3)
 323#define WDOG_IRQ_SFT_BIT				BIT(2)
 324#define WDOG_TIMER_EN_ON_PLUGIN_BIT			BIT(1)
 325#define WDOG_TIMER_EN_BIT				BIT(0)
 326
 327#define SNARL_BARK_BITE_WD_CFG				0x653
 328#define BITE_WDOG_DISABLE_CHARGING_CFG_BIT		BIT(7)
 329#define SNARL_WDOG_TIMEOUT_MASK				GENMASK(6, 4)
 330#define BARK_WDOG_TIMEOUT_MASK				GENMASK(3, 2)
 331#define BITE_WDOG_TIMEOUT_MASK				GENMASK(1, 0)
 332
 333#define AICL_RERUN_TIME_CFG				0x661
 334#define AICL_RERUN_TIME_MASK				GENMASK(1, 0)
 335
 336#define STAT_CFG					0x690
 337#define STAT_SW_OVERRIDE_VALUE_BIT			BIT(7)
 338#define STAT_SW_OVERRIDE_CFG_BIT			BIT(6)
 339#define STAT_PARALLEL_OFF_DG_CFG_MASK			GENMASK(5, 4)
 340#define STAT_POLARITY_CFG_BIT				BIT(3)
 341#define STAT_PARALLEL_CFG_BIT				BIT(2)
 342#define STAT_FUNCTION_CFG_BIT				BIT(1)
 343#define STAT_IRQ_PULSING_EN_BIT				BIT(0)
 344
 345#define SDP_CURRENT_UA					500000
 346#define CDP_CURRENT_UA					1500000
 347#define DCP_CURRENT_UA					1500000
 348#define CURRENT_MAX_UA					DCP_CURRENT_UA
 349
 350/* pmi8998 registers represent current in increments of 1/40th of an amp */
 351#define CURRENT_SCALE_FACTOR				25000
 352/* clang-format on */
 353
 354enum charger_status {
 355	TRICKLE_CHARGE = 0,
 356	PRE_CHARGE,
 357	FAST_CHARGE,
 358	FULLON_CHARGE,
 359	TAPER_CHARGE,
 360	TERMINATE_CHARGE,
 361	INHIBIT_CHARGE,
 362	DISABLE_CHARGE,
 363};
 364
 365struct smb_init_register {
 366	u16 addr;
 367	u8 mask;
 368	u8 val;
 369};
 370
 371/**
 372 * struct smb_chip - smb chip structure
 373 * @dev:		Device reference for power_supply
 374 * @name:		The platform device name
 375 * @base:		Base address for smb registers
 376 * @regmap:		Register map
 377 * @batt_info:		Battery data from DT
 378 * @status_change_work: Worker to handle plug/unplug events
 379 * @cable_irq:		USB plugin IRQ
 380 * @wakeup_enabled:	If the cable IRQ will cause a wakeup
 381 * @usb_in_i_chan:	USB_IN current measurement channel
 382 * @usb_in_v_chan:	USB_IN voltage measurement channel
 383 * @chg_psy:		Charger power supply instance
 384 */
 385struct smb_chip {
 386	struct device *dev;
 387	const char *name;
 388	unsigned int base;
 389	struct regmap *regmap;
 390	struct power_supply_battery_info *batt_info;
 391
 392	struct delayed_work status_change_work;
 393	int cable_irq;
 394	bool wakeup_enabled;
 395
 396	struct iio_channel *usb_in_i_chan;
 397	struct iio_channel *usb_in_v_chan;
 398
 399	struct power_supply *chg_psy;
 400};
 401
 402static enum power_supply_property smb_properties[] = {
 403	POWER_SUPPLY_PROP_MANUFACTURER,
 404	POWER_SUPPLY_PROP_MODEL_NAME,
 405	POWER_SUPPLY_PROP_CURRENT_MAX,
 406	POWER_SUPPLY_PROP_CURRENT_NOW,
 407	POWER_SUPPLY_PROP_VOLTAGE_NOW,
 408	POWER_SUPPLY_PROP_STATUS,
 409	POWER_SUPPLY_PROP_HEALTH,
 410	POWER_SUPPLY_PROP_ONLINE,
 411	POWER_SUPPLY_PROP_USB_TYPE,
 412};
 413
 414static int smb_get_prop_usb_online(struct smb_chip *chip, int *val)
 415{
 416	unsigned int stat;
 417	int rc;
 418
 419	rc = regmap_read(chip->regmap, chip->base + POWER_PATH_STATUS, &stat);
 420	if (rc < 0) {
 421		dev_err(chip->dev, "Couldn't read power path status: %d\n", rc);
 422		return rc;
 423	}
 424
 425	*val = (stat & P_PATH_USE_USBIN_BIT) &&
 426	       (stat & P_PATH_VALID_INPUT_POWER_SOURCE_STS_BIT);
 427	return 0;
 428}
 429
 430/*
 431 * Qualcomm "automatic power source detection" aka APSD
 432 * tells us what type of charger we're connected to.
 433 */
 434static int smb_apsd_get_charger_type(struct smb_chip *chip, int *val)
 435{
 436	unsigned int apsd_stat, stat;
 437	int usb_online = 0;
 438	int rc;
 439
 440	rc = smb_get_prop_usb_online(chip, &usb_online);
 441	if (!usb_online) {
 442		*val = POWER_SUPPLY_USB_TYPE_UNKNOWN;
 443		return rc;
 444	}
 445
 446	rc = regmap_read(chip->regmap, chip->base + APSD_STATUS, &apsd_stat);
 447	if (rc < 0) {
 448		dev_err(chip->dev, "Failed to read apsd status, rc = %d", rc);
 449		return rc;
 450	}
 451	if (!(apsd_stat & APSD_DTC_STATUS_DONE_BIT)) {
 452		dev_dbg(chip->dev, "Apsd not ready");
 453		return -EAGAIN;
 454	}
 455
 456	rc = regmap_read(chip->regmap, chip->base + APSD_RESULT_STATUS, &stat);
 457	if (rc < 0) {
 458		dev_err(chip->dev, "Failed to read apsd result, rc = %d", rc);
 459		return rc;
 460	}
 461
 462	stat &= APSD_RESULT_STATUS_MASK;
 463
 464	if (stat & CDP_CHARGER_BIT)
 465		*val = POWER_SUPPLY_USB_TYPE_CDP;
 466	else if (stat & (DCP_CHARGER_BIT | OCP_CHARGER_BIT | FLOAT_CHARGER_BIT))
 467		*val = POWER_SUPPLY_USB_TYPE_DCP;
 468	else /* SDP_CHARGER_BIT (or others) */
 469		*val = POWER_SUPPLY_USB_TYPE_SDP;
 470
 471	return 0;
 472}
 473
 474static int smb_get_prop_status(struct smb_chip *chip, int *val)
 475{
 476	unsigned char stat[2];
 477	int usb_online = 0;
 478	int rc;
 479
 480	rc = smb_get_prop_usb_online(chip, &usb_online);
 481	if (!usb_online) {
 482		*val = POWER_SUPPLY_STATUS_DISCHARGING;
 483		return rc;
 484	}
 485
 486	rc = regmap_bulk_read(chip->regmap,
 487			      chip->base + BATTERY_CHARGER_STATUS_1, &stat, 2);
 488	if (rc < 0) {
 489		dev_err(chip->dev, "Failed to read charging status ret=%d\n",
 490			rc);
 491		return rc;
 492	}
 493
 494	if (stat[1] & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
 495		*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
 496		return 0;
 497	}
 498
 499	stat[0] = stat[0] & BATTERY_CHARGER_STATUS_MASK;
 500
 501	switch (stat[0]) {
 502	case TRICKLE_CHARGE:
 503	case PRE_CHARGE:
 504	case FAST_CHARGE:
 505	case FULLON_CHARGE:
 506	case TAPER_CHARGE:
 507		*val = POWER_SUPPLY_STATUS_CHARGING;
 508		return rc;
 509	case DISABLE_CHARGE:
 510		*val = POWER_SUPPLY_STATUS_NOT_CHARGING;
 511		return rc;
 512	case TERMINATE_CHARGE:
 513	case INHIBIT_CHARGE:
 514		*val = POWER_SUPPLY_STATUS_FULL;
 515		return rc;
 516	default:
 517		*val = POWER_SUPPLY_STATUS_UNKNOWN;
 518		return rc;
 519	}
 520}
 521
 522static inline int smb_get_current_limit(struct smb_chip *chip,
 523					 unsigned int *val)
 524{
 525	int rc = regmap_read(chip->regmap, chip->base + ICL_STATUS, val);
 526
 527	if (rc >= 0)
 528		*val *= CURRENT_SCALE_FACTOR;
 529	return rc;
 530}
 531
 532static int smb_set_current_limit(struct smb_chip *chip, unsigned int val)
 533{
 534	unsigned char val_raw;
 535
 536	if (val > 4800000) {
 537		dev_err(chip->dev,
 538			"Can't set current limit higher than 4800000uA");
 539		return -EINVAL;
 540	}
 541	val_raw = val / CURRENT_SCALE_FACTOR;
 542
 543	return regmap_write(chip->regmap, chip->base + USBIN_CURRENT_LIMIT_CFG,
 544			    val_raw);
 545}
 546
 547static void smb_status_change_work(struct work_struct *work)
 548{
 549	unsigned int charger_type, current_ua;
 550	int usb_online = 0;
 551	int count, rc;
 552	struct smb_chip *chip;
 553
 554	chip = container_of(work, struct smb_chip, status_change_work.work);
 555
 556	smb_get_prop_usb_online(chip, &usb_online);
 557	if (!usb_online)
 558		return;
 559
 560	for (count = 0; count < 3; count++) {
 561		dev_dbg(chip->dev, "get charger type retry %d\n", count);
 562		rc = smb_apsd_get_charger_type(chip, &charger_type);
 563		if (rc != -EAGAIN)
 564			break;
 565		msleep(100);
 566	}
 567
 568	if (rc < 0 && rc != -EAGAIN) {
 569		dev_err(chip->dev, "get charger type failed: %d\n", rc);
 570		return;
 571	}
 572
 573	if (rc < 0) {
 574		rc = regmap_update_bits(chip->regmap, chip->base + CMD_APSD,
 575					APSD_RERUN_BIT, APSD_RERUN_BIT);
 576		schedule_delayed_work(&chip->status_change_work,
 577				      msecs_to_jiffies(1000));
 578		dev_dbg(chip->dev, "get charger type failed, rerun apsd\n");
 579		return;
 580	}
 581
 582	switch (charger_type) {
 583	case POWER_SUPPLY_USB_TYPE_CDP:
 584		current_ua = CDP_CURRENT_UA;
 585		break;
 586	case POWER_SUPPLY_USB_TYPE_DCP:
 587		current_ua = DCP_CURRENT_UA;
 588		break;
 589	case POWER_SUPPLY_USB_TYPE_SDP:
 590	default:
 591		current_ua = SDP_CURRENT_UA;
 592		break;
 593	}
 594
 595	smb_set_current_limit(chip, current_ua);
 596	power_supply_changed(chip->chg_psy);
 597}
 598
 599static int smb_get_iio_chan(struct smb_chip *chip, struct iio_channel *chan,
 600			     int *val)
 601{
 602	int rc;
 603	union power_supply_propval status;
 604
 605	rc = power_supply_get_property(chip->chg_psy, POWER_SUPPLY_PROP_STATUS,
 606				       &status);
 607	if (rc < 0 || status.intval != POWER_SUPPLY_STATUS_CHARGING) {
 608		*val = 0;
 609		return 0;
 610	}
 611
 612	if (IS_ERR(chan)) {
 613		dev_err(chip->dev, "Failed to chan, err = %li", PTR_ERR(chan));
 614		return PTR_ERR(chan);
 615	}
 616
 617	return iio_read_channel_processed(chan, val);
 618}
 619
 620static int smb_get_prop_health(struct smb_chip *chip, int *val)
 621{
 622	int rc;
 623	unsigned int stat;
 624
 625	rc = regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
 626			 &stat);
 627	if (rc < 0) {
 628		dev_err(chip->dev, "Couldn't read charger status rc=%d\n", rc);
 629		return rc;
 630	}
 631
 632	switch (stat) {
 633	case CHARGER_ERROR_STATUS_BAT_OV_BIT:
 634		*val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
 635		return 0;
 636	case BAT_TEMP_STATUS_TOO_COLD_BIT:
 637		*val = POWER_SUPPLY_HEALTH_COLD;
 638		return 0;
 639	case BAT_TEMP_STATUS_TOO_HOT_BIT:
 640		*val = POWER_SUPPLY_HEALTH_OVERHEAT;
 641		return 0;
 642	case BAT_TEMP_STATUS_COLD_SOFT_LIMIT_BIT:
 643		*val = POWER_SUPPLY_HEALTH_COOL;
 644		return 0;
 645	case BAT_TEMP_STATUS_HOT_SOFT_LIMIT_BIT:
 646		*val = POWER_SUPPLY_HEALTH_WARM;
 647		return 0;
 648	default:
 649		*val = POWER_SUPPLY_HEALTH_GOOD;
 650		return 0;
 651	}
 652}
 653
 654static int smb_get_property(struct power_supply *psy,
 655			     enum power_supply_property psp,
 656			     union power_supply_propval *val)
 657{
 658	struct smb_chip *chip = power_supply_get_drvdata(psy);
 659
 660	switch (psp) {
 661	case POWER_SUPPLY_PROP_MANUFACTURER:
 662		val->strval = "Qualcomm";
 663		return 0;
 664	case POWER_SUPPLY_PROP_MODEL_NAME:
 665		val->strval = chip->name;
 666		return 0;
 667	case POWER_SUPPLY_PROP_CURRENT_MAX:
 668		return smb_get_current_limit(chip, &val->intval);
 669	case POWER_SUPPLY_PROP_CURRENT_NOW:
 670		return smb_get_iio_chan(chip, chip->usb_in_i_chan,
 671					 &val->intval);
 672	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
 673		return smb_get_iio_chan(chip, chip->usb_in_v_chan,
 674					 &val->intval);
 675	case POWER_SUPPLY_PROP_ONLINE:
 676		return smb_get_prop_usb_online(chip, &val->intval);
 677	case POWER_SUPPLY_PROP_STATUS:
 678		return smb_get_prop_status(chip, &val->intval);
 679	case POWER_SUPPLY_PROP_HEALTH:
 680		return smb_get_prop_health(chip, &val->intval);
 681	case POWER_SUPPLY_PROP_USB_TYPE:
 682		return smb_apsd_get_charger_type(chip, &val->intval);
 683	default:
 684		dev_err(chip->dev, "invalid property: %d\n", psp);
 685		return -EINVAL;
 686	}
 687}
 688
 689static int smb_set_property(struct power_supply *psy,
 690			     enum power_supply_property psp,
 691			     const union power_supply_propval *val)
 692{
 693	struct smb_chip *chip = power_supply_get_drvdata(psy);
 694
 695	switch (psp) {
 696	case POWER_SUPPLY_PROP_CURRENT_MAX:
 697		return smb_set_current_limit(chip, val->intval);
 698	default:
 699		dev_err(chip->dev, "No setter for property: %d\n", psp);
 700		return -EINVAL;
 701	}
 702}
 703
 704static int smb_property_is_writable(struct power_supply *psy,
 705				     enum power_supply_property psp)
 706{
 707	switch (psp) {
 708	case POWER_SUPPLY_PROP_CURRENT_MAX:
 709		return 1;
 710	default:
 711		return 0;
 712	}
 713}
 714
 715static irqreturn_t smb_handle_batt_overvoltage(int irq, void *data)
 716{
 717	struct smb_chip *chip = data;
 718	unsigned int status;
 719
 720	regmap_read(chip->regmap, chip->base + BATTERY_CHARGER_STATUS_2,
 721		    &status);
 722
 723	if (status & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
 724		/* The hardware stops charging automatically */
 725		dev_err(chip->dev, "battery overvoltage detected\n");
 726		power_supply_changed(chip->chg_psy);
 727	}
 728
 729	return IRQ_HANDLED;
 730}
 731
 732static irqreturn_t smb_handle_usb_plugin(int irq, void *data)
 733{
 734	struct smb_chip *chip = data;
 735
 736	power_supply_changed(chip->chg_psy);
 737
 738	schedule_delayed_work(&chip->status_change_work,
 739			      msecs_to_jiffies(1500));
 740
 741	return IRQ_HANDLED;
 742}
 743
 744static irqreturn_t smb_handle_usb_icl_change(int irq, void *data)
 745{
 746	struct smb_chip *chip = data;
 747
 748	power_supply_changed(chip->chg_psy);
 749
 750	return IRQ_HANDLED;
 751}
 752
 753static irqreturn_t smb_handle_wdog_bark(int irq, void *data)
 754{
 755	struct smb_chip *chip = data;
 756	int rc;
 757
 758	power_supply_changed(chip->chg_psy);
 759
 760	rc = regmap_write(chip->regmap, BARK_BITE_WDOG_PET,
 761			  BARK_BITE_WDOG_PET_BIT);
 762	if (rc < 0)
 763		dev_err(chip->dev, "Couldn't pet the dog rc=%d\n", rc);
 764
 765	return IRQ_HANDLED;
 766}
 767
 768static const struct power_supply_desc smb_psy_desc = {
 769	.name = "pmi8998_charger",
 770	.type = POWER_SUPPLY_TYPE_USB,
 771	.usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
 772		     BIT(POWER_SUPPLY_USB_TYPE_CDP) |
 773		     BIT(POWER_SUPPLY_USB_TYPE_DCP) |
 774		     BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN),
 775	.properties = smb_properties,
 776	.num_properties = ARRAY_SIZE(smb_properties),
 777	.get_property = smb_get_property,
 778	.set_property = smb_set_property,
 779	.property_is_writeable = smb_property_is_writable,
 780};
 781
 782/* Init sequence derived from vendor downstream driver */
 783static const struct smb_init_register smb_init_seq[] = {
 784	{ .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
 785	/*
 786	 * By default configure us as an upstream facing port
 787	 * FIXME: This will be handled by the type-c driver
 788	 */
 789	{ .addr = TYPE_C_INTRPT_ENB_SOFTWARE_CTRL,
 790	  .mask = TYPEC_POWER_ROLE_CMD_MASK | VCONN_EN_SRC_BIT |
 791		  VCONN_EN_VALUE_BIT,
 792	  .val = VCONN_EN_SRC_BIT },
 793	/*
 794	 * Disable Type-C factory mode and stay in Attached.SRC state when VCONN
 795	 * over-current happens
 796	 */
 797	{ .addr = TYPE_C_CFG,
 798	  .mask = FACTORY_MODE_DETECTION_EN_BIT | VCONN_OC_CFG_BIT,
 799	  .val = 0 },
 800	/* Configure VBUS for software control */
 801	{ .addr = OTG_CFG, .mask = OTG_EN_SRC_CFG_BIT, .val = 0 },
 802	/*
 803	 * Use VBAT to determine the recharge threshold when battery is full
 804	 * rather than the state of charge.
 805	 */
 806	{ .addr = FG_UPDATE_CFG_2_SEL,
 807	  .mask = SOC_LT_CHG_RECHARGE_THRESH_SEL_BIT |
 808		  VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT,
 809	  .val = VBT_LT_CHG_RECHARGE_THRESH_SEL_BIT },
 810	/* Enable charging */
 811	{ .addr = USBIN_OPTIONS_1_CFG, .mask = HVDCP_EN_BIT, .val = 0 },
 812	{ .addr = CHARGING_ENABLE_CMD,
 813	  .mask = CHARGING_ENABLE_CMD_BIT,
 814	  .val = CHARGING_ENABLE_CMD_BIT },
 815	/*
 816	 * Match downstream defaults
 817	 * CHG_EN_SRC_BIT - charger enable is controlled by software
 818	 * CHG_EN_POLARITY_BIT - polarity of charge enable pin when in HW control
 819	 *                       pulled low on OnePlus 6 and SHIFT6mq
 820	 * PRETOFAST_TRANSITION_CFG_BIT -
 821	 * BAT_OV_ECC_BIT -
 822	 * I_TERM_BIT - Current termination ?? 0 = enabled
 823	 * AUTO_RECHG_BIT - Enable automatic recharge when battery is full
 824	 *                  0 = enabled
 825	 * EN_ANALOG_DROP_IN_VBATT_BIT
 826	 * CHARGER_INHIBIT_BIT - Inhibit charging based on battery voltage
 827	 *                       instead of ??
 828	 */
 829	{ .addr = CHGR_CFG2,
 830	  .mask = CHG_EN_SRC_BIT | CHG_EN_POLARITY_BIT |
 831		  PRETOFAST_TRANSITION_CFG_BIT | BAT_OV_ECC_BIT | I_TERM_BIT |
 832		  AUTO_RECHG_BIT | EN_ANALOG_DROP_IN_VBATT_BIT |
 833		  CHARGER_INHIBIT_BIT,
 834	  .val = CHARGER_INHIBIT_BIT },
 835	/* STAT pin software override, match downstream. Parallel charging? */
 836	{ .addr = STAT_CFG,
 837	  .mask = STAT_SW_OVERRIDE_CFG_BIT,
 838	  .val = STAT_SW_OVERRIDE_CFG_BIT },
 839	/* Set the default SDP charger type to a 500ma USB 2.0 port */
 840	{ .addr = USBIN_ICL_OPTIONS,
 841	  .mask = USB51_MODE_BIT | USBIN_MODE_CHG_BIT,
 842	  .val = USB51_MODE_BIT },
 843	/* Disable watchdog */
 844	{ .addr = SNARL_BARK_BITE_WD_CFG, .mask = 0xff, .val = 0 },
 845	{ .addr = WD_CFG,
 846	  .mask = WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT |
 847		  BARK_WDOG_INT_EN_BIT,
 848	  .val = 0 },
 849	/* These bits aren't documented anywhere */
 850	{ .addr = USBIN_5V_AICL_THRESHOLD_CFG,
 851	  .mask = USBIN_5V_AICL_THRESHOLD_CFG_MASK,
 852	  .val = 0x3 },
 853	{ .addr = USBIN_CONT_AICL_THRESHOLD_CFG,
 854	  .mask = USBIN_CONT_AICL_THRESHOLD_CFG_MASK,
 855	  .val = 0x3 },
 856	/*
 857	 * Enable Automatic Input Current Limit, this will slowly ramp up the current
 858	 * When connected to a wall charger, and automatically stop when it detects
 859	 * the charger current limit (voltage drop?) or it reaches the programmed limit.
 860	 */
 861	{ .addr = USBIN_AICL_OPTIONS_CFG,
 862	  .mask = USBIN_AICL_START_AT_MAX_BIT | USBIN_AICL_ADC_EN_BIT |
 863		  USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT |
 864		  USBIN_HV_COLLAPSE_RESPONSE_BIT |
 865		  USBIN_LV_COLLAPSE_RESPONSE_BIT,
 866	  .val = USBIN_HV_COLLAPSE_RESPONSE_BIT |
 867		 USBIN_LV_COLLAPSE_RESPONSE_BIT | USBIN_AICL_EN_BIT },
 868	/*
 869	 * Set pre charge current to default, the OnePlus 6 bootloader
 870	 * sets this very conservatively.
 871	 */
 872	{ .addr = PRE_CHARGE_CURRENT_CFG,
 873	  .mask = PRE_CHARGE_CURRENT_SETTING_MASK,
 874	  .val = 500000 / CURRENT_SCALE_FACTOR },
 875	/*
 876	 * This overrides all of the current limit options exposed to userspace
 877	 * and prevents the device from pulling more than ~1A. This is done
 878	 * to minimise potential fire hazard risks.
 879	 */
 880	{ .addr = FAST_CHARGE_CURRENT_CFG,
 881	  .mask = FAST_CHARGE_CURRENT_SETTING_MASK,
 882	  .val = 1000000 / CURRENT_SCALE_FACTOR },
 883};
 884
 885static int smb_init_hw(struct smb_chip *chip)
 886{
 887	int rc, i;
 888
 889	for (i = 0; i < ARRAY_SIZE(smb_init_seq); i++) {
 890		dev_dbg(chip->dev, "%d: Writing 0x%02x to 0x%02x\n", i,
 891			smb_init_seq[i].val, smb_init_seq[i].addr);
 892		rc = regmap_update_bits(chip->regmap,
 893					chip->base + smb_init_seq[i].addr,
 894					smb_init_seq[i].mask,
 895					smb_init_seq[i].val);
 896		if (rc < 0)
 897			return dev_err_probe(chip->dev, rc,
 898					     "%s: init command %d failed\n",
 899					     __func__, i);
 900	}
 901
 902	return 0;
 903}
 904
 905static int smb_init_irq(struct smb_chip *chip, int *irq, const char *name,
 906			 irqreturn_t (*handler)(int irq, void *data))
 907{
 908	int irqnum;
 909	int rc;
 910
 911	irqnum = platform_get_irq_byname(to_platform_device(chip->dev), name);
 912	if (irqnum < 0)
 913		return irqnum;
 914
 915	rc = devm_request_threaded_irq(chip->dev, irqnum, NULL, handler,
 916				       IRQF_ONESHOT, name, chip);
 917	if (rc < 0)
 918		return dev_err_probe(chip->dev, rc, "Couldn't request irq %s\n",
 919				     name);
 920
 921	if (irq)
 922		*irq = irqnum;
 923
 924	return 0;
 925}
 926
 927static int smb_probe(struct platform_device *pdev)
 928{
 929	struct power_supply_config supply_config = {};
 930	struct power_supply_desc *desc;
 931	struct smb_chip *chip;
 932	int rc, irq;
 933
 934	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
 935	if (!chip)
 936		return -ENOMEM;
 937
 938	chip->dev = &pdev->dev;
 939	chip->name = pdev->name;
 940
 941	chip->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 942	if (!chip->regmap)
 943		return dev_err_probe(chip->dev, -ENODEV,
 944				     "failed to locate the regmap\n");
 945
 946	rc = device_property_read_u32(chip->dev, "reg", &chip->base);
 947	if (rc < 0)
 948		return dev_err_probe(chip->dev, rc,
 949				     "Couldn't read base address\n");
 950
 951	chip->usb_in_v_chan = devm_iio_channel_get(chip->dev, "usbin_v");
 952	if (IS_ERR(chip->usb_in_v_chan))
 953		return dev_err_probe(chip->dev, PTR_ERR(chip->usb_in_v_chan),
 954				     "Couldn't get usbin_v IIO channel\n");
 955
 956	chip->usb_in_i_chan = devm_iio_channel_get(chip->dev, "usbin_i");
 957	if (IS_ERR(chip->usb_in_i_chan)) {
 958		return dev_err_probe(chip->dev, PTR_ERR(chip->usb_in_i_chan),
 959				     "Couldn't get usbin_i IIO channel\n");
 960	}
 961
 962	rc = smb_init_hw(chip);
 963	if (rc < 0)
 964		return rc;
 965
 966	supply_config.drv_data = chip;
 967	supply_config.fwnode = dev_fwnode(&pdev->dev);
 968
 969	desc = devm_kzalloc(chip->dev, sizeof(smb_psy_desc), GFP_KERNEL);
 970	if (!desc)
 971		return -ENOMEM;
 972	memcpy(desc, &smb_psy_desc, sizeof(smb_psy_desc));
 973	desc->name =
 974		devm_kasprintf(chip->dev, GFP_KERNEL, "%s-charger",
 975			       (const char *)device_get_match_data(chip->dev));
 976	if (!desc->name)
 977		return -ENOMEM;
 978
 979	chip->chg_psy =
 980		devm_power_supply_register(chip->dev, desc, &supply_config);
 981	if (IS_ERR(chip->chg_psy))
 982		return dev_err_probe(chip->dev, PTR_ERR(chip->chg_psy),
 983				     "failed to register power supply\n");
 984
 985	rc = power_supply_get_battery_info(chip->chg_psy, &chip->batt_info);
 986	if (rc)
 987		return dev_err_probe(chip->dev, rc,
 988				     "Failed to get battery info\n");
 989
 990	rc = devm_delayed_work_autocancel(chip->dev, &chip->status_change_work,
 991					  smb_status_change_work);
 992	if (rc)
 993		return dev_err_probe(chip->dev, rc,
 994				     "Failed to init status change work\n");
 995
 996	rc = (chip->batt_info->voltage_max_design_uv - 3487500) / 7500 + 1;
 997	rc = regmap_update_bits(chip->regmap, chip->base + FLOAT_VOLTAGE_CFG,
 998				FLOAT_VOLTAGE_SETTING_MASK, rc);
 999	if (rc < 0)
1000		return dev_err_probe(chip->dev, rc, "Couldn't set vbat max\n");
1001
1002	rc = smb_init_irq(chip, &irq, "bat-ov", smb_handle_batt_overvoltage);
1003	if (rc < 0)
1004		return rc;
1005
1006	rc = smb_init_irq(chip, &chip->cable_irq, "usb-plugin",
1007			   smb_handle_usb_plugin);
1008	if (rc < 0)
1009		return rc;
1010
1011	rc = smb_init_irq(chip, &irq, "usbin-icl-change",
1012			   smb_handle_usb_icl_change);
1013	if (rc < 0)
1014		return rc;
1015	rc = smb_init_irq(chip, &irq, "wdog-bark", smb_handle_wdog_bark);
1016	if (rc < 0)
1017		return rc;
1018
1019	devm_device_init_wakeup(chip->dev);
1020
1021	rc = devm_pm_set_wake_irq(chip->dev, chip->cable_irq);
1022	if (rc < 0)
1023		return dev_err_probe(chip->dev, rc, "Couldn't set wake irq\n");
1024
1025	platform_set_drvdata(pdev, chip);
1026
1027	/* Initialise charger state */
1028	schedule_delayed_work(&chip->status_change_work, 0);
1029
1030	return 0;
1031}
1032
1033static const struct of_device_id smb_match_id_table[] = {
1034	{ .compatible = "qcom,pmi8998-charger", .data = "pmi8998" },
1035	{ .compatible = "qcom,pm660-charger", .data = "pm660" },
1036	{ /* sentinal */ }
1037};
1038MODULE_DEVICE_TABLE(of, smb_match_id_table);
1039
1040static struct platform_driver qcom_spmi_smb = {
1041	.probe = smb_probe,
1042	.driver = {
1043		.name = "qcom-smbx-charger",
1044		.of_match_table = smb_match_id_table,
1045		},
1046};
1047
1048module_platform_driver(qcom_spmi_smb);
1049
1050MODULE_AUTHOR("Casey Connolly <casey.connolly@linaro.org>");
1051MODULE_DESCRIPTION("Qualcomm SMB2 Charger Driver");
1052MODULE_LICENSE("GPL");