pinctrl-sun6i-a31-r.c

  1/*
  2 * Allwinner A31 SoCs special pins pinctrl driver.
  3 *
  4 * Copyright (C) 2014 Boris Brezillon
  5 * Boris Brezillon <boris.brezillon@free-electrons.com>
  6 *
  7 * Copyright (C) 2014 Maxime Ripard
  8 * Maxime Ripard <maxime.ripard@free-electrons.com>
  9 *
 10 * This file is licensed under the terms of the GNU General Public
 11 * License version 2.  This program is licensed "as is" without any
 12 * warranty of any kind, whether express or implied.
 13 */
 14
 15#include <linux/init.h>
 16#include <linux/platform_device.h>
 17#include <linux/of.h>
 18#include <linux/pinctrl/pinctrl.h>
 19
 20#include "pinctrl-sunxi.h"
 21
 22static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
 23	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
 24		  SUNXI_FUNCTION(0x0, "gpio_in"),
 25		  SUNXI_FUNCTION(0x1, "gpio_out"),
 26		  SUNXI_FUNCTION(0x2, "s_i2c"),		/* SCK */
 27		  SUNXI_FUNCTION(0x3, "s_p2wi")),	/* SCK */
 28	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
 29		  SUNXI_FUNCTION(0x0, "gpio_in"),
 30		  SUNXI_FUNCTION(0x1, "gpio_out"),
 31		  SUNXI_FUNCTION(0x2, "s_i2c"),		/* SDA */
 32		  SUNXI_FUNCTION(0x3, "s_p2wi")),	/* SDA */
 33	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
 34		  SUNXI_FUNCTION(0x0, "gpio_in"),
 35		  SUNXI_FUNCTION(0x1, "gpio_out"),
 36		  SUNXI_FUNCTION(0x2, "s_uart")),	/* TX */
 37	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
 38		  SUNXI_FUNCTION(0x0, "gpio_in"),
 39		  SUNXI_FUNCTION(0x1, "gpio_out"),
 40		  SUNXI_FUNCTION(0x2, "s_uart")),	/* RX */
 41	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
 42		  SUNXI_FUNCTION(0x0, "gpio_in"),
 43		  SUNXI_FUNCTION(0x1, "gpio_out"),
 44		  SUNXI_FUNCTION(0x2, "s_ir")),		/* RX */
 45	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
 46		  SUNXI_FUNCTION(0x0, "gpio_in"),
 47		  SUNXI_FUNCTION(0x1, "gpio_out"),
 48		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 0),	/* PL_EINT0 */
 49		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* MS */
 50	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
 51		  SUNXI_FUNCTION(0x0, "gpio_in"),
 52		  SUNXI_FUNCTION(0x1, "gpio_out"),
 53		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 1),	/* PL_EINT1 */
 54		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* CK */
 55	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
 56		  SUNXI_FUNCTION(0x0, "gpio_in"),
 57		  SUNXI_FUNCTION(0x1, "gpio_out"),
 58		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 2),	/* PL_EINT2 */
 59		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* DO */
 60	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
 61		  SUNXI_FUNCTION(0x0, "gpio_in"),
 62		  SUNXI_FUNCTION(0x1, "gpio_out"),
 63		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 3),	/* PL_EINT3 */
 64		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* DI */
 65	/* Hole */
 66	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
 67		  SUNXI_FUNCTION(0x0, "gpio_in"),
 68		  SUNXI_FUNCTION(0x1, "gpio_out"),
 69		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 0)),	/* PM_EINT0 */
 70	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
 71		  SUNXI_FUNCTION(0x0, "gpio_in"),
 72		  SUNXI_FUNCTION(0x1, "gpio_out"),
 73		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 1)),	/* PM_EINT1 */
 74	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
 75		  SUNXI_FUNCTION(0x0, "gpio_in"),
 76		  SUNXI_FUNCTION(0x1, "gpio_out"),
 77		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 2),	/* PM_EINT2 */
 78		  SUNXI_FUNCTION(0x3, "1wire")),
 79	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
 80		  SUNXI_FUNCTION(0x0, "gpio_in"),
 81		  SUNXI_FUNCTION(0x1, "gpio_out"),
 82		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 3)),	/* PM_EINT3 */
 83	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
 84		  SUNXI_FUNCTION(0x0, "gpio_in"),
 85		  SUNXI_FUNCTION(0x1, "gpio_out"),
 86		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 4)),	/* PM_EINT4 */
 87	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
 88		  SUNXI_FUNCTION(0x0, "gpio_in"),
 89		  SUNXI_FUNCTION(0x1, "gpio_out"),
 90		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 5)),	/* PM_EINT5 */
 91	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
 92		  SUNXI_FUNCTION(0x0, "gpio_in"),
 93		  SUNXI_FUNCTION(0x1, "gpio_out"),
 94		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 6)),	/* PM_EINT6 */
 95	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
 96		  SUNXI_FUNCTION(0x0, "gpio_in"),
 97		  SUNXI_FUNCTION(0x1, "gpio_out"),
 98		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 7),	/* PM_EINT7 */
 99		  SUNXI_FUNCTION(0x3, "rtc")),		/* CLKO */
100};
101
102static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
103	.pins = sun6i_a31_r_pins,
104	.npins = ARRAY_SIZE(sun6i_a31_r_pins),
105	.pin_base = PL_BASE,
106	.irq_banks = 2,
107	.disable_strict_mode = true,
108};
109
110static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
111{
112	return sunxi_pinctrl_init(pdev, &sun6i_a31_r_pinctrl_data);
113}
114
115static const struct of_device_id sun6i_a31_r_pinctrl_match[] = {
116	{ .compatible = "allwinner,sun6i-a31-r-pinctrl", },
117	{}
118};
119
120static struct platform_driver sun6i_a31_r_pinctrl_driver = {
121	.probe	= sun6i_a31_r_pinctrl_probe,
122	.driver	= {
123		.name		= "sun6i-a31-r-pinctrl",
124		.of_match_table	= sun6i_a31_r_pinctrl_match,
125	},
126};
127builtin_platform_driver(sun6i_a31_r_pinctrl_driver);