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pinctrl-sun4i-a10.c
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linux-6.19.14/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
1/* 2 * Allwinner A10 SoCs pinctrl driver. 3 * 4 * Copyright (C) 2014 Maxime Ripard 5 * 6 * Maxime Ripard <maxime.ripard@free-electrons.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13#include <linux/init.h> 14#include <linux/platform_device.h> 15#include <linux/of.h> 16#include <linux/pinctrl/pinctrl.h> 17 18#include "pinctrl-sunxi.h" 19 20#define PINCTRL_SUN4I_A10 BIT(0) 21#define PINCTRL_SUN7I_A20 BIT(1) 22#define PINCTRL_SUN8I_R40 BIT(2) 23 24static const struct sunxi_desc_pin sun4i_a10_pins[] = { 25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), 26 SUNXI_FUNCTION(0x0, "gpio_in"), 27 SUNXI_FUNCTION(0x1, "gpio_out"), 28 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */ 29 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */ 30 SUNXI_FUNCTION(0x4, "uart2"), /* RTS */ 31 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD3 */ 32 PINCTRL_SUN7I_A20 | 33 PINCTRL_SUN8I_R40)), 34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), 35 SUNXI_FUNCTION(0x0, "gpio_in"), 36 SUNXI_FUNCTION(0x1, "gpio_out"), 37 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */ 38 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ 39 SUNXI_FUNCTION(0x4, "uart2"), /* CTS */ 40 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD2 */ 41 PINCTRL_SUN7I_A20 | 42 PINCTRL_SUN8I_R40)), 43 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), 44 SUNXI_FUNCTION(0x0, "gpio_in"), 45 SUNXI_FUNCTION(0x1, "gpio_out"), 46 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */ 47 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */ 48 SUNXI_FUNCTION(0x4, "uart2"), /* TX */ 49 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD1 */ 50 PINCTRL_SUN7I_A20 | 51 PINCTRL_SUN8I_R40)), 52 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), 53 SUNXI_FUNCTION(0x0, "gpio_in"), 54 SUNXI_FUNCTION(0x1, "gpio_out"), 55 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */ 56 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */ 57 SUNXI_FUNCTION(0x4, "uart2"), /* RX */ 58 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD0 */ 59 PINCTRL_SUN7I_A20 | 60 PINCTRL_SUN8I_R40)), 61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), 62 SUNXI_FUNCTION(0x0, "gpio_in"), 63 SUNXI_FUNCTION(0x1, "gpio_out"), 64 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */ 65 SUNXI_FUNCTION(0x3, "spi1"), /* CS1 */ 66 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD3 */ 67 PINCTRL_SUN7I_A20 | 68 PINCTRL_SUN8I_R40)), 69 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), 70 SUNXI_FUNCTION(0x0, "gpio_in"), 71 SUNXI_FUNCTION(0x1, "gpio_out"), 72 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */ 73 SUNXI_FUNCTION(0x3, "spi3"), /* CS0 */ 74 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD2 */ 75 PINCTRL_SUN7I_A20 | 76 PINCTRL_SUN8I_R40)), 77 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), 78 SUNXI_FUNCTION(0x0, "gpio_in"), 79 SUNXI_FUNCTION(0x1, "gpio_out"), 80 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */ 81 SUNXI_FUNCTION(0x3, "spi3"), /* CLK */ 82 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD1 */ 83 PINCTRL_SUN7I_A20 | 84 PINCTRL_SUN8I_R40)), 85 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), 86 SUNXI_FUNCTION(0x0, "gpio_in"), 87 SUNXI_FUNCTION(0x1, "gpio_out"), 88 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */ 89 SUNXI_FUNCTION(0x3, "spi3"), /* MOSI */ 90 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD0 */ 91 PINCTRL_SUN7I_A20 | 92 PINCTRL_SUN8I_R40)), 93 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8), 94 SUNXI_FUNCTION(0x0, "gpio_in"), 95 SUNXI_FUNCTION(0x1, "gpio_out"), 96 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */ 97 SUNXI_FUNCTION(0x3, "spi3"), /* MISO */ 98 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXCK */ 99 PINCTRL_SUN7I_A20 | 100 PINCTRL_SUN8I_R40)), 101 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9), 102 SUNXI_FUNCTION(0x0, "gpio_in"), 103 SUNXI_FUNCTION(0x1, "gpio_out"), 104 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */ 105 SUNXI_FUNCTION(0x3, "spi3"), /* CS1 */ 106 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ERXERR */ 107 PINCTRL_SUN7I_A20 | 108 PINCTRL_SUN8I_R40), 109 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* MCLK */ 110 PINCTRL_SUN7I_A20 | 111 PINCTRL_SUN8I_R40)), 112 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10), 113 SUNXI_FUNCTION(0x0, "gpio_in"), 114 SUNXI_FUNCTION(0x1, "gpio_out"), 115 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */ 116 SUNXI_FUNCTION(0x4, "uart1"), /* TX */ 117 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXDV */ 118 PINCTRL_SUN7I_A20 | 119 PINCTRL_SUN8I_R40)), 120 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11), 121 SUNXI_FUNCTION(0x0, "gpio_in"), 122 SUNXI_FUNCTION(0x1, "gpio_out"), 123 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */ 124 SUNXI_FUNCTION(0x4, "uart1"), /* RX */ 125 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* EMDC */ 126 PINCTRL_SUN7I_A20 | 127 PINCTRL_SUN8I_R40)), 128 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12), 129 SUNXI_FUNCTION(0x0, "gpio_in"), 130 SUNXI_FUNCTION(0x1, "gpio_out"), 131 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */ 132 SUNXI_FUNCTION(0x3, "uart6"), /* TX */ 133 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */ 134 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* EMDIO */ 135 PINCTRL_SUN7I_A20 | 136 PINCTRL_SUN8I_R40)), 137 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13), 138 SUNXI_FUNCTION(0x0, "gpio_in"), 139 SUNXI_FUNCTION(0x1, "gpio_out"), 140 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */ 141 SUNXI_FUNCTION(0x3, "uart6"), /* RX */ 142 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */ 143 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXCTL / ETXEN */ 144 PINCTRL_SUN7I_A20 | 145 PINCTRL_SUN8I_R40)), 146 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14), 147 SUNXI_FUNCTION(0x0, "gpio_in"), 148 SUNXI_FUNCTION(0x1, "gpio_out"), 149 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */ 150 SUNXI_FUNCTION(0x3, "uart7"), /* TX */ 151 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */ 152 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ETXCK */ 153 PINCTRL_SUN7I_A20 | 154 PINCTRL_SUN8I_R40), 155 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* BCLK */ 156 PINCTRL_SUN7I_A20 | 157 PINCTRL_SUN8I_R40)), 158 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15), 159 SUNXI_FUNCTION(0x0, "gpio_in"), 160 SUNXI_FUNCTION(0x1, "gpio_out"), 161 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */ 162 SUNXI_FUNCTION(0x3, "uart7"), /* RX */ 163 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */ 164 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXCK / ECRS */ 165 PINCTRL_SUN7I_A20 | 166 PINCTRL_SUN8I_R40), 167 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* LRCK */ 168 PINCTRL_SUN7I_A20 | 169 PINCTRL_SUN8I_R40)), 170 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16), 171 SUNXI_FUNCTION(0x0, "gpio_in"), 172 SUNXI_FUNCTION(0x1, "gpio_out"), 173 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */ 174 SUNXI_FUNCTION(0x3, "can"), /* TX */ 175 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */ 176 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GCLKIN / ECOL */ 177 PINCTRL_SUN7I_A20 | 178 PINCTRL_SUN8I_R40), 179 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* DO */ 180 PINCTRL_SUN7I_A20 | 181 PINCTRL_SUN8I_R40)), 182 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17), 183 SUNXI_FUNCTION(0x0, "gpio_in"), 184 SUNXI_FUNCTION(0x1, "gpio_out"), 185 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */ 186 SUNXI_FUNCTION(0x3, "can"), /* RX */ 187 SUNXI_FUNCTION(0x4, "uart1"), /* RING */ 188 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ETXERR */ 189 PINCTRL_SUN7I_A20 | 190 PINCTRL_SUN8I_R40), 191 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* DI */ 192 PINCTRL_SUN7I_A20 | 193 PINCTRL_SUN8I_R40)), 194 /* Hole */ 195 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), 196 SUNXI_FUNCTION(0x0, "gpio_in"), 197 SUNXI_FUNCTION(0x1, "gpio_out"), 198 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ 199 SUNXI_FUNCTION_VARIANT(0x3, "pll_lock_dbg", 200 PINCTRL_SUN8I_R40)), 201 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), 202 SUNXI_FUNCTION(0x0, "gpio_in"), 203 SUNXI_FUNCTION(0x1, "gpio_out"), 204 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ 205 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), 206 SUNXI_FUNCTION(0x0, "gpio_in"), 207 SUNXI_FUNCTION(0x1, "gpio_out"), 208 SUNXI_FUNCTION_VARIANT(0x2, "pwm", /* PWM0 */ 209 PINCTRL_SUN4I_A10 | 210 PINCTRL_SUN7I_A20), 211 SUNXI_FUNCTION_VARIANT(0x3, "pwm", /* PWM0 */ 212 PINCTRL_SUN8I_R40)), 213 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), 214 SUNXI_FUNCTION(0x0, "gpio_in"), 215 SUNXI_FUNCTION(0x1, "gpio_out"), 216 SUNXI_FUNCTION_VARIANT(0x2, "ir0", /* TX */ 217 PINCTRL_SUN4I_A10 | 218 PINCTRL_SUN7I_A20), 219 SUNXI_FUNCTION_VARIANT(0x3, "pwm", /* PWM1 */ 220 PINCTRL_SUN8I_R40), 221 /* 222 * The SPDIF block is not referenced at all in the A10 user 223 * manual. However it is described in the code leaked and the 224 * pin descriptions are declared in the A20 user manual which 225 * is pin compatible with this device. 226 */ 227 SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF MCLK */ 228 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), 229 SUNXI_FUNCTION(0x0, "gpio_in"), 230 SUNXI_FUNCTION(0x1, "gpio_out"), 231 SUNXI_FUNCTION(0x2, "ir0")), /* RX */ 232 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), 233 SUNXI_FUNCTION(0x0, "gpio_in"), 234 SUNXI_FUNCTION(0x1, "gpio_out"), 235 /* 236 * On A10 there's only one I2S controller and the pin group 237 * is simply named "i2s". On A20 there's two and thus it's 238 * renamed to "i2s0". Deal with these name here, in order 239 * to satisfy existing device trees. 240 */ 241 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* MCLK */ 242 PINCTRL_SUN4I_A10), 243 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* MCLK */ 244 PINCTRL_SUN7I_A20 | 245 PINCTRL_SUN8I_R40), 246 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */ 247 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), 248 SUNXI_FUNCTION(0x0, "gpio_in"), 249 SUNXI_FUNCTION(0x1, "gpio_out"), 250 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* BCLK */ 251 PINCTRL_SUN4I_A10), 252 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* BCLK */ 253 PINCTRL_SUN7I_A20 | 254 PINCTRL_SUN8I_R40), 255 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */ 256 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), 257 SUNXI_FUNCTION(0x0, "gpio_in"), 258 SUNXI_FUNCTION(0x1, "gpio_out"), 259 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* LRCK */ 260 PINCTRL_SUN4I_A10), 261 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* LRCK */ 262 PINCTRL_SUN7I_A20 | 263 PINCTRL_SUN8I_R40), 264 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */ 265 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), 266 SUNXI_FUNCTION(0x0, "gpio_in"), 267 SUNXI_FUNCTION(0x1, "gpio_out"), 268 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO0 */ 269 PINCTRL_SUN4I_A10), 270 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO0 */ 271 PINCTRL_SUN7I_A20 | 272 PINCTRL_SUN8I_R40), 273 SUNXI_FUNCTION(0x3, "ac97")), /* DO */ 274 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), 275 SUNXI_FUNCTION(0x0, "gpio_in"), 276 SUNXI_FUNCTION(0x1, "gpio_out"), 277 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO1 */ 278 PINCTRL_SUN4I_A10), 279 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO1 */ 280 PINCTRL_SUN7I_A20 | 281 PINCTRL_SUN8I_R40), 282 SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM6 */ 283 PINCTRL_SUN8I_R40)), 284 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), 285 SUNXI_FUNCTION(0x0, "gpio_in"), 286 SUNXI_FUNCTION(0x1, "gpio_out"), 287 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO2 */ 288 PINCTRL_SUN4I_A10), 289 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO2 */ 290 PINCTRL_SUN7I_A20 | 291 PINCTRL_SUN8I_R40), 292 SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM7 */ 293 PINCTRL_SUN8I_R40)), 294 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11), 295 SUNXI_FUNCTION(0x0, "gpio_in"), 296 SUNXI_FUNCTION(0x1, "gpio_out"), 297 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO3 */ 298 PINCTRL_SUN4I_A10), 299 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO3 */ 300 PINCTRL_SUN7I_A20 | 301 PINCTRL_SUN8I_R40)), 302 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12), 303 SUNXI_FUNCTION(0x0, "gpio_in"), 304 SUNXI_FUNCTION(0x1, "gpio_out"), 305 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DI */ 306 PINCTRL_SUN4I_A10), 307 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DI */ 308 PINCTRL_SUN7I_A20 | 309 PINCTRL_SUN8I_R40), 310 SUNXI_FUNCTION(0x3, "ac97"), /* DI */ 311 /* Undocumented mux function on A10 - See SPDIF MCLK above */ 312 SUNXI_FUNCTION_VARIANT(0x4, "spdif", /* SPDIF IN */ 313 PINCTRL_SUN4I_A10 | 314 PINCTRL_SUN7I_A20)), 315 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13), 316 SUNXI_FUNCTION(0x0, "gpio_in"), 317 SUNXI_FUNCTION(0x1, "gpio_out"), 318 SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */ 319 /* Undocumented mux function on A10 - See SPDIF MCLK above */ 320 SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF OUT */ 321 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14), 322 SUNXI_FUNCTION(0x0, "gpio_in"), 323 SUNXI_FUNCTION(0x1, "gpio_out"), 324 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */ 325 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */ 326 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15), 327 SUNXI_FUNCTION(0x0, "gpio_in"), 328 SUNXI_FUNCTION(0x1, "gpio_out"), 329 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */ 330 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */ 331 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16), 332 SUNXI_FUNCTION(0x0, "gpio_in"), 333 SUNXI_FUNCTION(0x1, "gpio_out"), 334 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */ 335 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */ 336 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17), 337 SUNXI_FUNCTION(0x0, "gpio_in"), 338 SUNXI_FUNCTION(0x1, "gpio_out"), 339 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */ 340 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */ 341 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18), 342 SUNXI_FUNCTION(0x0, "gpio_in"), 343 SUNXI_FUNCTION(0x1, "gpio_out"), 344 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ 345 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19), 346 SUNXI_FUNCTION(0x0, "gpio_in"), 347 SUNXI_FUNCTION(0x1, "gpio_out"), 348 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ 349 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20), 350 SUNXI_FUNCTION(0x0, "gpio_in"), 351 SUNXI_FUNCTION(0x1, "gpio_out"), 352 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */ 353 SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM4 */ 354 PINCTRL_SUN8I_R40)), 355 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21), 356 SUNXI_FUNCTION(0x0, "gpio_in"), 357 SUNXI_FUNCTION(0x1, "gpio_out"), 358 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */ 359 SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM5 */ 360 PINCTRL_SUN8I_R40)), 361 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22), 362 SUNXI_FUNCTION(0x0, "gpio_in"), 363 SUNXI_FUNCTION(0x1, "gpio_out"), 364 SUNXI_FUNCTION(0x2, "uart0"), /* TX */ 365 SUNXI_FUNCTION_VARIANT(0x3, "ir1", /* TX */ 366 PINCTRL_SUN4I_A10 | 367 PINCTRL_SUN7I_A20)), 368 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23), 369 SUNXI_FUNCTION(0x0, "gpio_in"), 370 SUNXI_FUNCTION(0x1, "gpio_out"), 371 SUNXI_FUNCTION(0x2, "uart0"), /* RX */ 372 SUNXI_FUNCTION(0x3, "ir1")), /* RX */ 373 /* Hole */ 374 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), 375 SUNXI_FUNCTION(0x0, "gpio_in"), 376 SUNXI_FUNCTION(0x1, "gpio_out"), 377 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ 378 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ 379 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), 380 SUNXI_FUNCTION(0x0, "gpio_in"), 381 SUNXI_FUNCTION(0x1, "gpio_out"), 382 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ 383 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ 384 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), 385 SUNXI_FUNCTION(0x0, "gpio_in"), 386 SUNXI_FUNCTION(0x1, "gpio_out"), 387 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ 388 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */ 389 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), 390 SUNXI_FUNCTION(0x0, "gpio_in"), 391 SUNXI_FUNCTION(0x1, "gpio_out"), 392 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */ 393 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), 394 SUNXI_FUNCTION(0x0, "gpio_in"), 395 SUNXI_FUNCTION(0x1, "gpio_out"), 396 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ 397 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), 398 SUNXI_FUNCTION(0x0, "gpio_in"), 399 SUNXI_FUNCTION(0x1, "gpio_out"), 400 SUNXI_FUNCTION(0x2, "nand0"), /* NRE# */ 401 SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* DS */ 402 PINCTRL_SUN8I_R40)), 403 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), 404 SUNXI_FUNCTION(0x0, "gpio_in"), 405 SUNXI_FUNCTION(0x1, "gpio_out"), 406 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ 407 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ 408 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), 409 SUNXI_FUNCTION(0x0, "gpio_in"), 410 SUNXI_FUNCTION(0x1, "gpio_out"), 411 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */ 412 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ 413 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), 414 SUNXI_FUNCTION(0x0, "gpio_in"), 415 SUNXI_FUNCTION(0x1, "gpio_out"), 416 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ 417 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ 418 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), 419 SUNXI_FUNCTION(0x0, "gpio_in"), 420 SUNXI_FUNCTION(0x1, "gpio_out"), 421 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ 422 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ 423 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), 424 SUNXI_FUNCTION(0x0, "gpio_in"), 425 SUNXI_FUNCTION(0x1, "gpio_out"), 426 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ 427 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ 428 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), 429 SUNXI_FUNCTION(0x0, "gpio_in"), 430 SUNXI_FUNCTION(0x1, "gpio_out"), 431 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ 432 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ 433 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), 434 SUNXI_FUNCTION(0x0, "gpio_in"), 435 SUNXI_FUNCTION(0x1, "gpio_out"), 436 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ 437 SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D4 */ 438 PINCTRL_SUN8I_R40)), 439 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), 440 SUNXI_FUNCTION(0x0, "gpio_in"), 441 SUNXI_FUNCTION(0x1, "gpio_out"), 442 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ 443 SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D5 */ 444 PINCTRL_SUN8I_R40)), 445 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), 446 SUNXI_FUNCTION(0x0, "gpio_in"), 447 SUNXI_FUNCTION(0x1, "gpio_out"), 448 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ 449 SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D6 */ 450 PINCTRL_SUN8I_R40)), 451 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), 452 SUNXI_FUNCTION(0x0, "gpio_in"), 453 SUNXI_FUNCTION(0x1, "gpio_out"), 454 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ 455 SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D7 */ 456 PINCTRL_SUN8I_R40)), 457 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), 458 SUNXI_FUNCTION(0x0, "gpio_in"), 459 SUNXI_FUNCTION(0x1, "gpio_out"), 460 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */ 461 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17), 462 SUNXI_FUNCTION(0x0, "gpio_in"), 463 SUNXI_FUNCTION(0x1, "gpio_out"), 464 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */ 465 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18), 466 SUNXI_FUNCTION(0x0, "gpio_in"), 467 SUNXI_FUNCTION(0x1, "gpio_out"), 468 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */ 469 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19), 470 SUNXI_FUNCTION(0x0, "gpio_in"), 471 SUNXI_FUNCTION(0x1, "gpio_out"), 472 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */ 473 SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */ 474 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20), 475 SUNXI_FUNCTION(0x0, "gpio_in"), 476 SUNXI_FUNCTION(0x1, "gpio_out"), 477 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */ 478 SUNXI_FUNCTION(0x3, "spi2")), /* CLK */ 479 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21), 480 SUNXI_FUNCTION(0x0, "gpio_in"), 481 SUNXI_FUNCTION(0x1, "gpio_out"), 482 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */ 483 SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */ 484 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22), 485 SUNXI_FUNCTION(0x0, "gpio_in"), 486 SUNXI_FUNCTION(0x1, "gpio_out"), 487 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */ 488 SUNXI_FUNCTION(0x3, "spi2")), /* MISO */ 489 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23), 490 SUNXI_FUNCTION(0x0, "gpio_in"), 491 SUNXI_FUNCTION(0x1, "gpio_out"), 492 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ 493 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24), 494 SUNXI_FUNCTION(0x0, "gpio_in"), 495 SUNXI_FUNCTION(0x1, "gpio_out"), 496 SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */ 497 SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* RST */ 498 PINCTRL_SUN8I_R40)), 499 /* Hole */ 500 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), 501 SUNXI_FUNCTION(0x0, "gpio_in"), 502 SUNXI_FUNCTION(0x1, "gpio_out"), 503 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */ 504 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */ 505 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), 506 SUNXI_FUNCTION(0x0, "gpio_in"), 507 SUNXI_FUNCTION(0x1, "gpio_out"), 508 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */ 509 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */ 510 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), 511 SUNXI_FUNCTION(0x0, "gpio_in"), 512 SUNXI_FUNCTION(0x1, "gpio_out"), 513 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ 514 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */ 515 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), 516 SUNXI_FUNCTION(0x0, "gpio_in"), 517 SUNXI_FUNCTION(0x1, "gpio_out"), 518 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ 519 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */ 520 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), 521 SUNXI_FUNCTION(0x0, "gpio_in"), 522 SUNXI_FUNCTION(0x1, "gpio_out"), 523 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ 524 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */ 525 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), 526 SUNXI_FUNCTION(0x0, "gpio_in"), 527 SUNXI_FUNCTION(0x1, "gpio_out"), 528 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ 529 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */ 530 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), 531 SUNXI_FUNCTION(0x0, "gpio_in"), 532 SUNXI_FUNCTION(0x1, "gpio_out"), 533 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ 534 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */ 535 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), 536 SUNXI_FUNCTION(0x0, "gpio_in"), 537 SUNXI_FUNCTION(0x1, "gpio_out"), 538 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ 539 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */ 540 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), 541 SUNXI_FUNCTION(0x0, "gpio_in"), 542 SUNXI_FUNCTION(0x1, "gpio_out"), 543 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */ 544 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */ 545 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), 546 SUNXI_FUNCTION(0x0, "gpio_in"), 547 SUNXI_FUNCTION(0x1, "gpio_out"), 548 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */ 549 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */ 550 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), 551 SUNXI_FUNCTION(0x0, "gpio_in"), 552 SUNXI_FUNCTION(0x1, "gpio_out"), 553 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ 554 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */ 555 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), 556 SUNXI_FUNCTION(0x0, "gpio_in"), 557 SUNXI_FUNCTION(0x1, "gpio_out"), 558 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ 559 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */ 560 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), 561 SUNXI_FUNCTION(0x0, "gpio_in"), 562 SUNXI_FUNCTION(0x1, "gpio_out"), 563 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ 564 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */ 565 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), 566 SUNXI_FUNCTION(0x0, "gpio_in"), 567 SUNXI_FUNCTION(0x1, "gpio_out"), 568 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ 569 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */ 570 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), 571 SUNXI_FUNCTION(0x0, "gpio_in"), 572 SUNXI_FUNCTION(0x1, "gpio_out"), 573 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ 574 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */ 575 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), 576 SUNXI_FUNCTION(0x0, "gpio_in"), 577 SUNXI_FUNCTION(0x1, "gpio_out"), 578 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ 579 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */ 580 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), 581 SUNXI_FUNCTION(0x0, "gpio_in"), 582 SUNXI_FUNCTION(0x1, "gpio_out"), 583 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */ 584 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */ 585 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), 586 SUNXI_FUNCTION(0x0, "gpio_in"), 587 SUNXI_FUNCTION(0x1, "gpio_out"), 588 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */ 589 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */ 590 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), 591 SUNXI_FUNCTION(0x0, "gpio_in"), 592 SUNXI_FUNCTION(0x1, "gpio_out"), 593 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ 594 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */ 595 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), 596 SUNXI_FUNCTION(0x0, "gpio_in"), 597 SUNXI_FUNCTION(0x1, "gpio_out"), 598 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ 599 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */ 600 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), 601 SUNXI_FUNCTION(0x0, "gpio_in"), 602 SUNXI_FUNCTION(0x1, "gpio_out"), 603 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ 604 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */ 605 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), 606 SUNXI_FUNCTION(0x0, "gpio_in"), 607 SUNXI_FUNCTION(0x1, "gpio_out"), 608 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ 609 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */ 610 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), 611 SUNXI_FUNCTION(0x0, "gpio_in"), 612 SUNXI_FUNCTION(0x1, "gpio_out"), 613 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ 614 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */ 615 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), 616 SUNXI_FUNCTION(0x0, "gpio_in"), 617 SUNXI_FUNCTION(0x1, "gpio_out"), 618 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ 619 SUNXI_FUNCTION(0x3, "sim")), /* DET */ 620 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), 621 SUNXI_FUNCTION(0x0, "gpio_in"), 622 SUNXI_FUNCTION(0x1, "gpio_out"), 623 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ 624 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */ 625 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), 626 SUNXI_FUNCTION(0x0, "gpio_in"), 627 SUNXI_FUNCTION(0x1, "gpio_out"), 628 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ 629 SUNXI_FUNCTION(0x3, "sim")), /* RST */ 630 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), 631 SUNXI_FUNCTION(0x0, "gpio_in"), 632 SUNXI_FUNCTION(0x1, "gpio_out"), 633 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ 634 SUNXI_FUNCTION(0x3, "sim")), /* SCK */ 635 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), 636 SUNXI_FUNCTION(0x0, "gpio_in"), 637 SUNXI_FUNCTION(0x1, "gpio_out"), 638 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ 639 SUNXI_FUNCTION(0x3, "sim")), /* SDA */ 640 /* Hole */ 641 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), 642 SUNXI_FUNCTION(0x0, "gpio_in"), 643 SUNXI_FUNCTION(0x1, "gpio_out"), 644 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */ 645 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */ 646 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), 647 SUNXI_FUNCTION(0x0, "gpio_in"), 648 SUNXI_FUNCTION(0x1, "gpio_out"), 649 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */ 650 SUNXI_FUNCTION(0x3, "csi0")), /* CK */ 651 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), 652 SUNXI_FUNCTION(0x0, "gpio_in"), 653 SUNXI_FUNCTION(0x1, "gpio_out"), 654 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */ 655 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */ 656 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), 657 SUNXI_FUNCTION(0x0, "gpio_in"), 658 SUNXI_FUNCTION(0x1, "gpio_out"), 659 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */ 660 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */ 661 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), 662 SUNXI_FUNCTION(0x0, "gpio_in"), 663 SUNXI_FUNCTION(0x1, "gpio_out"), 664 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */ 665 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */ 666 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), 667 SUNXI_FUNCTION(0x0, "gpio_in"), 668 SUNXI_FUNCTION(0x1, "gpio_out"), 669 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */ 670 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */ 671 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */ 672 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), 673 SUNXI_FUNCTION(0x0, "gpio_in"), 674 SUNXI_FUNCTION(0x1, "gpio_out"), 675 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */ 676 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */ 677 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), 678 SUNXI_FUNCTION(0x0, "gpio_in"), 679 SUNXI_FUNCTION(0x1, "gpio_out"), 680 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */ 681 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */ 682 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), 683 SUNXI_FUNCTION(0x0, "gpio_in"), 684 SUNXI_FUNCTION(0x1, "gpio_out"), 685 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */ 686 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */ 687 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), 688 SUNXI_FUNCTION(0x0, "gpio_in"), 689 SUNXI_FUNCTION(0x1, "gpio_out"), 690 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */ 691 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */ 692 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), 693 SUNXI_FUNCTION(0x0, "gpio_in"), 694 SUNXI_FUNCTION(0x1, "gpio_out"), 695 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */ 696 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */ 697 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), 698 SUNXI_FUNCTION(0x0, "gpio_in"), 699 SUNXI_FUNCTION(0x1, "gpio_out"), 700 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */ 701 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */ 702 /* Hole */ 703 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), 704 SUNXI_FUNCTION(0x0, "gpio_in"), 705 SUNXI_FUNCTION(0x1, "gpio_out"), 706 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ 707 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */ 708 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), 709 SUNXI_FUNCTION(0x0, "gpio_in"), 710 SUNXI_FUNCTION(0x1, "gpio_out"), 711 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ 712 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */ 713 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), 714 SUNXI_FUNCTION(0x0, "gpio_in"), 715 SUNXI_FUNCTION(0x1, "gpio_out"), 716 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ 717 SUNXI_FUNCTION(0x4, "uart0")), /* TX */ 718 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), 719 SUNXI_FUNCTION(0x0, "gpio_in"), 720 SUNXI_FUNCTION(0x1, "gpio_out"), 721 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ 722 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */ 723 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), 724 SUNXI_FUNCTION(0x0, "gpio_in"), 725 SUNXI_FUNCTION(0x1, "gpio_out"), 726 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ 727 SUNXI_FUNCTION(0x4, "uart0")), /* RX */ 728 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), 729 SUNXI_FUNCTION(0x0, "gpio_in"), 730 SUNXI_FUNCTION(0x1, "gpio_out"), 731 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ 732 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */ 733 /* Hole */ 734 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), 735 SUNXI_FUNCTION(0x0, "gpio_in"), 736 SUNXI_FUNCTION(0x1, "gpio_out"), 737 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */ 738 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */ 739 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */ 740 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), 741 SUNXI_FUNCTION(0x0, "gpio_in"), 742 SUNXI_FUNCTION(0x1, "gpio_out"), 743 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */ 744 SUNXI_FUNCTION(0x3, "csi1"), /* CK */ 745 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */ 746 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), 747 SUNXI_FUNCTION(0x0, "gpio_in"), 748 SUNXI_FUNCTION(0x1, "gpio_out"), 749 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */ 750 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */ 751 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */ 752 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), 753 SUNXI_FUNCTION(0x0, "gpio_in"), 754 SUNXI_FUNCTION(0x1, "gpio_out"), 755 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */ 756 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */ 757 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */ 758 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), 759 SUNXI_FUNCTION(0x0, "gpio_in"), 760 SUNXI_FUNCTION(0x1, "gpio_out"), 761 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */ 762 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */ 763 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */ 764 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */ 765 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), 766 SUNXI_FUNCTION(0x0, "gpio_in"), 767 SUNXI_FUNCTION(0x1, "gpio_out"), 768 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */ 769 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */ 770 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */ 771 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */ 772 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), 773 SUNXI_FUNCTION(0x0, "gpio_in"), 774 SUNXI_FUNCTION(0x1, "gpio_out"), 775 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */ 776 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */ 777 SUNXI_FUNCTION(0x4, "uart3"), /* TX */ 778 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */ 779 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), 780 SUNXI_FUNCTION(0x0, "gpio_in"), 781 SUNXI_FUNCTION(0x1, "gpio_out"), 782 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */ 783 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */ 784 SUNXI_FUNCTION(0x4, "uart3"), /* RX */ 785 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */ 786 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), 787 SUNXI_FUNCTION(0x0, "gpio_in"), 788 SUNXI_FUNCTION(0x1, "gpio_out"), 789 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */ 790 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */ 791 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ 792 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */ 793 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), 794 SUNXI_FUNCTION(0x0, "gpio_in"), 795 SUNXI_FUNCTION(0x1, "gpio_out"), 796 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */ 797 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */ 798 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ 799 SUNXI_FUNCTION(0x5, "csi0"), /* D13 */ 800 SUNXI_FUNCTION_VARIANT(0x6, "bist", /* RESULT0 */ 801 PINCTRL_SUN8I_R40)), 802 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), 803 SUNXI_FUNCTION(0x0, "gpio_in"), 804 SUNXI_FUNCTION(0x1, "gpio_out"), 805 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */ 806 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */ 807 SUNXI_FUNCTION(0x4, "uart4"), /* TX */ 808 SUNXI_FUNCTION(0x5, "csi0"), /* D14 */ 809 SUNXI_FUNCTION_VARIANT(0x6, "bist", /* RESULT1 */ 810 PINCTRL_SUN8I_R40)), 811 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), 812 SUNXI_FUNCTION(0x0, "gpio_in"), 813 SUNXI_FUNCTION(0x1, "gpio_out"), 814 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */ 815 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */ 816 SUNXI_FUNCTION(0x4, "uart4"), /* RX */ 817 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */ 818 /* Hole */ 819 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), 820 SUNXI_FUNCTION(0x0, "gpio_in"), 821 SUNXI_FUNCTION(0x1, "gpio_out"), 822 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */ 823 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA0 */ 824 PINCTRL_SUN4I_A10), 825 SUNXI_FUNCTION(0x4, "uart3"), /* TX */ 826 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */ 827 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */ 828 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), 829 SUNXI_FUNCTION(0x0, "gpio_in"), 830 SUNXI_FUNCTION(0x1, "gpio_out"), 831 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */ 832 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA1 */ 833 PINCTRL_SUN4I_A10), 834 SUNXI_FUNCTION(0x4, "uart3"), /* RX */ 835 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */ 836 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */ 837 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), 838 SUNXI_FUNCTION(0x0, "gpio_in"), 839 SUNXI_FUNCTION(0x1, "gpio_out"), 840 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */ 841 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA2 */ 842 PINCTRL_SUN4I_A10), 843 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ 844 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */ 845 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */ 846 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), 847 SUNXI_FUNCTION(0x0, "gpio_in"), 848 SUNXI_FUNCTION(0x1, "gpio_out"), 849 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */ 850 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIRQ */ 851 PINCTRL_SUN4I_A10), 852 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ 853 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */ 854 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */ 855 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), 856 SUNXI_FUNCTION(0x0, "gpio_in"), 857 SUNXI_FUNCTION(0x1, "gpio_out"), 858 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */ 859 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD0 */ 860 PINCTRL_SUN4I_A10), 861 SUNXI_FUNCTION(0x4, "uart4"), /* TX */ 862 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */ 863 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */ 864 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), 865 SUNXI_FUNCTION(0x0, "gpio_in"), 866 SUNXI_FUNCTION(0x1, "gpio_out"), 867 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */ 868 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD1 */ 869 PINCTRL_SUN4I_A10), 870 SUNXI_FUNCTION(0x4, "uart4"), /* RX */ 871 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */ 872 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */ 873 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), 874 SUNXI_FUNCTION(0x0, "gpio_in"), 875 SUNXI_FUNCTION(0x1, "gpio_out"), 876 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */ 877 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD2 */ 878 PINCTRL_SUN4I_A10), 879 SUNXI_FUNCTION(0x4, "uart5"), /* TX */ 880 SUNXI_FUNCTION_VARIANT(0x5, "ms", /* BS */ 881 PINCTRL_SUN4I_A10 | 882 PINCTRL_SUN7I_A20), 883 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */ 884 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */ 885 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), 886 SUNXI_FUNCTION(0x0, "gpio_in"), 887 SUNXI_FUNCTION(0x1, "gpio_out"), 888 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */ 889 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD3 */ 890 PINCTRL_SUN4I_A10), 891 SUNXI_FUNCTION(0x4, "uart5"), /* RX */ 892 SUNXI_FUNCTION_VARIANT(0x5, "ms", /* CLK */ 893 PINCTRL_SUN4I_A10 | 894 PINCTRL_SUN7I_A20), 895 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */ 896 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */ 897 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), 898 SUNXI_FUNCTION(0x0, "gpio_in"), 899 SUNXI_FUNCTION(0x1, "gpio_out"), 900 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */ 901 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD4 */ 902 PINCTRL_SUN4I_A10), 903 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD3 */ 904 PINCTRL_SUN7I_A20 | 905 PINCTRL_SUN8I_R40), 906 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */ 907 SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D0 */ 908 PINCTRL_SUN4I_A10 | 909 PINCTRL_SUN7I_A20), 910 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */ 911 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */ 912 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), 913 SUNXI_FUNCTION(0x0, "gpio_in"), 914 SUNXI_FUNCTION(0x1, "gpio_out"), 915 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */ 916 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD5 */ 917 PINCTRL_SUN4I_A10), 918 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD2 */ 919 PINCTRL_SUN7I_A20 | 920 PINCTRL_SUN8I_R40), 921 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */ 922 SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D1 */ 923 PINCTRL_SUN4I_A10 | 924 PINCTRL_SUN7I_A20), 925 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */ 926 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */ 927 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), 928 SUNXI_FUNCTION(0x0, "gpio_in"), 929 SUNXI_FUNCTION(0x1, "gpio_out"), 930 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */ 931 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD6 */ 932 PINCTRL_SUN4I_A10), 933 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD1 */ 934 PINCTRL_SUN7I_A20 | 935 PINCTRL_SUN8I_R40), 936 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */ 937 SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D2 */ 938 PINCTRL_SUN4I_A10 | 939 PINCTRL_SUN7I_A20), 940 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */ 941 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */ 942 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), 943 SUNXI_FUNCTION(0x0, "gpio_in"), 944 SUNXI_FUNCTION(0x1, "gpio_out"), 945 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */ 946 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD7 */ 947 PINCTRL_SUN4I_A10), 948 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD0 */ 949 PINCTRL_SUN7I_A20 | 950 PINCTRL_SUN8I_R40), 951 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */ 952 SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D3 */ 953 PINCTRL_SUN4I_A10 | 954 PINCTRL_SUN7I_A20), 955 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */ 956 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */ 957 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12), 958 SUNXI_FUNCTION(0x0, "gpio_in"), 959 SUNXI_FUNCTION(0x1, "gpio_out"), 960 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */ 961 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD8 */ 962 PINCTRL_SUN4I_A10), 963 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */ 964 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */ 965 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */ 966 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13), 967 SUNXI_FUNCTION(0x0, "gpio_in"), 968 SUNXI_FUNCTION(0x1, "gpio_out"), 969 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */ 970 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD9 */ 971 PINCTRL_SUN4I_A10), 972 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */ 973 SUNXI_FUNCTION(0x5, "sim"), /* RST */ 974 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */ 975 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */ 976 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14), 977 SUNXI_FUNCTION(0x0, "gpio_in"), 978 SUNXI_FUNCTION(0x1, "gpio_out"), 979 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */ 980 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD10 */ 981 PINCTRL_SUN4I_A10), 982 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD3 */ 983 PINCTRL_SUN7I_A20 | 984 PINCTRL_SUN8I_R40), 985 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */ 986 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */ 987 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */ 988 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */ 989 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15), 990 SUNXI_FUNCTION(0x0, "gpio_in"), 991 SUNXI_FUNCTION(0x1, "gpio_out"), 992 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */ 993 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD11 */ 994 PINCTRL_SUN4I_A10), 995 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD2 */ 996 PINCTRL_SUN7I_A20 | 997 PINCTRL_SUN8I_R40), 998 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */ 999 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */ 1000 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */ 1001 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */ 1002 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16), 1003 SUNXI_FUNCTION(0x0, "gpio_in"), 1004 SUNXI_FUNCTION(0x1, "gpio_out"), 1005 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */ 1006 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD12 */ 1007 PINCTRL_SUN4I_A10), 1008 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD1 */ 1009 PINCTRL_SUN7I_A20 | 1010 PINCTRL_SUN8I_R40), 1011 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ 1012 SUNXI_FUNCTION(0x5, "sim"), /* DET */ 1013 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */ 1014 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ 1015 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), 1016 SUNXI_FUNCTION(0x0, "gpio_in"), 1017 SUNXI_FUNCTION(0x1, "gpio_out"), 1018 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */ 1019 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD13 */ 1020 PINCTRL_SUN4I_A10), 1021 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD0 */ 1022 PINCTRL_SUN7I_A20 | 1023 PINCTRL_SUN8I_R40), 1024 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */ 1025 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */ 1026 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */ 1027 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */ 1028 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18), 1029 SUNXI_FUNCTION(0x0, "gpio_in"), 1030 SUNXI_FUNCTION(0x1, "gpio_out"), 1031 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */ 1032 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD14 */ 1033 PINCTRL_SUN4I_A10), 1034 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXCK */ 1035 PINCTRL_SUN7I_A20 | 1036 PINCTRL_SUN8I_R40), 1037 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */ 1038 SUNXI_FUNCTION(0x5, "sim"), /* SCK */ 1039 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */ 1040 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */ 1041 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19), 1042 SUNXI_FUNCTION(0x0, "gpio_in"), 1043 SUNXI_FUNCTION(0x1, "gpio_out"), 1044 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */ 1045 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD15 */ 1046 PINCTRL_SUN4I_A10), 1047 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXERR */ 1048 PINCTRL_SUN7I_A20 | 1049 PINCTRL_SUN8I_R40), 1050 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */ 1051 SUNXI_FUNCTION(0x5, "sim"), /* SDA */ 1052 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */ 1053 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */ 1054 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20), 1055 SUNXI_FUNCTION(0x0, "gpio_in"), 1056 SUNXI_FUNCTION(0x1, "gpio_out"), 1057 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */ 1058 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAOE */ 1059 PINCTRL_SUN4I_A10), 1060 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXDV */ 1061 PINCTRL_SUN7I_A20 | 1062 PINCTRL_SUN8I_R40), 1063 SUNXI_FUNCTION(0x4, "can"), /* TX */ 1064 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */ 1065 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */ 1066 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21), 1067 SUNXI_FUNCTION(0x0, "gpio_in"), 1068 SUNXI_FUNCTION(0x1, "gpio_out"), 1069 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */ 1070 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATADREQ */ 1071 PINCTRL_SUN4I_A10), 1072 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* EMDC */ 1073 PINCTRL_SUN7I_A20 | 1074 PINCTRL_SUN8I_R40), 1075 SUNXI_FUNCTION(0x4, "can"), /* RX */ 1076 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */ 1077 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */ 1078 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22), 1079 SUNXI_FUNCTION(0x0, "gpio_in"), 1080 SUNXI_FUNCTION(0x1, "gpio_out"), 1081 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */ 1082 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATADACK */ 1083 PINCTRL_SUN4I_A10), 1084 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* EMDIO */ 1085 PINCTRL_SUN7I_A20 | 1086 PINCTRL_SUN8I_R40), 1087 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */ 1088 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */ 1089 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */ 1090 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23), 1091 SUNXI_FUNCTION(0x0, "gpio_in"), 1092 SUNXI_FUNCTION(0x1, "gpio_out"), 1093 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */ 1094 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATACS0 */ 1095 PINCTRL_SUN4I_A10), 1096 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXEN */ 1097 PINCTRL_SUN7I_A20 | 1098 PINCTRL_SUN8I_R40), 1099 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */ 1100 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */ 1101 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */ 1102 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24), 1103 SUNXI_FUNCTION(0x0, "gpio_in"), 1104 SUNXI_FUNCTION(0x1, "gpio_out"), 1105 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */ 1106 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATACS1 */ 1107 PINCTRL_SUN4I_A10), 1108 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXCK */ 1109 PINCTRL_SUN7I_A20 | 1110 PINCTRL_SUN8I_R40), 1111 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */ 1112 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */ 1113 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */ 1114 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25), 1115 SUNXI_FUNCTION(0x0, "gpio_in"), 1116 SUNXI_FUNCTION(0x1, "gpio_out"), 1117 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */ 1118 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIORDY */ 1119 PINCTRL_SUN4I_A10), 1120 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ECRS */ 1121 PINCTRL_SUN7I_A20 | 1122 PINCTRL_SUN8I_R40), 1123 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */ 1124 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */ 1125 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */ 1126 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26), 1127 SUNXI_FUNCTION(0x0, "gpio_in"), 1128 SUNXI_FUNCTION(0x1, "gpio_out"), 1129 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */ 1130 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIOR */ 1131 PINCTRL_SUN4I_A10), 1132 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ECOL */ 1133 PINCTRL_SUN7I_A20 | 1134 PINCTRL_SUN8I_R40), 1135 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */ 1136 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */ 1137 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */ 1138 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27), 1139 SUNXI_FUNCTION(0x0, "gpio_in"), 1140 SUNXI_FUNCTION(0x1, "gpio_out"), 1141 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */ 1142 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIOW */ 1143 PINCTRL_SUN4I_A10), 1144 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXERR */ 1145 PINCTRL_SUN7I_A20 | 1146 PINCTRL_SUN8I_R40), 1147 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */ 1148 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */ 1149 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */ 1150 /* Hole */ 1151 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0), 1152 SUNXI_FUNCTION(0x0, "gpio_in"), 1153 SUNXI_FUNCTION(0x1, "gpio_out"), 1154 SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SCK */ 1155 PINCTRL_SUN7I_A20 | 1156 PINCTRL_SUN8I_R40)), 1157 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1), 1158 SUNXI_FUNCTION(0x0, "gpio_in"), 1159 SUNXI_FUNCTION(0x1, "gpio_out"), 1160 SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SDA */ 1161 PINCTRL_SUN7I_A20 | 1162 PINCTRL_SUN8I_R40)), 1163 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2), 1164 SUNXI_FUNCTION(0x0, "gpio_in"), 1165 SUNXI_FUNCTION(0x1, "gpio_out"), 1166 SUNXI_FUNCTION_VARIANT(0x3, "i2c4", /* SCK */ 1167 PINCTRL_SUN7I_A20 | 1168 PINCTRL_SUN8I_R40)), 1169 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3), 1170 SUNXI_FUNCTION(0x0, "gpio_in"), 1171 SUNXI_FUNCTION(0x1, "gpio_out"), 1172 SUNXI_FUNCTION(0x2, "pwm"), /* PWM1 */ 1173 SUNXI_FUNCTION_VARIANT(0x3, "i2c4", /* SDA */ 1174 PINCTRL_SUN7I_A20 | 1175 PINCTRL_SUN8I_R40)), 1176 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4), 1177 SUNXI_FUNCTION(0x0, "gpio_in"), 1178 SUNXI_FUNCTION(0x1, "gpio_out"), 1179 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */ 1180 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5), 1181 SUNXI_FUNCTION(0x0, "gpio_in"), 1182 SUNXI_FUNCTION(0x1, "gpio_out"), 1183 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */ 1184 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6), 1185 SUNXI_FUNCTION(0x0, "gpio_in"), 1186 SUNXI_FUNCTION(0x1, "gpio_out"), 1187 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */ 1188 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7), 1189 SUNXI_FUNCTION(0x0, "gpio_in"), 1190 SUNXI_FUNCTION(0x1, "gpio_out"), 1191 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */ 1192 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8), 1193 SUNXI_FUNCTION(0x0, "gpio_in"), 1194 SUNXI_FUNCTION(0x1, "gpio_out"), 1195 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */ 1196 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9), 1197 SUNXI_FUNCTION(0x0, "gpio_in"), 1198 SUNXI_FUNCTION(0x1, "gpio_out"), 1199 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */ 1200 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10), 1201 SUNXI_FUNCTION(0x0, "gpio_in"), 1202 SUNXI_FUNCTION(0x1, "gpio_out"), 1203 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */ 1204 SUNXI_FUNCTION(0x3, "uart5"), /* TX */ 1205 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */ 1206 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11), 1207 SUNXI_FUNCTION(0x0, "gpio_in"), 1208 SUNXI_FUNCTION(0x1, "gpio_out"), 1209 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */ 1210 SUNXI_FUNCTION(0x3, "uart5"), /* RX */ 1211 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */ 1212 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12), 1213 SUNXI_FUNCTION(0x0, "gpio_in"), 1214 SUNXI_FUNCTION(0x1, "gpio_out"), 1215 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */ 1216 SUNXI_FUNCTION(0x3, "uart6"), /* TX */ 1217 SUNXI_FUNCTION_VARIANT(0x4, "clk_out_a", 1218 PINCTRL_SUN7I_A20 | 1219 PINCTRL_SUN8I_R40), 1220 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */ 1221 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13), 1222 SUNXI_FUNCTION(0x0, "gpio_in"), 1223 SUNXI_FUNCTION(0x1, "gpio_out"), 1224 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */ 1225 SUNXI_FUNCTION(0x3, "uart6"), /* RX */ 1226 SUNXI_FUNCTION_VARIANT(0x4, "clk_out_b", 1227 PINCTRL_SUN7I_A20 | 1228 PINCTRL_SUN8I_R40), 1229 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */ 1230 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14), 1231 SUNXI_FUNCTION(0x0, "gpio_in"), 1232 SUNXI_FUNCTION(0x1, "gpio_out"), 1233 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */ 1234 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */ 1235 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */ 1236 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */ 1237 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15), 1238 SUNXI_FUNCTION(0x0, "gpio_in"), 1239 SUNXI_FUNCTION(0x1, "gpio_out"), 1240 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */ 1241 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */ 1242 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */ 1243 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */ 1244 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16), 1245 SUNXI_FUNCTION(0x0, "gpio_in"), 1246 SUNXI_FUNCTION(0x1, "gpio_out"), 1247 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ 1248 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */ 1249 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */ 1250 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17), 1251 SUNXI_FUNCTION(0x0, "gpio_in"), 1252 SUNXI_FUNCTION(0x1, "gpio_out"), 1253 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ 1254 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */ 1255 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */ 1256 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18), 1257 SUNXI_FUNCTION(0x0, "gpio_in"), 1258 SUNXI_FUNCTION(0x1, "gpio_out"), 1259 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ 1260 SUNXI_FUNCTION(0x3, "uart2"), /* TX */ 1261 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */ 1262 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19), 1263 SUNXI_FUNCTION(0x0, "gpio_in"), 1264 SUNXI_FUNCTION(0x1, "gpio_out"), 1265 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ 1266 SUNXI_FUNCTION(0x3, "uart2"), /* RX */ 1267 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */ 1268 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20), 1269 SUNXI_FUNCTION(0x0, "gpio_in"), 1270 SUNXI_FUNCTION(0x1, "gpio_out"), 1271 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */ 1272 SUNXI_FUNCTION(0x3, "uart7"), /* TX */ 1273 SUNXI_FUNCTION_VARIANT(0x4, "hdmi", /* HSCL */ 1274 PINCTRL_SUN4I_A10 | 1275 PINCTRL_SUN7I_A20), 1276 SUNXI_FUNCTION_VARIANT(0x6, "pwm", /* PWM2 */ 1277 PINCTRL_SUN8I_R40)), 1278 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21), 1279 SUNXI_FUNCTION(0x0, "gpio_in"), 1280 SUNXI_FUNCTION(0x1, "gpio_out"), 1281 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */ 1282 SUNXI_FUNCTION(0x3, "uart7"), /* RX */ 1283 SUNXI_FUNCTION_VARIANT(0x4, "hdmi", /* HSDA */ 1284 PINCTRL_SUN4I_A10 | 1285 PINCTRL_SUN7I_A20), 1286 SUNXI_FUNCTION_VARIANT(0x6, "pwm", /* PWM3 */ 1287 PINCTRL_SUN8I_R40)), 1288}; 1289 1290static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = { 1291 .pins = sun4i_a10_pins, 1292 .npins = ARRAY_SIZE(sun4i_a10_pins), 1293 .irq_banks = 1, 1294 .irq_read_needs_mux = true, 1295 .disable_strict_mode = true, 1296}; 1297 1298static int sun4i_a10_pinctrl_probe(struct platform_device *pdev) 1299{ 1300 unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev); 1301 1302 return sunxi_pinctrl_init_with_flags(pdev, &sun4i_a10_pinctrl_data, 1303 variant); 1304} 1305 1306static const struct of_device_id sun4i_a10_pinctrl_match[] = { 1307 { 1308 .compatible = "allwinner,sun4i-a10-pinctrl", 1309 .data = (void *)PINCTRL_SUN4I_A10 1310 }, 1311 { 1312 .compatible = "allwinner,sun7i-a20-pinctrl", 1313 .data = (void *)PINCTRL_SUN7I_A20 1314 }, 1315 { 1316 .compatible = "allwinner,sun8i-r40-pinctrl", 1317 .data = (void *)PINCTRL_SUN8I_R40 1318 }, 1319 {} 1320}; 1321 1322static struct platform_driver sun4i_a10_pinctrl_driver = { 1323 .probe = sun4i_a10_pinctrl_probe, 1324 .driver = { 1325 .name = "sun4i-pinctrl", 1326 .of_match_table = sun4i_a10_pinctrl_match, 1327 }, 1328}; 1329builtin_platform_driver(sun4i_a10_pinctrl_driver);
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