pinctrl-ssbi-mpp.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (c) 2015, Sony Mobile Communications AB.
  4 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  5 */
  6
  7#include <linux/gpio/driver.h>
  8#include <linux/interrupt.h>
  9#include <linux/module.h>
 10#include <linux/of.h>
 11#include <linux/of_irq.h>
 12#include <linux/platform_device.h>
 13#include <linux/regmap.h>
 14#include <linux/seq_file.h>
 15#include <linux/slab.h>
 16#include <linux/string_choices.h>
 17
 18#include <linux/pinctrl/pinconf-generic.h>
 19#include <linux/pinctrl/pinconf.h>
 20#include <linux/pinctrl/pinctrl.h>
 21#include <linux/pinctrl/pinmux.h>
 22
 23#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
 24
 25#include "../core.h"
 26#include "../pinctrl-utils.h"
 27
 28/* MPP registers */
 29#define SSBI_REG_ADDR_MPP_BASE		0x50
 30#define SSBI_REG_ADDR_MPP(n)		(SSBI_REG_ADDR_MPP_BASE + n)
 31
 32/* MPP Type: type */
 33#define PM8XXX_MPP_TYPE_D_INPUT         0
 34#define PM8XXX_MPP_TYPE_D_OUTPUT        1
 35#define PM8XXX_MPP_TYPE_D_BI_DIR        2
 36#define PM8XXX_MPP_TYPE_A_INPUT         3
 37#define PM8XXX_MPP_TYPE_A_OUTPUT        4
 38#define PM8XXX_MPP_TYPE_SINK            5
 39#define PM8XXX_MPP_TYPE_DTEST_SINK      6
 40#define PM8XXX_MPP_TYPE_DTEST_OUTPUT    7
 41
 42/* Digital Input: control */
 43#define PM8XXX_MPP_DIN_TO_INT           0
 44#define PM8XXX_MPP_DIN_TO_DBUS1         1
 45#define PM8XXX_MPP_DIN_TO_DBUS2         2
 46#define PM8XXX_MPP_DIN_TO_DBUS3         3
 47
 48/* Digital Output: control */
 49#define PM8XXX_MPP_DOUT_CTRL_LOW        0
 50#define PM8XXX_MPP_DOUT_CTRL_HIGH       1
 51#define PM8XXX_MPP_DOUT_CTRL_MPP        2
 52#define PM8XXX_MPP_DOUT_CTRL_INV_MPP    3
 53
 54/* Bidirectional: control */
 55#define PM8XXX_MPP_BI_PULLUP_1KOHM      0
 56#define PM8XXX_MPP_BI_PULLUP_OPEN       1
 57#define PM8XXX_MPP_BI_PULLUP_10KOHM     2
 58#define PM8XXX_MPP_BI_PULLUP_30KOHM     3
 59
 60/* Analog Output: control */
 61#define PM8XXX_MPP_AOUT_CTRL_DISABLE            0
 62#define PM8XXX_MPP_AOUT_CTRL_ENABLE             1
 63#define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN        2
 64#define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN         3
 65
 66/* Current Sink: control */
 67#define PM8XXX_MPP_CS_CTRL_DISABLE      0
 68#define PM8XXX_MPP_CS_CTRL_ENABLE       1
 69#define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN  2
 70#define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN   3
 71
 72/* DTEST Current Sink: control */
 73#define PM8XXX_MPP_DTEST_CS_CTRL_EN1    0
 74#define PM8XXX_MPP_DTEST_CS_CTRL_EN2    1
 75#define PM8XXX_MPP_DTEST_CS_CTRL_EN3    2
 76#define PM8XXX_MPP_DTEST_CS_CTRL_EN4    3
 77
 78/* DTEST Digital Output: control */
 79#define PM8XXX_MPP_DTEST_DBUS1          0
 80#define PM8XXX_MPP_DTEST_DBUS2          1
 81#define PM8XXX_MPP_DTEST_DBUS3          2
 82#define PM8XXX_MPP_DTEST_DBUS4          3
 83
 84/* custom pinconf parameters */
 85#define PM8XXX_CONFIG_AMUX		(PIN_CONFIG_END + 1)
 86#define PM8XXX_CONFIG_DTEST_SELECTOR	(PIN_CONFIG_END + 2)
 87#define PM8XXX_CONFIG_ALEVEL		(PIN_CONFIG_END + 3)
 88#define PM8XXX_CONFIG_PAIRED		(PIN_CONFIG_END + 4)
 89
 90/**
 91 * struct pm8xxx_pin_data - dynamic configuration for a pin
 92 * @reg:		address of the control register
 93 * @mode:		operating mode for the pin (digital, analog or current sink)
 94 * @input:		pin is input
 95 * @output:		pin is output
 96 * @high_z:		pin is floating
 97 * @paired:		mpp operates in paired mode
 98 * @output_value:	logical output value of the mpp
 99 * @power_source:	selected power source
100 * @dtest:		DTEST route selector
101 * @amux:		input muxing in analog mode
102 * @aout_level:		selector of the output in analog mode
103 * @drive_strength:	drive strength of the current sink
104 * @pullup:		pull up value, when in digital bidirectional mode
105 */
106struct pm8xxx_pin_data {
107	unsigned reg;
108
109	u8 mode;
110
111	bool input;
112	bool output;
113	bool high_z;
114	bool paired;
115	bool output_value;
116
117	u8 power_source;
118	u8 dtest;
119	u8 amux;
120	u8 aout_level;
121	u8 drive_strength;
122	unsigned pullup;
123};
124
125struct pm8xxx_mpp {
126	struct device *dev;
127	struct regmap *regmap;
128	struct pinctrl_dev *pctrl;
129	struct gpio_chip chip;
130
131	struct pinctrl_desc desc;
132	unsigned npins;
133};
134
135static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
136	{"qcom,amux-route",	PM8XXX_CONFIG_AMUX,		0},
137	{"qcom,analog-level",	PM8XXX_CONFIG_ALEVEL,		0},
138	{"qcom,dtest",		PM8XXX_CONFIG_DTEST_SELECTOR,	0},
139	{"qcom,paired",		PM8XXX_CONFIG_PAIRED,		0},
140};
141
142#ifdef CONFIG_DEBUG_FS
143static const struct pin_config_item pm8xxx_conf_items[] = {
144	PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
145	PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
146	PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
147	PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
148};
149#endif
150
151#define PM8XXX_MAX_MPPS	12
152#define PM8XXX_MPP_PHYSICAL_OFFSET    1
153
154static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
155	"mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
156	"mpp9", "mpp10", "mpp11", "mpp12",
157};
158
159#define PM8XXX_MPP_DIGITAL	0
160#define PM8XXX_MPP_ANALOG	1
161#define PM8XXX_MPP_SINK		2
162
163static const char * const pm8xxx_mpp_functions[] = {
164	"digital", "analog", "sink",
165};
166
167static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
168			     struct pm8xxx_pin_data *pin)
169{
170	unsigned level;
171	unsigned ctrl;
172	unsigned type;
173	int ret;
174	u8 val;
175
176	switch (pin->mode) {
177	case PM8XXX_MPP_DIGITAL:
178		if (pin->dtest) {
179			type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
180			ctrl = pin->dtest - 1;
181		} else if (pin->input && pin->output) {
182			type = PM8XXX_MPP_TYPE_D_BI_DIR;
183			if (pin->high_z)
184				ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
185			else if (pin->pullup == 600)
186				ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
187			else if (pin->pullup == 10000)
188				ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
189			else
190				ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
191		} else if (pin->input) {
192			type = PM8XXX_MPP_TYPE_D_INPUT;
193			if (pin->dtest)
194				ctrl = pin->dtest;
195			else
196				ctrl = PM8XXX_MPP_DIN_TO_INT;
197		} else {
198			type = PM8XXX_MPP_TYPE_D_OUTPUT;
199			ctrl = !!pin->output_value;
200			if (pin->paired)
201				ctrl |= BIT(1);
202		}
203
204		level = pin->power_source;
205		break;
206	case PM8XXX_MPP_ANALOG:
207		if (pin->output) {
208			type = PM8XXX_MPP_TYPE_A_OUTPUT;
209			level = pin->aout_level;
210			ctrl = pin->output_value;
211			if (pin->paired)
212				ctrl |= BIT(1);
213		} else {
214			type = PM8XXX_MPP_TYPE_A_INPUT;
215			level = pin->amux;
216			ctrl = 0;
217		}
218		break;
219	case PM8XXX_MPP_SINK:
220		level = (pin->drive_strength / 5) - 1;
221		if (pin->dtest) {
222			type = PM8XXX_MPP_TYPE_DTEST_SINK;
223			ctrl = pin->dtest - 1;
224		} else {
225			type = PM8XXX_MPP_TYPE_SINK;
226			ctrl = pin->output_value;
227			if (pin->paired)
228				ctrl |= BIT(1);
229		}
230		break;
231	default:
232		return -EINVAL;
233	}
234
235	val = type << 5 | level << 2 | ctrl;
236	ret = regmap_write(pctrl->regmap, pin->reg, val);
237	if (ret)
238		dev_err(pctrl->dev, "failed to write register\n");
239
240	return ret;
241}
242
243static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
244{
245	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
246
247	return pctrl->npins;
248}
249
250static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
251					 unsigned group)
252{
253	return pm8xxx_groups[group];
254}
255
256
257static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
258				 unsigned group,
259				 const unsigned **pins,
260				 unsigned *num_pins)
261{
262	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
263
264	*pins = &pctrl->desc.pins[group].number;
265	*num_pins = 1;
266
267	return 0;
268}
269
270static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
271	.get_groups_count	= pm8xxx_get_groups_count,
272	.get_group_name		= pm8xxx_get_group_name,
273	.get_group_pins         = pm8xxx_get_group_pins,
274	.dt_node_to_map		= pinconf_generic_dt_node_to_map_group,
275	.dt_free_map		= pinctrl_utils_free_map,
276};
277
278static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
279{
280	return ARRAY_SIZE(pm8xxx_mpp_functions);
281}
282
283static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
284					    unsigned function)
285{
286	return pm8xxx_mpp_functions[function];
287}
288
289static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
290				      unsigned function,
291				      const char * const **groups,
292				      unsigned * const num_groups)
293{
294	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
295
296	*groups = pm8xxx_groups;
297	*num_groups = pctrl->npins;
298	return 0;
299}
300
301static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
302				 unsigned function,
303				 unsigned group)
304{
305	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
306	struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
307
308	pin->mode = function;
309	pm8xxx_mpp_update(pctrl, pin);
310
311	return 0;
312}
313
314static const struct pinmux_ops pm8xxx_pinmux_ops = {
315	.get_functions_count	= pm8xxx_get_functions_count,
316	.get_function_name	= pm8xxx_get_function_name,
317	.get_function_groups	= pm8xxx_get_function_groups,
318	.set_mux		= pm8xxx_pinmux_set_mux,
319};
320
321static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
322				 unsigned int offset,
323				 unsigned long *config)
324{
325	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
326	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
327	unsigned param = pinconf_to_config_param(*config);
328	unsigned arg;
329
330	switch (param) {
331	case PIN_CONFIG_BIAS_PULL_UP:
332		arg = pin->pullup;
333		break;
334	case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
335		arg = pin->high_z;
336		break;
337	case PIN_CONFIG_INPUT_ENABLE:
338		arg = pin->input;
339		break;
340	case PIN_CONFIG_LEVEL:
341		arg = pin->output_value;
342		break;
343	case PIN_CONFIG_POWER_SOURCE:
344		arg = pin->power_source;
345		break;
346	case PIN_CONFIG_DRIVE_STRENGTH:
347		arg = pin->drive_strength;
348		break;
349	case PM8XXX_CONFIG_DTEST_SELECTOR:
350		arg = pin->dtest;
351		break;
352	case PM8XXX_CONFIG_AMUX:
353		arg = pin->amux;
354		break;
355	case PM8XXX_CONFIG_ALEVEL:
356		arg = pin->aout_level;
357		break;
358	case PM8XXX_CONFIG_PAIRED:
359		arg = pin->paired;
360		break;
361	default:
362		return -EINVAL;
363	}
364
365	*config = pinconf_to_config_packed(param, arg);
366
367	return 0;
368}
369
370static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
371				 unsigned int offset,
372				 unsigned long *configs,
373				 unsigned num_configs)
374{
375	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
376	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
377	unsigned param;
378	unsigned arg;
379	unsigned i;
380
381	for (i = 0; i < num_configs; i++) {
382		param = pinconf_to_config_param(configs[i]);
383		arg = pinconf_to_config_argument(configs[i]);
384
385		switch (param) {
386		case PIN_CONFIG_BIAS_PULL_UP:
387			pin->pullup = arg;
388			break;
389		case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
390			pin->high_z = true;
391			break;
392		case PIN_CONFIG_INPUT_ENABLE:
393			pin->input = true;
394			break;
395		case PIN_CONFIG_LEVEL:
396			pin->output = true;
397			pin->output_value = !!arg;
398			break;
399		case PIN_CONFIG_POWER_SOURCE:
400			pin->power_source = arg;
401			break;
402		case PIN_CONFIG_DRIVE_STRENGTH:
403			pin->drive_strength = arg;
404			break;
405		case PM8XXX_CONFIG_DTEST_SELECTOR:
406			pin->dtest = arg;
407			break;
408		case PM8XXX_CONFIG_AMUX:
409			pin->amux = arg;
410			break;
411		case PM8XXX_CONFIG_ALEVEL:
412			pin->aout_level = arg;
413			break;
414		case PM8XXX_CONFIG_PAIRED:
415			pin->paired = !!arg;
416			break;
417		default:
418			dev_err(pctrl->dev,
419				"unsupported config parameter: %x\n",
420				param);
421			return -EINVAL;
422		}
423	}
424
425	pm8xxx_mpp_update(pctrl, pin);
426
427	return 0;
428}
429
430static const struct pinconf_ops pm8xxx_pinconf_ops = {
431	.is_generic = true,
432	.pin_config_group_get = pm8xxx_pin_config_get,
433	.pin_config_group_set = pm8xxx_pin_config_set,
434};
435
436static const struct pinctrl_desc pm8xxx_pinctrl_desc = {
437	.name = "pm8xxx_mpp",
438	.pctlops = &pm8xxx_pinctrl_ops,
439	.pmxops = &pm8xxx_pinmux_ops,
440	.confops = &pm8xxx_pinconf_ops,
441	.owner = THIS_MODULE,
442};
443
444static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
445				       unsigned offset)
446{
447	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
448	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
449
450	switch (pin->mode) {
451	case PM8XXX_MPP_DIGITAL:
452		pin->input = true;
453		break;
454	case PM8XXX_MPP_ANALOG:
455		pin->input = true;
456		pin->output = true;
457		break;
458	case PM8XXX_MPP_SINK:
459		return -EINVAL;
460	}
461
462	pm8xxx_mpp_update(pctrl, pin);
463
464	return 0;
465}
466
467static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
468					unsigned offset,
469					int value)
470{
471	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
472	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
473
474	switch (pin->mode) {
475	case PM8XXX_MPP_DIGITAL:
476		pin->output = true;
477		break;
478	case PM8XXX_MPP_ANALOG:
479		pin->input = false;
480		pin->output = true;
481		break;
482	case PM8XXX_MPP_SINK:
483		pin->input = false;
484		pin->output = true;
485		break;
486	}
487
488	pm8xxx_mpp_update(pctrl, pin);
489
490	return 0;
491}
492
493static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
494{
495	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
496	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
497	bool state;
498	int ret, irq;
499
500	if (!pin->input)
501		return !!pin->output_value;
502
503	irq = chip->to_irq(chip, offset);
504	if (irq < 0)
505		return irq;
506
507	ret = irq_get_irqchip_state(irq, IRQCHIP_STATE_LINE_LEVEL, &state);
508	if (!ret)
509		ret = !!state;
510
511	return ret;
512}
513
514static int pm8xxx_mpp_set(struct gpio_chip *chip, unsigned int offset,
515			  int value)
516{
517	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
518	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
519
520	pin->output_value = !!value;
521
522	return pm8xxx_mpp_update(pctrl, pin);
523}
524
525static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
526				const struct of_phandle_args *gpio_desc,
527				u32 *flags)
528{
529	if (chip->of_gpio_n_cells < 2)
530		return -EINVAL;
531
532	if (flags)
533		*flags = gpio_desc->args[1];
534
535	return gpio_desc->args[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
536}
537
538
539#ifdef CONFIG_DEBUG_FS
540
541static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
542				  struct pinctrl_dev *pctldev,
543				  struct gpio_chip *chip,
544				  unsigned offset,
545				  unsigned gpio)
546{
547	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
548	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
549
550	static const char * const aout_lvls[] = {
551		"1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
552		"abus3"
553	};
554
555	static const char * const amuxs[] = {
556		"amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
557		"abus3",
558	};
559
560	seq_printf(s, " mpp%-2d:", offset + PM8XXX_MPP_PHYSICAL_OFFSET);
561
562	switch (pin->mode) {
563	case PM8XXX_MPP_DIGITAL:
564		seq_puts(s, " digital ");
565		if (pin->dtest) {
566			seq_printf(s, "dtest%d\n", pin->dtest);
567		} else if (pin->input && pin->output) {
568			if (pin->high_z)
569				seq_puts(s, "bi-dir high-z");
570			else
571				seq_printf(s, "bi-dir %dOhm", pin->pullup);
572		} else if (pin->input) {
573			if (pin->dtest)
574				seq_printf(s, "in dtest%d", pin->dtest);
575			else
576				seq_puts(s, "in gpio");
577		} else if (pin->output) {
578			seq_puts(s, "out ");
579
580			if (!pin->paired) {
581				seq_puts(s, str_high_low(pin->output_value));
582			} else {
583				seq_puts(s, pin->output_value ?
584					 "inverted" : "follow");
585			}
586		}
587		break;
588	case PM8XXX_MPP_ANALOG:
589		seq_puts(s, " analog ");
590		if (pin->output) {
591			seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
592			if (!pin->paired) {
593				seq_puts(s, str_high_low(pin->output_value));
594			} else {
595				seq_puts(s, pin->output_value ?
596					 "inverted" : "follow");
597			}
598		} else {
599			seq_printf(s, "input mux %s", amuxs[pin->amux]);
600		}
601		break;
602	case PM8XXX_MPP_SINK:
603		seq_printf(s, " sink %dmA ", pin->drive_strength);
604		if (pin->dtest) {
605			seq_printf(s, "dtest%d", pin->dtest);
606		} else {
607			if (!pin->paired) {
608				seq_puts(s, str_high_low(pin->output_value));
609			} else {
610				seq_puts(s, pin->output_value ?
611					 "inverted" : "follow");
612			}
613		}
614		break;
615	}
616}
617
618static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
619{
620	unsigned gpio = chip->base;
621	unsigned i;
622
623	for (i = 0; i < chip->ngpio; i++, gpio++) {
624		pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
625		seq_puts(s, "\n");
626	}
627}
628
629#else
630#define pm8xxx_mpp_dbg_show NULL
631#endif
632
633static const struct gpio_chip pm8xxx_mpp_template = {
634	.direction_input = pm8xxx_mpp_direction_input,
635	.direction_output = pm8xxx_mpp_direction_output,
636	.get = pm8xxx_mpp_get,
637	.set = pm8xxx_mpp_set,
638	.of_xlate = pm8xxx_mpp_of_xlate,
639	.dbg_show = pm8xxx_mpp_dbg_show,
640	.owner = THIS_MODULE,
641};
642
643static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
644			       struct pm8xxx_pin_data *pin)
645{
646	unsigned int val;
647	unsigned level;
648	unsigned ctrl;
649	unsigned type;
650	int ret;
651
652	ret = regmap_read(pctrl->regmap, pin->reg, &val);
653	if (ret) {
654		dev_err(pctrl->dev, "failed to read register\n");
655		return ret;
656	}
657
658	type = (val >> 5) & 7;
659	level = (val >> 2) & 7;
660	ctrl = (val) & 3;
661
662	switch (type) {
663	case PM8XXX_MPP_TYPE_D_INPUT:
664		pin->mode = PM8XXX_MPP_DIGITAL;
665		pin->input = true;
666		pin->power_source = level;
667		pin->dtest = ctrl;
668		break;
669	case PM8XXX_MPP_TYPE_D_OUTPUT:
670		pin->mode = PM8XXX_MPP_DIGITAL;
671		pin->output = true;
672		pin->power_source = level;
673		pin->output_value = !!(ctrl & BIT(0));
674		pin->paired = !!(ctrl & BIT(1));
675		break;
676	case PM8XXX_MPP_TYPE_D_BI_DIR:
677		pin->mode = PM8XXX_MPP_DIGITAL;
678		pin->input = true;
679		pin->output = true;
680		pin->power_source = level;
681		switch (ctrl) {
682		case PM8XXX_MPP_BI_PULLUP_1KOHM:
683			pin->pullup = 600;
684			break;
685		case PM8XXX_MPP_BI_PULLUP_OPEN:
686			pin->high_z = true;
687			break;
688		case PM8XXX_MPP_BI_PULLUP_10KOHM:
689			pin->pullup = 10000;
690			break;
691		case PM8XXX_MPP_BI_PULLUP_30KOHM:
692			pin->pullup = 30000;
693			break;
694		}
695		break;
696	case PM8XXX_MPP_TYPE_A_INPUT:
697		pin->mode = PM8XXX_MPP_ANALOG;
698		pin->input = true;
699		pin->amux = level;
700		break;
701	case PM8XXX_MPP_TYPE_A_OUTPUT:
702		pin->mode = PM8XXX_MPP_ANALOG;
703		pin->output = true;
704		pin->aout_level = level;
705		pin->output_value = !!(ctrl & BIT(0));
706		pin->paired = !!(ctrl & BIT(1));
707		break;
708	case PM8XXX_MPP_TYPE_SINK:
709		pin->mode = PM8XXX_MPP_SINK;
710		pin->drive_strength = 5 * (level + 1);
711		pin->output_value = !!(ctrl & BIT(0));
712		pin->paired = !!(ctrl & BIT(1));
713		break;
714	case PM8XXX_MPP_TYPE_DTEST_SINK:
715		pin->mode = PM8XXX_MPP_SINK;
716		pin->dtest = ctrl + 1;
717		pin->drive_strength = 5 * (level + 1);
718		break;
719	case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
720		pin->mode = PM8XXX_MPP_DIGITAL;
721		pin->power_source = level;
722		if (ctrl >= 1)
723			pin->dtest = ctrl;
724		break;
725	}
726
727	return 0;
728}
729
730static int pm8xxx_mpp_domain_translate(struct irq_domain *domain,
731				   struct irq_fwspec *fwspec,
732				   unsigned long *hwirq,
733				   unsigned int *type)
734{
735	struct pm8xxx_mpp *pctrl = container_of(domain->host_data,
736						 struct pm8xxx_mpp, chip);
737
738	if (fwspec->param_count != 2 ||
739	    fwspec->param[0] < PM8XXX_MPP_PHYSICAL_OFFSET ||
740	    fwspec->param[0] > pctrl->chip.ngpio)
741		return -EINVAL;
742
743	*hwirq = fwspec->param[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
744	*type = fwspec->param[1];
745
746	return 0;
747}
748
749static unsigned int pm8xxx_mpp_child_offset_to_irq(struct gpio_chip *chip,
750						   unsigned int offset)
751{
752	return offset + PM8XXX_MPP_PHYSICAL_OFFSET;
753}
754
755static int pm8821_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
756					    unsigned int child_hwirq,
757					    unsigned int child_type,
758					    unsigned int *parent_hwirq,
759					    unsigned int *parent_type)
760{
761	*parent_hwirq = child_hwirq + 24;
762	*parent_type = child_type;
763
764	return 0;
765}
766
767static int pm8xxx_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
768					    unsigned int child_hwirq,
769					    unsigned int child_type,
770					    unsigned int *parent_hwirq,
771					    unsigned int *parent_type)
772{
773	*parent_hwirq = child_hwirq + 0x80;
774	*parent_type = child_type;
775
776	return 0;
777}
778
779static void pm8xxx_mpp_irq_disable(struct irq_data *d)
780{
781	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
782
783	gpiochip_disable_irq(gc, irqd_to_hwirq(d));
784}
785
786static void pm8xxx_mpp_irq_enable(struct irq_data *d)
787{
788	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
789
790	gpiochip_enable_irq(gc, irqd_to_hwirq(d));
791}
792
793static const struct irq_chip pm8xxx_mpp_irq_chip = {
794	.name = "ssbi-mpp",
795	.irq_mask_ack = irq_chip_mask_ack_parent,
796	.irq_unmask = irq_chip_unmask_parent,
797	.irq_disable = pm8xxx_mpp_irq_disable,
798	.irq_enable = pm8xxx_mpp_irq_enable,
799	.irq_set_type = irq_chip_set_type_parent,
800	.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE |
801		IRQCHIP_IMMUTABLE,
802	GPIOCHIP_IRQ_RESOURCE_HELPERS,
803};
804
805static const struct of_device_id pm8xxx_mpp_of_match[] = {
806	{ .compatible = "qcom,pm8018-mpp", .data = (void *) 6 },
807	{ .compatible = "qcom,pm8038-mpp", .data = (void *) 6 },
808	{ .compatible = "qcom,pm8058-mpp", .data = (void *) 12 },
809	{ .compatible = "qcom,pm8821-mpp", .data = (void *) 4 },
810	{ .compatible = "qcom,pm8917-mpp", .data = (void *) 10 },
811	{ .compatible = "qcom,pm8921-mpp", .data = (void *) 12 },
812	{ },
813};
814MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
815
816static int pm8xxx_mpp_probe(struct platform_device *pdev)
817{
818	struct pm8xxx_pin_data *pin_data;
819	struct irq_domain *parent_domain;
820	struct device_node *parent_node;
821	struct pinctrl_pin_desc *pins;
822	struct gpio_irq_chip *girq;
823	struct pm8xxx_mpp *pctrl;
824	int ret;
825	int i;
826
827	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
828	if (!pctrl)
829		return -ENOMEM;
830
831	pctrl->dev = &pdev->dev;
832	pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);
833
834	pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
835	if (!pctrl->regmap) {
836		dev_err(&pdev->dev, "parent regmap unavailable\n");
837		return -ENXIO;
838	}
839
840	pctrl->desc = pm8xxx_pinctrl_desc;
841	pctrl->desc.npins = pctrl->npins;
842
843	pins = devm_kcalloc(&pdev->dev,
844			    pctrl->desc.npins,
845			    sizeof(struct pinctrl_pin_desc),
846			    GFP_KERNEL);
847	if (!pins)
848		return -ENOMEM;
849
850	pin_data = devm_kcalloc(&pdev->dev,
851				pctrl->desc.npins,
852				sizeof(struct pm8xxx_pin_data),
853				GFP_KERNEL);
854	if (!pin_data)
855		return -ENOMEM;
856
857	for (i = 0; i < pctrl->desc.npins; i++) {
858		pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
859
860		ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
861		if (ret)
862			return ret;
863
864		pins[i].number = i;
865		pins[i].name = pm8xxx_groups[i];
866		pins[i].drv_data = &pin_data[i];
867	}
868	pctrl->desc.pins = pins;
869
870	pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
871	pctrl->desc.custom_params = pm8xxx_mpp_bindings;
872#ifdef CONFIG_DEBUG_FS
873	pctrl->desc.custom_conf_items = pm8xxx_conf_items;
874#endif
875
876	pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
877	if (IS_ERR(pctrl->pctrl)) {
878		dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
879		return PTR_ERR(pctrl->pctrl);
880	}
881
882	pctrl->chip = pm8xxx_mpp_template;
883	pctrl->chip.base = -1;
884	pctrl->chip.parent = &pdev->dev;
885	pctrl->chip.of_gpio_n_cells = 2;
886	pctrl->chip.label = dev_name(pctrl->dev);
887	pctrl->chip.ngpio = pctrl->npins;
888
889	parent_node = of_irq_find_parent(pctrl->dev->of_node);
890	if (!parent_node)
891		return -ENXIO;
892
893	parent_domain = irq_find_host(parent_node);
894	of_node_put(parent_node);
895	if (!parent_domain)
896		return -ENXIO;
897
898	girq = &pctrl->chip.irq;
899	gpio_irq_chip_set_chip(girq, &pm8xxx_mpp_irq_chip);
900	girq->default_type = IRQ_TYPE_NONE;
901	girq->handler = handle_level_irq;
902	girq->fwnode = dev_fwnode(pctrl->dev);
903	girq->parent_domain = parent_domain;
904	if (of_device_is_compatible(pdev->dev.of_node, "qcom,pm8821-mpp"))
905		girq->child_to_parent_hwirq = pm8821_mpp_child_to_parent_hwirq;
906	else
907		girq->child_to_parent_hwirq = pm8xxx_mpp_child_to_parent_hwirq;
908	girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell;
909	girq->child_offset_to_irq = pm8xxx_mpp_child_offset_to_irq;
910	girq->child_irq_domain_ops.translate = pm8xxx_mpp_domain_translate;
911
912	ret = gpiochip_add_data(&pctrl->chip, pctrl);
913	if (ret) {
914		dev_err(&pdev->dev, "failed register gpiochip\n");
915		return ret;
916	}
917
918	ret = gpiochip_add_pin_range(&pctrl->chip,
919				     dev_name(pctrl->dev),
920				     0, 0, pctrl->chip.ngpio);
921	if (ret) {
922		dev_err(pctrl->dev, "failed to add pin range\n");
923		goto unregister_gpiochip;
924	}
925
926	platform_set_drvdata(pdev, pctrl);
927
928	dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
929
930	return 0;
931
932unregister_gpiochip:
933	gpiochip_remove(&pctrl->chip);
934
935	return ret;
936}
937
938static void pm8xxx_mpp_remove(struct platform_device *pdev)
939{
940	struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
941
942	gpiochip_remove(&pctrl->chip);
943}
944
945static struct platform_driver pm8xxx_mpp_driver = {
946	.driver = {
947		.name = "qcom-ssbi-mpp",
948		.of_match_table = pm8xxx_mpp_of_match,
949	},
950	.probe = pm8xxx_mpp_probe,
951	.remove = pm8xxx_mpp_remove,
952};
953
954module_platform_driver(pm8xxx_mpp_driver);
955
956MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
957MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
958MODULE_LICENSE("GPL v2");