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pinctrl-zynqmp.c
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linux-6.19.14/drivers/pinctrl/pinctrl-zynqmp.c
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * ZynqMP pin controller 4 * 5 * Copyright (C) 2020, 2021 Xilinx, Inc. 6 * 7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> 8 * Rajan Vaja <rajan.vaja@xilinx.com> 9 */ 10 11#include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 12 13#include <linux/bitfield.h> 14#include <linux/bitmap.h> 15#include <linux/init.h> 16#include <linux/module.h> 17#include <linux/of_address.h> 18#include <linux/platform_device.h> 19 20#include <linux/firmware/xlnx-zynqmp.h> 21 22#include <linux/pinctrl/pinconf-generic.h> 23#include <linux/pinctrl/pinconf.h> 24#include <linux/pinctrl/pinctrl.h> 25#include <linux/pinctrl/pinmux.h> 26 27#include "core.h" 28#include "pinctrl-utils.h" 29 30#define ZYNQMP_PIN_PREFIX "MIO" 31#define PINCTRL_GET_FUNC_NAME_RESP_LEN 16 32#define MAX_FUNC_NAME_LEN 16 33#define MAX_GROUP_PIN 50 34#define MAX_PIN_GROUPS 50 35#define END_OF_FUNCTIONS "END_OF_FUNCTIONS" 36#define NUM_GROUPS_PER_RESP 6 37 38#define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12 39#define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12 40#define NA_GROUP 0xFFFF 41#define RESERVED_GROUP 0xFFFE 42 43#define DRIVE_STRENGTH_2MA 2 44#define DRIVE_STRENGTH_4MA 4 45#define DRIVE_STRENGTH_8MA 8 46#define DRIVE_STRENGTH_12MA 12 47 48#define VERSAL_LPD_PIN_PREFIX "LPD_MIO" 49#define VERSAL_PMC_PIN_PREFIX "PMC_MIO" 50 51#define VERSAL_PINCTRL_ATTR_NODETYPE_MASK GENMASK(19, 14) 52#define VERSAL_PINCTRL_NODETYPE_LPD_MIO BIT(0) 53 54/** 55 * struct zynqmp_pmux_function - a pinmux function 56 * @name: Name of the pin mux function 57 * @groups: List of pin groups for this function 58 * @ngroups: Number of entries in @groups 59 * 60 * This structure holds information about pin control function 61 * and function group names supporting that function. 62 */ 63struct zynqmp_pmux_function { 64 char name[MAX_FUNC_NAME_LEN]; 65 const char * const *groups; 66 unsigned int ngroups; 67}; 68 69/** 70 * struct zynqmp_pinctrl - driver data 71 * @pctrl: Pin control device 72 * @groups: Pin groups 73 * @ngroups: Number of @groups 74 * @funcs: Pin mux functions 75 * @nfuncs: Number of @funcs 76 * 77 * This struct is stored as driver data and used to retrieve 78 * information regarding pin control functions, groups and 79 * group pins. 80 */ 81struct zynqmp_pinctrl { 82 struct pinctrl_dev *pctrl; 83 const struct zynqmp_pctrl_group *groups; 84 unsigned int ngroups; 85 const struct zynqmp_pmux_function *funcs; 86 unsigned int nfuncs; 87}; 88 89/** 90 * struct zynqmp_pctrl_group - Pin control group info 91 * @name: Group name 92 * @pins: Group pin numbers 93 * @npins: Number of pins in the group 94 */ 95struct zynqmp_pctrl_group { 96 const char *name; 97 unsigned int pins[MAX_GROUP_PIN]; 98 unsigned int npins; 99}; 100 101static struct pinctrl_desc zynqmp_desc; 102static u32 family_code; 103 104static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 105{ 106 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 107 108 return pctrl->ngroups + zynqmp_desc.npins; 109} 110 111static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev, 112 unsigned int selector) 113{ 114 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 115 116 if (selector < pctrl->ngroups) 117 return pctrl->groups[selector].name; 118 119 return zynqmp_desc.pins[selector - pctrl->ngroups].name; 120} 121 122static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 123 unsigned int selector, 124 const unsigned int **pins, 125 unsigned int *npins) 126{ 127 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 128 129 if (selector < pctrl->ngroups) { 130 *pins = pctrl->groups[selector].pins; 131 *npins = pctrl->groups[selector].npins; 132 } else { 133 *pins = &zynqmp_desc.pins[selector - pctrl->ngroups].number; 134 *npins = 1; 135 } 136 137 return 0; 138} 139 140static const struct pinctrl_ops zynqmp_pctrl_ops = { 141 .get_groups_count = zynqmp_pctrl_get_groups_count, 142 .get_group_name = zynqmp_pctrl_get_group_name, 143 .get_group_pins = zynqmp_pctrl_get_group_pins, 144 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 145 .dt_free_map = pinctrl_utils_free_map, 146}; 147 148static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev, 149 unsigned int pin) 150{ 151 int ret; 152 153 ret = zynqmp_pm_pinctrl_request(pin); 154 if (ret) { 155 dev_err(pctldev->dev, "request failed for pin %u\n", pin); 156 return ret; 157 } 158 159 return 0; 160} 161 162static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev) 163{ 164 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 165 166 return pctrl->nfuncs; 167} 168 169static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev, 170 unsigned int selector) 171{ 172 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 173 174 return pctrl->funcs[selector].name; 175} 176 177/** 178 * zynqmp_pmux_get_function_groups() - Get groups for the function 179 * @pctldev: Pincontrol device pointer. 180 * @selector: Function ID 181 * @groups: Group names. 182 * @num_groups: Number of function groups. 183 * 184 * Get function's group count and group names. 185 * 186 * Return: 0 187 */ 188static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev, 189 unsigned int selector, 190 const char * const **groups, 191 unsigned * const num_groups) 192{ 193 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 194 195 *groups = pctrl->funcs[selector].groups; 196 *num_groups = pctrl->funcs[selector].ngroups; 197 198 return 0; 199} 200 201/** 202 * zynqmp_pinmux_set_mux() - Set requested function for the group 203 * @pctldev: Pincontrol device pointer. 204 * @function: Function ID. 205 * @group: Group ID. 206 * 207 * Loop through all pins of the group and call firmware API 208 * to set requested function for all pins in the group. 209 * 210 * Return: 0 on success else error code. 211 */ 212static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev, 213 unsigned int function, 214 unsigned int group) 215{ 216 const unsigned int *pins; 217 unsigned int npins; 218 int ret, i; 219 220 zynqmp_pctrl_get_group_pins(pctldev, group, &pins, &npins); 221 for (i = 0; i < npins; i++) { 222 ret = zynqmp_pm_pinctrl_set_function(pins[i], function); 223 if (ret) { 224 dev_err(pctldev->dev, "set mux failed for pin %u\n", 225 pins[i]); 226 return ret; 227 } 228 } 229 230 return 0; 231} 232 233static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev, 234 unsigned int pin) 235{ 236 int ret; 237 238 ret = zynqmp_pm_pinctrl_release(pin); 239 if (ret) { 240 dev_err(pctldev->dev, "free pin failed for pin %u\n", 241 pin); 242 return ret; 243 } 244 245 return 0; 246} 247 248static const struct pinmux_ops zynqmp_pinmux_ops = { 249 .request = zynqmp_pinmux_request_pin, 250 .get_functions_count = zynqmp_pmux_get_functions_count, 251 .get_function_name = zynqmp_pmux_get_function_name, 252 .get_function_groups = zynqmp_pmux_get_function_groups, 253 .set_mux = zynqmp_pinmux_set_mux, 254 .free = zynqmp_pinmux_release_pin, 255}; 256 257/** 258 * zynqmp_pinconf_cfg_get() - get config value for the pin 259 * @pctldev: Pin control device pointer. 260 * @pin: Pin number. 261 * @config: Value of config param. 262 * 263 * Get value of the requested configuration parameter for the 264 * given pin. 265 * 266 * Return: 0 on success else error code. 267 */ 268static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, 269 unsigned int pin, 270 unsigned long *config) 271{ 272 unsigned int arg, param = pinconf_to_config_param(*config); 273 int ret; 274 275 switch (param) { 276 case PIN_CONFIG_SLEW_RATE: 277 param = PM_PINCTRL_CONFIG_SLEW_RATE; 278 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 279 break; 280 case PIN_CONFIG_BIAS_PULL_UP: 281 param = PM_PINCTRL_CONFIG_PULL_CTRL; 282 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 283 if (arg != PM_PINCTRL_BIAS_PULL_UP) 284 return -EINVAL; 285 286 arg = 1; 287 break; 288 case PIN_CONFIG_BIAS_PULL_DOWN: 289 param = PM_PINCTRL_CONFIG_PULL_CTRL; 290 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 291 if (arg != PM_PINCTRL_BIAS_PULL_DOWN) 292 return -EINVAL; 293 294 arg = 1; 295 break; 296 case PIN_CONFIG_BIAS_DISABLE: 297 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 298 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 299 if (arg != PM_PINCTRL_BIAS_DISABLE) 300 return -EINVAL; 301 302 arg = 1; 303 break; 304 case PIN_CONFIG_POWER_SOURCE: 305 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 306 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 307 break; 308 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 309 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 310 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 311 break; 312 case PIN_CONFIG_DRIVE_STRENGTH: 313 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 314 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 315 switch (arg) { 316 case PM_PINCTRL_DRIVE_STRENGTH_2MA: 317 arg = DRIVE_STRENGTH_2MA; 318 break; 319 case PM_PINCTRL_DRIVE_STRENGTH_4MA: 320 arg = DRIVE_STRENGTH_4MA; 321 break; 322 case PM_PINCTRL_DRIVE_STRENGTH_8MA: 323 arg = DRIVE_STRENGTH_8MA; 324 break; 325 case PM_PINCTRL_DRIVE_STRENGTH_12MA: 326 arg = DRIVE_STRENGTH_12MA; 327 break; 328 default: 329 /* Invalid drive strength */ 330 dev_warn(pctldev->dev, 331 "Invalid drive strength for pin %d\n", 332 pin); 333 return -EINVAL; 334 } 335 break; 336 default: 337 ret = -ENOTSUPP; 338 break; 339 } 340 341 if (ret) 342 return ret; 343 344 param = pinconf_to_config_param(*config); 345 *config = pinconf_to_config_packed(param, arg); 346 347 return 0; 348} 349 350/** 351 * zynqmp_pinconf_cfg_set() - Set requested config for the pin 352 * @pctldev: Pincontrol device pointer. 353 * @pin: Pin number. 354 * @configs: Configuration to set. 355 * @num_configs: Number of configurations. 356 * 357 * Loop through all configurations and call firmware API 358 * to set requested configurations for the pin. 359 * 360 * Return: 0 on success else error code. 361 */ 362static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev, 363 unsigned int pin, unsigned long *configs, 364 unsigned int num_configs) 365{ 366 int i, ret; 367 368 for (i = 0; i < num_configs; i++) { 369 unsigned int param = pinconf_to_config_param(configs[i]); 370 unsigned int arg = pinconf_to_config_argument(configs[i]); 371 unsigned int value; 372 373 switch (param) { 374 case PIN_CONFIG_SLEW_RATE: 375 param = PM_PINCTRL_CONFIG_SLEW_RATE; 376 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 377 break; 378 case PIN_CONFIG_BIAS_PULL_UP: 379 param = PM_PINCTRL_CONFIG_PULL_CTRL; 380 arg = PM_PINCTRL_BIAS_PULL_UP; 381 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 382 break; 383 case PIN_CONFIG_BIAS_PULL_DOWN: 384 param = PM_PINCTRL_CONFIG_PULL_CTRL; 385 arg = PM_PINCTRL_BIAS_PULL_DOWN; 386 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 387 break; 388 case PIN_CONFIG_BIAS_DISABLE: 389 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 390 arg = PM_PINCTRL_BIAS_DISABLE; 391 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 392 break; 393 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 394 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 395 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 396 break; 397 case PIN_CONFIG_DRIVE_STRENGTH: 398 switch (arg) { 399 case DRIVE_STRENGTH_2MA: 400 value = PM_PINCTRL_DRIVE_STRENGTH_2MA; 401 break; 402 case DRIVE_STRENGTH_4MA: 403 value = PM_PINCTRL_DRIVE_STRENGTH_4MA; 404 break; 405 case DRIVE_STRENGTH_8MA: 406 value = PM_PINCTRL_DRIVE_STRENGTH_8MA; 407 break; 408 case DRIVE_STRENGTH_12MA: 409 value = PM_PINCTRL_DRIVE_STRENGTH_12MA; 410 break; 411 default: 412 /* Invalid drive strength */ 413 dev_warn(pctldev->dev, 414 "Invalid drive strength for pin %d\n", 415 pin); 416 return -EINVAL; 417 } 418 419 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 420 ret = zynqmp_pm_pinctrl_set_config(pin, param, value); 421 break; 422 case PIN_CONFIG_POWER_SOURCE: 423 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 424 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); 425 426 if (arg != value) 427 dev_warn(pctldev->dev, 428 "Invalid IO Standard requested for pin %d\n", 429 pin); 430 431 break; 432 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 433 param = PM_PINCTRL_CONFIG_TRI_STATE; 434 arg = PM_PINCTRL_TRI_STATE_ENABLE; 435 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 436 break; 437 case PIN_CONFIG_MODE_LOW_POWER: 438 /* 439 * These cases are mentioned in dts but configurable 440 * registers are unknown. So falling through to ignore 441 * boot time warnings as of now. 442 */ 443 ret = 0; 444 break; 445 case PIN_CONFIG_OUTPUT_ENABLE: 446 param = PM_PINCTRL_CONFIG_TRI_STATE; 447 arg = PM_PINCTRL_TRI_STATE_DISABLE; 448 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 449 break; 450 default: 451 dev_warn(pctldev->dev, 452 "unsupported configuration parameter '%u'\n", 453 param); 454 ret = -ENOTSUPP; 455 break; 456 } 457 458 param = pinconf_to_config_param(configs[i]); 459 arg = pinconf_to_config_argument(configs[i]); 460 if (ret) 461 dev_warn(pctldev->dev, 462 "failed to set: pin %u param %u value %u\n", 463 pin, param, arg); 464 } 465 466 return 0; 467} 468 469/** 470 * zynqmp_pinconf_group_set() - Set requested config for the group 471 * @pctldev: Pincontrol device pointer. 472 * @selector: Group ID. 473 * @configs: Configuration to set. 474 * @num_configs: Number of configurations. 475 * 476 * Call function to set configs for each pin in the group. 477 * 478 * Return: 0 on success else error code. 479 */ 480static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev, 481 unsigned int selector, 482 unsigned long *configs, 483 unsigned int num_configs) 484{ 485 const unsigned int *pins; 486 unsigned int npins; 487 int i, ret; 488 489 zynqmp_pctrl_get_group_pins(pctldev, selector, &pins, &npins); 490 for (i = 0; i < npins; i++) { 491 ret = zynqmp_pinconf_cfg_set(pctldev, pins[i], configs, 492 num_configs); 493 if (ret) 494 return ret; 495 } 496 497 return 0; 498} 499 500static const struct pinconf_ops zynqmp_pinconf_ops = { 501 .is_generic = true, 502 .pin_config_get = zynqmp_pinconf_cfg_get, 503 .pin_config_set = zynqmp_pinconf_cfg_set, 504 .pin_config_group_set = zynqmp_pinconf_group_set, 505}; 506 507static struct pinctrl_desc zynqmp_desc = { 508 .name = "zynqmp_pinctrl", 509 .owner = THIS_MODULE, 510 .pctlops = &zynqmp_pctrl_ops, 511 .pmxops = &zynqmp_pinmux_ops, 512 .confops = &zynqmp_pinconf_ops, 513}; 514 515static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) 516{ 517 struct zynqmp_pm_query_data qdata = {0}; 518 u32 payload[PAYLOAD_ARG_CNT]; 519 int ret; 520 521 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS; 522 qdata.arg1 = fid; 523 qdata.arg2 = index; 524 525 ret = zynqmp_pm_query_data(qdata, payload); 526 if (ret) 527 return ret; 528 529 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN); 530 531 return 0; 532} 533 534static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups) 535{ 536 struct zynqmp_pm_query_data qdata = {0}; 537 u32 payload[PAYLOAD_ARG_CNT]; 538 int ret; 539 540 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS; 541 qdata.arg1 = fid; 542 543 ret = zynqmp_pm_query_data(qdata, payload); 544 if (ret) 545 return ret; 546 547 *ngroups = payload[1]; 548 549 return 0; 550} 551 552/** 553 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data 554 * @dev: Device pointer. 555 * @fid: Function ID. 556 * @func: Function data. 557 * @groups: Groups data. 558 * 559 * Query firmware to get group IDs for each function. Firmware returns 560 * group IDs. Based on the group index for the function, group names in 561 * the function are stored. For example, the first group in "eth0" function 562 * is named as "eth0_0" and the second group as "eth0_1" and so on. 563 * 564 * Based on the group ID received from the firmware, function stores name of 565 * the group for that group ID. For example, if "eth0" first group ID 566 * is x, groups[x] name will be stored as "eth0_0". 567 * 568 * Once done for each function, each function would have its group names 569 * and each group would also have their names. 570 * 571 * Return: 0 on success else error code. 572 */ 573static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, 574 struct zynqmp_pmux_function *func, 575 struct zynqmp_pctrl_group *groups) 576{ 577 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 578 const char **fgroups; 579 int ret, index, i, pin; 580 unsigned int npins; 581 unsigned long *used_pins __free(bitmap) = 582 bitmap_zalloc(zynqmp_desc.npins, GFP_KERNEL); 583 584 if (!used_pins) 585 return -ENOMEM; 586 587 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) { 588 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); 589 if (ret) 590 return ret; 591 592 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 593 if (resp[i] == NA_GROUP) 594 goto done; 595 596 if (resp[i] == RESERVED_GROUP) 597 continue; 598 599 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL, 600 "%s_%d_grp", 601 func->name, 602 index + i); 603 if (!groups[resp[i]].name) 604 return -ENOMEM; 605 606 for (pin = 0; pin < groups[resp[i]].npins; pin++) { 607 if (family_code == PM_ZYNQMP_FAMILY_CODE) 608 __set_bit(groups[resp[i]].pins[pin], used_pins); 609 else 610 __set_bit((u8)groups[resp[i]].pins[pin] - 1, used_pins); 611 } 612 } 613 } 614done: 615 npins = bitmap_weight(used_pins, zynqmp_desc.npins); 616 fgroups = devm_kcalloc(dev, size_add(func->ngroups, npins), 617 sizeof(*fgroups), GFP_KERNEL); 618 if (!fgroups) 619 return -ENOMEM; 620 621 for (i = 0; i < func->ngroups; i++) { 622 fgroups[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%d_grp", 623 func->name, i); 624 if (!fgroups[i]) 625 return -ENOMEM; 626 } 627 628 pin = 0; 629 for_each_set_bit(pin, used_pins, zynqmp_desc.npins) 630 fgroups[i++] = zynqmp_desc.pins[pin].name; 631 632 func->groups = fgroups; 633 func->ngroups += npins; 634 635 return 0; 636} 637 638static void zynqmp_pinctrl_get_function_name(u32 fid, char *name) 639{ 640 struct zynqmp_pm_query_data qdata = {0}; 641 u32 payload[PAYLOAD_ARG_CNT]; 642 643 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME; 644 qdata.arg1 = fid; 645 646 /* 647 * Name of the function is maximum 16 bytes and cannot 648 * accommodate the return value in SMC buffers, hence ignoring 649 * the return value for this specific qid. 650 */ 651 zynqmp_pm_query_data(qdata, payload); 652 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN); 653} 654 655static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs) 656{ 657 struct zynqmp_pm_query_data qdata = {0}; 658 u32 payload[PAYLOAD_ARG_CNT]; 659 int ret; 660 661 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS; 662 663 ret = zynqmp_pm_query_data(qdata, payload); 664 if (ret) 665 return ret; 666 667 *nfuncs = payload[1]; 668 669 return 0; 670} 671 672static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) 673{ 674 struct zynqmp_pm_query_data qdata = {0}; 675 u32 payload[PAYLOAD_ARG_CNT]; 676 int ret; 677 678 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS; 679 qdata.arg1 = pin; 680 qdata.arg2 = index; 681 682 ret = zynqmp_pm_query_data(qdata, payload); 683 if (ret) 684 return ret; 685 686 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN); 687 688 return 0; 689} 690 691static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, 692 unsigned int pin) 693{ 694 group->pins[group->npins++] = pin; 695} 696 697/** 698 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups 699 * @dev: Device pointer. 700 * @groups: Groups data. 701 * @pin: Pin number. 702 * 703 * Query firmware to get groups available for the given pin. 704 * Based on the firmware response(group IDs for the pin), add 705 * pin number to the respective group's pin array. 706 * 707 * Once all pins are queries, each group would have its number 708 * of pins and pin numbers data. 709 * 710 * Return: 0 on success else error code. 711 */ 712static int zynqmp_pinctrl_create_pin_groups(struct device *dev, 713 struct zynqmp_pctrl_group *groups, 714 unsigned int pin) 715{ 716 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 717 int ret, i, index = 0; 718 719 do { 720 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); 721 if (ret) 722 return ret; 723 724 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 725 if (resp[i] == NA_GROUP) 726 return ret; 727 728 if (resp[i] == RESERVED_GROUP) 729 continue; 730 731 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); 732 } 733 index += NUM_GROUPS_PER_RESP; 734 } while (index <= MAX_PIN_GROUPS); 735 736 return 0; 737} 738 739/** 740 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data 741 * @dev: Device pointer. 742 * @groups: Groups data. 743 * @ngroups: Number of groups. 744 * 745 * Prepare pin number and number of pins data for each pins. 746 * 747 * Return: 0 on success else error code. 748 */ 749static int zynqmp_pinctrl_prepare_group_pins(struct device *dev, 750 struct zynqmp_pctrl_group *groups, 751 unsigned int ngroups) 752{ 753 unsigned int pin; 754 int ret; 755 756 for (pin = 0; pin < zynqmp_desc.npins; pin++) { 757 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, zynqmp_desc.pins[pin].number); 758 if (ret) 759 return ret; 760 } 761 762 return 0; 763} 764 765/** 766 * zynqmp_pinctrl_prepare_function_info() - prepare function info 767 * @dev: Device pointer. 768 * @pctrl: Pin control driver data. 769 * 770 * Query firmware for functions, groups and pin information and 771 * prepare pin control driver data. 772 * 773 * Query number of functions and number of function groups (number 774 * of groups in the given function) to allocate required memory buffers 775 * for functions and groups. Once buffers are allocated to store 776 * functions and groups data, query and store required information 777 * (number of groups and group names for each function, number of 778 * pins and pin numbers for each group). 779 * 780 * Return: 0 on success else error code. 781 */ 782static int zynqmp_pinctrl_prepare_function_info(struct device *dev, 783 struct zynqmp_pinctrl *pctrl) 784{ 785 struct zynqmp_pmux_function *funcs; 786 struct zynqmp_pctrl_group *groups; 787 int ret, i; 788 789 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs); 790 if (ret) 791 return ret; 792 793 funcs = devm_kcalloc(dev, pctrl->nfuncs, sizeof(*funcs), GFP_KERNEL); 794 if (!funcs) 795 return -ENOMEM; 796 797 for (i = 0; i < pctrl->nfuncs; i++) { 798 zynqmp_pinctrl_get_function_name(i, funcs[i].name); 799 800 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups); 801 if (ret) 802 return ret; 803 804 pctrl->ngroups += funcs[i].ngroups; 805 } 806 807 groups = devm_kcalloc(dev, pctrl->ngroups, sizeof(*groups), GFP_KERNEL); 808 if (!groups) 809 return -ENOMEM; 810 811 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups); 812 if (ret) 813 return ret; 814 815 for (i = 0; i < pctrl->nfuncs; i++) { 816 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i], 817 groups); 818 if (ret) 819 return ret; 820 } 821 822 pctrl->funcs = funcs; 823 pctrl->groups = groups; 824 825 return 0; 826} 827 828static int zynqmp_pinctrl_get_num_pins(unsigned int *npins) 829{ 830 struct zynqmp_pm_query_data qdata = {0}; 831 u32 payload[PAYLOAD_ARG_CNT]; 832 int ret; 833 834 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS; 835 836 ret = zynqmp_pm_query_data(qdata, payload); 837 if (ret) 838 return ret; 839 840 *npins = payload[1]; 841 842 return 0; 843} 844 845/** 846 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info 847 * @dev: Device pointer. 848 * @zynqmp_pins: Pin information. 849 * @npins: Number of pins. 850 * 851 * Query number of pins information from firmware and prepare pin 852 * description containing pin number and pin name. 853 * 854 * Return: 0 on success else error code. 855 */ 856static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, 857 const struct pinctrl_pin_desc 858 **zynqmp_pins, 859 unsigned int *npins) 860{ 861 struct pinctrl_pin_desc *pins, *pin; 862 int ret; 863 int i; 864 865 ret = zynqmp_pinctrl_get_num_pins(npins); 866 if (ret) 867 return ret; 868 869 pins = devm_kcalloc(dev, *npins, sizeof(*pins), GFP_KERNEL); 870 if (!pins) 871 return -ENOMEM; 872 873 for (i = 0; i < *npins; i++) { 874 pin = &pins[i]; 875 pin->number = i; 876 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 877 ZYNQMP_PIN_PREFIX, i); 878 if (!pin->name) 879 return -ENOMEM; 880 } 881 882 *zynqmp_pins = pins; 883 884 return 0; 885} 886 887static int versal_pinctrl_get_attributes(u32 pin_idx, u32 *response) 888{ 889 struct zynqmp_pm_query_data qdata = {0}; 890 u32 payload[PAYLOAD_ARG_CNT]; 891 int ret; 892 893 qdata.qid = PM_QID_PINCTRL_GET_ATTRIBUTES; 894 qdata.arg1 = pin_idx; 895 896 ret = zynqmp_pm_query_data(qdata, payload); 897 if (ret) 898 return ret; 899 900 memcpy(response, &payload[1], sizeof(*response)); 901 902 return 0; 903} 904 905static int versal_pinctrl_prepare_pin_desc(struct device *dev, 906 const struct pinctrl_pin_desc **zynqmp_pins, 907 unsigned int *npins) 908{ 909 u32 lpd_mio_pins = 0, attr, nodetype; 910 struct pinctrl_pin_desc *pins, *pin; 911 int ret, i; 912 913 ret = zynqmp_pm_is_function_supported(PM_QUERY_DATA, PM_QID_PINCTRL_GET_ATTRIBUTES); 914 if (ret) 915 return ret; 916 917 ret = zynqmp_pinctrl_get_num_pins(npins); 918 if (ret) 919 return ret; 920 921 pins = devm_kcalloc(dev, *npins, sizeof(*pins), GFP_KERNEL); 922 if (!pins) 923 return -ENOMEM; 924 925 for (i = 0; i < *npins; i++) { 926 ret = versal_pinctrl_get_attributes(i, &attr); 927 if (ret) 928 return ret; 929 930 pin = &pins[i]; 931 pin->number = attr; 932 nodetype = FIELD_GET(VERSAL_PINCTRL_ATTR_NODETYPE_MASK, attr); 933 if (nodetype == VERSAL_PINCTRL_NODETYPE_LPD_MIO) { 934 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 935 VERSAL_LPD_PIN_PREFIX, i); 936 lpd_mio_pins++; 937 } else { 938 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 939 VERSAL_PMC_PIN_PREFIX, i - lpd_mio_pins); 940 } 941 942 if (!pin->name) 943 return -ENOMEM; 944 } 945 946 *zynqmp_pins = pins; 947 948 return 0; 949} 950 951static int zynqmp_pinctrl_probe(struct platform_device *pdev) 952{ 953 struct zynqmp_pinctrl *pctrl; 954 int ret; 955 956 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 957 if (!pctrl) 958 return -ENOMEM; 959 960 ret = zynqmp_pm_get_family_info(&family_code); 961 if (ret < 0) 962 return ret; 963 964 if (family_code == PM_ZYNQMP_FAMILY_CODE) { 965 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, &zynqmp_desc.pins, 966 &zynqmp_desc.npins); 967 } else { 968 ret = versal_pinctrl_prepare_pin_desc(&pdev->dev, &zynqmp_desc.pins, 969 &zynqmp_desc.npins); 970 } 971 972 if (ret) { 973 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret); 974 return ret; 975 } 976 977 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl); 978 if (ret) { 979 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret); 980 return ret; 981 } 982 983 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl); 984 if (IS_ERR(pctrl->pctrl)) 985 return PTR_ERR(pctrl->pctrl); 986 987 platform_set_drvdata(pdev, pctrl); 988 989 return ret; 990} 991 992static const struct of_device_id zynqmp_pinctrl_of_match[] = { 993 { .compatible = "xlnx,zynqmp-pinctrl" }, 994 { .compatible = "xlnx,versal-pinctrl" }, 995 { } 996}; 997MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match); 998 999static struct platform_driver zynqmp_pinctrl_driver = { 1000 .driver = { 1001 .name = "zynqmp-pinctrl", 1002 .of_match_table = zynqmp_pinctrl_of_match, 1003 }, 1004 .probe = zynqmp_pinctrl_probe, 1005}; 1006module_platform_driver(zynqmp_pinctrl_driver); 1007 1008MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>"); 1009MODULE_DESCRIPTION("ZynqMP Pin Controller Driver"); 1010MODULE_LICENSE("GPL v2");
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