pinctrl-tps6594.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Pinmux and GPIO driver for tps6594 PMIC
  4 *
  5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
  6 */
  7
  8#include <linux/gpio/driver.h>
  9#include <linux/gpio/regmap.h>
 10#include <linux/module.h>
 11#include <linux/pinctrl/pinmux.h>
 12#include <linux/platform_device.h>
 13#include <linux/mod_devicetable.h>
 14
 15#include <linux/mfd/tps6594.h>
 16
 17#define TPS6594_PINCTRL_GPIO_FUNCTION 0
 18#define TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1
 19#define TPS6594_PINCTRL_TRIG_WDOG_FUNCTION 1
 20#define TPS6594_PINCTRL_CLK32KOUT_FUNCTION 1
 21#define TPS6594_PINCTRL_SCLK_SPMI_FUNCTION 1
 22#define TPS6594_PINCTRL_SDATA_SPMI_FUNCTION 1
 23#define TPS6594_PINCTRL_NERR_MCU_FUNCTION 1
 24#define TPS6594_PINCTRL_PDOG_FUNCTION 1
 25#define TPS6594_PINCTRL_SYNCCLKIN_FUNCTION 1
 26#define TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION 2
 27#define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION 2
 28#define TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 2
 29#define TPS6594_PINCTRL_NERR_SOC_FUNCTION 2
 30#define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION 3
 31#define TPS6594_PINCTRL_NSLEEP1_FUNCTION 4
 32#define TPS6594_PINCTRL_NSLEEP2_FUNCTION 5
 33#define TPS6594_PINCTRL_WKUP1_FUNCTION 6
 34#define TPS6594_PINCTRL_WKUP2_FUNCTION 7
 35
 36/* Special muxval for recalcitrant pins */
 37#define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8 2
 38#define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8 3
 39#define TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9 3
 40
 41/* TPS65224 pin muxval */
 42#define TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 1
 43#define TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1
 44#define TPS65224_PINCTRL_VMON1_FUNCTION 1
 45#define TPS65224_PINCTRL_VMON2_FUNCTION 1
 46#define TPS65224_PINCTRL_WKUP_FUNCTION 1
 47#define TPS65224_PINCTRL_NSLEEP2_FUNCTION 2
 48#define TPS65224_PINCTRL_NSLEEP1_FUNCTION 2
 49#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION 2
 50#define TPS65224_PINCTRL_NERR_MCU_FUNCTION 2
 51#define TPS65224_PINCTRL_NINT_FUNCTION 3
 52#define TPS65224_PINCTRL_TRIG_WDOG_FUNCTION 3
 53#define TPS65224_PINCTRL_PB_FUNCTION 3
 54#define TPS65224_PINCTRL_ADC_IN_FUNCTION 3
 55
 56/* TPS65224 Special muxval for recalcitrant pins */
 57#define TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5 1
 58#define TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5 4
 59#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5 3
 60
 61#define TPS6594_OFFSET_GPIO_SEL 5
 62
 63#define TPS65224_NGPIO_PER_REG 6
 64#define TPS6594_NGPIO_PER_REG  8
 65
 66#define FUNCTION(dev_name, fname, v)							\
 67{											\
 68	.pinfunction = PINCTRL_PINFUNCTION(#fname,					\
 69					dev_name##_##fname##_func_group_names,		\
 70					ARRAY_SIZE(dev_name##_##fname##_func_group_names)),\
 71	.muxval = v,									\
 72}
 73
 74static const struct pinctrl_pin_desc tps6594_pins[] = {
 75	PINCTRL_PIN(0, "GPIO0"),   PINCTRL_PIN(1, "GPIO1"),
 76	PINCTRL_PIN(2, "GPIO2"),   PINCTRL_PIN(3, "GPIO3"),
 77	PINCTRL_PIN(4, "GPIO4"),   PINCTRL_PIN(5, "GPIO5"),
 78	PINCTRL_PIN(6, "GPIO6"),   PINCTRL_PIN(7, "GPIO7"),
 79	PINCTRL_PIN(8, "GPIO8"),   PINCTRL_PIN(9, "GPIO9"),
 80	PINCTRL_PIN(10, "GPIO10"),
 81};
 82
 83static const char *const tps6594_gpio_func_group_names[] = {
 84	"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
 85	"GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
 86};
 87
 88static const char *const tps6594_nsleep1_func_group_names[] = {
 89	"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
 90	"GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
 91};
 92
 93static const char *const tps6594_nsleep2_func_group_names[] = {
 94	"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
 95	"GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
 96};
 97
 98static const char *const tps6594_wkup1_func_group_names[] = {
 99	"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
100	"GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
101};
102
103static const char *const tps6594_wkup2_func_group_names[] = {
104	"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
105	"GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
106};
107
108static const char *const tps6594_scl_i2c2_cs_spi_func_group_names[] = {
109	"GPIO0",
110	"GPIO1",
111};
112
113static const char *const tps6594_nrstout_soc_func_group_names[] = {
114	"GPIO0",
115	"GPIO10",
116};
117
118static const char *const tps6594_trig_wdog_func_group_names[] = {
119	"GPIO1",
120	"GPIO10",
121};
122
123static const char *const tps6594_sda_i2c2_sdo_spi_func_group_names[] = {
124	"GPIO1",
125};
126
127static const char *const tps6594_clk32kout_func_group_names[] = {
128	"GPIO2",
129	"GPIO3",
130	"GPIO7",
131};
132
133static const char *const tps6594_nerr_soc_func_group_names[] = {
134	"GPIO2",
135};
136
137static const char *const tps6594_sclk_spmi_func_group_names[] = {
138	"GPIO4",
139};
140
141static const char *const tps6594_sdata_spmi_func_group_names[] = {
142	"GPIO5",
143};
144
145static const char *const tps6594_nerr_mcu_func_group_names[] = {
146	"GPIO6",
147};
148
149static const char *const tps6594_syncclkout_func_group_names[] = {
150	"GPIO7",
151	"GPIO9",
152};
153
154static const char *const tps6594_disable_wdog_func_group_names[] = {
155	"GPIO7",
156	"GPIO8",
157};
158
159static const char *const tps6594_pdog_func_group_names[] = {
160	"GPIO8",
161};
162
163static const char *const tps6594_syncclkin_func_group_names[] = {
164	"GPIO9",
165};
166
167static const struct pinctrl_pin_desc tps65224_pins[] = {
168	PINCTRL_PIN(0, "GPIO0"),   PINCTRL_PIN(1, "GPIO1"),
169	PINCTRL_PIN(2, "GPIO2"),   PINCTRL_PIN(3, "GPIO3"),
170	PINCTRL_PIN(4, "GPIO4"),   PINCTRL_PIN(5, "GPIO5"),
171};
172
173static const char *const tps65224_gpio_func_group_names[] = {
174	"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
175};
176
177static const char *const tps65224_sda_i2c2_sdo_spi_func_group_names[] = {
178	"GPIO0",
179};
180
181static const char *const tps65224_nsleep2_func_group_names[] = {
182	"GPIO0", "GPIO5",
183};
184
185static const char *const tps65224_nint_func_group_names[] = {
186	"GPIO0",
187};
188
189static const char *const tps65224_scl_i2c2_cs_spi_func_group_names[] = {
190	"GPIO1",
191};
192
193static const char *const tps65224_nsleep1_func_group_names[] = {
194	"GPIO1", "GPIO2", "GPIO3",
195};
196
197static const char *const tps65224_trig_wdog_func_group_names[] = {
198	"GPIO1",
199};
200
201static const char *const tps65224_vmon1_func_group_names[] = {
202	"GPIO2",
203};
204
205static const char *const tps65224_pb_func_group_names[] = {
206	"GPIO2",
207};
208
209static const char *const tps65224_vmon2_func_group_names[] = {
210	"GPIO3",
211};
212
213static const char *const tps65224_adc_in_func_group_names[] = {
214	"GPIO3", "GPIO4",
215};
216
217static const char *const tps65224_wkup_func_group_names[] = {
218	"GPIO4", "GPIO5",
219};
220
221static const char *const tps65224_syncclkin_func_group_names[] = {
222	"GPIO4", "GPIO5",
223};
224
225static const char *const tps65224_nerr_mcu_func_group_names[] = {
226	"GPIO5",
227};
228
229static const char *const tps652g1_cs_spi_func_group_names[] = {
230	"GPIO1",
231};
232
233struct tps6594_pinctrl_function {
234	struct pinfunction pinfunction;
235	u8 muxval;
236};
237
238struct muxval_remap {
239	unsigned int group;
240	u8 muxval;
241	u8 remap;
242};
243
244static struct muxval_remap tps65224_muxval_remap[] = {
245	{5, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5},
246	{5, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5},
247	{5, TPS65224_PINCTRL_NSLEEP2_FUNCTION, TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5},
248};
249
250static struct muxval_remap tps6594_muxval_remap[] = {
251	{8, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8},
252	{8, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8},
253	{9, TPS6594_PINCTRL_CLK32KOUT_FUNCTION, TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9},
254};
255
256static const struct tps6594_pinctrl_function pinctrl_functions[] = {
257	FUNCTION(tps6594, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),
258	FUNCTION(tps6594, nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION),
259	FUNCTION(tps6594, nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION),
260	FUNCTION(tps6594, wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION),
261	FUNCTION(tps6594, wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION),
262	FUNCTION(tps6594, scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),
263	FUNCTION(tps6594, nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION),
264	FUNCTION(tps6594, trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION),
265	FUNCTION(tps6594, sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),
266	FUNCTION(tps6594, clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION),
267	FUNCTION(tps6594, nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION),
268	FUNCTION(tps6594, sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION),
269	FUNCTION(tps6594, sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION),
270	FUNCTION(tps6594, nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION),
271	FUNCTION(tps6594, syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION),
272	FUNCTION(tps6594, disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION),
273	FUNCTION(tps6594, pdog, TPS6594_PINCTRL_PDOG_FUNCTION),
274	FUNCTION(tps6594, syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION),
275};
276
277static const struct tps6594_pinctrl_function tps65224_pinctrl_functions[] = {
278	FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),
279	FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),
280	FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION),
281	FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION),
282	FUNCTION(tps65224, scl_i2c2_cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),
283	FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION),
284	FUNCTION(tps65224, trig_wdog, TPS65224_PINCTRL_TRIG_WDOG_FUNCTION),
285	FUNCTION(tps65224, vmon1, TPS65224_PINCTRL_VMON1_FUNCTION),
286	FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION),
287	FUNCTION(tps65224, vmon2, TPS65224_PINCTRL_VMON2_FUNCTION),
288	FUNCTION(tps65224, adc_in, TPS65224_PINCTRL_ADC_IN_FUNCTION),
289	FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION),
290	FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION),
291	FUNCTION(tps65224, nerr_mcu, TPS65224_PINCTRL_NERR_MCU_FUNCTION),
292};
293
294static const struct tps6594_pinctrl_function tps652g1_pinctrl_functions[] = {
295	FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),
296	FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),
297	FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION),
298	FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION),
299	FUNCTION(tps652g1, cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),
300	FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION),
301	FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION),
302	FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION),
303	FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION),
304};
305
306struct tps6594_pinctrl {
307	struct tps6594 *tps;
308	struct gpio_regmap *gpio_regmap;
309	struct pinctrl_dev *pctl_dev;
310	const struct tps6594_pinctrl_function *funcs;
311	const struct pinctrl_pin_desc *pins;
312	int func_cnt;
313	int num_pins;
314	u8 mux_sel_mask;
315	unsigned int remap_cnt;
316	struct muxval_remap *remap;
317};
318
319static struct tps6594_pinctrl tps652g1_template_pinctrl = {
320	.funcs = tps652g1_pinctrl_functions,
321	.func_cnt = ARRAY_SIZE(tps652g1_pinctrl_functions),
322	.pins = tps65224_pins,
323	.num_pins = ARRAY_SIZE(tps65224_pins),
324	.mux_sel_mask = TPS65224_MASK_GPIO_SEL,
325	.remap = tps65224_muxval_remap,
326	.remap_cnt = ARRAY_SIZE(tps65224_muxval_remap),
327};
328
329static struct tps6594_pinctrl tps65224_template_pinctrl = {
330	.funcs = tps65224_pinctrl_functions,
331	.func_cnt = ARRAY_SIZE(tps65224_pinctrl_functions),
332	.pins = tps65224_pins,
333	.num_pins = ARRAY_SIZE(tps65224_pins),
334	.mux_sel_mask = TPS65224_MASK_GPIO_SEL,
335	.remap = tps65224_muxval_remap,
336	.remap_cnt = ARRAY_SIZE(tps65224_muxval_remap),
337};
338
339static struct tps6594_pinctrl tps6594_template_pinctrl = {
340	.funcs = pinctrl_functions,
341	.func_cnt = ARRAY_SIZE(pinctrl_functions),
342	.pins = tps6594_pins,
343	.num_pins = ARRAY_SIZE(tps6594_pins),
344	.mux_sel_mask = TPS6594_MASK_GPIO_SEL,
345	.remap = tps6594_muxval_remap,
346	.remap_cnt = ARRAY_SIZE(tps6594_muxval_remap),
347};
348
349static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio,
350				     unsigned int base, unsigned int offset,
351				     unsigned int *reg, unsigned int *mask)
352{
353	unsigned int line = offset % 8;
354	unsigned int stride = offset / 8;
355
356	switch (base) {
357	case TPS6594_REG_GPIOX_CONF(0):
358		*reg = TPS6594_REG_GPIOX_CONF(offset);
359		*mask = TPS6594_BIT_GPIO_DIR;
360		return 0;
361	case TPS6594_REG_GPIO_IN_1:
362	case TPS6594_REG_GPIO_OUT_1:
363		*reg = base + stride;
364		*mask = BIT(line);
365		return 0;
366	default:
367		return -EINVAL;
368	}
369}
370
371static int tps6594_pmx_func_cnt(struct pinctrl_dev *pctldev)
372{
373	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
374
375	return pinctrl->func_cnt;
376}
377
378static const char *tps6594_pmx_func_name(struct pinctrl_dev *pctldev,
379					 unsigned int selector)
380{
381	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
382
383	return pinctrl->funcs[selector].pinfunction.name;
384}
385
386static int tps6594_pmx_func_groups(struct pinctrl_dev *pctldev,
387				   unsigned int selector,
388				   const char *const **groups,
389				   unsigned int *num_groups)
390{
391	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
392
393	*groups = pinctrl->funcs[selector].pinfunction.groups;
394	*num_groups = pinctrl->funcs[selector].pinfunction.ngroups;
395
396	return 0;
397}
398
399static int tps6594_pmx_set(struct tps6594_pinctrl *pinctrl, unsigned int pin,
400			   u8 muxval)
401{
402	u8 mux_sel_val = muxval << TPS6594_OFFSET_GPIO_SEL;
403	u8 mux_sel_mask = pinctrl->mux_sel_mask;
404
405	if (pinctrl->tps->chip_id == TPS65224 && pin == 5) {
406		/* GPIO6 has a different mask in TPS65224*/
407		mux_sel_mask = TPS65224_MASK_GPIO_SEL_GPIO6;
408	}
409
410	return regmap_update_bits(pinctrl->tps->regmap,
411				  TPS6594_REG_GPIOX_CONF(pin),
412				  mux_sel_mask, mux_sel_val);
413}
414
415static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev,
416			       unsigned int function, unsigned int group)
417{
418	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
419	u8 muxval = pinctrl->funcs[function].muxval;
420	unsigned int remap_cnt = pinctrl->remap_cnt;
421	struct muxval_remap *remap = pinctrl->remap;
422
423	for (unsigned int i = 0; i < remap_cnt; i++) {
424		if (group == remap[i].group && muxval == remap[i].muxval) {
425			muxval = remap[i].remap;
426			break;
427		}
428	}
429
430	return tps6594_pmx_set(pinctrl, group, muxval);
431}
432
433static int tps6594_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
434					  struct pinctrl_gpio_range *range,
435					  unsigned int offset, bool input)
436{
437	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
438	u8 muxval = pinctrl->funcs[TPS6594_PINCTRL_GPIO_FUNCTION].muxval;
439
440	return tps6594_pmx_set(pinctrl, offset, muxval);
441}
442
443static const struct pinmux_ops tps6594_pmx_ops = {
444	.get_functions_count = tps6594_pmx_func_cnt,
445	.get_function_name = tps6594_pmx_func_name,
446	.get_function_groups = tps6594_pmx_func_groups,
447	.set_mux = tps6594_pmx_set_mux,
448	.gpio_set_direction = tps6594_pmx_gpio_set_direction,
449	.strict = true,
450};
451
452static int tps6594_groups_cnt(struct pinctrl_dev *pctldev)
453{
454	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
455
456	return pinctrl->num_pins;
457}
458
459static int tps6594_group_pins(struct pinctrl_dev *pctldev,
460			      unsigned int selector, const unsigned int **pins,
461			      unsigned int *num_pins)
462{
463	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
464
465	*pins = &pinctrl->pins[selector].number;
466	*num_pins = 1;
467
468	return 0;
469}
470
471static const char *tps6594_group_name(struct pinctrl_dev *pctldev,
472				      unsigned int selector)
473{
474	struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
475
476	return pinctrl->pins[selector].name;
477}
478
479static const struct pinctrl_ops tps6594_pctrl_ops = {
480	.dt_node_to_map = pinconf_generic_dt_node_to_map_group,
481	.dt_free_map = pinconf_generic_dt_free_map,
482	.get_groups_count = tps6594_groups_cnt,
483	.get_group_name = tps6594_group_name,
484	.get_group_pins = tps6594_group_pins,
485};
486
487static int tps6594_pinctrl_probe(struct platform_device *pdev)
488{
489	struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent);
490	struct device *dev = &pdev->dev;
491	struct tps6594_pinctrl *pinctrl;
492	struct pinctrl_desc *pctrl_desc;
493	struct gpio_regmap_config config = {};
494
495	pctrl_desc = devm_kzalloc(dev, sizeof(*pctrl_desc), GFP_KERNEL);
496	if (!pctrl_desc)
497		return -ENOMEM;
498
499	pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL);
500	if (!pinctrl)
501		return -ENOMEM;
502
503	switch (tps->chip_id) {
504	case TPS652G1:
505		pctrl_desc->pins = tps65224_pins;
506		pctrl_desc->npins = ARRAY_SIZE(tps65224_pins);
507
508		*pinctrl = tps652g1_template_pinctrl;
509
510		config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names);
511		config.ngpio_per_reg = TPS65224_NGPIO_PER_REG;
512		break;
513	case TPS65224:
514		pctrl_desc->pins = tps65224_pins;
515		pctrl_desc->npins = ARRAY_SIZE(tps65224_pins);
516
517		*pinctrl = tps65224_template_pinctrl;
518
519		config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names);
520		config.ngpio_per_reg = TPS65224_NGPIO_PER_REG;
521		break;
522	case TPS6593:
523	case TPS6594:
524	case LP8764:
525		pctrl_desc->pins = tps6594_pins;
526		pctrl_desc->npins = ARRAY_SIZE(tps6594_pins);
527
528		*pinctrl = tps6594_template_pinctrl;
529
530		config.ngpio = ARRAY_SIZE(tps6594_gpio_func_group_names);
531		config.ngpio_per_reg = TPS6594_NGPIO_PER_REG;
532		break;
533	default:
534		break;
535	}
536
537	pinctrl->tps = tps;
538
539	pctrl_desc->name = dev_name(dev);
540	pctrl_desc->owner = THIS_MODULE;
541	pctrl_desc->pctlops = &tps6594_pctrl_ops;
542	pctrl_desc->pmxops = &tps6594_pmx_ops;
543
544	config.parent = tps->dev;
545	config.regmap = tps->regmap;
546	config.reg_dat_base = TPS6594_REG_GPIO_IN_1;
547	config.reg_set_base = TPS6594_REG_GPIO_OUT_1;
548	config.reg_dir_out_base = TPS6594_REG_GPIOX_CONF(0);
549	config.reg_mask_xlate = tps6594_gpio_regmap_xlate;
550
551	pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl);
552	if (IS_ERR(pinctrl->pctl_dev))
553		return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev),
554				     "Couldn't register pinctrl driver\n");
555
556	pinctrl->gpio_regmap = devm_gpio_regmap_register(dev, &config);
557	if (IS_ERR(pinctrl->gpio_regmap))
558		return dev_err_probe(dev, PTR_ERR(pinctrl->gpio_regmap),
559				     "Couldn't register gpio_regmap driver\n");
560
561	return 0;
562}
563
564static const struct platform_device_id tps6594_pinctrl_id_table[] = {
565	{ "tps6594-pinctrl", },
566	{}
567};
568MODULE_DEVICE_TABLE(platform, tps6594_pinctrl_id_table);
569
570static struct platform_driver tps6594_pinctrl_driver = {
571	.probe = tps6594_pinctrl_probe,
572	.driver = {
573		.name = "tps6594-pinctrl",
574	},
575	.id_table = tps6594_pinctrl_id_table,
576};
577module_platform_driver(tps6594_pinctrl_driver);
578
579MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>");
580MODULE_AUTHOR("Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>");
581MODULE_DESCRIPTION("TPS6594 pinctrl and GPIO driver");
582MODULE_LICENSE("GPL");