pinctrl-da9062.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Dialog DA9062 pinctrl and GPIO driver.
  4 * Based on DA9055 GPIO driver.
  5 *
  6 * TODO:
  7 *   - add pinmux and pinctrl support (gpio alternate mode)
  8 *
  9 * Documents:
 10 * [1] https://www.dialog-semiconductor.com/sites/default/files/da9062_datasheet_3v6.pdf
 11 *
 12 * Copyright (C) 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
 13 */
 14#include <linux/bits.h>
 15#include <linux/module.h>
 16#include <linux/platform_device.h>
 17#include <linux/property.h>
 18#include <linux/regmap.h>
 19
 20#include <linux/gpio/consumer.h>
 21#include <linux/gpio/driver.h>
 22
 23#include <linux/mfd/da9062/core.h>
 24#include <linux/mfd/da9062/registers.h>
 25
 26#define DA9062_TYPE(offset)		(4 * (offset % 2))
 27#define DA9062_PIN_SHIFT(offset)	(4 * (offset % 2))
 28#define DA9062_PIN_ALTERNATE		0x00 /* gpio alternate mode */
 29#define DA9062_PIN_GPI			0x01 /* gpio in */
 30#define DA9062_PIN_GPO_OD		0x02 /* gpio out open-drain */
 31#define DA9062_PIN_GPO_PP		0x03 /* gpio out push-pull */
 32#define DA9062_GPIO_NUM			5
 33
 34struct da9062_pctl {
 35	struct da9062 *da9062;
 36	struct gpio_chip gc;
 37	unsigned int pin_config[DA9062_GPIO_NUM];
 38};
 39
 40static int da9062_pctl_get_pin_mode(struct da9062_pctl *pctl,
 41				    unsigned int offset)
 42{
 43	struct regmap *regmap = pctl->da9062->regmap;
 44	int ret, val;
 45
 46	ret = regmap_read(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), &val);
 47	if (ret < 0)
 48		return ret;
 49
 50	val >>= DA9062_PIN_SHIFT(offset);
 51	val &= DA9062AA_GPIO0_PIN_MASK;
 52
 53	return val;
 54}
 55
 56static int da9062_pctl_set_pin_mode(struct da9062_pctl *pctl,
 57				    unsigned int offset, unsigned int mode_req)
 58{
 59	struct regmap *regmap = pctl->da9062->regmap;
 60	unsigned int mode = mode_req;
 61	unsigned int mask;
 62	int ret;
 63
 64	mode &= DA9062AA_GPIO0_PIN_MASK;
 65	mode <<= DA9062_PIN_SHIFT(offset);
 66	mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset);
 67
 68	ret = regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
 69				 mask, mode);
 70	if (!ret)
 71		pctl->pin_config[offset] = mode_req;
 72
 73	return ret;
 74}
 75
 76static int da9062_gpio_get(struct gpio_chip *gc, unsigned int offset)
 77{
 78	struct da9062_pctl *pctl = gpiochip_get_data(gc);
 79	struct regmap *regmap = pctl->da9062->regmap;
 80	int gpio_mode, val;
 81	int ret;
 82
 83	gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
 84	if (gpio_mode < 0)
 85		return gpio_mode;
 86
 87	switch (gpio_mode) {
 88	case DA9062_PIN_ALTERNATE:
 89		return -ENOTSUPP;
 90	case DA9062_PIN_GPI:
 91		ret = regmap_read(regmap, DA9062AA_STATUS_B, &val);
 92		if (ret < 0)
 93			return ret;
 94		break;
 95	case DA9062_PIN_GPO_OD:
 96	case DA9062_PIN_GPO_PP:
 97		ret = regmap_read(regmap, DA9062AA_GPIO_MODE0_4, &val);
 98		if (ret < 0)
 99			return ret;
100	}
101
102	return !!(val & BIT(offset));
103}
104
105static int da9062_gpio_set(struct gpio_chip *gc, unsigned int offset,
106			   int value)
107{
108	struct da9062_pctl *pctl = gpiochip_get_data(gc);
109	struct regmap *regmap = pctl->da9062->regmap;
110
111	return regmap_update_bits(regmap, DA9062AA_GPIO_MODE0_4, BIT(offset),
112				  value << offset);
113}
114
115static int da9062_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
116{
117	struct da9062_pctl *pctl = gpiochip_get_data(gc);
118	int gpio_mode;
119
120	gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
121	if (gpio_mode < 0)
122		return gpio_mode;
123
124	switch (gpio_mode) {
125	case DA9062_PIN_ALTERNATE:
126		return -ENOTSUPP;
127	case DA9062_PIN_GPI:
128		return GPIO_LINE_DIRECTION_IN;
129	case DA9062_PIN_GPO_OD:
130	case DA9062_PIN_GPO_PP:
131		return GPIO_LINE_DIRECTION_OUT;
132	}
133
134	return -EINVAL;
135}
136
137static int da9062_gpio_direction_input(struct gpio_chip *gc,
138				       unsigned int offset)
139{
140	struct da9062_pctl *pctl = gpiochip_get_data(gc);
141	struct regmap *regmap = pctl->da9062->regmap;
142	struct gpio_desc *desc = gpio_device_get_desc(gc->gpiodev, offset);
143	unsigned int gpi_type;
144	int ret;
145
146	ret = da9062_pctl_set_pin_mode(pctl, offset, DA9062_PIN_GPI);
147	if (ret)
148		return ret;
149
150	/*
151	 * If the gpio is active low we should set it in hw too. No worries
152	 * about gpio_get() because we read and return the gpio-level. So the
153	 * gpiolib active_low handling is still correct.
154	 *
155	 * 0 - active low, 1 - active high
156	 */
157	gpi_type = !gpiod_is_active_low(desc);
158
159	return regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
160				DA9062AA_GPIO0_TYPE_MASK << DA9062_TYPE(offset),
161				gpi_type << DA9062_TYPE(offset));
162}
163
164static int da9062_gpio_direction_output(struct gpio_chip *gc,
165					unsigned int offset, int value)
166{
167	struct da9062_pctl *pctl = gpiochip_get_data(gc);
168	unsigned int pin_config = pctl->pin_config[offset];
169	int ret;
170
171	ret = da9062_pctl_set_pin_mode(pctl, offset, pin_config);
172	if (ret)
173		return ret;
174
175	return da9062_gpio_set(gc, offset, value);
176}
177
178static int da9062_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
179				  unsigned long config)
180{
181	struct da9062_pctl *pctl = gpiochip_get_data(gc);
182	struct regmap *regmap = pctl->da9062->regmap;
183	int gpio_mode;
184
185	/*
186	 * We need to meet the following restrictions [1, Figure 18]:
187	 * - PIN_CONFIG_BIAS_PULL_DOWN -> only allowed if the pin is used as
188	 *				  gpio input
189	 * - PIN_CONFIG_BIAS_PULL_UP   -> only allowed if the pin is used as
190	 *				  gpio output open-drain.
191	 */
192
193	switch (pinconf_to_config_param(config)) {
194	case PIN_CONFIG_BIAS_DISABLE:
195		return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
196					  BIT(offset), 0);
197	case PIN_CONFIG_BIAS_PULL_DOWN:
198		gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
199		if (gpio_mode < 0)
200			return -EINVAL;
201		else if (gpio_mode != DA9062_PIN_GPI)
202			return -ENOTSUPP;
203		return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
204					  BIT(offset), BIT(offset));
205	case PIN_CONFIG_BIAS_PULL_UP:
206		gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
207		if (gpio_mode < 0)
208			return -EINVAL;
209		else if (gpio_mode != DA9062_PIN_GPO_OD)
210			return -ENOTSUPP;
211		return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
212					  BIT(offset), BIT(offset));
213	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
214		return da9062_pctl_set_pin_mode(pctl, offset,
215						DA9062_PIN_GPO_OD);
216	case PIN_CONFIG_DRIVE_PUSH_PULL:
217		return da9062_pctl_set_pin_mode(pctl, offset,
218						DA9062_PIN_GPO_PP);
219	default:
220		return -ENOTSUPP;
221	}
222}
223
224static int da9062_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
225{
226	struct da9062_pctl *pctl = gpiochip_get_data(gc);
227	struct da9062 *da9062 = pctl->da9062;
228
229	return regmap_irq_get_virq(da9062->regmap_irq,
230				   DA9062_IRQ_GPI0 + offset);
231}
232
233static const struct gpio_chip reference_gc = {
234	.owner = THIS_MODULE,
235	.get = da9062_gpio_get,
236	.set = da9062_gpio_set,
237	.get_direction = da9062_gpio_get_direction,
238	.direction_input = da9062_gpio_direction_input,
239	.direction_output = da9062_gpio_direction_output,
240	.set_config = da9062_gpio_set_config,
241	.to_irq = da9062_gpio_to_irq,
242	.can_sleep = true,
243	.ngpio = DA9062_GPIO_NUM,
244	.base = -1,
245};
246
247static int da9062_pctl_probe(struct platform_device *pdev)
248{
249	struct device *parent = pdev->dev.parent;
250	struct da9062_pctl *pctl;
251	int i;
252
253	device_set_node(&pdev->dev, dev_fwnode(pdev->dev.parent));
254
255	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
256	if (!pctl)
257		return -ENOMEM;
258
259	pctl->da9062 = dev_get_drvdata(parent);
260	if (!pctl->da9062)
261		return -EINVAL;
262
263	if (!device_property_present(parent, "gpio-controller"))
264		return 0;
265
266	for (i = 0; i < ARRAY_SIZE(pctl->pin_config); i++)
267		pctl->pin_config[i] = DA9062_PIN_GPO_PP;
268
269	/*
270	 * Currently the driver handles only the GPIO support. The
271	 * pinctrl/pinmux support can be added later if needed.
272	 */
273	pctl->gc = reference_gc;
274	pctl->gc.label = dev_name(&pdev->dev);
275	pctl->gc.parent = &pdev->dev;
276
277	platform_set_drvdata(pdev, pctl);
278
279	return devm_gpiochip_add_data(&pdev->dev, &pctl->gc, pctl);
280}
281
282static const struct of_device_id da9062_compatible_reg_id_table[] = {
283	{ .compatible = "dlg,da9062-gpio" },
284	{ }
285};
286MODULE_DEVICE_TABLE(of, da9062_compatible_reg_id_table);
287
288static struct platform_driver da9062_pctl_driver = {
289	.probe = da9062_pctl_probe,
290	.driver = {
291		.name	= "da9062-gpio",
292		.of_match_table = da9062_compatible_reg_id_table,
293	},
294};
295module_platform_driver(da9062_pctl_driver);
296
297MODULE_AUTHOR("Marco Felsch <kernel@pengutronix.de>");
298MODULE_DESCRIPTION("DA9062 PMIC pinctrl and GPIO Driver");
299MODULE_LICENSE("GPL v2");
300MODULE_ALIAS("platform:da9062-gpio");