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pinctrl-aw9523.c

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linux-6.19.14/drivers/pinctrl/pinctrl-aw9523.c C
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Awinic AW9523B i2c pin controller driver
   4 * Copyright (c) 2020, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
   5 */
   6
   7#include <linux/bitfield.h>
   8#include <linux/errno.h>
   9#include <linux/gpio/consumer.h>
  10#include <linux/gpio/driver.h>
  11#include <linux/i2c.h>
  12#include <linux/init.h>
  13#include <linux/interrupt.h>
  14#include <linux/irq.h>
  15#include <linux/module.h>
  16#include <linux/mutex.h>
  17#include <linux/property.h>
  18#include <linux/regmap.h>
  19#include <linux/regulator/consumer.h>
  20#include <linux/slab.h>
  21
  22#include <linux/pinctrl/pinconf-generic.h>
  23#include <linux/pinctrl/pinconf.h>
  24#include <linux/pinctrl/pinctrl.h>
  25#include <linux/pinctrl/pinmux.h>
  26
  27#define AW9523_MAX_FUNCS		2
  28#define AW9523_NUM_PORTS		2
  29#define AW9523_PINS_PER_PORT		8
  30
  31/*
  32 * HW needs at least 20uS for reset and at least 1-2uS to recover from
  33 * reset, but we have to account for eventual board quirks, if any:
  34 * for this reason, keep reset asserted for 50uS and wait for 20uS
  35 * to recover from the reset.
  36 */
  37#define AW9523_HW_RESET_US		50
  38#define AW9523_HW_RESET_RECOVERY_US	20
  39
  40/* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */
  41#define AW9523_PIN_TO_PORT(pin)		(pin >> 3)
  42#define AW9523_REG_IN_STATE(pin)	(0x00 + AW9523_PIN_TO_PORT(pin))
  43#define AW9523_REG_OUT_STATE(pin)	(0x02 + AW9523_PIN_TO_PORT(pin))
  44#define AW9523_REG_CONF_STATE(pin)	(0x04 + AW9523_PIN_TO_PORT(pin))
  45#define AW9523_REG_INTR_DIS(pin)	(0x06 + AW9523_PIN_TO_PORT(pin))
  46#define AW9523_REG_CHIPID		0x10
  47#define AW9523_VAL_EXPECTED_CHIPID	0x23
  48
  49#define AW9523_REG_GCR			0x11
  50#define AW9523_GCR_ISEL_MASK		GENMASK(0, 1)
  51#define AW9523_GCR_GPOMD_MASK		BIT(4)
  52
  53#define AW9523_REG_PORT_MODE(pin)	(0x12 + AW9523_PIN_TO_PORT(pin))
  54#define AW9523_REG_SOFT_RESET		0x7f
  55#define AW9523_VAL_RESET		0x00
  56
  57/*
  58 * struct aw9523_irq - Interrupt controller structure
  59 * @lock: mutex locking for the irq bus
  60 * @cached_gpio: stores the previous gpio status for bit comparison
  61 */
  62struct aw9523_irq {
  63	struct mutex lock;
  64	u16 cached_gpio;
  65};
  66
  67/*
  68 * struct aw9523 - Main driver structure
  69 * @dev: device handle
  70 * @regmap: regmap handle for current device
  71 * @i2c_lock: Mutex lock for i2c operations
  72 * @reset_gpio: Hardware reset (RSTN) signal GPIO
  73 * @vio_vreg: VCC regulator (Optional)
  74 * @pctl: pinctrl handle for current device
  75 * @gpio: structure holding gpiochip params
  76 * @irq: Interrupt controller structure
  77 */
  78struct aw9523 {
  79	struct device *dev;
  80	struct regmap *regmap;
  81	struct mutex i2c_lock;
  82	struct gpio_desc *reset_gpio;
  83	int vio_vreg;
  84	struct pinctrl_dev *pctl;
  85	struct gpio_chip gpio;
  86	struct aw9523_irq *irq;
  87};
  88
  89static const struct pinctrl_pin_desc aw9523_pins[] = {
  90	/* Port 0 */
  91	PINCTRL_PIN(0, "gpio0"),
  92	PINCTRL_PIN(1, "gpio1"),
  93	PINCTRL_PIN(2, "gpio2"),
  94	PINCTRL_PIN(3, "gpio3"),
  95	PINCTRL_PIN(4, "gpio4"),
  96	PINCTRL_PIN(5, "gpio5"),
  97	PINCTRL_PIN(6, "gpio6"),
  98	PINCTRL_PIN(7, "gpio7"),
  99
 100	/* Port 1 */
 101	PINCTRL_PIN(8, "gpio8"),
 102	PINCTRL_PIN(9, "gpio9"),
 103	PINCTRL_PIN(10, "gpio10"),
 104	PINCTRL_PIN(11, "gpio11"),
 105	PINCTRL_PIN(12, "gpio12"),
 106	PINCTRL_PIN(13, "gpio13"),
 107	PINCTRL_PIN(14, "gpio14"),
 108	PINCTRL_PIN(15, "gpio15"),
 109};
 110
 111static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
 112{
 113	return ARRAY_SIZE(aw9523_pins);
 114}
 115
 116static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 117						 unsigned int selector)
 118{
 119	return aw9523_pins[selector].name;
 120}
 121
 122static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 123					 unsigned int selector,
 124					 const unsigned int **pins,
 125					 unsigned int *num_pins)
 126{
 127	*pins = &aw9523_pins[selector].number;
 128	*num_pins = 1;
 129	return 0;
 130}
 131
 132static const struct pinctrl_ops aw9523_pinctrl_ops = {
 133	.get_groups_count = aw9523_pinctrl_get_groups_count,
 134	.get_group_pins = aw9523_pinctrl_get_group_pins,
 135	.get_group_name = aw9523_pinctrl_get_group_name,
 136	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
 137	.dt_free_map = pinconf_generic_dt_free_map,
 138};
 139
 140static const char * const gpio_pwm_groups[] = {
 141	"gpio0", "gpio1", "gpio2", "gpio3",		/* 0-3 */
 142	"gpio4", "gpio5", "gpio6", "gpio7",		/* 4-7 */
 143	"gpio8", "gpio9", "gpio10", "gpio11",		/* 8-11 */
 144	"gpio12", "gpio13", "gpio14", "gpio15",		/* 11-15 */
 145};
 146
 147/* Warning: Do NOT reorder this array */
 148static const struct pinfunction aw9523_pmx[] = {
 149	PINCTRL_PINFUNCTION("pwm", gpio_pwm_groups, ARRAY_SIZE(gpio_pwm_groups)),
 150	PINCTRL_PINFUNCTION("gpio", gpio_pwm_groups, ARRAY_SIZE(gpio_pwm_groups)),
 151};
 152
 153static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl)
 154{
 155	return ARRAY_SIZE(aw9523_pmx);
 156}
 157
 158static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl,
 159					unsigned int sel)
 160{
 161	return aw9523_pmx[sel].name;
 162}
 163
 164static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel,
 165				 const char * const **groups,
 166				 unsigned int * const ngroups)
 167{
 168	*groups = aw9523_pmx[sel].groups;
 169	*ngroups = aw9523_pmx[sel].ngroups;
 170	return 0;
 171}
 172
 173static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel,
 174			      unsigned int grp)
 175{
 176	struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl);
 177	int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT;
 178
 179	if (fsel >= ARRAY_SIZE(aw9523_pmx))
 180		return -EINVAL;
 181
 182	/*
 183	 * This maps directly to the aw9523_pmx array: programming a
 184	 * high bit means "gpio" and a low bit means "pwm".
 185	 */
 186	mutex_lock(&awi->i2c_lock);
 187	ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin),
 188				 BIT(pin), (fsel ? BIT(pin) : 0));
 189	mutex_unlock(&awi->i2c_lock);
 190	return ret;
 191}
 192
 193static const struct pinmux_ops aw9523_pinmux_ops = {
 194	.get_functions_count	= aw9523_pmx_get_funcs_count,
 195	.get_function_name	= aw9523_pmx_get_fname,
 196	.get_function_groups	= aw9523_pmx_get_groups,
 197	.set_mux		= aw9523_pmx_set_mux,
 198};
 199
 200static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r)
 201{
 202	u8 reg;
 203
 204	switch (pcp) {
 205	case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 206	case PIN_CONFIG_BIAS_PULL_DOWN:
 207	case PIN_CONFIG_BIAS_PULL_UP:
 208		reg = AW9523_REG_IN_STATE(pin);
 209		break;
 210	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
 211	case PIN_CONFIG_DRIVE_PUSH_PULL:
 212		reg = AW9523_REG_GCR;
 213		break;
 214	case PIN_CONFIG_INPUT_ENABLE:
 215	case PIN_CONFIG_OUTPUT_ENABLE:
 216		reg = AW9523_REG_CONF_STATE(pin);
 217		break;
 218	case PIN_CONFIG_LEVEL:
 219		reg = AW9523_REG_OUT_STATE(pin);
 220		break;
 221	default:
 222		return -ENOTSUPP;
 223	}
 224	*r = reg;
 225
 226	return 0;
 227}
 228
 229static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
 230			    unsigned long *config)
 231{
 232	struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
 233	enum pin_config_param param = pinconf_to_config_param(*config);
 234	int regbit = pin % AW9523_PINS_PER_PORT;
 235	unsigned int val;
 236	u8 reg;
 237	int rc;
 238
 239	rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
 240	if (rc)
 241		return rc;
 242
 243	mutex_lock(&awi->i2c_lock);
 244	rc = regmap_read(awi->regmap, reg, &val);
 245	mutex_unlock(&awi->i2c_lock);
 246	if (rc)
 247		return rc;
 248
 249	switch (param) {
 250	case PIN_CONFIG_BIAS_PULL_UP:
 251	case PIN_CONFIG_INPUT_ENABLE:
 252	case PIN_CONFIG_LEVEL:
 253		val &= BIT(regbit);
 254		break;
 255	case PIN_CONFIG_BIAS_PULL_DOWN:
 256	case PIN_CONFIG_OUTPUT_ENABLE:
 257		val &= BIT(regbit);
 258		val = !val;
 259		break;
 260	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
 261		if (pin >= AW9523_PINS_PER_PORT)
 262			val = 0;
 263		else
 264			val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
 265		break;
 266	case PIN_CONFIG_DRIVE_PUSH_PULL:
 267		if (pin >= AW9523_PINS_PER_PORT)
 268			val = 1;
 269		else
 270			val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
 271		break;
 272	default:
 273		return -ENOTSUPP;
 274	}
 275	if (val < 1)
 276		return -EINVAL;
 277
 278	*config = pinconf_to_config_packed(param, !!val);
 279
 280	return rc;
 281}
 282
 283static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
 284			    unsigned long *configs, unsigned int num_configs)
 285{
 286	struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
 287	enum pin_config_param param;
 288	int regbit = pin % AW9523_PINS_PER_PORT;
 289	u32 arg;
 290	u8 reg;
 291	unsigned int mask, val;
 292	int i, rc;
 293
 294	mutex_lock(&awi->i2c_lock);
 295	for (i = 0; i < num_configs; i++) {
 296		param = pinconf_to_config_param(configs[i]);
 297		arg = pinconf_to_config_argument(configs[i]);
 298
 299		rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
 300		if (rc)
 301			goto end;
 302
 303		switch (param) {
 304		case PIN_CONFIG_LEVEL:
 305			/* First, enable pin output */
 306			rc = regmap_update_bits(awi->regmap,
 307						AW9523_REG_CONF_STATE(pin),
 308						BIT(regbit), 0);
 309			if (rc)
 310				goto end;
 311
 312			/* Then, fall through to config output level */
 313			fallthrough;
 314		case PIN_CONFIG_OUTPUT_ENABLE:
 315			arg = !arg;
 316			fallthrough;
 317		case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 318		case PIN_CONFIG_BIAS_PULL_DOWN:
 319		case PIN_CONFIG_BIAS_PULL_UP:
 320		case PIN_CONFIG_INPUT_ENABLE:
 321			mask = BIT(regbit);
 322			val = arg ? BIT(regbit) : 0;
 323			break;
 324		case PIN_CONFIG_DRIVE_OPEN_DRAIN:
 325			/* Open-Drain is supported only on port 0 */
 326			if (pin >= AW9523_PINS_PER_PORT) {
 327				rc = -ENOTSUPP;
 328				goto end;
 329			}
 330			mask = AW9523_GCR_GPOMD_MASK;
 331			val = 0;
 332			break;
 333		case PIN_CONFIG_DRIVE_PUSH_PULL:
 334			/* Port 1 is always Push-Pull */
 335			if (pin >= AW9523_PINS_PER_PORT) {
 336				mask = 0;
 337				val = 0;
 338				continue;
 339			}
 340			mask = AW9523_GCR_GPOMD_MASK;
 341			val = AW9523_GCR_GPOMD_MASK;
 342			break;
 343		default:
 344			rc = -ENOTSUPP;
 345			goto end;
 346		}
 347
 348		rc = regmap_update_bits(awi->regmap, reg, mask, val);
 349		if (rc)
 350			goto end;
 351	}
 352end:
 353	mutex_unlock(&awi->i2c_lock);
 354	return rc;
 355}
 356
 357static const struct pinconf_ops aw9523_pinconf_ops = {
 358	.pin_config_get = aw9523_pconf_get,
 359	.pin_config_set = aw9523_pconf_set,
 360	.is_generic = true,
 361};
 362
 363/*
 364 * aw9523_get_pin_direction - Get pin direction
 365 * @regmap: Regmap structure
 366 * @pin: gpiolib pin number
 367 * @n:   pin index in port register
 368 *
 369 * Return: Pin direction for success or negative number for error
 370 */
 371static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n)
 372{
 373	int ret;
 374
 375	ret = regmap_test_bits(regmap, AW9523_REG_CONF_STATE(pin), BIT(n));
 376	if (ret < 0)
 377		return ret;
 378
 379	return ret ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;
 380}
 381
 382/*
 383 * aw9523_get_port_state - Get input or output state for entire port
 384 * @regmap: Regmap structure
 385 * @pin:    gpiolib pin number
 386 * @regbit: hw pin index, used to retrieve port number
 387 * @state:  returned port state
 388 *
 389 * Return: Zero for success or negative number for error
 390 */
 391static int aw9523_get_port_state(struct regmap *regmap, u8 pin, u8 regbit,
 392				 unsigned int *state)
 393{
 394	u8 reg;
 395	int dir;
 396
 397	dir = aw9523_get_pin_direction(regmap, pin, regbit);
 398	if (dir < 0)
 399		return dir;
 400
 401	if (dir == GPIO_LINE_DIRECTION_IN)
 402		reg = AW9523_REG_IN_STATE(pin);
 403	else
 404		reg = AW9523_REG_OUT_STATE(pin);
 405
 406	return regmap_read(regmap, reg, state);
 407}
 408
 409static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type)
 410{
 411	switch (type) {
 412	case IRQ_TYPE_NONE:
 413	case IRQ_TYPE_EDGE_BOTH:
 414		return 0;
 415	default:
 416		return -EINVAL;
 417	};
 418}
 419
 420/*
 421 * aw9523_irq_mask - Mask interrupt
 422 * @d: irq data
 423 *
 424 * Sets which interrupt to mask in the bitmap;
 425 * The interrupt will be masked when unlocking the irq bus.
 426 */
 427static void aw9523_irq_mask(struct irq_data *d)
 428{
 429	struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
 430	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 431	unsigned int n = hwirq % AW9523_PINS_PER_PORT;
 432
 433	regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq),
 434			   BIT(n), BIT(n));
 435	gpiochip_disable_irq(&awi->gpio, hwirq);
 436}
 437
 438/*
 439 * aw9523_irq_unmask - Unmask interrupt
 440 * @d: irq data
 441 *
 442 * Sets which interrupt to unmask in the bitmap;
 443 * The interrupt will be masked when unlocking the irq bus.
 444 */
 445static void aw9523_irq_unmask(struct irq_data *d)
 446{
 447	struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
 448	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 449	unsigned int n = hwirq % AW9523_PINS_PER_PORT;
 450
 451	gpiochip_enable_irq(&awi->gpio, hwirq);
 452	regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq),
 453			   BIT(n), 0);
 454}
 455
 456static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id)
 457{
 458	struct aw9523 *awi = (struct aw9523 *)dev_id;
 459	unsigned long n, val = 0;
 460	unsigned long changed_gpio;
 461	unsigned int tmp, port_pin, i, ret;
 462
 463	for (i = 0; i < AW9523_NUM_PORTS; i++) {
 464		port_pin = i * AW9523_PINS_PER_PORT;
 465		ret = regmap_read(awi->regmap,
 466				  AW9523_REG_IN_STATE(port_pin),
 467				  &tmp);
 468		if (ret)
 469			return ret;
 470		val |= (u8)tmp << (i * 8);
 471	}
 472
 473	/* Handle GPIO input release interrupt as well */
 474	changed_gpio = awi->irq->cached_gpio ^ val;
 475	awi->irq->cached_gpio = val;
 476
 477	/*
 478	 * To avoid up to four *slow* i2c reads from any driver hooked
 479	 * up to our interrupts, just check for the irq_find_mapping
 480	 * result: if the interrupt is not mapped, then we don't want
 481	 * to care about it.
 482	 */
 483	for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) {
 484		tmp = irq_find_mapping(awi->gpio.irq.domain, n);
 485		if (tmp <= 0)
 486			continue;
 487		handle_nested_irq(tmp);
 488	}
 489
 490	return IRQ_HANDLED;
 491}
 492
 493/*
 494 * aw9523_irq_bus_lock - Grab lock for interrupt operation
 495 * @d: irq data
 496 */
 497static void aw9523_irq_bus_lock(struct irq_data *d)
 498{
 499	struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
 500
 501	mutex_lock(&awi->irq->lock);
 502	regcache_cache_only(awi->regmap, true);
 503}
 504
 505/*
 506 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock
 507 * @d: irq data
 508 *
 509 * Writes the interrupt mask bits (found in the bit map) to the
 510 * hardware, then unlocks the bus.
 511 */
 512static void aw9523_irq_bus_sync_unlock(struct irq_data *d)
 513{
 514	struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
 515
 516	regcache_cache_only(awi->regmap, false);
 517	regcache_sync(awi->regmap);
 518	mutex_unlock(&awi->irq->lock);
 519}
 520
 521static int aw9523_gpio_get_direction(struct gpio_chip *chip,
 522				     unsigned int offset)
 523{
 524	struct aw9523 *awi = gpiochip_get_data(chip);
 525	u8 regbit = offset % AW9523_PINS_PER_PORT;
 526	int ret;
 527
 528	mutex_lock(&awi->i2c_lock);
 529	ret = aw9523_get_pin_direction(awi->regmap, offset, regbit);
 530	mutex_unlock(&awi->i2c_lock);
 531
 532	return ret;
 533}
 534
 535static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset)
 536{
 537	struct aw9523 *awi = gpiochip_get_data(chip);
 538	u8 regbit = offset % AW9523_PINS_PER_PORT;
 539	unsigned int val;
 540	int ret;
 541
 542	mutex_lock(&awi->i2c_lock);
 543	ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val);
 544	mutex_unlock(&awi->i2c_lock);
 545	if (ret)
 546		return ret;
 547
 548	return !!(val & BIT(regbit));
 549}
 550
 551/**
 552 * _aw9523_gpio_get_multiple - Get I/O state for an entire port
 553 * @awi: Controller data
 554 * @regbit: hw pin index, used to retrieve port number
 555 * @state: returned port I/O state
 556 * @mask: lines to read values for
 557 *
 558 * Return: Zero for success or negative number for error
 559 */
 560static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit,
 561				     u8 *state, u8 mask)
 562{
 563	u32 dir_in, val;
 564	u8 m;
 565	int ret;
 566
 567	/* Registers are 8-bits wide */
 568	ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in);
 569	if (ret)
 570		return ret;
 571	*state = 0;
 572
 573	m = mask & dir_in;
 574	if (m) {
 575		ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit),
 576				  &val);
 577		if (ret)
 578			return ret;
 579		*state |= (u8)val & m;
 580	}
 581
 582	m = mask & ~dir_in;
 583	if (m) {
 584		ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit),
 585				  &val);
 586		if (ret)
 587			return ret;
 588		*state |= (u8)val & m;
 589	}
 590
 591	return 0;
 592}
 593
 594static int aw9523_gpio_get_multiple(struct gpio_chip *chip,
 595				    unsigned long *mask,
 596				    unsigned long *bits)
 597{
 598	struct aw9523 *awi = gpiochip_get_data(chip);
 599	u8 m, state = 0;
 600	int ret;
 601
 602	mutex_lock(&awi->i2c_lock);
 603
 604	/* Port 0 (gpio 0-7) */
 605	m = *mask;
 606	if (m) {
 607		ret = _aw9523_gpio_get_multiple(awi, 0, &state, m);
 608		if (ret)
 609			goto out;
 610	}
 611	*bits = state;
 612
 613	/* Port 1 (gpio 8-15) */
 614	m = *mask >> 8;
 615	if (m) {
 616		ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT,
 617						&state, m);
 618		if (ret)
 619			goto out;
 620
 621		*bits |= (state << 8);
 622	}
 623out:
 624	mutex_unlock(&awi->i2c_lock);
 625	return ret;
 626}
 627
 628static int aw9523_gpio_set_multiple(struct gpio_chip *chip,
 629				    unsigned long *mask,
 630				    unsigned long *bits)
 631{
 632	struct aw9523 *awi = gpiochip_get_data(chip);
 633	u8 mask_lo, mask_hi, bits_lo, bits_hi;
 634	unsigned int reg;
 635	int ret = 0;
 636
 637	mask_lo = *mask;
 638	mask_hi = *mask >> 8;
 639	bits_lo = *bits;
 640	bits_hi = *bits >> 8;
 641
 642	mutex_lock(&awi->i2c_lock);
 643	if (mask_hi) {
 644		reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT);
 645		ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi);
 646		if (ret)
 647			goto out;
 648	}
 649	if (mask_lo) {
 650		reg = AW9523_REG_OUT_STATE(0);
 651		ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo);
 652		if (ret)
 653			goto out;
 654	}
 655
 656out:
 657	mutex_unlock(&awi->i2c_lock);
 658	return ret;
 659}
 660
 661static int aw9523_gpio_set(struct gpio_chip *chip, unsigned int offset,
 662			   int value)
 663{
 664	struct aw9523 *awi = gpiochip_get_data(chip);
 665	u8 regbit = offset % AW9523_PINS_PER_PORT;
 666	int ret;
 667
 668	mutex_lock(&awi->i2c_lock);
 669	ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
 670				 BIT(regbit), value ? BIT(regbit) : 0);
 671	mutex_unlock(&awi->i2c_lock);
 672
 673	return ret;
 674}
 675
 676
 677static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset)
 678{
 679	struct aw9523 *awi = gpiochip_get_data(chip);
 680	u8 regbit = offset % AW9523_PINS_PER_PORT;
 681	int ret;
 682
 683	mutex_lock(&awi->i2c_lock);
 684	ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
 685				 BIT(regbit), BIT(regbit));
 686	mutex_unlock(&awi->i2c_lock);
 687
 688	return ret;
 689}
 690
 691static int aw9523_direction_output(struct gpio_chip *chip,
 692				   unsigned int offset, int value)
 693{
 694	struct aw9523 *awi = gpiochip_get_data(chip);
 695	u8 regbit = offset % AW9523_PINS_PER_PORT;
 696	int ret;
 697
 698	mutex_lock(&awi->i2c_lock);
 699	ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
 700				 BIT(regbit), value ? BIT(regbit) : 0);
 701	if (ret)
 702		goto end;
 703
 704	ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
 705				 BIT(regbit), 0);
 706end:
 707	mutex_unlock(&awi->i2c_lock);
 708	return ret;
 709}
 710
 711static int aw9523_drive_reset_gpio(struct aw9523 *awi)
 712{
 713	unsigned int chip_id;
 714	int ret;
 715
 716	/*
 717	 * If the chip is already configured for any reason, then we
 718	 * will probably succeed in sending the soft reset signal to
 719	 * the hardware through I2C: this operation takes less time
 720	 * compared to a full HW reset and it gives the same results.
 721	 */
 722	ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0);
 723	if (ret == 0)
 724		goto done;
 725
 726	dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n");
 727	ret = gpiod_direction_output(awi->reset_gpio, 0);
 728	if (ret)
 729		return ret;
 730
 731	/* The reset pulse has to be longer than 20uS due to deglitch */
 732	usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1);
 733
 734	ret = gpiod_direction_output(awi->reset_gpio, 1);
 735	if (ret)
 736		return ret;
 737done:
 738	/* The HW needs at least 1uS to reliably recover after reset */
 739	usleep_range(AW9523_HW_RESET_RECOVERY_US,
 740		     AW9523_HW_RESET_RECOVERY_US + 1);
 741
 742	/* Check the ChipID */
 743	ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id);
 744	if (ret) {
 745		dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret);
 746		return ret;
 747	}
 748	if (chip_id != AW9523_VAL_EXPECTED_CHIPID) {
 749		dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n",
 750			chip_id, AW9523_VAL_EXPECTED_CHIPID);
 751		return -EINVAL;
 752	}
 753
 754	return 0;
 755}
 756
 757static int aw9523_hw_reset(struct aw9523 *awi)
 758{
 759	int ret, max_retries = 2;
 760
 761	/* Sometimes the chip needs more than one reset cycle */
 762	do {
 763		ret = aw9523_drive_reset_gpio(awi);
 764		if (ret == 0)
 765			break;
 766		max_retries--;
 767	} while (max_retries);
 768
 769	return ret;
 770}
 771
 772static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins)
 773{
 774	struct device *dev = awi->dev;
 775	struct gpio_chip *gc = &awi->gpio;
 776
 777	gc->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
 778	if (!gc->label)
 779		return -ENOMEM;
 780
 781	gc->base = -1;
 782	gc->ngpio = npins;
 783	gc->get_direction = aw9523_gpio_get_direction;
 784	gc->direction_input = aw9523_direction_input;
 785	gc->direction_output = aw9523_direction_output;
 786	gc->get = aw9523_gpio_get;
 787	gc->get_multiple = aw9523_gpio_get_multiple;
 788	gc->set = aw9523_gpio_set;
 789	gc->set_multiple = aw9523_gpio_set_multiple;
 790	gc->set_config = gpiochip_generic_config;
 791	gc->parent = dev;
 792	gc->owner = THIS_MODULE;
 793	gc->can_sleep = true;
 794
 795	return 0;
 796}
 797
 798static const struct irq_chip aw9523_irq_chip = {
 799	.name = "aw9523",
 800	.irq_mask = aw9523_irq_mask,
 801	.irq_unmask = aw9523_irq_unmask,
 802	.irq_bus_lock = aw9523_irq_bus_lock,
 803	.irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock,
 804	.irq_set_type = aw9523_gpio_irq_type,
 805	.flags = IRQCHIP_IMMUTABLE,
 806        GPIOCHIP_IRQ_RESOURCE_HELPERS,
 807};
 808
 809static int aw9523_init_irq(struct aw9523 *awi, int irq)
 810{
 811	struct device *dev = awi->dev;
 812	struct gpio_irq_chip *girq;
 813	int ret;
 814
 815	if (!device_property_read_bool(dev, "interrupt-controller"))
 816		return 0;
 817
 818	awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL);
 819	if (!awi->irq)
 820		return -ENOMEM;
 821
 822	mutex_init(&awi->irq->lock);
 823
 824	ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func,
 825					IRQF_ONESHOT, dev_name(dev), awi);
 826	if (ret)
 827		return dev_err_probe(dev, ret, "Failed to request irq %d\n", irq);
 828
 829	girq = &awi->gpio.irq;
 830	gpio_irq_chip_set_chip(girq, &aw9523_irq_chip);
 831	girq->parent_handler = NULL;
 832	girq->num_parents = 0;
 833	girq->parents = NULL;
 834	girq->default_type = IRQ_TYPE_EDGE_BOTH;
 835	girq->handler = handle_simple_irq;
 836	girq->threaded = true;
 837
 838	return 0;
 839}
 840
 841static bool aw9523_is_reg_hole(unsigned int reg)
 842{
 843	return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) &&
 844		reg < AW9523_REG_SOFT_RESET) ||
 845	       (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) &&
 846		reg < AW9523_REG_CHIPID);
 847}
 848
 849static bool aw9523_readable_reg(struct device *dev, unsigned int reg)
 850{
 851	/* All available registers (minus holes) can be read */
 852	return !aw9523_is_reg_hole(reg);
 853}
 854
 855static bool aw9523_volatile_reg(struct device *dev, unsigned int reg)
 856{
 857	return aw9523_is_reg_hole(reg) ||
 858	       reg == AW9523_REG_IN_STATE(0) ||
 859	       reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) ||
 860	       reg == AW9523_REG_CHIPID ||
 861	       reg == AW9523_REG_SOFT_RESET;
 862}
 863
 864static bool aw9523_writeable_reg(struct device *dev, unsigned int reg)
 865{
 866	return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID;
 867}
 868
 869static bool aw9523_precious_reg(struct device *dev, unsigned int reg)
 870{
 871	/* Reading AW9523_REG_IN_STATE clears interrupt status */
 872	return aw9523_is_reg_hole(reg) ||
 873	       reg == AW9523_REG_IN_STATE(0) ||
 874	       reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT);
 875}
 876
 877static const struct regmap_config aw9523_regmap = {
 878	.reg_bits = 8,
 879	.val_bits = 8,
 880	.reg_stride = 1,
 881
 882	.precious_reg = aw9523_precious_reg,
 883	.readable_reg = aw9523_readable_reg,
 884	.volatile_reg = aw9523_volatile_reg,
 885	.writeable_reg = aw9523_writeable_reg,
 886
 887	.cache_type = REGCACHE_FLAT,
 888	.disable_locking = true,
 889
 890	.num_reg_defaults_raw = AW9523_REG_SOFT_RESET,
 891};
 892
 893static int aw9523_hw_init(struct aw9523 *awi)
 894{
 895	u8 p1_pin = AW9523_PINS_PER_PORT;
 896	unsigned int val;
 897	int ret;
 898
 899	/* No register caching during initialization */
 900	regcache_cache_bypass(awi->regmap, true);
 901
 902	/* Bring up the chip */
 903	ret = aw9523_hw_reset(awi);
 904	if (ret) {
 905		dev_err(awi->dev, "HW Reset failed: %d\n", ret);
 906		return ret;
 907	}
 908
 909	/*
 910	 * This is the expected chip and it is running: it's time to
 911	 * set a safe default configuration in case the user doesn't
 912	 * configure (all of the available) pins in this chip.
 913	 * P.S.: The writes order doesn't matter.
 914	 */
 915
 916	/* Set all pins as GPIO */
 917	ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX);
 918	if (ret)
 919		return ret;
 920	ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX);
 921	if (ret)
 922		return ret;
 923
 924	/* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */
 925	ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0);
 926	if (ret)
 927		return ret;
 928
 929	/* Set all pins as inputs */
 930	ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX);
 931	if (ret)
 932		return ret;
 933	ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX);
 934	if (ret)
 935		return ret;
 936
 937	/* Disable all interrupts to avoid unreasoned wakeups */
 938	ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX);
 939	if (ret)
 940		return ret;
 941	ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX);
 942	if (ret)
 943		return ret;
 944
 945	/* Clear setup-generated interrupts by performing a port state read */
 946	ret = aw9523_get_port_state(awi->regmap, 0, 0, &val);
 947	if (ret)
 948		return ret;
 949	ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val);
 950	if (ret)
 951		return ret;
 952
 953	/* Everything went fine: activate and reinitialize register cache */
 954	regcache_cache_bypass(awi->regmap, false);
 955	return regmap_reinit_cache(awi->regmap, &aw9523_regmap);
 956}
 957
 958static int aw9523_probe(struct i2c_client *client)
 959{
 960	struct device *dev = &client->dev;
 961	struct pinctrl_desc *pdesc;
 962	struct aw9523 *awi;
 963	int ret;
 964
 965	awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL);
 966	if (!awi)
 967		return -ENOMEM;
 968
 969	i2c_set_clientdata(client, awi);
 970
 971	awi->dev = dev;
 972	awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
 973	if (IS_ERR(awi->reset_gpio))
 974		return PTR_ERR(awi->reset_gpio);
 975	gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset");
 976
 977	awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap);
 978	if (IS_ERR(awi->regmap))
 979		return PTR_ERR(awi->regmap);
 980
 981	awi->vio_vreg = devm_regulator_get_enable_optional(dev, "vio");
 982	if (awi->vio_vreg && awi->vio_vreg != -ENODEV)
 983		return awi->vio_vreg;
 984
 985	ret = devm_mutex_init(dev, &awi->i2c_lock);
 986	if (ret)
 987		return ret;
 988
 989	lockdep_set_subclass(&awi->i2c_lock, i2c_adapter_depth(client->adapter));
 990
 991	pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL);
 992	if (!pdesc)
 993		return -ENOMEM;
 994
 995	ret = aw9523_hw_init(awi);
 996	if (ret)
 997		return ret;
 998
 999	pdesc->name = dev_name(dev);
1000	pdesc->owner = THIS_MODULE;
1001	pdesc->pctlops = &aw9523_pinctrl_ops;
1002	pdesc->pmxops  = &aw9523_pinmux_ops;
1003	pdesc->confops = &aw9523_pinconf_ops;
1004	pdesc->pins = aw9523_pins;
1005	pdesc->npins = ARRAY_SIZE(aw9523_pins);
1006
1007	ret = aw9523_init_gpiochip(awi, pdesc->npins);
1008	if (ret)
1009		return ret;
1010
1011	if (client->irq) {
1012		ret = aw9523_init_irq(awi, client->irq);
1013		if (ret)
1014			return ret;
1015	}
1016
1017	awi->pctl = devm_pinctrl_register(dev, pdesc, awi);
1018	if (IS_ERR(awi->pctl))
1019		return dev_err_probe(dev, PTR_ERR(awi->pctl),
1020				     "Cannot register pinctrl");
1021
1022	return devm_gpiochip_add_data(dev, &awi->gpio, awi);
1023}
1024
1025static void aw9523_remove(struct i2c_client *client)
1026{
1027	struct aw9523 *awi = i2c_get_clientdata(client);
1028
1029	/*
1030	 * If the chip VIO is connected to a regulator that we can turn
1031	 * off, life is easy... otherwise, reinitialize the chip and
1032	 * set the pins to hardware defaults before removing the driver
1033	 * to leave it in a clean, safe and predictable state.
1034	 */
1035	if (awi->vio_vreg == -ENODEV) {
1036		mutex_lock(&awi->i2c_lock);
1037		aw9523_hw_init(awi);
1038		mutex_unlock(&awi->i2c_lock);
1039	}
1040}
1041
1042static const struct i2c_device_id aw9523_i2c_id_table[] = {
1043	{ "aw9523_i2c" },
1044	{ }
1045};
1046MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table);
1047
1048static const struct of_device_id of_aw9523_i2c_match[] = {
1049	{ .compatible = "awinic,aw9523-pinctrl", },
1050	{ }
1051};
1052MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match);
1053
1054static struct i2c_driver aw9523_driver = {
1055	.driver = {
1056		.name = "aw9523-pinctrl",
1057		.of_match_table = of_aw9523_i2c_match,
1058	},
1059	.probe = aw9523_probe,
1060	.remove = aw9523_remove,
1061	.id_table = aw9523_i2c_id_table,
1062};
1063module_i2c_driver(aw9523_driver);
1064
1065MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver");
1066MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>");
1067MODULE_LICENSE("GPL v2");
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