pinctrl-abx500.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef PINCTRL_PINCTRL_ABx500_H
  3#define PINCTRL_PINCTRL_ABx500_H
  4
  5#include <linux/types.h>
  6
  7struct pinctrl_pin_desc;
  8
  9/* Package definitions */
 10#define PINCTRL_AB8500	0
 11#define PINCTRL_AB8505	1
 12
 13/* pins alternate function */
 14enum abx500_pin_func {
 15	ABX500_DEFAULT,
 16	ABX500_ALT_A,
 17	ABX500_ALT_B,
 18	ABX500_ALT_C,
 19};
 20
 21enum abx500_gpio_pull_updown {
 22	ABX500_GPIO_PULL_DOWN = 0x0,
 23	ABX500_GPIO_PULL_NONE = 0x1,
 24	ABX500_GPIO_PULL_UP = 0x3,
 25};
 26
 27enum abx500_gpio_vinsel {
 28	ABX500_GPIO_VINSEL_VBAT = 0x0,
 29	ABX500_GPIO_VINSEL_VIN_1V8 = 0x1,
 30	ABX500_GPIO_VINSEL_VDD_BIF = 0x2,
 31};
 32
 33/**
 34 * struct abx500_function - ABx500 pinctrl mux function
 35 * @name: The name of the function, exported to pinctrl core.
 36 * @groups: An array of pin groups that may select this function.
 37 * @ngroups: The number of entries in @groups.
 38 */
 39struct abx500_function {
 40	const char *name;
 41	const char * const *groups;
 42	unsigned ngroups;
 43};
 44
 45/**
 46 * struct abx500_pingroup - describes a ABx500 pin group
 47 * @name: the name of this specific pin group
 48 * @pins: an array of discrete physical pins used in this group, taken
 49 *	from the driver-local pin enumeration space
 50 * @num_pins: the number of pins in this group array, i.e. the number of
 51 *	elements in .pins so we can iterate over that array
 52 * @altsetting: the altsetting to apply to all pins in this group to
 53 *	configure them to be used by a function
 54 */
 55struct abx500_pingroup {
 56	const char *name;
 57	const unsigned int *pins;
 58	const unsigned npins;
 59	int altsetting;
 60};
 61
 62#define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc)	\
 63{									\
 64	.pin_number = pin,						\
 65	.gpiosel_bit = sel_bit,						\
 66	.alt_bit1 = alt1,						\
 67	.alt_bit2 = alt2,						\
 68	.alta_val = alta,						\
 69	.altb_val = altb,						\
 70	.altc_val = altc,						\
 71}
 72
 73#define UNUSED -1
 74/**
 75 * struct alternate_functions
 76 * @pin_number:		The pin number
 77 * @gpiosel_bit:	Control bit in GPIOSEL register,
 78 * @alt_bit1:		First AlternateFunction bit used to select the
 79 *			alternate function
 80 * @alt_bit2:		Second AlternateFunction bit used to select the
 81 *			alternate function
 82 *
 83 *			these 3 following fields are necessary due to none
 84 *			coherency on how to select the altA, altB and altC
 85 *			function between the ABx500 SOC family when using
 86 *			alternatfunc register.
 87 * @alta_val:		value to write in alternatfunc to select altA function
 88 * @altb_val:		value to write in alternatfunc to select altB function
 89 * @altc_val:		value to write in alternatfunc to select altC function
 90 */
 91struct alternate_functions {
 92	unsigned pin_number;
 93	s8 gpiosel_bit;
 94	s8 alt_bit1;
 95	s8 alt_bit2;
 96	u8 alta_val;
 97	u8 altb_val;
 98	u8 altc_val;
 99};
100
101#define GPIO_IRQ_CLUSTER(a, b, c)	\
102{					\
103	.start = a,			\
104	.end = b,			\
105	.to_irq = c,			\
106}
107
108/**
109 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
110 *			capable
111 * @start:		The pin number of the first pin interrupt capable
112 * @end:		The pin number of the last pin interrupt capable
113 * @to_irq:		The ABx500 GPIO's associated IRQs are clustered
114 *                      together throughout the interrupt numbers at irregular
115 *                      intervals. To solve this quandary, we will place the
116 *                      read-in values into the cluster information table
117 */
118
119struct abx500_gpio_irq_cluster {
120	int start;
121	int end;
122	int to_irq;
123};
124
125/**
126 * struct abx500_pinrange - map pin numbers to GPIO offsets
127 * @offset:		offset into the GPIO local numberspace, incidentally
128 *			identical to the offset into the local pin numberspace
129 * @npins:		number of pins to map from both offsets
130 * @altfunc:		altfunc setting to be used to enable GPIO on a pin in
131 *			this range (may vary)
132 */
133struct abx500_pinrange {
134	unsigned int offset;
135	unsigned int npins;
136	int altfunc;
137};
138
139#define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c }
140
141/**
142 * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
143 * @gpio_ranges:	An array of GPIO ranges for this SoC
144 * @gpio_num_ranges:	The number of GPIO ranges for this SoC
145 * @pins:		An array describing all pins the pin controller affects.
146 *			All pins which are also GPIOs must be listed first within the
147 *			array, and be numbered identically to the GPIO controller's
148 *			numbering.
149 * @npins:		The number of entries in @pins.
150 * @functions:		The functions supported on this SoC.
151 * @nfunction:		The number of entries in @functions.
152 * @groups:		An array describing all pin groups the pin SoC supports.
153 * @ngroups:		The number of entries in @groups.
154 * @alternate_functions: array describing pins which supports alternate and
155 *			how to set it.
156 * @gpio_irq_cluster:	An array of GPIO interrupt capable for this SoC
157 * @ngpio_irq_cluster:	The number of GPIO inetrrupt capable for this SoC
158 * @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
159 *			setting strategy of the rising interrupt line
160 * @irq_gpio_falling_offset: Interrupt offset used as base to compute specific
161 *			setting strategy of the falling interrupt line
162 * @irq_gpio_factor:	Factor used to compute specific setting strategy of
163 *			the interrupt line
164 */
165
166struct abx500_pinctrl_soc_data {
167	const struct abx500_pinrange *gpio_ranges;
168	unsigned gpio_num_ranges;
169	const struct pinctrl_pin_desc *pins;
170	unsigned npins;
171	const struct abx500_function *functions;
172	unsigned nfunctions;
173	const struct abx500_pingroup *groups;
174	unsigned ngroups;
175	struct alternate_functions *alternate_functions;
176	struct abx500_gpio_irq_cluster *gpio_irq_cluster;
177	unsigned ngpio_irq_cluster;
178	int irq_gpio_rising_offset;
179	int irq_gpio_falling_offset;
180	int irq_gpio_factor;
181};
182
183#ifdef CONFIG_PINCTRL_AB8500
184
185void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc);
186
187#else
188
189static inline void
190abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
191{
192}
193
194#endif
195
196#ifdef CONFIG_PINCTRL_AB8505
197
198void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
199
200#else
201
202static inline void
203abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
204{
205}
206
207#endif
208
209#endif /* PINCTRL_PINCTRL_ABx500_H */