pinctrl-abx500.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) ST-Ericsson SA 2013
   4 *
   5 * Author: Patrice Chotard <patrice.chotard@st.com>
   6 *
   7 * Driver allows to use AxB5xx unused pins to be used as GPIO
   8 */
   9
  10#include <linux/bitops.h>
  11#include <linux/cleanup.h>
  12#include <linux/err.h>
  13#include <linux/gpio/driver.h>
  14#include <linux/init.h>
  15#include <linux/interrupt.h>
  16#include <linux/irq.h>
  17#include <linux/irqdomain.h>
  18#include <linux/kernel.h>
  19#include <linux/of.h>
  20#include <linux/of_device.h>
  21#include <linux/platform_device.h>
  22#include <linux/property.h>
  23#include <linux/seq_file.h>
  24#include <linux/slab.h>
  25#include <linux/string_choices.h>
  26#include <linux/types.h>
  27
  28#include <linux/mfd/abx500.h>
  29#include <linux/mfd/abx500/ab8500.h>
  30
  31#include <linux/pinctrl/consumer.h>
  32#include <linux/pinctrl/machine.h>
  33#include <linux/pinctrl/pinconf-generic.h>
  34#include <linux/pinctrl/pinconf.h>
  35#include <linux/pinctrl/pinctrl.h>
  36#include <linux/pinctrl/pinmux.h>
  37
  38#include "../core.h"
  39#include "../pinconf.h"
  40#include "../pinctrl-utils.h"
  41
  42#include "pinctrl-abx500.h"
  43
  44/*
  45 * GPIO registers offset
  46 * Bank: 0x10
  47 */
  48#define AB8500_GPIO_SEL1_REG	0x00
  49#define AB8500_GPIO_SEL2_REG	0x01
  50#define AB8500_GPIO_SEL3_REG	0x02
  51#define AB8500_GPIO_SEL4_REG	0x03
  52#define AB8500_GPIO_SEL5_REG	0x04
  53#define AB8500_GPIO_SEL6_REG	0x05
  54
  55#define AB8500_GPIO_DIR1_REG	0x10
  56#define AB8500_GPIO_DIR2_REG	0x11
  57#define AB8500_GPIO_DIR3_REG	0x12
  58#define AB8500_GPIO_DIR4_REG	0x13
  59#define AB8500_GPIO_DIR5_REG	0x14
  60#define AB8500_GPIO_DIR6_REG	0x15
  61
  62#define AB8500_GPIO_OUT1_REG	0x20
  63#define AB8500_GPIO_OUT2_REG	0x21
  64#define AB8500_GPIO_OUT3_REG	0x22
  65#define AB8500_GPIO_OUT4_REG	0x23
  66#define AB8500_GPIO_OUT5_REG	0x24
  67#define AB8500_GPIO_OUT6_REG	0x25
  68
  69#define AB8500_GPIO_PUD1_REG	0x30
  70#define AB8500_GPIO_PUD2_REG	0x31
  71#define AB8500_GPIO_PUD3_REG	0x32
  72#define AB8500_GPIO_PUD4_REG	0x33
  73#define AB8500_GPIO_PUD5_REG	0x34
  74#define AB8500_GPIO_PUD6_REG	0x35
  75
  76#define AB8500_GPIO_IN1_REG	0x40
  77#define AB8500_GPIO_IN2_REG	0x41
  78#define AB8500_GPIO_IN3_REG	0x42
  79#define AB8500_GPIO_IN4_REG	0x43
  80#define AB8500_GPIO_IN5_REG	0x44
  81#define AB8500_GPIO_IN6_REG	0x45
  82#define AB8500_GPIO_ALTFUN_REG	0x50
  83
  84#define ABX500_GPIO_INPUT	0
  85#define ABX500_GPIO_OUTPUT	1
  86
  87struct abx500_pinctrl {
  88	struct device *dev;
  89	struct pinctrl_dev *pctldev;
  90	struct abx500_pinctrl_soc_data *soc;
  91	struct gpio_chip chip;
  92	struct ab8500 *parent;
  93	struct abx500_gpio_irq_cluster *irq_cluster;
  94	int irq_cluster_size;
  95};
  96
  97static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
  98			       unsigned offset, bool *bit)
  99{
 100	struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 101	u8 pos = offset % 8;
 102	u8 val;
 103	int ret;
 104
 105	reg += offset / 8;
 106	ret = abx500_get_register_interruptible(pct->dev,
 107						AB8500_MISC, reg, &val);
 108	if (ret < 0) {
 109		dev_err(pct->dev,
 110			"%s read reg =%x, offset=%x failed (%d)\n",
 111			__func__, reg, offset, ret);
 112		return ret;
 113	}
 114
 115	*bit = !!(val & BIT(pos));
 116
 117	return 0;
 118}
 119
 120static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
 121				unsigned offset, int val)
 122{
 123	struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 124	u8 pos = offset % 8;
 125	int ret;
 126
 127	reg += offset / 8;
 128	ret = abx500_mask_and_set_register_interruptible(pct->dev,
 129				AB8500_MISC, reg, BIT(pos), val << pos);
 130	if (ret < 0)
 131		dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
 132				__func__, reg, offset, ret);
 133
 134	return ret;
 135}
 136
 137/**
 138 * abx500_gpio_get() - Get the particular GPIO value
 139 * @chip:	Gpio device
 140 * @offset:	GPIO number to read
 141 */
 142static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
 143{
 144	struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 145	bool bit;
 146	bool is_out;
 147	u8 gpio_offset = offset - 1;
 148	int ret;
 149
 150	ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 151			gpio_offset, &is_out);
 152	if (ret < 0)
 153		goto out;
 154
 155	if (is_out)
 156		ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
 157				gpio_offset, &bit);
 158	else
 159		ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
 160				gpio_offset, &bit);
 161out:
 162	if (ret < 0) {
 163		dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 164		return ret;
 165	}
 166
 167	return bit;
 168}
 169
 170static int abx500_gpio_set(struct gpio_chip *chip, unsigned int offset,
 171			   int val)
 172{
 173	return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 174}
 175
 176static int abx500_gpio_direction_output(struct gpio_chip *chip,
 177					unsigned offset,
 178					int val)
 179{
 180	struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 181	int ret;
 182
 183	/* set direction as output */
 184	ret = abx500_gpio_set_bits(chip,
 185				AB8500_GPIO_DIR1_REG,
 186				offset,
 187				ABX500_GPIO_OUTPUT);
 188	if (ret < 0)
 189		goto out;
 190
 191	/* disable pull down */
 192	ret = abx500_gpio_set_bits(chip,
 193				AB8500_GPIO_PUD1_REG,
 194				offset,
 195				ABX500_GPIO_PULL_NONE);
 196
 197out:
 198	if (ret < 0) {
 199		dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 200		return ret;
 201	}
 202
 203	/* set the output as 1 or 0 */
 204	return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 205}
 206
 207static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 208{
 209	/* set the register as input */
 210	return abx500_gpio_set_bits(chip,
 211				AB8500_GPIO_DIR1_REG,
 212				offset,
 213				ABX500_GPIO_INPUT);
 214}
 215
 216static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 217{
 218	struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 219	/* The AB8500 GPIO numbers are off by one */
 220	int gpio = offset + 1;
 221	int hwirq;
 222	int i;
 223
 224	for (i = 0; i < pct->irq_cluster_size; i++) {
 225		struct abx500_gpio_irq_cluster *cluster =
 226			&pct->irq_cluster[i];
 227
 228		if (gpio >= cluster->start && gpio <= cluster->end) {
 229			/*
 230			 * The ABx500 GPIO's associated IRQs are clustered together
 231			 * throughout the interrupt numbers at irregular intervals.
 232			 * To solve this quandry, we have placed the read-in values
 233			 * into the cluster information table.
 234			 */
 235			hwirq = gpio - cluster->start + cluster->to_irq;
 236			return irq_create_mapping(pct->parent->domain, hwirq);
 237		}
 238	}
 239
 240	return -EINVAL;
 241}
 242
 243static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 244			   unsigned gpio, int alt_setting)
 245{
 246	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 247	struct alternate_functions af = pct->soc->alternate_functions[gpio];
 248	int ret;
 249	int val;
 250	unsigned offset;
 251
 252	const char *modes[] = {
 253		[ABX500_DEFAULT]	= "default",
 254		[ABX500_ALT_A]		= "altA",
 255		[ABX500_ALT_B]		= "altB",
 256		[ABX500_ALT_C]		= "altC",
 257	};
 258
 259	/* sanity check */
 260	if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
 261	    ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
 262	    ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
 263		dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
 264				modes[alt_setting]);
 265		return -EINVAL;
 266	}
 267
 268	/* on ABx5xx, there is no GPIO0, so adjust the offset */
 269	offset = gpio - 1;
 270
 271	switch (alt_setting) {
 272	case ABX500_DEFAULT:
 273		/*
 274		 * for ABx5xx family, default mode is always selected by
 275		 * writing 0 to GPIOSELx register, except for pins which
 276		 * support at least ALT_B mode, default mode is selected
 277		 * by writing 1 to GPIOSELx register
 278		 */
 279		val = 0;
 280		if (af.alt_bit1 != UNUSED)
 281			val++;
 282
 283		ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 284					   offset, val);
 285		break;
 286
 287	case ABX500_ALT_A:
 288		/*
 289		 * for ABx5xx family, alt_a mode is always selected by
 290		 * writing 1 to GPIOSELx register, except for pins which
 291		 * support at least ALT_B mode, alt_a mode is selected
 292		 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
 293		 * register
 294		 */
 295		if (af.alt_bit1 != UNUSED) {
 296			ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 297					offset, 0);
 298			if (ret < 0)
 299				goto out;
 300
 301			ret = abx500_gpio_set_bits(chip,
 302					AB8500_GPIO_ALTFUN_REG,
 303					af.alt_bit1,
 304					!!(af.alta_val & BIT(0)));
 305			if (ret < 0)
 306				goto out;
 307
 308			if (af.alt_bit2 != UNUSED)
 309				ret = abx500_gpio_set_bits(chip,
 310					AB8500_GPIO_ALTFUN_REG,
 311					af.alt_bit2,
 312					!!(af.alta_val & BIT(1)));
 313		} else
 314			ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 315					offset, 1);
 316		break;
 317
 318	case ABX500_ALT_B:
 319		ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 320				offset, 0);
 321		if (ret < 0)
 322			goto out;
 323
 324		ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 325				af.alt_bit1, !!(af.altb_val & BIT(0)));
 326		if (ret < 0)
 327			goto out;
 328
 329		if (af.alt_bit2 != UNUSED)
 330			ret = abx500_gpio_set_bits(chip,
 331					AB8500_GPIO_ALTFUN_REG,
 332					af.alt_bit2,
 333					!!(af.altb_val & BIT(1)));
 334		break;
 335
 336	case ABX500_ALT_C:
 337		ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 338				offset, 0);
 339		if (ret < 0)
 340			goto out;
 341
 342		ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 343				af.alt_bit2, !!(af.altc_val & BIT(0)));
 344		if (ret < 0)
 345			goto out;
 346
 347		ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 348				af.alt_bit2, !!(af.altc_val & BIT(1)));
 349		break;
 350
 351	default:
 352		dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
 353
 354		return -EINVAL;
 355	}
 356out:
 357	if (ret < 0)
 358		dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 359
 360	return ret;
 361}
 362
 363#ifdef CONFIG_DEBUG_FS
 364static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 365			  unsigned gpio)
 366{
 367	u8 mode;
 368	bool bit_mode;
 369	bool alt_bit1;
 370	bool alt_bit2;
 371	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 372	struct alternate_functions af = pct->soc->alternate_functions[gpio];
 373	/* on ABx5xx, there is no GPIO0, so adjust the offset */
 374	unsigned offset = gpio - 1;
 375	int ret;
 376
 377	/*
 378	 * if gpiosel_bit is set to unused,
 379	 * it means no GPIO or special case
 380	 */
 381	if (af.gpiosel_bit == UNUSED)
 382		return ABX500_DEFAULT;
 383
 384	/* read GpioSelx register */
 385	ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
 386			af.gpiosel_bit, &bit_mode);
 387	if (ret < 0)
 388		goto out;
 389
 390	mode = bit_mode;
 391
 392	/* sanity check */
 393	if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
 394	    (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
 395		dev_err(pct->dev,
 396			"alt_bitX value not in correct range (-1 to 7)\n");
 397		return -EINVAL;
 398	}
 399
 400	/* if alt_bit2 is used, alt_bit1 must be used too */
 401	if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
 402		dev_err(pct->dev,
 403			"if alt_bit2 is used, alt_bit1 can't be unused\n");
 404		return -EINVAL;
 405	}
 406
 407	/* check if pin use AlternateFunction register */
 408	if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
 409		return mode;
 410	/*
 411	 * if pin GPIOSEL bit is set and pin supports alternate function,
 412	 * it means DEFAULT mode
 413	 */
 414	if (mode)
 415		return ABX500_DEFAULT;
 416
 417	/*
 418	 * pin use the AlternatFunction register
 419	 * read alt_bit1 value
 420	 */
 421	ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 422			    af.alt_bit1, &alt_bit1);
 423	if (ret < 0)
 424		goto out;
 425
 426	if (af.alt_bit2 != UNUSED) {
 427		/* read alt_bit2 value */
 428		ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 429				af.alt_bit2,
 430				&alt_bit2);
 431		if (ret < 0)
 432			goto out;
 433	} else
 434		alt_bit2 = 0;
 435
 436	mode = (alt_bit2 << 1) + alt_bit1;
 437	if (mode == af.alta_val)
 438		return ABX500_ALT_A;
 439	else if (mode == af.altb_val)
 440		return ABX500_ALT_B;
 441	else
 442		return ABX500_ALT_C;
 443
 444out:
 445	dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 446	return ret;
 447}
 448
 449static void abx500_gpio_dbg_show_one(struct seq_file *s,
 450				     struct pinctrl_dev *pctldev,
 451				     struct gpio_chip *chip,
 452				     unsigned offset, unsigned gpio)
 453{
 454	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 455	u8 gpio_offset = offset - 1;
 456	int mode = -1;
 457	bool is_out;
 458	bool pd;
 459	int ret = -ENOMEM;
 460
 461	const char *modes[] = {
 462		[ABX500_DEFAULT]	= "default",
 463		[ABX500_ALT_A]		= "altA",
 464		[ABX500_ALT_B]		= "altB",
 465		[ABX500_ALT_C]		= "altC",
 466	};
 467
 468	const char *pull_up_down[] = {
 469		[ABX500_GPIO_PULL_DOWN]		= "pull down",
 470		[ABX500_GPIO_PULL_NONE]		= "pull none",
 471		[ABX500_GPIO_PULL_NONE + 1]	= "pull none",
 472		[ABX500_GPIO_PULL_UP]		= "pull up",
 473	};
 474
 475	char *label __free(kfree) = gpiochip_dup_line_label(chip, offset - 1);
 476	if (IS_ERR(label))
 477		goto out;
 478
 479	ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 480			gpio_offset, &is_out);
 481	if (ret < 0)
 482		goto out;
 483
 484	seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
 485		   gpio, label ?: "(none)",
 486		   is_out ? "out" : "in ");
 487
 488	if (!is_out) {
 489		ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
 490				gpio_offset, &pd);
 491		if (ret < 0)
 492			goto out;
 493
 494		seq_printf(s, " %-9s", pull_up_down[pd]);
 495	} else
 496		seq_printf(s, " %-9s", str_hi_lo(chip->get(chip, offset)));
 497
 498	mode = abx500_get_mode(pctldev, chip, offset);
 499
 500	seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 501
 502out:
 503	if (ret < 0)
 504		dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 505}
 506
 507static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 508{
 509	unsigned i;
 510	unsigned gpio = chip->base;
 511	struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 512	struct pinctrl_dev *pctldev = pct->pctldev;
 513
 514	for (i = 0; i < chip->ngpio; i++, gpio++) {
 515		/* On AB8500, there is no GPIO0, the first is the GPIO 1 */
 516		abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
 517		seq_putc(s, '\n');
 518	}
 519}
 520
 521#else
 522static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
 523					    struct pinctrl_dev *pctldev,
 524					    struct gpio_chip *chip,
 525					    unsigned offset, unsigned gpio)
 526{
 527}
 528#define abx500_gpio_dbg_show	NULL
 529#endif
 530
 531static const struct gpio_chip abx500gpio_chip = {
 532	.label			= "abx500-gpio",
 533	.owner			= THIS_MODULE,
 534	.request		= gpiochip_generic_request,
 535	.free			= gpiochip_generic_free,
 536	.direction_input	= abx500_gpio_direction_input,
 537	.get			= abx500_gpio_get,
 538	.direction_output	= abx500_gpio_direction_output,
 539	.set			= abx500_gpio_set,
 540	.to_irq			= abx500_gpio_to_irq,
 541	.dbg_show		= abx500_gpio_dbg_show,
 542};
 543
 544static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
 545{
 546	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 547
 548	return pct->soc->nfunctions;
 549}
 550
 551static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
 552					 unsigned function)
 553{
 554	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 555
 556	return pct->soc->functions[function].name;
 557}
 558
 559static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 560				      unsigned function,
 561				      const char * const **groups,
 562				      unsigned * const num_groups)
 563{
 564	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 565
 566	*groups = pct->soc->functions[function].groups;
 567	*num_groups = pct->soc->functions[function].ngroups;
 568
 569	return 0;
 570}
 571
 572static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 573			  unsigned group)
 574{
 575	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 576	struct gpio_chip *chip = &pct->chip;
 577	const struct abx500_pingroup *g;
 578	int i;
 579	int ret = 0;
 580
 581	g = &pct->soc->groups[group];
 582	if (g->altsetting < 0)
 583		return -EINVAL;
 584
 585	dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
 586
 587	for (i = 0; i < g->npins; i++) {
 588		dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
 589			g->pins[i], g->altsetting);
 590
 591		ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
 592	}
 593
 594	if (ret < 0)
 595		dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 596
 597	return ret;
 598}
 599
 600static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
 601			       struct pinctrl_gpio_range *range,
 602			       unsigned offset)
 603{
 604	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 605	const struct abx500_pinrange *p;
 606	int ret;
 607	int i;
 608
 609	/*
 610	 * Different ranges have different ways to enable GPIO function on a
 611	 * pin, so refer back to our local range type, where we handily define
 612	 * what altfunc enables GPIO for a certain pin.
 613	 */
 614	for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
 615		p = &pct->soc->gpio_ranges[i];
 616		if ((offset >= p->offset) &&
 617		    (offset < (p->offset + p->npins)))
 618		  break;
 619	}
 620
 621	if (i == pct->soc->gpio_num_ranges) {
 622		dev_err(pct->dev, "%s failed to locate range\n", __func__);
 623		return -ENODEV;
 624	}
 625
 626	dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
 627		p->altfunc, offset);
 628
 629	ret = abx500_set_mode(pct->pctldev, &pct->chip,
 630			      offset, p->altfunc);
 631	if (ret < 0)
 632		dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
 633
 634	return ret;
 635}
 636
 637static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
 638				     struct pinctrl_gpio_range *range,
 639				     unsigned offset)
 640{
 641}
 642
 643static const struct pinmux_ops abx500_pinmux_ops = {
 644	.get_functions_count = abx500_pmx_get_funcs_cnt,
 645	.get_function_name = abx500_pmx_get_func_name,
 646	.get_function_groups = abx500_pmx_get_func_groups,
 647	.set_mux = abx500_pmx_set,
 648	.gpio_request_enable = abx500_gpio_request_enable,
 649	.gpio_disable_free = abx500_gpio_disable_free,
 650};
 651
 652static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
 653{
 654	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 655
 656	return pct->soc->ngroups;
 657}
 658
 659static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
 660					 unsigned selector)
 661{
 662	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 663
 664	return pct->soc->groups[selector].name;
 665}
 666
 667static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
 668				 unsigned selector,
 669				 const unsigned **pins,
 670				 unsigned *num_pins)
 671{
 672	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 673
 674	*pins = pct->soc->groups[selector].pins;
 675	*num_pins = pct->soc->groups[selector].npins;
 676
 677	return 0;
 678}
 679
 680static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
 681				struct seq_file *s, unsigned offset)
 682{
 683	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 684	struct gpio_chip *chip = &pct->chip;
 685
 686	abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
 687				 chip->base + offset - 1);
 688}
 689
 690static int abx500_dt_add_map_mux(struct pinctrl_map **map,
 691		unsigned *reserved_maps,
 692		unsigned *num_maps, const char *group,
 693		const char *function)
 694{
 695	if (*num_maps == *reserved_maps)
 696		return -ENOSPC;
 697
 698	(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 699	(*map)[*num_maps].data.mux.group = group;
 700	(*map)[*num_maps].data.mux.function = function;
 701	(*num_maps)++;
 702
 703	return 0;
 704}
 705
 706static int abx500_dt_add_map_configs(struct pinctrl_map **map,
 707		unsigned *reserved_maps,
 708		unsigned *num_maps, const char *group,
 709		unsigned long *configs, unsigned num_configs)
 710{
 711	unsigned long *dup_configs;
 712
 713	if (*num_maps == *reserved_maps)
 714		return -ENOSPC;
 715
 716	dup_configs = kmemdup_array(configs, num_configs, sizeof(*dup_configs), GFP_KERNEL);
 717	if (!dup_configs)
 718		return -ENOMEM;
 719
 720	(*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
 721
 722	(*map)[*num_maps].data.configs.group_or_pin = group;
 723	(*map)[*num_maps].data.configs.configs = dup_configs;
 724	(*map)[*num_maps].data.configs.num_configs = num_configs;
 725	(*num_maps)++;
 726
 727	return 0;
 728}
 729
 730static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
 731					const char *pin_name)
 732{
 733	int i, pin_number;
 734	struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
 735
 736	if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
 737		for (i = 0; i < npct->soc->npins; i++)
 738			if (npct->soc->pins[i].number == pin_number)
 739				return npct->soc->pins[i].name;
 740	return NULL;
 741}
 742
 743static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 744		struct device_node *np,
 745		struct pinctrl_map **map,
 746		unsigned *reserved_maps,
 747		unsigned *num_maps)
 748{
 749	int ret;
 750	const char *function = NULL;
 751	unsigned long *configs;
 752	unsigned int nconfigs = 0;
 753	struct property *prop;
 754
 755	ret = of_property_read_string(np, "function", &function);
 756	if (ret >= 0) {
 757		const char *group;
 758
 759		ret = of_property_count_strings(np, "groups");
 760		if (ret < 0)
 761			goto exit;
 762
 763		ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
 764						num_maps, ret);
 765		if (ret < 0)
 766			goto exit;
 767
 768		of_property_for_each_string(np, "groups", prop, group) {
 769			ret = abx500_dt_add_map_mux(map, reserved_maps,
 770					num_maps, group, function);
 771			if (ret < 0)
 772				goto exit;
 773		}
 774	}
 775
 776	ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
 777	if (nconfigs) {
 778		const char *gpio_name;
 779		const char *pin;
 780
 781		ret = of_property_count_strings(np, "pins");
 782		if (ret < 0)
 783			goto exit;
 784
 785		ret = pinctrl_utils_reserve_map(pctldev, map,
 786						reserved_maps,
 787						num_maps, ret);
 788		if (ret < 0)
 789			goto exit;
 790
 791		of_property_for_each_string(np, "pins", prop, pin) {
 792			gpio_name = abx500_find_pin_name(pctldev, pin);
 793
 794			ret = abx500_dt_add_map_configs(map, reserved_maps,
 795					num_maps, gpio_name, configs, 1);
 796			if (ret < 0)
 797				goto exit;
 798		}
 799	}
 800
 801exit:
 802	return ret;
 803}
 804
 805static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
 806				 struct device_node *np_config,
 807				 struct pinctrl_map **map, unsigned *num_maps)
 808{
 809	unsigned reserved_maps;
 810	int ret;
 811
 812	reserved_maps = 0;
 813	*map = NULL;
 814	*num_maps = 0;
 815
 816	for_each_child_of_node_scoped(np_config, np) {
 817		ret = abx500_dt_subnode_to_map(pctldev, np, map,
 818				&reserved_maps, num_maps);
 819		if (ret < 0) {
 820			pinctrl_utils_free_map(pctldev, *map, *num_maps);
 821			return ret;
 822		}
 823	}
 824
 825	return 0;
 826}
 827
 828static const struct pinctrl_ops abx500_pinctrl_ops = {
 829	.get_groups_count = abx500_get_groups_cnt,
 830	.get_group_name = abx500_get_group_name,
 831	.get_group_pins = abx500_get_group_pins,
 832	.pin_dbg_show = abx500_pin_dbg_show,
 833	.dt_node_to_map = abx500_dt_node_to_map,
 834	.dt_free_map = pinctrl_utils_free_map,
 835};
 836
 837static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
 838			  unsigned pin,
 839			  unsigned long *config)
 840{
 841	return -ENOSYS;
 842}
 843
 844static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
 845			  unsigned pin,
 846			  unsigned long *configs,
 847			  unsigned num_configs)
 848{
 849	struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 850	struct gpio_chip *chip = &pct->chip;
 851	unsigned offset;
 852	int ret = -EINVAL;
 853	int i;
 854	enum pin_config_param param;
 855	enum pin_config_param argument;
 856
 857	for (i = 0; i < num_configs; i++) {
 858		param = pinconf_to_config_param(configs[i]);
 859		argument = pinconf_to_config_argument(configs[i]);
 860
 861		dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
 862			pin, configs[i],
 863			(param == PIN_CONFIG_LEVEL) ? "output " : "input",
 864			(param == PIN_CONFIG_LEVEL) ?
 865			str_high_low(argument) :
 866			(argument ? "pull up" : "pull down"));
 867
 868		/* on ABx500, there is no GPIO0, so adjust the offset */
 869		offset = pin - 1;
 870
 871		switch (param) {
 872		case PIN_CONFIG_BIAS_DISABLE:
 873			ret = abx500_gpio_direction_input(chip, offset);
 874			if (ret < 0)
 875				goto out;
 876
 877			/* Chip only supports pull down */
 878			ret = abx500_gpio_set_bits(chip,
 879				AB8500_GPIO_PUD1_REG, offset,
 880				ABX500_GPIO_PULL_NONE);
 881			break;
 882
 883		case PIN_CONFIG_BIAS_PULL_DOWN:
 884			ret = abx500_gpio_direction_input(chip, offset);
 885			if (ret < 0)
 886				goto out;
 887			/*
 888			 * if argument = 1 set the pull down
 889			 * else clear the pull down
 890			 * Chip only supports pull down
 891			 */
 892			ret = abx500_gpio_set_bits(chip,
 893			AB8500_GPIO_PUD1_REG,
 894				offset,
 895				argument ? ABX500_GPIO_PULL_DOWN :
 896				ABX500_GPIO_PULL_NONE);
 897			break;
 898
 899		case PIN_CONFIG_BIAS_PULL_UP:
 900			ret = abx500_gpio_direction_input(chip, offset);
 901			if (ret < 0)
 902				goto out;
 903			/*
 904			 * if argument = 1 set the pull up
 905			 * else clear the pull up
 906			 */
 907			ret = abx500_gpio_direction_input(chip, offset);
 908			break;
 909
 910		case PIN_CONFIG_LEVEL:
 911			ret = abx500_gpio_direction_output(chip, offset,
 912				argument);
 913			break;
 914
 915		default:
 916			dev_err(chip->parent,
 917				"illegal configuration requested\n");
 918		}
 919	} /* for each config */
 920out:
 921	if (ret < 0)
 922		dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 923
 924	return ret;
 925}
 926
 927static const struct pinconf_ops abx500_pinconf_ops = {
 928	.pin_config_get = abx500_pin_config_get,
 929	.pin_config_set = abx500_pin_config_set,
 930	.is_generic = true,
 931};
 932
 933static struct pinctrl_desc abx500_pinctrl_desc = {
 934	.name = "pinctrl-abx500",
 935	.pctlops = &abx500_pinctrl_ops,
 936	.pmxops = &abx500_pinmux_ops,
 937	.confops = &abx500_pinconf_ops,
 938	.owner = THIS_MODULE,
 939};
 940
 941static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
 942{
 943	unsigned int lowest = 0;
 944	unsigned int highest = 0;
 945	unsigned int npins = 0;
 946	int i;
 947
 948	/*
 949	 * Compute number of GPIOs from the last SoC gpio range descriptors
 950	 * These ranges may include "holes" but the GPIO number space shall
 951	 * still be homogeneous, so we need to detect and account for any
 952	 * such holes so that these are included in the number of GPIO pins.
 953	 */
 954	for (i = 0; i < soc->gpio_num_ranges; i++) {
 955		unsigned gstart;
 956		unsigned gend;
 957		const struct abx500_pinrange *p;
 958
 959		p = &soc->gpio_ranges[i];
 960		gstart = p->offset;
 961		gend = p->offset + p->npins - 1;
 962
 963		if (i == 0) {
 964			/* First iteration, set start values */
 965			lowest = gstart;
 966			highest = gend;
 967		} else {
 968			if (gstart < lowest)
 969				lowest = gstart;
 970			if (gend > highest)
 971				highest = gend;
 972		}
 973	}
 974	/* this gives the absolute number of pins */
 975	npins = highest - lowest + 1;
 976	return npins;
 977}
 978
 979static const struct of_device_id abx500_gpio_match[] = {
 980	{ .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
 981	{ .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
 982	{ }
 983};
 984
 985static int abx500_gpio_probe(struct platform_device *pdev)
 986{
 987	struct device_node *np = pdev->dev.of_node;
 988	struct abx500_pinctrl *pct;
 989	unsigned int id = -1;
 990	int ret;
 991	int i;
 992
 993	if (!np) {
 994		dev_err(&pdev->dev, "gpio dt node missing\n");
 995		return -ENODEV;
 996	}
 997
 998	pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL);
 999	if (!pct)
1000		return -ENOMEM;
1001
1002	pct->dev = &pdev->dev;
1003	pct->parent = dev_get_drvdata(pdev->dev.parent);
1004	pct->chip = abx500gpio_chip;
1005	pct->chip.parent = &pdev->dev;
1006	pct->chip.base = -1; /* Dynamic allocation */
1007
1008	id = (unsigned long)device_get_match_data(&pdev->dev);
1009
1010	/* Poke in other ASIC variants here */
1011	switch (id) {
1012	case PINCTRL_AB8500:
1013		abx500_pinctrl_ab8500_init(&pct->soc);
1014		break;
1015	case PINCTRL_AB8505:
1016		abx500_pinctrl_ab8505_init(&pct->soc);
1017		break;
1018	default:
1019		dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1020		return -EINVAL;
1021	}
1022
1023	if (!pct->soc) {
1024		dev_err(&pdev->dev, "Invalid SOC data\n");
1025		return -EINVAL;
1026	}
1027
1028	pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1029	pct->irq_cluster = pct->soc->gpio_irq_cluster;
1030	pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1031
1032	ret = gpiochip_add_data(&pct->chip, pct);
1033	if (ret) {
1034		dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1035		return ret;
1036	}
1037	dev_info(&pdev->dev, "added gpiochip\n");
1038
1039	abx500_pinctrl_desc.pins = pct->soc->pins;
1040	abx500_pinctrl_desc.npins = pct->soc->npins;
1041	pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1042					     pct);
1043	if (IS_ERR(pct->pctldev)) {
1044		dev_err(&pdev->dev,
1045			"could not register abx500 pinctrl driver\n");
1046		ret = PTR_ERR(pct->pctldev);
1047		goto out_rem_chip;
1048	}
1049	dev_info(&pdev->dev, "registered pin controller\n");
1050
1051	/* We will handle a range of GPIO pins */
1052	for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1053		const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1054
1055		ret = gpiochip_add_pin_range(&pct->chip,
1056					dev_name(&pdev->dev),
1057					p->offset - 1, p->offset, p->npins);
1058		if (ret < 0)
1059			goto out_rem_chip;
1060	}
1061
1062	platform_set_drvdata(pdev, pct);
1063	dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1064
1065	return 0;
1066
1067out_rem_chip:
1068	gpiochip_remove(&pct->chip);
1069	return ret;
1070}
1071
1072/**
1073 * abx500_gpio_remove() - remove Ab8500-gpio driver
1074 * @pdev:	Platform device registered
1075 */
1076static void abx500_gpio_remove(struct platform_device *pdev)
1077{
1078	struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1079
1080	gpiochip_remove(&pct->chip);
1081}
1082
1083static struct platform_driver abx500_gpio_driver = {
1084	.driver = {
1085		.name = "abx500-gpio",
1086		.of_match_table = abx500_gpio_match,
1087	},
1088	.probe = abx500_gpio_probe,
1089	.remove = abx500_gpio_remove,
1090};
1091
1092static int __init abx500_gpio_init(void)
1093{
1094	return platform_driver_register(&abx500_gpio_driver);
1095}
1096core_initcall(abx500_gpio_init);