pinctrl-lakefield.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Intel Lakefield PCH pinctrl/GPIO driver
  4 *
  5 * Copyright (C) 2020, Intel Corporation
  6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  7 */
  8
  9#include <linux/mod_devicetable.h>
 10#include <linux/module.h>
 11#include <linux/platform_device.h>
 12#include <linux/pm.h>
 13
 14#include <linux/pinctrl/pinctrl.h>
 15
 16#include "pinctrl-intel.h"
 17
 18#define LKF_PAD_OWN	0x020
 19#define LKF_PADCFGLOCK	0x070
 20#define LKF_HOSTSW_OWN	0x090
 21#define LKF_GPI_IS	0x100
 22#define LKF_GPI_IE	0x110
 23
 24#define LKF_COMMUNITY(b, s, e, g)			\
 25	INTEL_COMMUNITY_GPPS(b, s, e, g, LKF)
 26
 27/* Lakefield */
 28static const struct pinctrl_pin_desc lkf_pins[] = {
 29	/* EAST */
 30	PINCTRL_PIN(0, "MDSI_A_TE0"),
 31	PINCTRL_PIN(1, "MDSI_A_TE1"),
 32	PINCTRL_PIN(2, "PANEL0_AVDD_EN"),
 33	PINCTRL_PIN(3, "PANEL0_BKLTEN"),
 34	PINCTRL_PIN(4, "PANEL0_BKLTCTL"),
 35	PINCTRL_PIN(5, "PANEL1_AVDD_EN"),
 36	PINCTRL_PIN(6, "PANEL1_BKLTEN"),
 37	PINCTRL_PIN(7, "PANEL1_BKLTCTL"),
 38	PINCTRL_PIN(8, "THC0_SPI1_IO_0"),
 39	PINCTRL_PIN(9, "THC0_SPI1_IO_1"),
 40	PINCTRL_PIN(10, "THC0_SPI1_IO_2"),
 41	PINCTRL_PIN(11, "THC0_SPI1_IO_3"),
 42	PINCTRL_PIN(12, "THC0_SPI1_CSB"),
 43	PINCTRL_PIN(13, "THC0_SPI1_CLK"),
 44	PINCTRL_PIN(14, "THC0_SPI1_RESETB"),
 45	PINCTRL_PIN(15, "THC0_SPI1_CLK_FB"),
 46	PINCTRL_PIN(16, "SPI_TOUCH_CLK_FB"),
 47	PINCTRL_PIN(17, "THC1_SPI2_IO_0"),
 48	PINCTRL_PIN(18, "THC1_SPI2_IO_1"),
 49	PINCTRL_PIN(19, "THC1_SPI2_IO_2"),
 50	PINCTRL_PIN(20, "THC1_SPI2_IO_3"),
 51	PINCTRL_PIN(21, "THC1_SPI2_CSB"),
 52	PINCTRL_PIN(22, "THC1_SPI2_CLK"),
 53	PINCTRL_PIN(23, "THC1_SPI2_RESETB"),
 54	PINCTRL_PIN(24, "THC1_SPI2_CLK_FB"),
 55	PINCTRL_PIN(25, "eSPI_IO_0"),
 56	PINCTRL_PIN(26, "eSPI_IO_1"),
 57	PINCTRL_PIN(27, "eSPI_IO_2"),
 58	PINCTRL_PIN(28, "eSPI_IO_3"),
 59	PINCTRL_PIN(29, "eSPI_CSB"),
 60	PINCTRL_PIN(30, "eSPI_RESETB"),
 61	PINCTRL_PIN(31, "eSPI_CLK"),
 62	PINCTRL_PIN(32, "eSPI_CLK_FB"),
 63	PINCTRL_PIN(33, "FAST_SPI0_IO_0"),
 64	PINCTRL_PIN(34, "FAST_SPI0_IO_1"),
 65	PINCTRL_PIN(35, "FAST_SPI0_IO_2"),
 66	PINCTRL_PIN(36, "FAST_SPI0_IO_3"),
 67	PINCTRL_PIN(37, "FAST_SPI0_CSB_0"),
 68	PINCTRL_PIN(38, "FAST_SPI0_CSB_2"),
 69	PINCTRL_PIN(39, "FAST_SPI0_CLK"),
 70	PINCTRL_PIN(40, "FAST_SPI_CLK_FB"),
 71	PINCTRL_PIN(41, "FAST_SPI0_CSB_1"),
 72	PINCTRL_PIN(42, "ISH_GP_12"),
 73	PINCTRL_PIN(43, "THC0_SPI1_INTB"),
 74	PINCTRL_PIN(44, "THC1_SPI2_INTB"),
 75	PINCTRL_PIN(45, "PANEL0_AVEE_EN"),
 76	PINCTRL_PIN(46, "PANEL0_VIO_EN"),
 77	PINCTRL_PIN(47, "PANEL1_AVEE_EN"),
 78	PINCTRL_PIN(48, "PANEL1_VIO_EN"),
 79	PINCTRL_PIN(49, "PANEL0_RESET"),
 80	PINCTRL_PIN(50, "PANEL1_RESET"),
 81	PINCTRL_PIN(51, "ISH_GP_15"),
 82	PINCTRL_PIN(52, "ISH_GP_16"),
 83	PINCTRL_PIN(53, "ISH_GP_17"),
 84	PINCTRL_PIN(54, "ISH_GP_18"),
 85	PINCTRL_PIN(55, "ISH_GP_19"),
 86	PINCTRL_PIN(56, "ISH_GP_20"),
 87	PINCTRL_PIN(57, "ISH_GP_21"),
 88	PINCTRL_PIN(58, "ISH_GP_22"),
 89	PINCTRL_PIN(59, "ISH_GP_23"),
 90	/* NORTHWEST */
 91	PINCTRL_PIN(60, "MCSI_GPIO_0"),
 92	PINCTRL_PIN(61, "MCSI_GPIO_1"),
 93	PINCTRL_PIN(62, "MCSI_GPIO_2"),
 94	PINCTRL_PIN(63, "MCSI_GPIO_3"),
 95	PINCTRL_PIN(64, "LPSS_I2C0_SDA"),
 96	PINCTRL_PIN(65, "LPSS_I2C0_SCL"),
 97	PINCTRL_PIN(66, "LPSS_I2C1_SDA"),
 98	PINCTRL_PIN(67, "LPSS_I2C1_SCL"),
 99	PINCTRL_PIN(68, "LPSS_I2C2_SDA"),
100	PINCTRL_PIN(69, "LPSS_I2C2_SCL"),
101	PINCTRL_PIN(70, "LPSS_I2C3_SDA"),
102	PINCTRL_PIN(71, "LPSS_I2C3_SCL"),
103	PINCTRL_PIN(72, "LPSS_I2C4_SDA"),
104	PINCTRL_PIN(73, "LPSS_I2C4_SCL"),
105	PINCTRL_PIN(74, "LPSS_I2C5_SDA"),
106	PINCTRL_PIN(75, "LPSS_I2C5_SCL"),
107	PINCTRL_PIN(76, "LPSS_I3C0_SDA"),
108	PINCTRL_PIN(77, "LPSS_I3C0_SCL"),
109	PINCTRL_PIN(78, "LPSS_I3C0_SCL_FB"),
110	PINCTRL_PIN(79, "LPSS_I3C1_SDA"),
111	PINCTRL_PIN(80, "LPSS_I3C1_SCL"),
112	PINCTRL_PIN(81, "LPSS_I3C1_SCL_FB"),
113	PINCTRL_PIN(82, "ISH_I2C0_SDA"),
114	PINCTRL_PIN(83, "ISH_I2C0_SCL"),
115	PINCTRL_PIN(84, "ISH_I2C1_SCL"),
116	PINCTRL_PIN(85, "ISH_I2C1_SDA"),
117	PINCTRL_PIN(86, "DBG_PMODE"),
118	PINCTRL_PIN(87, "BJTAG_TCK"),
119	PINCTRL_PIN(88, "BJTAG_TDI"),
120	PINCTRL_PIN(89, "BJTAGX"),
121	PINCTRL_PIN(90, "BPREQ_B"),
122	PINCTRL_PIN(91, "BJTAG_TMS"),
123	PINCTRL_PIN(92, "BPRDY_B"),
124	PINCTRL_PIN(93, "BJTAG_TDO"),
125	PINCTRL_PIN(94, "BJTAG_TRST_B_0"),
126	PINCTRL_PIN(95, "ISH_I3C0_SDA"),
127	PINCTRL_PIN(96, "ISH_I3C0_SCL"),
128	PINCTRL_PIN(97, "ISH_I3C0_SCL_FB"),
129	PINCTRL_PIN(98, "AVS_I2S_BCLK_0"),
130	PINCTRL_PIN(99, "AVS_I2S_MCLK_0"),
131	PINCTRL_PIN(100, "AVS_I2S_SFRM_0"),
132	PINCTRL_PIN(101, "AVS_I2S_RXD_0"),
133	PINCTRL_PIN(102, "AVS_I2S_TXD_0"),
134	PINCTRL_PIN(103, "AVS_I2S_BCLK_1"),
135	PINCTRL_PIN(104, "AVS_I2S_SFRM_1"),
136	PINCTRL_PIN(105, "AVS_I2S_RXD_1"),
137	PINCTRL_PIN(106, "AVS_I2S_TXD_1"),
138	PINCTRL_PIN(107, "AVS_I2S_BCLK_2"),
139	PINCTRL_PIN(108, "AVS_I2S_SFRM_2"),
140	PINCTRL_PIN(109, "AVS_I2S_RXD_2"),
141	PINCTRL_PIN(110, "AVS_I2S_TXD_2"),
142	PINCTRL_PIN(111, "AVS_I2S_BCLK_3"),
143	PINCTRL_PIN(112, "AVS_I2S_SFRM_3"),
144	PINCTRL_PIN(113, "AVS_I2S_RXD_3"),
145	PINCTRL_PIN(114, "AVS_I2S_TXD_3"),
146	PINCTRL_PIN(115, "AVS_I2S_BCLK_4"),
147	PINCTRL_PIN(116, "AVS_I2S_SFRM_4"),
148	PINCTRL_PIN(117, "AVS_I2S_RXD_4"),
149	PINCTRL_PIN(118, "AVS_I2S_TXD_4"),
150	PINCTRL_PIN(119, "AVS_I2S_SFRM_5"),
151	PINCTRL_PIN(120, "AVS_I2S_RXD_5"),
152	PINCTRL_PIN(121, "AVS_I2S_TXD_5"),
153	PINCTRL_PIN(122, "AVS_I2S_BCLK_5"),
154	PINCTRL_PIN(123, "AVS_SNDW_CLK_0"),
155	PINCTRL_PIN(124, "AVS_SNDW_DATA_0"),
156	PINCTRL_PIN(125, "AVS_SNDW_CLK_1"),
157	PINCTRL_PIN(126, "AVS_SNDW_DATA_1"),
158	PINCTRL_PIN(127, "AVS_SNDW_CLK_2"),
159	PINCTRL_PIN(128, "AVS_SNDW_DATA_2"),
160	PINCTRL_PIN(129, "AVS_SNDW_CLK_3"),
161	PINCTRL_PIN(130, "AVS_SNDW_DATA_3"),
162	PINCTRL_PIN(131, "VISA_PTI_CH0_D0_internal"),
163	PINCTRL_PIN(132, "VISA_PTI_CH0_D1_internal"),
164	PINCTRL_PIN(133, "VISA_PTI_CH0_D2_internal"),
165	PINCTRL_PIN(134, "VISA_PTI_CH0_D3_internal"),
166	PINCTRL_PIN(135, "VISA_PTI_CH0_D4_internal"),
167	PINCTRL_PIN(136, "VISA_PTI_CH0_D5_internal"),
168	PINCTRL_PIN(137, "VISA_PTI_CH0_D6_internal"),
169	PINCTRL_PIN(138, "VISA_PTI_CH0_D7_internal"),
170	PINCTRL_PIN(139, "VISA_PTI_CH0_CLK_internal"),
171	PINCTRL_PIN(140, "VISA_PTI_CH1_D0_internal"),
172	PINCTRL_PIN(141, "VISA_PTI_CH1_D1_internal"),
173	PINCTRL_PIN(142, "VISA_PTI_CH1_D2_internal"),
174	PINCTRL_PIN(143, "VISA_PTI_CH1_D3_internal"),
175	PINCTRL_PIN(144, "VISA_PTI_CH1_D4_internal"),
176	PINCTRL_PIN(145, "VISA_PTI_CH1_D5_internal"),
177	PINCTRL_PIN(146, "VISA_PTI_CH1_D6_internal"),
178	PINCTRL_PIN(147, "VISA_PTI_CH1_D7_internal"),
179	PINCTRL_PIN(148, "VISA_PTI_CH1_CLK_internal"),
180	/* WEST */
181	PINCTRL_PIN(149, "LPSS_UART0_TXD"),
182	PINCTRL_PIN(150, "LPSS_UART0_RXD"),
183	PINCTRL_PIN(151, "LPSS_UART0_RTS_B"),
184	PINCTRL_PIN(152, "LPSS_UART0_CTS_B"),
185	PINCTRL_PIN(153, "LPSS_UART1_RXD"),
186	PINCTRL_PIN(154, "LPSS_UART1_TXD"),
187	PINCTRL_PIN(155, "LPSS_UART1_RTS_B"),
188	PINCTRL_PIN(156, "LPSS_UART1_CTS_B"),
189	PINCTRL_PIN(157, "ISH_UART0_RXD"),
190	PINCTRL_PIN(158, "ISH_UART0_TXD"),
191	PINCTRL_PIN(159, "ISH_UART0_RTSB"),
192	PINCTRL_PIN(160, "ISH_UART0_CTSB"),
193	PINCTRL_PIN(161, "LPSS_SSP_0_CLK"),
194	PINCTRL_PIN(162, "LPSS_SSP_0_CLK_FB"),
195	PINCTRL_PIN(163, "LPSS_SSP_0_FS0"),
196	PINCTRL_PIN(164, "LPSS_SSP_0_FS1"),
197	PINCTRL_PIN(165, "LPSS_SSP_0_RXD"),
198	PINCTRL_PIN(166, "LPSS_SSP_0_TXD"),
199	PINCTRL_PIN(167, "ISH_UART1_RXD"),
200	PINCTRL_PIN(168, "ISH_UART1_TXD"),
201	PINCTRL_PIN(169, "ISH_UART1_RTSB"),
202	PINCTRL_PIN(170, "ISH_UART1_CTSB"),
203	PINCTRL_PIN(171, "LPSS_SSP_1_FS0"),
204	PINCTRL_PIN(172, "LPSS_SSP_1_FS1"),
205	PINCTRL_PIN(173, "LPSS_SSP_1_CLK"),
206	PINCTRL_PIN(174, "LPSS_SSP_1_CLK_FB"),
207	PINCTRL_PIN(175, "LPSS_SSP_1_RXD"),
208	PINCTRL_PIN(176, "LPSS_SSP_1_TXD"),
209	PINCTRL_PIN(177, "LPSS_SSP_2_CLK"),
210	PINCTRL_PIN(178, "LPSS_SSP_2_CLK_FB"),
211	PINCTRL_PIN(179, "LPSS_SSP_2_FS0"),
212	PINCTRL_PIN(180, "LPSS_SSP_2_FS1"),
213	PINCTRL_PIN(181, "LPSS_SSP_2_RXD"),
214	PINCTRL_PIN(182, "LPSS_SSP_2_TXD"),
215	PINCTRL_PIN(183, "ISH_SPI0_CSB0"),
216	PINCTRL_PIN(184, "ISH_SPI0_CSB1"),
217	PINCTRL_PIN(185, "ISH_SPI0_CLK"),
218	PINCTRL_PIN(186, "ISH_SPI0_MISO"),
219	PINCTRL_PIN(187, "ISH_SPI0_MOSI"),
220	PINCTRL_PIN(188, "ISH_GP_0"),
221	PINCTRL_PIN(189, "ISH_GP_1"),
222	PINCTRL_PIN(190, "ISH_GP_2"),
223	PINCTRL_PIN(191, "ISH_GP_13"),
224	PINCTRL_PIN(192, "ISH_GP_3"),
225	PINCTRL_PIN(193, "ISH_GP_4"),
226	PINCTRL_PIN(194, "ISH_GP_5"),
227	PINCTRL_PIN(195, "ISH_GP_6"),
228	PINCTRL_PIN(196, "ISH_GP_7"),
229	PINCTRL_PIN(197, "ISH_GP_8"),
230	PINCTRL_PIN(198, "ISH_GP_9"),
231	PINCTRL_PIN(199, "ISH_GP_10"),
232	PINCTRL_PIN(200, "ISH_GP_11"),
233	PINCTRL_PIN(201, "ISH_GP_14"),
234	PINCTRL_PIN(202, "ISH_GP_15"),
235	PINCTRL_PIN(203, "ISH_GP_22"),
236	PINCTRL_PIN(204, "ISH_GP_12"),
237	PINCTRL_PIN(205, "ISH_GP_30_USB_OC"),
238	PINCTRL_PIN(206, "LPDDRx_RESET0_n"),
239	PINCTRL_PIN(207, "UFS_RESET_B"),
240	PINCTRL_PIN(208, "UFS_REFCLK0"),
241	PINCTRL_PIN(209, "EMMC_SD_CLK"),
242	PINCTRL_PIN(210, "EMMC_SD_D0"),
243	PINCTRL_PIN(211, "EMMC_SD_D1"),
244	PINCTRL_PIN(212, "EMMC_SD_D2"),
245	PINCTRL_PIN(213, "EMMC_SD_D3"),
246	PINCTRL_PIN(214, "EMMC_D4"),
247	PINCTRL_PIN(215, "EMMC_D5"),
248	PINCTRL_PIN(216, "EMMC_D6"),
249	PINCTRL_PIN(217, "EMMC_D7"),
250	PINCTRL_PIN(218, "EMMC_SD_CMD"),
251	PINCTRL_PIN(219, "EMMC_RCLK"),
252	PINCTRL_PIN(220, "SDCARD_CLK_FB"),
253	PINCTRL_PIN(221, "SD_Virtual_GPIO"),
254	PINCTRL_PIN(222, "OSC_CLK_OUT_NFC"),
255	PINCTRL_PIN(223, "OSC_CLK_OUT_CAM_0"),
256	PINCTRL_PIN(224, "OSC_CLK_OUT_CAM_1"),
257	PINCTRL_PIN(225, "OSC_CLK_OUT_CAM_2"),
258	PINCTRL_PIN(226, "OSC_CLK_OUT_CAM_3"),
259	PINCTRL_PIN(227, "PCIe_LINKDOWN"),
260	PINCTRL_PIN(228, "NFC_CLK_REQ"),
261	PINCTRL_PIN(229, "PCIE_CLKREQ_N_DEV2"),
262	PINCTRL_PIN(230, "PCIE_CLKREQ_N_DEV3"),
263	PINCTRL_PIN(231, "PCIE_CLKREQ_N_DEV4"),
264	PINCTRL_PIN(232, "PCIE_CLKREQ_N_DEV1"),
265	PINCTRL_PIN(233, "PCIE_CLKREQ_N_DEV0"),
266	PINCTRL_PIN(234, "GMBUS_1_SCL"),
267	PINCTRL_PIN(235, "GMBUS_1_SDA"),
268	PINCTRL_PIN(236, "GMBUS_0_SCL"),
269	PINCTRL_PIN(237, "GMBUS_0_SDA"),
270	/* SOUTHEAST */
271	PINCTRL_PIN(238, "COMPUTE_PMIC_SVID_DATA"),
272	PINCTRL_PIN(239, "COMPUTE_PMIC_SVID_CLK"),
273	PINCTRL_PIN(240, "COMPUTE_PMIC_SVID_ALERT_B"),
274	PINCTRL_PIN(241, "ROP_PMIC_I2C_SCL"),
275	PINCTRL_PIN(242, "ROP_PMIC_I2C_SDA"),
276	PINCTRL_PIN(243, "ISH_TYPEC_I2C2_SDA"),
277	PINCTRL_PIN(244, "ISH_TYPEC_I2C2_SCL"),
278	PINCTRL_PIN(245, "COMPUTE_PMU_PROCHOT_B"),
279	PINCTRL_PIN(246, "PMU_CATERR_B"),
280	PINCTRL_PIN(247, "COMPUTE_PMIC_VR_READY"),
281	PINCTRL_PIN(248, "FORCE_FW_RELOAD"),
282	PINCTRL_PIN(249, "ROP_PMIC_IRQ_ISH_GPIO31_TPC_ALERT_B"),
283	PINCTRL_PIN(250, "ROP_PMIC_RESET_B"),
284	PINCTRL_PIN(251, "ROP_PMIC_STNBY_SLP_S0_B"),
285	PINCTRL_PIN(252, "ROP_PMIC_THERMTRIP_B"),
286	PINCTRL_PIN(253, "MODEM_CLKREQ"),
287	PINCTRL_PIN(254, "TPC0_BSSB_SBU1"),
288	PINCTRL_PIN(255, "TPC0_BSSB_SBU2"),
289	PINCTRL_PIN(256, "OSC_CLK_OUT_CAM_4"),
290	PINCTRL_PIN(257, "HPD1"),
291	PINCTRL_PIN(258, "HPD0"),
292	PINCTRL_PIN(259, "PMC_TIME_SYNC_0"),
293	PINCTRL_PIN(260, "PMC_TIME_SYNC_1"),
294	PINCTRL_PIN(261, "OSC_CLK_OUT_CAM_5"),
295	PINCTRL_PIN(262, "ISH_GP_20"),
296	PINCTRL_PIN(263, "ISH_GP_16"),
297	PINCTRL_PIN(264, "ISH_GP_17"),
298	PINCTRL_PIN(265, "ISH_GP_18"),
299	PINCTRL_PIN(266, "ISH_GP_19"),
300};
301
302static const struct intel_padgroup lkf_community0_gpps[] = {
303	INTEL_GPP(0, 0, 31, 0),		/* EAST_0 */
304	INTEL_GPP(1, 32, 59, 32),	/* EAST_1 */
305};
306
307static const struct intel_padgroup lkf_community1_gpps[] = {
308	INTEL_GPP(0, 60, 91, 64),	/* NORTHWEST_0 */
309	INTEL_GPP(1, 92, 123, 96),	/* NORTHWEST_1 */
310	INTEL_GPP(2, 124, 148, 128),	/* NORTHWEST_2 */
311};
312
313static const struct intel_padgroup lkf_community2_gpps[] = {
314	INTEL_GPP(0, 149, 180, 160),	/* WEST_0 */
315	INTEL_GPP(1, 181, 212, 192),	/* WEST_1 */
316	INTEL_GPP(2, 213, 237, 224),	/* WEST_2 */
317};
318
319static const struct intel_padgroup lkf_community3_gpps[] = {
320	INTEL_GPP(0, 238, 266, 256),	/* SOUTHEAST */
321};
322
323static const struct intel_community lkf_communities[] = {
324	LKF_COMMUNITY(0, 0, 59, lkf_community0_gpps),		/* EAST */
325	LKF_COMMUNITY(1, 60, 148, lkf_community1_gpps),		/* NORTHWEST */
326	LKF_COMMUNITY(2, 149, 237, lkf_community2_gpps),	/* WEST */
327	LKF_COMMUNITY(3, 238, 266, lkf_community3_gpps),	/* SOUTHEAST */
328};
329
330static const struct intel_pinctrl_soc_data lkf_soc_data = {
331	.pins = lkf_pins,
332	.npins = ARRAY_SIZE(lkf_pins),
333	.communities = lkf_communities,
334	.ncommunities = ARRAY_SIZE(lkf_communities),
335};
336
337static const struct acpi_device_id lkf_pinctrl_acpi_match[] = {
338	{ "INT34C4", (kernel_ulong_t)&lkf_soc_data },
339	{ }
340};
341MODULE_DEVICE_TABLE(acpi, lkf_pinctrl_acpi_match);
342
343static struct platform_driver lkf_pinctrl_driver = {
344	.probe = intel_pinctrl_probe_by_hid,
345	.driver = {
346		.name = "lakefield-pinctrl",
347		.acpi_match_table = lkf_pinctrl_acpi_match,
348		.pm = pm_sleep_ptr(&intel_pinctrl_pm_ops),
349	},
350};
351module_platform_driver(lkf_pinctrl_driver);
352
353MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
354MODULE_DESCRIPTION("Intel Lakefield PCH pinctrl/GPIO driver");
355MODULE_LICENSE("GPL v2");
356MODULE_IMPORT_NS("PINCTRL_INTEL");