pinctrl-alderlake.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Intel Alder Lake PCH pinctrl/GPIO driver
  4 *
  5 * Copyright (C) 2020, 2022 Intel Corporation
  6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  7 */
  8
  9#include <linux/mod_devicetable.h>
 10#include <linux/module.h>
 11#include <linux/platform_device.h>
 12#include <linux/pm.h>
 13
 14#include <linux/pinctrl/pinctrl.h>
 15
 16#include "pinctrl-intel.h"
 17
 18#define ADL_N_PAD_OWN		0x020
 19#define ADL_N_PADCFGLOCK	0x080
 20#define ADL_N_HOSTSW_OWN	0x0b0
 21#define ADL_N_GPI_IS		0x100
 22#define ADL_N_GPI_IE		0x120
 23
 24#define ADL_S_PAD_OWN		0x0a0
 25#define ADL_S_PADCFGLOCK	0x110
 26#define ADL_S_HOSTSW_OWN	0x150
 27#define ADL_S_GPI_IS		0x200
 28#define ADL_S_GPI_IE		0x220
 29
 30#define ADL_N_COMMUNITY(b, s, e, g)			\
 31	INTEL_COMMUNITY_GPPS(b, s, e, g, ADL_N)
 32
 33#define ADL_S_COMMUNITY(b, s, e, g)			\
 34	INTEL_COMMUNITY_GPPS(b, s, e, g, ADL_S)
 35
 36/* Alder Lake-N */
 37static const struct pinctrl_pin_desc adln_pins[] = {
 38	/* GPP_B */
 39	PINCTRL_PIN(0, "CORE_VID_0"),
 40	PINCTRL_PIN(1, "CORE_VID_1"),
 41	PINCTRL_PIN(2, "GPPC_B_2"),
 42	PINCTRL_PIN(3, "GPPC_B_3"),
 43	PINCTRL_PIN(4, "GPPC_B_4"),
 44	PINCTRL_PIN(5, "GPPC_B_5"),
 45	PINCTRL_PIN(6, "GPPC_B_6"),
 46	PINCTRL_PIN(7, "GPPC_B_7"),
 47	PINCTRL_PIN(8, "GPPC_B_8"),
 48	PINCTRL_PIN(9, "GPPC_B_9"),
 49	PINCTRL_PIN(10, "GPPC_B_10"),
 50	PINCTRL_PIN(11, "GPPC_B_11"),
 51	PINCTRL_PIN(12, "SLP_S0B"),
 52	PINCTRL_PIN(13, "PLTRSTB"),
 53	PINCTRL_PIN(14, "GPPC_B_14"),
 54	PINCTRL_PIN(15, "GPPC_B_15"),
 55	PINCTRL_PIN(16, "GPPC_B_16"),
 56	PINCTRL_PIN(17, "GPPC_B_17"),
 57	PINCTRL_PIN(18, "GPPC_B_18"),
 58	PINCTRL_PIN(19, "GPPC_B_19"),
 59	PINCTRL_PIN(20, "GPPC_B_20"),
 60	PINCTRL_PIN(21, "GPPC_B_21"),
 61	PINCTRL_PIN(22, "GPPC_B_22"),
 62	PINCTRL_PIN(23, "GPPC_B_23"),
 63	PINCTRL_PIN(24, "GSPI0_CLK_LOOPBK"),
 64	PINCTRL_PIN(25, "GSPI1_CLK_LOOPBK"),
 65	/* GPP_T */
 66	PINCTRL_PIN(26, "GPPC_T_0"),
 67	PINCTRL_PIN(27, "GPPC_T_1"),
 68	PINCTRL_PIN(28, "FUSA_DIAGTEST_EN"),
 69	PINCTRL_PIN(29, "FUSA_DIAGTEST_MODE"),
 70	PINCTRL_PIN(30, "GPPC_T_4"),
 71	PINCTRL_PIN(31, "GPPC_T_5"),
 72	PINCTRL_PIN(32, "GPPC_T_6"),
 73	PINCTRL_PIN(33, "GPPC_T_7"),
 74	PINCTRL_PIN(34, "GPPC_T_8"),
 75	PINCTRL_PIN(35, "GPPC_T_9"),
 76	PINCTRL_PIN(36, "GPPC_T_10"),
 77	PINCTRL_PIN(37, "GPPC_T_11"),
 78	PINCTRL_PIN(38, "GPPC_T_12"),
 79	PINCTRL_PIN(39, "GPPC_T_13"),
 80	PINCTRL_PIN(40, "GPPC_T_14"),
 81	PINCTRL_PIN(41, "GPPC_T_15"),
 82	/* GPP_A */
 83	PINCTRL_PIN(42, "ESPI_IO_0"),
 84	PINCTRL_PIN(43, "ESPI_IO_1"),
 85	PINCTRL_PIN(44, "ESPI_IO_2"),
 86	PINCTRL_PIN(45, "ESPI_IO_3"),
 87	PINCTRL_PIN(46, "ESPI_CS0B"),
 88	PINCTRL_PIN(47, "ESPI_ALERT0B"),
 89	PINCTRL_PIN(48, "ESPI_ALERT1B"),
 90	PINCTRL_PIN(49, "GPPC_A_7"),
 91	PINCTRL_PIN(50, "GPPC_A_8"),
 92	PINCTRL_PIN(51, "ESPI_CLK"),
 93	PINCTRL_PIN(52, "ESPI_RESETB"),
 94	PINCTRL_PIN(53, "GPPC_A_11"),
 95	PINCTRL_PIN(54, "GPPC_A_12"),
 96	PINCTRL_PIN(55, "GPPC_A_13"),
 97	PINCTRL_PIN(56, "GPPC_A_14"),
 98	PINCTRL_PIN(57, "GPPC_A_15"),
 99	PINCTRL_PIN(58, "GPPC_A_16"),
100	PINCTRL_PIN(59, "GPPC_A_17"),
101	PINCTRL_PIN(60, "GPPC_A_18"),
102	PINCTRL_PIN(61, "GPPC_A_19"),
103	PINCTRL_PIN(62, "GPPC_A_20"),
104	PINCTRL_PIN(63, "GPPC_A_21"),
105	PINCTRL_PIN(64, "GPPC_A_22"),
106	PINCTRL_PIN(65, "ESPI_CS1B"),
107	PINCTRL_PIN(66, "ESPI_CLK_LOOPBK"),
108	/* GPP_S */
109	PINCTRL_PIN(67, "GPP_S_0"),
110	PINCTRL_PIN(68, "GPP_S_1"),
111	PINCTRL_PIN(69, "GPP_S_2"),
112	PINCTRL_PIN(70, "GPP_S_3"),
113	PINCTRL_PIN(71, "GPP_S_4"),
114	PINCTRL_PIN(72, "GPP_S_5"),
115	PINCTRL_PIN(73, "GPP_S_6"),
116	PINCTRL_PIN(74, "GPP_S_7"),
117	/* GPP_I */
118	PINCTRL_PIN(75, "GPP_F_0_CNV_BRI_DT_UART0_RTSB"),
119	PINCTRL_PIN(76, "GPP_F_1_CNV_BRI_RSP_UART0_RXD"),
120	PINCTRL_PIN(77, "GPP_F_2_CNV_RGI_DT_UART0_TXD"),
121	PINCTRL_PIN(78, "GPP_F_3_CNV_RGI_RSP_UART0_CTSB"),
122	PINCTRL_PIN(79, "GPP_F_4_CNV_RF_RESET_B"),
123	PINCTRL_PIN(80, "GPP_F_5_MODEM_CLKREQ"),
124	PINCTRL_PIN(81, "GPP_F_6_CNV_PA_BLANKING"),
125	PINCTRL_PIN(82, "GPP_F_7_EMMC_CMD"),
126	PINCTRL_PIN(83, "GPP_F_8_EMMC_DATA0"),
127	PINCTRL_PIN(84, "GPP_F_9_EMMC_DATA1"),
128	PINCTRL_PIN(85, "GPP_F_10_EMMC_DATA2"),
129	PINCTRL_PIN(86, "GPP_F_11_EMMC_DATA3"),
130	PINCTRL_PIN(87, "GPP_F_12_EMMC_DATA4"),
131	PINCTRL_PIN(88, "GPP_F_13_EMMC_DATA5"),
132	PINCTRL_PIN(89, "GPP_F_14_EMMC_DATA6"),
133	PINCTRL_PIN(90, "GPP_F_15_EMMC_DATA7"),
134	PINCTRL_PIN(91, "GPP_F_16_EMMC_RCLK"),
135	PINCTRL_PIN(92, "GPP_F_17_EMMC_CLK"),
136	PINCTRL_PIN(93, "GPP_F_18_EMMC_RESETB"),
137	PINCTRL_PIN(94, "GPP_F_19_A4WP_PRESENT"),
138	/* GPP_H */
139	PINCTRL_PIN(95, "GPPC_H_0"),
140	PINCTRL_PIN(96, "GPPC_H_1"),
141	PINCTRL_PIN(97, "GPPC_H_2"),
142	PINCTRL_PIN(98, "GPPC_H_3"),
143	PINCTRL_PIN(99, "GPPC_H_4"),
144	PINCTRL_PIN(100, "GPPC_H_5"),
145	PINCTRL_PIN(101, "GPPC_H_6"),
146	PINCTRL_PIN(102, "GPPC_H_7"),
147	PINCTRL_PIN(103, "GPPC_H_8"),
148	PINCTRL_PIN(104, "GPPC_H_9"),
149	PINCTRL_PIN(105, "GPPC_H_10"),
150	PINCTRL_PIN(106, "GPPC_H_11"),
151	PINCTRL_PIN(107, "I2C7_SDA"),
152	PINCTRL_PIN(108, "I2C7_SCL"),
153	PINCTRL_PIN(109, "GPPC_H_14"),
154	PINCTRL_PIN(110, "GPPC_H_15"),
155	PINCTRL_PIN(111, "GPPC_H_16"),
156	PINCTRL_PIN(112, "GPPC_H_17"),
157	PINCTRL_PIN(113, "CPU_C10_GATEB"),
158	PINCTRL_PIN(114, "GPPC_H_19"),
159	PINCTRL_PIN(115, "GPPC_H_20"),
160	PINCTRL_PIN(116, "GPPC_H_21"),
161	PINCTRL_PIN(117, "GPPC_H_22"),
162	PINCTRL_PIN(118, "GPPC_H_23"),
163	/* GPP_D */
164	PINCTRL_PIN(119, "GPPC_D_0"),
165	PINCTRL_PIN(120, "GPPC_D_1"),
166	PINCTRL_PIN(121, "GPPC_D_2"),
167	PINCTRL_PIN(122, "GPPC_D_3"),
168	PINCTRL_PIN(123, "GPPC_D_4"),
169	PINCTRL_PIN(124, "GPPC_D_5"),
170	PINCTRL_PIN(125, "GPPC_D_6"),
171	PINCTRL_PIN(126, "GPPC_D_7"),
172	PINCTRL_PIN(127, "GPPC_D_8"),
173	PINCTRL_PIN(128, "BSSB_LS2_RX"),
174	PINCTRL_PIN(129, "BSSB_LS2_TX"),
175	PINCTRL_PIN(130, "BSSB_LS3_RX"),
176	PINCTRL_PIN(131, "BSSB_LS3_TX"),
177	PINCTRL_PIN(132, "GPPC_D_13"),
178	PINCTRL_PIN(133, "GPPC_D_14"),
179	PINCTRL_PIN(134, "GPPC_D_15"),
180	PINCTRL_PIN(135, "GPPC_D_16"),
181	PINCTRL_PIN(136, "GPPC_D_17"),
182	PINCTRL_PIN(137, "GPPC_D_18"),
183	PINCTRL_PIN(138, "GPPC_D_19"),
184	PINCTRL_PIN(139, "GSPI2_CLK_LOOPBK"),
185	/* vGPIO */
186	PINCTRL_PIN(140, "CNV_BTEN"),
187	PINCTRL_PIN(141, "CNV_BT_HOST_WAKEB"),
188	PINCTRL_PIN(142, "CNV_BT_IF_SELECT"),
189	PINCTRL_PIN(143, "vCNV_BT_UART_TXD"),
190	PINCTRL_PIN(144, "vCNV_BT_UART_RXD"),
191	PINCTRL_PIN(145, "vCNV_BT_UART_CTS_B"),
192	PINCTRL_PIN(146, "vCNV_BT_UART_RTS_B"),
193	PINCTRL_PIN(147, "vCNV_MFUART1_TXD"),
194	PINCTRL_PIN(148, "vCNV_MFUART1_RXD"),
195	PINCTRL_PIN(149, "vCNV_MFUART1_CTS_B"),
196	PINCTRL_PIN(150, "vCNV_MFUART1_RTS_B"),
197	PINCTRL_PIN(151, "vUART0_TXD"),
198	PINCTRL_PIN(152, "vUART0_RXD"),
199	PINCTRL_PIN(153, "vUART0_CTS_B"),
200	PINCTRL_PIN(154, "vUART0_RTS_B"),
201	PINCTRL_PIN(155, "vISH_UART0_TXD"),
202	PINCTRL_PIN(156, "vISH_UART0_RXD"),
203	PINCTRL_PIN(157, "vISH_UART0_CTS_B"),
204	PINCTRL_PIN(158, "vISH_UART0_RTS_B"),
205	PINCTRL_PIN(159, "vCNV_BT_I2S_BCLK"),
206	PINCTRL_PIN(160, "vCNV_BT_I2S_WS_SYNC"),
207	PINCTRL_PIN(161, "vCNV_BT_I2S_SDO"),
208	PINCTRL_PIN(162, "vCNV_BT_I2S_SDI"),
209	PINCTRL_PIN(163, "vI2S2_SCLK"),
210	PINCTRL_PIN(164, "vI2S2_SFRM"),
211	PINCTRL_PIN(165, "vI2S2_TXD"),
212	PINCTRL_PIN(166, "vI2S2_RXD"),
213	PINCTRL_PIN(167, "THC0_WOT_INT"),
214	PINCTRL_PIN(168, "THC1_WOT_INT"),
215	/* GPP_C */
216	PINCTRL_PIN(169, "SMBCLK"),
217	PINCTRL_PIN(170, "SMBDATA"),
218	PINCTRL_PIN(171, "SMBALERTB"),
219	PINCTRL_PIN(172, "SML0CLK"),
220	PINCTRL_PIN(173, "SML0DATA"),
221	PINCTRL_PIN(174, "GPPC_C_5"),
222	PINCTRL_PIN(175, "GPPC_C_6"),
223	PINCTRL_PIN(176, "GPPC_C_7"),
224	PINCTRL_PIN(177, "GPPC_C_8"),
225	PINCTRL_PIN(178, "GPPC_C_9"),
226	PINCTRL_PIN(179, "GPPC_C_10"),
227	PINCTRL_PIN(180, "GPPC_C_11"),
228	PINCTRL_PIN(181, "GPPC_C_12"),
229	PINCTRL_PIN(182, "GPPC_C_13"),
230	PINCTRL_PIN(183, "GPPC_C_14"),
231	PINCTRL_PIN(184, "GPPC_C_15"),
232	PINCTRL_PIN(185, "GPPC_C_16"),
233	PINCTRL_PIN(186, "GPPC_C_17"),
234	PINCTRL_PIN(187, "GPPC_C_18"),
235	PINCTRL_PIN(188, "GPPC_C_19"),
236	PINCTRL_PIN(189, "GPPC_C_20"),
237	PINCTRL_PIN(190, "GPPC_C_21"),
238	PINCTRL_PIN(191, "GPPC_C_22"),
239	PINCTRL_PIN(192, "GPPC_C_23"),
240	/* GPP_F */
241	PINCTRL_PIN(193, "CNV_BRI_DT"),
242	PINCTRL_PIN(194, "CNV_BRI_RSP"),
243	PINCTRL_PIN(195, "CNV_RGI_DT"),
244	PINCTRL_PIN(196, "CNV_RGI_RSP"),
245	PINCTRL_PIN(197, "CNV_RF_RESET_B"),
246	PINCTRL_PIN(198, "MODEM_CLKREQ"),
247	PINCTRL_PIN(199, "GPPC_F_6"),
248	PINCTRL_PIN(200, "GPPC_F_7"),
249	PINCTRL_PIN(201, "GPPC_F_8"),
250	PINCTRL_PIN(202, "BOOTMPC"),
251	PINCTRL_PIN(203, "GPPC_F_10"),
252	PINCTRL_PIN(204, "GPPC_F_11"),
253	PINCTRL_PIN(205, "GPPC_F_12"),
254	PINCTRL_PIN(206, "GPPC_F_13"),
255	PINCTRL_PIN(207, "GPPC_F_14"),
256	PINCTRL_PIN(208, "GPPC_F_15"),
257	PINCTRL_PIN(209, "GPPC_F_16"),
258	PINCTRL_PIN(210, "GPPC_F_17"),
259	PINCTRL_PIN(211, "GPPC_F_18"),
260	PINCTRL_PIN(212, "GPPC_F_19"),
261	PINCTRL_PIN(213, "EXT_PWR_GATEB"),
262	PINCTRL_PIN(214, "EXT_PWR_GATE2B"),
263	PINCTRL_PIN(215, "GPPC_F_22"),
264	PINCTRL_PIN(216, "GPPC_F_23"),
265	PINCTRL_PIN(217, "GPPF_CLK_LOOPBACK"),
266	/* HVCMOS */
267	PINCTRL_PIN(218, "L_BKLTEN"),
268	PINCTRL_PIN(219, "L_BKLTCTL"),
269	PINCTRL_PIN(220, "L_VDDEN"),
270	PINCTRL_PIN(221, "SYS_PWROK"),
271	PINCTRL_PIN(222, "SYS_RESETB"),
272	PINCTRL_PIN(223, "MLK_RSTB"),
273	/* GPP_E */
274	PINCTRL_PIN(224, "GPPC_E_0"),
275	PINCTRL_PIN(225, "GPPC_E_1"),
276	PINCTRL_PIN(226, "GPPC_E_2"),
277	PINCTRL_PIN(227, "GPPC_E_3"),
278	PINCTRL_PIN(228, "GPPC_E_4"),
279	PINCTRL_PIN(229, "GPPC_E_5"),
280	PINCTRL_PIN(230, "GPPC_E_6"),
281	PINCTRL_PIN(231, "GPPC_E_7"),
282	PINCTRL_PIN(232, "GPPC_E_8"),
283	PINCTRL_PIN(233, "GPPC_E_9"),
284	PINCTRL_PIN(234, "GPPC_E_10"),
285	PINCTRL_PIN(235, "GPPC_E_11"),
286	PINCTRL_PIN(236, "GPPC_E_12"),
287	PINCTRL_PIN(237, "GPPC_E_13"),
288	PINCTRL_PIN(238, "GPPC_E_14"),
289	PINCTRL_PIN(239, "FIVR_DIGPB_0"),
290	PINCTRL_PIN(240, "FIVR_DIGPB_1"),
291	PINCTRL_PIN(241, "GPPC_E_17"),
292	PINCTRL_PIN(242, "BSSB_LS0_RX"),
293	PINCTRL_PIN(243, "BSSB_LS0_TX"),
294	PINCTRL_PIN(244, "BSSB_LS1_RX"),
295	PINCTRL_PIN(245, "BSSB_LS1_TX"),
296	PINCTRL_PIN(246, "DNX_FORCE_RELOAD"),
297	PINCTRL_PIN(247, "GPPC_E_23"),
298	PINCTRL_PIN(248, "GPPE_CLK_LOOPBACK"),
299	/* GPP_R */
300	PINCTRL_PIN(249, "HDA_BCLK"),
301	PINCTRL_PIN(250, "HDA_SYNC"),
302	PINCTRL_PIN(251, "HDA_SDO"),
303	PINCTRL_PIN(252, "HDA_SDI_0"),
304	PINCTRL_PIN(253, "HDA_RSTB"),
305	PINCTRL_PIN(254, "GPP_R_5"),
306	PINCTRL_PIN(255, "GPP_R_6"),
307	PINCTRL_PIN(256, "GPP_R_7"),
308};
309
310static const struct intel_padgroup adln_community0_gpps[] = {
311	INTEL_GPP(0, 0, 25, 0),				/* GPP_B */
312	INTEL_GPP(1, 26, 41, 32),			/* GPP_T */
313	INTEL_GPP(2, 42, 66, 64),			/* GPP_A */
314};
315
316static const struct intel_padgroup adln_community1_gpps[] = {
317	INTEL_GPP(0, 67, 74, 96),			/* GPP_S */
318	INTEL_GPP(1, 75, 94, 128),			/* GPP_I */
319	INTEL_GPP(2, 95, 118, 160),			/* GPP_H */
320	INTEL_GPP(3, 119, 139, 192),			/* GPP_D */
321	INTEL_GPP(4, 140, 168, 224),			/* vGPIO */
322};
323
324static const struct intel_padgroup adln_community4_gpps[] = {
325	INTEL_GPP(0, 169, 192, 256),			/* GPP_C */
326	INTEL_GPP(1, 193, 217, 288),			/* GPP_F */
327	INTEL_GPP(2, 218, 223, INTEL_GPIO_BASE_NOMAP),	/* HVCMOS */
328	INTEL_GPP(3, 224, 248, 320),			/* GPP_E */
329};
330
331static const struct intel_padgroup adln_community5_gpps[] = {
332	INTEL_GPP(0, 249, 256, 352),			/* GPP_R */
333};
334
335static const struct intel_community adln_communities[] = {
336	ADL_N_COMMUNITY(0, 0, 66, adln_community0_gpps),
337	ADL_N_COMMUNITY(1, 67, 168, adln_community1_gpps),
338	ADL_N_COMMUNITY(2, 169, 248, adln_community4_gpps),
339	ADL_N_COMMUNITY(3, 249, 256, adln_community5_gpps),
340};
341
342static const struct intel_pinctrl_soc_data adln_soc_data = {
343	.pins = adln_pins,
344	.npins = ARRAY_SIZE(adln_pins),
345	.communities = adln_communities,
346	.ncommunities = ARRAY_SIZE(adln_communities),
347};
348
349/* Alder Lake-S */
350static const struct pinctrl_pin_desc adls_pins[] = {
351	/* GPP_I */
352	PINCTRL_PIN(0, "EXT_PWR_GATEB"),
353	PINCTRL_PIN(1, "DDSP_HPD_1"),
354	PINCTRL_PIN(2, "DDSP_HPD_2"),
355	PINCTRL_PIN(3, "DDSP_HPD_3"),
356	PINCTRL_PIN(4, "DDSP_HPD_4"),
357	PINCTRL_PIN(5, "DDPB_CTRLCLK"),
358	PINCTRL_PIN(6, "DDPB_CTRLDATA"),
359	PINCTRL_PIN(7, "DDPC_CTRLCLK"),
360	PINCTRL_PIN(8, "DDPC_CTRLDATA"),
361	PINCTRL_PIN(9, "GSPI0_CS1B"),
362	PINCTRL_PIN(10, "GSPI1_CS1B"),
363	PINCTRL_PIN(11, "USB2_OCB_4"),
364	PINCTRL_PIN(12, "USB2_OCB_5"),
365	PINCTRL_PIN(13, "USB2_OCB_6"),
366	PINCTRL_PIN(14, "USB2_OCB_7"),
367	PINCTRL_PIN(15, "GSPI0_CS0B"),
368	PINCTRL_PIN(16, "GSPI0_CLK"),
369	PINCTRL_PIN(17, "GSPI0_MISO"),
370	PINCTRL_PIN(18, "GSPI0_MOSI"),
371	PINCTRL_PIN(19, "GSPI1_CS0B"),
372	PINCTRL_PIN(20, "GSPI1_CLK"),
373	PINCTRL_PIN(21, "GSPI1_MISO"),
374	PINCTRL_PIN(22, "GSPI1_MOSI"),
375	PINCTRL_PIN(23, "GSPI0_CLK_LOOPBK"),
376	PINCTRL_PIN(24, "GSPI1_CLK_LOOPBK"),
377	/* GPP_R */
378	PINCTRL_PIN(25, "HDA_BCLK"),
379	PINCTRL_PIN(26, "HDA_SYNC"),
380	PINCTRL_PIN(27, "HDA_SDO"),
381	PINCTRL_PIN(28, "HDA_SDI_0"),
382	PINCTRL_PIN(29, "HDA_RSTB"),
383	PINCTRL_PIN(30, "HDA_SDI_1"),
384	PINCTRL_PIN(31, "GPP_R_6"),
385	PINCTRL_PIN(32, "GPP_R_7"),
386	PINCTRL_PIN(33, "GPP_R_8"),
387	PINCTRL_PIN(34, "DDSP_HPD_A"),
388	PINCTRL_PIN(35, "DDSP_HPD_B"),
389	PINCTRL_PIN(36, "DDSP_HPD_C"),
390	PINCTRL_PIN(37, "ISH_SPI_CSB"),
391	PINCTRL_PIN(38, "ISH_SPI_CLK"),
392	PINCTRL_PIN(39, "ISH_SPI_MISO"),
393	PINCTRL_PIN(40, "ISH_SPI_MOSI"),
394	PINCTRL_PIN(41, "DDP1_CTRLCLK"),
395	PINCTRL_PIN(42, "DDP1_CTRLDATA"),
396	PINCTRL_PIN(43, "DDP2_CTRLCLK"),
397	PINCTRL_PIN(44, "DDP2_CTRLDATA"),
398	PINCTRL_PIN(45, "DDPA_CTRLCLK"),
399	PINCTRL_PIN(46, "DDPA_CTRLDATA"),
400	PINCTRL_PIN(47, "GSPI2_CLK_LOOPBK"),
401	/* GPP_J */
402	PINCTRL_PIN(48, "CNV_PA_BLANKING"),
403	PINCTRL_PIN(49, "CPU_C10_GATEB"),
404	PINCTRL_PIN(50, "CNV_BRI_DT"),
405	PINCTRL_PIN(51, "CNV_BRI_RSP"),
406	PINCTRL_PIN(52, "CNV_RGI_DT"),
407	PINCTRL_PIN(53, "CNV_RGI_RSP"),
408	PINCTRL_PIN(54, "CNV_MFUART2_RXD"),
409	PINCTRL_PIN(55, "CNV_MFUART2_TXD"),
410	PINCTRL_PIN(56, "SRCCLKREQB_16"),
411	PINCTRL_PIN(57, "SRCCLKREQB_17"),
412	PINCTRL_PIN(58, "BSSB_LS_RX"),
413	PINCTRL_PIN(59, "BSSB_LS_TX"),
414	/* vGPIO */
415	PINCTRL_PIN(60, "CNV_BTEN"),
416	PINCTRL_PIN(61, "CNV_BT_HOST_WAKEB"),
417	PINCTRL_PIN(62, "CNV_BT_IF_SELECT"),
418	PINCTRL_PIN(63, "vCNV_BT_UART_TXD"),
419	PINCTRL_PIN(64, "vCNV_BT_UART_RXD"),
420	PINCTRL_PIN(65, "vCNV_BT_UART_CTS_B"),
421	PINCTRL_PIN(66, "vCNV_BT_UART_RTS_B"),
422	PINCTRL_PIN(67, "vCNV_MFUART1_TXD"),
423	PINCTRL_PIN(68, "vCNV_MFUART1_RXD"),
424	PINCTRL_PIN(69, "vCNV_MFUART1_CTS_B"),
425	PINCTRL_PIN(70, "vCNV_MFUART1_RTS_B"),
426	PINCTRL_PIN(71, "vUART0_TXD"),
427	PINCTRL_PIN(72, "vUART0_RXD"),
428	PINCTRL_PIN(73, "vUART0_CTS_B"),
429	PINCTRL_PIN(74, "vUART0_RTS_B"),
430	PINCTRL_PIN(75, "vISH_UART0_TXD"),
431	PINCTRL_PIN(76, "vISH_UART0_RXD"),
432	PINCTRL_PIN(77, "vISH_UART0_CTS_B"),
433	PINCTRL_PIN(78, "vISH_UART0_RTS_B"),
434	PINCTRL_PIN(79, "vCNV_BT_I2S_BCLK"),
435	PINCTRL_PIN(80, "vCNV_BT_I2S_WS_SYNC"),
436	PINCTRL_PIN(81, "vCNV_BT_I2S_SDO"),
437	PINCTRL_PIN(82, "vCNV_BT_I2S_SDI"),
438	PINCTRL_PIN(83, "vI2S2_SCLK"),
439	PINCTRL_PIN(84, "vI2S2_SFRM"),
440	PINCTRL_PIN(85, "vI2S2_TXD"),
441	PINCTRL_PIN(86, "vI2S2_RXD"),
442	/* vGPIO_0 */
443	PINCTRL_PIN(87, "ESPI_USB_OCB_0"),
444	PINCTRL_PIN(88, "ESPI_USB_OCB_1"),
445	PINCTRL_PIN(89, "ESPI_USB_OCB_2"),
446	PINCTRL_PIN(90, "ESPI_USB_OCB_3"),
447	PINCTRL_PIN(91, "USB_CPU_OCB_0"),
448	PINCTRL_PIN(92, "USB_CPU_OCB_1"),
449	PINCTRL_PIN(93, "USB_CPU_OCB_2"),
450	PINCTRL_PIN(94, "USB_CPU_OCB_3"),
451	/* GPP_B */
452	PINCTRL_PIN(95, "PCIE_LNK_DOWN"),
453	PINCTRL_PIN(96, "ISH_UART0_RTSB"),
454	PINCTRL_PIN(97, "VRALERTB"),
455	PINCTRL_PIN(98, "CPU_GP_2"),
456	PINCTRL_PIN(99, "CPU_GP_3"),
457	PINCTRL_PIN(100, "SX_EXIT_HOLDOFFB"),
458	PINCTRL_PIN(101, "CLKOUT_48"),
459	PINCTRL_PIN(102, "ISH_GP_7"),
460	PINCTRL_PIN(103, "ISH_GP_0"),
461	PINCTRL_PIN(104, "ISH_GP_1"),
462	PINCTRL_PIN(105, "ISH_GP_2"),
463	PINCTRL_PIN(106, "I2S_MCLK"),
464	PINCTRL_PIN(107, "SLP_S0B"),
465	PINCTRL_PIN(108, "PLTRSTB"),
466	PINCTRL_PIN(109, "SPKR"),
467	PINCTRL_PIN(110, "ISH_GP_3"),
468	PINCTRL_PIN(111, "ISH_GP_4"),
469	PINCTRL_PIN(112, "ISH_GP_5"),
470	PINCTRL_PIN(113, "PMCALERTB"),
471	PINCTRL_PIN(114, "FUSA_DIAGTEST_EN"),
472	PINCTRL_PIN(115, "FUSA_DIAGTEST_MODE"),
473	PINCTRL_PIN(116, "GPP_B_21"),
474	PINCTRL_PIN(117, "GPP_B_22"),
475	PINCTRL_PIN(118, "SML1ALERTB"),
476	/* GPP_G */
477	PINCTRL_PIN(119, "GPP_G_0"),
478	PINCTRL_PIN(120, "GPP_G_1"),
479	PINCTRL_PIN(121, "DNX_FORCE_RELOAD"),
480	PINCTRL_PIN(122, "GMII_MDC_0"),
481	PINCTRL_PIN(123, "GMII_MDIO_0"),
482	PINCTRL_PIN(124, "SLP_DRAMB"),
483	PINCTRL_PIN(125, "GPP_G_6"),
484	PINCTRL_PIN(126, "GPP_G_7"),
485	/* GPP_H */
486	PINCTRL_PIN(127, "SRCCLKREQB_18"),
487	PINCTRL_PIN(128, "GPP_H_1"),
488	PINCTRL_PIN(129, "SRCCLKREQB_8"),
489	PINCTRL_PIN(130, "SRCCLKREQB_9"),
490	PINCTRL_PIN(131, "SRCCLKREQB_10"),
491	PINCTRL_PIN(132, "SRCCLKREQB_11"),
492	PINCTRL_PIN(133, "SRCCLKREQB_12"),
493	PINCTRL_PIN(134, "SRCCLKREQB_13"),
494	PINCTRL_PIN(135, "SRCCLKREQB_14"),
495	PINCTRL_PIN(136, "SRCCLKREQB_15"),
496	PINCTRL_PIN(137, "SML2CLK"),
497	PINCTRL_PIN(138, "SML2DATA"),
498	PINCTRL_PIN(139, "SML2ALERTB"),
499	PINCTRL_PIN(140, "SML3CLK"),
500	PINCTRL_PIN(141, "SML3DATA"),
501	PINCTRL_PIN(142, "SML3ALERTB"),
502	PINCTRL_PIN(143, "SML4CLK"),
503	PINCTRL_PIN(144, "SML4DATA"),
504	PINCTRL_PIN(145, "SML4ALERTB"),
505	PINCTRL_PIN(146, "ISH_I2C0_SDA"),
506	PINCTRL_PIN(147, "ISH_I2C0_SCL"),
507	PINCTRL_PIN(148, "ISH_I2C1_SDA"),
508	PINCTRL_PIN(149, "ISH_I2C1_SCL"),
509	PINCTRL_PIN(150, "TIME_SYNC_0"),
510	/* SPI0 */
511	PINCTRL_PIN(151, "SPI0_IO_2"),
512	PINCTRL_PIN(152, "SPI0_IO_3"),
513	PINCTRL_PIN(153, "SPI0_MOSI_IO_0"),
514	PINCTRL_PIN(154, "SPI0_MISO_IO_1"),
515	PINCTRL_PIN(155, "SPI0_TPM_CSB"),
516	PINCTRL_PIN(156, "SPI0_FLASH_0_CSB"),
517	PINCTRL_PIN(157, "SPI0_FLASH_1_CSB"),
518	PINCTRL_PIN(158, "SPI0_CLK"),
519	PINCTRL_PIN(159, "SPI0_CLK_LOOPBK"),
520	/* GPP_A */
521	PINCTRL_PIN(160, "ESPI_IO_0"),
522	PINCTRL_PIN(161, "ESPI_IO_1"),
523	PINCTRL_PIN(162, "ESPI_IO_2"),
524	PINCTRL_PIN(163, "ESPI_IO_3"),
525	PINCTRL_PIN(164, "ESPI_CS0B"),
526	PINCTRL_PIN(165, "ESPI_CLK"),
527	PINCTRL_PIN(166, "ESPI_RESETB"),
528	PINCTRL_PIN(167, "ESPI_CS1B"),
529	PINCTRL_PIN(168, "ESPI_CS2B"),
530	PINCTRL_PIN(169, "ESPI_CS3B"),
531	PINCTRL_PIN(170, "ESPI_ALERT0B"),
532	PINCTRL_PIN(171, "ESPI_ALERT1B"),
533	PINCTRL_PIN(172, "ESPI_ALERT2B"),
534	PINCTRL_PIN(173, "ESPI_ALERT3B"),
535	PINCTRL_PIN(174, "GPP_A_14"),
536	PINCTRL_PIN(175, "ESPI_CLK_LOOPBK"),
537	/* GPP_C */
538	PINCTRL_PIN(176, "SMBCLK"),
539	PINCTRL_PIN(177, "SMBDATA"),
540	PINCTRL_PIN(178, "SMBALERTB"),
541	PINCTRL_PIN(179, "ISH_UART0_RXD"),
542	PINCTRL_PIN(180, "ISH_UART0_TXD"),
543	PINCTRL_PIN(181, "SML0ALERTB"),
544	PINCTRL_PIN(182, "ISH_I2C2_SDA"),
545	PINCTRL_PIN(183, "ISH_I2C2_SCL"),
546	PINCTRL_PIN(184, "UART0_RXD"),
547	PINCTRL_PIN(185, "UART0_TXD"),
548	PINCTRL_PIN(186, "UART0_RTSB"),
549	PINCTRL_PIN(187, "UART0_CTSB"),
550	PINCTRL_PIN(188, "UART1_RXD"),
551	PINCTRL_PIN(189, "UART1_TXD"),
552	PINCTRL_PIN(190, "UART1_RTSB"),
553	PINCTRL_PIN(191, "UART1_CTSB"),
554	PINCTRL_PIN(192, "I2C0_SDA"),
555	PINCTRL_PIN(193, "I2C0_SCL"),
556	PINCTRL_PIN(194, "I2C1_SDA"),
557	PINCTRL_PIN(195, "I2C1_SCL"),
558	PINCTRL_PIN(196, "UART2_RXD"),
559	PINCTRL_PIN(197, "UART2_TXD"),
560	PINCTRL_PIN(198, "UART2_RTSB"),
561	PINCTRL_PIN(199, "UART2_CTSB"),
562	/* GPP_S */
563	PINCTRL_PIN(200, "SNDW1_CLK"),
564	PINCTRL_PIN(201, "SNDW1_DATA"),
565	PINCTRL_PIN(202, "SNDW2_CLK"),
566	PINCTRL_PIN(203, "SNDW2_DATA"),
567	PINCTRL_PIN(204, "SNDW3_CLK"),
568	PINCTRL_PIN(205, "SNDW3_DATA"),
569	PINCTRL_PIN(206, "SNDW4_CLK"),
570	PINCTRL_PIN(207, "SNDW4_DATA"),
571	/* GPP_E */
572	PINCTRL_PIN(208, "SATAXPCIE_0"),
573	PINCTRL_PIN(209, "SATAXPCIE_1"),
574	PINCTRL_PIN(210, "SATAXPCIE_2"),
575	PINCTRL_PIN(211, "CPU_GP_0"),
576	PINCTRL_PIN(212, "SATA_DEVSLP_0"),
577	PINCTRL_PIN(213, "SATA_DEVSLP_1"),
578	PINCTRL_PIN(214, "SATA_DEVSLP_2"),
579	PINCTRL_PIN(215, "CPU_GP_1"),
580	PINCTRL_PIN(216, "SATA_LEDB"),
581	PINCTRL_PIN(217, "USB2_OCB_0"),
582	PINCTRL_PIN(218, "USB2_OCB_1"),
583	PINCTRL_PIN(219, "USB2_OCB_2"),
584	PINCTRL_PIN(220, "USB2_OCB_3"),
585	PINCTRL_PIN(221, "SPI1_CSB"),
586	PINCTRL_PIN(222, "SPI1_CLK"),
587	PINCTRL_PIN(223, "SPI1_MISO_IO_1"),
588	PINCTRL_PIN(224, "SPI1_MOSI_IO_0"),
589	PINCTRL_PIN(225, "SPI1_IO_2"),
590	PINCTRL_PIN(226, "SPI1_IO_3"),
591	PINCTRL_PIN(227, "GPP_E_19"),
592	PINCTRL_PIN(228, "GPP_E_20"),
593	PINCTRL_PIN(229, "ISH_UART0_CTSB"),
594	PINCTRL_PIN(230, "SPI1_CLK_LOOPBK"),
595	/* GPP_K */
596	PINCTRL_PIN(231, "GSXDOUT"),
597	PINCTRL_PIN(232, "GSXSLOAD"),
598	PINCTRL_PIN(233, "GSXDIN"),
599	PINCTRL_PIN(234, "GSXSRESETB"),
600	PINCTRL_PIN(235, "GSXCLK"),
601	PINCTRL_PIN(236, "ADR_COMPLETE"),
602	PINCTRL_PIN(237, "GPP_K_6"),
603	PINCTRL_PIN(238, "GPP_K_7"),
604	PINCTRL_PIN(239, "CORE_VID_0"),
605	PINCTRL_PIN(240, "CORE_VID_1"),
606	PINCTRL_PIN(241, "GPP_K_10"),
607	PINCTRL_PIN(242, "GPP_K_11"),
608	PINCTRL_PIN(243, "SYS_PWROK"),
609	PINCTRL_PIN(244, "SYS_RESETB"),
610	PINCTRL_PIN(245, "MLK_RSTB"),
611	/* GPP_F */
612	PINCTRL_PIN(246, "SATAXPCIE_3"),
613	PINCTRL_PIN(247, "SATAXPCIE_4"),
614	PINCTRL_PIN(248, "SATAXPCIE_5"),
615	PINCTRL_PIN(249, "SATAXPCIE_6"),
616	PINCTRL_PIN(250, "SATAXPCIE_7"),
617	PINCTRL_PIN(251, "SATA_DEVSLP_3"),
618	PINCTRL_PIN(252, "SATA_DEVSLP_4"),
619	PINCTRL_PIN(253, "SATA_DEVSLP_5"),
620	PINCTRL_PIN(254, "SATA_DEVSLP_6"),
621	PINCTRL_PIN(255, "SATA_DEVSLP_7"),
622	PINCTRL_PIN(256, "SATA_SCLOCK"),
623	PINCTRL_PIN(257, "SATA_SLOAD"),
624	PINCTRL_PIN(258, "SATA_SDATAOUT1"),
625	PINCTRL_PIN(259, "SATA_SDATAOUT0"),
626	PINCTRL_PIN(260, "PS_ONB"),
627	PINCTRL_PIN(261, "M2_SKT2_CFG_0"),
628	PINCTRL_PIN(262, "M2_SKT2_CFG_1"),
629	PINCTRL_PIN(263, "M2_SKT2_CFG_2"),
630	PINCTRL_PIN(264, "M2_SKT2_CFG_3"),
631	PINCTRL_PIN(265, "L_VDDEN"),
632	PINCTRL_PIN(266, "L_BKLTEN"),
633	PINCTRL_PIN(267, "L_BKLTCTL"),
634	PINCTRL_PIN(268, "VNN_CTRL"),
635	PINCTRL_PIN(269, "GPP_F_23"),
636	/* GPP_D */
637	PINCTRL_PIN(270, "SRCCLKREQB_0"),
638	PINCTRL_PIN(271, "SRCCLKREQB_1"),
639	PINCTRL_PIN(272, "SRCCLKREQB_2"),
640	PINCTRL_PIN(273, "SRCCLKREQB_3"),
641	PINCTRL_PIN(274, "SML1CLK"),
642	PINCTRL_PIN(275, "I2S2_SFRM"),
643	PINCTRL_PIN(276, "I2S2_TXD"),
644	PINCTRL_PIN(277, "I2S2_RXD"),
645	PINCTRL_PIN(278, "I2S2_SCLK"),
646	PINCTRL_PIN(279, "SML0CLK"),
647	PINCTRL_PIN(280, "SML0DATA"),
648	PINCTRL_PIN(281, "SRCCLKREQB_4"),
649	PINCTRL_PIN(282, "SRCCLKREQB_5"),
650	PINCTRL_PIN(283, "SRCCLKREQB_6"),
651	PINCTRL_PIN(284, "SRCCLKREQB_7"),
652	PINCTRL_PIN(285, "SML1DATA"),
653	PINCTRL_PIN(286, "GSPI3_CS0B"),
654	PINCTRL_PIN(287, "GSPI3_CLK"),
655	PINCTRL_PIN(288, "GSPI3_MISO"),
656	PINCTRL_PIN(289, "GSPI3_MOSI"),
657	PINCTRL_PIN(290, "UART3_RXD"),
658	PINCTRL_PIN(291, "UART3_TXD"),
659	PINCTRL_PIN(292, "UART3_RTSB"),
660	PINCTRL_PIN(293, "UART3_CTSB"),
661	PINCTRL_PIN(294, "GSPI3_CLK_LOOPBK"),
662	/* JTAG */
663	PINCTRL_PIN(295, "JTAG_TDO"),
664	PINCTRL_PIN(296, "JTAGX"),
665	PINCTRL_PIN(297, "PRDYB"),
666	PINCTRL_PIN(298, "PREQB"),
667	PINCTRL_PIN(299, "JTAG_TDI"),
668	PINCTRL_PIN(300, "JTAG_TMS"),
669	PINCTRL_PIN(301, "JTAG_TCK"),
670	PINCTRL_PIN(302, "DBG_PMODE"),
671	PINCTRL_PIN(303, "CPU_TRSTB"),
672};
673
674static const struct intel_padgroup adls_community0_gpps[] = {
675	INTEL_GPP(0, 0, 24, 0),				/* GPP_I */
676	INTEL_GPP(1, 25, 47, 32),			/* GPP_R */
677	INTEL_GPP(2, 48, 59, 64),			/* GPP_J */
678	INTEL_GPP(3, 60, 86, 96),			/* vGPIO */
679	INTEL_GPP(4, 87, 94, 128),			/* vGPIO_0 */
680};
681
682static const struct intel_padgroup adls_community1_gpps[] = {
683	INTEL_GPP(0, 95, 118, 160),			/* GPP_B */
684	INTEL_GPP(1, 119, 126, 192),			/* GPP_G */
685	INTEL_GPP(2, 127, 150, 224),			/* GPP_H */
686};
687
688static const struct intel_padgroup adls_community3_gpps[] = {
689	INTEL_GPP(0, 151, 159, INTEL_GPIO_BASE_NOMAP),	/* SPI0 */
690	INTEL_GPP(1, 160, 175, 256),			/* GPP_A */
691	INTEL_GPP(2, 176, 199, 288),			/* GPP_C */
692};
693
694static const struct intel_padgroup adls_community4_gpps[] = {
695	INTEL_GPP(0, 200, 207, 320),			/* GPP_S */
696	INTEL_GPP(1, 208, 230, 352),			/* GPP_E */
697	INTEL_GPP(2, 231, 245, 384),			/* GPP_K */
698	INTEL_GPP(3, 246, 269, 416),			/* GPP_F */
699};
700
701static const struct intel_padgroup adls_community5_gpps[] = {
702	INTEL_GPP(0, 270, 294, 448),			/* GPP_D */
703	INTEL_GPP(1, 295, 303, INTEL_GPIO_BASE_NOMAP),	/* JTAG */
704};
705
706static const struct intel_community adls_communities[] = {
707	ADL_S_COMMUNITY(0, 0, 94, adls_community0_gpps),
708	ADL_S_COMMUNITY(1, 95, 150, adls_community1_gpps),
709	ADL_S_COMMUNITY(2, 151, 199, adls_community3_gpps),
710	ADL_S_COMMUNITY(3, 200, 269, adls_community4_gpps),
711	ADL_S_COMMUNITY(4, 270, 303, adls_community5_gpps),
712};
713
714static const struct intel_pinctrl_soc_data adls_soc_data = {
715	.pins = adls_pins,
716	.npins = ARRAY_SIZE(adls_pins),
717	.communities = adls_communities,
718	.ncommunities = ARRAY_SIZE(adls_communities),
719};
720
721static const struct acpi_device_id adl_pinctrl_acpi_match[] = {
722	{ "INTC1056", (kernel_ulong_t)&adls_soc_data },
723	{ "INTC1057", (kernel_ulong_t)&adln_soc_data },
724	{ "INTC1085", (kernel_ulong_t)&adls_soc_data },
725	{ }
726};
727MODULE_DEVICE_TABLE(acpi, adl_pinctrl_acpi_match);
728
729static struct platform_driver adl_pinctrl_driver = {
730	.probe = intel_pinctrl_probe_by_hid,
731	.driver = {
732		.name = "alderlake-pinctrl",
733		.acpi_match_table = adl_pinctrl_acpi_match,
734		.pm = pm_sleep_ptr(&intel_pinctrl_pm_ops),
735	},
736};
737module_platform_driver(adl_pinctrl_driver);
738
739MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
740MODULE_DESCRIPTION("Intel Alder Lake PCH pinctrl/GPIO driver");
741MODULE_LICENSE("GPL v2");
742MODULE_IMPORT_NS("PINCTRL_INTEL");