FILE
Kconfig
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linux-6.19.14/drivers/pinctrl/intel/Kconfig
1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3menu "Intel pinctrl drivers" 4 depends on (ACPI && X86) || COMPILE_TEST 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 select PINCTRL_INTEL 9 help 10 driver for memory mapped GPIO functionality on Intel Baytrail 11 platforms. Supports 3 banks with 102, 28 and 44 gpios. 12 Most pins are usually muxed to some other functionality by firmware, 13 so only a small amount is available for gpio use. 14 15 Requires ACPI device enumeration code to set up a platform device. 16 17config PINCTRL_CHERRYVIEW 18 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" 19 select PINCTRL_INTEL 20 help 21 Cherryview/Braswell pinctrl driver provides an interface that 22 allows configuring of SoC pins and using them as GPIOs. 23 24config PINCTRL_LYNXPOINT 25 tristate "Intel Lynxpoint pinctrl and GPIO driver" 26 select PINCTRL_INTEL 27 help 28 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver 29 provides an interface that allows configuring of PCH pins and 30 using them as GPIOs. 31 32config PINCTRL_INTEL 33 tristate 34 select PINMUX 35 select PINCONF 36 select GENERIC_PINCONF 37 select GPIOLIB 38 select GPIOLIB_IRQCHIP 39 40config PINCTRL_INTEL_PLATFORM 41 tristate "Intel pinctrl and GPIO platform driver" 42 select PINCTRL_INTEL 43 help 44 This pinctrl driver provides an interface that allows configuring 45 of Intel PCH pins and using them as GPIOs. Currently the following 46 Intel SoCs / platforms require this to be functional: 47 - Lunar Lake 48 - Panther Lake 49 50config PINCTRL_ALDERLAKE 51 tristate "Intel Alder Lake pinctrl and GPIO driver" 52 select PINCTRL_INTEL 53 help 54 This pinctrl driver provides an interface that allows configuring 55 PCH pins of the following platforms and using them as GPIOs: 56 - Alder Lake HX, N, and S 57 - Raptor Lake HX, E, and S 58 - Twin Lake 59 60config PINCTRL_BROXTON 61 tristate "Intel Broxton pinctrl and GPIO driver" 62 select PINCTRL_INTEL 63 help 64 Broxton pinctrl driver provides an interface that allows 65 configuring of SoC pins and using them as GPIOs. 66 67config PINCTRL_CANNONLAKE 68 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver" 69 select PINCTRL_INTEL 70 help 71 This pinctrl driver provides an interface that allows configuring 72 of Intel Cannon Lake PCH pins and using them as GPIOs. 73 74config PINCTRL_CEDARFORK 75 tristate "Intel Cedar Fork pinctrl and GPIO driver" 76 select PINCTRL_INTEL 77 help 78 This pinctrl driver provides an interface that allows configuring 79 of Intel Cedar Fork PCH pins and using them as GPIOs. 80 81config PINCTRL_DENVERTON 82 tristate "Intel Denverton pinctrl and GPIO driver" 83 select PINCTRL_INTEL 84 help 85 This pinctrl driver provides an interface that allows configuring 86 of Intel Denverton SoC pins and using them as GPIOs. 87 88config PINCTRL_ELKHARTLAKE 89 tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver" 90 select PINCTRL_INTEL 91 help 92 This pinctrl driver provides an interface that allows configuring 93 of Intel Elkhart Lake SoC pins and using them as GPIOs. 94 95config PINCTRL_EMMITSBURG 96 tristate "Intel Emmitsburg pinctrl and GPIO driver" 97 select PINCTRL_INTEL 98 help 99 This pinctrl driver provides an interface that allows configuring 100 of Intel Emmitsburg pins and using them as GPIOs. 101 102config PINCTRL_GEMINILAKE 103 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver" 104 select PINCTRL_INTEL 105 help 106 This pinctrl driver provides an interface that allows configuring 107 of Intel Gemini Lake SoC pins and using them as GPIOs. 108 109config PINCTRL_ICELAKE 110 tristate "Intel Ice Lake PCH pinctrl and GPIO driver" 111 select PINCTRL_INTEL 112 help 113 This pinctrl driver provides an interface that allows configuring 114 of Intel Ice Lake PCH pins and using them as GPIOs. 115 116config PINCTRL_JASPERLAKE 117 tristate "Intel Jasper Lake PCH pinctrl and GPIO driver" 118 select PINCTRL_INTEL 119 help 120 This pinctrl driver provides an interface that allows configuring 121 of Intel Jasper Lake PCH pins and using them as GPIOs. 122 123config PINCTRL_LAKEFIELD 124 tristate "Intel Lakefield SoC pinctrl and GPIO driver" 125 select PINCTRL_INTEL 126 help 127 This pinctrl driver provides an interface that allows configuring 128 of Intel Lakefield SoC pins and using them as GPIOs. 129 130config PINCTRL_LEWISBURG 131 tristate "Intel Lewisburg pinctrl and GPIO driver" 132 select PINCTRL_INTEL 133 help 134 This pinctrl driver provides an interface that allows configuring 135 of Intel Lewisburg pins and using them as GPIOs. 136 137config PINCTRL_METEORLAKE 138 tristate "Intel Meteor Lake pinctrl and GPIO driver" 139 select PINCTRL_INTEL 140 help 141 This pinctrl driver provides an interface that allows configuring 142 SoC pins of the following platforms and using them as GPIOs: 143 - Arrow Lake (all variants) 144 - Meteor Lake (all variants) 145 146config PINCTRL_METEORPOINT 147 tristate "Intel Meteor Point pinctrl and GPIO driver" 148 select PINCTRL_INTEL 149 help 150 This pinctrl driver provides an interface that allows configuring 151 PCH pins of the following platforms and using them as GPIOs: 152 - Arrow Lake HX and S 153 154config PINCTRL_SUNRISEPOINT 155 tristate "Intel Sunrisepoint pinctrl and GPIO driver" 156 select PINCTRL_INTEL 157 help 158 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver 159 provides an interface that allows configuring of PCH pins and 160 using them as GPIOs. 161 162config PINCTRL_TIGERLAKE 163 tristate "Intel Tiger Lake pinctrl and GPIO driver" 164 select PINCTRL_INTEL 165 help 166 This pinctrl driver provides an interface that allows configuring 167 PCH pins of the following platforms and using them as GPIOs: 168 - Alder Lake H, P, PS, and U 169 - Raptor Lake H, P, PS, PX, and U 170 - Rocket Lake S 171 - Tiger Lake (all variants) 172 173source "drivers/pinctrl/intel/Kconfig.tng" 174endmenu
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