pinctrl-aspeed-g6.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/* Copyright (C) 2019 IBM Corp. */
   3#include <linux/bitops.h>
   4#include <linux/init.h>
   5#include <linux/io.h>
   6#include <linux/kernel.h>
   7#include <linux/mfd/syscon.h>
   8#include <linux/mutex.h>
   9#include <linux/of.h>
  10#include <linux/platform_device.h>
  11#include <linux/pinctrl/pinctrl.h>
  12#include <linux/pinctrl/pinmux.h>
  13#include <linux/string.h>
  14#include <linux/types.h>
  15
  16#include "../core.h"
  17#include "../pinctrl-utils.h"
  18#include "pinctrl-aspeed.h"
  19
  20#define SCU040		0x040 /* Reset Control Set 1  */
  21#define SCU400		0x400 /* Multi-function Pin Control #1  */
  22#define SCU404		0x404 /* Multi-function Pin Control #2  */
  23#define SCU40C		0x40C /* Multi-function Pin Control #3  */
  24#define SCU410		0x410 /* Multi-function Pin Control #4  */
  25#define SCU414		0x414 /* Multi-function Pin Control #5  */
  26#define SCU418		0x418 /* Multi-function Pin Control #6  */
  27#define SCU41C		0x41C /* Multi-function Pin Control #7  */
  28#define SCU430		0x430 /* Multi-function Pin Control #8  */
  29#define SCU434		0x434 /* Multi-function Pin Control #9  */
  30#define SCU438		0x438 /* Multi-function Pin Control #10 */
  31#define SCU440		0x440 /* USB Multi-function Pin Control #12 */
  32#define SCU450		0x450 /* Multi-function Pin Control #14 */
  33#define SCU454		0x454 /* Multi-function Pin Control #15 */
  34#define SCU458		0x458 /* Multi-function Pin Control #16 */
  35#define SCU4B0		0x4B0 /* Multi-function Pin Control #17 */
  36#define SCU4B4		0x4B4 /* Multi-function Pin Control #18 */
  37#define SCU4B8		0x4B8 /* Multi-function Pin Control #19 */
  38#define SCU4BC		0x4BC /* Multi-function Pin Control #20 */
  39#define SCU4D4		0x4D4 /* Multi-function Pin Control #22 */
  40#define SCU4D8		0x4D8 /* Multi-function Pin Control #23 */
  41#define SCU500		0x500 /* Hardware Strap 1 */
  42#define SCU510		0x510 /* Hardware Strap 2 */
  43#define SCU610		0x610 /* Disable GPIO Internal Pull-Down #0 */
  44#define SCU614		0x614 /* Disable GPIO Internal Pull-Down #1 */
  45#define SCU618		0x618 /* Disable GPIO Internal Pull-Down #2 */
  46#define SCU61C		0x61c /* Disable GPIO Internal Pull-Down #3 */
  47#define SCU630		0x630 /* Disable GPIO Internal Pull-Down #4 */
  48#define SCU634		0x634 /* Disable GPIO Internal Pull-Down #5 */
  49#define SCU638		0x638 /* Disable GPIO Internal Pull-Down #6 */
  50#define SCU690		0x690 /* Multi-function Pin Control #24 */
  51#define SCU694		0x694 /* Multi-function Pin Control #25 */
  52#define SCU69C		0x69C /* Multi-function Pin Control #27 */
  53#define SCU6D0		0x6D0 /* Multi-function Pin Control #29 */
  54#define SCUC20		0xC20 /* PCIE configuration Setting Control */
  55
  56#define ASPEED_G6_NR_PINS 258
  57
  58#define M24 0
  59SIG_EXPR_LIST_DECL_SESG(M24, MDC3, MDIO3, SIG_DESC_SET(SCU410, 0));
  60SIG_EXPR_LIST_DECL_SESG(M24, SCL11, I2C11, SIG_DESC_SET(SCU4B0, 0));
  61PIN_DECL_2(M24, GPIOA0, MDC3, SCL11);
  62
  63#define M25 1
  64SIG_EXPR_LIST_DECL_SESG(M25, MDIO3, MDIO3, SIG_DESC_SET(SCU410, 1));
  65SIG_EXPR_LIST_DECL_SESG(M25, SDA11, I2C11, SIG_DESC_SET(SCU4B0, 1));
  66PIN_DECL_2(M25, GPIOA1, MDIO3, SDA11);
  67
  68FUNC_GROUP_DECL(MDIO3, M24, M25);
  69FUNC_GROUP_DECL(I2C11, M24, M25);
  70
  71#define L26 2
  72SIG_EXPR_LIST_DECL_SESG(L26, MDC4, MDIO4, SIG_DESC_SET(SCU410, 2));
  73SIG_EXPR_LIST_DECL_SESG(L26, SCL12, I2C12, SIG_DESC_SET(SCU4B0, 2));
  74PIN_DECL_2(L26, GPIOA2, MDC4, SCL12);
  75
  76#define K24 3
  77SIG_EXPR_LIST_DECL_SESG(K24, MDIO4, MDIO4, SIG_DESC_SET(SCU410, 3));
  78SIG_EXPR_LIST_DECL_SESG(K24, SDA12, I2C12, SIG_DESC_SET(SCU4B0, 3));
  79PIN_DECL_2(K24, GPIOA3, MDIO4, SDA12);
  80
  81FUNC_GROUP_DECL(MDIO4, L26, K24);
  82FUNC_GROUP_DECL(I2C12, L26, K24);
  83
  84#define K26 4
  85SIG_EXPR_LIST_DECL_SESG(K26, MACLINK1, MACLINK1, SIG_DESC_SET(SCU410, 4));
  86SIG_EXPR_LIST_DECL_SESG(K26, SCL13, I2C13, SIG_DESC_SET(SCU4B0, 4));
  87SIG_EXPR_LIST_DECL_SESG(K26, SGPS2CK, SGPS2, SIG_DESC_SET(SCU690, 4));
  88SIG_EXPR_LIST_DECL_SESG(K26, SGPM2CLK, SGPM2, SIG_DESC_SET(SCU6D0, 4));
  89PIN_DECL_4(K26, GPIOA4, MACLINK1, SCL13, SGPS2CK, SGPM2CLK);
  90FUNC_GROUP_DECL(MACLINK1, K26);
  91
  92#define L24 5
  93SIG_EXPR_LIST_DECL_SESG(L24, MACLINK2, MACLINK2, SIG_DESC_SET(SCU410, 5));
  94SIG_EXPR_LIST_DECL_SESG(L24, SDA13, I2C13, SIG_DESC_SET(SCU4B0, 5));
  95SIG_EXPR_LIST_DECL_SESG(L24, SGPS2LD, SGPS2, SIG_DESC_SET(SCU690, 5));
  96SIG_EXPR_LIST_DECL_SESG(L24, SGPM2LD, SGPM2, SIG_DESC_SET(SCU6D0, 5));
  97PIN_DECL_4(L24, GPIOA5, MACLINK2, SDA13, SGPS2LD, SGPM2LD);
  98FUNC_GROUP_DECL(MACLINK2, L24);
  99
 100FUNC_GROUP_DECL(I2C13, K26, L24);
 101
 102#define L23 6
 103SIG_EXPR_LIST_DECL_SESG(L23, MACLINK3, MACLINK3, SIG_DESC_SET(SCU410, 6));
 104SIG_EXPR_LIST_DECL_SESG(L23, SCL14, I2C14, SIG_DESC_SET(SCU4B0, 6));
 105SIG_EXPR_LIST_DECL_SESG(L23, SGPS2O, SGPS2, SIG_DESC_SET(SCU690, 6));
 106SIG_EXPR_LIST_DECL_SESG(L23, SGPM2O, SGPM2, SIG_DESC_SET(SCU6D0, 6));
 107PIN_DECL_4(L23, GPIOA6, MACLINK3, SCL14, SGPS2O, SGPM2O);
 108FUNC_GROUP_DECL(MACLINK3, L23);
 109
 110#define K25 7
 111SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));
 112SIG_EXPR_LIST_DECL_SESG(K25, SDA14, I2C14, SIG_DESC_SET(SCU4B0, 7));
 113SIG_EXPR_LIST_DECL_SESG(K25, SGPS2I, SGPS2, SIG_DESC_SET(SCU690, 7));
 114SIG_EXPR_LIST_DECL_SESG(K25, SGPM2I, SGPM2, SIG_DESC_SET(SCU6D0, 7));
 115PIN_DECL_4(K25, GPIOA7, MACLINK4, SDA14, SGPS2I, SGPM2I);
 116FUNC_GROUP_DECL(MACLINK4, K25);
 117
 118FUNC_GROUP_DECL(I2C14, L23, K25);
 119FUNC_GROUP_DECL(SGPM2, K26, L24, L23, K25);
 120FUNC_GROUP_DECL(SGPS2, K26, L24, L23, K25);
 121
 122#define J26 8
 123SIG_EXPR_LIST_DECL_SESG(J26, SALT1, SALT1, SIG_DESC_SET(SCU410, 8));
 124SIG_EXPR_LIST_DECL_SESG(J26, LHAD0, LPCHC, SIG_DESC_SET(SCU4B0, 8));
 125PIN_DECL_2(J26, GPIOB0, SALT1, LHAD0);
 126FUNC_GROUP_DECL(SALT1, J26);
 127
 128#define K23 9
 129SIG_EXPR_LIST_DECL_SESG(K23, SALT2, SALT2, SIG_DESC_SET(SCU410, 9));
 130SIG_EXPR_LIST_DECL_SESG(K23, LHAD1, LPCHC, SIG_DESC_SET(SCU4B0, 9));
 131PIN_DECL_2(K23, GPIOB1, SALT2, LHAD1);
 132FUNC_GROUP_DECL(SALT2, K23);
 133
 134#define H26 10
 135SIG_EXPR_LIST_DECL_SESG(H26, SALT3, SALT3, SIG_DESC_SET(SCU410, 10));
 136SIG_EXPR_LIST_DECL_SESG(H26, LHAD2, LPCHC, SIG_DESC_SET(SCU4B0, 10));
 137PIN_DECL_2(H26, GPIOB2, SALT3, LHAD2);
 138FUNC_GROUP_DECL(SALT3, H26);
 139
 140#define J25 11
 141SIG_EXPR_LIST_DECL_SESG(J25, SALT4, SALT4, SIG_DESC_SET(SCU410, 11));
 142SIG_EXPR_LIST_DECL_SESG(J25, LHAD3, LPCHC, SIG_DESC_SET(SCU4B0, 11));
 143PIN_DECL_2(J25, GPIOB3, SALT4, LHAD3);
 144FUNC_GROUP_DECL(SALT4, J25);
 145
 146#define J23 12
 147SIG_EXPR_LIST_DECL_SESG(J23, MDC2, MDIO2, SIG_DESC_SET(SCU410, 12));
 148SIG_EXPR_LIST_DECL_SESG(J23, LHCLK, LPCHC, SIG_DESC_SET(SCU4B0, 12));
 149PIN_DECL_2(J23, GPIOB4, MDC2, LHCLK);
 150
 151#define G26 13
 152SIG_EXPR_LIST_DECL_SESG(G26, MDIO2, MDIO2, SIG_DESC_SET(SCU410, 13));
 153SIG_EXPR_LIST_DECL_SESG(G26, LHFRAME, LPCHC, SIG_DESC_SET(SCU4B0, 13));
 154PIN_DECL_2(G26, GPIOB5, MDIO2, LHFRAME);
 155
 156FUNC_GROUP_DECL(MDIO2, J23, G26);
 157
 158#define H25 14
 159SIG_EXPR_LIST_DECL_SESG(H25, TXD4, TXD4, SIG_DESC_SET(SCU410, 14));
 160SIG_EXPR_LIST_DECL_SESG(H25, LHSIRQ, LHSIRQ, SIG_DESC_SET(SCU4B0, 14));
 161PIN_DECL_2(H25, GPIOB6, TXD4, LHSIRQ);
 162FUNC_GROUP_DECL(TXD4, H25);
 163FUNC_GROUP_DECL(LHSIRQ, H25);
 164
 165#define J24 15
 166SIG_EXPR_LIST_DECL_SESG(J24, RXD4, RXD4, SIG_DESC_SET(SCU410, 15));
 167SIG_EXPR_LIST_DECL_SESG(J24, LHRST, LPCHC, SIG_DESC_SET(SCU4B0, 15));
 168PIN_DECL_2(J24, GPIOB7, RXD4, LHRST);
 169FUNC_GROUP_DECL(RXD4, J24);
 170
 171FUNC_GROUP_DECL(LPCHC, J26, K23, H26, J25, J23, G26, H25, J24);
 172
 173#define H24 16
 174SIG_EXPR_LIST_DECL_SESG(H24, RGMII3TXCK, RGMII3, SIG_DESC_SET(SCU410, 16),
 175			  SIG_DESC_SET(SCU510, 0));
 176SIG_EXPR_LIST_DECL_SESG(H24, RMII3RCLKO, RMII3, SIG_DESC_SET(SCU410, 16),
 177			  SIG_DESC_CLEAR(SCU510, 0));
 178PIN_DECL_2(H24, GPIOC0, RGMII3TXCK, RMII3RCLKO);
 179
 180#define J22 17
 181SIG_EXPR_LIST_DECL_SESG(J22, RGMII3TXCTL, RGMII3, SIG_DESC_SET(SCU410, 17),
 182			  SIG_DESC_SET(SCU510, 0));
 183SIG_EXPR_LIST_DECL_SESG(J22, RMII3TXEN, RMII3, SIG_DESC_SET(SCU410, 17),
 184			  SIG_DESC_CLEAR(SCU510, 0));
 185PIN_DECL_2(J22, GPIOC1, RGMII3TXCTL, RMII3TXEN);
 186
 187#define H22 18
 188SIG_EXPR_LIST_DECL_SESG(H22, RGMII3TXD0, RGMII3, SIG_DESC_SET(SCU410, 18),
 189			  SIG_DESC_SET(SCU510, 0));
 190SIG_EXPR_LIST_DECL_SESG(H22, RMII3TXD0, RMII3, SIG_DESC_SET(SCU410, 18),
 191			  SIG_DESC_CLEAR(SCU510, 0));
 192PIN_DECL_2(H22, GPIOC2, RGMII3TXD0, RMII3TXD0);
 193
 194#define H23 19
 195SIG_EXPR_LIST_DECL_SESG(H23, RGMII3TXD1, RGMII3, SIG_DESC_SET(SCU410, 19),
 196			  SIG_DESC_SET(SCU510, 0));
 197SIG_EXPR_LIST_DECL_SESG(H23, RMII3TXD1, RMII3, SIG_DESC_SET(SCU410, 19),
 198			  SIG_DESC_CLEAR(SCU510, 0));
 199PIN_DECL_2(H23, GPIOC3, RGMII3TXD1, RMII3TXD1);
 200
 201#define G22 20
 202SIG_EXPR_LIST_DECL_SESG(G22, RGMII3TXD2, RGMII3, SIG_DESC_SET(SCU410, 20),
 203			  SIG_DESC_SET(SCU510, 0));
 204PIN_DECL_1(G22, GPIOC4, RGMII3TXD2);
 205
 206#define F22 21
 207SIG_EXPR_LIST_DECL_SESG(F22, RGMII3TXD3, RGMII3, SIG_DESC_SET(SCU410, 21),
 208			  SIG_DESC_SET(SCU510, 0));
 209PIN_DECL_1(F22, GPIOC5, RGMII3TXD3);
 210
 211#define G23 22
 212SIG_EXPR_LIST_DECL_SESG(G23, RGMII3RXCK, RGMII3, SIG_DESC_SET(SCU410, 22),
 213			  SIG_DESC_SET(SCU510, 0));
 214SIG_EXPR_LIST_DECL_SESG(G23, RMII3RCLKI, RMII3, SIG_DESC_SET(SCU410, 22),
 215			  SIG_DESC_CLEAR(SCU510, 0));
 216PIN_DECL_2(G23, GPIOC6, RGMII3RXCK, RMII3RCLKI);
 217
 218#define G24 23
 219SIG_EXPR_LIST_DECL_SESG(G24, RGMII3RXCTL, RGMII3, SIG_DESC_SET(SCU410, 23),
 220			  SIG_DESC_SET(SCU510, 0));
 221PIN_DECL_1(G24, GPIOC7, RGMII3RXCTL);
 222
 223#define F23 24
 224SIG_EXPR_LIST_DECL_SESG(F23, RGMII3RXD0, RGMII3, SIG_DESC_SET(SCU410, 24),
 225			  SIG_DESC_SET(SCU510, 0));
 226SIG_EXPR_LIST_DECL_SESG(F23, RMII3RXD0, RMII3, SIG_DESC_SET(SCU410, 24),
 227			  SIG_DESC_CLEAR(SCU510, 0));
 228PIN_DECL_2(F23, GPIOD0, RGMII3RXD0, RMII3RXD0);
 229
 230#define F26 25
 231SIG_EXPR_LIST_DECL_SESG(F26, RGMII3RXD1, RGMII3, SIG_DESC_SET(SCU410, 25),
 232			  SIG_DESC_SET(SCU510, 0));
 233SIG_EXPR_LIST_DECL_SESG(F26, RMII3RXD1, RMII3, SIG_DESC_SET(SCU410, 25),
 234			  SIG_DESC_CLEAR(SCU510, 0));
 235PIN_DECL_2(F26, GPIOD1, RGMII3RXD1, RMII3RXD1);
 236
 237#define F25 26
 238SIG_EXPR_LIST_DECL_SESG(F25, RGMII3RXD2, RGMII3, SIG_DESC_SET(SCU410, 26),
 239			  SIG_DESC_SET(SCU510, 0));
 240SIG_EXPR_LIST_DECL_SESG(F25, RMII3CRSDV, RMII3, SIG_DESC_SET(SCU410, 26),
 241			  SIG_DESC_CLEAR(SCU510, 0));
 242PIN_DECL_2(F25, GPIOD2, RGMII3RXD2, RMII3CRSDV);
 243
 244#define E26 27
 245SIG_EXPR_LIST_DECL_SESG(E26, RGMII3RXD3, RGMII3, SIG_DESC_SET(SCU410, 27),
 246			  SIG_DESC_SET(SCU510, 0));
 247SIG_EXPR_LIST_DECL_SESG(E26, RMII3RXER, RMII3, SIG_DESC_SET(SCU410, 27),
 248			  SIG_DESC_CLEAR(SCU510, 0));
 249PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
 250
 251FUNC_GROUP_DECL(RGMII3, H24, J22, H22, H23, G22, F22, G23, G24, F23, F26, F25,
 252		E26);
 253GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
 254GROUP_DECL(NCSI3, J22, H22, H23, G23, F23, F26, F25, E26);
 255FUNC_DECL_2(RMII3, RMII3, NCSI3);
 256
 257#define F24 28
 258SIG_EXPR_LIST_DECL_SESG(F24, NCTS3, NCTS3, SIG_DESC_SET(SCU410, 28));
 259SIG_EXPR_LIST_DECL_SESG(F24, RGMII4TXCK, RGMII4, SIG_DESC_SET(SCU4B0, 28),
 260			  SIG_DESC_SET(SCU510, 1));
 261SIG_EXPR_LIST_DECL_SESG(F24, RMII4RCLKO, RMII4, SIG_DESC_SET(SCU4B0, 28),
 262			  SIG_DESC_CLEAR(SCU510, 1));
 263PIN_DECL_3(F24, GPIOD4, NCTS3, RGMII4TXCK, RMII4RCLKO);
 264FUNC_GROUP_DECL(NCTS3, F24);
 265
 266#define E23 29
 267SIG_EXPR_LIST_DECL_SESG(E23, NDCD3, NDCD3, SIG_DESC_SET(SCU410, 29));
 268SIG_EXPR_LIST_DECL_SESG(E23, RGMII4TXCTL, RGMII4, SIG_DESC_SET(SCU4B0, 29),
 269			  SIG_DESC_SET(SCU510, 1));
 270SIG_EXPR_LIST_DECL_SESG(E23, RMII4TXEN, RMII4, SIG_DESC_SET(SCU4B0, 29),
 271			  SIG_DESC_CLEAR(SCU510, 1));
 272PIN_DECL_3(E23, GPIOD5, NDCD3, RGMII4TXCTL, RMII4TXEN);
 273FUNC_GROUP_DECL(NDCD3, E23);
 274
 275#define E24 30
 276SIG_EXPR_LIST_DECL_SESG(E24, NDSR3, NDSR3, SIG_DESC_SET(SCU410, 30));
 277SIG_EXPR_LIST_DECL_SESG(E24, RGMII4TXD0, RGMII4, SIG_DESC_SET(SCU4B0, 30),
 278			  SIG_DESC_SET(SCU510, 1));
 279SIG_EXPR_LIST_DECL_SESG(E24, RMII4TXD0, RMII4, SIG_DESC_SET(SCU4B0, 30),
 280			  SIG_DESC_CLEAR(SCU510, 1));
 281PIN_DECL_3(E24, GPIOD6, NDSR3, RGMII4TXD0, RMII4TXD0);
 282FUNC_GROUP_DECL(NDSR3, E24);
 283
 284#define E25 31
 285SIG_EXPR_LIST_DECL_SESG(E25, NRI3, NRI3, SIG_DESC_SET(SCU410, 31));
 286SIG_EXPR_LIST_DECL_SESG(E25, RGMII4TXD1, RGMII4, SIG_DESC_SET(SCU4B0, 31),
 287			  SIG_DESC_SET(SCU510, 1));
 288SIG_EXPR_LIST_DECL_SESG(E25, RMII4TXD1, RMII4, SIG_DESC_SET(SCU4B0, 31),
 289			  SIG_DESC_CLEAR(SCU510, 1));
 290PIN_DECL_3(E25, GPIOD7, NRI3, RGMII4TXD1, RMII4TXD1);
 291FUNC_GROUP_DECL(NRI3, E25);
 292
 293#define D26 32
 294SIG_EXPR_LIST_DECL_SESG(D26, NDTR3, NDTR3, SIG_DESC_SET(SCU414, 0));
 295SIG_EXPR_LIST_DECL_SESG(D26, RGMII4TXD2, RGMII4, SIG_DESC_SET(SCU4B4, 0),
 296			  SIG_DESC_SET(SCU510, 1));
 297PIN_DECL_2(D26, GPIOE0, NDTR3, RGMII4TXD2);
 298FUNC_GROUP_DECL(NDTR3, D26);
 299
 300#define D24 33
 301SIG_EXPR_LIST_DECL_SESG(D24, NRTS3, NRTS3, SIG_DESC_SET(SCU414, 1));
 302SIG_EXPR_LIST_DECL_SESG(D24, RGMII4TXD3, RGMII4, SIG_DESC_SET(SCU4B4, 1),
 303			  SIG_DESC_SET(SCU510, 1));
 304PIN_DECL_2(D24, GPIOE1, NRTS3, RGMII4TXD3);
 305FUNC_GROUP_DECL(NRTS3, D24);
 306
 307#define C25 34
 308SIG_EXPR_LIST_DECL_SESG(C25, NCTS4, NCTS4, SIG_DESC_SET(SCU414, 2));
 309SIG_EXPR_LIST_DECL_SESG(C25, RGMII4RXCK, RGMII4, SIG_DESC_SET(SCU4B4, 2),
 310			  SIG_DESC_SET(SCU510, 1));
 311SIG_EXPR_LIST_DECL_SESG(C25, RMII4RCLKI, RMII4, SIG_DESC_SET(SCU4B4, 2),
 312			  SIG_DESC_CLEAR(SCU510, 1));
 313PIN_DECL_3(C25, GPIOE2, NCTS4, RGMII4RXCK, RMII4RCLKI);
 314FUNC_GROUP_DECL(NCTS4, C25);
 315
 316#define C26 35
 317SIG_EXPR_LIST_DECL_SESG(C26, NDCD4, NDCD4, SIG_DESC_SET(SCU414, 3));
 318SIG_EXPR_LIST_DECL_SESG(C26, RGMII4RXCTL, RGMII4, SIG_DESC_SET(SCU4B4, 3),
 319			  SIG_DESC_SET(SCU510, 1));
 320PIN_DECL_2(C26, GPIOE3, NDCD4, RGMII4RXCTL);
 321FUNC_GROUP_DECL(NDCD4, C26);
 322
 323#define C24 36
 324SIG_EXPR_LIST_DECL_SESG(C24, NDSR4, NDSR4, SIG_DESC_SET(SCU414, 4));
 325SIG_EXPR_LIST_DECL_SESG(C24, RGMII4RXD0, RGMII4, SIG_DESC_SET(SCU4B4, 4),
 326			  SIG_DESC_SET(SCU510, 1));
 327SIG_EXPR_LIST_DECL_SESG(C24, RMII4RXD0, RMII4, SIG_DESC_SET(SCU4B4, 4),
 328			  SIG_DESC_CLEAR(SCU510, 1));
 329PIN_DECL_3(C24, GPIOE4, NDSR4, RGMII4RXD0, RMII4RXD0);
 330FUNC_GROUP_DECL(NDSR4, C24);
 331
 332#define B26 37
 333SIG_EXPR_LIST_DECL_SESG(B26, NRI4, NRI4, SIG_DESC_SET(SCU414, 5));
 334SIG_EXPR_LIST_DECL_SESG(B26, RGMII4RXD1, RGMII4, SIG_DESC_SET(SCU4B4, 5),
 335			  SIG_DESC_SET(SCU510, 1));
 336SIG_EXPR_LIST_DECL_SESG(B26, RMII4RXD1, RMII4, SIG_DESC_SET(SCU4B4, 5),
 337			  SIG_DESC_CLEAR(SCU510, 1));
 338PIN_DECL_3(B26, GPIOE5, NRI4, RGMII4RXD1, RMII4RXD1);
 339FUNC_GROUP_DECL(NRI4, B26);
 340
 341#define B25 38
 342SIG_EXPR_LIST_DECL_SESG(B25, NDTR4, NDTR4, SIG_DESC_SET(SCU414, 6));
 343SIG_EXPR_LIST_DECL_SESG(B25, RGMII4RXD2, RGMII4, SIG_DESC_SET(SCU4B4, 6),
 344			  SIG_DESC_SET(SCU510, 1));
 345SIG_EXPR_LIST_DECL_SESG(B25, RMII4CRSDV, RMII4, SIG_DESC_SET(SCU4B4, 6),
 346			  SIG_DESC_CLEAR(SCU510, 1));
 347PIN_DECL_3(B25, GPIOE6, NDTR4, RGMII4RXD2, RMII4CRSDV);
 348FUNC_GROUP_DECL(NDTR4, B25);
 349
 350#define B24 39
 351SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));
 352SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),
 353			  SIG_DESC_SET(SCU510, 1));
 354SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),
 355			  SIG_DESC_CLEAR(SCU510, 1));
 356PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);
 357FUNC_GROUP_DECL(NRTS4, B24);
 358
 359FUNC_GROUP_DECL(RGMII4, F24, E23, E24, E25, D26, D24, C25, C26, C24, B26, B25,
 360		B24);
 361GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
 362GROUP_DECL(NCSI4, E23, E24, E25, C25, C24, B26, B25, B24);
 363FUNC_DECL_2(RMII4, RMII4, NCSI4);
 364
 365#define D22 40
 366SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
 367SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU4B4, 8));
 368PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
 369GROUP_DECL(PWM8G0, D22);
 370
 371#define E22 41
 372SIG_EXPR_LIST_DECL_SESG(E22, SD1CMD, SD1, SIG_DESC_SET(SCU414, 9));
 373SIG_EXPR_LIST_DECL_SEMG(E22, PWM9, PWM9G0, PWM9, SIG_DESC_SET(SCU4B4, 9));
 374PIN_DECL_2(E22, GPIOF1, SD1CMD, PWM9);
 375GROUP_DECL(PWM9G0, E22);
 376
 377#define D23 42
 378SIG_EXPR_LIST_DECL_SESG(D23, SD1DAT0, SD1, SIG_DESC_SET(SCU414, 10));
 379SIG_EXPR_LIST_DECL_SEMG(D23, PWM10, PWM10G0, PWM10, SIG_DESC_SET(SCU4B4, 10));
 380PIN_DECL_2(D23, GPIOF2, SD1DAT0, PWM10);
 381GROUP_DECL(PWM10G0, D23);
 382
 383#define C23 43
 384SIG_EXPR_LIST_DECL_SESG(C23, SD1DAT1, SD1, SIG_DESC_SET(SCU414, 11));
 385SIG_EXPR_LIST_DECL_SEMG(C23, PWM11, PWM11G0, PWM11, SIG_DESC_SET(SCU4B4, 11));
 386PIN_DECL_2(C23, GPIOF3, SD1DAT1, PWM11);
 387GROUP_DECL(PWM11G0, C23);
 388
 389#define C22 44
 390SIG_EXPR_LIST_DECL_SESG(C22, SD1DAT2, SD1, SIG_DESC_SET(SCU414, 12));
 391SIG_EXPR_LIST_DECL_SEMG(C22, PWM12, PWM12G0, PWM12, SIG_DESC_SET(SCU4B4, 12));
 392PIN_DECL_2(C22, GPIOF4, SD1DAT2, PWM12);
 393GROUP_DECL(PWM12G0, C22);
 394
 395#define A25 45
 396SIG_EXPR_LIST_DECL_SESG(A25, SD1DAT3, SD1, SIG_DESC_SET(SCU414, 13));
 397SIG_EXPR_LIST_DECL_SEMG(A25, PWM13, PWM13G0, PWM13, SIG_DESC_SET(SCU4B4, 13));
 398PIN_DECL_2(A25, GPIOF5, SD1DAT3, PWM13);
 399GROUP_DECL(PWM13G0, A25);
 400
 401#define A24 46
 402SIG_EXPR_LIST_DECL_SESG(A24, SD1CD, SD1, SIG_DESC_SET(SCU414, 14));
 403SIG_EXPR_LIST_DECL_SEMG(A24, PWM14, PWM14G0, PWM14, SIG_DESC_SET(SCU4B4, 14));
 404PIN_DECL_2(A24, GPIOF6, SD1CD, PWM14);
 405GROUP_DECL(PWM14G0, A24);
 406
 407#define A23 47
 408SIG_EXPR_LIST_DECL_SESG(A23, SD1WP, SD1, SIG_DESC_SET(SCU414, 15));
 409SIG_EXPR_LIST_DECL_SEMG(A23, PWM15, PWM15G0, PWM15, SIG_DESC_SET(SCU4B4, 15));
 410PIN_DECL_2(A23, GPIOF7, SD1WP, PWM15);
 411GROUP_DECL(PWM15G0, A23);
 412
 413FUNC_GROUP_DECL(SD1, D22, E22, D23, C23, C22, A25, A24, A23);
 414
 415#define E21 48
 416SIG_EXPR_LIST_DECL_SESG(E21, TXD6, UART6, SIG_DESC_SET(SCU414, 16));
 417SIG_EXPR_LIST_DECL_SESG(E21, SD2CLK, SD2, SIG_DESC_SET(SCU4B4, 16),
 418			  SIG_DESC_SET(SCU450, 1));
 419SIG_EXPR_LIST_DECL_SEMG(E21, SALT9, SALT9G0, SALT9, SIG_DESC_SET(SCU694, 16));
 420PIN_DECL_3(E21, GPIOG0, TXD6, SD2CLK, SALT9);
 421GROUP_DECL(SALT9G0, E21);
 422
 423#define B22 49
 424SIG_EXPR_LIST_DECL_SESG(B22, RXD6, UART6, SIG_DESC_SET(SCU414, 17));
 425SIG_EXPR_LIST_DECL_SESG(B22, SD2CMD, SD2, SIG_DESC_SET(SCU4B4, 17),
 426			  SIG_DESC_SET(SCU450, 1));
 427SIG_EXPR_LIST_DECL_SEMG(B22, SALT10, SALT10G0, SALT10,
 428			SIG_DESC_SET(SCU694, 17));
 429PIN_DECL_3(B22, GPIOG1, RXD6, SD2CMD, SALT10);
 430GROUP_DECL(SALT10G0, B22);
 431
 432FUNC_GROUP_DECL(UART6, E21, B22);
 433
 434#define C21 50
 435SIG_EXPR_LIST_DECL_SESG(C21, TXD7, UART7, SIG_DESC_SET(SCU414, 18));
 436SIG_EXPR_LIST_DECL_SESG(C21, SD2DAT0, SD2, SIG_DESC_SET(SCU4B4, 18),
 437			  SIG_DESC_SET(SCU450, 1));
 438SIG_EXPR_LIST_DECL_SEMG(C21, SALT11, SALT11G0, SALT11,
 439			SIG_DESC_SET(SCU694, 18));
 440PIN_DECL_3(C21, GPIOG2, TXD7, SD2DAT0, SALT11);
 441GROUP_DECL(SALT11G0, C21);
 442
 443#define A22 51
 444SIG_EXPR_LIST_DECL_SESG(A22, RXD7, UART7, SIG_DESC_SET(SCU414, 19));
 445SIG_EXPR_LIST_DECL_SESG(A22, SD2DAT1, SD2, SIG_DESC_SET(SCU4B4, 19),
 446			  SIG_DESC_SET(SCU450, 1));
 447SIG_EXPR_LIST_DECL_SEMG(A22, SALT12, SALT12G0, SALT12,
 448			SIG_DESC_SET(SCU694, 19));
 449PIN_DECL_3(A22, GPIOG3, RXD7, SD2DAT1, SALT12);
 450GROUP_DECL(SALT12G0, A22);
 451
 452FUNC_GROUP_DECL(UART7, C21, A22);
 453
 454#define A21 52
 455SIG_EXPR_LIST_DECL_SESG(A21, TXD8, UART8, SIG_DESC_SET(SCU414, 20));
 456SIG_EXPR_LIST_DECL_SESG(A21, SD2DAT2, SD2, SIG_DESC_SET(SCU4B4, 20),
 457			  SIG_DESC_SET(SCU450, 1));
 458SIG_EXPR_LIST_DECL_SEMG(A21, SALT13, SALT13G0, SALT13,
 459			SIG_DESC_SET(SCU694, 20));
 460PIN_DECL_3(A21, GPIOG4, TXD8, SD2DAT2, SALT13);
 461GROUP_DECL(SALT13G0, A21);
 462
 463#define E20 53
 464SIG_EXPR_LIST_DECL_SESG(E20, RXD8, UART8, SIG_DESC_SET(SCU414, 21));
 465SIG_EXPR_LIST_DECL_SESG(E20, SD2DAT3, SD2, SIG_DESC_SET(SCU4B4, 21),
 466			  SIG_DESC_SET(SCU450, 1));
 467SIG_EXPR_LIST_DECL_SEMG(E20, SALT14, SALT14G0, SALT14,
 468			SIG_DESC_SET(SCU694, 21));
 469PIN_DECL_3(E20, GPIOG5, RXD8, SD2DAT3, SALT14);
 470GROUP_DECL(SALT14G0, E20);
 471
 472FUNC_GROUP_DECL(UART8, A21, E20);
 473
 474#define D21 54
 475SIG_EXPR_LIST_DECL_SESG(D21, TXD9, UART9, SIG_DESC_SET(SCU414, 22));
 476SIG_EXPR_LIST_DECL_SESG(D21, SD2CD, SD2, SIG_DESC_SET(SCU4B4, 22),
 477			  SIG_DESC_SET(SCU450, 1));
 478SIG_EXPR_LIST_DECL_SEMG(D21, SALT15, SALT15G0, SALT15,
 479			SIG_DESC_SET(SCU694, 22));
 480PIN_DECL_3(D21, GPIOG6, TXD9, SD2CD, SALT15);
 481GROUP_DECL(SALT15G0, D21);
 482
 483#define B21 55
 484SIG_EXPR_LIST_DECL_SESG(B21, RXD9, UART9, SIG_DESC_SET(SCU414, 23));
 485SIG_EXPR_LIST_DECL_SESG(B21, SD2WP, SD2, SIG_DESC_SET(SCU4B4, 23),
 486			SIG_DESC_SET(SCU450, 1));
 487SIG_EXPR_LIST_DECL_SEMG(B21, SALT16, SALT16G0, SALT16,
 488			SIG_DESC_SET(SCU694, 23));
 489PIN_DECL_3(B21, GPIOG7, RXD9, SD2WP, SALT16);
 490GROUP_DECL(SALT16G0, B21);
 491
 492FUNC_GROUP_DECL(UART9, D21, B21);
 493
 494FUNC_GROUP_DECL(SD2, E21, B22, C21, A22, A21, E20, D21, B21);
 495
 496#define A18 56
 497SIG_EXPR_LIST_DECL_SESG(A18, SGPM1CLK, SGPM1, SIG_DESC_SET(SCU414, 24));
 498PIN_DECL_1(A18, GPIOH0, SGPM1CLK);
 499
 500#define B18 57
 501SIG_EXPR_LIST_DECL_SESG(B18, SGPM1LD, SGPM1, SIG_DESC_SET(SCU414, 25));
 502PIN_DECL_1(B18, GPIOH1, SGPM1LD);
 503
 504#define C18 58
 505SIG_EXPR_LIST_DECL_SESG(C18, SGPM1O, SGPM1, SIG_DESC_SET(SCU414, 26));
 506PIN_DECL_1(C18, GPIOH2, SGPM1O);
 507
 508#define A17 59
 509SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
 510PIN_DECL_1(A17, GPIOH3, SGPM1I);
 511
 512FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
 513
 514#define D18 60
 515SIG_EXPR_LIST_DECL_SESG(D18, SGPS1CK, SGPS1, SIG_DESC_SET(SCU414, 28));
 516SIG_EXPR_LIST_DECL_SESG(D18, SCL15, I2C15, SIG_DESC_SET(SCU4B4, 28));
 517PIN_DECL_2(D18, GPIOH4, SGPS1CK, SCL15);
 518
 519#define B17 61
 520SIG_EXPR_LIST_DECL_SESG(B17, SGPS1LD, SGPS1, SIG_DESC_SET(SCU414, 29));
 521SIG_EXPR_LIST_DECL_SESG(B17, SDA15, I2C15, SIG_DESC_SET(SCU4B4, 29));
 522PIN_DECL_2(B17, GPIOH5, SGPS1LD, SDA15);
 523
 524FUNC_GROUP_DECL(I2C15, D18, B17);
 525
 526#define C17 62
 527SIG_EXPR_LIST_DECL_SESG(C17, SGPS1O, SGPS1, SIG_DESC_SET(SCU414, 30));
 528SIG_EXPR_LIST_DECL_SESG(C17, SCL16, I2C16, SIG_DESC_SET(SCU4B4, 30));
 529PIN_DECL_2(C17, GPIOH6, SGPS1O, SCL16);
 530
 531#define E18 63
 532SIG_EXPR_LIST_DECL_SESG(E18, SGPS1I, SGPS1, SIG_DESC_SET(SCU414, 31));
 533SIG_EXPR_LIST_DECL_SESG(E18, SDA16, I2C16, SIG_DESC_SET(SCU4B4, 31));
 534PIN_DECL_2(E18, GPIOH7, SGPS1I, SDA16);
 535
 536FUNC_GROUP_DECL(I2C16, C17, E18);
 537FUNC_GROUP_DECL(SGPS1, D18, B17, C17, E18);
 538
 539#define D17 64
 540SIG_EXPR_LIST_DECL_SESG(D17, MTRSTN, JTAGM, SIG_DESC_SET(SCU418, 0));
 541SIG_EXPR_LIST_DECL_SEMG(D17, TXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 0));
 542PIN_DECL_2(D17, GPIOI0, MTRSTN, TXD12);
 543
 544#define A16 65
 545SIG_EXPR_LIST_DECL_SESG(A16, MTDI, JTAGM, SIG_DESC_SET(SCU418, 1));
 546SIG_EXPR_LIST_DECL_SEMG(A16, RXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 1));
 547PIN_DECL_2(A16, GPIOI1, MTDI, RXD12);
 548
 549GROUP_DECL(UART12G0, D17, A16);
 550
 551#define E17 66
 552SIG_EXPR_LIST_DECL_SESG(E17, MTCK, JTAGM, SIG_DESC_SET(SCU418, 2));
 553SIG_EXPR_LIST_DECL_SEMG(E17, TXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 2));
 554PIN_DECL_2(E17, GPIOI2, MTCK, TXD13);
 555
 556#define D16 67
 557SIG_EXPR_LIST_DECL_SESG(D16, MTMS, JTAGM, SIG_DESC_SET(SCU418, 3));
 558SIG_EXPR_LIST_DECL_SEMG(D16, RXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 3));
 559PIN_DECL_2(D16, GPIOI3, MTMS, RXD13);
 560
 561GROUP_DECL(UART13G0, E17, D16);
 562
 563#define C16 68
 564SIG_EXPR_LIST_DECL_SESG(C16, MTDO, JTAGM, SIG_DESC_SET(SCU418, 4));
 565PIN_DECL_1(C16, GPIOI4, MTDO);
 566
 567FUNC_GROUP_DECL(JTAGM, D17, A16, E17, D16, C16);
 568
 569#define E16 69
 570SIG_EXPR_LIST_DECL_SESG(E16, SIOPBO, SIOPBO, SIG_DESC_SET(SCU418, 5));
 571PIN_DECL_1(E16, GPIOI5, SIOPBO);
 572FUNC_GROUP_DECL(SIOPBO, E16);
 573
 574#define B16 70
 575SIG_EXPR_LIST_DECL_SESG(B16, SIOPBI, SIOPBI, SIG_DESC_SET(SCU418, 6));
 576PIN_DECL_1(B16, GPIOI6, SIOPBI);
 577FUNC_GROUP_DECL(SIOPBI, B16);
 578
 579#define A15 71
 580SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7));
 581SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7));
 582PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI);
 583FUNC_GROUP_DECL(BMCINT, A15);
 584FUNC_GROUP_DECL(SIOSCI, A15);
 585
 586#define B20 72
 587SIG_EXPR_LIST_DECL_SEMG(B20, I3C3SCL, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 8));
 588SIG_EXPR_LIST_DECL_SESG(B20, SCL1, I2C1, SIG_DESC_SET(SCU4B8, 8));
 589PIN_DECL_2(B20, GPIOJ0, I3C3SCL, SCL1);
 590
 591#define A20 73
 592SIG_EXPR_LIST_DECL_SEMG(A20, I3C3SDA, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 9));
 593SIG_EXPR_LIST_DECL_SESG(A20, SDA1, I2C1, SIG_DESC_SET(SCU4B8, 9));
 594PIN_DECL_2(A20, GPIOJ1, I3C3SDA, SDA1);
 595
 596GROUP_DECL(HVI3C3, B20, A20);
 597FUNC_GROUP_DECL(I2C1, B20, A20);
 598
 599#define E19 74
 600SIG_EXPR_LIST_DECL_SEMG(E19, I3C4SCL, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 10));
 601SIG_EXPR_LIST_DECL_SESG(E19, SCL2, I2C2, SIG_DESC_SET(SCU4B8, 10));
 602PIN_DECL_2(E19, GPIOJ2, I3C4SCL, SCL2);
 603
 604#define D20 75
 605SIG_EXPR_LIST_DECL_SEMG(D20, I3C4SDA, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 11));
 606SIG_EXPR_LIST_DECL_SESG(D20, SDA2, I2C2, SIG_DESC_SET(SCU4B8, 11));
 607PIN_DECL_2(D20, GPIOJ3, I3C4SDA, SDA2);
 608
 609GROUP_DECL(HVI3C4, E19, D20);
 610FUNC_GROUP_DECL(I2C2, E19, D20);
 611
 612#define C19 76
 613SIG_EXPR_LIST_DECL_SESG(C19, I3C5SCL, I3C5, SIG_DESC_SET(SCU418, 12));
 614SIG_EXPR_LIST_DECL_SESG(C19, SCL3, I2C3, SIG_DESC_SET(SCU4B8, 12));
 615PIN_DECL_2(C19, GPIOJ4, I3C5SCL, SCL3);
 616
 617#define A19 77
 618SIG_EXPR_LIST_DECL_SESG(A19, I3C5SDA, I3C5, SIG_DESC_SET(SCU418, 13));
 619SIG_EXPR_LIST_DECL_SESG(A19, SDA3, I2C3, SIG_DESC_SET(SCU4B8, 13));
 620PIN_DECL_2(A19, GPIOJ5, I3C5SDA, SDA3);
 621
 622FUNC_GROUP_DECL(I3C5, C19, A19);
 623FUNC_GROUP_DECL(I2C3, C19, A19);
 624
 625#define C20 78
 626SIG_EXPR_LIST_DECL_SESG(C20, I3C6SCL, I3C6, SIG_DESC_SET(SCU418, 14));
 627SIG_EXPR_LIST_DECL_SESG(C20, SCL4, I2C4, SIG_DESC_SET(SCU4B8, 14));
 628PIN_DECL_2(C20, GPIOJ6, I3C6SCL, SCL4);
 629
 630#define D19 79
 631SIG_EXPR_LIST_DECL_SESG(D19, I3C6SDA, I3C6, SIG_DESC_SET(SCU418, 15));
 632SIG_EXPR_LIST_DECL_SESG(D19, SDA4, I2C4, SIG_DESC_SET(SCU4B8, 15));
 633PIN_DECL_2(D19, GPIOJ7, I3C6SDA, SDA4);
 634
 635FUNC_GROUP_DECL(I3C6, C20, D19);
 636FUNC_GROUP_DECL(I2C4, C20, D19);
 637
 638#define A11 80
 639SIG_EXPR_LIST_DECL_SESG(A11, SCL5, I2C5, SIG_DESC_SET(SCU418, 16));
 640PIN_DECL_1(A11, GPIOK0, SCL5);
 641
 642#define C11 81
 643SIG_EXPR_LIST_DECL_SESG(C11, SDA5, I2C5, SIG_DESC_SET(SCU418, 17));
 644PIN_DECL_1(C11, GPIOK1, SDA5);
 645
 646FUNC_GROUP_DECL(I2C5, A11, C11);
 647
 648#define D12 82
 649SIG_EXPR_LIST_DECL_SESG(D12, SCL6, I2C6, SIG_DESC_SET(SCU418, 18));
 650PIN_DECL_1(D12, GPIOK2, SCL6);
 651
 652#define E13 83
 653SIG_EXPR_LIST_DECL_SESG(E13, SDA6, I2C6, SIG_DESC_SET(SCU418, 19));
 654PIN_DECL_1(E13, GPIOK3, SDA6);
 655
 656FUNC_GROUP_DECL(I2C6, D12, E13);
 657
 658#define D11 84
 659SIG_EXPR_LIST_DECL_SESG(D11, SCL7, I2C7, SIG_DESC_SET(SCU418, 20));
 660PIN_DECL_1(D11, GPIOK4, SCL7);
 661
 662#define E11 85
 663SIG_EXPR_LIST_DECL_SESG(E11, SDA7, I2C7, SIG_DESC_SET(SCU418, 21));
 664PIN_DECL_1(E11, GPIOK5, SDA7);
 665
 666FUNC_GROUP_DECL(I2C7, D11, E11);
 667
 668#define F13 86
 669SIG_EXPR_LIST_DECL_SESG(F13, SCL8, I2C8, SIG_DESC_SET(SCU418, 22));
 670PIN_DECL_1(F13, GPIOK6, SCL8);
 671
 672#define E12 87
 673SIG_EXPR_LIST_DECL_SESG(E12, SDA8, I2C8, SIG_DESC_SET(SCU418, 23));
 674PIN_DECL_1(E12, GPIOK7, SDA8);
 675
 676FUNC_GROUP_DECL(I2C8, F13, E12);
 677
 678#define D15 88
 679SIG_EXPR_LIST_DECL_SESG(D15, SCL9, I2C9, SIG_DESC_SET(SCU418, 24));
 680PIN_DECL_1(D15, GPIOL0, SCL9);
 681
 682#define A14 89
 683SIG_EXPR_LIST_DECL_SESG(A14, SDA9, I2C9, SIG_DESC_SET(SCU418, 25));
 684PIN_DECL_1(A14, GPIOL1, SDA9);
 685
 686FUNC_GROUP_DECL(I2C9, D15, A14);
 687
 688#define E15 90
 689SIG_EXPR_LIST_DECL_SESG(E15, SCL10, I2C10, SIG_DESC_SET(SCU418, 26));
 690PIN_DECL_1(E15, GPIOL2, SCL10);
 691
 692#define A13 91
 693SIG_EXPR_LIST_DECL_SESG(A13, SDA10, I2C10, SIG_DESC_SET(SCU418, 27));
 694PIN_DECL_1(A13, GPIOL3, SDA10);
 695
 696FUNC_GROUP_DECL(I2C10, E15, A13);
 697
 698#define C15 92
 699SSSF_PIN_DECL(C15, GPIOL4, TXD3, SIG_DESC_SET(SCU418, 28));
 700
 701#define F15 93
 702SSSF_PIN_DECL(F15, GPIOL5, RXD3, SIG_DESC_SET(SCU418, 29));
 703
 704#define B14 94
 705SSSF_PIN_DECL(B14, GPIOL6, VGAHS, SIG_DESC_SET(SCU418, 30));
 706
 707#define C14 95
 708SSSF_PIN_DECL(C14, GPIOL7, VGAVS, SIG_DESC_SET(SCU418, 31));
 709
 710#define D14 96
 711SSSF_PIN_DECL(D14, GPIOM0, NCTS1, SIG_DESC_SET(SCU41C, 0));
 712
 713#define B13 97
 714SSSF_PIN_DECL(B13, GPIOM1, NDCD1, SIG_DESC_SET(SCU41C, 1));
 715
 716#define A12 98
 717SSSF_PIN_DECL(A12, GPIOM2, NDSR1, SIG_DESC_SET(SCU41C, 2));
 718
 719#define E14 99
 720SSSF_PIN_DECL(E14, GPIOM3, NRI1, SIG_DESC_SET(SCU41C, 3));
 721
 722#define B12 100
 723SSSF_PIN_DECL(B12, GPIOM4, NDTR1, SIG_DESC_SET(SCU41C, 4));
 724
 725#define C12 101
 726SSSF_PIN_DECL(C12, GPIOM5, NRTS1, SIG_DESC_SET(SCU41C, 5));
 727
 728#define C13 102
 729SSSF_PIN_DECL(C13, GPIOM6, TXD1, SIG_DESC_SET(SCU41C, 6));
 730
 731#define D13 103
 732SSSF_PIN_DECL(D13, GPIOM7, RXD1, SIG_DESC_SET(SCU41C, 7));
 733
 734#define P25 104
 735SSSF_PIN_DECL(P25, GPION0, NCTS2, SIG_DESC_SET(SCU41C, 8));
 736
 737#define N23 105
 738SSSF_PIN_DECL(N23, GPION1, NDCD2, SIG_DESC_SET(SCU41C, 9));
 739
 740#define N25 106
 741SSSF_PIN_DECL(N25, GPION2, NDSR2, SIG_DESC_SET(SCU41C, 10));
 742
 743#define N24 107
 744SSSF_PIN_DECL(N24, GPION3, NRI2, SIG_DESC_SET(SCU41C, 11));
 745
 746#define P26 108
 747SSSF_PIN_DECL(P26, GPION4, NDTR2, SIG_DESC_SET(SCU41C, 12));
 748
 749#define M23 109
 750SSSF_PIN_DECL(M23, GPION5, NRTS2, SIG_DESC_SET(SCU41C, 13));
 751
 752#define N26 110
 753SSSF_PIN_DECL(N26, GPION6, TXD2, SIG_DESC_SET(SCU41C, 14));
 754
 755#define M26 111
 756SSSF_PIN_DECL(M26, GPION7, RXD2, SIG_DESC_SET(SCU41C, 15));
 757
 758#define AD26 112
 759SSSF_PIN_DECL(AD26, GPIOO0, PWM0, SIG_DESC_SET(SCU41C, 16));
 760
 761#define AD22 113
 762SSSF_PIN_DECL(AD22, GPIOO1, PWM1, SIG_DESC_SET(SCU41C, 17));
 763
 764#define AD23 114
 765SSSF_PIN_DECL(AD23, GPIOO2, PWM2, SIG_DESC_SET(SCU41C, 18));
 766
 767#define AD24 115
 768SSSF_PIN_DECL(AD24, GPIOO3, PWM3, SIG_DESC_SET(SCU41C, 19));
 769
 770#define AD25 116
 771SSSF_PIN_DECL(AD25, GPIOO4, PWM4, SIG_DESC_SET(SCU41C, 20));
 772
 773#define AC22 117
 774SSSF_PIN_DECL(AC22, GPIOO5, PWM5, SIG_DESC_SET(SCU41C, 21));
 775
 776#define AC24 118
 777SSSF_PIN_DECL(AC24, GPIOO6, PWM6, SIG_DESC_SET(SCU41C, 22));
 778
 779#define AC23 119
 780SSSF_PIN_DECL(AC23, GPIOO7, PWM7, SIG_DESC_SET(SCU41C, 23));
 781
 782#define AB22 120
 783SIG_EXPR_LIST_DECL_SEMG(AB22, PWM8, PWM8G1, PWM8, SIG_DESC_SET(SCU41C, 24));
 784SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0, SIG_DESC_SET(SCU4BC, 24));
 785PIN_DECL_2(AB22, GPIOP0, PWM8, THRUIN0);
 786GROUP_DECL(PWM8G1, AB22);
 787FUNC_DECL_2(PWM8, PWM8G0, PWM8G1);
 788
 789#define W24 121
 790SIG_EXPR_LIST_DECL_SEMG(W24, PWM9, PWM9G1, PWM9, SIG_DESC_SET(SCU41C, 25));
 791SIG_EXPR_LIST_DECL_SESG(W24, THRUOUT0, THRU0, SIG_DESC_SET(SCU4BC, 25));
 792PIN_DECL_2(W24, GPIOP1, PWM9, THRUOUT0);
 793
 794FUNC_GROUP_DECL(THRU0, AB22, W24);
 795
 796GROUP_DECL(PWM9G1, W24);
 797FUNC_DECL_2(PWM9, PWM9G0, PWM9G1);
 798
 799#define AA23 122
 800SIG_EXPR_LIST_DECL_SEMG(AA23, PWM10, PWM10G1, PWM10, SIG_DESC_SET(SCU41C, 26));
 801SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1, SIG_DESC_SET(SCU4BC, 26));
 802PIN_DECL_2(AA23, GPIOP2, PWM10, THRUIN1);
 803GROUP_DECL(PWM10G1, AA23);
 804FUNC_DECL_2(PWM10, PWM10G0, PWM10G1);
 805
 806#define AA24 123
 807SIG_EXPR_LIST_DECL_SEMG(AA24, PWM11, PWM11G1, PWM11, SIG_DESC_SET(SCU41C, 27));
 808SIG_EXPR_LIST_DECL_SESG(AA24, THRUOUT1, THRU1, SIG_DESC_SET(SCU4BC, 27));
 809PIN_DECL_2(AA24, GPIOP3, PWM11, THRUOUT1);
 810GROUP_DECL(PWM11G1, AA24);
 811FUNC_DECL_2(PWM11, PWM11G0, PWM11G1);
 812
 813FUNC_GROUP_DECL(THRU1, AA23, AA24);
 814
 815#define W23 124
 816SIG_EXPR_LIST_DECL_SEMG(W23, PWM12, PWM12G1, PWM12, SIG_DESC_SET(SCU41C, 28));
 817SIG_EXPR_LIST_DECL_SESG(W23, THRUIN2, THRU2, SIG_DESC_SET(SCU4BC, 28));
 818PIN_DECL_2(W23, GPIOP4, PWM12, THRUIN2);
 819GROUP_DECL(PWM12G1, W23);
 820FUNC_DECL_2(PWM12, PWM12G0, PWM12G1);
 821
 822#define AB23 125
 823SIG_EXPR_LIST_DECL_SEMG(AB23, PWM13, PWM13G1, PWM13, SIG_DESC_SET(SCU41C, 29));
 824SIG_EXPR_LIST_DECL_SESG(AB23, THRUOUT2, THRU2, SIG_DESC_SET(SCU4BC, 29));
 825PIN_DECL_2(AB23, GPIOP5, PWM13, THRUOUT2);
 826GROUP_DECL(PWM13G1, AB23);
 827FUNC_DECL_2(PWM13, PWM13G0, PWM13G1);
 828
 829FUNC_GROUP_DECL(THRU2, W23, AB23);
 830
 831#define AB24 126
 832SIG_EXPR_LIST_DECL_SEMG(AB24, PWM14, PWM14G1, PWM14, SIG_DESC_SET(SCU41C, 30));
 833SIG_EXPR_LIST_DECL_SESG(AB24, THRUIN3, THRU3, SIG_DESC_SET(SCU4BC, 30));
 834PIN_DECL_2(AB24, GPIOP6, PWM14, THRUIN3);
 835GROUP_DECL(PWM14G1, AB24);
 836FUNC_DECL_2(PWM14, PWM14G0, PWM14G1);
 837
 838#define Y23 127
 839SIG_EXPR_LIST_DECL_SEMG(Y23, PWM15, PWM15G1, PWM15, SIG_DESC_SET(SCU41C, 31));
 840SIG_EXPR_LIST_DECL_SESG(Y23, THRUOUT3, THRU3, SIG_DESC_SET(SCU4BC, 31));
 841SIG_EXPR_LIST_DECL_SESG(Y23, HEARTBEAT, HEARTBEAT, SIG_DESC_SET(SCU69C, 31));
 842PIN_DECL_3(Y23, GPIOP7, PWM15, THRUOUT3, HEARTBEAT);
 843GROUP_DECL(PWM15G1, Y23);
 844FUNC_DECL_2(PWM15, PWM15G0, PWM15G1);
 845
 846FUNC_GROUP_DECL(THRU3, AB24, Y23);
 847FUNC_GROUP_DECL(HEARTBEAT, Y23);
 848
 849#define AA25 128
 850SSSF_PIN_DECL(AA25, GPIOQ0, TACH0, SIG_DESC_SET(SCU430, 0));
 851
 852#define AB25 129
 853SSSF_PIN_DECL(AB25, GPIOQ1, TACH1, SIG_DESC_SET(SCU430, 1));
 854
 855#define Y24 130
 856SSSF_PIN_DECL(Y24, GPIOQ2, TACH2, SIG_DESC_SET(SCU430, 2));
 857
 858#define AB26 131
 859SSSF_PIN_DECL(AB26, GPIOQ3, TACH3, SIG_DESC_SET(SCU430, 3));
 860
 861#define Y26 132
 862SSSF_PIN_DECL(Y26, GPIOQ4, TACH4, SIG_DESC_SET(SCU430, 4));
 863
 864#define AC26 133
 865SSSF_PIN_DECL(AC26, GPIOQ5, TACH5, SIG_DESC_SET(SCU430, 5));
 866
 867#define Y25 134
 868SSSF_PIN_DECL(Y25, GPIOQ6, TACH6, SIG_DESC_SET(SCU430, 6));
 869
 870#define AA26 135
 871SSSF_PIN_DECL(AA26, GPIOQ7, TACH7, SIG_DESC_SET(SCU430, 7));
 872
 873#define V25 136
 874SSSF_PIN_DECL(V25, GPIOR0, TACH8, SIG_DESC_SET(SCU430, 8));
 875
 876#define U24 137
 877SSSF_PIN_DECL(U24, GPIOR1, TACH9, SIG_DESC_SET(SCU430, 9));
 878
 879#define V24 138
 880SSSF_PIN_DECL(V24, GPIOR2, TACH10, SIG_DESC_SET(SCU430, 10));
 881
 882#define V26 139
 883SSSF_PIN_DECL(V26, GPIOR3, TACH11, SIG_DESC_SET(SCU430, 11));
 884
 885#define U25 140
 886SSSF_PIN_DECL(U25, GPIOR4, TACH12, SIG_DESC_SET(SCU430, 12));
 887
 888#define T23 141
 889SSSF_PIN_DECL(T23, GPIOR5, TACH13, SIG_DESC_SET(SCU430, 13));
 890
 891#define W26 142
 892SSSF_PIN_DECL(W26, GPIOR6, TACH14, SIG_DESC_SET(SCU430, 14));
 893
 894#define U26 143
 895SSSF_PIN_DECL(U26, GPIOR7, TACH15, SIG_DESC_SET(SCU430, 15));
 896
 897#define R23 144
 898SIG_EXPR_LIST_DECL_SESG(R23, MDC1, MDIO1, SIG_DESC_SET(SCU430, 16));
 899PIN_DECL_1(R23, GPIOS0, MDC1);
 900
 901#define T25 145
 902SIG_EXPR_LIST_DECL_SESG(T25, MDIO1, MDIO1, SIG_DESC_SET(SCU430, 17));
 903PIN_DECL_1(T25, GPIOS1, MDIO1);
 904
 905FUNC_GROUP_DECL(MDIO1, R23, T25);
 906
 907#define T26 146
 908SSSF_PIN_DECL(T26, GPIOS2, PEWAKE, SIG_DESC_SET(SCU430, 18));
 909
 910#define R24 147
 911SSSF_PIN_DECL(R24, GPIOS3, OSCCLK, SIG_DESC_SET(SCU430, 19));
 912
 913#define R26 148
 914SIG_EXPR_LIST_DECL_SESG(R26, TXD10, UART10, SIG_DESC_SET(SCU430, 20));
 915PIN_DECL_1(R26, GPIOS4, TXD10);
 916
 917#define P24 149
 918SIG_EXPR_LIST_DECL_SESG(P24, RXD10, UART10, SIG_DESC_SET(SCU430, 21));
 919PIN_DECL_1(P24, GPIOS5, RXD10);
 920
 921FUNC_GROUP_DECL(UART10, R26, P24);
 922
 923#define P23 150
 924SIG_EXPR_LIST_DECL_SESG(P23, TXD11, UART11, SIG_DESC_SET(SCU430, 22));
 925PIN_DECL_1(P23, GPIOS6, TXD11);
 926
 927#define T24 151
 928SIG_EXPR_LIST_DECL_SESG(T24, RXD11, UART11, SIG_DESC_SET(SCU430, 23));
 929PIN_DECL_1(T24, GPIOS7, RXD11);
 930
 931FUNC_GROUP_DECL(UART11, P23, T24);
 932
 933#define AD20 152
 934SIG_EXPR_LIST_DECL_SESG(AD20, GPIT0, GPIT0, SIG_DESC_SET(SCU430, 24));
 935SIG_EXPR_LIST_DECL_SESG(AD20, ADC0, ADC0);
 936PIN_DECL_(AD20, SIG_EXPR_LIST_PTR(AD20, GPIT0), SIG_EXPR_LIST_PTR(AD20, ADC0));
 937FUNC_GROUP_DECL(GPIT0, AD20);
 938FUNC_GROUP_DECL(ADC0, AD20);
 939
 940#define AC18 153
 941SIG_EXPR_LIST_DECL_SESG(AC18, GPIT1, GPIT1, SIG_DESC_SET(SCU430, 25));
 942SIG_EXPR_LIST_DECL_SESG(AC18, ADC1, ADC1);
 943PIN_DECL_(AC18, SIG_EXPR_LIST_PTR(AC18, GPIT1), SIG_EXPR_LIST_PTR(AC18, ADC1));
 944FUNC_GROUP_DECL(GPIT1, AC18);
 945FUNC_GROUP_DECL(ADC1, AC18);
 946
 947#define AE19 154
 948SIG_EXPR_LIST_DECL_SESG(AE19, GPIT2, GPIT2, SIG_DESC_SET(SCU430, 26));
 949SIG_EXPR_LIST_DECL_SESG(AE19, ADC2, ADC2);
 950PIN_DECL_(AE19, SIG_EXPR_LIST_PTR(AE19, GPIT2), SIG_EXPR_LIST_PTR(AE19, ADC2));
 951FUNC_GROUP_DECL(GPIT2, AE19);
 952FUNC_GROUP_DECL(ADC2, AE19);
 953
 954#define AD19 155
 955SIG_EXPR_LIST_DECL_SESG(AD19, GPIT3, GPIT3, SIG_DESC_SET(SCU430, 27));
 956SIG_EXPR_LIST_DECL_SESG(AD19, ADC3, ADC3);
 957PIN_DECL_(AD19, SIG_EXPR_LIST_PTR(AD19, GPIT3), SIG_EXPR_LIST_PTR(AD19, ADC3));
 958FUNC_GROUP_DECL(GPIT3, AD19);
 959FUNC_GROUP_DECL(ADC3, AD19);
 960
 961#define AC19 156
 962SIG_EXPR_LIST_DECL_SESG(AC19, GPIT4, GPIT4, SIG_DESC_SET(SCU430, 28));
 963SIG_EXPR_LIST_DECL_SESG(AC19, ADC4, ADC4);
 964PIN_DECL_(AC19, SIG_EXPR_LIST_PTR(AC19, GPIT4), SIG_EXPR_LIST_PTR(AC19, ADC4));
 965FUNC_GROUP_DECL(GPIT4, AC19);
 966FUNC_GROUP_DECL(ADC4, AC19);
 967
 968#define AB19 157
 969SIG_EXPR_LIST_DECL_SESG(AB19, GPIT5, GPIT5, SIG_DESC_SET(SCU430, 29));
 970SIG_EXPR_LIST_DECL_SESG(AB19, ADC5, ADC5);
 971PIN_DECL_(AB19, SIG_EXPR_LIST_PTR(AB19, GPIT5), SIG_EXPR_LIST_PTR(AB19, ADC5));
 972FUNC_GROUP_DECL(GPIT5, AB19);
 973FUNC_GROUP_DECL(ADC5, AB19);
 974
 975#define AB18 158
 976SIG_EXPR_LIST_DECL_SESG(AB18, GPIT6, GPIT6, SIG_DESC_SET(SCU430, 30));
 977SIG_EXPR_LIST_DECL_SESG(AB18, ADC6, ADC6);
 978PIN_DECL_(AB18, SIG_EXPR_LIST_PTR(AB18, GPIT6), SIG_EXPR_LIST_PTR(AB18, ADC6));
 979FUNC_GROUP_DECL(GPIT6, AB18);
 980FUNC_GROUP_DECL(ADC6, AB18);
 981
 982#define AE18 159
 983SIG_EXPR_LIST_DECL_SESG(AE18, GPIT7, GPIT7, SIG_DESC_SET(SCU430, 31));
 984SIG_EXPR_LIST_DECL_SESG(AE18, ADC7, ADC7);
 985PIN_DECL_(AE18, SIG_EXPR_LIST_PTR(AE18, GPIT7), SIG_EXPR_LIST_PTR(AE18, ADC7));
 986FUNC_GROUP_DECL(GPIT7, AE18);
 987FUNC_GROUP_DECL(ADC7, AE18);
 988
 989#define AB16 160
 990SIG_EXPR_LIST_DECL_SEMG(AB16, SALT9, SALT9G1, SALT9, SIG_DESC_SET(SCU434, 0),
 991			SIG_DESC_CLEAR(SCU694, 16));
 992SIG_EXPR_LIST_DECL_SESG(AB16, GPIU0, GPIU0, SIG_DESC_SET(SCU434, 0),
 993			SIG_DESC_SET(SCU694, 16));
 994SIG_EXPR_LIST_DECL_SESG(AB16, ADC8, ADC8);
 995PIN_DECL_(AB16, SIG_EXPR_LIST_PTR(AB16, SALT9), SIG_EXPR_LIST_PTR(AB16, GPIU0),
 996	  SIG_EXPR_LIST_PTR(AB16, ADC8));
 997GROUP_DECL(SALT9G1, AB16);
 998FUNC_DECL_2(SALT9, SALT9G0, SALT9G1);
 999FUNC_GROUP_DECL(GPIU0, AB16);
1000FUNC_GROUP_DECL(ADC8, AB16);
1001
1002#define AA17 161
1003SIG_EXPR_LIST_DECL_SEMG(AA17, SALT10, SALT10G1, SALT10, SIG_DESC_SET(SCU434, 1),
1004			SIG_DESC_CLEAR(SCU694, 17));
1005SIG_EXPR_LIST_DECL_SESG(AA17, GPIU1, GPIU1, SIG_DESC_SET(SCU434, 1),
1006			SIG_DESC_SET(SCU694, 17));
1007SIG_EXPR_LIST_DECL_SESG(AA17, ADC9, ADC9);
1008PIN_DECL_(AA17, SIG_EXPR_LIST_PTR(AA17, SALT10), SIG_EXPR_LIST_PTR(AA17, GPIU1),
1009	  SIG_EXPR_LIST_PTR(AA17, ADC9));
1010GROUP_DECL(SALT10G1, AA17);
1011FUNC_DECL_2(SALT10, SALT10G0, SALT10G1);
1012FUNC_GROUP_DECL(GPIU1, AA17);
1013FUNC_GROUP_DECL(ADC9, AA17);
1014
1015#define AB17 162
1016SIG_EXPR_LIST_DECL_SEMG(AB17, SALT11, SALT11G1, SALT11, SIG_DESC_SET(SCU434, 2),
1017			SIG_DESC_CLEAR(SCU694, 18));
1018SIG_EXPR_LIST_DECL_SESG(AB17, GPIU2, GPIU2, SIG_DESC_SET(SCU434, 2),
1019			SIG_DESC_SET(SCU694, 18));
1020SIG_EXPR_LIST_DECL_SESG(AB17, ADC10, ADC10);
1021PIN_DECL_(AB17, SIG_EXPR_LIST_PTR(AB17, SALT11), SIG_EXPR_LIST_PTR(AB17, GPIU2),
1022	  SIG_EXPR_LIST_PTR(AB17, ADC10));
1023GROUP_DECL(SALT11G1, AB17);
1024FUNC_DECL_2(SALT11, SALT11G0, SALT11G1);
1025FUNC_GROUP_DECL(GPIU2, AB17);
1026FUNC_GROUP_DECL(ADC10, AB17);
1027
1028#define AE16 163
1029SIG_EXPR_LIST_DECL_SEMG(AE16, SALT12, SALT12G1, SALT12, SIG_DESC_SET(SCU434, 3),
1030			SIG_DESC_CLEAR(SCU694, 19));
1031SIG_EXPR_LIST_DECL_SESG(AE16, GPIU3, GPIU3, SIG_DESC_SET(SCU434, 3),
1032			SIG_DESC_SET(SCU694, 19));
1033SIG_EXPR_LIST_DECL_SESG(AE16, ADC11, ADC11);
1034PIN_DECL_(AE16, SIG_EXPR_LIST_PTR(AE16, SALT12), SIG_EXPR_LIST_PTR(AE16, GPIU3),
1035	  SIG_EXPR_LIST_PTR(AE16, ADC11));
1036GROUP_DECL(SALT12G1, AE16);
1037FUNC_DECL_2(SALT12, SALT12G0, SALT12G1);
1038FUNC_GROUP_DECL(GPIU3, AE16);
1039FUNC_GROUP_DECL(ADC11, AE16);
1040
1041#define AC16 164
1042SIG_EXPR_LIST_DECL_SEMG(AC16, SALT13, SALT13G1, SALT13, SIG_DESC_SET(SCU434, 4),
1043			SIG_DESC_CLEAR(SCU694, 20));
1044SIG_EXPR_LIST_DECL_SESG(AC16, GPIU4, GPIU4, SIG_DESC_SET(SCU434, 4),
1045			SIG_DESC_SET(SCU694, 20));
1046SIG_EXPR_LIST_DECL_SESG(AC16, ADC12, ADC12);
1047PIN_DECL_(AC16, SIG_EXPR_LIST_PTR(AC16, SALT13), SIG_EXPR_LIST_PTR(AC16, GPIU4),
1048	  SIG_EXPR_LIST_PTR(AC16, ADC12));
1049GROUP_DECL(SALT13G1, AC16);
1050FUNC_DECL_2(SALT13, SALT13G0, SALT13G1);
1051FUNC_GROUP_DECL(GPIU4, AC16);
1052FUNC_GROUP_DECL(ADC12, AC16);
1053
1054#define AA16 165
1055SIG_EXPR_LIST_DECL_SEMG(AA16, SALT14, SALT14G1, SALT14, SIG_DESC_SET(SCU434, 5),
1056			SIG_DESC_CLEAR(SCU694, 21));
1057SIG_EXPR_LIST_DECL_SESG(AA16, GPIU5, GPIU5, SIG_DESC_SET(SCU434, 5),
1058			SIG_DESC_SET(SCU694, 21));
1059SIG_EXPR_LIST_DECL_SESG(AA16, ADC13, ADC13);
1060PIN_DECL_(AA16, SIG_EXPR_LIST_PTR(AA16, SALT14), SIG_EXPR_LIST_PTR(AA16, GPIU5),
1061	  SIG_EXPR_LIST_PTR(AA16, ADC13));
1062GROUP_DECL(SALT14G1, AA16);
1063FUNC_DECL_2(SALT14, SALT14G0, SALT14G1);
1064FUNC_GROUP_DECL(GPIU5, AA16);
1065FUNC_GROUP_DECL(ADC13, AA16);
1066
1067#define AD16 166
1068SIG_EXPR_LIST_DECL_SEMG(AD16, SALT15, SALT15G1, SALT15, SIG_DESC_SET(SCU434, 6),
1069			SIG_DESC_CLEAR(SCU694, 22));
1070SIG_EXPR_LIST_DECL_SESG(AD16, GPIU6, GPIU6, SIG_DESC_SET(SCU434, 6),
1071			SIG_DESC_SET(SCU694, 22));
1072SIG_EXPR_LIST_DECL_SESG(AD16, ADC14, ADC14);
1073PIN_DECL_(AD16, SIG_EXPR_LIST_PTR(AD16, SALT15), SIG_EXPR_LIST_PTR(AD16, GPIU6),
1074	  SIG_EXPR_LIST_PTR(AD16, ADC14));
1075GROUP_DECL(SALT15G1, AD16);
1076FUNC_DECL_2(SALT15, SALT15G0, SALT15G1);
1077FUNC_GROUP_DECL(GPIU6, AD16);
1078FUNC_GROUP_DECL(ADC14, AD16);
1079
1080#define AC17 167
1081SIG_EXPR_LIST_DECL_SEMG(AC17, SALT16, SALT16G1, SALT16, SIG_DESC_SET(SCU434, 7),
1082			SIG_DESC_CLEAR(SCU694, 23));
1083SIG_EXPR_LIST_DECL_SESG(AC17, GPIU7, GPIU7, SIG_DESC_SET(SCU434, 7),
1084			SIG_DESC_SET(SCU694, 23));
1085SIG_EXPR_LIST_DECL_SESG(AC17, ADC15, ADC15);
1086PIN_DECL_(AC17, SIG_EXPR_LIST_PTR(AC17, SALT16), SIG_EXPR_LIST_PTR(AC17, GPIU7),
1087	  SIG_EXPR_LIST_PTR(AC17, ADC15));
1088GROUP_DECL(SALT16G1, AC17);
1089FUNC_DECL_2(SALT16, SALT16G0, SALT16G1);
1090FUNC_GROUP_DECL(GPIU7, AC17);
1091FUNC_GROUP_DECL(ADC15, AC17);
1092
1093#define AB15 168
1094SSSF_PIN_DECL(AB15, GPIOV0, SIOS3, SIG_DESC_SET(SCU434, 8));
1095
1096#define AF14 169
1097SSSF_PIN_DECL(AF14, GPIOV1, SIOS5, SIG_DESC_SET(SCU434, 9));
1098
1099#define AD14 170
1100SSSF_PIN_DECL(AD14, GPIOV2, SIOPWREQ, SIG_DESC_SET(SCU434, 10));
1101
1102#define AC15 171
1103SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL, SIG_DESC_SET(SCU434, 11));
1104
1105#define AE15 172
1106SSSF_PIN_DECL(AE15, GPIOV4, SIOPWRGD, SIG_DESC_SET(SCU434, 12));
1107
1108#define AE14 173
1109SIG_EXPR_LIST_DECL_SESG(AE14, LPCPD, LPCPD, SIG_DESC_SET(SCU434, 13));
1110SIG_EXPR_LIST_DECL_SESG(AE14, LHPD, LHPD, SIG_DESC_SET(SCU4D4, 13));
1111PIN_DECL_2(AE14, GPIOV5, LPCPD, LHPD);
1112FUNC_GROUP_DECL(LPCPD, AE14);
1113FUNC_GROUP_DECL(LHPD, AE14);
1114
1115#define AD15 174
1116SSSF_PIN_DECL(AD15, GPIOV6, LPCPME, SIG_DESC_SET(SCU434, 14));
1117
1118#define AF15 175
1119SSSF_PIN_DECL(AF15, GPIOV7, LPCSMI, SIG_DESC_SET(SCU434, 15));
1120
1121#define AB7 176
1122SIG_EXPR_LIST_DECL_SESG(AB7, LAD0, LPC, SIG_DESC_SET(SCU434, 16),
1123			  SIG_DESC_SET(SCU510, 6));
1124SIG_EXPR_LIST_DECL_SESG(AB7, ESPID0, ESPI, SIG_DESC_SET(SCU434, 16));
1125PIN_DECL_2(AB7, GPIOW0, LAD0, ESPID0);
1126
1127#define AB8 177
1128SIG_EXPR_LIST_DECL_SESG(AB8, LAD1, LPC, SIG_DESC_SET(SCU434, 17),
1129			  SIG_DESC_SET(SCU510, 6));
1130SIG_EXPR_LIST_DECL_SESG(AB8, ESPID1, ESPI, SIG_DESC_SET(SCU434, 17));
1131PIN_DECL_2(AB8, GPIOW1, LAD1, ESPID1);
1132
1133#define AC8 178
1134SIG_EXPR_LIST_DECL_SESG(AC8, LAD2, LPC, SIG_DESC_SET(SCU434, 18),
1135			  SIG_DESC_SET(SCU510, 6));
1136SIG_EXPR_LIST_DECL_SESG(AC8, ESPID2, ESPI, SIG_DESC_SET(SCU434, 18));
1137PIN_DECL_2(AC8, GPIOW2, LAD2, ESPID2);
1138
1139#define AC7 179
1140SIG_EXPR_LIST_DECL_SESG(AC7, LAD3, LPC, SIG_DESC_SET(SCU434, 19),
1141			  SIG_DESC_SET(SCU510, 6));
1142SIG_EXPR_LIST_DECL_SESG(AC7, ESPID3, ESPI, SIG_DESC_SET(SCU434, 19));
1143PIN_DECL_2(AC7, GPIOW3, LAD3, ESPID3);
1144
1145#define AE7 180
1146SIG_EXPR_LIST_DECL_SESG(AE7, LCLK, LPC, SIG_DESC_SET(SCU434, 20),
1147			  SIG_DESC_SET(SCU510, 6));
1148SIG_EXPR_LIST_DECL_SESG(AE7, ESPICK, ESPI, SIG_DESC_SET(SCU434, 20));
1149PIN_DECL_2(AE7, GPIOW4, LCLK, ESPICK);
1150
1151#define AF7 181
1152SIG_EXPR_LIST_DECL_SESG(AF7, LFRAME, LPC, SIG_DESC_SET(SCU434, 21),
1153			  SIG_DESC_SET(SCU510, 6));
1154SIG_EXPR_LIST_DECL_SESG(AF7, ESPICS, ESPI, SIG_DESC_SET(SCU434, 21));
1155PIN_DECL_2(AF7, GPIOW5, LFRAME, ESPICS);
1156
1157#define AD7 182
1158SIG_EXPR_LIST_DECL_SESG(AD7, LSIRQ, LSIRQ, SIG_DESC_SET(SCU434, 22),
1159			  SIG_DESC_SET(SCU510, 6));
1160SIG_EXPR_LIST_DECL_SESG(AD7, ESPIALT, ESPIALT, SIG_DESC_SET(SCU434, 22));
1161PIN_DECL_2(AD7, GPIOW6, LSIRQ, ESPIALT);
1162FUNC_GROUP_DECL(LSIRQ, AD7);
1163FUNC_GROUP_DECL(ESPIALT, AD7);
1164
1165#define AD8 183
1166SIG_EXPR_LIST_DECL_SESG(AD8, LPCRST, LPC, SIG_DESC_SET(SCU434, 23),
1167			  SIG_DESC_SET(SCU510, 6));
1168SIG_EXPR_LIST_DECL_SESG(AD8, ESPIRST, ESPI, SIG_DESC_SET(SCU434, 23));
1169PIN_DECL_2(AD8, GPIOW7, LPCRST, ESPIRST);
1170
1171FUNC_GROUP_DECL(LPC, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1172FUNC_GROUP_DECL(ESPI, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1173
1174#define AE8 184
1175SIG_EXPR_LIST_DECL_SEMG(AE8, SPI2CS0, SPI2, SPI2, SIG_DESC_SET(SCU434, 24));
1176PIN_DECL_1(AE8, GPIOX0, SPI2CS0);
1177
1178#define AA9 185
1179SSSF_PIN_DECL(AA9, GPIOX1, SPI2CS1, SIG_DESC_SET(SCU434, 25));
1180
1181#define AC9 186
1182SSSF_PIN_DECL(AC9, GPIOX2, SPI2CS2, SIG_DESC_SET(SCU434, 26));
1183
1184#define AF8 187
1185SIG_EXPR_LIST_DECL_SEMG(AF8, SPI2CK, SPI2, SPI2, SIG_DESC_SET(SCU434, 27));
1186PIN_DECL_1(AF8, GPIOX3, SPI2CK);
1187
1188#define AB9 188
1189SIG_EXPR_LIST_DECL_SEMG(AB9, SPI2MOSI, SPI2, SPI2, SIG_DESC_SET(SCU434, 28));
1190PIN_DECL_1(AB9, GPIOX4, SPI2MOSI);
1191
1192#define AD9 189
1193SIG_EXPR_LIST_DECL_SEMG(AD9, SPI2MISO, SPI2, SPI2, SIG_DESC_SET(SCU434, 29));
1194PIN_DECL_1(AD9, GPIOX5, SPI2MISO);
1195
1196GROUP_DECL(SPI2, AE8, AF8, AB9, AD9);
1197
1198#define AF9 190
1199SIG_EXPR_LIST_DECL_SEMG(AF9, SPI2DQ2, QSPI2, SPI2, SIG_DESC_SET(SCU434, 30));
1200SIG_EXPR_LIST_DECL_SEMG(AF9, TXD12, UART12G1, UART12, SIG_DESC_SET(SCU4D4, 30));
1201PIN_DECL_2(AF9, GPIOX6, SPI2DQ2, TXD12);
1202
1203#define AB10 191
1204SIG_EXPR_LIST_DECL_SEMG(AB10, SPI2DQ3, QSPI2, SPI2, SIG_DESC_SET(SCU434, 31));
1205SIG_EXPR_LIST_DECL_SEMG(AB10, RXD12, UART12G1, UART12,
1206			SIG_DESC_SET(SCU4D4, 31));
1207PIN_DECL_2(AB10, GPIOX7, SPI2DQ3, RXD12);
1208
1209GROUP_DECL(QSPI2, AE8, AF8, AB9, AD9, AF9, AB10);
1210FUNC_DECL_2(SPI2, SPI2, QSPI2);
1211
1212GROUP_DECL(UART12G1, AF9, AB10);
1213FUNC_DECL_2(UART12, UART12G0, UART12G1);
1214
1215#define AF11 192
1216SIG_EXPR_LIST_DECL_SESG(AF11, SALT5, SALT5, SIG_DESC_SET(SCU438, 0));
1217SIG_EXPR_LIST_DECL_SESG(AF11, WDTRST1, WDTRST1, SIG_DESC_SET(SCU4D8, 0));
1218PIN_DECL_2(AF11, GPIOY0, SALT5, WDTRST1);
1219FUNC_GROUP_DECL(SALT5, AF11);
1220FUNC_GROUP_DECL(WDTRST1, AF11);
1221
1222#define AD12 193
1223SIG_EXPR_LIST_DECL_SESG(AD12, SALT6, SALT6, SIG_DESC_SET(SCU438, 1));
1224SIG_EXPR_LIST_DECL_SESG(AD12, WDTRST2, WDTRST2, SIG_DESC_SET(SCU4D8, 1));
1225PIN_DECL_2(AD12, GPIOY1, SALT6, WDTRST2);
1226FUNC_GROUP_DECL(SALT6, AD12);
1227FUNC_GROUP_DECL(WDTRST2, AD12);
1228
1229#define AE11 194
1230SIG_EXPR_LIST_DECL_SESG(AE11, SALT7, SALT7, SIG_DESC_SET(SCU438, 2));
1231SIG_EXPR_LIST_DECL_SESG(AE11, WDTRST3, WDTRST3, SIG_DESC_SET(SCU4D8, 2));
1232PIN_DECL_2(AE11, GPIOY2, SALT7, WDTRST3);
1233FUNC_GROUP_DECL(SALT7, AE11);
1234FUNC_GROUP_DECL(WDTRST3, AE11);
1235
1236#define AA12 195
1237SIG_EXPR_LIST_DECL_SESG(AA12, SALT8, SALT8, SIG_DESC_SET(SCU438, 3));
1238SIG_EXPR_LIST_DECL_SESG(AA12, WDTRST4, WDTRST4, SIG_DESC_SET(SCU4D8, 3));
1239PIN_DECL_2(AA12, GPIOY3, SALT8, WDTRST4);
1240FUNC_GROUP_DECL(SALT8, AA12);
1241FUNC_GROUP_DECL(WDTRST4, AA12);
1242
1243#define AE12 196
1244SIG_EXPR_LIST_DECL_SESG(AE12, FWSPIQ2, FWQSPI, SIG_DESC_SET(SCU438, 4));
1245SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);
1246PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIQ2),
1247	  SIG_EXPR_LIST_PTR(AE12, GPIOY4));
1248
1249#define AF12 197
1250SIG_EXPR_LIST_DECL_SESG(AF12, FWSPIQ3, FWQSPI, SIG_DESC_SET(SCU438, 5));
1251SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);
1252PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIQ3),
1253	  SIG_EXPR_LIST_PTR(AF12, GPIOY5));
1254FUNC_GROUP_DECL(FWQSPI, AE12, AF12);
1255
1256#define AC12 198
1257SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
1258
1259#define AB12 199
1260SSSF_PIN_DECL(AB12, GPIOY7, FWSPIWP, SIG_DESC_SET(SCU438, 7));
1261
1262#define AC10 200
1263SSSF_PIN_DECL(AC10, GPIOZ0, SPI1CS1, SIG_DESC_SET(SCU438, 8));
1264
1265#define AD10 201
1266SSSF_PIN_DECL(AD10, GPIOZ1, SPI1ABR, SIG_DESC_SET(SCU438, 9));
1267
1268#define AE10 202
1269SSSF_PIN_DECL(AE10, GPIOZ2, SPI1WP, SIG_DESC_SET(SCU438, 10));
1270
1271#define AB11 203
1272SIG_EXPR_LIST_DECL_SEMG(AB11, SPI1CK, SPI1, SPI1, SIG_DESC_SET(SCU438, 11));
1273PIN_DECL_1(AB11, GPIOZ3, SPI1CK);
1274
1275#define AC11 204
1276SIG_EXPR_LIST_DECL_SEMG(AC11, SPI1MOSI, SPI1, SPI1, SIG_DESC_SET(SCU438, 12));
1277PIN_DECL_1(AC11, GPIOZ4, SPI1MOSI);
1278
1279#define AA11 205
1280SIG_EXPR_LIST_DECL_SEMG(AA11, SPI1MISO, SPI1, SPI1, SIG_DESC_SET(SCU438, 13));
1281PIN_DECL_1(AA11, GPIOZ5, SPI1MISO);
1282
1283GROUP_DECL(SPI1, AB11, AC11, AA11);
1284
1285#define AD11 206
1286SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
1287SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
1288			SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
1289PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
1290
1291#define AF10 207
1292SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1293SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1294			SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
1295PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1296
1297GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
1298FUNC_DECL_2(SPI1, SPI1, QSPI1);
1299
1300GROUP_DECL(UART13G1, AD11, AF10);
1301FUNC_DECL_2(UART13, UART13G0, UART13G1);
1302
1303#define C6 208
1304SIG_EXPR_LIST_DECL_SESG(C6, RGMII1TXCK, RGMII1, SIG_DESC_SET(SCU400, 0),
1305			  SIG_DESC_SET(SCU500, 6));
1306SIG_EXPR_LIST_DECL_SESG(C6, RMII1RCLKO, RMII1, SIG_DESC_SET(SCU400, 0),
1307			  SIG_DESC_CLEAR(SCU500, 6));
1308PIN_DECL_2(C6, GPIO18A0, RGMII1TXCK, RMII1RCLKO);
1309
1310#define D6 209
1311SIG_EXPR_LIST_DECL_SESG(D6, RGMII1TXCTL, RGMII1, SIG_DESC_SET(SCU400, 1),
1312			  SIG_DESC_SET(SCU500, 6));
1313SIG_EXPR_LIST_DECL_SESG(D6, RMII1TXEN, RMII1, SIG_DESC_SET(SCU400, 1),
1314			  SIG_DESC_CLEAR(SCU500, 6));
1315PIN_DECL_2(D6, GPIO18A1, RGMII1TXCTL, RMII1TXEN);
1316
1317#define D5 210
1318SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1319			  SIG_DESC_SET(SCU500, 6));
1320SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1321			  SIG_DESC_CLEAR(SCU500, 6));
1322PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1323
1324#define A3 211
1325SIG_EXPR_LIST_DECL_SESG(A3, RGMII1TXD1, RGMII1, SIG_DESC_SET(SCU400, 3),
1326			  SIG_DESC_SET(SCU500, 6));
1327SIG_EXPR_LIST_DECL_SESG(A3, RMII1TXD1, RMII1, SIG_DESC_SET(SCU400, 3),
1328			  SIG_DESC_CLEAR(SCU500, 6));
1329PIN_DECL_2(A3, GPIO18A3, RGMII1TXD1, RMII1TXD1);
1330
1331#define C5 212
1332SIG_EXPR_LIST_DECL_SESG(C5, RGMII1TXD2, RGMII1, SIG_DESC_SET(SCU400, 4),
1333			  SIG_DESC_SET(SCU500, 6));
1334PIN_DECL_1(C5, GPIO18A4, RGMII1TXD2);
1335
1336#define E6 213
1337SIG_EXPR_LIST_DECL_SESG(E6, RGMII1TXD3, RGMII1, SIG_DESC_SET(SCU400, 5),
1338			  SIG_DESC_SET(SCU500, 6));
1339PIN_DECL_1(E6, GPIO18A5, RGMII1TXD3);
1340
1341#define B3 214
1342SIG_EXPR_LIST_DECL_SESG(B3, RGMII1RXCK, RGMII1, SIG_DESC_SET(SCU400, 6),
1343			  SIG_DESC_SET(SCU500, 6));
1344SIG_EXPR_LIST_DECL_SESG(B3, RMII1RCLKI, RMII1, SIG_DESC_SET(SCU400, 6),
1345			  SIG_DESC_CLEAR(SCU500, 6));
1346PIN_DECL_2(B3, GPIO18A6, RGMII1RXCK, RMII1RCLKI);
1347
1348#define A2 215
1349SIG_EXPR_LIST_DECL_SESG(A2, RGMII1RXCTL, RGMII1, SIG_DESC_SET(SCU400, 7),
1350			  SIG_DESC_SET(SCU500, 6));
1351PIN_DECL_1(A2, GPIO18A7, RGMII1RXCTL);
1352
1353#define B2 216
1354SIG_EXPR_LIST_DECL_SESG(B2, RGMII1RXD0, RGMII1, SIG_DESC_SET(SCU400, 8),
1355			  SIG_DESC_SET(SCU500, 6));
1356SIG_EXPR_LIST_DECL_SESG(B2, RMII1RXD0, RMII1, SIG_DESC_SET(SCU400, 8),
1357			  SIG_DESC_CLEAR(SCU500, 6));
1358PIN_DECL_2(B2, GPIO18B0, RGMII1RXD0, RMII1RXD0);
1359
1360#define B1 217
1361SIG_EXPR_LIST_DECL_SESG(B1, RGMII1RXD1, RGMII1, SIG_DESC_SET(SCU400, 9),
1362			  SIG_DESC_SET(SCU500, 6));
1363SIG_EXPR_LIST_DECL_SESG(B1, RMII1RXD1, RMII1, SIG_DESC_SET(SCU400, 9),
1364			  SIG_DESC_CLEAR(SCU500, 6));
1365PIN_DECL_2(B1, GPIO18B1, RGMII1RXD1, RMII1RXD1);
1366
1367#define C4 218
1368SIG_EXPR_LIST_DECL_SESG(C4, RGMII1RXD2, RGMII1, SIG_DESC_SET(SCU400, 10),
1369			  SIG_DESC_SET(SCU500, 6));
1370SIG_EXPR_LIST_DECL_SESG(C4, RMII1CRSDV, RMII1, SIG_DESC_SET(SCU400, 10),
1371			  SIG_DESC_CLEAR(SCU500, 6));
1372PIN_DECL_2(C4, GPIO18B2, RGMII1RXD2, RMII1CRSDV);
1373
1374#define E5 219
1375SIG_EXPR_LIST_DECL_SESG(E5, RGMII1RXD3, RGMII1, SIG_DESC_SET(SCU400, 11),
1376			  SIG_DESC_SET(SCU500, 6));
1377SIG_EXPR_LIST_DECL_SESG(E5, RMII1RXER, RMII1, SIG_DESC_SET(SCU400, 11),
1378			  SIG_DESC_CLEAR(SCU500, 6));
1379PIN_DECL_2(E5, GPIO18B3, RGMII1RXD3, RMII1RXER);
1380
1381FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1382FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1383
1384#define D4 220
1385SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),
1386			  SIG_DESC_SET(SCU500, 7));
1387SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),
1388			  SIG_DESC_CLEAR(SCU500, 7));
1389PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);
1390
1391#define C2 221
1392SIG_EXPR_LIST_DECL_SESG(C2, RGMII2TXCTL, RGMII2, SIG_DESC_SET(SCU400, 13),
1393			  SIG_DESC_SET(SCU500, 7));
1394SIG_EXPR_LIST_DECL_SESG(C2, RMII2TXEN, RMII2, SIG_DESC_SET(SCU400, 13),
1395			  SIG_DESC_CLEAR(SCU500, 7));
1396PIN_DECL_2(C2, GPIO18B5, RGMII2TXCTL, RMII2TXEN);
1397
1398#define C1 222
1399SIG_EXPR_LIST_DECL_SESG(C1, RGMII2TXD0, RGMII2, SIG_DESC_SET(SCU400, 14),
1400			  SIG_DESC_SET(SCU500, 7));
1401SIG_EXPR_LIST_DECL_SESG(C1, RMII2TXD0, RMII2, SIG_DESC_SET(SCU400, 14),
1402			  SIG_DESC_CLEAR(SCU500, 7));
1403PIN_DECL_2(C1, GPIO18B6, RGMII2TXD0, RMII2TXD0);
1404
1405#define D3 223
1406SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1407			  SIG_DESC_SET(SCU500, 7));
1408SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1409			  SIG_DESC_CLEAR(SCU500, 7));
1410PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1411
1412#define E4 224
1413SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16),
1414			  SIG_DESC_SET(SCU500, 7));
1415PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2);
1416
1417#define F5 225
1418SIG_EXPR_LIST_DECL_SESG(F5, RGMII2TXD3, RGMII2, SIG_DESC_SET(SCU400, 17),
1419			  SIG_DESC_SET(SCU500, 7));
1420PIN_DECL_1(F5, GPIO18C1, RGMII2TXD3);
1421
1422#define D2 226
1423SIG_EXPR_LIST_DECL_SESG(D2, RGMII2RXCK, RGMII2, SIG_DESC_SET(SCU400, 18),
1424			  SIG_DESC_SET(SCU500, 7));
1425SIG_EXPR_LIST_DECL_SESG(D2, RMII2RCLKI, RMII2, SIG_DESC_SET(SCU400, 18),
1426			  SIG_DESC_CLEAR(SCU500, 7));
1427PIN_DECL_2(D2, GPIO18C2, RGMII2RXCK, RMII2RCLKI);
1428
1429#define E3 227
1430SIG_EXPR_LIST_DECL_SESG(E3, RGMII2RXCTL, RGMII2, SIG_DESC_SET(SCU400, 19),
1431			  SIG_DESC_SET(SCU500, 7));
1432PIN_DECL_1(E3, GPIO18C3, RGMII2RXCTL);
1433
1434#define D1 228
1435SIG_EXPR_LIST_DECL_SESG(D1, RGMII2RXD0, RGMII2, SIG_DESC_SET(SCU400, 20),
1436			  SIG_DESC_SET(SCU500, 7));
1437SIG_EXPR_LIST_DECL_SESG(D1, RMII2RXD0, RMII2, SIG_DESC_SET(SCU400, 20),
1438			  SIG_DESC_CLEAR(SCU500, 7));
1439PIN_DECL_2(D1, GPIO18C4, RGMII2RXD0, RMII2RXD0);
1440
1441#define F4 229
1442SIG_EXPR_LIST_DECL_SESG(F4, RGMII2RXD1, RGMII2, SIG_DESC_SET(SCU400, 21),
1443			  SIG_DESC_SET(SCU500, 7));
1444SIG_EXPR_LIST_DECL_SESG(F4, RMII2RXD1, RMII2, SIG_DESC_SET(SCU400, 21),
1445			  SIG_DESC_CLEAR(SCU500, 7));
1446PIN_DECL_2(F4, GPIO18C5, RGMII2RXD1, RMII2RXD1);
1447
1448#define E2 230
1449SIG_EXPR_LIST_DECL_SESG(E2, RGMII2RXD2, RGMII2, SIG_DESC_SET(SCU400, 22),
1450			  SIG_DESC_SET(SCU500, 7));
1451SIG_EXPR_LIST_DECL_SESG(E2, RMII2CRSDV, RMII2, SIG_DESC_SET(SCU400, 22),
1452			  SIG_DESC_CLEAR(SCU500, 7));
1453PIN_DECL_2(E2, GPIO18C6, RGMII2RXD2, RMII2CRSDV);
1454
1455#define E1 231
1456SIG_EXPR_LIST_DECL_SESG(E1, RGMII2RXD3, RGMII2, SIG_DESC_SET(SCU400, 23),
1457			  SIG_DESC_SET(SCU500, 7));
1458SIG_EXPR_LIST_DECL_SESG(E1, RMII2RXER, RMII2, SIG_DESC_SET(SCU400, 23),
1459			  SIG_DESC_CLEAR(SCU500, 7));
1460PIN_DECL_2(E1, GPIO18C7, RGMII2RXD3, RMII2RXER);
1461
1462FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1463FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1464
1465#define AB4 232
1466SIG_EXPR_LIST_DECL_SEMG(AB4, EMMCCLK, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 24));
1467PIN_DECL_1(AB4, GPIO18D0, EMMCCLK);
1468
1469#define AA4 233
1470SIG_EXPR_LIST_DECL_SEMG(AA4, EMMCCMD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 25));
1471PIN_DECL_1(AA4, GPIO18D1, EMMCCMD);
1472
1473#define AC4 234
1474SIG_EXPR_LIST_DECL_SEMG(AC4, EMMCDAT0, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 26));
1475PIN_DECL_1(AC4, GPIO18D2, EMMCDAT0);
1476
1477#define AA5 235
1478SIG_EXPR_LIST_DECL_SEMG(AA5, EMMCDAT1, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 27));
1479PIN_DECL_1(AA5, GPIO18D3, EMMCDAT1);
1480
1481#define Y5 236
1482SIG_EXPR_LIST_DECL_SEMG(Y5, EMMCDAT2, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 28));
1483PIN_DECL_1(Y5, GPIO18D4, EMMCDAT2);
1484
1485#define AB5 237
1486SIG_EXPR_LIST_DECL_SEMG(AB5, EMMCDAT3, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 29));
1487PIN_DECL_1(AB5, GPIO18D5, EMMCDAT3);
1488
1489#define AB6 238
1490SIG_EXPR_LIST_DECL_SEMG(AB6, EMMCCD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 30));
1491PIN_DECL_1(AB6, GPIO18D6, EMMCCD);
1492
1493#define AC5 239
1494SIG_EXPR_LIST_DECL_SEMG(AC5, EMMCWP, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 31));
1495PIN_DECL_1(AC5, GPIO18D7, EMMCWP);
1496
1497GROUP_DECL(EMMCG1, AB4, AA4, AC4, AB6, AC5);
1498GROUP_DECL(EMMCG4, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);
1499
1500#define Y1 240
1501SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1502SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));
1503SIG_EXPR_LIST_DECL_SEMG(Y1, EMMCDAT4, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 0));
1504PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, EMMCDAT4);
1505
1506#define Y2 241
1507SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1508SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));
1509SIG_EXPR_LIST_DECL_SEMG(Y2, EMMCDAT5, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 1));
1510PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, EMMCDAT5);
1511
1512#define Y3 242
1513SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,
1514			SIG_DESC_SET(SCU500, 3));
1515SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));
1516SIG_EXPR_LIST_DECL_SEMG(Y3, EMMCDAT6, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 2));
1517PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, EMMCDAT6);
1518
1519#define Y4 243
1520SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,
1521			SIG_DESC_SET(SCU500, 3));
1522SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));
1523SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3));
1524PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);
1525
1526GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);
1527GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);
1528FUNC_DECL_1(FWSPID, FWSPID);
1529FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);
1530FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);
1531/*
1532 * FIXME: Confirm bits and priorities are the right way around for the
1533 * following 4 pins
1534 */
1535#define AF25 244
1536SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20));
1537SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_SET(SCU4D8, 20));
1538PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),
1539	  SIG_EXPR_LIST_PTR(AF25, FSI1CLK));
1540
1541#define AE26 245
1542SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21));
1543SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_SET(SCU4D8, 21));
1544PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),
1545	  SIG_EXPR_LIST_PTR(AE26, FSI1DATA));
1546
1547GROUP_DECL(I3C3, AF25, AE26);
1548FUNC_DECL_2(I3C3, HVI3C3, I3C3);
1549FUNC_GROUP_DECL(FSI1, AF25, AE26);
1550
1551#define AE25 246
1552SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22));
1553SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_SET(SCU4D8, 22));
1554PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),
1555	  SIG_EXPR_LIST_PTR(AE25, FSI2CLK));
1556
1557#define AF24 247
1558SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23));
1559SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_SET(SCU4D8, 23));
1560PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),
1561	  SIG_EXPR_LIST_PTR(AF24, FSI2DATA));
1562
1563GROUP_DECL(I3C4, AE25, AF24);
1564FUNC_DECL_2(I3C4, HVI3C4, I3C4);
1565FUNC_GROUP_DECL(FSI2, AE25, AF24);
1566
1567#define AF23 248
1568SIG_EXPR_LIST_DECL_SESG(AF23, I3C1SCL, I3C1, SIG_DESC_SET(SCU438, 16));
1569PIN_DECL_(AF23, SIG_EXPR_LIST_PTR(AF23, I3C1SCL));
1570
1571#define AE24 249
1572SIG_EXPR_LIST_DECL_SESG(AE24, I3C1SDA, I3C1, SIG_DESC_SET(SCU438, 17));
1573PIN_DECL_(AE24, SIG_EXPR_LIST_PTR(AE24, I3C1SDA));
1574
1575FUNC_GROUP_DECL(I3C1, AF23, AE24);
1576
1577#define AF22 250
1578SIG_EXPR_LIST_DECL_SESG(AF22, I3C2SCL, I3C2, SIG_DESC_SET(SCU438, 18));
1579PIN_DECL_(AF22, SIG_EXPR_LIST_PTR(AF22, I3C2SCL));
1580
1581#define AE22 251
1582SIG_EXPR_LIST_DECL_SESG(AE22, I3C2SDA, I3C2, SIG_DESC_SET(SCU438, 19));
1583PIN_DECL_(AE22, SIG_EXPR_LIST_PTR(AE22, I3C2SDA));
1584
1585FUNC_GROUP_DECL(I3C2, AF22, AE22);
1586
1587#define USB2ADP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 0, 0 }
1588#define USB2AD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 1, 0 }
1589#define USB2AH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 2, 0 }
1590#define USB2AHP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 3, 0 }
1591#define USB11BHID_DESC { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 0, 0 }
1592#define USB2BD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 1, 0 }
1593#define USB2BH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 2, 0 }
1594
1595#define A4 252
1596SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADPDP, USBA, USB2ADP, USB2ADP_DESC,
1597			SIG_DESC_SET(SCUC20, 16));
1598SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADDP, USBA, USB2AD, USB2AD_DESC);
1599SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHDP, USBA, USB2AH, USB2AH_DESC);
1600SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHPDP, USBA, USB2AHP, USB2AHP_DESC,
1601			SIG_DESC_SET(SCUC20, 16));
1602PIN_DECL_(A4, SIG_EXPR_LIST_PTR(A4, USB2ADPDP), SIG_EXPR_LIST_PTR(A4, USB2ADDP),
1603	  SIG_EXPR_LIST_PTR(A4, USB2AHDP), SIG_EXPR_LIST_PTR(A4, USB2AHPDP));
1604
1605#define B4 253
1606SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADPDN, USBA, USB2ADP, USB2ADP_DESC);
1607SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADDN, USBA, USB2AD, USB2AD_DESC);
1608SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHDN, USBA, USB2AH, USB2AH_DESC);
1609SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHPDN, USBA, USB2AHP, USB2AHP_DESC);
1610PIN_DECL_(B4, SIG_EXPR_LIST_PTR(B4, USB2ADPDN), SIG_EXPR_LIST_PTR(B4, USB2ADDN),
1611	  SIG_EXPR_LIST_PTR(B4, USB2AHDN), SIG_EXPR_LIST_PTR(B4, USB2AHPDN));
1612
1613GROUP_DECL(USBA, A4, B4);
1614
1615FUNC_DECL_1(USB2ADP, USBA);
1616FUNC_DECL_1(USB2AD, USBA);
1617FUNC_DECL_1(USB2AH, USBA);
1618FUNC_DECL_1(USB2AHP, USBA);
1619
1620#define A6 254
1621SIG_EXPR_LIST_DECL_SEMG(A6, USB11BDP, USBB, USB11BHID, USB11BHID_DESC);
1622SIG_EXPR_LIST_DECL_SEMG(A6, USB2BDDP, USBB, USB2BD, USB2BD_DESC);
1623SIG_EXPR_LIST_DECL_SEMG(A6, USB2BHDP, USBB, USB2BH, USB2BH_DESC);
1624PIN_DECL_(A6, SIG_EXPR_LIST_PTR(A6, USB11BDP), SIG_EXPR_LIST_PTR(A6, USB2BDDP),
1625	  SIG_EXPR_LIST_PTR(A6, USB2BHDP));
1626
1627#define B6 255
1628SIG_EXPR_LIST_DECL_SEMG(B6, USB11BDN, USBB, USB11BHID, USB11BHID_DESC);
1629SIG_EXPR_LIST_DECL_SEMG(B6, USB2BDDN, USBB, USB2BD, USB2BD_DESC);
1630SIG_EXPR_LIST_DECL_SEMG(B6, USB2BHDN, USBB, USB2BH, USB2BH_DESC);
1631PIN_DECL_(B6, SIG_EXPR_LIST_PTR(B6, USB11BDN), SIG_EXPR_LIST_PTR(B6, USB2BDDN),
1632	  SIG_EXPR_LIST_PTR(B6, USB2BHDN));
1633
1634GROUP_DECL(USBB, A6, B6);
1635
1636FUNC_DECL_1(USB11BHID, USBB);
1637FUNC_DECL_1(USB2BD, USBB);
1638FUNC_DECL_1(USB2BH, USBB);
1639
1640#define D7 257
1641SIG_EXPR_LIST_DECL_SESG(D7, RCRST, PCIERC1, SIG_DESC_SET(SCU040, 19),
1642			SIG_DESC_SET(SCU500, 24));
1643PIN_DECL_(D7, SIG_EXPR_LIST_PTR(D7, RCRST));
1644FUNC_GROUP_DECL(PCIERC1, D7);
1645
1646/* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1647
1648static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = {
1649	ASPEED_PINCTRL_PIN(A11),
1650	ASPEED_PINCTRL_PIN(A12),
1651	ASPEED_PINCTRL_PIN(A13),
1652	ASPEED_PINCTRL_PIN(A14),
1653	ASPEED_PINCTRL_PIN(A15),
1654	ASPEED_PINCTRL_PIN(A16),
1655	ASPEED_PINCTRL_PIN(A17),
1656	ASPEED_PINCTRL_PIN(A18),
1657	ASPEED_PINCTRL_PIN(A19),
1658	ASPEED_PINCTRL_PIN(A2),
1659	ASPEED_PINCTRL_PIN(A20),
1660	ASPEED_PINCTRL_PIN(A21),
1661	ASPEED_PINCTRL_PIN(A22),
1662	ASPEED_PINCTRL_PIN(A23),
1663	ASPEED_PINCTRL_PIN(A24),
1664	ASPEED_PINCTRL_PIN(A25),
1665	ASPEED_PINCTRL_PIN(A3),
1666	ASPEED_PINCTRL_PIN(A4),
1667	ASPEED_PINCTRL_PIN(A6),
1668	ASPEED_PINCTRL_PIN(AA11),
1669	ASPEED_PINCTRL_PIN(AA12),
1670	ASPEED_PINCTRL_PIN(AA16),
1671	ASPEED_PINCTRL_PIN(AA17),
1672	ASPEED_PINCTRL_PIN(AA23),
1673	ASPEED_PINCTRL_PIN(AA24),
1674	ASPEED_PINCTRL_PIN(AA25),
1675	ASPEED_PINCTRL_PIN(AA26),
1676	ASPEED_PINCTRL_PIN(AA4),
1677	ASPEED_PINCTRL_PIN(AA5),
1678	ASPEED_PINCTRL_PIN(AA9),
1679	ASPEED_PINCTRL_PIN(AB10),
1680	ASPEED_PINCTRL_PIN(AB11),
1681	ASPEED_PINCTRL_PIN(AB12),
1682	ASPEED_PINCTRL_PIN(AB15),
1683	ASPEED_PINCTRL_PIN(AB16),
1684	ASPEED_PINCTRL_PIN(AB17),
1685	ASPEED_PINCTRL_PIN(AB18),
1686	ASPEED_PINCTRL_PIN(AB19),
1687	ASPEED_PINCTRL_PIN(AB22),
1688	ASPEED_PINCTRL_PIN(AB23),
1689	ASPEED_PINCTRL_PIN(AB24),
1690	ASPEED_PINCTRL_PIN(AB25),
1691	ASPEED_PINCTRL_PIN(AB26),
1692	ASPEED_PINCTRL_PIN(AB4),
1693	ASPEED_PINCTRL_PIN(AB5),
1694	ASPEED_PINCTRL_PIN(AB6),
1695	ASPEED_PINCTRL_PIN(AB7),
1696	ASPEED_PINCTRL_PIN(AB8),
1697	ASPEED_PINCTRL_PIN(AB9),
1698	ASPEED_PINCTRL_PIN(AC10),
1699	ASPEED_PINCTRL_PIN(AC11),
1700	ASPEED_PINCTRL_PIN(AC12),
1701	ASPEED_PINCTRL_PIN(AC15),
1702	ASPEED_PINCTRL_PIN(AC16),
1703	ASPEED_PINCTRL_PIN(AC17),
1704	ASPEED_PINCTRL_PIN(AC18),
1705	ASPEED_PINCTRL_PIN(AC19),
1706	ASPEED_PINCTRL_PIN(AC22),
1707	ASPEED_PINCTRL_PIN(AC23),
1708	ASPEED_PINCTRL_PIN(AC24),
1709	ASPEED_PINCTRL_PIN(AC26),
1710	ASPEED_PINCTRL_PIN(AC4),
1711	ASPEED_PINCTRL_PIN(AC5),
1712	ASPEED_PINCTRL_PIN(AC7),
1713	ASPEED_PINCTRL_PIN(AC8),
1714	ASPEED_PINCTRL_PIN(AC9),
1715	ASPEED_PINCTRL_PIN(AD10),
1716	ASPEED_PINCTRL_PIN(AD11),
1717	ASPEED_PINCTRL_PIN(AD12),
1718	ASPEED_PINCTRL_PIN(AD14),
1719	ASPEED_PINCTRL_PIN(AD15),
1720	ASPEED_PINCTRL_PIN(AD16),
1721	ASPEED_PINCTRL_PIN(AD19),
1722	ASPEED_PINCTRL_PIN(AD20),
1723	ASPEED_PINCTRL_PIN(AD22),
1724	ASPEED_PINCTRL_PIN(AD23),
1725	ASPEED_PINCTRL_PIN(AD24),
1726	ASPEED_PINCTRL_PIN(AD25),
1727	ASPEED_PINCTRL_PIN(AD26),
1728	ASPEED_PINCTRL_PIN(AD7),
1729	ASPEED_PINCTRL_PIN(AD8),
1730	ASPEED_PINCTRL_PIN(AD9),
1731	ASPEED_PINCTRL_PIN(AE10),
1732	ASPEED_PINCTRL_PIN(AE11),
1733	ASPEED_PINCTRL_PIN(AE12),
1734	ASPEED_PINCTRL_PIN(AE14),
1735	ASPEED_PINCTRL_PIN(AE15),
1736	ASPEED_PINCTRL_PIN(AE16),
1737	ASPEED_PINCTRL_PIN(AE18),
1738	ASPEED_PINCTRL_PIN(AE19),
1739	ASPEED_PINCTRL_PIN(AE22),
1740	ASPEED_PINCTRL_PIN(AE24),
1741	ASPEED_PINCTRL_PIN(AE25),
1742	ASPEED_PINCTRL_PIN(AE26),
1743	ASPEED_PINCTRL_PIN(AE7),
1744	ASPEED_PINCTRL_PIN(AE8),
1745	ASPEED_PINCTRL_PIN(AF10),
1746	ASPEED_PINCTRL_PIN(AF11),
1747	ASPEED_PINCTRL_PIN(AF12),
1748	ASPEED_PINCTRL_PIN(AF14),
1749	ASPEED_PINCTRL_PIN(AF15),
1750	ASPEED_PINCTRL_PIN(AF22),
1751	ASPEED_PINCTRL_PIN(AF23),
1752	ASPEED_PINCTRL_PIN(AF24),
1753	ASPEED_PINCTRL_PIN(AF25),
1754	ASPEED_PINCTRL_PIN(AF7),
1755	ASPEED_PINCTRL_PIN(AF8),
1756	ASPEED_PINCTRL_PIN(AF9),
1757	ASPEED_PINCTRL_PIN(B1),
1758	ASPEED_PINCTRL_PIN(B12),
1759	ASPEED_PINCTRL_PIN(B13),
1760	ASPEED_PINCTRL_PIN(B14),
1761	ASPEED_PINCTRL_PIN(B16),
1762	ASPEED_PINCTRL_PIN(B17),
1763	ASPEED_PINCTRL_PIN(B18),
1764	ASPEED_PINCTRL_PIN(B2),
1765	ASPEED_PINCTRL_PIN(B20),
1766	ASPEED_PINCTRL_PIN(B21),
1767	ASPEED_PINCTRL_PIN(B22),
1768	ASPEED_PINCTRL_PIN(B24),
1769	ASPEED_PINCTRL_PIN(B25),
1770	ASPEED_PINCTRL_PIN(B26),
1771	ASPEED_PINCTRL_PIN(B3),
1772	ASPEED_PINCTRL_PIN(B4),
1773	ASPEED_PINCTRL_PIN(B6),
1774	ASPEED_PINCTRL_PIN(C1),
1775	ASPEED_PINCTRL_PIN(C11),
1776	ASPEED_PINCTRL_PIN(C12),
1777	ASPEED_PINCTRL_PIN(C13),
1778	ASPEED_PINCTRL_PIN(C14),
1779	ASPEED_PINCTRL_PIN(C15),
1780	ASPEED_PINCTRL_PIN(C16),
1781	ASPEED_PINCTRL_PIN(C17),
1782	ASPEED_PINCTRL_PIN(C18),
1783	ASPEED_PINCTRL_PIN(C19),
1784	ASPEED_PINCTRL_PIN(C2),
1785	ASPEED_PINCTRL_PIN(C20),
1786	ASPEED_PINCTRL_PIN(C21),
1787	ASPEED_PINCTRL_PIN(C22),
1788	ASPEED_PINCTRL_PIN(C23),
1789	ASPEED_PINCTRL_PIN(C24),
1790	ASPEED_PINCTRL_PIN(C25),
1791	ASPEED_PINCTRL_PIN(C26),
1792	ASPEED_PINCTRL_PIN(C4),
1793	ASPEED_PINCTRL_PIN(C5),
1794	ASPEED_PINCTRL_PIN(C6),
1795	ASPEED_PINCTRL_PIN(D1),
1796	ASPEED_PINCTRL_PIN(D11),
1797	ASPEED_PINCTRL_PIN(D12),
1798	ASPEED_PINCTRL_PIN(D13),
1799	ASPEED_PINCTRL_PIN(D14),
1800	ASPEED_PINCTRL_PIN(D15),
1801	ASPEED_PINCTRL_PIN(D16),
1802	ASPEED_PINCTRL_PIN(D17),
1803	ASPEED_PINCTRL_PIN(D18),
1804	ASPEED_PINCTRL_PIN(D19),
1805	ASPEED_PINCTRL_PIN(D2),
1806	ASPEED_PINCTRL_PIN(D20),
1807	ASPEED_PINCTRL_PIN(D21),
1808	ASPEED_PINCTRL_PIN(D22),
1809	ASPEED_PINCTRL_PIN(D23),
1810	ASPEED_PINCTRL_PIN(D24),
1811	ASPEED_PINCTRL_PIN(D26),
1812	ASPEED_PINCTRL_PIN(D3),
1813	ASPEED_PINCTRL_PIN(D4),
1814	ASPEED_PINCTRL_PIN(D5),
1815	ASPEED_PINCTRL_PIN(D6),
1816	ASPEED_PINCTRL_PIN(D7),
1817	ASPEED_PINCTRL_PIN(E1),
1818	ASPEED_PINCTRL_PIN(E11),
1819	ASPEED_PINCTRL_PIN(E12),
1820	ASPEED_PINCTRL_PIN(E13),
1821	ASPEED_PINCTRL_PIN(E14),
1822	ASPEED_PINCTRL_PIN(E15),
1823	ASPEED_PINCTRL_PIN(E16),
1824	ASPEED_PINCTRL_PIN(E17),
1825	ASPEED_PINCTRL_PIN(E18),
1826	ASPEED_PINCTRL_PIN(E19),
1827	ASPEED_PINCTRL_PIN(E2),
1828	ASPEED_PINCTRL_PIN(E20),
1829	ASPEED_PINCTRL_PIN(E21),
1830	ASPEED_PINCTRL_PIN(E22),
1831	ASPEED_PINCTRL_PIN(E23),
1832	ASPEED_PINCTRL_PIN(E24),
1833	ASPEED_PINCTRL_PIN(E25),
1834	ASPEED_PINCTRL_PIN(E26),
1835	ASPEED_PINCTRL_PIN(E3),
1836	ASPEED_PINCTRL_PIN(E4),
1837	ASPEED_PINCTRL_PIN(E5),
1838	ASPEED_PINCTRL_PIN(E6),
1839	ASPEED_PINCTRL_PIN(F13),
1840	ASPEED_PINCTRL_PIN(F15),
1841	ASPEED_PINCTRL_PIN(F22),
1842	ASPEED_PINCTRL_PIN(F23),
1843	ASPEED_PINCTRL_PIN(F24),
1844	ASPEED_PINCTRL_PIN(F25),
1845	ASPEED_PINCTRL_PIN(F26),
1846	ASPEED_PINCTRL_PIN(F4),
1847	ASPEED_PINCTRL_PIN(F5),
1848	ASPEED_PINCTRL_PIN(G22),
1849	ASPEED_PINCTRL_PIN(G23),
1850	ASPEED_PINCTRL_PIN(G24),
1851	ASPEED_PINCTRL_PIN(G26),
1852	ASPEED_PINCTRL_PIN(H22),
1853	ASPEED_PINCTRL_PIN(H23),
1854	ASPEED_PINCTRL_PIN(H24),
1855	ASPEED_PINCTRL_PIN(H25),
1856	ASPEED_PINCTRL_PIN(H26),
1857	ASPEED_PINCTRL_PIN(J22),
1858	ASPEED_PINCTRL_PIN(J23),
1859	ASPEED_PINCTRL_PIN(J24),
1860	ASPEED_PINCTRL_PIN(J25),
1861	ASPEED_PINCTRL_PIN(J26),
1862	ASPEED_PINCTRL_PIN(K23),
1863	ASPEED_PINCTRL_PIN(K24),
1864	ASPEED_PINCTRL_PIN(K25),
1865	ASPEED_PINCTRL_PIN(K26),
1866	ASPEED_PINCTRL_PIN(L23),
1867	ASPEED_PINCTRL_PIN(L24),
1868	ASPEED_PINCTRL_PIN(L26),
1869	ASPEED_PINCTRL_PIN(M23),
1870	ASPEED_PINCTRL_PIN(M24),
1871	ASPEED_PINCTRL_PIN(M25),
1872	ASPEED_PINCTRL_PIN(M26),
1873	ASPEED_PINCTRL_PIN(N23),
1874	ASPEED_PINCTRL_PIN(N24),
1875	ASPEED_PINCTRL_PIN(N25),
1876	ASPEED_PINCTRL_PIN(N26),
1877	ASPEED_PINCTRL_PIN(P23),
1878	ASPEED_PINCTRL_PIN(P24),
1879	ASPEED_PINCTRL_PIN(P25),
1880	ASPEED_PINCTRL_PIN(P26),
1881	ASPEED_PINCTRL_PIN(R23),
1882	ASPEED_PINCTRL_PIN(R24),
1883	ASPEED_PINCTRL_PIN(R26),
1884	ASPEED_PINCTRL_PIN(T23),
1885	ASPEED_PINCTRL_PIN(T24),
1886	ASPEED_PINCTRL_PIN(T25),
1887	ASPEED_PINCTRL_PIN(T26),
1888	ASPEED_PINCTRL_PIN(U24),
1889	ASPEED_PINCTRL_PIN(U25),
1890	ASPEED_PINCTRL_PIN(U26),
1891	ASPEED_PINCTRL_PIN(V24),
1892	ASPEED_PINCTRL_PIN(V25),
1893	ASPEED_PINCTRL_PIN(V26),
1894	ASPEED_PINCTRL_PIN(W23),
1895	ASPEED_PINCTRL_PIN(W24),
1896	ASPEED_PINCTRL_PIN(W26),
1897	ASPEED_PINCTRL_PIN(Y1),
1898	ASPEED_PINCTRL_PIN(Y2),
1899	ASPEED_PINCTRL_PIN(Y23),
1900	ASPEED_PINCTRL_PIN(Y24),
1901	ASPEED_PINCTRL_PIN(Y25),
1902	ASPEED_PINCTRL_PIN(Y26),
1903	ASPEED_PINCTRL_PIN(Y3),
1904	ASPEED_PINCTRL_PIN(Y4),
1905	ASPEED_PINCTRL_PIN(Y5),
1906};
1907
1908static const struct aspeed_pin_group aspeed_g6_groups[] = {
1909	ASPEED_PINCTRL_GROUP(ADC0),
1910	ASPEED_PINCTRL_GROUP(ADC1),
1911	ASPEED_PINCTRL_GROUP(ADC10),
1912	ASPEED_PINCTRL_GROUP(ADC11),
1913	ASPEED_PINCTRL_GROUP(ADC12),
1914	ASPEED_PINCTRL_GROUP(ADC13),
1915	ASPEED_PINCTRL_GROUP(ADC14),
1916	ASPEED_PINCTRL_GROUP(ADC15),
1917	ASPEED_PINCTRL_GROUP(ADC2),
1918	ASPEED_PINCTRL_GROUP(ADC3),
1919	ASPEED_PINCTRL_GROUP(ADC4),
1920	ASPEED_PINCTRL_GROUP(ADC5),
1921	ASPEED_PINCTRL_GROUP(ADC6),
1922	ASPEED_PINCTRL_GROUP(ADC7),
1923	ASPEED_PINCTRL_GROUP(ADC8),
1924	ASPEED_PINCTRL_GROUP(ADC9),
1925	ASPEED_PINCTRL_GROUP(BMCINT),
1926	ASPEED_PINCTRL_GROUP(ESPI),
1927	ASPEED_PINCTRL_GROUP(ESPIALT),
1928	ASPEED_PINCTRL_GROUP(FSI1),
1929	ASPEED_PINCTRL_GROUP(FSI2),
1930	ASPEED_PINCTRL_GROUP(FWSPIABR),
1931	ASPEED_PINCTRL_GROUP(FWSPID),
1932	ASPEED_PINCTRL_GROUP(FWQSPI),
1933	ASPEED_PINCTRL_GROUP(FWSPIWP),
1934	ASPEED_PINCTRL_GROUP(GPIT0),
1935	ASPEED_PINCTRL_GROUP(GPIT1),
1936	ASPEED_PINCTRL_GROUP(GPIT2),
1937	ASPEED_PINCTRL_GROUP(GPIT3),
1938	ASPEED_PINCTRL_GROUP(GPIT4),
1939	ASPEED_PINCTRL_GROUP(GPIT5),
1940	ASPEED_PINCTRL_GROUP(GPIT6),
1941	ASPEED_PINCTRL_GROUP(GPIT7),
1942	ASPEED_PINCTRL_GROUP(GPIU0),
1943	ASPEED_PINCTRL_GROUP(GPIU1),
1944	ASPEED_PINCTRL_GROUP(GPIU2),
1945	ASPEED_PINCTRL_GROUP(GPIU3),
1946	ASPEED_PINCTRL_GROUP(GPIU4),
1947	ASPEED_PINCTRL_GROUP(GPIU5),
1948	ASPEED_PINCTRL_GROUP(GPIU6),
1949	ASPEED_PINCTRL_GROUP(GPIU7),
1950	ASPEED_PINCTRL_GROUP(HEARTBEAT),
1951	ASPEED_PINCTRL_GROUP(HVI3C3),
1952	ASPEED_PINCTRL_GROUP(HVI3C4),
1953	ASPEED_PINCTRL_GROUP(I2C1),
1954	ASPEED_PINCTRL_GROUP(I2C10),
1955	ASPEED_PINCTRL_GROUP(I2C11),
1956	ASPEED_PINCTRL_GROUP(I2C12),
1957	ASPEED_PINCTRL_GROUP(I2C13),
1958	ASPEED_PINCTRL_GROUP(I2C14),
1959	ASPEED_PINCTRL_GROUP(I2C15),
1960	ASPEED_PINCTRL_GROUP(I2C16),
1961	ASPEED_PINCTRL_GROUP(I2C2),
1962	ASPEED_PINCTRL_GROUP(I2C3),
1963	ASPEED_PINCTRL_GROUP(I2C4),
1964	ASPEED_PINCTRL_GROUP(I2C5),
1965	ASPEED_PINCTRL_GROUP(I2C6),
1966	ASPEED_PINCTRL_GROUP(I2C7),
1967	ASPEED_PINCTRL_GROUP(I2C8),
1968	ASPEED_PINCTRL_GROUP(I2C9),
1969	ASPEED_PINCTRL_GROUP(I3C1),
1970	ASPEED_PINCTRL_GROUP(I3C2),
1971	ASPEED_PINCTRL_GROUP(I3C3),
1972	ASPEED_PINCTRL_GROUP(I3C4),
1973	ASPEED_PINCTRL_GROUP(I3C5),
1974	ASPEED_PINCTRL_GROUP(I3C6),
1975	ASPEED_PINCTRL_GROUP(JTAGM),
1976	ASPEED_PINCTRL_GROUP(LHPD),
1977	ASPEED_PINCTRL_GROUP(LHSIRQ),
1978	ASPEED_PINCTRL_GROUP(LPC),
1979	ASPEED_PINCTRL_GROUP(LPCHC),
1980	ASPEED_PINCTRL_GROUP(LPCPD),
1981	ASPEED_PINCTRL_GROUP(LPCPME),
1982	ASPEED_PINCTRL_GROUP(LPCSMI),
1983	ASPEED_PINCTRL_GROUP(LSIRQ),
1984	ASPEED_PINCTRL_GROUP(MACLINK1),
1985	ASPEED_PINCTRL_GROUP(MACLINK2),
1986	ASPEED_PINCTRL_GROUP(MACLINK3),
1987	ASPEED_PINCTRL_GROUP(MACLINK4),
1988	ASPEED_PINCTRL_GROUP(MDIO1),
1989	ASPEED_PINCTRL_GROUP(MDIO2),
1990	ASPEED_PINCTRL_GROUP(MDIO3),
1991	ASPEED_PINCTRL_GROUP(MDIO4),
1992	ASPEED_PINCTRL_GROUP(NCSI3),
1993	ASPEED_PINCTRL_GROUP(NCSI4),
1994	ASPEED_PINCTRL_GROUP(NCTS1),
1995	ASPEED_PINCTRL_GROUP(NCTS2),
1996	ASPEED_PINCTRL_GROUP(NCTS3),
1997	ASPEED_PINCTRL_GROUP(NCTS4),
1998	ASPEED_PINCTRL_GROUP(NDCD1),
1999	ASPEED_PINCTRL_GROUP(NDCD2),
2000	ASPEED_PINCTRL_GROUP(NDCD3),
2001	ASPEED_PINCTRL_GROUP(NDCD4),
2002	ASPEED_PINCTRL_GROUP(NDSR1),
2003	ASPEED_PINCTRL_GROUP(NDSR2),
2004	ASPEED_PINCTRL_GROUP(NDSR3),
2005	ASPEED_PINCTRL_GROUP(NDSR4),
2006	ASPEED_PINCTRL_GROUP(NDTR1),
2007	ASPEED_PINCTRL_GROUP(NDTR2),
2008	ASPEED_PINCTRL_GROUP(NDTR3),
2009	ASPEED_PINCTRL_GROUP(NDTR4),
2010	ASPEED_PINCTRL_GROUP(NRI1),
2011	ASPEED_PINCTRL_GROUP(NRI2),
2012	ASPEED_PINCTRL_GROUP(NRI3),
2013	ASPEED_PINCTRL_GROUP(NRI4),
2014	ASPEED_PINCTRL_GROUP(NRTS1),
2015	ASPEED_PINCTRL_GROUP(NRTS2),
2016	ASPEED_PINCTRL_GROUP(NRTS3),
2017	ASPEED_PINCTRL_GROUP(NRTS4),
2018	ASPEED_PINCTRL_GROUP(OSCCLK),
2019	ASPEED_PINCTRL_GROUP(PEWAKE),
2020	ASPEED_PINCTRL_GROUP(PWM0),
2021	ASPEED_PINCTRL_GROUP(PWM1),
2022	ASPEED_PINCTRL_GROUP(PWM10G0),
2023	ASPEED_PINCTRL_GROUP(PWM10G1),
2024	ASPEED_PINCTRL_GROUP(PWM11G0),
2025	ASPEED_PINCTRL_GROUP(PWM11G1),
2026	ASPEED_PINCTRL_GROUP(PWM12G0),
2027	ASPEED_PINCTRL_GROUP(PWM12G1),
2028	ASPEED_PINCTRL_GROUP(PWM13G0),
2029	ASPEED_PINCTRL_GROUP(PWM13G1),
2030	ASPEED_PINCTRL_GROUP(PWM14G0),
2031	ASPEED_PINCTRL_GROUP(PWM14G1),
2032	ASPEED_PINCTRL_GROUP(PWM15G0),
2033	ASPEED_PINCTRL_GROUP(PWM15G1),
2034	ASPEED_PINCTRL_GROUP(PWM2),
2035	ASPEED_PINCTRL_GROUP(PWM3),
2036	ASPEED_PINCTRL_GROUP(PWM4),
2037	ASPEED_PINCTRL_GROUP(PWM5),
2038	ASPEED_PINCTRL_GROUP(PWM6),
2039	ASPEED_PINCTRL_GROUP(PWM7),
2040	ASPEED_PINCTRL_GROUP(PWM8G0),
2041	ASPEED_PINCTRL_GROUP(PWM8G1),
2042	ASPEED_PINCTRL_GROUP(PWM9G0),
2043	ASPEED_PINCTRL_GROUP(PWM9G1),
2044	ASPEED_PINCTRL_GROUP(QSPI1),
2045	ASPEED_PINCTRL_GROUP(QSPI2),
2046	ASPEED_PINCTRL_GROUP(RGMII1),
2047	ASPEED_PINCTRL_GROUP(RGMII2),
2048	ASPEED_PINCTRL_GROUP(RGMII3),
2049	ASPEED_PINCTRL_GROUP(RGMII4),
2050	ASPEED_PINCTRL_GROUP(RMII1),
2051	ASPEED_PINCTRL_GROUP(RMII2),
2052	ASPEED_PINCTRL_GROUP(RMII3),
2053	ASPEED_PINCTRL_GROUP(RMII4),
2054	ASPEED_PINCTRL_GROUP(RXD1),
2055	ASPEED_PINCTRL_GROUP(RXD2),
2056	ASPEED_PINCTRL_GROUP(RXD3),
2057	ASPEED_PINCTRL_GROUP(RXD4),
2058	ASPEED_PINCTRL_GROUP(SALT1),
2059	ASPEED_PINCTRL_GROUP(SALT10G0),
2060	ASPEED_PINCTRL_GROUP(SALT10G1),
2061	ASPEED_PINCTRL_GROUP(SALT11G0),
2062	ASPEED_PINCTRL_GROUP(SALT11G1),
2063	ASPEED_PINCTRL_GROUP(SALT12G0),
2064	ASPEED_PINCTRL_GROUP(SALT12G1),
2065	ASPEED_PINCTRL_GROUP(SALT13G0),
2066	ASPEED_PINCTRL_GROUP(SALT13G1),
2067	ASPEED_PINCTRL_GROUP(SALT14G0),
2068	ASPEED_PINCTRL_GROUP(SALT14G1),
2069	ASPEED_PINCTRL_GROUP(SALT15G0),
2070	ASPEED_PINCTRL_GROUP(SALT15G1),
2071	ASPEED_PINCTRL_GROUP(SALT16G0),
2072	ASPEED_PINCTRL_GROUP(SALT16G1),
2073	ASPEED_PINCTRL_GROUP(SALT2),
2074	ASPEED_PINCTRL_GROUP(SALT3),
2075	ASPEED_PINCTRL_GROUP(SALT4),
2076	ASPEED_PINCTRL_GROUP(SALT5),
2077	ASPEED_PINCTRL_GROUP(SALT6),
2078	ASPEED_PINCTRL_GROUP(SALT7),
2079	ASPEED_PINCTRL_GROUP(SALT8),
2080	ASPEED_PINCTRL_GROUP(SALT9G0),
2081	ASPEED_PINCTRL_GROUP(SALT9G1),
2082	ASPEED_PINCTRL_GROUP(SD1),
2083	ASPEED_PINCTRL_GROUP(SD2),
2084	ASPEED_PINCTRL_GROUP(PCIERC1),
2085	ASPEED_PINCTRL_GROUP(EMMCG1),
2086	ASPEED_PINCTRL_GROUP(EMMCG4),
2087	ASPEED_PINCTRL_GROUP(EMMCG8),
2088	ASPEED_PINCTRL_GROUP(SGPM1),
2089	ASPEED_PINCTRL_GROUP(SGPM2),
2090	ASPEED_PINCTRL_GROUP(SGPS1),
2091	ASPEED_PINCTRL_GROUP(SGPS2),
2092	ASPEED_PINCTRL_GROUP(SIOONCTRL),
2093	ASPEED_PINCTRL_GROUP(SIOPBI),
2094	ASPEED_PINCTRL_GROUP(SIOPBO),
2095	ASPEED_PINCTRL_GROUP(SIOPWREQ),
2096	ASPEED_PINCTRL_GROUP(SIOPWRGD),
2097	ASPEED_PINCTRL_GROUP(SIOS3),
2098	ASPEED_PINCTRL_GROUP(SIOS5),
2099	ASPEED_PINCTRL_GROUP(SIOSCI),
2100	ASPEED_PINCTRL_GROUP(SPI1),
2101	ASPEED_PINCTRL_GROUP(SPI1ABR),
2102	ASPEED_PINCTRL_GROUP(SPI1CS1),
2103	ASPEED_PINCTRL_GROUP(SPI1WP),
2104	ASPEED_PINCTRL_GROUP(SPI2),
2105	ASPEED_PINCTRL_GROUP(SPI2CS1),
2106	ASPEED_PINCTRL_GROUP(SPI2CS2),
2107	ASPEED_PINCTRL_GROUP(TACH0),
2108	ASPEED_PINCTRL_GROUP(TACH1),
2109	ASPEED_PINCTRL_GROUP(TACH10),
2110	ASPEED_PINCTRL_GROUP(TACH11),
2111	ASPEED_PINCTRL_GROUP(TACH12),
2112	ASPEED_PINCTRL_GROUP(TACH13),
2113	ASPEED_PINCTRL_GROUP(TACH14),
2114	ASPEED_PINCTRL_GROUP(TACH15),
2115	ASPEED_PINCTRL_GROUP(TACH2),
2116	ASPEED_PINCTRL_GROUP(TACH3),
2117	ASPEED_PINCTRL_GROUP(TACH4),
2118	ASPEED_PINCTRL_GROUP(TACH5),
2119	ASPEED_PINCTRL_GROUP(TACH6),
2120	ASPEED_PINCTRL_GROUP(TACH7),
2121	ASPEED_PINCTRL_GROUP(TACH8),
2122	ASPEED_PINCTRL_GROUP(TACH9),
2123	ASPEED_PINCTRL_GROUP(THRU0),
2124	ASPEED_PINCTRL_GROUP(THRU1),
2125	ASPEED_PINCTRL_GROUP(THRU2),
2126	ASPEED_PINCTRL_GROUP(THRU3),
2127	ASPEED_PINCTRL_GROUP(TXD1),
2128	ASPEED_PINCTRL_GROUP(TXD2),
2129	ASPEED_PINCTRL_GROUP(TXD3),
2130	ASPEED_PINCTRL_GROUP(TXD4),
2131	ASPEED_PINCTRL_GROUP(UART10),
2132	ASPEED_PINCTRL_GROUP(UART11),
2133	ASPEED_PINCTRL_GROUP(UART12G0),
2134	ASPEED_PINCTRL_GROUP(UART12G1),
2135	ASPEED_PINCTRL_GROUP(UART13G0),
2136	ASPEED_PINCTRL_GROUP(UART13G1),
2137	ASPEED_PINCTRL_GROUP(UART6),
2138	ASPEED_PINCTRL_GROUP(UART7),
2139	ASPEED_PINCTRL_GROUP(UART8),
2140	ASPEED_PINCTRL_GROUP(UART9),
2141	ASPEED_PINCTRL_GROUP(USBA),
2142	ASPEED_PINCTRL_GROUP(USBB),
2143	ASPEED_PINCTRL_GROUP(VB),
2144	ASPEED_PINCTRL_GROUP(VGAHS),
2145	ASPEED_PINCTRL_GROUP(VGAVS),
2146	ASPEED_PINCTRL_GROUP(WDTRST1),
2147	ASPEED_PINCTRL_GROUP(WDTRST2),
2148	ASPEED_PINCTRL_GROUP(WDTRST3),
2149	ASPEED_PINCTRL_GROUP(WDTRST4),
2150};
2151
2152static const struct aspeed_pin_function aspeed_g6_functions[] = {
2153	ASPEED_PINCTRL_FUNC(ADC0),
2154	ASPEED_PINCTRL_FUNC(ADC1),
2155	ASPEED_PINCTRL_FUNC(ADC10),
2156	ASPEED_PINCTRL_FUNC(ADC11),
2157	ASPEED_PINCTRL_FUNC(ADC12),
2158	ASPEED_PINCTRL_FUNC(ADC13),
2159	ASPEED_PINCTRL_FUNC(ADC14),
2160	ASPEED_PINCTRL_FUNC(ADC15),
2161	ASPEED_PINCTRL_FUNC(ADC2),
2162	ASPEED_PINCTRL_FUNC(ADC3),
2163	ASPEED_PINCTRL_FUNC(ADC4),
2164	ASPEED_PINCTRL_FUNC(ADC5),
2165	ASPEED_PINCTRL_FUNC(ADC6),
2166	ASPEED_PINCTRL_FUNC(ADC7),
2167	ASPEED_PINCTRL_FUNC(ADC8),
2168	ASPEED_PINCTRL_FUNC(ADC9),
2169	ASPEED_PINCTRL_FUNC(BMCINT),
2170	ASPEED_PINCTRL_FUNC(EMMC),
2171	ASPEED_PINCTRL_FUNC(ESPI),
2172	ASPEED_PINCTRL_FUNC(ESPIALT),
2173	ASPEED_PINCTRL_FUNC(FSI1),
2174	ASPEED_PINCTRL_FUNC(FSI2),
2175	ASPEED_PINCTRL_FUNC(FWSPIABR),
2176	ASPEED_PINCTRL_FUNC(FWSPID),
2177	ASPEED_PINCTRL_FUNC(FWQSPI),
2178	ASPEED_PINCTRL_FUNC(FWSPIWP),
2179	ASPEED_PINCTRL_FUNC(GPIT0),
2180	ASPEED_PINCTRL_FUNC(GPIT1),
2181	ASPEED_PINCTRL_FUNC(GPIT2),
2182	ASPEED_PINCTRL_FUNC(GPIT3),
2183	ASPEED_PINCTRL_FUNC(GPIT4),
2184	ASPEED_PINCTRL_FUNC(GPIT5),
2185	ASPEED_PINCTRL_FUNC(GPIT6),
2186	ASPEED_PINCTRL_FUNC(GPIT7),
2187	ASPEED_PINCTRL_FUNC(GPIU0),
2188	ASPEED_PINCTRL_FUNC(GPIU1),
2189	ASPEED_PINCTRL_FUNC(GPIU2),
2190	ASPEED_PINCTRL_FUNC(GPIU3),
2191	ASPEED_PINCTRL_FUNC(GPIU4),
2192	ASPEED_PINCTRL_FUNC(GPIU5),
2193	ASPEED_PINCTRL_FUNC(GPIU6),
2194	ASPEED_PINCTRL_FUNC(GPIU7),
2195	ASPEED_PINCTRL_FUNC(HEARTBEAT),
2196	ASPEED_PINCTRL_FUNC(I2C1),
2197	ASPEED_PINCTRL_FUNC(I2C10),
2198	ASPEED_PINCTRL_FUNC(I2C11),
2199	ASPEED_PINCTRL_FUNC(I2C12),
2200	ASPEED_PINCTRL_FUNC(I2C13),
2201	ASPEED_PINCTRL_FUNC(I2C14),
2202	ASPEED_PINCTRL_FUNC(I2C15),
2203	ASPEED_PINCTRL_FUNC(I2C16),
2204	ASPEED_PINCTRL_FUNC(I2C2),
2205	ASPEED_PINCTRL_FUNC(I2C3),
2206	ASPEED_PINCTRL_FUNC(I2C4),
2207	ASPEED_PINCTRL_FUNC(I2C5),
2208	ASPEED_PINCTRL_FUNC(I2C6),
2209	ASPEED_PINCTRL_FUNC(I2C7),
2210	ASPEED_PINCTRL_FUNC(I2C8),
2211	ASPEED_PINCTRL_FUNC(I2C9),
2212	ASPEED_PINCTRL_FUNC(I3C1),
2213	ASPEED_PINCTRL_FUNC(I3C2),
2214	ASPEED_PINCTRL_FUNC(I3C3),
2215	ASPEED_PINCTRL_FUNC(I3C4),
2216	ASPEED_PINCTRL_FUNC(I3C5),
2217	ASPEED_PINCTRL_FUNC(I3C6),
2218	ASPEED_PINCTRL_FUNC(JTAGM),
2219	ASPEED_PINCTRL_FUNC(LHPD),
2220	ASPEED_PINCTRL_FUNC(LHSIRQ),
2221	ASPEED_PINCTRL_FUNC(LPC),
2222	ASPEED_PINCTRL_FUNC(LPCHC),
2223	ASPEED_PINCTRL_FUNC(LPCPD),
2224	ASPEED_PINCTRL_FUNC(LPCPME),
2225	ASPEED_PINCTRL_FUNC(LPCSMI),
2226	ASPEED_PINCTRL_FUNC(LSIRQ),
2227	ASPEED_PINCTRL_FUNC(MACLINK1),
2228	ASPEED_PINCTRL_FUNC(MACLINK2),
2229	ASPEED_PINCTRL_FUNC(MACLINK3),
2230	ASPEED_PINCTRL_FUNC(MACLINK4),
2231	ASPEED_PINCTRL_FUNC(MDIO1),
2232	ASPEED_PINCTRL_FUNC(MDIO2),
2233	ASPEED_PINCTRL_FUNC(MDIO3),
2234	ASPEED_PINCTRL_FUNC(MDIO4),
2235	ASPEED_PINCTRL_FUNC(NCTS1),
2236	ASPEED_PINCTRL_FUNC(NCTS2),
2237	ASPEED_PINCTRL_FUNC(NCTS3),
2238	ASPEED_PINCTRL_FUNC(NCTS4),
2239	ASPEED_PINCTRL_FUNC(NDCD1),
2240	ASPEED_PINCTRL_FUNC(NDCD2),
2241	ASPEED_PINCTRL_FUNC(NDCD3),
2242	ASPEED_PINCTRL_FUNC(NDCD4),
2243	ASPEED_PINCTRL_FUNC(NDSR1),
2244	ASPEED_PINCTRL_FUNC(NDSR2),
2245	ASPEED_PINCTRL_FUNC(NDSR3),
2246	ASPEED_PINCTRL_FUNC(NDSR4),
2247	ASPEED_PINCTRL_FUNC(NDTR1),
2248	ASPEED_PINCTRL_FUNC(NDTR2),
2249	ASPEED_PINCTRL_FUNC(NDTR3),
2250	ASPEED_PINCTRL_FUNC(NDTR4),
2251	ASPEED_PINCTRL_FUNC(NRI1),
2252	ASPEED_PINCTRL_FUNC(NRI2),
2253	ASPEED_PINCTRL_FUNC(NRI3),
2254	ASPEED_PINCTRL_FUNC(NRI4),
2255	ASPEED_PINCTRL_FUNC(NRTS1),
2256	ASPEED_PINCTRL_FUNC(NRTS2),
2257	ASPEED_PINCTRL_FUNC(NRTS3),
2258	ASPEED_PINCTRL_FUNC(NRTS4),
2259	ASPEED_PINCTRL_FUNC(OSCCLK),
2260	ASPEED_PINCTRL_FUNC(PEWAKE),
2261	ASPEED_PINCTRL_FUNC(PWM0),
2262	ASPEED_PINCTRL_FUNC(PWM1),
2263	ASPEED_PINCTRL_FUNC(PWM10),
2264	ASPEED_PINCTRL_FUNC(PWM11),
2265	ASPEED_PINCTRL_FUNC(PWM12),
2266	ASPEED_PINCTRL_FUNC(PWM13),
2267	ASPEED_PINCTRL_FUNC(PWM14),
2268	ASPEED_PINCTRL_FUNC(PWM15),
2269	ASPEED_PINCTRL_FUNC(PWM2),
2270	ASPEED_PINCTRL_FUNC(PWM3),
2271	ASPEED_PINCTRL_FUNC(PWM4),
2272	ASPEED_PINCTRL_FUNC(PWM5),
2273	ASPEED_PINCTRL_FUNC(PWM6),
2274	ASPEED_PINCTRL_FUNC(PWM7),
2275	ASPEED_PINCTRL_FUNC(PWM8),
2276	ASPEED_PINCTRL_FUNC(PWM9),
2277	ASPEED_PINCTRL_FUNC(RGMII1),
2278	ASPEED_PINCTRL_FUNC(RGMII2),
2279	ASPEED_PINCTRL_FUNC(RGMII3),
2280	ASPEED_PINCTRL_FUNC(RGMII4),
2281	ASPEED_PINCTRL_FUNC(RMII1),
2282	ASPEED_PINCTRL_FUNC(RMII2),
2283	ASPEED_PINCTRL_FUNC(RMII3),
2284	ASPEED_PINCTRL_FUNC(RMII4),
2285	ASPEED_PINCTRL_FUNC(RXD1),
2286	ASPEED_PINCTRL_FUNC(RXD2),
2287	ASPEED_PINCTRL_FUNC(RXD3),
2288	ASPEED_PINCTRL_FUNC(RXD4),
2289	ASPEED_PINCTRL_FUNC(SALT1),
2290	ASPEED_PINCTRL_FUNC(SALT10),
2291	ASPEED_PINCTRL_FUNC(SALT11),
2292	ASPEED_PINCTRL_FUNC(SALT12),
2293	ASPEED_PINCTRL_FUNC(SALT13),
2294	ASPEED_PINCTRL_FUNC(SALT14),
2295	ASPEED_PINCTRL_FUNC(SALT15),
2296	ASPEED_PINCTRL_FUNC(SALT16),
2297	ASPEED_PINCTRL_FUNC(SALT2),
2298	ASPEED_PINCTRL_FUNC(SALT3),
2299	ASPEED_PINCTRL_FUNC(SALT4),
2300	ASPEED_PINCTRL_FUNC(SALT5),
2301	ASPEED_PINCTRL_FUNC(SALT6),
2302	ASPEED_PINCTRL_FUNC(SALT7),
2303	ASPEED_PINCTRL_FUNC(SALT8),
2304	ASPEED_PINCTRL_FUNC(SALT9),
2305	ASPEED_PINCTRL_FUNC(SD1),
2306	ASPEED_PINCTRL_FUNC(SD2),
2307	ASPEED_PINCTRL_FUNC(SGPM1),
2308	ASPEED_PINCTRL_FUNC(SGPM2),
2309	ASPEED_PINCTRL_FUNC(SGPS1),
2310	ASPEED_PINCTRL_FUNC(SGPS2),
2311	ASPEED_PINCTRL_FUNC(SIOONCTRL),
2312	ASPEED_PINCTRL_FUNC(SIOPBI),
2313	ASPEED_PINCTRL_FUNC(SIOPBO),
2314	ASPEED_PINCTRL_FUNC(SIOPWREQ),
2315	ASPEED_PINCTRL_FUNC(SIOPWRGD),
2316	ASPEED_PINCTRL_FUNC(SIOS3),
2317	ASPEED_PINCTRL_FUNC(SIOS5),
2318	ASPEED_PINCTRL_FUNC(SIOSCI),
2319	ASPEED_PINCTRL_FUNC(SPI1),
2320	ASPEED_PINCTRL_FUNC(SPI1ABR),
2321	ASPEED_PINCTRL_FUNC(SPI1CS1),
2322	ASPEED_PINCTRL_FUNC(SPI1WP),
2323	ASPEED_PINCTRL_FUNC(SPI2),
2324	ASPEED_PINCTRL_FUNC(SPI2CS1),
2325	ASPEED_PINCTRL_FUNC(SPI2CS2),
2326	ASPEED_PINCTRL_FUNC(PCIERC1),
2327	ASPEED_PINCTRL_FUNC(TACH0),
2328	ASPEED_PINCTRL_FUNC(TACH1),
2329	ASPEED_PINCTRL_FUNC(TACH10),
2330	ASPEED_PINCTRL_FUNC(TACH11),
2331	ASPEED_PINCTRL_FUNC(TACH12),
2332	ASPEED_PINCTRL_FUNC(TACH13),
2333	ASPEED_PINCTRL_FUNC(TACH14),
2334	ASPEED_PINCTRL_FUNC(TACH15),
2335	ASPEED_PINCTRL_FUNC(TACH2),
2336	ASPEED_PINCTRL_FUNC(TACH3),
2337	ASPEED_PINCTRL_FUNC(TACH4),
2338	ASPEED_PINCTRL_FUNC(TACH5),
2339	ASPEED_PINCTRL_FUNC(TACH6),
2340	ASPEED_PINCTRL_FUNC(TACH7),
2341	ASPEED_PINCTRL_FUNC(TACH8),
2342	ASPEED_PINCTRL_FUNC(TACH9),
2343	ASPEED_PINCTRL_FUNC(THRU0),
2344	ASPEED_PINCTRL_FUNC(THRU1),
2345	ASPEED_PINCTRL_FUNC(THRU2),
2346	ASPEED_PINCTRL_FUNC(THRU3),
2347	ASPEED_PINCTRL_FUNC(TXD1),
2348	ASPEED_PINCTRL_FUNC(TXD2),
2349	ASPEED_PINCTRL_FUNC(TXD3),
2350	ASPEED_PINCTRL_FUNC(TXD4),
2351	ASPEED_PINCTRL_FUNC(UART10),
2352	ASPEED_PINCTRL_FUNC(UART11),
2353	ASPEED_PINCTRL_FUNC(UART12),
2354	ASPEED_PINCTRL_FUNC(UART13),
2355	ASPEED_PINCTRL_FUNC(UART6),
2356	ASPEED_PINCTRL_FUNC(UART7),
2357	ASPEED_PINCTRL_FUNC(UART8),
2358	ASPEED_PINCTRL_FUNC(UART9),
2359	ASPEED_PINCTRL_FUNC(USB11BHID),
2360	ASPEED_PINCTRL_FUNC(USB2AD),
2361	ASPEED_PINCTRL_FUNC(USB2ADP),
2362	ASPEED_PINCTRL_FUNC(USB2AH),
2363	ASPEED_PINCTRL_FUNC(USB2AHP),
2364	ASPEED_PINCTRL_FUNC(USB2BD),
2365	ASPEED_PINCTRL_FUNC(USB2BH),
2366	ASPEED_PINCTRL_FUNC(VB),
2367	ASPEED_PINCTRL_FUNC(VGAHS),
2368	ASPEED_PINCTRL_FUNC(VGAVS),
2369	ASPEED_PINCTRL_FUNC(WDTRST1),
2370	ASPEED_PINCTRL_FUNC(WDTRST2),
2371	ASPEED_PINCTRL_FUNC(WDTRST3),
2372	ASPEED_PINCTRL_FUNC(WDTRST4),
2373};
2374
2375static struct aspeed_pin_config aspeed_g6_configs[] = {
2376	/* GPIOB7 */
2377	ASPEED_PULL_DOWN_PINCONF(J24, SCU610, 15),
2378	/* GPIOB6 */
2379	ASPEED_PULL_DOWN_PINCONF(H25, SCU610, 14),
2380	/* GPIOB5 */
2381	ASPEED_PULL_DOWN_PINCONF(G26, SCU610, 13),
2382	/* GPIOB4 */
2383	ASPEED_PULL_DOWN_PINCONF(J23, SCU610, 12),
2384	/* GPIOB3 */
2385	ASPEED_PULL_DOWN_PINCONF(J25, SCU610, 11),
2386	/* GPIOB2 */
2387	ASPEED_PULL_DOWN_PINCONF(H26, SCU610, 10),
2388	/* GPIOB1 */
2389	ASPEED_PULL_DOWN_PINCONF(K23, SCU610, 9),
2390	/* GPIOB0 */
2391	ASPEED_PULL_DOWN_PINCONF(J26, SCU610, 8),
2392
2393	/* GPIOH3 */
2394	ASPEED_PULL_DOWN_PINCONF(A17, SCU614, 27),
2395	/* GPIOH2 */
2396	ASPEED_PULL_DOWN_PINCONF(C18, SCU614, 26),
2397	/* GPIOH1 */
2398	ASPEED_PULL_DOWN_PINCONF(B18, SCU614, 25),
2399	/* GPIOH0 */
2400	ASPEED_PULL_DOWN_PINCONF(A18, SCU614, 24),
2401
2402	/* GPIOL7 */
2403	ASPEED_PULL_DOWN_PINCONF(C14, SCU618, 31),
2404	/* GPIOL6 */
2405	ASPEED_PULL_DOWN_PINCONF(B14, SCU618, 30),
2406	/* GPIOL5 */
2407	ASPEED_PULL_DOWN_PINCONF(F15, SCU618, 29),
2408	/* GPIOL4 */
2409	ASPEED_PULL_DOWN_PINCONF(C15, SCU618, 28),
2410
2411	/* GPIOJ7 */
2412	ASPEED_PULL_UP_PINCONF(D19, SCU618, 15),
2413	/* GPIOJ6 */
2414	ASPEED_PULL_UP_PINCONF(C20, SCU618, 14),
2415	/* GPIOJ5 */
2416	ASPEED_PULL_UP_PINCONF(A19, SCU618, 13),
2417	/* GPIOJ4 */
2418	ASPEED_PULL_UP_PINCONF(C19, SCU618, 12),
2419	/* GPIOJ3 */
2420	ASPEED_PULL_UP_PINCONF(D20, SCU618, 11),
2421	/* GPIOJ2 */
2422	ASPEED_PULL_UP_PINCONF(E19, SCU618, 10),
2423	/* GPIOJ1 */
2424	ASPEED_PULL_UP_PINCONF(A20, SCU618, 9),
2425	/* GPIOJ0 */
2426	ASPEED_PULL_UP_PINCONF(B20, SCU618, 8),
2427
2428	/* GPIOI7 */
2429	ASPEED_PULL_DOWN_PINCONF(A15, SCU618, 7),
2430	/* GPIOI6 */
2431	ASPEED_PULL_DOWN_PINCONF(B16, SCU618, 6),
2432	/* GPIOI5 */
2433	ASPEED_PULL_DOWN_PINCONF(E16, SCU618, 5),
2434	/* GPIOI4 */
2435	ASPEED_PULL_DOWN_PINCONF(C16, SCU618, 4),
2436	/* GPIOI3 */
2437	ASPEED_PULL_DOWN_PINCONF(D16, SCU618, 3),
2438	/* GPIOI2 */
2439	ASPEED_PULL_DOWN_PINCONF(E17, SCU618, 2),
2440	/* GPIOI1 */
2441	ASPEED_PULL_DOWN_PINCONF(A16, SCU618, 1),
2442	/* GPIOI0 */
2443	ASPEED_PULL_DOWN_PINCONF(D17, SCU618, 0),
2444
2445	/* GPIOP7 */
2446	ASPEED_PULL_DOWN_PINCONF(Y23, SCU61C, 31),
2447	/* GPIOP6 */
2448	ASPEED_PULL_DOWN_PINCONF(AB24, SCU61C, 30),
2449	/* GPIOP5 */
2450	ASPEED_PULL_DOWN_PINCONF(AB23, SCU61C, 29),
2451	/* GPIOP4 */
2452	ASPEED_PULL_DOWN_PINCONF(W23, SCU61C, 28),
2453	/* GPIOP3 */
2454	ASPEED_PULL_DOWN_PINCONF(AA24, SCU61C, 27),
2455	/* GPIOP2 */
2456	ASPEED_PULL_DOWN_PINCONF(AA23, SCU61C, 26),
2457	/* GPIOP1 */
2458	ASPEED_PULL_DOWN_PINCONF(W24, SCU61C, 25),
2459	/* GPIOP0 */
2460	ASPEED_PULL_DOWN_PINCONF(AB22, SCU61C, 24),
2461
2462	/* GPIOO7 */
2463	ASPEED_PULL_DOWN_PINCONF(AC23, SCU61C, 23),
2464	/* GPIOO6 */
2465	ASPEED_PULL_DOWN_PINCONF(AC24, SCU61C, 22),
2466	/* GPIOO5 */
2467	ASPEED_PULL_DOWN_PINCONF(AC22, SCU61C, 21),
2468	/* GPIOO4 */
2469	ASPEED_PULL_DOWN_PINCONF(AD25, SCU61C, 20),
2470	/* GPIOO3 */
2471	ASPEED_PULL_DOWN_PINCONF(AD24, SCU61C, 19),
2472	/* GPIOO2 */
2473	ASPEED_PULL_DOWN_PINCONF(AD23, SCU61C, 18),
2474	/* GPIOO1 */
2475	ASPEED_PULL_DOWN_PINCONF(AD22, SCU61C, 17),
2476	/* GPIOO0 */
2477	ASPEED_PULL_DOWN_PINCONF(AD26, SCU61C, 16),
2478
2479	/* GPION7 */
2480	ASPEED_PULL_DOWN_PINCONF(M26, SCU61C, 15),
2481	/* GPION6 */
2482	ASPEED_PULL_DOWN_PINCONF(N26, SCU61C, 14),
2483	/* GPION5 */
2484	ASPEED_PULL_DOWN_PINCONF(M23, SCU61C, 13),
2485	/* GPION4 */
2486	ASPEED_PULL_DOWN_PINCONF(P26, SCU61C, 12),
2487	/* GPION3 */
2488	ASPEED_PULL_DOWN_PINCONF(N24, SCU61C, 11),
2489	/* GPION2 */
2490	ASPEED_PULL_DOWN_PINCONF(N25, SCU61C, 10),
2491	/* GPION1 */
2492	ASPEED_PULL_DOWN_PINCONF(N23, SCU61C, 9),
2493	/* GPION0 */
2494	ASPEED_PULL_DOWN_PINCONF(P25, SCU61C, 8),
2495
2496	/* GPIOM7 */
2497	ASPEED_PULL_DOWN_PINCONF(D13, SCU61C, 7),
2498	/* GPIOM6 */
2499	ASPEED_PULL_DOWN_PINCONF(C13, SCU61C, 6),
2500	/* GPIOM5 */
2501	ASPEED_PULL_DOWN_PINCONF(C12, SCU61C, 5),
2502	/* GPIOM4 */
2503	ASPEED_PULL_DOWN_PINCONF(B12, SCU61C, 4),
2504	/* GPIOM3 */
2505	ASPEED_PULL_DOWN_PINCONF(E14, SCU61C, 3),
2506	/* GPIOM2 */
2507	ASPEED_PULL_DOWN_PINCONF(A12, SCU61C, 2),
2508	/* GPIOM1 */
2509	ASPEED_PULL_DOWN_PINCONF(B13, SCU61C, 1),
2510	/* GPIOM0 */
2511	ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
2512
2513	/* GPIOS7 */
2514	ASPEED_PULL_DOWN_PINCONF(T24, SCU630, 23),
2515	/* GPIOS6 */
2516	ASPEED_PULL_DOWN_PINCONF(P23, SCU630, 22),
2517	/* GPIOS5 */
2518	ASPEED_PULL_DOWN_PINCONF(P24, SCU630, 21),
2519	/* GPIOS4 */
2520	ASPEED_PULL_DOWN_PINCONF(R26, SCU630, 20),
2521	/* GPIOS3*/
2522	ASPEED_PULL_DOWN_PINCONF(R24, SCU630, 19),
2523	/* GPIOS2 */
2524	ASPEED_PULL_DOWN_PINCONF(T26, SCU630, 18),
2525	/* GPIOS1 */
2526	ASPEED_PULL_DOWN_PINCONF(T25, SCU630, 17),
2527	/* GPIOS0 */
2528	ASPEED_PULL_DOWN_PINCONF(R23, SCU630, 16),
2529
2530	/* GPIOR7 */
2531	ASPEED_PULL_DOWN_PINCONF(U26, SCU630, 15),
2532	/* GPIOR6 */
2533	ASPEED_PULL_DOWN_PINCONF(W26, SCU630, 14),
2534	/* GPIOR5 */
2535	ASPEED_PULL_DOWN_PINCONF(T23, SCU630, 13),
2536	/* GPIOR4 */
2537	ASPEED_PULL_DOWN_PINCONF(U25, SCU630, 12),
2538	/* GPIOR3*/
2539	ASPEED_PULL_DOWN_PINCONF(V26, SCU630, 11),
2540	/* GPIOR2 */
2541	ASPEED_PULL_DOWN_PINCONF(V24, SCU630, 10),
2542	/* GPIOR1 */
2543	ASPEED_PULL_DOWN_PINCONF(U24, SCU630, 9),
2544	/* GPIOR0 */
2545	ASPEED_PULL_DOWN_PINCONF(V25, SCU630, 8),
2546
2547	/* GPIOX7 */
2548	ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
2549	/* GPIOX6 */
2550	ASPEED_PULL_DOWN_PINCONF(AF9, SCU634, 30),
2551	/* GPIOX5 */
2552	ASPEED_PULL_DOWN_PINCONF(AD9, SCU634, 29),
2553	/* GPIOX4 */
2554	ASPEED_PULL_DOWN_PINCONF(AB9, SCU634, 28),
2555	/* GPIOX3*/
2556	ASPEED_PULL_DOWN_PINCONF(AF8, SCU634, 27),
2557	/* GPIOX2 */
2558	ASPEED_PULL_DOWN_PINCONF(AC9, SCU634, 26),
2559	/* GPIOX1 */
2560	ASPEED_PULL_DOWN_PINCONF(AA9, SCU634, 25),
2561	/* GPIOX0 */
2562	ASPEED_PULL_DOWN_PINCONF(AE8, SCU634, 24),
2563
2564	/* GPIOV7 */
2565	ASPEED_PULL_DOWN_PINCONF(AF15, SCU634, 15),
2566	/* GPIOV6 */
2567	ASPEED_PULL_DOWN_PINCONF(AD15, SCU634, 14),
2568	/* GPIOV5 */
2569	ASPEED_PULL_DOWN_PINCONF(AE14, SCU634, 13),
2570	/* GPIOV4 */
2571	ASPEED_PULL_DOWN_PINCONF(AE15, SCU634, 12),
2572	/* GPIOV3*/
2573	ASPEED_PULL_DOWN_PINCONF(AC15, SCU634, 11),
2574	/* GPIOV2 */
2575	ASPEED_PULL_DOWN_PINCONF(AD14, SCU634, 10),
2576	/* GPIOV1 */
2577	ASPEED_PULL_DOWN_PINCONF(AF14, SCU634, 9),
2578	/* GPIOV0 */
2579	ASPEED_PULL_DOWN_PINCONF(AB15, SCU634, 8),
2580
2581	/* GPIOZ7 */
2582	ASPEED_PULL_DOWN_PINCONF(AF10, SCU638, 15),
2583	/* GPIOZ6 */
2584	ASPEED_PULL_DOWN_PINCONF(AD11, SCU638, 14),
2585	/* GPIOZ5 */
2586	ASPEED_PULL_DOWN_PINCONF(AA11, SCU638, 13),
2587	/* GPIOZ4 */
2588	ASPEED_PULL_DOWN_PINCONF(AC11, SCU638, 12),
2589	/* GPIOZ3*/
2590	ASPEED_PULL_DOWN_PINCONF(AB11, SCU638, 11),
2591
2592	/* GPIOZ1 */
2593	ASPEED_PULL_DOWN_PINCONF(AD10, SCU638, 9),
2594	/* GPIOZ0 */
2595	ASPEED_PULL_DOWN_PINCONF(AC10, SCU638, 8),
2596
2597	/* GPIOY6 */
2598	ASPEED_PULL_DOWN_PINCONF(AC12, SCU638, 6),
2599	/* GPIOY5 */
2600	ASPEED_PULL_DOWN_PINCONF(AF12, SCU638, 5),
2601	/* GPIOY4 */
2602	ASPEED_PULL_DOWN_PINCONF(AE12, SCU638, 4),
2603	/* GPIOY3 */
2604	ASPEED_PULL_DOWN_PINCONF(AA12, SCU638, 3),
2605	/* GPIOY2 */
2606	ASPEED_PULL_DOWN_PINCONF(AE11, SCU638, 2),
2607	/* GPIOY1 */
2608	ASPEED_PULL_DOWN_PINCONF(AD12, SCU638, 1),
2609	/* GPIOY0 */
2610	ASPEED_PULL_DOWN_PINCONF(AF11, SCU638, 0),
2611
2612	/* LAD3 */
2613	{ PIN_CONFIG_DRIVE_STRENGTH, { AC7, AC7 }, SCU454, GENMASK(31, 30)},
2614	/* LAD2 */
2615	{ PIN_CONFIG_DRIVE_STRENGTH, { AC8, AC8 }, SCU454, GENMASK(29, 28)},
2616	/* LAD1 */
2617	{ PIN_CONFIG_DRIVE_STRENGTH, { AB8, AB8 }, SCU454, GENMASK(27, 26)},
2618	/* LAD0 */
2619	{ PIN_CONFIG_DRIVE_STRENGTH, { AB7, AB7 }, SCU454, GENMASK(25, 24)},
2620	/* GPIOF */
2621	{ PIN_CONFIG_DRIVE_STRENGTH, { D22, A23 }, SCU458, GENMASK(9, 8)},
2622	/* GPIOG */
2623	{ PIN_CONFIG_DRIVE_STRENGTH, { E21, B21 }, SCU458, GENMASK(11, 10)},
2624
2625	/* MAC3 */
2626	{ PIN_CONFIG_POWER_SOURCE,   { H24, E26 }, SCU458, BIT_MASK(4)},
2627	{ PIN_CONFIG_DRIVE_STRENGTH, { H24, E26 }, SCU458, GENMASK(1, 0)},
2628	/* MAC4 */
2629	{ PIN_CONFIG_POWER_SOURCE,   { F24, B24 }, SCU458, BIT_MASK(5)},
2630	{ PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)},
2631
2632	/* GPIO18E */
2633	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y1, Y4, SCU40C, 4),
2634	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   Y1, Y4, SCU40C, 4),
2635	/* GPIO18D */
2636	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, AB4, AC5, SCU40C, 3),
2637	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   AB4, AC5, SCU40C, 3),
2638	/* GPIO18C */
2639	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E4, E1, SCU40C, 2),
2640	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   E4, E1, SCU40C, 2),
2641	/* GPIO18B */
2642	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1),
2643	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   B2, D3, SCU40C, 1),
2644	/* GPIO18A */
2645	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C6, A2, SCU40C, 0),
2646	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   C6, A2, SCU40C, 0),
2647};
2648
2649/**
2650 * aspeed_g6_sig_expr_set() - Configure a pin's signal by applying an
2651 * expression's descriptor state for all descriptors in the expression.
2652 *
2653 * @ctx: The pinmux context
2654 * @expr: The expression associated with the function whose signal is to be
2655 *        configured
2656 * @enable: true to enable an function's signal through a pin's signal
2657 *          expression, false to disable the function's signal
2658 *
2659 * Return: 0 if the expression is configured as requested and a negative error
2660 * code otherwise
2661 */
2662static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx,
2663				  const struct aspeed_sig_expr *expr,
2664				  bool enable)
2665{
2666	int ret;
2667	int i;
2668
2669	for (i = 0; i < expr->ndescs; i++) {
2670		const struct aspeed_sig_desc *desc = &expr->descs[i];
2671		u32 pattern = enable ? desc->enable : desc->disable;
2672		u32 val = (pattern << __ffs(desc->mask));
2673		bool is_strap;
2674
2675		if (!ctx->maps[desc->ip])
2676			return -ENODEV;
2677
2678		WARN_ON(desc->ip != ASPEED_IP_SCU);
2679		is_strap = desc->reg == SCU500 || desc->reg == SCU510;
2680
2681		if (is_strap) {
2682			/*
2683			 * The AST2600 has write protection mask registers for
2684			 * the hardware strapping in SCU508 and SCU518. Assume
2685			 * that if the platform doesn't want the strapping
2686			 * values changed that it has set the write mask.
2687			 *
2688			 * The strapping registers implement write-1-clear
2689			 * behaviour. SCU500 is paired with clear writes on
2690			 * SCU504, likewise SCU510 is paired with SCU514.
2691			 */
2692			u32 clear = ~val & desc->mask;
2693			u32 w1c = desc->reg + 4;
2694
2695			if (clear)
2696				ret = regmap_update_bits(ctx->maps[desc->ip],
2697							 w1c, desc->mask,
2698							 clear);
2699		}
2700
2701		ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
2702					 desc->mask, val);
2703		if (ret)
2704			return ret;
2705	}
2706
2707	ret = aspeed_sig_expr_eval(ctx, expr, enable);
2708	if (ret < 0)
2709		return ret;
2710
2711	if (!ret)
2712		return -EPERM;
2713	return 0;
2714}
2715
2716static const struct aspeed_pin_config_map aspeed_g6_pin_config_map[] = {
2717	{ PIN_CONFIG_BIAS_PULL_DOWN,  0,   1, BIT_MASK(0)},
2718	{ PIN_CONFIG_BIAS_PULL_DOWN, -1,   0, BIT_MASK(0)},
2719	{ PIN_CONFIG_BIAS_PULL_UP,    0,   1, BIT_MASK(0)},
2720	{ PIN_CONFIG_BIAS_PULL_UP,   -1,   0, BIT_MASK(0)},
2721	{ PIN_CONFIG_BIAS_DISABLE,   -1,   1, BIT_MASK(0)},
2722	{ PIN_CONFIG_DRIVE_STRENGTH,  4,   0, GENMASK(1, 0)},
2723	{ PIN_CONFIG_DRIVE_STRENGTH,  8,   1, GENMASK(1, 0)},
2724	{ PIN_CONFIG_DRIVE_STRENGTH, 12,   2, GENMASK(1, 0)},
2725	{ PIN_CONFIG_DRIVE_STRENGTH, 16,   3, GENMASK(1, 0)},
2726	{ PIN_CONFIG_POWER_SOURCE,   3300, 0, BIT_MASK(0)},
2727	{ PIN_CONFIG_POWER_SOURCE,   1800, 1, BIT_MASK(0)},
2728};
2729
2730static const struct aspeed_pinmux_ops aspeed_g5_ops = {
2731	.set = aspeed_g6_sig_expr_set,
2732};
2733
2734static struct aspeed_pinctrl_data aspeed_g6_pinctrl_data = {
2735	.pins = aspeed_g6_pins,
2736	.npins = ARRAY_SIZE(aspeed_g6_pins),
2737	.pinmux = {
2738		.ops = &aspeed_g5_ops,
2739		.groups = aspeed_g6_groups,
2740		.ngroups = ARRAY_SIZE(aspeed_g6_groups),
2741		.functions = aspeed_g6_functions,
2742		.nfunctions = ARRAY_SIZE(aspeed_g6_functions),
2743	},
2744	.configs = aspeed_g6_configs,
2745	.nconfigs = ARRAY_SIZE(aspeed_g6_configs),
2746	.confmaps = aspeed_g6_pin_config_map,
2747	.nconfmaps = ARRAY_SIZE(aspeed_g6_pin_config_map),
2748};
2749
2750static const struct pinmux_ops aspeed_g6_pinmux_ops = {
2751	.get_functions_count = aspeed_pinmux_get_fn_count,
2752	.get_function_name = aspeed_pinmux_get_fn_name,
2753	.get_function_groups = aspeed_pinmux_get_fn_groups,
2754	.set_mux = aspeed_pinmux_set_mux,
2755	.gpio_request_enable = aspeed_gpio_request_enable,
2756	.strict = true,
2757};
2758
2759static const struct pinctrl_ops aspeed_g6_pinctrl_ops = {
2760	.get_groups_count = aspeed_pinctrl_get_groups_count,
2761	.get_group_name = aspeed_pinctrl_get_group_name,
2762	.get_group_pins = aspeed_pinctrl_get_group_pins,
2763	.pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
2764	.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
2765	.dt_free_map = pinctrl_utils_free_map,
2766};
2767
2768static const struct pinconf_ops aspeed_g6_conf_ops = {
2769	.is_generic = true,
2770	.pin_config_get = aspeed_pin_config_get,
2771	.pin_config_set = aspeed_pin_config_set,
2772	.pin_config_group_get = aspeed_pin_config_group_get,
2773	.pin_config_group_set = aspeed_pin_config_group_set,
2774};
2775
2776static const struct pinctrl_desc aspeed_g6_pinctrl_desc = {
2777	.name = "aspeed-g6-pinctrl",
2778	.pins = aspeed_g6_pins,
2779	.npins = ARRAY_SIZE(aspeed_g6_pins),
2780	.pctlops = &aspeed_g6_pinctrl_ops,
2781	.pmxops = &aspeed_g6_pinmux_ops,
2782	.confops = &aspeed_g6_conf_ops,
2783};
2784
2785static int aspeed_g6_pinctrl_probe(struct platform_device *pdev)
2786{
2787	int i;
2788
2789	for (i = 0; i < ARRAY_SIZE(aspeed_g6_pins); i++)
2790		aspeed_g6_pins[i].number = i;
2791
2792	return aspeed_pinctrl_probe(pdev, &aspeed_g6_pinctrl_desc,
2793			&aspeed_g6_pinctrl_data);
2794}
2795
2796static const struct of_device_id aspeed_g6_pinctrl_of_match[] = {
2797	{ .compatible = "aspeed,ast2600-pinctrl", },
2798	{ },
2799};
2800
2801static struct platform_driver aspeed_g6_pinctrl_driver = {
2802	.probe = aspeed_g6_pinctrl_probe,
2803	.driver = {
2804		.name = "aspeed-g6-pinctrl",
2805		.of_match_table = aspeed_g6_pinctrl_of_match,
2806	},
2807};
2808
2809static int aspeed_g6_pinctrl_init(void)
2810{
2811	return platform_driver_register(&aspeed_g6_pinctrl_driver);
2812}
2813
2814arch_initcall(aspeed_g6_pinctrl_init);