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phy-mtk-hdmi.h

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linux-6.19.14/drivers/phy/mediatek/phy-mtk-hdmi.h C
 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Copyright (c) 2018 MediaTek Inc.
 4 * Author: Chunhui Dai <chunhui.dai@mediatek.com>
 5 */
 6
 7#ifndef _MTK_HDMI_PHY_H
 8#define _MTK_HDMI_PHY_H
 9#include <linux/clk.h>
10#include <linux/clk-provider.h>
11#include <linux/delay.h>
12#include <linux/mfd/syscon.h>
13#include <linux/module.h>
14#include <linux/phy/phy.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
17#include <linux/regulator/machine.h>
18#include <linux/types.h>
19
20struct mtk_hdmi_phy;
21
22struct mtk_hdmi_phy_conf {
23	unsigned long flags;
24	bool pll_default_off;
25	const struct regulator_desc *hdmi_phy_regulator_desc;
26	const struct clk_ops *hdmi_phy_clk_ops;
27	void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
28	void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
29	int (*hdmi_phy_configure)(struct phy *phy, union phy_configure_opts *opts);
30};
31
32struct mtk_hdmi_phy {
33	void __iomem *regs;
34	struct device *dev;
35	struct mtk_hdmi_phy_conf *conf;
36	struct clk *pll;
37	struct clk_hw pll_hw;
38	struct regulator_dev *rdev;
39	unsigned long pll_rate;
40	unsigned char drv_imp_clk;
41	unsigned char drv_imp_d2;
42	unsigned char drv_imp_d1;
43	unsigned char drv_imp_d0;
44	unsigned int ibias;
45	unsigned int ibias_up;
46	bool tmds_over_340M;
47};
48
49struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
50
51extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8195_conf;
52extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
53extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf;
54
55#endif /* _MTK_HDMI_PHY_H */
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