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pci-epf-vntb.c
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linux-6.19.14/drivers/pci/endpoint/functions/pci-epf-vntb.c
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Endpoint Function Driver to implement Non-Transparent Bridge functionality 4 * Between PCI RC and EP 5 * 6 * Copyright (C) 2020 Texas Instruments 7 * Copyright (C) 2022 NXP 8 * 9 * Based on pci-epf-ntb.c 10 * Author: Frank Li <Frank.Li@nxp.com> 11 * Author: Kishon Vijay Abraham I <kishon@ti.com> 12 */ 13 14/* 15 * +------------+ +---------------------------------------+ 16 * | | | | 17 * +------------+ | +--------------+ 18 * | NTB | | | NTB | 19 * | NetDev | | | NetDev | 20 * +------------+ | +--------------+ 21 * | NTB | | | NTB | 22 * | Transfer | | | Transfer | 23 * +------------+ | +--------------+ 24 * | | | | | 25 * | PCI NTB | | | | 26 * | EPF | | | | 27 * | Driver | | | PCI Virtual | 28 * | | +---------------+ | NTB Driver | 29 * | | | PCI EP NTB |<------>| | 30 * | | | FN Driver | | | 31 * +------------+ +---------------+ +--------------+ 32 * | | | | | | 33 * | PCI Bus | <-----> | PCI EP Bus | | Virtual PCI | 34 * | | PCI | | | Bus | 35 * +------------+ +---------------+--------+--------------+ 36 * PCIe Root Port PCI EP 37 */ 38 39#include <linux/atomic.h> 40#include <linux/delay.h> 41#include <linux/io.h> 42#include <linux/module.h> 43#include <linux/slab.h> 44 45#include <linux/pci-ep-msi.h> 46#include <linux/pci-epc.h> 47#include <linux/pci-epf.h> 48#include <linux/ntb.h> 49 50static struct workqueue_struct *kpcintb_workqueue; 51 52#define COMMAND_CONFIGURE_DOORBELL 1 53#define COMMAND_TEARDOWN_DOORBELL 2 54#define COMMAND_CONFIGURE_MW 3 55#define COMMAND_TEARDOWN_MW 4 56#define COMMAND_LINK_UP 5 57#define COMMAND_LINK_DOWN 6 58 59#define COMMAND_STATUS_OK 1 60#define COMMAND_STATUS_ERROR 2 61 62#define LINK_STATUS_UP BIT(0) 63 64#define SPAD_COUNT 64 65#define DB_COUNT 4 66#define NTB_MW_OFFSET 2 67#define DB_COUNT_MASK GENMASK(15, 0) 68#define MSIX_ENABLE BIT(16) 69#define MAX_DB_COUNT 32 70#define MAX_MW 4 71 72enum epf_ntb_bar { 73 BAR_CONFIG, 74 BAR_DB, 75 BAR_MW1, 76 BAR_MW2, 77 BAR_MW3, 78 BAR_MW4, 79 VNTB_BAR_NUM, 80}; 81 82/* 83 * +--------------------------------------------------+ Base 84 * | | 85 * | | 86 * | | 87 * | Common Control Register | 88 * | | 89 * | | 90 * | | 91 * +-----------------------+--------------------------+ Base+spad_offset 92 * | | | 93 * | Peer Spad Space | Spad Space | 94 * | | | 95 * | | | 96 * +-----------------------+--------------------------+ Base+spad_offset 97 * | | | +spad_count * 4 98 * | | | 99 * | Spad Space | Peer Spad Space | 100 * | | | 101 * +-----------------------+--------------------------+ 102 * Virtual PCI PCIe Endpoint 103 * NTB Driver NTB Driver 104 */ 105struct epf_ntb_ctrl { 106 u32 command; 107 u32 argument; 108 u16 command_status; 109 u16 link_status; 110 u32 topology; 111 u64 addr; 112 u64 size; 113 u32 num_mws; 114 u32 reserved; 115 u32 spad_offset; 116 u32 spad_count; 117 u32 db_entry_size; 118 u32 db_data[MAX_DB_COUNT]; 119 u32 db_offset[MAX_DB_COUNT]; 120} __packed; 121 122struct epf_ntb { 123 struct ntb_dev ntb; 124 struct pci_epf *epf; 125 struct config_group group; 126 127 u32 num_mws; 128 u32 db_count; 129 u32 spad_count; 130 u64 mws_size[MAX_MW]; 131 atomic64_t db; 132 u32 vbus_number; 133 u16 vntb_pid; 134 u16 vntb_vid; 135 136 bool linkup; 137 bool msi_doorbell; 138 u32 spad_size; 139 140 enum pci_barno epf_ntb_bar[VNTB_BAR_NUM]; 141 142 struct epf_ntb_ctrl *reg; 143 144 u32 *epf_db; 145 146 phys_addr_t vpci_mw_phy[MAX_MW]; 147 void __iomem *vpci_mw_addr[MAX_MW]; 148 149 struct delayed_work cmd_handler; 150}; 151 152#define to_epf_ntb(epf_group) container_of((epf_group), struct epf_ntb, group) 153#define ntb_ndev(__ntb) container_of(__ntb, struct epf_ntb, ntb) 154 155static struct pci_epf_header epf_ntb_header = { 156 .vendorid = PCI_ANY_ID, 157 .deviceid = PCI_ANY_ID, 158 .baseclass_code = PCI_BASE_CLASS_MEMORY, 159 .interrupt_pin = PCI_INTERRUPT_INTA, 160}; 161 162/** 163 * epf_ntb_link_up() - Raise link_up interrupt to Virtual Host (VHOST) 164 * @ntb: NTB device that facilitates communication between HOST and VHOST 165 * @link_up: true or false indicating Link is UP or Down 166 * 167 * Once NTB function in HOST invoke ntb_link_enable(), 168 * this NTB function driver will trigger a link event to VHOST. 169 * 170 * Returns: Zero for success, or an error code in case of failure 171 */ 172static int epf_ntb_link_up(struct epf_ntb *ntb, bool link_up) 173{ 174 if (link_up) 175 ntb->reg->link_status |= LINK_STATUS_UP; 176 else 177 ntb->reg->link_status &= ~LINK_STATUS_UP; 178 179 ntb_link_event(&ntb->ntb); 180 return 0; 181} 182 183/** 184 * epf_ntb_configure_mw() - Configure the Outbound Address Space for VHOST 185 * to access the memory window of HOST 186 * @ntb: NTB device that facilitates communication between HOST and VHOST 187 * @mw: Index of the memory window (either 0, 1, 2 or 3) 188 * 189 * EP Outbound Window 190 * +--------+ +-----------+ 191 * | | | | 192 * | | | | 193 * | | | | 194 * | | | | 195 * | | +-----------+ 196 * | Virtual| | Memory Win| 197 * | NTB | -----------> | | 198 * | Driver | | | 199 * | | +-----------+ 200 * | | | | 201 * | | | | 202 * +--------+ +-----------+ 203 * VHOST PCI EP 204 * 205 * Returns: Zero for success, or an error code in case of failure 206 */ 207static int epf_ntb_configure_mw(struct epf_ntb *ntb, u32 mw) 208{ 209 phys_addr_t phys_addr; 210 u8 func_no, vfunc_no; 211 u64 addr, size; 212 int ret = 0; 213 214 phys_addr = ntb->vpci_mw_phy[mw]; 215 addr = ntb->reg->addr; 216 size = ntb->reg->size; 217 218 func_no = ntb->epf->func_no; 219 vfunc_no = ntb->epf->vfunc_no; 220 221 ret = pci_epc_map_addr(ntb->epf->epc, func_no, vfunc_no, phys_addr, addr, size); 222 if (ret) 223 dev_err(&ntb->epf->epc->dev, 224 "Failed to map memory window %d address\n", mw); 225 return ret; 226} 227 228/** 229 * epf_ntb_teardown_mw() - Teardown the configured OB ATU 230 * @ntb: NTB device that facilitates communication between HOST and VHOST 231 * @mw: Index of the memory window (either 0, 1, 2 or 3) 232 * 233 * Teardown the configured OB ATU configured in epf_ntb_configure_mw() using 234 * pci_epc_unmap_addr() 235 */ 236static void epf_ntb_teardown_mw(struct epf_ntb *ntb, u32 mw) 237{ 238 pci_epc_unmap_addr(ntb->epf->epc, 239 ntb->epf->func_no, 240 ntb->epf->vfunc_no, 241 ntb->vpci_mw_phy[mw]); 242} 243 244/** 245 * epf_ntb_cmd_handler() - Handle commands provided by the NTB HOST 246 * @work: work_struct for the epf_ntb_epc 247 * 248 * Workqueue function that gets invoked for the two epf_ntb_epc 249 * periodically (once every 5ms) to see if it has received any commands 250 * from NTB HOST. The HOST can send commands to configure doorbell or 251 * configure memory window or to update link status. 252 */ 253static void epf_ntb_cmd_handler(struct work_struct *work) 254{ 255 struct epf_ntb_ctrl *ctrl; 256 u32 command, argument; 257 struct epf_ntb *ntb; 258 struct device *dev; 259 int ret; 260 int i; 261 262 ntb = container_of(work, struct epf_ntb, cmd_handler.work); 263 264 for (i = 1; i < ntb->db_count && !ntb->msi_doorbell; i++) { 265 if (ntb->epf_db[i]) { 266 atomic64_or(1 << (i - 1), &ntb->db); 267 ntb_db_event(&ntb->ntb, i); 268 ntb->epf_db[i] = 0; 269 } 270 } 271 272 ctrl = ntb->reg; 273 command = ctrl->command; 274 if (!command) 275 goto reset_handler; 276 argument = ctrl->argument; 277 278 ctrl->command = 0; 279 ctrl->argument = 0; 280 281 ctrl = ntb->reg; 282 dev = &ntb->epf->dev; 283 284 switch (command) { 285 case COMMAND_CONFIGURE_DOORBELL: 286 ctrl->command_status = COMMAND_STATUS_OK; 287 break; 288 case COMMAND_TEARDOWN_DOORBELL: 289 ctrl->command_status = COMMAND_STATUS_OK; 290 break; 291 case COMMAND_CONFIGURE_MW: 292 ret = epf_ntb_configure_mw(ntb, argument); 293 if (ret < 0) 294 ctrl->command_status = COMMAND_STATUS_ERROR; 295 else 296 ctrl->command_status = COMMAND_STATUS_OK; 297 break; 298 case COMMAND_TEARDOWN_MW: 299 epf_ntb_teardown_mw(ntb, argument); 300 ctrl->command_status = COMMAND_STATUS_OK; 301 break; 302 case COMMAND_LINK_UP: 303 ntb->linkup = true; 304 ret = epf_ntb_link_up(ntb, true); 305 if (ret < 0) 306 ctrl->command_status = COMMAND_STATUS_ERROR; 307 else 308 ctrl->command_status = COMMAND_STATUS_OK; 309 goto reset_handler; 310 case COMMAND_LINK_DOWN: 311 ntb->linkup = false; 312 ret = epf_ntb_link_up(ntb, false); 313 if (ret < 0) 314 ctrl->command_status = COMMAND_STATUS_ERROR; 315 else 316 ctrl->command_status = COMMAND_STATUS_OK; 317 break; 318 default: 319 dev_err(dev, "UNKNOWN command: %d\n", command); 320 break; 321 } 322 323reset_handler: 324 queue_delayed_work(kpcintb_workqueue, &ntb->cmd_handler, 325 ntb->msi_doorbell ? msecs_to_jiffies(500) : msecs_to_jiffies(5)); 326} 327 328static irqreturn_t epf_ntb_doorbell_handler(int irq, void *data) 329{ 330 struct epf_ntb *ntb = data; 331 int i; 332 333 for (i = 1; i < ntb->db_count; i++) 334 if (irq == ntb->epf->db_msg[i].virq) { 335 atomic64_or(1 << (i - 1), &ntb->db); 336 ntb_db_event(&ntb->ntb, i); 337 } 338 339 return IRQ_HANDLED; 340} 341 342/** 343 * epf_ntb_config_sspad_bar_clear() - Clear Config + Self scratchpad BAR 344 * @ntb: EPC associated with one of the HOST which holds peer's outbound 345 * address. 346 * 347 * Clear BAR0 of EP CONTROLLER 1 which contains the HOST1's config and 348 * self scratchpad region (removes inbound ATU configuration). While BAR0 is 349 * the default self scratchpad BAR, an NTB could have other BARs for self 350 * scratchpad (because of reserved BARs). This function can get the exact BAR 351 * used for self scratchpad from epf_ntb_bar[BAR_CONFIG]. 352 * 353 * Please note the self scratchpad region and config region is combined to 354 * a single region and mapped using the same BAR. Also note VHOST's peer 355 * scratchpad is HOST's self scratchpad. 356 * 357 * Returns: void 358 */ 359static void epf_ntb_config_sspad_bar_clear(struct epf_ntb *ntb) 360{ 361 struct pci_epf_bar *epf_bar; 362 enum pci_barno barno; 363 364 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 365 epf_bar = &ntb->epf->bar[barno]; 366 367 pci_epc_clear_bar(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no, epf_bar); 368} 369 370/** 371 * epf_ntb_config_sspad_bar_set() - Set Config + Self scratchpad BAR 372 * @ntb: NTB device that facilitates communication between HOST and VHOST 373 * 374 * Map BAR0 of EP CONTROLLER which contains the VHOST's config and 375 * self scratchpad region. 376 * 377 * Please note the self scratchpad region and config region is combined to 378 * a single region and mapped using the same BAR. 379 * 380 * Returns: Zero for success, or an error code in case of failure 381 */ 382static int epf_ntb_config_sspad_bar_set(struct epf_ntb *ntb) 383{ 384 struct pci_epf_bar *epf_bar; 385 enum pci_barno barno; 386 u8 func_no, vfunc_no; 387 struct device *dev; 388 int ret; 389 390 dev = &ntb->epf->dev; 391 func_no = ntb->epf->func_no; 392 vfunc_no = ntb->epf->vfunc_no; 393 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 394 epf_bar = &ntb->epf->bar[barno]; 395 396 ret = pci_epc_set_bar(ntb->epf->epc, func_no, vfunc_no, epf_bar); 397 if (ret) { 398 dev_err(dev, "inft: Config/Status/SPAD BAR set failed\n"); 399 return ret; 400 } 401 return 0; 402} 403 404/** 405 * epf_ntb_config_spad_bar_free() - Free the physical memory associated with 406 * config + scratchpad region 407 * @ntb: NTB device that facilitates communication between HOST and VHOST 408 */ 409static void epf_ntb_config_spad_bar_free(struct epf_ntb *ntb) 410{ 411 enum pci_barno barno; 412 413 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 414 pci_epf_free_space(ntb->epf, ntb->reg, barno, 0); 415} 416 417/** 418 * epf_ntb_config_spad_bar_alloc() - Allocate memory for config + scratchpad 419 * region 420 * @ntb: NTB device that facilitates communication between HOST and VHOST 421 * 422 * Allocate the Local Memory mentioned in the above diagram. The size of 423 * CONFIG REGION is sizeof(struct epf_ntb_ctrl) and size of SCRATCHPAD REGION 424 * is obtained from "spad-count" configfs entry. 425 * 426 * Returns: Zero for success, or an error code in case of failure 427 */ 428static int epf_ntb_config_spad_bar_alloc(struct epf_ntb *ntb) 429{ 430 enum pci_barno barno; 431 struct epf_ntb_ctrl *ctrl; 432 u32 spad_size, ctrl_size; 433 struct pci_epf *epf = ntb->epf; 434 struct device *dev = &epf->dev; 435 u32 spad_count; 436 void *base; 437 int i; 438 const struct pci_epc_features *epc_features = pci_epc_get_features(epf->epc, 439 epf->func_no, 440 epf->vfunc_no); 441 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 442 spad_count = ntb->spad_count; 443 444 ctrl_size = ALIGN(sizeof(struct epf_ntb_ctrl), sizeof(u32)); 445 spad_size = 2 * spad_count * sizeof(u32); 446 447 base = pci_epf_alloc_space(epf, ctrl_size + spad_size, 448 barno, epc_features, 0); 449 if (!base) { 450 dev_err(dev, "Config/Status/SPAD alloc region fail\n"); 451 return -ENOMEM; 452 } 453 454 ntb->reg = base; 455 456 ctrl = ntb->reg; 457 ctrl->spad_offset = ctrl_size; 458 459 ctrl->spad_count = spad_count; 460 ctrl->num_mws = ntb->num_mws; 461 ntb->spad_size = spad_size; 462 463 ctrl->db_entry_size = sizeof(u32); 464 465 for (i = 0; i < ntb->db_count; i++) { 466 ntb->reg->db_data[i] = 1 + i; 467 ntb->reg->db_offset[i] = 0; 468 } 469 470 return 0; 471} 472 473/** 474 * epf_ntb_configure_interrupt() - Configure MSI/MSI-X capability 475 * @ntb: NTB device that facilitates communication between HOST and VHOST 476 * 477 * Configure MSI/MSI-X capability for each interface with number of 478 * interrupts equal to "db_count" configfs entry. 479 * 480 * Returns: Zero for success, or an error code in case of failure 481 */ 482static int epf_ntb_configure_interrupt(struct epf_ntb *ntb) 483{ 484 const struct pci_epc_features *epc_features; 485 struct device *dev; 486 u32 db_count; 487 int ret; 488 489 dev = &ntb->epf->dev; 490 491 epc_features = pci_epc_get_features(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no); 492 493 if (!(epc_features->msix_capable || epc_features->msi_capable)) { 494 dev_err(dev, "MSI or MSI-X is required for doorbell\n"); 495 return -EINVAL; 496 } 497 498 db_count = ntb->db_count; 499 if (db_count > MAX_DB_COUNT) { 500 dev_err(dev, "DB count cannot be more than %d\n", MAX_DB_COUNT); 501 return -EINVAL; 502 } 503 504 ntb->db_count = db_count; 505 506 if (epc_features->msi_capable) { 507 ret = pci_epc_set_msi(ntb->epf->epc, 508 ntb->epf->func_no, 509 ntb->epf->vfunc_no, 510 16); 511 if (ret) { 512 dev_err(dev, "MSI configuration failed\n"); 513 return ret; 514 } 515 } 516 517 return 0; 518} 519 520static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb, 521 struct pci_epf_bar *db_bar, 522 const struct pci_epc_features *epc_features, 523 enum pci_barno barno) 524{ 525 struct pci_epf *epf = ntb->epf; 526 dma_addr_t low, high; 527 struct msi_msg *msg; 528 size_t sz; 529 int ret; 530 int i; 531 532 ret = pci_epf_alloc_doorbell(epf, ntb->db_count); 533 if (ret) 534 return ret; 535 536 for (i = 0; i < ntb->db_count; i++) { 537 ret = request_irq(epf->db_msg[i].virq, epf_ntb_doorbell_handler, 538 0, "pci_epf_vntb_db", ntb); 539 540 if (ret) { 541 dev_err(&epf->dev, 542 "Failed to request doorbell IRQ: %d\n", 543 epf->db_msg[i].virq); 544 goto err_free_irq; 545 } 546 } 547 548 msg = &epf->db_msg[0].msg; 549 550 high = 0; 551 low = (u64)msg->address_hi << 32 | msg->address_lo; 552 553 for (i = 0; i < ntb->db_count; i++) { 554 struct msi_msg *msg = &epf->db_msg[i].msg; 555 dma_addr_t addr = (u64)msg->address_hi << 32 | msg->address_lo; 556 557 low = min(low, addr); 558 high = max(high, addr); 559 } 560 561 sz = high - low + sizeof(u32); 562 563 ret = pci_epf_assign_bar_space(epf, sz, barno, epc_features, 0, low); 564 if (ret) { 565 dev_err(&epf->dev, "Failed to assign Doorbell BAR space\n"); 566 goto err_free_irq; 567 } 568 569 ret = pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no, 570 ntb->epf->vfunc_no, db_bar); 571 if (ret) { 572 dev_err(&epf->dev, "Failed to set Doorbell BAR\n"); 573 goto err_free_irq; 574 } 575 576 for (i = 0; i < ntb->db_count; i++) { 577 struct msi_msg *msg = &epf->db_msg[i].msg; 578 dma_addr_t addr; 579 size_t offset; 580 581 ret = pci_epf_align_inbound_addr(epf, db_bar->barno, 582 ((u64)msg->address_hi << 32) | msg->address_lo, 583 &addr, &offset); 584 585 if (ret) { 586 ntb->msi_doorbell = false; 587 goto err_free_irq; 588 } 589 590 ntb->reg->db_data[i] = msg->data; 591 ntb->reg->db_offset[i] = offset; 592 } 593 594 ntb->reg->db_entry_size = 0; 595 596 ntb->msi_doorbell = true; 597 598 return 0; 599 600err_free_irq: 601 for (i--; i >= 0; i--) 602 free_irq(epf->db_msg[i].virq, ntb); 603 604 pci_epf_free_doorbell(ntb->epf); 605 return ret; 606} 607 608/** 609 * epf_ntb_db_bar_init() - Configure Doorbell window BARs 610 * @ntb: NTB device that facilitates communication between HOST and VHOST 611 * 612 * Returns: Zero for success, or an error code in case of failure 613 */ 614static int epf_ntb_db_bar_init(struct epf_ntb *ntb) 615{ 616 const struct pci_epc_features *epc_features; 617 struct device *dev = &ntb->epf->dev; 618 int ret; 619 struct pci_epf_bar *epf_bar; 620 void *mw_addr; 621 enum pci_barno barno; 622 size_t size = sizeof(u32) * ntb->db_count; 623 624 epc_features = pci_epc_get_features(ntb->epf->epc, 625 ntb->epf->func_no, 626 ntb->epf->vfunc_no); 627 barno = ntb->epf_ntb_bar[BAR_DB]; 628 epf_bar = &ntb->epf->bar[barno]; 629 630 ret = epf_ntb_db_bar_init_msi_doorbell(ntb, epf_bar, epc_features, barno); 631 if (ret) { 632 /* fall back to polling mode */ 633 mw_addr = pci_epf_alloc_space(ntb->epf, size, barno, epc_features, 0); 634 if (!mw_addr) { 635 dev_err(dev, "Failed to allocate OB address\n"); 636 return -ENOMEM; 637 } 638 639 ntb->epf_db = mw_addr; 640 641 ret = pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no, 642 ntb->epf->vfunc_no, epf_bar); 643 if (ret) { 644 dev_err(dev, "Doorbell BAR set failed\n"); 645 goto err_alloc_peer_mem; 646 } 647 } 648 return ret; 649 650err_alloc_peer_mem: 651 pci_epf_free_space(ntb->epf, mw_addr, barno, 0); 652 return -1; 653} 654 655static void epf_ntb_mw_bar_clear(struct epf_ntb *ntb, int num_mws); 656 657/** 658 * epf_ntb_db_bar_clear() - Clear doorbell BAR and free memory 659 * allocated in peer's outbound address space 660 * @ntb: NTB device that facilitates communication between HOST and VHOST 661 */ 662static void epf_ntb_db_bar_clear(struct epf_ntb *ntb) 663{ 664 enum pci_barno barno; 665 666 if (ntb->msi_doorbell) { 667 int i; 668 669 for (i = 0; i < ntb->db_count; i++) 670 free_irq(ntb->epf->db_msg[i].virq, ntb); 671 } 672 673 if (ntb->epf->db_msg) 674 pci_epf_free_doorbell(ntb->epf); 675 676 barno = ntb->epf_ntb_bar[BAR_DB]; 677 pci_epf_free_space(ntb->epf, ntb->epf_db, barno, 0); 678 pci_epc_clear_bar(ntb->epf->epc, 679 ntb->epf->func_no, 680 ntb->epf->vfunc_no, 681 &ntb->epf->bar[barno]); 682} 683 684/** 685 * epf_ntb_mw_bar_init() - Configure Memory window BARs 686 * @ntb: NTB device that facilitates communication between HOST and VHOST 687 * 688 * Returns: Zero for success, or an error code in case of failure 689 */ 690static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) 691{ 692 int ret = 0; 693 int i; 694 u64 size; 695 enum pci_barno barno; 696 struct device *dev = &ntb->epf->dev; 697 698 for (i = 0; i < ntb->num_mws; i++) { 699 size = ntb->mws_size[i]; 700 barno = ntb->epf_ntb_bar[BAR_MW1 + i]; 701 702 ntb->epf->bar[barno].barno = barno; 703 ntb->epf->bar[barno].size = size; 704 ntb->epf->bar[barno].addr = NULL; 705 ntb->epf->bar[barno].phys_addr = 0; 706 ntb->epf->bar[barno].flags |= upper_32_bits(size) ? 707 PCI_BASE_ADDRESS_MEM_TYPE_64 : 708 PCI_BASE_ADDRESS_MEM_TYPE_32; 709 710 ret = pci_epc_set_bar(ntb->epf->epc, 711 ntb->epf->func_no, 712 ntb->epf->vfunc_no, 713 &ntb->epf->bar[barno]); 714 if (ret) { 715 dev_err(dev, "MW set failed\n"); 716 goto err_alloc_mem; 717 } 718 719 /* Allocate EPC outbound memory windows to vpci vntb device */ 720 ntb->vpci_mw_addr[i] = pci_epc_mem_alloc_addr(ntb->epf->epc, 721 &ntb->vpci_mw_phy[i], 722 size); 723 if (!ntb->vpci_mw_addr[i]) { 724 ret = -ENOMEM; 725 dev_err(dev, "Failed to allocate source address\n"); 726 goto err_set_bar; 727 } 728 } 729 730 return ret; 731 732err_set_bar: 733 pci_epc_clear_bar(ntb->epf->epc, 734 ntb->epf->func_no, 735 ntb->epf->vfunc_no, 736 &ntb->epf->bar[barno]); 737err_alloc_mem: 738 epf_ntb_mw_bar_clear(ntb, i); 739 return ret; 740} 741 742/** 743 * epf_ntb_mw_bar_clear() - Clear Memory window BARs 744 * @ntb: NTB device that facilitates communication between HOST and VHOST 745 * @num_mws: the number of Memory window BARs that to be cleared 746 */ 747static void epf_ntb_mw_bar_clear(struct epf_ntb *ntb, int num_mws) 748{ 749 enum pci_barno barno; 750 int i; 751 752 for (i = 0; i < num_mws; i++) { 753 barno = ntb->epf_ntb_bar[BAR_MW1 + i]; 754 pci_epc_clear_bar(ntb->epf->epc, 755 ntb->epf->func_no, 756 ntb->epf->vfunc_no, 757 &ntb->epf->bar[barno]); 758 759 pci_epc_mem_free_addr(ntb->epf->epc, 760 ntb->vpci_mw_phy[i], 761 ntb->vpci_mw_addr[i], 762 ntb->mws_size[i]); 763 } 764} 765 766/** 767 * epf_ntb_is_bar_used() - Check if a bar is used in the ntb configuration 768 * @ntb: NTB device that facilitates communication between HOST and VHOST 769 * @barno: Checked bar number 770 * 771 * Returns: true if used, false if free. 772 */ 773static bool epf_ntb_is_bar_used(struct epf_ntb *ntb, 774 enum pci_barno barno) 775{ 776 int i; 777 778 for (i = 0; i < VNTB_BAR_NUM; i++) { 779 if (ntb->epf_ntb_bar[i] == barno) 780 return true; 781 } 782 783 return false; 784} 785 786/** 787 * epf_ntb_find_bar() - Assign BAR number when no configuration is provided 788 * @ntb: NTB device that facilitates communication between HOST and VHOST 789 * @epc_features: The features provided by the EPC specific to this EPF 790 * @bar: NTB BAR index 791 * @barno: Bar start index 792 * 793 * When the BAR configuration was not provided through the userspace 794 * configuration, automatically assign BAR as it has been historically 795 * done by this endpoint function. 796 * 797 * Returns: the BAR number found, if any. -1 otherwise 798 */ 799static int epf_ntb_find_bar(struct epf_ntb *ntb, 800 const struct pci_epc_features *epc_features, 801 enum epf_ntb_bar bar, 802 enum pci_barno barno) 803{ 804 while (ntb->epf_ntb_bar[bar] < 0) { 805 barno = pci_epc_get_next_free_bar(epc_features, barno); 806 if (barno < 0) 807 break; /* No more BAR available */ 808 809 /* 810 * Verify if the BAR found is not already assigned 811 * through the provided configuration 812 */ 813 if (!epf_ntb_is_bar_used(ntb, barno)) 814 ntb->epf_ntb_bar[bar] = barno; 815 816 barno += 1; 817 } 818 819 return barno; 820} 821 822/** 823 * epf_ntb_init_epc_bar() - Identify BARs to be used for each of the NTB 824 * constructs (scratchpad region, doorbell, memorywindow) 825 * @ntb: NTB device that facilitates communication between HOST and VHOST 826 * 827 * Returns: Zero for success, or an error code in case of failure 828 */ 829static int epf_ntb_init_epc_bar(struct epf_ntb *ntb) 830{ 831 const struct pci_epc_features *epc_features; 832 enum pci_barno barno; 833 enum epf_ntb_bar bar; 834 struct device *dev; 835 u32 num_mws; 836 int i; 837 838 barno = BAR_0; 839 num_mws = ntb->num_mws; 840 dev = &ntb->epf->dev; 841 epc_features = pci_epc_get_features(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no); 842 843 /* These are required BARs which are mandatory for NTB functionality */ 844 for (bar = BAR_CONFIG; bar <= BAR_MW1; bar++) { 845 barno = epf_ntb_find_bar(ntb, epc_features, bar, barno); 846 if (barno < 0) { 847 dev_err(dev, "Fail to get NTB function BAR\n"); 848 return -ENOENT; 849 } 850 } 851 852 /* These are optional BARs which don't impact NTB functionality */ 853 for (bar = BAR_MW1, i = 1; i < num_mws; bar++, i++) { 854 barno = epf_ntb_find_bar(ntb, epc_features, bar, barno); 855 if (barno < 0) { 856 ntb->num_mws = i; 857 dev_dbg(dev, "BAR not available for > MW%d\n", i + 1); 858 } 859 } 860 861 return 0; 862} 863 864/** 865 * epf_ntb_epc_init() - Initialize NTB interface 866 * @ntb: NTB device that facilitates communication between HOST and VHOST 867 * 868 * Wrapper to initialize a particular EPC interface and start the workqueue 869 * to check for commands from HOST. This function will write to the 870 * EP controller HW for configuring it. 871 * 872 * Returns: Zero for success, or an error code in case of failure 873 */ 874static int epf_ntb_epc_init(struct epf_ntb *ntb) 875{ 876 u8 func_no, vfunc_no; 877 struct pci_epc *epc; 878 struct pci_epf *epf; 879 struct device *dev; 880 int ret; 881 882 epf = ntb->epf; 883 dev = &epf->dev; 884 epc = epf->epc; 885 func_no = ntb->epf->func_no; 886 vfunc_no = ntb->epf->vfunc_no; 887 888 ret = epf_ntb_config_sspad_bar_set(ntb); 889 if (ret) { 890 dev_err(dev, "Config/self SPAD BAR init failed"); 891 return ret; 892 } 893 894 ret = epf_ntb_configure_interrupt(ntb); 895 if (ret) { 896 dev_err(dev, "Interrupt configuration failed\n"); 897 goto err_config_interrupt; 898 } 899 900 ret = epf_ntb_db_bar_init(ntb); 901 if (ret) { 902 dev_err(dev, "DB BAR init failed\n"); 903 goto err_db_bar_init; 904 } 905 906 ret = epf_ntb_mw_bar_init(ntb); 907 if (ret) { 908 dev_err(dev, "MW BAR init failed\n"); 909 goto err_mw_bar_init; 910 } 911 912 if (vfunc_no <= 1) { 913 ret = pci_epc_write_header(epc, func_no, vfunc_no, epf->header); 914 if (ret) { 915 dev_err(dev, "Configuration header write failed\n"); 916 goto err_write_header; 917 } 918 } 919 920 INIT_DELAYED_WORK(&ntb->cmd_handler, epf_ntb_cmd_handler); 921 queue_work(kpcintb_workqueue, &ntb->cmd_handler.work); 922 923 return 0; 924 925err_write_header: 926 epf_ntb_mw_bar_clear(ntb, ntb->num_mws); 927err_mw_bar_init: 928 epf_ntb_db_bar_clear(ntb); 929err_db_bar_init: 930err_config_interrupt: 931 epf_ntb_config_sspad_bar_clear(ntb); 932 933 return ret; 934} 935 936 937/** 938 * epf_ntb_epc_cleanup() - Cleanup all NTB interfaces 939 * @ntb: NTB device that facilitates communication between HOST and VHOST 940 * 941 * Wrapper to cleanup all NTB interfaces. 942 */ 943static void epf_ntb_epc_cleanup(struct epf_ntb *ntb) 944{ 945 disable_delayed_work_sync(&ntb->cmd_handler); 946 epf_ntb_mw_bar_clear(ntb, ntb->num_mws); 947 epf_ntb_db_bar_clear(ntb); 948 epf_ntb_config_sspad_bar_clear(ntb); 949} 950 951#define EPF_NTB_R(_name) \ 952static ssize_t epf_ntb_##_name##_show(struct config_item *item, \ 953 char *page) \ 954{ \ 955 struct config_group *group = to_config_group(item); \ 956 struct epf_ntb *ntb = to_epf_ntb(group); \ 957 \ 958 return sprintf(page, "%d\n", ntb->_name); \ 959} 960 961#define EPF_NTB_W(_name) \ 962static ssize_t epf_ntb_##_name##_store(struct config_item *item, \ 963 const char *page, size_t len) \ 964{ \ 965 struct config_group *group = to_config_group(item); \ 966 struct epf_ntb *ntb = to_epf_ntb(group); \ 967 u32 val; \ 968 int ret; \ 969 \ 970 ret = kstrtou32(page, 0, &val); \ 971 if (ret) \ 972 return ret; \ 973 \ 974 ntb->_name = val; \ 975 \ 976 return len; \ 977} 978 979#define EPF_NTB_MW_R(_name) \ 980static ssize_t epf_ntb_##_name##_show(struct config_item *item, \ 981 char *page) \ 982{ \ 983 struct config_group *group = to_config_group(item); \ 984 struct epf_ntb *ntb = to_epf_ntb(group); \ 985 struct device *dev = &ntb->epf->dev; \ 986 int win_no; \ 987 \ 988 if (sscanf(#_name, "mw%d", &win_no) != 1) \ 989 return -EINVAL; \ 990 \ 991 if (win_no <= 0 || win_no > ntb->num_mws) { \ 992 dev_err(dev, "Invalid num_nws: %d value\n", ntb->num_mws); \ 993 return -EINVAL; \ 994 } \ 995 \ 996 return sprintf(page, "%lld\n", ntb->mws_size[win_no - 1]); \ 997} 998 999#define EPF_NTB_MW_W(_name) \ 1000static ssize_t epf_ntb_##_name##_store(struct config_item *item, \ 1001 const char *page, size_t len) \ 1002{ \ 1003 struct config_group *group = to_config_group(item); \ 1004 struct epf_ntb *ntb = to_epf_ntb(group); \ 1005 struct device *dev = &ntb->epf->dev; \ 1006 int win_no; \ 1007 u64 val; \ 1008 int ret; \ 1009 \ 1010 ret = kstrtou64(page, 0, &val); \ 1011 if (ret) \ 1012 return ret; \ 1013 \ 1014 if (sscanf(#_name, "mw%d", &win_no) != 1) \ 1015 return -EINVAL; \ 1016 \ 1017 if (win_no <= 0 || win_no > ntb->num_mws) { \ 1018 dev_err(dev, "Invalid num_nws: %d value\n", ntb->num_mws); \ 1019 return -EINVAL; \ 1020 } \ 1021 \ 1022 ntb->mws_size[win_no - 1] = val; \ 1023 \ 1024 return len; \ 1025} 1026 1027#define EPF_NTB_BAR_R(_name, _id) \ 1028 static ssize_t epf_ntb_##_name##_show(struct config_item *item, \ 1029 char *page) \ 1030 { \ 1031 struct config_group *group = to_config_group(item); \ 1032 struct epf_ntb *ntb = to_epf_ntb(group); \ 1033 \ 1034 return sprintf(page, "%d\n", ntb->epf_ntb_bar[_id]); \ 1035 } 1036 1037#define EPF_NTB_BAR_W(_name, _id) \ 1038 static ssize_t epf_ntb_##_name##_store(struct config_item *item, \ 1039 const char *page, size_t len) \ 1040 { \ 1041 struct config_group *group = to_config_group(item); \ 1042 struct epf_ntb *ntb = to_epf_ntb(group); \ 1043 int val; \ 1044 int ret; \ 1045 \ 1046 ret = kstrtoint(page, 0, &val); \ 1047 if (ret) \ 1048 return ret; \ 1049 \ 1050 if (val < NO_BAR || val > BAR_5) \ 1051 return -EINVAL; \ 1052 \ 1053 ntb->epf_ntb_bar[_id] = val; \ 1054 \ 1055 return len; \ 1056 } 1057 1058static ssize_t epf_ntb_num_mws_store(struct config_item *item, 1059 const char *page, size_t len) 1060{ 1061 struct config_group *group = to_config_group(item); 1062 struct epf_ntb *ntb = to_epf_ntb(group); 1063 u32 val; 1064 int ret; 1065 1066 ret = kstrtou32(page, 0, &val); 1067 if (ret) 1068 return ret; 1069 1070 if (val > MAX_MW) 1071 return -EINVAL; 1072 1073 ntb->num_mws = val; 1074 1075 return len; 1076} 1077 1078EPF_NTB_R(spad_count) 1079EPF_NTB_W(spad_count) 1080EPF_NTB_R(db_count) 1081EPF_NTB_W(db_count) 1082EPF_NTB_R(num_mws) 1083EPF_NTB_R(vbus_number) 1084EPF_NTB_W(vbus_number) 1085EPF_NTB_R(vntb_pid) 1086EPF_NTB_W(vntb_pid) 1087EPF_NTB_R(vntb_vid) 1088EPF_NTB_W(vntb_vid) 1089EPF_NTB_MW_R(mw1) 1090EPF_NTB_MW_W(mw1) 1091EPF_NTB_MW_R(mw2) 1092EPF_NTB_MW_W(mw2) 1093EPF_NTB_MW_R(mw3) 1094EPF_NTB_MW_W(mw3) 1095EPF_NTB_MW_R(mw4) 1096EPF_NTB_MW_W(mw4) 1097EPF_NTB_BAR_R(ctrl_bar, BAR_CONFIG) 1098EPF_NTB_BAR_W(ctrl_bar, BAR_CONFIG) 1099EPF_NTB_BAR_R(db_bar, BAR_DB) 1100EPF_NTB_BAR_W(db_bar, BAR_DB) 1101EPF_NTB_BAR_R(mw1_bar, BAR_MW1) 1102EPF_NTB_BAR_W(mw1_bar, BAR_MW1) 1103EPF_NTB_BAR_R(mw2_bar, BAR_MW2) 1104EPF_NTB_BAR_W(mw2_bar, BAR_MW2) 1105EPF_NTB_BAR_R(mw3_bar, BAR_MW3) 1106EPF_NTB_BAR_W(mw3_bar, BAR_MW3) 1107EPF_NTB_BAR_R(mw4_bar, BAR_MW4) 1108EPF_NTB_BAR_W(mw4_bar, BAR_MW4) 1109 1110CONFIGFS_ATTR(epf_ntb_, spad_count); 1111CONFIGFS_ATTR(epf_ntb_, db_count); 1112CONFIGFS_ATTR(epf_ntb_, num_mws); 1113CONFIGFS_ATTR(epf_ntb_, mw1); 1114CONFIGFS_ATTR(epf_ntb_, mw2); 1115CONFIGFS_ATTR(epf_ntb_, mw3); 1116CONFIGFS_ATTR(epf_ntb_, mw4); 1117CONFIGFS_ATTR(epf_ntb_, vbus_number); 1118CONFIGFS_ATTR(epf_ntb_, vntb_pid); 1119CONFIGFS_ATTR(epf_ntb_, vntb_vid); 1120CONFIGFS_ATTR(epf_ntb_, ctrl_bar); 1121CONFIGFS_ATTR(epf_ntb_, db_bar); 1122CONFIGFS_ATTR(epf_ntb_, mw1_bar); 1123CONFIGFS_ATTR(epf_ntb_, mw2_bar); 1124CONFIGFS_ATTR(epf_ntb_, mw3_bar); 1125CONFIGFS_ATTR(epf_ntb_, mw4_bar); 1126 1127static struct configfs_attribute *epf_ntb_attrs[] = { 1128 &epf_ntb_attr_spad_count, 1129 &epf_ntb_attr_db_count, 1130 &epf_ntb_attr_num_mws, 1131 &epf_ntb_attr_mw1, 1132 &epf_ntb_attr_mw2, 1133 &epf_ntb_attr_mw3, 1134 &epf_ntb_attr_mw4, 1135 &epf_ntb_attr_vbus_number, 1136 &epf_ntb_attr_vntb_pid, 1137 &epf_ntb_attr_vntb_vid, 1138 &epf_ntb_attr_ctrl_bar, 1139 &epf_ntb_attr_db_bar, 1140 &epf_ntb_attr_mw1_bar, 1141 &epf_ntb_attr_mw2_bar, 1142 &epf_ntb_attr_mw3_bar, 1143 &epf_ntb_attr_mw4_bar, 1144 NULL, 1145}; 1146 1147static const struct config_item_type ntb_group_type = { 1148 .ct_attrs = epf_ntb_attrs, 1149 .ct_owner = THIS_MODULE, 1150}; 1151 1152/** 1153 * epf_ntb_add_cfs() - Add configfs directory specific to NTB 1154 * @epf: NTB endpoint function device 1155 * @group: A pointer to the config_group structure referencing a group of 1156 * config_items of a specific type that belong to a specific sub-system. 1157 * 1158 * Add configfs directory specific to NTB. This directory will hold 1159 * NTB specific properties like db_count, spad_count, num_mws etc., 1160 * 1161 * Returns: Pointer to config_group 1162 */ 1163static struct config_group *epf_ntb_add_cfs(struct pci_epf *epf, 1164 struct config_group *group) 1165{ 1166 struct epf_ntb *ntb = epf_get_drvdata(epf); 1167 struct config_group *ntb_group = &ntb->group; 1168 struct device *dev = &epf->dev; 1169 1170 config_group_init_type_name(ntb_group, dev_name(dev), &ntb_group_type); 1171 1172 return ntb_group; 1173} 1174 1175/*==== virtual PCI bus driver, which only load virtual NTB PCI driver ====*/ 1176 1177static u32 pci_space[] = { 1178 0xffffffff, /* Device ID, Vendor ID */ 1179 0, /* Status, Command */ 1180 0xffffffff, /* Base Class, Subclass, Prog Intf, Revision ID */ 1181 0x40, /* BIST, Header Type, Latency Timer, Cache Line Size */ 1182 0, /* BAR 0 */ 1183 0, /* BAR 1 */ 1184 0, /* BAR 2 */ 1185 0, /* BAR 3 */ 1186 0, /* BAR 4 */ 1187 0, /* BAR 5 */ 1188 0, /* Cardbus CIS Pointer */ 1189 0, /* Subsystem ID, Subsystem Vendor ID */ 1190 0, /* ROM Base Address */ 1191 0, /* Reserved, Capabilities Pointer */ 1192 0, /* Reserved */ 1193 0, /* Max_Lat, Min_Gnt, Interrupt Pin, Interrupt Line */ 1194}; 1195 1196static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) 1197{ 1198 if (devfn == 0) { 1199 memcpy(val, ((u8 *)pci_space) + where, size); 1200 return PCIBIOS_SUCCESSFUL; 1201 } 1202 return PCIBIOS_DEVICE_NOT_FOUND; 1203} 1204 1205static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) 1206{ 1207 return 0; 1208} 1209 1210static struct pci_ops vpci_ops = { 1211 .read = pci_read, 1212 .write = pci_write, 1213}; 1214 1215static int vpci_scan_bus(void *sysdata) 1216{ 1217 struct pci_bus *vpci_bus; 1218 struct epf_ntb *ndev = sysdata; 1219 1220 vpci_bus = pci_scan_bus(ndev->vbus_number, &vpci_ops, sysdata); 1221 if (!vpci_bus) { 1222 pr_err("create pci bus failed\n"); 1223 return -EINVAL; 1224 } 1225 1226 pci_bus_add_devices(vpci_bus); 1227 1228 return 0; 1229} 1230 1231/*==================== Virtual PCIe NTB driver ==========================*/ 1232 1233static int vntb_epf_mw_count(struct ntb_dev *ntb, int pidx) 1234{ 1235 struct epf_ntb *ndev = ntb_ndev(ntb); 1236 1237 return ndev->num_mws; 1238} 1239 1240static int vntb_epf_spad_count(struct ntb_dev *ntb) 1241{ 1242 return ntb_ndev(ntb)->spad_count; 1243} 1244 1245static int vntb_epf_peer_mw_count(struct ntb_dev *ntb) 1246{ 1247 return ntb_ndev(ntb)->num_mws; 1248} 1249 1250static u64 vntb_epf_db_valid_mask(struct ntb_dev *ntb) 1251{ 1252 return BIT_ULL(ntb_ndev(ntb)->db_count) - 1; 1253} 1254 1255static int vntb_epf_db_set_mask(struct ntb_dev *ntb, u64 db_bits) 1256{ 1257 return 0; 1258} 1259 1260static int vntb_epf_mw_set_trans(struct ntb_dev *ndev, int pidx, int idx, 1261 dma_addr_t addr, resource_size_t size) 1262{ 1263 struct epf_ntb *ntb = ntb_ndev(ndev); 1264 struct pci_epf_bar *epf_bar; 1265 enum pci_barno barno; 1266 int ret; 1267 struct device *dev; 1268 1269 dev = &ntb->ntb.dev; 1270 barno = ntb->epf_ntb_bar[BAR_MW1 + idx]; 1271 epf_bar = &ntb->epf->bar[barno]; 1272 epf_bar->phys_addr = addr; 1273 epf_bar->barno = barno; 1274 epf_bar->size = size; 1275 1276 ret = pci_epc_set_bar(ntb->epf->epc, 0, 0, epf_bar); 1277 if (ret) { 1278 dev_err(dev, "failure set mw trans\n"); 1279 return ret; 1280 } 1281 return 0; 1282} 1283 1284static int vntb_epf_mw_clear_trans(struct ntb_dev *ntb, int pidx, int idx) 1285{ 1286 return 0; 1287} 1288 1289static int vntb_epf_peer_mw_get_addr(struct ntb_dev *ndev, int idx, 1290 phys_addr_t *base, resource_size_t *size) 1291{ 1292 1293 struct epf_ntb *ntb = ntb_ndev(ndev); 1294 1295 if (base) 1296 *base = ntb->vpci_mw_phy[idx]; 1297 1298 if (size) 1299 *size = ntb->mws_size[idx]; 1300 1301 return 0; 1302} 1303 1304static int vntb_epf_link_enable(struct ntb_dev *ntb, 1305 enum ntb_speed max_speed, 1306 enum ntb_width max_width) 1307{ 1308 return 0; 1309} 1310 1311static u32 vntb_epf_spad_read(struct ntb_dev *ndev, int idx) 1312{ 1313 struct epf_ntb *ntb = ntb_ndev(ndev); 1314 int off = ntb->reg->spad_offset, ct = ntb->reg->spad_count * sizeof(u32); 1315 u32 val; 1316 void __iomem *base = (void __iomem *)ntb->reg; 1317 1318 val = readl(base + off + ct + idx * sizeof(u32)); 1319 return val; 1320} 1321 1322static int vntb_epf_spad_write(struct ntb_dev *ndev, int idx, u32 val) 1323{ 1324 struct epf_ntb *ntb = ntb_ndev(ndev); 1325 struct epf_ntb_ctrl *ctrl = ntb->reg; 1326 int off = ctrl->spad_offset, ct = ctrl->spad_count * sizeof(u32); 1327 void __iomem *base = (void __iomem *)ntb->reg; 1328 1329 writel(val, base + off + ct + idx * sizeof(u32)); 1330 return 0; 1331} 1332 1333static u32 vntb_epf_peer_spad_read(struct ntb_dev *ndev, int pidx, int idx) 1334{ 1335 struct epf_ntb *ntb = ntb_ndev(ndev); 1336 struct epf_ntb_ctrl *ctrl = ntb->reg; 1337 int off = ctrl->spad_offset; 1338 void __iomem *base = (void __iomem *)ntb->reg; 1339 u32 val; 1340 1341 val = readl(base + off + idx * sizeof(u32)); 1342 return val; 1343} 1344 1345static int vntb_epf_peer_spad_write(struct ntb_dev *ndev, int pidx, int idx, u32 val) 1346{ 1347 struct epf_ntb *ntb = ntb_ndev(ndev); 1348 struct epf_ntb_ctrl *ctrl = ntb->reg; 1349 int off = ctrl->spad_offset; 1350 void __iomem *base = (void __iomem *)ntb->reg; 1351 1352 writel(val, base + off + idx * sizeof(u32)); 1353 return 0; 1354} 1355 1356static int vntb_epf_peer_db_set(struct ntb_dev *ndev, u64 db_bits) 1357{ 1358 u32 interrupt_num = ffs(db_bits) + 1; 1359 struct epf_ntb *ntb = ntb_ndev(ndev); 1360 u8 func_no, vfunc_no; 1361 int ret; 1362 1363 func_no = ntb->epf->func_no; 1364 vfunc_no = ntb->epf->vfunc_no; 1365 1366 ret = pci_epc_raise_irq(ntb->epf->epc, func_no, vfunc_no, 1367 PCI_IRQ_MSI, interrupt_num + 1); 1368 if (ret) 1369 dev_err(&ntb->ntb.dev, "Failed to raise IRQ\n"); 1370 1371 return ret; 1372} 1373 1374static u64 vntb_epf_db_read(struct ntb_dev *ndev) 1375{ 1376 struct epf_ntb *ntb = ntb_ndev(ndev); 1377 1378 return atomic64_read(&ntb->db); 1379} 1380 1381static int vntb_epf_mw_get_align(struct ntb_dev *ndev, int pidx, int idx, 1382 resource_size_t *addr_align, 1383 resource_size_t *size_align, 1384 resource_size_t *size_max) 1385{ 1386 struct epf_ntb *ntb = ntb_ndev(ndev); 1387 1388 if (addr_align) 1389 *addr_align = SZ_4K; 1390 1391 if (size_align) 1392 *size_align = 1; 1393 1394 if (size_max) 1395 *size_max = ntb->mws_size[idx]; 1396 1397 return 0; 1398} 1399 1400static u64 vntb_epf_link_is_up(struct ntb_dev *ndev, 1401 enum ntb_speed *speed, 1402 enum ntb_width *width) 1403{ 1404 struct epf_ntb *ntb = ntb_ndev(ndev); 1405 1406 return ntb->reg->link_status; 1407} 1408 1409static int vntb_epf_db_clear_mask(struct ntb_dev *ndev, u64 db_bits) 1410{ 1411 return 0; 1412} 1413 1414static int vntb_epf_db_clear(struct ntb_dev *ndev, u64 db_bits) 1415{ 1416 struct epf_ntb *ntb = ntb_ndev(ndev); 1417 1418 atomic64_and(~db_bits, &ntb->db); 1419 return 0; 1420} 1421 1422static int vntb_epf_link_disable(struct ntb_dev *ntb) 1423{ 1424 return 0; 1425} 1426 1427static const struct ntb_dev_ops vntb_epf_ops = { 1428 .mw_count = vntb_epf_mw_count, 1429 .spad_count = vntb_epf_spad_count, 1430 .peer_mw_count = vntb_epf_peer_mw_count, 1431 .db_valid_mask = vntb_epf_db_valid_mask, 1432 .db_set_mask = vntb_epf_db_set_mask, 1433 .mw_set_trans = vntb_epf_mw_set_trans, 1434 .mw_clear_trans = vntb_epf_mw_clear_trans, 1435 .peer_mw_get_addr = vntb_epf_peer_mw_get_addr, 1436 .link_enable = vntb_epf_link_enable, 1437 .spad_read = vntb_epf_spad_read, 1438 .spad_write = vntb_epf_spad_write, 1439 .peer_spad_read = vntb_epf_peer_spad_read, 1440 .peer_spad_write = vntb_epf_peer_spad_write, 1441 .peer_db_set = vntb_epf_peer_db_set, 1442 .db_read = vntb_epf_db_read, 1443 .mw_get_align = vntb_epf_mw_get_align, 1444 .link_is_up = vntb_epf_link_is_up, 1445 .db_clear_mask = vntb_epf_db_clear_mask, 1446 .db_clear = vntb_epf_db_clear, 1447 .link_disable = vntb_epf_link_disable, 1448}; 1449 1450static int pci_vntb_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1451{ 1452 int ret; 1453 struct epf_ntb *ndev = (struct epf_ntb *)pdev->sysdata; 1454 struct device *dev = &pdev->dev; 1455 1456 ndev->ntb.pdev = pdev; 1457 ndev->ntb.topo = NTB_TOPO_NONE; 1458 ndev->ntb.ops = &vntb_epf_ops; 1459 1460 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 1461 if (ret) { 1462 dev_err(dev, "Cannot set DMA mask\n"); 1463 return ret; 1464 } 1465 1466 ret = ntb_register_device(&ndev->ntb); 1467 if (ret) { 1468 dev_err(dev, "Failed to register NTB device\n"); 1469 return ret; 1470 } 1471 1472 dev_dbg(dev, "PCI Virtual NTB driver loaded\n"); 1473 return 0; 1474} 1475 1476static struct pci_device_id pci_vntb_table[] = { 1477 { 1478 PCI_DEVICE(0xffff, 0xffff), 1479 }, 1480 {}, 1481}; 1482 1483static struct pci_driver vntb_pci_driver = { 1484 .name = "pci-vntb", 1485 .id_table = pci_vntb_table, 1486 .probe = pci_vntb_probe, 1487}; 1488 1489/* ============ PCIe EPF Driver Bind ====================*/ 1490 1491/** 1492 * epf_ntb_bind() - Initialize endpoint controller to provide NTB functionality 1493 * @epf: NTB endpoint function device 1494 * 1495 * Initialize both the endpoint controllers associated with NTB function device. 1496 * Invoked when a primary interface or secondary interface is bound to EPC 1497 * device. This function will succeed only when EPC is bound to both the 1498 * interfaces. 1499 * 1500 * Returns: Zero for success, or an error code in case of failure 1501 */ 1502static int epf_ntb_bind(struct pci_epf *epf) 1503{ 1504 struct epf_ntb *ntb = epf_get_drvdata(epf); 1505 struct device *dev = &epf->dev; 1506 int ret; 1507 1508 if (!epf->epc) { 1509 dev_dbg(dev, "PRIMARY EPC interface not yet bound\n"); 1510 return 0; 1511 } 1512 1513 ret = epf_ntb_init_epc_bar(ntb); 1514 if (ret) { 1515 dev_err(dev, "Failed to create NTB EPC\n"); 1516 return ret; 1517 } 1518 1519 ret = epf_ntb_config_spad_bar_alloc(ntb); 1520 if (ret) { 1521 dev_err(dev, "Failed to allocate BAR memory\n"); 1522 goto err_bar_alloc; 1523 } 1524 1525 ret = epf_ntb_epc_init(ntb); 1526 if (ret) { 1527 dev_err(dev, "Failed to initialize EPC\n"); 1528 goto err_bar_alloc; 1529 } 1530 1531 epf_set_drvdata(epf, ntb); 1532 1533 pci_space[0] = (ntb->vntb_pid << 16) | ntb->vntb_vid; 1534 pci_vntb_table[0].vendor = ntb->vntb_vid; 1535 pci_vntb_table[0].device = ntb->vntb_pid; 1536 1537 ret = pci_register_driver(&vntb_pci_driver); 1538 if (ret) { 1539 dev_err(dev, "failure register vntb pci driver\n"); 1540 goto err_epc_cleanup; 1541 } 1542 1543 ret = vpci_scan_bus(ntb); 1544 if (ret) 1545 goto err_unregister; 1546 1547 return 0; 1548 1549err_unregister: 1550 pci_unregister_driver(&vntb_pci_driver); 1551err_epc_cleanup: 1552 epf_ntb_epc_cleanup(ntb); 1553err_bar_alloc: 1554 epf_ntb_config_spad_bar_free(ntb); 1555 1556 return ret; 1557} 1558 1559/** 1560 * epf_ntb_unbind() - Cleanup the initialization from epf_ntb_bind() 1561 * @epf: NTB endpoint function device 1562 * 1563 * Cleanup the initialization from epf_ntb_bind() 1564 */ 1565static void epf_ntb_unbind(struct pci_epf *epf) 1566{ 1567 struct epf_ntb *ntb = epf_get_drvdata(epf); 1568 1569 epf_ntb_epc_cleanup(ntb); 1570 epf_ntb_config_spad_bar_free(ntb); 1571 1572 pci_unregister_driver(&vntb_pci_driver); 1573} 1574 1575// EPF driver probe 1576static const struct pci_epf_ops epf_ntb_ops = { 1577 .bind = epf_ntb_bind, 1578 .unbind = epf_ntb_unbind, 1579 .add_cfs = epf_ntb_add_cfs, 1580}; 1581 1582/** 1583 * epf_ntb_probe() - Probe NTB function driver 1584 * @epf: NTB endpoint function device 1585 * @id: NTB endpoint function device ID 1586 * 1587 * Probe NTB function driver when endpoint function bus detects a NTB 1588 * endpoint function. 1589 * 1590 * Returns: Zero for success, or an error code in case of failure 1591 */ 1592static int epf_ntb_probe(struct pci_epf *epf, 1593 const struct pci_epf_device_id *id) 1594{ 1595 struct epf_ntb *ntb; 1596 struct device *dev; 1597 int i; 1598 1599 dev = &epf->dev; 1600 1601 ntb = devm_kzalloc(dev, sizeof(*ntb), GFP_KERNEL); 1602 if (!ntb) 1603 return -ENOMEM; 1604 1605 epf->header = &epf_ntb_header; 1606 ntb->epf = epf; 1607 ntb->vbus_number = 0xff; 1608 1609 /* Initially, no bar is assigned */ 1610 for (i = 0; i < VNTB_BAR_NUM; i++) 1611 ntb->epf_ntb_bar[i] = NO_BAR; 1612 1613 epf_set_drvdata(epf, ntb); 1614 1615 dev_info(dev, "pci-ep epf driver loaded\n"); 1616 return 0; 1617} 1618 1619static const struct pci_epf_device_id epf_ntb_ids[] = { 1620 { 1621 .name = "pci_epf_vntb", 1622 }, 1623 {}, 1624}; 1625 1626static struct pci_epf_driver epf_ntb_driver = { 1627 .driver.name = "pci_epf_vntb", 1628 .probe = epf_ntb_probe, 1629 .id_table = epf_ntb_ids, 1630 .ops = &epf_ntb_ops, 1631 .owner = THIS_MODULE, 1632}; 1633 1634static int __init epf_ntb_init(void) 1635{ 1636 int ret; 1637 1638 kpcintb_workqueue = alloc_workqueue("kpcintb", 1639 WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_PERCPU, 0); 1640 if (!kpcintb_workqueue) { 1641 pr_err("Failed to allocate kpcintb workqueue\n"); 1642 return -ENOMEM; 1643 } 1644 1645 ret = pci_epf_register_driver(&epf_ntb_driver); 1646 if (ret) { 1647 destroy_workqueue(kpcintb_workqueue); 1648 pr_err("Failed to register pci epf ntb driver --> %d\n", ret); 1649 return ret; 1650 } 1651 1652 return 0; 1653} 1654module_init(epf_ntb_init); 1655 1656static void __exit epf_ntb_exit(void) 1657{ 1658 pci_epf_unregister_driver(&epf_ntb_driver); 1659 destroy_workqueue(kpcintb_workqueue); 1660} 1661module_exit(epf_ntb_exit); 1662 1663MODULE_DESCRIPTION("PCI EPF NTB DRIVER"); 1664MODULE_AUTHOR("Frank Li <Frank.li@nxp.com>"); 1665MODULE_LICENSE("GPL v2");
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