core.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Common code for the NVMe target.
   4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
   5 */
   6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   7#include <linux/module.h>
   8#include <linux/random.h>
   9#include <linux/rculist.h>
  10#include <linux/pci-p2pdma.h>
  11#include <linux/scatterlist.h>
  12
  13#include <generated/utsrelease.h>
  14
  15#define CREATE_TRACE_POINTS
  16#include "trace.h"
  17
  18#include "nvmet.h"
  19#include "debugfs.h"
  20
  21struct kmem_cache *nvmet_bvec_cache;
  22struct workqueue_struct *buffered_io_wq;
  23struct workqueue_struct *zbd_wq;
  24static const struct nvmet_fabrics_ops *nvmet_transports[NVMF_TRTYPE_MAX];
  25static DEFINE_IDA(cntlid_ida);
  26
  27struct workqueue_struct *nvmet_wq;
  28EXPORT_SYMBOL_GPL(nvmet_wq);
  29struct workqueue_struct *nvmet_aen_wq;
  30EXPORT_SYMBOL_GPL(nvmet_aen_wq);
  31
  32/*
  33 * This read/write semaphore is used to synchronize access to configuration
  34 * information on a target system that will result in discovery log page
  35 * information change for at least one host.
  36 * The full list of resources to protected by this semaphore is:
  37 *
  38 *  - subsystems list
  39 *  - per-subsystem allowed hosts list
  40 *  - allow_any_host subsystem attribute
  41 *  - nvmet_genctr
  42 *  - the nvmet_transports array
  43 *
  44 * When updating any of those lists/structures write lock should be obtained,
  45 * while when reading (populating discovery log page or checking host-subsystem
  46 * link) read lock is obtained to allow concurrent reads.
  47 */
  48DECLARE_RWSEM(nvmet_config_sem);
  49
  50u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1];
  51u64 nvmet_ana_chgcnt;
  52DECLARE_RWSEM(nvmet_ana_sem);
  53
  54inline u16 errno_to_nvme_status(struct nvmet_req *req, int errno)
  55{
  56	switch (errno) {
  57	case 0:
  58		return NVME_SC_SUCCESS;
  59	case -ENOSPC:
  60		req->error_loc = offsetof(struct nvme_rw_command, length);
  61		return NVME_SC_CAP_EXCEEDED | NVME_STATUS_DNR;
  62	case -EREMOTEIO:
  63		req->error_loc = offsetof(struct nvme_rw_command, slba);
  64		return  NVME_SC_LBA_RANGE | NVME_STATUS_DNR;
  65	case -EOPNOTSUPP:
  66		req->error_loc = offsetof(struct nvme_common_command, opcode);
  67		return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR;
  68	case -ENODATA:
  69		req->error_loc = offsetof(struct nvme_rw_command, nsid);
  70		return NVME_SC_ACCESS_DENIED;
  71	case -EIO:
  72		fallthrough;
  73	default:
  74		req->error_loc = offsetof(struct nvme_common_command, opcode);
  75		return NVME_SC_INTERNAL | NVME_STATUS_DNR;
  76	}
  77}
  78
  79u16 nvmet_report_invalid_opcode(struct nvmet_req *req)
  80{
  81	pr_debug("unhandled cmd %d on qid %d\n", req->cmd->common.opcode,
  82		 req->sq->qid);
  83
  84	req->error_loc = offsetof(struct nvme_common_command, opcode);
  85	return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR;
  86}
  87
  88static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port,
  89		const char *subsysnqn);
  90
  91u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf,
  92		size_t len)
  93{
  94	if (sg_pcopy_from_buffer(req->sg, req->sg_cnt, buf, len, off) != len) {
  95		req->error_loc = offsetof(struct nvme_common_command, dptr);
  96		return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR;
  97	}
  98	return 0;
  99}
 100
 101u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, size_t len)
 102{
 103	if (sg_pcopy_to_buffer(req->sg, req->sg_cnt, buf, len, off) != len) {
 104		req->error_loc = offsetof(struct nvme_common_command, dptr);
 105		return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR;
 106	}
 107	return 0;
 108}
 109
 110u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len)
 111{
 112	if (sg_zero_buffer(req->sg, req->sg_cnt, len, off) != len) {
 113		req->error_loc = offsetof(struct nvme_common_command, dptr);
 114		return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR;
 115	}
 116	return 0;
 117}
 118
 119static u32 nvmet_max_nsid(struct nvmet_subsys *subsys)
 120{
 121	struct nvmet_ns *cur;
 122	unsigned long idx;
 123	u32 nsid = 0;
 124
 125	nvmet_for_each_enabled_ns(&subsys->namespaces, idx, cur)
 126		nsid = cur->nsid;
 127
 128	return nsid;
 129}
 130
 131static u32 nvmet_async_event_result(struct nvmet_async_event *aen)
 132{
 133	return aen->event_type | (aen->event_info << 8) | (aen->log_page << 16);
 134}
 135
 136static void nvmet_async_events_failall(struct nvmet_ctrl *ctrl)
 137{
 138	struct nvmet_req *req;
 139
 140	mutex_lock(&ctrl->lock);
 141	while (ctrl->nr_async_event_cmds) {
 142		req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds];
 143		mutex_unlock(&ctrl->lock);
 144		nvmet_req_complete(req, NVME_SC_INTERNAL | NVME_STATUS_DNR);
 145		mutex_lock(&ctrl->lock);
 146	}
 147	mutex_unlock(&ctrl->lock);
 148}
 149
 150static void nvmet_async_events_process(struct nvmet_ctrl *ctrl)
 151{
 152	struct nvmet_async_event *aen;
 153	struct nvmet_req *req;
 154
 155	mutex_lock(&ctrl->lock);
 156	while (ctrl->nr_async_event_cmds && !list_empty(&ctrl->async_events)) {
 157		aen = list_first_entry(&ctrl->async_events,
 158				       struct nvmet_async_event, entry);
 159		req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds];
 160		nvmet_set_result(req, nvmet_async_event_result(aen));
 161
 162		list_del(&aen->entry);
 163		kfree(aen);
 164
 165		mutex_unlock(&ctrl->lock);
 166		trace_nvmet_async_event(ctrl, req->cqe->result.u32);
 167		nvmet_req_complete(req, 0);
 168		mutex_lock(&ctrl->lock);
 169	}
 170	mutex_unlock(&ctrl->lock);
 171}
 172
 173static void nvmet_async_events_free(struct nvmet_ctrl *ctrl)
 174{
 175	struct nvmet_async_event *aen, *tmp;
 176
 177	mutex_lock(&ctrl->lock);
 178	list_for_each_entry_safe(aen, tmp, &ctrl->async_events, entry) {
 179		list_del(&aen->entry);
 180		kfree(aen);
 181	}
 182	mutex_unlock(&ctrl->lock);
 183}
 184
 185static void nvmet_async_event_work(struct work_struct *work)
 186{
 187	struct nvmet_ctrl *ctrl =
 188		container_of(work, struct nvmet_ctrl, async_event_work);
 189
 190	nvmet_async_events_process(ctrl);
 191}
 192
 193void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type,
 194		u8 event_info, u8 log_page)
 195{
 196	struct nvmet_async_event *aen;
 197
 198	aen = kmalloc(sizeof(*aen), GFP_KERNEL);
 199	if (!aen)
 200		return;
 201
 202	aen->event_type = event_type;
 203	aen->event_info = event_info;
 204	aen->log_page = log_page;
 205
 206	mutex_lock(&ctrl->lock);
 207	list_add_tail(&aen->entry, &ctrl->async_events);
 208	mutex_unlock(&ctrl->lock);
 209
 210	queue_work(nvmet_aen_wq, &ctrl->async_event_work);
 211}
 212
 213static void nvmet_add_to_changed_ns_log(struct nvmet_ctrl *ctrl, __le32 nsid)
 214{
 215	u32 i;
 216
 217	mutex_lock(&ctrl->lock);
 218	if (ctrl->nr_changed_ns > NVME_MAX_CHANGED_NAMESPACES)
 219		goto out_unlock;
 220
 221	for (i = 0; i < ctrl->nr_changed_ns; i++) {
 222		if (ctrl->changed_ns_list[i] == nsid)
 223			goto out_unlock;
 224	}
 225
 226	if (ctrl->nr_changed_ns == NVME_MAX_CHANGED_NAMESPACES) {
 227		ctrl->changed_ns_list[0] = cpu_to_le32(0xffffffff);
 228		ctrl->nr_changed_ns = U32_MAX;
 229		goto out_unlock;
 230	}
 231
 232	ctrl->changed_ns_list[ctrl->nr_changed_ns++] = nsid;
 233out_unlock:
 234	mutex_unlock(&ctrl->lock);
 235}
 236
 237void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid)
 238{
 239	struct nvmet_ctrl *ctrl;
 240
 241	lockdep_assert_held(&subsys->lock);
 242
 243	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
 244		nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid));
 245		if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR))
 246			continue;
 247		nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
 248				NVME_AER_NOTICE_NS_CHANGED,
 249				NVME_LOG_CHANGED_NS);
 250	}
 251}
 252
 253void nvmet_send_ana_event(struct nvmet_subsys *subsys,
 254		struct nvmet_port *port)
 255{
 256	struct nvmet_ctrl *ctrl;
 257
 258	mutex_lock(&subsys->lock);
 259	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
 260		if (port && ctrl->port != port)
 261			continue;
 262		if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE))
 263			continue;
 264		nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
 265				NVME_AER_NOTICE_ANA, NVME_LOG_ANA);
 266	}
 267	mutex_unlock(&subsys->lock);
 268}
 269
 270void nvmet_port_send_ana_event(struct nvmet_port *port)
 271{
 272	struct nvmet_subsys_link *p;
 273
 274	down_read(&nvmet_config_sem);
 275	list_for_each_entry(p, &port->subsystems, entry)
 276		nvmet_send_ana_event(p->subsys, port);
 277	up_read(&nvmet_config_sem);
 278}
 279
 280int nvmet_register_transport(const struct nvmet_fabrics_ops *ops)
 281{
 282	int ret = 0;
 283
 284	down_write(&nvmet_config_sem);
 285	if (nvmet_transports[ops->type])
 286		ret = -EINVAL;
 287	else
 288		nvmet_transports[ops->type] = ops;
 289	up_write(&nvmet_config_sem);
 290
 291	return ret;
 292}
 293EXPORT_SYMBOL_GPL(nvmet_register_transport);
 294
 295void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops)
 296{
 297	down_write(&nvmet_config_sem);
 298	nvmet_transports[ops->type] = NULL;
 299	up_write(&nvmet_config_sem);
 300}
 301EXPORT_SYMBOL_GPL(nvmet_unregister_transport);
 302
 303void nvmet_port_del_ctrls(struct nvmet_port *port, struct nvmet_subsys *subsys)
 304{
 305	struct nvmet_ctrl *ctrl;
 306
 307	mutex_lock(&subsys->lock);
 308	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
 309		if (ctrl->port == port)
 310			ctrl->ops->delete_ctrl(ctrl);
 311	}
 312	mutex_unlock(&subsys->lock);
 313}
 314
 315int nvmet_enable_port(struct nvmet_port *port)
 316{
 317	const struct nvmet_fabrics_ops *ops;
 318	int ret;
 319
 320	lockdep_assert_held(&nvmet_config_sem);
 321
 322	if (port->disc_addr.trtype == NVMF_TRTYPE_MAX)
 323		return -EINVAL;
 324
 325	ops = nvmet_transports[port->disc_addr.trtype];
 326	if (!ops) {
 327		up_write(&nvmet_config_sem);
 328		request_module("nvmet-transport-%d", port->disc_addr.trtype);
 329		down_write(&nvmet_config_sem);
 330		ops = nvmet_transports[port->disc_addr.trtype];
 331		if (!ops) {
 332			pr_err("transport type %d not supported\n",
 333				port->disc_addr.trtype);
 334			return -EINVAL;
 335		}
 336	}
 337
 338	if (!try_module_get(ops->owner))
 339		return -EINVAL;
 340
 341	/*
 342	 * If the user requested PI support and the transport isn't pi capable,
 343	 * don't enable the port.
 344	 */
 345	if (port->pi_enable && !(ops->flags & NVMF_METADATA_SUPPORTED)) {
 346		pr_err("T10-PI is not supported by transport type %d\n",
 347		       port->disc_addr.trtype);
 348		ret = -EINVAL;
 349		goto out_put;
 350	}
 351
 352	ret = ops->add_port(port);
 353	if (ret)
 354		goto out_put;
 355
 356	/* If the transport didn't set inline_data_size, then disable it. */
 357	if (port->inline_data_size < 0)
 358		port->inline_data_size = 0;
 359
 360	/*
 361	 * If the transport didn't set the max_queue_size properly, then clamp
 362	 * it to the target limits. Also set default values in case the
 363	 * transport didn't set it at all.
 364	 */
 365	if (port->max_queue_size < 0)
 366		port->max_queue_size = NVMET_MAX_QUEUE_SIZE;
 367	else
 368		port->max_queue_size = clamp_t(int, port->max_queue_size,
 369					       NVMET_MIN_QUEUE_SIZE,
 370					       NVMET_MAX_QUEUE_SIZE);
 371
 372	port->enabled = true;
 373	port->tr_ops = ops;
 374	return 0;
 375
 376out_put:
 377	module_put(ops->owner);
 378	return ret;
 379}
 380
 381void nvmet_disable_port(struct nvmet_port *port)
 382{
 383	const struct nvmet_fabrics_ops *ops;
 384
 385	lockdep_assert_held(&nvmet_config_sem);
 386
 387	port->enabled = false;
 388	port->tr_ops = NULL;
 389
 390	ops = nvmet_transports[port->disc_addr.trtype];
 391	ops->remove_port(port);
 392	module_put(ops->owner);
 393}
 394
 395static void nvmet_keep_alive_timer(struct work_struct *work)
 396{
 397	struct nvmet_ctrl *ctrl = container_of(to_delayed_work(work),
 398			struct nvmet_ctrl, ka_work);
 399	bool reset_tbkas = ctrl->reset_tbkas;
 400
 401	ctrl->reset_tbkas = false;
 402	if (reset_tbkas) {
 403		pr_debug("ctrl %d reschedule traffic based keep-alive timer\n",
 404			ctrl->cntlid);
 405		queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ);
 406		return;
 407	}
 408
 409	pr_err("ctrl %d keep-alive timer (%d seconds) expired!\n",
 410		ctrl->cntlid, ctrl->kato);
 411
 412	nvmet_ctrl_fatal_error(ctrl);
 413}
 414
 415void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl)
 416{
 417	if (unlikely(ctrl->kato == 0))
 418		return;
 419
 420	pr_debug("ctrl %d start keep-alive timer for %d secs\n",
 421		ctrl->cntlid, ctrl->kato);
 422
 423	queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ);
 424}
 425
 426void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl)
 427{
 428	if (unlikely(ctrl->kato == 0))
 429		return;
 430
 431	pr_debug("ctrl %d stop keep-alive\n", ctrl->cntlid);
 432
 433	cancel_delayed_work_sync(&ctrl->ka_work);
 434}
 435
 436u16 nvmet_req_find_ns(struct nvmet_req *req)
 437{
 438	u32 nsid = le32_to_cpu(req->cmd->common.nsid);
 439	struct nvmet_subsys *subsys = nvmet_req_subsys(req);
 440
 441	req->ns = xa_load(&subsys->namespaces, nsid);
 442	if (unlikely(!req->ns || !req->ns->enabled)) {
 443		req->error_loc = offsetof(struct nvme_common_command, nsid);
 444		if (!req->ns) /* ns doesn't exist! */
 445			return NVME_SC_INVALID_NS | NVME_STATUS_DNR;
 446
 447		/* ns exists but it's disabled */
 448		req->ns = NULL;
 449		return NVME_SC_INTERNAL_PATH_ERROR;
 450	}
 451
 452	percpu_ref_get(&req->ns->ref);
 453	return NVME_SC_SUCCESS;
 454}
 455
 456static void nvmet_destroy_namespace(struct percpu_ref *ref)
 457{
 458	struct nvmet_ns *ns = container_of(ref, struct nvmet_ns, ref);
 459
 460	complete(&ns->disable_done);
 461}
 462
 463void nvmet_put_namespace(struct nvmet_ns *ns)
 464{
 465	percpu_ref_put(&ns->ref);
 466}
 467
 468static void nvmet_ns_dev_disable(struct nvmet_ns *ns)
 469{
 470	nvmet_bdev_ns_disable(ns);
 471	nvmet_file_ns_disable(ns);
 472}
 473
 474static int nvmet_p2pmem_ns_enable(struct nvmet_ns *ns)
 475{
 476	int ret;
 477	struct pci_dev *p2p_dev;
 478
 479	if (!ns->use_p2pmem)
 480		return 0;
 481
 482	if (!ns->bdev) {
 483		pr_err("peer-to-peer DMA is not supported by non-block device namespaces\n");
 484		return -EINVAL;
 485	}
 486
 487	if (!blk_queue_pci_p2pdma(ns->bdev->bd_disk->queue)) {
 488		pr_err("peer-to-peer DMA is not supported by the driver of %s\n",
 489		       ns->device_path);
 490		return -EINVAL;
 491	}
 492
 493	if (ns->p2p_dev) {
 494		ret = pci_p2pdma_distance(ns->p2p_dev, nvmet_ns_dev(ns), true);
 495		if (ret < 0)
 496			return -EINVAL;
 497	} else {
 498		/*
 499		 * Right now we just check that there is p2pmem available so
 500		 * we can report an error to the user right away if there
 501		 * is not. We'll find the actual device to use once we
 502		 * setup the controller when the port's device is available.
 503		 */
 504
 505		p2p_dev = pci_p2pmem_find(nvmet_ns_dev(ns));
 506		if (!p2p_dev) {
 507			pr_err("no peer-to-peer memory is available for %s\n",
 508			       ns->device_path);
 509			return -EINVAL;
 510		}
 511
 512		pci_dev_put(p2p_dev);
 513	}
 514
 515	return 0;
 516}
 517
 518static void nvmet_p2pmem_ns_add_p2p(struct nvmet_ctrl *ctrl,
 519				    struct nvmet_ns *ns)
 520{
 521	struct device *clients[2];
 522	struct pci_dev *p2p_dev;
 523	int ret;
 524
 525	lockdep_assert_held(&ctrl->subsys->lock);
 526
 527	if (!ctrl->p2p_client || !ns->use_p2pmem)
 528		return;
 529
 530	if (ns->p2p_dev) {
 531		ret = pci_p2pdma_distance(ns->p2p_dev, ctrl->p2p_client, true);
 532		if (ret < 0)
 533			return;
 534
 535		p2p_dev = pci_dev_get(ns->p2p_dev);
 536	} else {
 537		clients[0] = ctrl->p2p_client;
 538		clients[1] = nvmet_ns_dev(ns);
 539
 540		p2p_dev = pci_p2pmem_find_many(clients, ARRAY_SIZE(clients));
 541		if (!p2p_dev) {
 542			pr_err("no peer-to-peer memory is available that's supported by %s and %s\n",
 543			       dev_name(ctrl->p2p_client), ns->device_path);
 544			return;
 545		}
 546	}
 547
 548	ret = radix_tree_insert(&ctrl->p2p_ns_map, ns->nsid, p2p_dev);
 549	if (ret < 0)
 550		pci_dev_put(p2p_dev);
 551
 552	pr_info("using p2pmem on %s for nsid %d\n", pci_name(p2p_dev),
 553		ns->nsid);
 554}
 555
 556bool nvmet_ns_revalidate(struct nvmet_ns *ns)
 557{
 558	loff_t oldsize = ns->size;
 559
 560	if (ns->bdev)
 561		nvmet_bdev_ns_revalidate(ns);
 562	else
 563		nvmet_file_ns_revalidate(ns);
 564
 565	return oldsize != ns->size;
 566}
 567
 568int nvmet_ns_enable(struct nvmet_ns *ns)
 569{
 570	struct nvmet_subsys *subsys = ns->subsys;
 571	struct nvmet_ctrl *ctrl;
 572	int ret;
 573
 574	mutex_lock(&subsys->lock);
 575	ret = 0;
 576
 577	if (nvmet_is_passthru_subsys(subsys)) {
 578		pr_info("cannot enable both passthru and regular namespaces for a single subsystem");
 579		goto out_unlock;
 580	}
 581
 582	if (ns->enabled)
 583		goto out_unlock;
 584
 585	ret = nvmet_bdev_ns_enable(ns);
 586	if (ret == -ENOTBLK)
 587		ret = nvmet_file_ns_enable(ns);
 588	if (ret)
 589		goto out_unlock;
 590
 591	ret = nvmet_p2pmem_ns_enable(ns);
 592	if (ret)
 593		goto out_dev_disable;
 594
 595	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
 596		nvmet_p2pmem_ns_add_p2p(ctrl, ns);
 597
 598	if (ns->pr.enable) {
 599		ret = nvmet_pr_init_ns(ns);
 600		if (ret)
 601			goto out_dev_put;
 602	}
 603
 604	if (percpu_ref_init(&ns->ref, nvmet_destroy_namespace, 0, GFP_KERNEL))
 605		goto out_pr_exit;
 606
 607	nvmet_ns_changed(subsys, ns->nsid);
 608	ns->enabled = true;
 609	xa_set_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED);
 610	ret = 0;
 611out_unlock:
 612	mutex_unlock(&subsys->lock);
 613	return ret;
 614out_pr_exit:
 615	if (ns->pr.enable)
 616		nvmet_pr_exit_ns(ns);
 617out_dev_put:
 618	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
 619		pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid));
 620out_dev_disable:
 621	nvmet_ns_dev_disable(ns);
 622	goto out_unlock;
 623}
 624
 625void nvmet_ns_disable(struct nvmet_ns *ns)
 626{
 627	struct nvmet_subsys *subsys = ns->subsys;
 628	struct nvmet_ctrl *ctrl;
 629
 630	mutex_lock(&subsys->lock);
 631	if (!ns->enabled)
 632		goto out_unlock;
 633
 634	ns->enabled = false;
 635	xa_clear_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED);
 636
 637	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
 638		pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid));
 639
 640	mutex_unlock(&subsys->lock);
 641
 642	/*
 643	 * Now that we removed the namespaces from the lookup list, we
 644	 * can kill the per_cpu ref and wait for any remaining references
 645	 * to be dropped, as well as a RCU grace period for anyone only
 646	 * using the namespace under rcu_read_lock().  Note that we can't
 647	 * use call_rcu here as we need to ensure the namespaces have
 648	 * been fully destroyed before unloading the module.
 649	 */
 650	percpu_ref_kill(&ns->ref);
 651	synchronize_rcu();
 652	wait_for_completion(&ns->disable_done);
 653	percpu_ref_exit(&ns->ref);
 654
 655	if (ns->pr.enable)
 656		nvmet_pr_exit_ns(ns);
 657
 658	mutex_lock(&subsys->lock);
 659	nvmet_ns_changed(subsys, ns->nsid);
 660	nvmet_ns_dev_disable(ns);
 661out_unlock:
 662	mutex_unlock(&subsys->lock);
 663}
 664
 665void nvmet_ns_free(struct nvmet_ns *ns)
 666{
 667	struct nvmet_subsys *subsys = ns->subsys;
 668
 669	nvmet_ns_disable(ns);
 670
 671	mutex_lock(&subsys->lock);
 672
 673	xa_erase(&subsys->namespaces, ns->nsid);
 674	if (ns->nsid == subsys->max_nsid)
 675		subsys->max_nsid = nvmet_max_nsid(subsys);
 676
 677	subsys->nr_namespaces--;
 678	mutex_unlock(&subsys->lock);
 679
 680	down_write(&nvmet_ana_sem);
 681	nvmet_ana_group_enabled[ns->anagrpid]--;
 682	up_write(&nvmet_ana_sem);
 683
 684	kfree(ns->device_path);
 685	kfree(ns);
 686}
 687
 688struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid)
 689{
 690	struct nvmet_ns *ns;
 691
 692	mutex_lock(&subsys->lock);
 693
 694	if (subsys->nr_namespaces == NVMET_MAX_NAMESPACES)
 695		goto out_unlock;
 696
 697	ns = kzalloc(sizeof(*ns), GFP_KERNEL);
 698	if (!ns)
 699		goto out_unlock;
 700
 701	init_completion(&ns->disable_done);
 702
 703	ns->nsid = nsid;
 704	ns->subsys = subsys;
 705
 706	if (ns->nsid > subsys->max_nsid)
 707		subsys->max_nsid = nsid;
 708
 709	if (xa_insert(&subsys->namespaces, ns->nsid, ns, GFP_KERNEL))
 710		goto out_exit;
 711
 712	subsys->nr_namespaces++;
 713
 714	mutex_unlock(&subsys->lock);
 715
 716	down_write(&nvmet_ana_sem);
 717	ns->anagrpid = NVMET_DEFAULT_ANA_GRPID;
 718	nvmet_ana_group_enabled[ns->anagrpid]++;
 719	up_write(&nvmet_ana_sem);
 720
 721	uuid_gen(&ns->uuid);
 722	ns->buffered_io = false;
 723	ns->csi = NVME_CSI_NVM;
 724
 725	return ns;
 726out_exit:
 727	subsys->max_nsid = nvmet_max_nsid(subsys);
 728	kfree(ns);
 729out_unlock:
 730	mutex_unlock(&subsys->lock);
 731	return NULL;
 732}
 733
 734static void nvmet_update_sq_head(struct nvmet_req *req)
 735{
 736	if (req->sq->size) {
 737		u32 old_sqhd, new_sqhd;
 738
 739		old_sqhd = READ_ONCE(req->sq->sqhd);
 740		do {
 741			new_sqhd = (old_sqhd + 1) % req->sq->size;
 742		} while (!try_cmpxchg(&req->sq->sqhd, &old_sqhd, new_sqhd));
 743	}
 744	req->cqe->sq_head = cpu_to_le16(req->sq->sqhd & 0x0000FFFF);
 745}
 746
 747static void nvmet_set_error(struct nvmet_req *req, u16 status)
 748{
 749	struct nvmet_ctrl *ctrl = req->sq->ctrl;
 750	struct nvme_error_slot *new_error_slot;
 751	unsigned long flags;
 752
 753	req->cqe->status = cpu_to_le16(status << 1);
 754
 755	if (!ctrl || req->error_loc == NVMET_NO_ERROR_LOC)
 756		return;
 757
 758	spin_lock_irqsave(&ctrl->error_lock, flags);
 759	ctrl->err_counter++;
 760	new_error_slot =
 761		&ctrl->slots[ctrl->err_counter % NVMET_ERROR_LOG_SLOTS];
 762
 763	new_error_slot->error_count = cpu_to_le64(ctrl->err_counter);
 764	new_error_slot->sqid = cpu_to_le16(req->sq->qid);
 765	new_error_slot->cmdid = cpu_to_le16(req->cmd->common.command_id);
 766	new_error_slot->status_field = cpu_to_le16(status << 1);
 767	new_error_slot->param_error_location = cpu_to_le16(req->error_loc);
 768	new_error_slot->lba = cpu_to_le64(req->error_slba);
 769	new_error_slot->nsid = req->cmd->common.nsid;
 770	spin_unlock_irqrestore(&ctrl->error_lock, flags);
 771
 772	/* set the more bit for this request */
 773	req->cqe->status |= cpu_to_le16(1 << 14);
 774}
 775
 776static void __nvmet_req_complete(struct nvmet_req *req, u16 status)
 777{
 778	struct nvmet_ns *ns = req->ns;
 779	struct nvmet_pr_per_ctrl_ref *pc_ref = req->pc_ref;
 780
 781	if (!req->sq->sqhd_disabled)
 782		nvmet_update_sq_head(req);
 783	req->cqe->sq_id = cpu_to_le16(req->sq->qid);
 784	req->cqe->command_id = req->cmd->common.command_id;
 785
 786	if (unlikely(status))
 787		nvmet_set_error(req, status);
 788
 789	trace_nvmet_req_complete(req);
 790
 791	req->ops->queue_response(req);
 792
 793	if (pc_ref)
 794		nvmet_pr_put_ns_pc_ref(pc_ref);
 795	if (ns)
 796		nvmet_put_namespace(ns);
 797}
 798
 799void nvmet_req_complete(struct nvmet_req *req, u16 status)
 800{
 801	struct nvmet_sq *sq = req->sq;
 802
 803	__nvmet_req_complete(req, status);
 804	percpu_ref_put(&sq->ref);
 805}
 806EXPORT_SYMBOL_GPL(nvmet_req_complete);
 807
 808void nvmet_cq_init(struct nvmet_cq *cq)
 809{
 810	refcount_set(&cq->ref, 1);
 811}
 812EXPORT_SYMBOL_GPL(nvmet_cq_init);
 813
 814bool nvmet_cq_get(struct nvmet_cq *cq)
 815{
 816	return refcount_inc_not_zero(&cq->ref);
 817}
 818EXPORT_SYMBOL_GPL(nvmet_cq_get);
 819
 820void nvmet_cq_put(struct nvmet_cq *cq)
 821{
 822	if (refcount_dec_and_test(&cq->ref))
 823		nvmet_cq_destroy(cq);
 824}
 825EXPORT_SYMBOL_GPL(nvmet_cq_put);
 826
 827void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq,
 828		u16 qid, u16 size)
 829{
 830	cq->qid = qid;
 831	cq->size = size;
 832
 833	ctrl->cqs[qid] = cq;
 834}
 835
 836void nvmet_cq_destroy(struct nvmet_cq *cq)
 837{
 838	struct nvmet_ctrl *ctrl = cq->ctrl;
 839
 840	if (ctrl) {
 841		ctrl->cqs[cq->qid] = NULL;
 842		nvmet_ctrl_put(cq->ctrl);
 843		cq->ctrl = NULL;
 844	}
 845}
 846
 847void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq,
 848		u16 qid, u16 size)
 849{
 850	sq->sqhd = 0;
 851	sq->qid = qid;
 852	sq->size = size;
 853
 854	ctrl->sqs[qid] = sq;
 855}
 856
 857static void nvmet_confirm_sq(struct percpu_ref *ref)
 858{
 859	struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref);
 860
 861	complete(&sq->confirm_done);
 862}
 863
 864u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create)
 865{
 866	if (!ctrl->cqs)
 867		return NVME_SC_INTERNAL | NVME_STATUS_DNR;
 868
 869	if (cqid > ctrl->subsys->max_qid)
 870		return NVME_SC_QID_INVALID | NVME_STATUS_DNR;
 871
 872	if ((create && ctrl->cqs[cqid]) || (!create && !ctrl->cqs[cqid]))
 873		return NVME_SC_QID_INVALID | NVME_STATUS_DNR;
 874
 875	return NVME_SC_SUCCESS;
 876}
 877
 878u16 nvmet_check_io_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create)
 879{
 880	if (!cqid)
 881		return NVME_SC_QID_INVALID | NVME_STATUS_DNR;
 882	return nvmet_check_cqid(ctrl, cqid, create);
 883}
 884
 885bool nvmet_cq_in_use(struct nvmet_cq *cq)
 886{
 887	return refcount_read(&cq->ref) > 1;
 888}
 889EXPORT_SYMBOL_GPL(nvmet_cq_in_use);
 890
 891u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq,
 892		    u16 qid, u16 size)
 893{
 894	u16 status;
 895
 896	status = nvmet_check_cqid(ctrl, qid, true);
 897	if (status != NVME_SC_SUCCESS)
 898		return status;
 899
 900	if (!kref_get_unless_zero(&ctrl->ref))
 901		return NVME_SC_INTERNAL | NVME_STATUS_DNR;
 902	cq->ctrl = ctrl;
 903
 904	nvmet_cq_init(cq);
 905	nvmet_cq_setup(ctrl, cq, qid, size);
 906
 907	return NVME_SC_SUCCESS;
 908}
 909EXPORT_SYMBOL_GPL(nvmet_cq_create);
 910
 911u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid,
 912		     bool create)
 913{
 914	if (!ctrl->sqs)
 915		return NVME_SC_INTERNAL | NVME_STATUS_DNR;
 916
 917	if (sqid > ctrl->subsys->max_qid)
 918		return NVME_SC_QID_INVALID | NVME_STATUS_DNR;
 919
 920	if ((create && ctrl->sqs[sqid]) ||
 921	    (!create && !ctrl->sqs[sqid]))
 922		return NVME_SC_QID_INVALID | NVME_STATUS_DNR;
 923
 924	return NVME_SC_SUCCESS;
 925}
 926
 927u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq,
 928		    struct nvmet_cq *cq, u16 sqid, u16 size)
 929{
 930	u16 status;
 931	int ret;
 932
 933	if (!kref_get_unless_zero(&ctrl->ref))
 934		return NVME_SC_INTERNAL | NVME_STATUS_DNR;
 935
 936	status = nvmet_check_sqid(ctrl, sqid, true);
 937	if (status != NVME_SC_SUCCESS)
 938		return status;
 939
 940	ret = nvmet_sq_init(sq, cq);
 941	if (ret) {
 942		status = NVME_SC_INTERNAL | NVME_STATUS_DNR;
 943		goto ctrl_put;
 944	}
 945
 946	nvmet_sq_setup(ctrl, sq, sqid, size);
 947	sq->ctrl = ctrl;
 948
 949	return NVME_SC_SUCCESS;
 950
 951ctrl_put:
 952	nvmet_ctrl_put(ctrl);
 953	return status;
 954}
 955EXPORT_SYMBOL_GPL(nvmet_sq_create);
 956
 957void nvmet_sq_destroy(struct nvmet_sq *sq)
 958{
 959	struct nvmet_ctrl *ctrl = sq->ctrl;
 960
 961	/*
 962	 * If this is the admin queue, complete all AERs so that our
 963	 * queue doesn't have outstanding requests on it.
 964	 */
 965	if (ctrl && ctrl->sqs && ctrl->sqs[0] == sq)
 966		nvmet_async_events_failall(ctrl);
 967	percpu_ref_kill_and_confirm(&sq->ref, nvmet_confirm_sq);
 968	wait_for_completion(&sq->confirm_done);
 969	wait_for_completion(&sq->free_done);
 970	percpu_ref_exit(&sq->ref);
 971	nvmet_auth_sq_free(sq);
 972	nvmet_cq_put(sq->cq);
 973
 974	/*
 975	 * we must reference the ctrl again after waiting for inflight IO
 976	 * to complete. Because admin connect may have sneaked in after we
 977	 * store sq->ctrl locally, but before we killed the percpu_ref. the
 978	 * admin connect allocates and assigns sq->ctrl, which now needs a
 979	 * final ref put, as this ctrl is going away.
 980	 */
 981	ctrl = sq->ctrl;
 982
 983	if (ctrl) {
 984		/*
 985		 * The teardown flow may take some time, and the host may not
 986		 * send us keep-alive during this period, hence reset the
 987		 * traffic based keep-alive timer so we don't trigger a
 988		 * controller teardown as a result of a keep-alive expiration.
 989		 */
 990		ctrl->reset_tbkas = true;
 991		sq->ctrl->sqs[sq->qid] = NULL;
 992		nvmet_ctrl_put(ctrl);
 993		sq->ctrl = NULL; /* allows reusing the queue later */
 994	}
 995}
 996EXPORT_SYMBOL_GPL(nvmet_sq_destroy);
 997
 998static void nvmet_sq_free(struct percpu_ref *ref)
 999{
1000	struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref);
1001
1002	complete(&sq->free_done);
1003}
1004
1005int nvmet_sq_init(struct nvmet_sq *sq, struct nvmet_cq *cq)
1006{
1007	int ret;
1008
1009	if (!nvmet_cq_get(cq))
1010		return -EINVAL;
1011
1012	ret = percpu_ref_init(&sq->ref, nvmet_sq_free, 0, GFP_KERNEL);
1013	if (ret) {
1014		pr_err("percpu_ref init failed!\n");
1015		nvmet_cq_put(cq);
1016		return ret;
1017	}
1018	init_completion(&sq->free_done);
1019	init_completion(&sq->confirm_done);
1020	nvmet_auth_sq_init(sq);
1021	sq->cq = cq;
1022
1023	return 0;
1024}
1025EXPORT_SYMBOL_GPL(nvmet_sq_init);
1026
1027static inline u16 nvmet_check_ana_state(struct nvmet_port *port,
1028		struct nvmet_ns *ns)
1029{
1030	enum nvme_ana_state state = port->ana_state[ns->anagrpid];
1031
1032	if (unlikely(state == NVME_ANA_INACCESSIBLE))
1033		return NVME_SC_ANA_INACCESSIBLE;
1034	if (unlikely(state == NVME_ANA_PERSISTENT_LOSS))
1035		return NVME_SC_ANA_PERSISTENT_LOSS;
1036	if (unlikely(state == NVME_ANA_CHANGE))
1037		return NVME_SC_ANA_TRANSITION;
1038	return 0;
1039}
1040
1041static inline u16 nvmet_io_cmd_check_access(struct nvmet_req *req)
1042{
1043	if (unlikely(req->ns->readonly)) {
1044		switch (req->cmd->common.opcode) {
1045		case nvme_cmd_read:
1046		case nvme_cmd_flush:
1047			break;
1048		default:
1049			return NVME_SC_NS_WRITE_PROTECTED;
1050		}
1051	}
1052
1053	return 0;
1054}
1055
1056static u32 nvmet_io_cmd_transfer_len(struct nvmet_req *req)
1057{
1058	struct nvme_command *cmd = req->cmd;
1059	u32 metadata_len = 0;
1060
1061	if (nvme_is_fabrics(cmd))
1062		return nvmet_fabrics_io_cmd_data_len(req);
1063
1064	if (!req->ns)
1065		return 0;
1066
1067	switch (req->cmd->common.opcode) {
1068	case nvme_cmd_read:
1069	case nvme_cmd_write:
1070	case nvme_cmd_zone_append:
1071		if (req->sq->ctrl->pi_support && nvmet_ns_has_pi(req->ns))
1072			metadata_len = nvmet_rw_metadata_len(req);
1073		return nvmet_rw_data_len(req) + metadata_len;
1074	case nvme_cmd_dsm:
1075		return nvmet_dsm_len(req);
1076	case nvme_cmd_zone_mgmt_recv:
1077		return (le32_to_cpu(req->cmd->zmr.numd) + 1) << 2;
1078	default:
1079		return 0;
1080	}
1081}
1082
1083static u16 nvmet_parse_io_cmd(struct nvmet_req *req)
1084{
1085	struct nvme_command *cmd = req->cmd;
1086	u16 ret;
1087
1088	if (nvme_is_fabrics(cmd))
1089		return nvmet_parse_fabrics_io_cmd(req);
1090
1091	if (unlikely(!nvmet_check_auth_status(req)))
1092		return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR;
1093
1094	ret = nvmet_check_ctrl_status(req);
1095	if (unlikely(ret))
1096		return ret;
1097
1098	if (nvmet_is_passthru_req(req))
1099		return nvmet_parse_passthru_io_cmd(req);
1100
1101	ret = nvmet_req_find_ns(req);
1102	if (unlikely(ret))
1103		return ret;
1104
1105	ret = nvmet_check_ana_state(req->port, req->ns);
1106	if (unlikely(ret)) {
1107		req->error_loc = offsetof(struct nvme_common_command, nsid);
1108		return ret;
1109	}
1110	ret = nvmet_io_cmd_check_access(req);
1111	if (unlikely(ret)) {
1112		req->error_loc = offsetof(struct nvme_common_command, nsid);
1113		return ret;
1114	}
1115
1116	if (req->ns->pr.enable) {
1117		ret = nvmet_parse_pr_cmd(req);
1118		if (!ret)
1119			return ret;
1120	}
1121
1122	switch (req->ns->csi) {
1123	case NVME_CSI_NVM:
1124		if (req->ns->file)
1125			ret = nvmet_file_parse_io_cmd(req);
1126		else
1127			ret = nvmet_bdev_parse_io_cmd(req);
1128		break;
1129	case NVME_CSI_ZNS:
1130		if (IS_ENABLED(CONFIG_BLK_DEV_ZONED))
1131			ret = nvmet_bdev_zns_parse_io_cmd(req);
1132		else
1133			ret = NVME_SC_INVALID_IO_CMD_SET;
1134		break;
1135	default:
1136		ret = NVME_SC_INVALID_IO_CMD_SET;
1137	}
1138	if (ret)
1139		return ret;
1140
1141	if (req->ns->pr.enable) {
1142		ret = nvmet_pr_check_cmd_access(req);
1143		if (ret)
1144			return ret;
1145
1146		ret = nvmet_pr_get_ns_pc_ref(req);
1147	}
1148	return ret;
1149}
1150
1151bool nvmet_req_init(struct nvmet_req *req, struct nvmet_sq *sq,
1152		const struct nvmet_fabrics_ops *ops)
1153{
1154	u8 flags = req->cmd->common.flags;
1155	u16 status;
1156
1157	req->cq = sq->cq;
1158	req->sq = sq;
1159	req->ops = ops;
1160	req->sg = NULL;
1161	req->metadata_sg = NULL;
1162	req->sg_cnt = 0;
1163	req->metadata_sg_cnt = 0;
1164	req->transfer_len = 0;
1165	req->metadata_len = 0;
1166	req->cqe->result.u64 = 0;
1167	req->cqe->status = 0;
1168	req->cqe->sq_head = 0;
1169	req->ns = NULL;
1170	req->error_loc = NVMET_NO_ERROR_LOC;
1171	req->error_slba = 0;
1172	req->pc_ref = NULL;
1173
1174	/* no support for fused commands yet */
1175	if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) {
1176		req->error_loc = offsetof(struct nvme_common_command, flags);
1177		status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
1178		goto fail;
1179	}
1180
1181	/*
1182	 * For fabrics, PSDT field shall describe metadata pointer (MPTR) that
1183	 * contains an address of a single contiguous physical buffer that is
1184	 * byte aligned. For PCI controllers, this is optional so not enforced.
1185	 */
1186	if (unlikely((flags & NVME_CMD_SGL_ALL) != NVME_CMD_SGL_METABUF)) {
1187		if (!req->sq->ctrl || !nvmet_is_pci_ctrl(req->sq->ctrl)) {
1188			req->error_loc =
1189				offsetof(struct nvme_common_command, flags);
1190			status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
1191			goto fail;
1192		}
1193	}
1194
1195	if (unlikely(!req->sq->ctrl))
1196		/* will return an error for any non-connect command: */
1197		status = nvmet_parse_connect_cmd(req);
1198	else if (likely(req->sq->qid != 0))
1199		status = nvmet_parse_io_cmd(req);
1200	else
1201		status = nvmet_parse_admin_cmd(req);
1202
1203	if (status)
1204		goto fail;
1205
1206	trace_nvmet_req_init(req, req->cmd);
1207
1208	if (unlikely(!percpu_ref_tryget_live(&sq->ref))) {
1209		status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
1210		goto fail;
1211	}
1212
1213	if (sq->ctrl)
1214		sq->ctrl->reset_tbkas = true;
1215
1216	return true;
1217
1218fail:
1219	__nvmet_req_complete(req, status);
1220	return false;
1221}
1222EXPORT_SYMBOL_GPL(nvmet_req_init);
1223
1224void nvmet_req_uninit(struct nvmet_req *req)
1225{
1226	percpu_ref_put(&req->sq->ref);
1227	if (req->pc_ref)
1228		nvmet_pr_put_ns_pc_ref(req->pc_ref);
1229	if (req->ns)
1230		nvmet_put_namespace(req->ns);
1231}
1232EXPORT_SYMBOL_GPL(nvmet_req_uninit);
1233
1234size_t nvmet_req_transfer_len(struct nvmet_req *req)
1235{
1236	if (likely(req->sq->qid != 0))
1237		return nvmet_io_cmd_transfer_len(req);
1238	if (unlikely(!req->sq->ctrl))
1239		return nvmet_connect_cmd_data_len(req);
1240	return nvmet_admin_cmd_data_len(req);
1241}
1242EXPORT_SYMBOL_GPL(nvmet_req_transfer_len);
1243
1244bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len)
1245{
1246	if (unlikely(len != req->transfer_len)) {
1247		u16 status;
1248
1249		req->error_loc = offsetof(struct nvme_common_command, dptr);
1250		if (req->cmd->common.flags & NVME_CMD_SGL_ALL)
1251			status = NVME_SC_SGL_INVALID_DATA;
1252		else
1253			status = NVME_SC_INVALID_FIELD;
1254		nvmet_req_complete(req, status | NVME_STATUS_DNR);
1255		return false;
1256	}
1257
1258	return true;
1259}
1260EXPORT_SYMBOL_GPL(nvmet_check_transfer_len);
1261
1262bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len)
1263{
1264	if (unlikely(data_len > req->transfer_len)) {
1265		u16 status;
1266
1267		req->error_loc = offsetof(struct nvme_common_command, dptr);
1268		if (req->cmd->common.flags & NVME_CMD_SGL_ALL)
1269			status = NVME_SC_SGL_INVALID_DATA;
1270		else
1271			status = NVME_SC_INVALID_FIELD;
1272		nvmet_req_complete(req, status | NVME_STATUS_DNR);
1273		return false;
1274	}
1275
1276	return true;
1277}
1278
1279static unsigned int nvmet_data_transfer_len(struct nvmet_req *req)
1280{
1281	return req->transfer_len - req->metadata_len;
1282}
1283
1284static int nvmet_req_alloc_p2pmem_sgls(struct pci_dev *p2p_dev,
1285		struct nvmet_req *req)
1286{
1287	req->sg = pci_p2pmem_alloc_sgl(p2p_dev, &req->sg_cnt,
1288			nvmet_data_transfer_len(req));
1289	if (!req->sg)
1290		goto out_err;
1291
1292	if (req->metadata_len) {
1293		req->metadata_sg = pci_p2pmem_alloc_sgl(p2p_dev,
1294				&req->metadata_sg_cnt, req->metadata_len);
1295		if (!req->metadata_sg)
1296			goto out_free_sg;
1297	}
1298
1299	req->p2p_dev = p2p_dev;
1300
1301	return 0;
1302out_free_sg:
1303	pci_p2pmem_free_sgl(req->p2p_dev, req->sg);
1304out_err:
1305	return -ENOMEM;
1306}
1307
1308static struct pci_dev *nvmet_req_find_p2p_dev(struct nvmet_req *req)
1309{
1310	if (!IS_ENABLED(CONFIG_PCI_P2PDMA) ||
1311	    !req->sq->ctrl || !req->sq->qid || !req->ns)
1312		return NULL;
1313	return radix_tree_lookup(&req->sq->ctrl->p2p_ns_map, req->ns->nsid);
1314}
1315
1316int nvmet_req_alloc_sgls(struct nvmet_req *req)
1317{
1318	struct pci_dev *p2p_dev = nvmet_req_find_p2p_dev(req);
1319
1320	if (p2p_dev && !nvmet_req_alloc_p2pmem_sgls(p2p_dev, req))
1321		return 0;
1322
1323	req->sg = sgl_alloc(nvmet_data_transfer_len(req), GFP_KERNEL,
1324			    &req->sg_cnt);
1325	if (unlikely(!req->sg))
1326		goto out;
1327
1328	if (req->metadata_len) {
1329		req->metadata_sg = sgl_alloc(req->metadata_len, GFP_KERNEL,
1330					     &req->metadata_sg_cnt);
1331		if (unlikely(!req->metadata_sg))
1332			goto out_free;
1333	}
1334
1335	return 0;
1336out_free:
1337	sgl_free(req->sg);
1338out:
1339	return -ENOMEM;
1340}
1341EXPORT_SYMBOL_GPL(nvmet_req_alloc_sgls);
1342
1343void nvmet_req_free_sgls(struct nvmet_req *req)
1344{
1345	if (req->p2p_dev) {
1346		pci_p2pmem_free_sgl(req->p2p_dev, req->sg);
1347		if (req->metadata_sg)
1348			pci_p2pmem_free_sgl(req->p2p_dev, req->metadata_sg);
1349		req->p2p_dev = NULL;
1350	} else {
1351		sgl_free(req->sg);
1352		if (req->metadata_sg)
1353			sgl_free(req->metadata_sg);
1354	}
1355
1356	req->sg = NULL;
1357	req->metadata_sg = NULL;
1358	req->sg_cnt = 0;
1359	req->metadata_sg_cnt = 0;
1360}
1361EXPORT_SYMBOL_GPL(nvmet_req_free_sgls);
1362
1363static inline bool nvmet_css_supported(u8 cc_css)
1364{
1365	switch (cc_css << NVME_CC_CSS_SHIFT) {
1366	case NVME_CC_CSS_NVM:
1367	case NVME_CC_CSS_CSI:
1368		return true;
1369	default:
1370		return false;
1371	}
1372}
1373
1374static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl)
1375{
1376	lockdep_assert_held(&ctrl->lock);
1377
1378	/*
1379	 * Only I/O controllers should verify iosqes,iocqes.
1380	 * Strictly speaking, the spec says a discovery controller
1381	 * should verify iosqes,iocqes are zeroed, however that
1382	 * would break backwards compatibility, so don't enforce it.
1383	 */
1384	if (!nvmet_is_disc_subsys(ctrl->subsys) &&
1385	    (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES ||
1386	     nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES)) {
1387		ctrl->csts = NVME_CSTS_CFS;
1388		return;
1389	}
1390
1391	if (nvmet_cc_mps(ctrl->cc) != 0 ||
1392	    nvmet_cc_ams(ctrl->cc) != 0 ||
1393	    !nvmet_css_supported(nvmet_cc_css(ctrl->cc))) {
1394		ctrl->csts = NVME_CSTS_CFS;
1395		return;
1396	}
1397
1398	ctrl->csts = NVME_CSTS_RDY;
1399
1400	/*
1401	 * Controllers that are not yet enabled should not really enforce the
1402	 * keep alive timeout, but we still want to track a timeout and cleanup
1403	 * in case a host died before it enabled the controller.  Hence, simply
1404	 * reset the keep alive timer when the controller is enabled.
1405	 */
1406	if (ctrl->kato)
1407		mod_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ);
1408}
1409
1410static void nvmet_clear_ctrl(struct nvmet_ctrl *ctrl)
1411{
1412	lockdep_assert_held(&ctrl->lock);
1413
1414	/* XXX: tear down queues? */
1415	ctrl->csts &= ~NVME_CSTS_RDY;
1416	ctrl->cc = 0;
1417}
1418
1419void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new)
1420{
1421	u32 old;
1422
1423	mutex_lock(&ctrl->lock);
1424	old = ctrl->cc;
1425	ctrl->cc = new;
1426
1427	if (nvmet_cc_en(new) && !nvmet_cc_en(old))
1428		nvmet_start_ctrl(ctrl);
1429	if (!nvmet_cc_en(new) && nvmet_cc_en(old))
1430		nvmet_clear_ctrl(ctrl);
1431	if (nvmet_cc_shn(new) && !nvmet_cc_shn(old)) {
1432		nvmet_clear_ctrl(ctrl);
1433		ctrl->csts |= NVME_CSTS_SHST_CMPLT;
1434	}
1435	if (!nvmet_cc_shn(new) && nvmet_cc_shn(old))
1436		ctrl->csts &= ~NVME_CSTS_SHST_CMPLT;
1437	mutex_unlock(&ctrl->lock);
1438}
1439EXPORT_SYMBOL_GPL(nvmet_update_cc);
1440
1441static void nvmet_init_cap(struct nvmet_ctrl *ctrl)
1442{
1443	/* command sets supported: NVMe command set: */
1444	ctrl->cap = (1ULL << 37);
1445	/* Controller supports one or more I/O Command Sets */
1446	ctrl->cap |= (1ULL << 43);
1447	/* CC.EN timeout in 500msec units: */
1448	ctrl->cap |= (15ULL << 24);
1449	/* maximum queue entries supported: */
1450	if (ctrl->ops->get_max_queue_size)
1451		ctrl->cap |= min_t(u16, ctrl->ops->get_max_queue_size(ctrl),
1452				   ctrl->port->max_queue_size) - 1;
1453	else
1454		ctrl->cap |= ctrl->port->max_queue_size - 1;
1455
1456	if (nvmet_is_passthru_subsys(ctrl->subsys))
1457		nvmet_passthrough_override_cap(ctrl);
1458}
1459
1460struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn,
1461				       const char *hostnqn, u16 cntlid,
1462				       struct nvmet_req *req)
1463{
1464	struct nvmet_ctrl *ctrl = NULL;
1465	struct nvmet_subsys *subsys;
1466
1467	subsys = nvmet_find_get_subsys(req->port, subsysnqn);
1468	if (!subsys) {
1469		pr_warn("connect request for invalid subsystem %s!\n",
1470			subsysnqn);
1471		req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(subsysnqn);
1472		goto out;
1473	}
1474
1475	mutex_lock(&subsys->lock);
1476	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
1477		if (ctrl->cntlid == cntlid) {
1478			if (strncmp(hostnqn, ctrl->hostnqn, NVMF_NQN_SIZE)) {
1479				pr_warn("hostnqn mismatch.\n");
1480				continue;
1481			}
1482			if (!kref_get_unless_zero(&ctrl->ref))
1483				continue;
1484
1485			/* ctrl found */
1486			goto found;
1487		}
1488	}
1489
1490	ctrl = NULL; /* ctrl not found */
1491	pr_warn("could not find controller %d for subsys %s / host %s\n",
1492		cntlid, subsysnqn, hostnqn);
1493	req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(cntlid);
1494
1495found:
1496	mutex_unlock(&subsys->lock);
1497	nvmet_subsys_put(subsys);
1498out:
1499	return ctrl;
1500}
1501
1502u16 nvmet_check_ctrl_status(struct nvmet_req *req)
1503{
1504	if (unlikely(!(req->sq->ctrl->cc & NVME_CC_ENABLE))) {
1505		pr_err("got cmd %d while CC.EN == 0 on qid = %d\n",
1506		       req->cmd->common.opcode, req->sq->qid);
1507		return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR;
1508	}
1509
1510	if (unlikely(!(req->sq->ctrl->csts & NVME_CSTS_RDY))) {
1511		pr_err("got cmd %d while CSTS.RDY == 0 on qid = %d\n",
1512		       req->cmd->common.opcode, req->sq->qid);
1513		return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR;
1514	}
1515
1516	if (unlikely(!nvmet_check_auth_status(req))) {
1517		pr_warn("qid %d not authenticated\n", req->sq->qid);
1518		return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR;
1519	}
1520	return 0;
1521}
1522
1523bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn)
1524{
1525	struct nvmet_host_link *p;
1526
1527	lockdep_assert_held(&nvmet_config_sem);
1528
1529	if (subsys->allow_any_host)
1530		return true;
1531
1532	if (nvmet_is_disc_subsys(subsys)) /* allow all access to disc subsys */
1533		return true;
1534
1535	list_for_each_entry(p, &subsys->hosts, entry) {
1536		if (!strcmp(nvmet_host_name(p->host), hostnqn))
1537			return true;
1538	}
1539
1540	return false;
1541}
1542
1543static void nvmet_setup_p2p_ns_map(struct nvmet_ctrl *ctrl,
1544		struct device *p2p_client)
1545{
1546	struct nvmet_ns *ns;
1547	unsigned long idx;
1548
1549	lockdep_assert_held(&ctrl->subsys->lock);
1550
1551	if (!p2p_client)
1552		return;
1553
1554	ctrl->p2p_client = get_device(p2p_client);
1555
1556	nvmet_for_each_enabled_ns(&ctrl->subsys->namespaces, idx, ns)
1557		nvmet_p2pmem_ns_add_p2p(ctrl, ns);
1558}
1559
1560static void nvmet_release_p2p_ns_map(struct nvmet_ctrl *ctrl)
1561{
1562	struct radix_tree_iter iter;
1563	void __rcu **slot;
1564
1565	lockdep_assert_held(&ctrl->subsys->lock);
1566
1567	radix_tree_for_each_slot(slot, &ctrl->p2p_ns_map, &iter, 0)
1568		pci_dev_put(radix_tree_deref_slot(slot));
1569
1570	put_device(ctrl->p2p_client);
1571}
1572
1573static void nvmet_fatal_error_handler(struct work_struct *work)
1574{
1575	struct nvmet_ctrl *ctrl =
1576			container_of(work, struct nvmet_ctrl, fatal_err_work);
1577
1578	pr_err("ctrl %d fatal error occurred!\n", ctrl->cntlid);
1579	ctrl->ops->delete_ctrl(ctrl);
1580}
1581
1582struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args)
1583{
1584	struct nvmet_subsys *subsys;
1585	struct nvmet_ctrl *ctrl;
1586	u32 kato = args->kato;
1587	u8 dhchap_status;
1588	int ret;
1589
1590	args->status = NVME_SC_CONNECT_INVALID_PARAM | NVME_STATUS_DNR;
1591	subsys = nvmet_find_get_subsys(args->port, args->subsysnqn);
1592	if (!subsys) {
1593		pr_warn("connect request for invalid subsystem %s!\n",
1594			args->subsysnqn);
1595		args->result = IPO_IATTR_CONNECT_DATA(subsysnqn);
1596		args->error_loc = offsetof(struct nvme_common_command, dptr);
1597		return NULL;
1598	}
1599
1600	down_read(&nvmet_config_sem);
1601	if (!nvmet_host_allowed(subsys, args->hostnqn)) {
1602		pr_info("connect by host %s for subsystem %s not allowed\n",
1603			args->hostnqn, args->subsysnqn);
1604		args->result = IPO_IATTR_CONNECT_DATA(hostnqn);
1605		up_read(&nvmet_config_sem);
1606		args->status = NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR;
1607		args->error_loc = offsetof(struct nvme_common_command, dptr);
1608		goto out_put_subsystem;
1609	}
1610	up_read(&nvmet_config_sem);
1611
1612	args->status = NVME_SC_INTERNAL;
1613	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1614	if (!ctrl)
1615		goto out_put_subsystem;
1616	mutex_init(&ctrl->lock);
1617
1618	ctrl->port = args->port;
1619	ctrl->ops = args->ops;
1620
1621#ifdef CONFIG_NVME_TARGET_PASSTHRU
1622	/* By default, set loop targets to clear IDS by default */
1623	if (ctrl->port->disc_addr.trtype == NVMF_TRTYPE_LOOP)
1624		subsys->clear_ids = 1;
1625#endif
1626
1627	INIT_WORK(&ctrl->async_event_work, nvmet_async_event_work);
1628	INIT_LIST_HEAD(&ctrl->async_events);
1629	INIT_RADIX_TREE(&ctrl->p2p_ns_map, GFP_KERNEL);
1630	INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler);
1631	INIT_DELAYED_WORK(&ctrl->ka_work, nvmet_keep_alive_timer);
1632
1633	memcpy(ctrl->hostnqn, args->hostnqn, NVMF_NQN_SIZE);
1634
1635	kref_init(&ctrl->ref);
1636	ctrl->subsys = subsys;
1637	ctrl->pi_support = ctrl->port->pi_enable && ctrl->subsys->pi_support;
1638	nvmet_init_cap(ctrl);
1639	WRITE_ONCE(ctrl->aen_enabled, NVMET_AEN_CFG_OPTIONAL);
1640
1641	ctrl->changed_ns_list = kmalloc_array(NVME_MAX_CHANGED_NAMESPACES,
1642			sizeof(__le32), GFP_KERNEL);
1643	if (!ctrl->changed_ns_list)
1644		goto out_free_ctrl;
1645
1646	ctrl->sqs = kcalloc(subsys->max_qid + 1,
1647			sizeof(struct nvmet_sq *),
1648			GFP_KERNEL);
1649	if (!ctrl->sqs)
1650		goto out_free_changed_ns_list;
1651
1652	ctrl->cqs = kcalloc(subsys->max_qid + 1, sizeof(struct nvmet_cq *),
1653			   GFP_KERNEL);
1654	if (!ctrl->cqs)
1655		goto out_free_sqs;
1656
1657	ret = ida_alloc_range(&cntlid_ida,
1658			     subsys->cntlid_min, subsys->cntlid_max,
1659			     GFP_KERNEL);
1660	if (ret < 0) {
1661		args->status = NVME_SC_CONNECT_CTRL_BUSY | NVME_STATUS_DNR;
1662		goto out_free_cqs;
1663	}
1664	ctrl->cntlid = ret;
1665
1666	/*
1667	 * Discovery controllers may use some arbitrary high value
1668	 * in order to cleanup stale discovery sessions
1669	 */
1670	if (nvmet_is_disc_subsys(ctrl->subsys) && !kato)
1671		kato = NVMET_DISC_KATO_MS;
1672
1673	/* keep-alive timeout in seconds */
1674	ctrl->kato = DIV_ROUND_UP(kato, 1000);
1675
1676	ctrl->err_counter = 0;
1677	spin_lock_init(&ctrl->error_lock);
1678
1679	nvmet_start_keep_alive_timer(ctrl);
1680
1681	mutex_lock(&subsys->lock);
1682	ret = nvmet_ctrl_init_pr(ctrl);
1683	if (ret)
1684		goto init_pr_fail;
1685	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
1686	nvmet_setup_p2p_ns_map(ctrl, args->p2p_client);
1687	nvmet_debugfs_ctrl_setup(ctrl);
1688	mutex_unlock(&subsys->lock);
1689
1690	if (args->hostid)
1691		uuid_copy(&ctrl->hostid, args->hostid);
1692
1693	dhchap_status = nvmet_setup_auth(ctrl, args->sq);
1694	if (dhchap_status) {
1695		pr_err("Failed to setup authentication, dhchap status %u\n",
1696		       dhchap_status);
1697		nvmet_ctrl_put(ctrl);
1698		if (dhchap_status == NVME_AUTH_DHCHAP_FAILURE_FAILED)
1699			args->status =
1700				NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR;
1701		else
1702			args->status = NVME_SC_INTERNAL;
1703		return NULL;
1704	}
1705
1706	args->status = NVME_SC_SUCCESS;
1707
1708	pr_info("Created %s controller %d for subsystem %s for NQN %s%s%s%s.\n",
1709		nvmet_is_disc_subsys(ctrl->subsys) ? "discovery" : "nvm",
1710		ctrl->cntlid, ctrl->subsys->subsysnqn, ctrl->hostnqn,
1711		ctrl->pi_support ? " T10-PI is enabled" : "",
1712		nvmet_has_auth(ctrl, args->sq) ? " with DH-HMAC-CHAP" : "",
1713		nvmet_queue_tls_keyid(args->sq) ? ", TLS" : "");
1714
1715	return ctrl;
1716
1717init_pr_fail:
1718	mutex_unlock(&subsys->lock);
1719	nvmet_stop_keep_alive_timer(ctrl);
1720	ida_free(&cntlid_ida, ctrl->cntlid);
1721out_free_cqs:
1722	kfree(ctrl->cqs);
1723out_free_sqs:
1724	kfree(ctrl->sqs);
1725out_free_changed_ns_list:
1726	kfree(ctrl->changed_ns_list);
1727out_free_ctrl:
1728	kfree(ctrl);
1729out_put_subsystem:
1730	nvmet_subsys_put(subsys);
1731	return NULL;
1732}
1733EXPORT_SYMBOL_GPL(nvmet_alloc_ctrl);
1734
1735static void nvmet_ctrl_free(struct kref *ref)
1736{
1737	struct nvmet_ctrl *ctrl = container_of(ref, struct nvmet_ctrl, ref);
1738	struct nvmet_subsys *subsys = ctrl->subsys;
1739
1740	mutex_lock(&subsys->lock);
1741	nvmet_ctrl_destroy_pr(ctrl);
1742	nvmet_release_p2p_ns_map(ctrl);
1743	list_del(&ctrl->subsys_entry);
1744	mutex_unlock(&subsys->lock);
1745
1746	nvmet_stop_keep_alive_timer(ctrl);
1747
1748	flush_work(&ctrl->async_event_work);
1749	cancel_work_sync(&ctrl->fatal_err_work);
1750
1751	nvmet_destroy_auth(ctrl);
1752
1753	nvmet_debugfs_ctrl_free(ctrl);
1754
1755	ida_free(&cntlid_ida, ctrl->cntlid);
1756
1757	nvmet_async_events_free(ctrl);
1758	kfree(ctrl->sqs);
1759	kfree(ctrl->cqs);
1760	kfree(ctrl->changed_ns_list);
1761	kfree(ctrl);
1762
1763	nvmet_subsys_put(subsys);
1764}
1765
1766void nvmet_ctrl_put(struct nvmet_ctrl *ctrl)
1767{
1768	kref_put(&ctrl->ref, nvmet_ctrl_free);
1769}
1770EXPORT_SYMBOL_GPL(nvmet_ctrl_put);
1771
1772void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl)
1773{
1774	mutex_lock(&ctrl->lock);
1775	if (!(ctrl->csts & NVME_CSTS_CFS)) {
1776		ctrl->csts |= NVME_CSTS_CFS;
1777		queue_work(nvmet_wq, &ctrl->fatal_err_work);
1778	}
1779	mutex_unlock(&ctrl->lock);
1780}
1781EXPORT_SYMBOL_GPL(nvmet_ctrl_fatal_error);
1782
1783ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl,
1784		char *traddr, size_t traddr_len)
1785{
1786	if (!ctrl->ops->host_traddr)
1787		return -EOPNOTSUPP;
1788	return ctrl->ops->host_traddr(ctrl, traddr, traddr_len);
1789}
1790
1791static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port,
1792		const char *subsysnqn)
1793{
1794	struct nvmet_subsys_link *p;
1795
1796	if (!port)
1797		return NULL;
1798
1799	if (!strcmp(NVME_DISC_SUBSYS_NAME, subsysnqn)) {
1800		if (!kref_get_unless_zero(&nvmet_disc_subsys->ref))
1801			return NULL;
1802		return nvmet_disc_subsys;
1803	}
1804
1805	down_read(&nvmet_config_sem);
1806	if (!strncmp(nvmet_disc_subsys->subsysnqn, subsysnqn,
1807				NVMF_NQN_SIZE)) {
1808		if (kref_get_unless_zero(&nvmet_disc_subsys->ref)) {
1809			up_read(&nvmet_config_sem);
1810			return nvmet_disc_subsys;
1811		}
1812	}
1813	list_for_each_entry(p, &port->subsystems, entry) {
1814		if (!strncmp(p->subsys->subsysnqn, subsysnqn,
1815				NVMF_NQN_SIZE)) {
1816			if (!kref_get_unless_zero(&p->subsys->ref))
1817				break;
1818			up_read(&nvmet_config_sem);
1819			return p->subsys;
1820		}
1821	}
1822	up_read(&nvmet_config_sem);
1823	return NULL;
1824}
1825
1826struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn,
1827		enum nvme_subsys_type type)
1828{
1829	struct nvmet_subsys *subsys;
1830	char serial[NVMET_SN_MAX_SIZE / 2];
1831	int ret;
1832
1833	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
1834	if (!subsys)
1835		return ERR_PTR(-ENOMEM);
1836
1837	subsys->ver = NVMET_DEFAULT_VS;
1838	/* generate a random serial number as our controllers are ephemeral: */
1839	get_random_bytes(&serial, sizeof(serial));
1840	bin2hex(subsys->serial, &serial, sizeof(serial));
1841
1842	subsys->model_number = kstrdup(NVMET_DEFAULT_CTRL_MODEL, GFP_KERNEL);
1843	if (!subsys->model_number) {
1844		ret = -ENOMEM;
1845		goto free_subsys;
1846	}
1847
1848	subsys->ieee_oui = 0;
1849
1850	subsys->firmware_rev = kstrndup(UTS_RELEASE, NVMET_FR_MAX_SIZE, GFP_KERNEL);
1851	if (!subsys->firmware_rev) {
1852		ret = -ENOMEM;
1853		goto free_mn;
1854	}
1855
1856	switch (type) {
1857	case NVME_NQN_NVME:
1858		subsys->max_qid = NVMET_NR_QUEUES;
1859		break;
1860	case NVME_NQN_DISC:
1861	case NVME_NQN_CURR:
1862		subsys->max_qid = 0;
1863		break;
1864	default:
1865		pr_err("%s: Unknown Subsystem type - %d\n", __func__, type);
1866		ret = -EINVAL;
1867		goto free_fr;
1868	}
1869	subsys->type = type;
1870	subsys->subsysnqn = kstrndup(subsysnqn, NVMF_NQN_SIZE,
1871			GFP_KERNEL);
1872	if (!subsys->subsysnqn) {
1873		ret = -ENOMEM;
1874		goto free_fr;
1875	}
1876	subsys->cntlid_min = NVME_CNTLID_MIN;
1877	subsys->cntlid_max = NVME_CNTLID_MAX;
1878	kref_init(&subsys->ref);
1879
1880	mutex_init(&subsys->lock);
1881	xa_init(&subsys->namespaces);
1882	INIT_LIST_HEAD(&subsys->ctrls);
1883	INIT_LIST_HEAD(&subsys->hosts);
1884
1885	ret = nvmet_debugfs_subsys_setup(subsys);
1886	if (ret)
1887		goto free_subsysnqn;
1888
1889	return subsys;
1890
1891free_subsysnqn:
1892	kfree(subsys->subsysnqn);
1893free_fr:
1894	kfree(subsys->firmware_rev);
1895free_mn:
1896	kfree(subsys->model_number);
1897free_subsys:
1898	kfree(subsys);
1899	return ERR_PTR(ret);
1900}
1901
1902static void nvmet_subsys_free(struct kref *ref)
1903{
1904	struct nvmet_subsys *subsys =
1905		container_of(ref, struct nvmet_subsys, ref);
1906
1907	WARN_ON_ONCE(!list_empty(&subsys->ctrls));
1908	WARN_ON_ONCE(!list_empty(&subsys->hosts));
1909	WARN_ON_ONCE(!xa_empty(&subsys->namespaces));
1910
1911	nvmet_debugfs_subsys_free(subsys);
1912
1913	xa_destroy(&subsys->namespaces);
1914	nvmet_passthru_subsys_free(subsys);
1915
1916	kfree(subsys->subsysnqn);
1917	kfree(subsys->model_number);
1918	kfree(subsys->firmware_rev);
1919	kfree(subsys);
1920}
1921
1922void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys)
1923{
1924	struct nvmet_ctrl *ctrl;
1925
1926	mutex_lock(&subsys->lock);
1927	list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
1928		ctrl->ops->delete_ctrl(ctrl);
1929	mutex_unlock(&subsys->lock);
1930}
1931
1932void nvmet_subsys_put(struct nvmet_subsys *subsys)
1933{
1934	kref_put(&subsys->ref, nvmet_subsys_free);
1935}
1936
1937static int __init nvmet_init(void)
1938{
1939	int error = -ENOMEM;
1940
1941	nvmet_ana_group_enabled[NVMET_DEFAULT_ANA_GRPID] = 1;
1942
1943	nvmet_bvec_cache = kmem_cache_create("nvmet-bvec",
1944			NVMET_MAX_MPOOL_BVEC * sizeof(struct bio_vec), 0,
1945			SLAB_HWCACHE_ALIGN, NULL);
1946	if (!nvmet_bvec_cache)
1947		return -ENOMEM;
1948
1949	zbd_wq = alloc_workqueue("nvmet-zbd-wq", WQ_MEM_RECLAIM, 0);
1950	if (!zbd_wq)
1951		goto out_destroy_bvec_cache;
1952
1953	buffered_io_wq = alloc_workqueue("nvmet-buffered-io-wq",
1954			WQ_MEM_RECLAIM, 0);
1955	if (!buffered_io_wq)
1956		goto out_free_zbd_work_queue;
1957
1958	nvmet_wq = alloc_workqueue("nvmet-wq",
1959			WQ_MEM_RECLAIM | WQ_UNBOUND | WQ_SYSFS, 0);
1960	if (!nvmet_wq)
1961		goto out_free_buffered_work_queue;
1962
1963	nvmet_aen_wq = alloc_workqueue("nvmet-aen-wq",
1964			WQ_MEM_RECLAIM | WQ_UNBOUND, 0);
1965	if (!nvmet_aen_wq)
1966		goto out_free_nvmet_work_queue;
1967
1968	error = nvmet_init_debugfs();
1969	if (error)
1970		goto out_free_nvmet_aen_work_queue;
1971
1972	error = nvmet_init_discovery();
1973	if (error)
1974		goto out_exit_debugfs;
1975
1976	error = nvmet_init_configfs();
1977	if (error)
1978		goto out_exit_discovery;
1979
1980	return 0;
1981
1982out_exit_discovery:
1983	nvmet_exit_discovery();
1984out_exit_debugfs:
1985	nvmet_exit_debugfs();
1986out_free_nvmet_aen_work_queue:
1987	destroy_workqueue(nvmet_aen_wq);
1988out_free_nvmet_work_queue:
1989	destroy_workqueue(nvmet_wq);
1990out_free_buffered_work_queue:
1991	destroy_workqueue(buffered_io_wq);
1992out_free_zbd_work_queue:
1993	destroy_workqueue(zbd_wq);
1994out_destroy_bvec_cache:
1995	kmem_cache_destroy(nvmet_bvec_cache);
1996	return error;
1997}
1998
1999static void __exit nvmet_exit(void)
2000{
2001	nvmet_exit_configfs();
2002	nvmet_exit_discovery();
2003	nvmet_exit_debugfs();
2004	ida_destroy(&cntlid_ida);
2005	destroy_workqueue(nvmet_aen_wq);
2006	destroy_workqueue(nvmet_wq);
2007	destroy_workqueue(buffered_io_wq);
2008	destroy_workqueue(zbd_wq);
2009	kmem_cache_destroy(nvmet_bvec_cache);
2010
2011	BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_entry) != 1024);
2012	BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_hdr) != 1024);
2013}
2014
2015module_init(nvmet_init);
2016module_exit(nvmet_exit);
2017
2018MODULE_DESCRIPTION("NVMe target core framework");
2019MODULE_LICENSE("GPL v2");