FILE
dev.c
File preview with syntax highlighting.
linux-6.19.14/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Linux device driver for RTL8187 4 * 5 * Copyright 2007 Michael Wu <flamingice@sourmilk.net> 6 * Copyright 2007 Andrea Merello <andrea.merello@gmail.com> 7 * 8 * Based on the r8187 driver, which is: 9 * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al. 10 * 11 * The driver was extended to the RTL8187B in 2008 by: 12 * Herton Ronaldo Krzesinski <herton@mandriva.com.br> 13 * Hin-Tak Leung <htl10@users.sourceforge.net> 14 * Larry Finger <Larry.Finger@lwfinger.net> 15 * 16 * Magic delays and register offsets below are taken from the original 17 * r8187 driver sources. Thanks to Realtek for their support! 18 */ 19 20#include <linux/usb.h> 21#include <linux/slab.h> 22#include <linux/delay.h> 23#include <linux/etherdevice.h> 24#include <linux/eeprom_93cx6.h> 25#include <linux/module.h> 26#include <net/mac80211.h> 27 28#include "rtl8187.h" 29#include "rtl8225.h" 30#ifdef CONFIG_RTL8187_LEDS 31#include "leds.h" 32#endif 33#include "rfkill.h" 34 35MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 36MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>"); 37MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>"); 38MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>"); 39MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); 40MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); 41MODULE_LICENSE("GPL"); 42 43static const struct usb_device_id rtl8187_table[] = { 44 /* Asus */ 45 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, 46 /* Belkin */ 47 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, 48 /* Realtek */ 49 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, 50 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, 51 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, 52 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, 53 /* Surecom */ 54 {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187}, 55 /* Logitech */ 56 {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187}, 57 /* Netgear */ 58 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, 59 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, 60 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, 61 /* HP */ 62 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, 63 /* Sitecom */ 64 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, 65 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, 66 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B}, 67 /* Sphairon Access Systems GmbH */ 68 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, 69 /* Dick Smith Electronics */ 70 {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187}, 71 /* Abocom */ 72 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187}, 73 /* Qcom */ 74 {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187}, 75 /* AirLive */ 76 {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187}, 77 /* Linksys */ 78 {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B}, 79 {} 80}; 81 82MODULE_DEVICE_TABLE(usb, rtl8187_table); 83 84static const struct ieee80211_rate rtl818x_rates[] = { 85 { .bitrate = 10, .hw_value = 0, }, 86 { .bitrate = 20, .hw_value = 1, }, 87 { .bitrate = 55, .hw_value = 2, }, 88 { .bitrate = 110, .hw_value = 3, }, 89 { .bitrate = 60, .hw_value = 4, }, 90 { .bitrate = 90, .hw_value = 5, }, 91 { .bitrate = 120, .hw_value = 6, }, 92 { .bitrate = 180, .hw_value = 7, }, 93 { .bitrate = 240, .hw_value = 8, }, 94 { .bitrate = 360, .hw_value = 9, }, 95 { .bitrate = 480, .hw_value = 10, }, 96 { .bitrate = 540, .hw_value = 11, }, 97}; 98 99static const struct ieee80211_channel rtl818x_channels[] = { 100 { .center_freq = 2412 }, 101 { .center_freq = 2417 }, 102 { .center_freq = 2422 }, 103 { .center_freq = 2427 }, 104 { .center_freq = 2432 }, 105 { .center_freq = 2437 }, 106 { .center_freq = 2442 }, 107 { .center_freq = 2447 }, 108 { .center_freq = 2452 }, 109 { .center_freq = 2457 }, 110 { .center_freq = 2462 }, 111 { .center_freq = 2467 }, 112 { .center_freq = 2472 }, 113 { .center_freq = 2484 }, 114}; 115 116static void rtl8187_iowrite_async_cb(struct urb *urb) 117{ 118 kfree(urb->context); 119} 120 121static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, 122 void *data, u16 len) 123{ 124 struct usb_ctrlrequest *dr; 125 struct urb *urb; 126 struct rtl8187_async_write_data { 127 u8 data[4]; 128 struct usb_ctrlrequest dr; 129 } *buf; 130 int rc; 131 132 buf = kmalloc(sizeof(*buf), GFP_ATOMIC); 133 if (!buf) 134 return; 135 136 urb = usb_alloc_urb(0, GFP_ATOMIC); 137 if (!urb) { 138 kfree(buf); 139 return; 140 } 141 142 dr = &buf->dr; 143 144 dr->bRequestType = RTL8187_REQT_WRITE; 145 dr->bRequest = RTL8187_REQ_SET_REG; 146 dr->wValue = addr; 147 dr->wIndex = 0; 148 dr->wLength = cpu_to_le16(len); 149 150 memcpy(buf, data, len); 151 152 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), 153 (unsigned char *)dr, buf, len, 154 rtl8187_iowrite_async_cb, buf); 155 usb_anchor_urb(urb, &priv->anchored); 156 rc = usb_submit_urb(urb, GFP_ATOMIC); 157 if (rc < 0) { 158 kfree(buf); 159 usb_unanchor_urb(urb); 160 } 161 usb_free_urb(urb); 162} 163 164static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, 165 __le32 *addr, u32 val) 166{ 167 __le32 buf = cpu_to_le32(val); 168 169 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), 170 &buf, sizeof(buf)); 171} 172 173void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) 174{ 175 struct rtl8187_priv *priv = dev->priv; 176 177 data <<= 8; 178 data |= addr | 0x80; 179 180 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); 181 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); 182 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); 183 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); 184} 185 186static void rtl8187_tx_cb(struct urb *urb) 187{ 188 struct sk_buff *skb = (struct sk_buff *)urb->context; 189 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 190 struct ieee80211_hw *hw = info->rate_driver_data[0]; 191 struct rtl8187_priv *priv = hw->priv; 192 193 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : 194 sizeof(struct rtl8187_tx_hdr)); 195 ieee80211_tx_info_clear_status(info); 196 197 if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 198 if (priv->is_rtl8187b) { 199 skb_queue_tail(&priv->b_tx_status.queue, skb); 200 201 /* queue is "full", discard last items */ 202 while (skb_queue_len(&priv->b_tx_status.queue) > 5) { 203 struct sk_buff *old_skb; 204 205 dev_dbg(&priv->udev->dev, 206 "transmit status queue full\n"); 207 208 old_skb = skb_dequeue(&priv->b_tx_status.queue); 209 ieee80211_tx_status_irqsafe(hw, old_skb); 210 } 211 return; 212 } else { 213 info->flags |= IEEE80211_TX_STAT_ACK; 214 } 215 } 216 if (priv->is_rtl8187b) 217 ieee80211_tx_status_irqsafe(hw, skb); 218 else { 219 /* Retry information for the RTI8187 is only available by 220 * reading a register in the device. We are in interrupt mode 221 * here, thus queue the skb and finish on a work queue. */ 222 skb_queue_tail(&priv->b_tx_status.queue, skb); 223 ieee80211_queue_delayed_work(hw, &priv->work, 0); 224 } 225} 226 227static void rtl8187_tx(struct ieee80211_hw *dev, 228 struct ieee80211_tx_control *control, 229 struct sk_buff *skb) 230{ 231 struct rtl8187_priv *priv = dev->priv; 232 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 233 struct ieee80211_hdr *tx_hdr = (struct ieee80211_hdr *)(skb->data); 234 unsigned int ep; 235 void *buf; 236 struct urb *urb; 237 __le16 rts_dur = 0; 238 u32 flags; 239 int rc; 240 241 urb = usb_alloc_urb(0, GFP_ATOMIC); 242 if (!urb) { 243 kfree_skb(skb); 244 return; 245 } 246 247 flags = skb->len; 248 flags |= RTL818X_TX_DESC_FLAG_NO_ENC; 249 250 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; 251 if (ieee80211_has_morefrags(tx_hdr->frame_control)) 252 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; 253 254 /* HW will perform RTS-CTS when only RTS flags is set. 255 * HW will perform CTS-to-self when both RTS and CTS flags are set. 256 * RTS rate and RTS duration will be used also for CTS-to-self. 257 */ 258 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { 259 flags |= RTL818X_TX_DESC_FLAG_RTS; 260 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 261 rts_dur = ieee80211_rts_duration(dev, priv->vif, 262 skb->len, info); 263 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 264 flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS; 265 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 266 rts_dur = ieee80211_ctstoself_duration(dev, priv->vif, 267 skb->len, info); 268 } 269 270 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 271 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 272 priv->seqno += 0x10; 273 tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 274 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 275 } 276 277 if (!priv->is_rtl8187b) { 278 struct rtl8187_tx_hdr *hdr = skb_push(skb, sizeof(*hdr)); 279 hdr->flags = cpu_to_le32(flags); 280 hdr->len = 0; 281 hdr->rts_duration = rts_dur; 282 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); 283 buf = hdr; 284 285 ep = 2; 286 } else { 287 /* fc needs to be calculated before skb_push() */ 288 unsigned int epmap[4] = { 6, 7, 5, 4 }; 289 u16 fc = le16_to_cpu(tx_hdr->frame_control); 290 291 struct rtl8187b_tx_hdr *hdr = skb_push(skb, sizeof(*hdr)); 292 struct ieee80211_rate *txrate = 293 ieee80211_get_tx_rate(dev, info); 294 memset(hdr, 0, sizeof(*hdr)); 295 hdr->flags = cpu_to_le32(flags); 296 hdr->rts_duration = rts_dur; 297 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); 298 hdr->tx_duration = 299 ieee80211_generic_frame_duration(dev, priv->vif, 300 info->band, 301 skb->len, txrate); 302 buf = hdr; 303 304 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) 305 ep = 12; 306 else 307 ep = epmap[skb_get_queue_mapping(skb)]; 308 } 309 310 info->rate_driver_data[0] = dev; 311 info->rate_driver_data[1] = urb; 312 313 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), 314 buf, skb->len, rtl8187_tx_cb, skb); 315 urb->transfer_flags |= URB_ZERO_PACKET; 316 usb_anchor_urb(urb, &priv->anchored); 317 rc = usb_submit_urb(urb, GFP_ATOMIC); 318 if (rc < 0) { 319 usb_unanchor_urb(urb); 320 kfree_skb(skb); 321 } 322 usb_free_urb(urb); 323} 324 325static void rtl8187_rx_cb(struct urb *urb) 326{ 327 struct sk_buff *skb = (struct sk_buff *)urb->context; 328 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; 329 struct ieee80211_hw *dev = info->dev; 330 struct rtl8187_priv *priv = dev->priv; 331 struct ieee80211_rx_status rx_status = { 0 }; 332 int rate, signal; 333 u32 flags; 334 unsigned long f; 335 336 spin_lock_irqsave(&priv->rx_queue.lock, f); 337 __skb_unlink(skb, &priv->rx_queue); 338 spin_unlock_irqrestore(&priv->rx_queue.lock, f); 339 skb_put(skb, urb->actual_length); 340 341 if (unlikely(urb->status)) 342 goto free_skb; 343 344 if (!priv->is_rtl8187b) { 345 struct rtl8187_rx_hdr *hdr; 346 347 if (skb->len < sizeof(struct rtl8187_rx_hdr)) 348 goto free_skb; 349 350 hdr = (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 351 flags = le32_to_cpu(hdr->flags); 352 /* As with the RTL8187B below, the AGC is used to calculate 353 * signal strength. In this case, the scaling 354 * constants are derived from the output of p54usb. 355 */ 356 signal = -4 - ((27 * hdr->agc) >> 6); 357 rx_status.antenna = (hdr->signal >> 7) & 1; 358 rx_status.mactime = le64_to_cpu(hdr->mac_time); 359 } else { 360 struct rtl8187b_rx_hdr *hdr; 361 362 if (skb->len < sizeof(struct rtl8187b_rx_hdr)) 363 goto free_skb; 364 365 hdr = (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 366 /* The Realtek datasheet for the RTL8187B shows that the RX 367 * header contains the following quantities: signal quality, 368 * RSSI, AGC, the received power in dB, and the measured SNR. 369 * In testing, none of these quantities show qualitative 370 * agreement with AP signal strength, except for the AGC, 371 * which is inversely proportional to the strength of the 372 * signal. In the following, the signal strength 373 * is derived from the AGC. The arbitrary scaling constants 374 * are chosen to make the results close to the values obtained 375 * for a BCM4312 using b43 as the driver. The noise is ignored 376 * for now. 377 */ 378 flags = le32_to_cpu(hdr->flags); 379 signal = 14 - hdr->agc / 2; 380 rx_status.antenna = (hdr->rssi >> 7) & 1; 381 rx_status.mactime = le64_to_cpu(hdr->mac_time); 382 } 383 384 rx_status.signal = signal; 385 priv->signal = signal; 386 rate = (flags >> 20) & 0xF; 387 skb_trim(skb, flags & 0x0FFF); 388 rx_status.rate_idx = rate; 389 rx_status.freq = dev->conf.chandef.chan->center_freq; 390 rx_status.band = dev->conf.chandef.chan->band; 391 rx_status.flag |= RX_FLAG_MACTIME_START; 392 if (flags & RTL818X_RX_DESC_FLAG_SPLCP) 393 rx_status.enc_flags |= RX_ENC_FLAG_SHORTPRE; 394 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) 395 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 396 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 397 ieee80211_rx_irqsafe(dev, skb); 398 399 skb = dev_alloc_skb(RTL8187_MAX_RX); 400 if (unlikely(!skb)) { 401 /* TODO check rx queue length and refill *somewhere* */ 402 return; 403 } 404 405 info = (struct rtl8187_rx_info *)skb->cb; 406 info->urb = urb; 407 info->dev = dev; 408 urb->transfer_buffer = skb_tail_pointer(skb); 409 urb->context = skb; 410 skb_queue_tail(&priv->rx_queue, skb); 411 412 usb_anchor_urb(urb, &priv->anchored); 413 if (usb_submit_urb(urb, GFP_ATOMIC)) { 414 usb_unanchor_urb(urb); 415 skb_unlink(skb, &priv->rx_queue); 416 dev_kfree_skb_irq(skb); 417 } 418 return; 419 420free_skb: 421 dev_kfree_skb_irq(skb); 422 return; 423} 424 425static int rtl8187_init_urbs(struct ieee80211_hw *dev) 426{ 427 struct rtl8187_priv *priv = dev->priv; 428 struct urb *entry = NULL; 429 struct sk_buff *skb; 430 struct rtl8187_rx_info *info; 431 int ret = 0; 432 433 while (skb_queue_len(&priv->rx_queue) < 32) { 434 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); 435 if (!skb) { 436 ret = -ENOMEM; 437 goto err; 438 } 439 entry = usb_alloc_urb(0, GFP_KERNEL); 440 if (!entry) { 441 ret = -ENOMEM; 442 goto err; 443 } 444 usb_fill_bulk_urb(entry, priv->udev, 445 usb_rcvbulkpipe(priv->udev, 446 priv->is_rtl8187b ? 3 : 1), 447 skb_tail_pointer(skb), 448 RTL8187_MAX_RX, rtl8187_rx_cb, skb); 449 info = (struct rtl8187_rx_info *)skb->cb; 450 info->urb = entry; 451 info->dev = dev; 452 skb_queue_tail(&priv->rx_queue, skb); 453 usb_anchor_urb(entry, &priv->anchored); 454 ret = usb_submit_urb(entry, GFP_KERNEL); 455 if (ret) { 456 skb_unlink(skb, &priv->rx_queue); 457 usb_unanchor_urb(entry); 458 usb_put_urb(entry); 459 goto err; 460 } 461 usb_put_urb(entry); 462 } 463 return ret; 464 465err: 466 kfree_skb(skb); 467 usb_kill_anchored_urbs(&priv->anchored); 468 return ret; 469} 470 471static void rtl8187b_status_cb(struct urb *urb) 472{ 473 struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context; 474 struct rtl8187_priv *priv = hw->priv; 475 u64 val; 476 unsigned int cmd_type; 477 478 if (unlikely(urb->status)) 479 return; 480 481 /* 482 * Read from status buffer: 483 * 484 * bits [30:31] = cmd type: 485 * - 0 indicates tx beacon interrupt 486 * - 1 indicates tx close descriptor 487 * 488 * In the case of tx beacon interrupt: 489 * [0:9] = Last Beacon CW 490 * [10:29] = reserved 491 * [30:31] = 00b 492 * [32:63] = Last Beacon TSF 493 * 494 * If it's tx close descriptor: 495 * [0:7] = Packet Retry Count 496 * [8:14] = RTS Retry Count 497 * [15] = TOK 498 * [16:27] = Sequence No 499 * [28] = LS 500 * [29] = FS 501 * [30:31] = 01b 502 * [32:47] = unused (reserved?) 503 * [48:63] = MAC Used Time 504 */ 505 val = le64_to_cpu(priv->b_tx_status.buf); 506 507 cmd_type = (val >> 30) & 0x3; 508 if (cmd_type == 1) { 509 unsigned int pkt_rc, seq_no; 510 bool tok; 511 struct sk_buff *skb, *iter; 512 struct ieee80211_hdr *ieee80211hdr; 513 unsigned long flags; 514 515 pkt_rc = val & 0xFF; 516 tok = val & (1 << 15); 517 seq_no = (val >> 16) & 0xFFF; 518 519 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags); 520 skb = NULL; 521 skb_queue_reverse_walk(&priv->b_tx_status.queue, iter) { 522 ieee80211hdr = (struct ieee80211_hdr *)iter->data; 523 524 /* 525 * While testing, it was discovered that the seq_no 526 * doesn't actually contains the sequence number. 527 * Instead of returning just the 12 bits of sequence 528 * number, hardware is returning entire sequence control 529 * (fragment number plus sequence number) in a 12 bit 530 * only field overflowing after some time. As a 531 * workaround, just consider the lower bits, and expect 532 * it's unlikely we wrongly ack some sent data 533 */ 534 if ((le16_to_cpu(ieee80211hdr->seq_ctrl) 535 & 0xFFF) == seq_no) { 536 skb = iter; 537 break; 538 } 539 } 540 if (skb) { 541 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 542 543 __skb_unlink(skb, &priv->b_tx_status.queue); 544 if (tok) 545 info->flags |= IEEE80211_TX_STAT_ACK; 546 info->status.rates[0].count = pkt_rc + 1; 547 548 ieee80211_tx_status_irqsafe(hw, skb); 549 } 550 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags); 551 } 552 553 usb_anchor_urb(urb, &priv->anchored); 554 if (usb_submit_urb(urb, GFP_ATOMIC)) 555 usb_unanchor_urb(urb); 556} 557 558static int rtl8187b_init_status_urb(struct ieee80211_hw *dev) 559{ 560 struct rtl8187_priv *priv = dev->priv; 561 struct urb *entry; 562 int ret = 0; 563 564 entry = usb_alloc_urb(0, GFP_KERNEL); 565 if (!entry) 566 return -ENOMEM; 567 568 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9), 569 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf), 570 rtl8187b_status_cb, dev); 571 572 usb_anchor_urb(entry, &priv->anchored); 573 ret = usb_submit_urb(entry, GFP_KERNEL); 574 if (ret) 575 usb_unanchor_urb(entry); 576 usb_free_urb(entry); 577 578 return ret; 579} 580 581static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon) 582{ 583 u32 anaparam, anaparam2; 584 u8 anaparam3, reg; 585 586 if (!priv->is_rtl8187b) { 587 if (rfon) { 588 anaparam = RTL8187_RTL8225_ANAPARAM_ON; 589 anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON; 590 } else { 591 anaparam = RTL8187_RTL8225_ANAPARAM_OFF; 592 anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF; 593 } 594 } else { 595 if (rfon) { 596 anaparam = RTL8187B_RTL8225_ANAPARAM_ON; 597 anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON; 598 anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON; 599 } else { 600 anaparam = RTL8187B_RTL8225_ANAPARAM_OFF; 601 anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF; 602 anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF; 603 } 604 } 605 606 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 607 RTL818X_EEPROM_CMD_CONFIG); 608 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 609 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; 610 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 611 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam); 612 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2); 613 if (priv->is_rtl8187b) 614 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3); 615 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; 616 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 617 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 618 RTL818X_EEPROM_CMD_NORMAL); 619} 620 621static int rtl8187_cmd_reset(struct ieee80211_hw *dev) 622{ 623 struct rtl8187_priv *priv = dev->priv; 624 u8 reg; 625 int i; 626 627 reg = rtl818x_ioread8(priv, &priv->map->CMD); 628 reg &= (1 << 1); 629 reg |= RTL818X_CMD_RESET; 630 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 631 632 i = 10; 633 do { 634 msleep(2); 635 if (!(rtl818x_ioread8(priv, &priv->map->CMD) & 636 RTL818X_CMD_RESET)) 637 break; 638 } while (--i); 639 640 if (!i) { 641 wiphy_err(dev->wiphy, "Reset timeout!\n"); 642 return -ETIMEDOUT; 643 } 644 645 /* reload registers from eeprom */ 646 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); 647 648 i = 10; 649 do { 650 msleep(4); 651 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & 652 RTL818X_EEPROM_CMD_CONFIG)) 653 break; 654 } while (--i); 655 656 if (!i) { 657 wiphy_err(dev->wiphy, "eeprom reset timeout!\n"); 658 return -ETIMEDOUT; 659 } 660 661 return 0; 662} 663 664static int rtl8187_init_hw(struct ieee80211_hw *dev) 665{ 666 struct rtl8187_priv *priv = dev->priv; 667 u8 reg; 668 int res; 669 670 /* reset */ 671 rtl8187_set_anaparam(priv, true); 672 673 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 674 675 msleep(200); 676 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); 677 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); 678 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); 679 msleep(200); 680 681 res = rtl8187_cmd_reset(dev); 682 if (res) 683 return res; 684 685 rtl8187_set_anaparam(priv, true); 686 687 /* setup card */ 688 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 689 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); 690 691 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 692 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1); 693 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 694 695 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 696 697 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); 698 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 699 reg &= 0x3F; 700 reg |= 0x80; 701 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); 702 703 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 704 705 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); 706 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 707 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0); 708 709 // TODO: set RESP_RATE and BRSR properly 710 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); 711 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 712 713 /* host_usb_init */ 714 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 715 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); 716 reg = rtl818x_ioread8(priv, (u8 *)0xFE53); 717 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); 718 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 719 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20); 720 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 721 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); 722 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); 723 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); 724 msleep(100); 725 726 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); 727 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); 728 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); 729 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 730 RTL818X_EEPROM_CMD_CONFIG); 731 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); 732 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 733 RTL818X_EEPROM_CMD_NORMAL); 734 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); 735 msleep(100); 736 737 priv->rf->init(dev); 738 739 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 740 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; 741 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); 742 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); 743 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); 744 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); 745 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); 746 747 return 0; 748} 749 750static const u8 rtl8187b_reg_table[][3] = { 751 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, 752 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, 753 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, 754 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, 755 756 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, 757 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, 758 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, 759 {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, 760 {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, 761 762 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, 763 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, 764 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, 765 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, 766 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, 767 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, 768 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, 769 770 {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0}, 771 {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, 772 {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, 773 {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, 774 {0xEE, 0x00, 0}, {0x4C, 0x00, 2}, 775 776 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0}, 777 {0x8F, 0x00, 0} 778}; 779 780static int rtl8187b_init_hw(struct ieee80211_hw *dev) 781{ 782 struct rtl8187_priv *priv = dev->priv; 783 int res, i; 784 u8 reg; 785 786 rtl8187_set_anaparam(priv, true); 787 788 /* Reset PLL sequence on 8187B. Realtek note: reduces power 789 * consumption about 30 mA */ 790 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); 791 reg = rtl818x_ioread8(priv, (u8 *)0xFF62); 792 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); 793 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); 794 795 res = rtl8187_cmd_reset(dev); 796 if (res) 797 return res; 798 799 rtl8187_set_anaparam(priv, true); 800 801 /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as 802 * RESP_RATE on 8187L in Realtek sources: each bit should be each 803 * one of the 12 rates, all are enabled */ 804 rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF); 805 806 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 807 reg |= RTL818X_CW_CONF_PERPACKET_RETRY; 808 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 809 810 /* Auto Rate Fallback Register (ARFR): 1M-54M setting */ 811 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); 812 rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1); 813 814 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); 815 816 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 817 RTL818X_EEPROM_CMD_CONFIG); 818 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 819 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); 820 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 821 RTL818X_EEPROM_CMD_NORMAL); 822 823 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 824 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { 825 rtl818x_iowrite8_idx(priv, 826 (u8 *)(uintptr_t) 827 (rtl8187b_reg_table[i][0] | 0xFF00), 828 rtl8187b_reg_table[i][1], 829 rtl8187b_reg_table[i][2]); 830 } 831 832 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); 833 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); 834 835 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); 836 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); 837 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); 838 839 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); 840 841 /* RFSW_CTRL register */ 842 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); 843 844 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); 845 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); 846 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 847 msleep(100); 848 849 priv->rf->init(dev); 850 851 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; 852 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 853 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 854 855 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); 856 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); 857 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); 858 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); 859 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); 860 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); 861 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); 862 863 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); 864 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); 865 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); 866 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); 867 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); 868 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); 869 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); 870 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); 871 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); 872 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); 873 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); 874 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); 875 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); 876 877 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); 878 879 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); 880 881 priv->slot_time = 0x9; 882 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */ 883 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */ 884 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */ 885 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */ 886 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0); 887 888 /* ENEDCA flag must always be set, transmit issues? */ 889 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA); 890 891 return 0; 892} 893 894static void rtl8187_work(struct work_struct *work) 895{ 896 /* The RTL8187 returns the retry count through register 0xFFFA. In 897 * addition, it appears to be a cumulative retry count, not the 898 * value for the current TX packet. When multiple TX entries are 899 * waiting in the queue, the retry count will be the total for all. 900 * The "error" may matter for purposes of rate setting, but there is 901 * no other choice with this hardware. 902 */ 903 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv, 904 work.work); 905 struct ieee80211_tx_info *info; 906 struct ieee80211_hw *dev = priv->dev; 907 static u16 retry; 908 u16 tmp; 909 u16 avg_retry; 910 int length; 911 912 mutex_lock(&priv->conf_mutex); 913 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA); 914 length = skb_queue_len(&priv->b_tx_status.queue); 915 if (unlikely(!length)) 916 length = 1; 917 if (unlikely(tmp < retry)) 918 tmp = retry; 919 avg_retry = (tmp - retry) / length; 920 while (skb_queue_len(&priv->b_tx_status.queue) > 0) { 921 struct sk_buff *old_skb; 922 923 old_skb = skb_dequeue(&priv->b_tx_status.queue); 924 info = IEEE80211_SKB_CB(old_skb); 925 info->status.rates[0].count = avg_retry + 1; 926 if (info->status.rates[0].count > RETRY_COUNT) 927 info->flags &= ~IEEE80211_TX_STAT_ACK; 928 ieee80211_tx_status_irqsafe(dev, old_skb); 929 } 930 retry = tmp; 931 mutex_unlock(&priv->conf_mutex); 932} 933 934static int rtl8187_start(struct ieee80211_hw *dev) 935{ 936 struct rtl8187_priv *priv = dev->priv; 937 u32 reg; 938 int ret; 939 940 mutex_lock(&priv->conf_mutex); 941 942 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : 943 rtl8187b_init_hw(dev); 944 if (ret) 945 goto rtl8187_start_exit; 946 947 init_usb_anchor(&priv->anchored); 948 priv->dev = dev; 949 950 if (priv->is_rtl8187b) { 951 reg = RTL818X_RX_CONF_MGMT | 952 RTL818X_RX_CONF_DATA | 953 RTL818X_RX_CONF_BROADCAST | 954 RTL818X_RX_CONF_NICMAC | 955 RTL818X_RX_CONF_BSSID | 956 (7 << 13 /* RX FIFO threshold NONE */) | 957 (7 << 10 /* MAX RX DMA */) | 958 RTL818X_RX_CONF_RX_AUTORESETPHY | 959 RTL818X_RX_CONF_ONLYERLPKT; 960 priv->rx_conf = reg; 961 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 962 963 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 964 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN; 965 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL; 966 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 967 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 968 969 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 970 RTL818X_TX_CONF_HW_SEQNUM | 971 RTL818X_TX_CONF_DISREQQSIZE | 972 (RETRY_COUNT << 8 /* short retry limit */) | 973 (RETRY_COUNT << 0 /* long retry limit */) | 974 (7 << 21 /* MAX TX DMA */)); 975 ret = rtl8187_init_urbs(dev); 976 if (ret) 977 goto rtl8187_start_exit; 978 ret = rtl8187b_init_status_urb(dev); 979 if (ret) 980 usb_kill_anchored_urbs(&priv->anchored); 981 goto rtl8187_start_exit; 982 } 983 984 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 985 986 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); 987 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); 988 989 ret = rtl8187_init_urbs(dev); 990 if (ret) 991 goto rtl8187_start_exit; 992 993 reg = RTL818X_RX_CONF_ONLYERLPKT | 994 RTL818X_RX_CONF_RX_AUTORESETPHY | 995 RTL818X_RX_CONF_BSSID | 996 RTL818X_RX_CONF_MGMT | 997 RTL818X_RX_CONF_DATA | 998 (7 << 13 /* RX FIFO threshold NONE */) | 999 (7 << 10 /* MAX RX DMA */) | 1000 RTL818X_RX_CONF_BROADCAST | 1001 RTL818X_RX_CONF_NICMAC; 1002 1003 priv->rx_conf = reg; 1004 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 1005 1006 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 1007 reg &= ~RTL818X_CW_CONF_PERPACKET_CW; 1008 reg |= RTL818X_CW_CONF_PERPACKET_RETRY; 1009 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 1010 1011 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 1012 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN; 1013 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL; 1014 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 1015 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 1016 1017 reg = RTL818X_TX_CONF_CW_MIN | 1018 (7 << 21 /* MAX TX DMA */) | 1019 RTL818X_TX_CONF_NO_ICV; 1020 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 1021 1022 reg = rtl818x_ioread8(priv, &priv->map->CMD); 1023 reg |= RTL818X_CMD_TX_ENABLE; 1024 reg |= RTL818X_CMD_RX_ENABLE; 1025 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 1026 INIT_DELAYED_WORK(&priv->work, rtl8187_work); 1027 1028rtl8187_start_exit: 1029 mutex_unlock(&priv->conf_mutex); 1030 return ret; 1031} 1032 1033static void rtl8187_stop(struct ieee80211_hw *dev, bool suspend) 1034{ 1035 struct rtl8187_priv *priv = dev->priv; 1036 struct sk_buff *skb; 1037 u32 reg; 1038 1039 mutex_lock(&priv->conf_mutex); 1040 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 1041 1042 reg = rtl818x_ioread8(priv, &priv->map->CMD); 1043 reg &= ~RTL818X_CMD_TX_ENABLE; 1044 reg &= ~RTL818X_CMD_RX_ENABLE; 1045 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 1046 1047 priv->rf->stop(dev); 1048 rtl8187_set_anaparam(priv, false); 1049 1050 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1051 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); 1052 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); 1053 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1054 1055 usb_kill_anchored_urbs(&priv->anchored); 1056 1057 while ((skb = skb_dequeue(&priv->b_tx_status.queue))) 1058 dev_kfree_skb_any(skb); 1059 1060 mutex_unlock(&priv->conf_mutex); 1061 1062 if (!priv->is_rtl8187b) 1063 cancel_delayed_work_sync(&priv->work); 1064} 1065 1066static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif) 1067{ 1068 struct rtl8187_priv *priv = dev->priv; 1069 1070 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) | 1071 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32; 1072} 1073 1074 1075static void rtl8187_beacon_work(struct work_struct *work) 1076{ 1077 struct rtl8187_vif *vif_priv = 1078 container_of(work, struct rtl8187_vif, beacon_work.work); 1079 struct ieee80211_vif *vif = 1080 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1081 struct ieee80211_hw *dev = vif_priv->dev; 1082 struct ieee80211_mgmt *mgmt; 1083 struct sk_buff *skb; 1084 1085 /* don't overflow the tx ring */ 1086 if (ieee80211_queue_stopped(dev, 0)) 1087 goto resched; 1088 1089 /* grab a fresh beacon */ 1090 skb = ieee80211_beacon_get(dev, vif, 0); 1091 if (!skb) 1092 goto resched; 1093 1094 /* 1095 * update beacon timestamp w/ TSF value 1096 * TODO: make hardware update beacon timestamp 1097 */ 1098 mgmt = (struct ieee80211_mgmt *)skb->data; 1099 mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif)); 1100 1101 /* TODO: use actual beacon queue */ 1102 skb_set_queue_mapping(skb, 0); 1103 1104 rtl8187_tx(dev, NULL, skb); 1105 1106resched: 1107 /* 1108 * schedule next beacon 1109 * TODO: use hardware support for beacon timing 1110 */ 1111 schedule_delayed_work(&vif_priv->beacon_work, 1112 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1113} 1114 1115 1116static int rtl8187_add_interface(struct ieee80211_hw *dev, 1117 struct ieee80211_vif *vif) 1118{ 1119 struct rtl8187_priv *priv = dev->priv; 1120 struct rtl8187_vif *vif_priv; 1121 int i; 1122 int ret = -EOPNOTSUPP; 1123 1124 mutex_lock(&priv->conf_mutex); 1125 if (priv->vif) 1126 goto exit; 1127 1128 switch (vif->type) { 1129 case NL80211_IFTYPE_STATION: 1130 case NL80211_IFTYPE_ADHOC: 1131 break; 1132 default: 1133 goto exit; 1134 } 1135 1136 ret = 0; 1137 priv->vif = vif; 1138 1139 /* Initialize driver private area */ 1140 vif_priv = (struct rtl8187_vif *)&vif->drv_priv; 1141 vif_priv->dev = dev; 1142 INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work); 1143 vif_priv->enable_beacon = false; 1144 1145 1146 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1147 for (i = 0; i < ETH_ALEN; i++) 1148 rtl818x_iowrite8(priv, &priv->map->MAC[i], 1149 ((u8 *)vif->addr)[i]); 1150 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1151 1152exit: 1153 mutex_unlock(&priv->conf_mutex); 1154 return ret; 1155} 1156 1157static void rtl8187_remove_interface(struct ieee80211_hw *dev, 1158 struct ieee80211_vif *vif) 1159{ 1160 struct rtl8187_priv *priv = dev->priv; 1161 mutex_lock(&priv->conf_mutex); 1162 priv->vif = NULL; 1163 mutex_unlock(&priv->conf_mutex); 1164} 1165 1166static int rtl8187_config(struct ieee80211_hw *dev, int radio_idx, u32 changed) 1167{ 1168 struct rtl8187_priv *priv = dev->priv; 1169 struct ieee80211_conf *conf = &dev->conf; 1170 u32 reg; 1171 1172 mutex_lock(&priv->conf_mutex); 1173 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); 1174 /* Enable TX loopback on MAC level to avoid TX during channel 1175 * changes, as this has be seen to causes problems and the 1176 * card will stop work until next reset 1177 */ 1178 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 1179 reg | RTL818X_TX_CONF_LOOPBACK_MAC); 1180 priv->rf->set_chan(dev, conf); 1181 msleep(10); 1182 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 1183 1184 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); 1185 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); 1186 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); 1187 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); 1188 mutex_unlock(&priv->conf_mutex); 1189 return 0; 1190} 1191 1192/* 1193 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for 1194 * example. Thus we have to use raw values for AC_*_PARAM register addresses. 1195 */ 1196static __le32 *rtl8187b_ac_addr[4] = { 1197 (__le32 *) 0xFFF0, /* AC_VO */ 1198 (__le32 *) 0xFFF4, /* AC_VI */ 1199 (__le32 *) 0xFFFC, /* AC_BK */ 1200 (__le32 *) 0xFFF8, /* AC_BE */ 1201}; 1202 1203#define SIFS_TIME 0xa 1204 1205static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot, 1206 bool use_short_preamble) 1207{ 1208 if (priv->is_rtl8187b) { 1209 u8 difs, eifs; 1210 u16 ack_timeout; 1211 int queue; 1212 1213 if (use_short_slot) { 1214 priv->slot_time = 0x9; 1215 difs = 0x1c; 1216 eifs = 0x53; 1217 } else { 1218 priv->slot_time = 0x14; 1219 difs = 0x32; 1220 eifs = 0x5b; 1221 } 1222 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 1223 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); 1224 rtl818x_iowrite8(priv, &priv->map->DIFS, difs); 1225 1226 /* 1227 * BRSR+1 on 8187B is in fact EIFS register 1228 * Value in units of 4 us 1229 */ 1230 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs); 1231 1232 /* 1233 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout 1234 * register. In units of 4 us like eifs register 1235 * ack_timeout = ack duration + plcp + difs + preamble 1236 */ 1237 ack_timeout = 112 + 48 + difs; 1238 if (use_short_preamble) 1239 ack_timeout += 72; 1240 else 1241 ack_timeout += 144; 1242 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 1243 DIV_ROUND_UP(ack_timeout, 4)); 1244 1245 for (queue = 0; queue < 4; queue++) 1246 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue], 1247 priv->aifsn[queue] * priv->slot_time + 1248 SIFS_TIME); 1249 } else { 1250 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 1251 if (use_short_slot) { 1252 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); 1253 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); 1254 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); 1255 } else { 1256 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); 1257 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); 1258 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); 1259 } 1260 } 1261} 1262 1263static void rtl8187_bss_info_changed(struct ieee80211_hw *dev, 1264 struct ieee80211_vif *vif, 1265 struct ieee80211_bss_conf *info, 1266 u64 changed) 1267{ 1268 struct rtl8187_priv *priv = dev->priv; 1269 struct rtl8187_vif *vif_priv; 1270 int i; 1271 u8 reg; 1272 1273 vif_priv = (struct rtl8187_vif *)&vif->drv_priv; 1274 1275 if (changed & BSS_CHANGED_BSSID) { 1276 mutex_lock(&priv->conf_mutex); 1277 for (i = 0; i < ETH_ALEN; i++) 1278 rtl818x_iowrite8(priv, &priv->map->BSSID[i], 1279 info->bssid[i]); 1280 1281 if (priv->is_rtl8187b) 1282 reg = RTL818X_MSR_ENEDCA; 1283 else 1284 reg = 0; 1285 1286 if (is_valid_ether_addr(info->bssid)) { 1287 if (vif->type == NL80211_IFTYPE_ADHOC) 1288 reg |= RTL818X_MSR_ADHOC; 1289 else 1290 reg |= RTL818X_MSR_INFRA; 1291 } 1292 else 1293 reg |= RTL818X_MSR_NO_LINK; 1294 1295 rtl818x_iowrite8(priv, &priv->map->MSR, reg); 1296 1297 mutex_unlock(&priv->conf_mutex); 1298 } 1299 1300 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) 1301 rtl8187_conf_erp(priv, info->use_short_slot, 1302 info->use_short_preamble); 1303 1304 if (changed & BSS_CHANGED_BEACON_ENABLED) 1305 vif_priv->enable_beacon = info->enable_beacon; 1306 1307 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1308 cancel_delayed_work_sync(&vif_priv->beacon_work); 1309 if (vif_priv->enable_beacon) 1310 schedule_work(&vif_priv->beacon_work.work); 1311 } 1312 1313} 1314 1315static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev, 1316 struct netdev_hw_addr_list *mc_list) 1317{ 1318 return netdev_hw_addr_list_count(mc_list); 1319} 1320 1321static void rtl8187_configure_filter(struct ieee80211_hw *dev, 1322 unsigned int changed_flags, 1323 unsigned int *total_flags, 1324 u64 multicast) 1325{ 1326 struct rtl8187_priv *priv = dev->priv; 1327 1328 if (changed_flags & FIF_FCSFAIL) 1329 priv->rx_conf ^= RTL818X_RX_CONF_FCS; 1330 if (changed_flags & FIF_CONTROL) 1331 priv->rx_conf ^= RTL818X_RX_CONF_CTRL; 1332 if (*total_flags & FIF_OTHER_BSS || 1333 *total_flags & FIF_ALLMULTI || multicast > 0) 1334 priv->rx_conf |= RTL818X_RX_CONF_MONITOR; 1335 else 1336 priv->rx_conf &= ~RTL818X_RX_CONF_MONITOR; 1337 1338 *total_flags = 0; 1339 1340 if (priv->rx_conf & RTL818X_RX_CONF_FCS) 1341 *total_flags |= FIF_FCSFAIL; 1342 if (priv->rx_conf & RTL818X_RX_CONF_CTRL) 1343 *total_flags |= FIF_CONTROL; 1344 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) { 1345 *total_flags |= FIF_OTHER_BSS; 1346 *total_flags |= FIF_ALLMULTI; 1347 } 1348 1349 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); 1350} 1351 1352static int rtl8187_conf_tx(struct ieee80211_hw *dev, 1353 struct ieee80211_vif *vif, 1354 unsigned int link_id, u16 queue, 1355 const struct ieee80211_tx_queue_params *params) 1356{ 1357 struct rtl8187_priv *priv = dev->priv; 1358 u8 cw_min, cw_max; 1359 1360 if (queue > 3) 1361 return -EINVAL; 1362 1363 cw_min = fls(params->cw_min); 1364 cw_max = fls(params->cw_max); 1365 1366 if (priv->is_rtl8187b) { 1367 priv->aifsn[queue] = params->aifs; 1368 1369 /* 1370 * This is the structure of AC_*_PARAM registers in 8187B: 1371 * - TXOP limit field, bit offset = 16 1372 * - ECWmax, bit offset = 12 1373 * - ECWmin, bit offset = 8 1374 * - AIFS, bit offset = 0 1375 */ 1376 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue], 1377 (params->txop << 16) | (cw_max << 12) | 1378 (cw_min << 8) | (params->aifs * 1379 priv->slot_time + SIFS_TIME)); 1380 } else { 1381 if (queue != 0) 1382 return -EINVAL; 1383 1384 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 1385 cw_min | (cw_max << 4)); 1386 } 1387 return 0; 1388} 1389 1390 1391static const struct ieee80211_ops rtl8187_ops = { 1392 .add_chanctx = ieee80211_emulate_add_chanctx, 1393 .remove_chanctx = ieee80211_emulate_remove_chanctx, 1394 .change_chanctx = ieee80211_emulate_change_chanctx, 1395 .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx, 1396 .tx = rtl8187_tx, 1397 .wake_tx_queue = ieee80211_handle_wake_tx_queue, 1398 .start = rtl8187_start, 1399 .stop = rtl8187_stop, 1400 .add_interface = rtl8187_add_interface, 1401 .remove_interface = rtl8187_remove_interface, 1402 .config = rtl8187_config, 1403 .bss_info_changed = rtl8187_bss_info_changed, 1404 .prepare_multicast = rtl8187_prepare_multicast, 1405 .configure_filter = rtl8187_configure_filter, 1406 .conf_tx = rtl8187_conf_tx, 1407 .rfkill_poll = rtl8187_rfkill_poll, 1408 .get_tsf = rtl8187_get_tsf, 1409}; 1410 1411static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) 1412{ 1413 struct ieee80211_hw *dev = eeprom->data; 1414 struct rtl8187_priv *priv = dev->priv; 1415 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 1416 1417 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; 1418 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; 1419 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; 1420 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; 1421} 1422 1423static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) 1424{ 1425 struct ieee80211_hw *dev = eeprom->data; 1426 struct rtl8187_priv *priv = dev->priv; 1427 u8 reg = RTL818X_EEPROM_CMD_PROGRAM; 1428 1429 if (eeprom->reg_data_in) 1430 reg |= RTL818X_EEPROM_CMD_WRITE; 1431 if (eeprom->reg_data_out) 1432 reg |= RTL818X_EEPROM_CMD_READ; 1433 if (eeprom->reg_data_clock) 1434 reg |= RTL818X_EEPROM_CMD_CK; 1435 if (eeprom->reg_chip_select) 1436 reg |= RTL818X_EEPROM_CMD_CS; 1437 1438 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); 1439 udelay(10); 1440} 1441 1442static int rtl8187_probe(struct usb_interface *intf, 1443 const struct usb_device_id *id) 1444{ 1445 struct usb_device *udev = interface_to_usbdev(intf); 1446 struct ieee80211_hw *dev; 1447 struct rtl8187_priv *priv; 1448 struct eeprom_93cx6 eeprom; 1449 struct ieee80211_channel *channel; 1450 const char *chip_name; 1451 u16 txpwr, reg; 1452 u16 product_id = le16_to_cpu(udev->descriptor.idProduct); 1453 int err, i; 1454 u8 mac_addr[ETH_ALEN]; 1455 1456 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); 1457 if (!dev) { 1458 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); 1459 return -ENOMEM; 1460 } 1461 1462 priv = dev->priv; 1463 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); 1464 1465 /* allocate "DMA aware" buffer for register accesses */ 1466 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL); 1467 if (!priv->io_dmabuf) { 1468 err = -ENOMEM; 1469 goto err_free_dev; 1470 } 1471 mutex_init(&priv->io_mutex); 1472 mutex_init(&priv->conf_mutex); 1473 1474 SET_IEEE80211_DEV(dev, &intf->dev); 1475 usb_set_intfdata(intf, dev); 1476 priv->udev = udev; 1477 1478 usb_get_dev(udev); 1479 1480 skb_queue_head_init(&priv->rx_queue); 1481 1482 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); 1483 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); 1484 1485 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); 1486 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); 1487 priv->map = (struct rtl818x_csr *)0xFF00; 1488 1489 priv->band.band = NL80211_BAND_2GHZ; 1490 priv->band.channels = priv->channels; 1491 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); 1492 priv->band.bitrates = priv->rates; 1493 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); 1494 dev->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band; 1495 1496 1497 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 1498 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 1499 ieee80211_hw_set(dev, SIGNAL_DBM); 1500 /* Initialize rate-control variables */ 1501 dev->max_rates = 1; 1502 dev->max_rate_tries = RETRY_COUNT; 1503 1504 eeprom.data = dev; 1505 eeprom.register_read = rtl8187_eeprom_register_read; 1506 eeprom.register_write = rtl8187_eeprom_register_write; 1507 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) 1508 eeprom.width = PCI_EEPROM_WIDTH_93C66; 1509 else 1510 eeprom.width = PCI_EEPROM_WIDTH_93C46; 1511 1512 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1513 udelay(10); 1514 1515 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, 1516 (__le16 __force *)mac_addr, 3); 1517 if (!is_valid_ether_addr(mac_addr)) { 1518 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " 1519 "generated MAC address\n"); 1520 eth_random_addr(mac_addr); 1521 } 1522 SET_IEEE80211_PERM_ADDR(dev, mac_addr); 1523 1524 channel = priv->channels; 1525 for (i = 0; i < 3; i++) { 1526 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, 1527 &txpwr); 1528 (*channel++).hw_value = txpwr & 0xFF; 1529 (*channel++).hw_value = txpwr >> 8; 1530 } 1531 for (i = 0; i < 2; i++) { 1532 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, 1533 &txpwr); 1534 (*channel++).hw_value = txpwr & 0xFF; 1535 (*channel++).hw_value = txpwr >> 8; 1536 } 1537 1538 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, 1539 &priv->txpwr_base); 1540 1541 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; 1542 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); 1543 /* 0 means asic B-cut, we should use SW 3 wire 1544 * bit-by-bit banging for radio. 1 means we can use 1545 * USB specific request to write radio registers */ 1546 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; 1547 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); 1548 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1549 1550 if (!priv->is_rtl8187b) { 1551 u32 reg32; 1552 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); 1553 reg32 &= RTL818X_TX_CONF_HWVER_MASK; 1554 switch (reg32) { 1555 case RTL818X_TX_CONF_R8187vD_B: 1556 /* Some RTL8187B devices have a USB ID of 0x8187 1557 * detect them here */ 1558 chip_name = "RTL8187BvB(early)"; 1559 priv->is_rtl8187b = 1; 1560 priv->hw_rev = RTL8187BvB; 1561 break; 1562 case RTL818X_TX_CONF_R8187vD: 1563 chip_name = "RTL8187vD"; 1564 break; 1565 default: 1566 chip_name = "RTL8187vB (default)"; 1567 } 1568 } else { 1569 /* 1570 * Force USB request to write radio registers for 8187B, Realtek 1571 * only uses it in their sources 1572 */ 1573 /*if (priv->asic_rev == 0) { 1574 printk(KERN_WARNING "rtl8187: Forcing use of USB " 1575 "requests to write to radio registers\n"); 1576 priv->asic_rev = 1; 1577 }*/ 1578 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { 1579 case RTL818X_R8187B_B: 1580 chip_name = "RTL8187BvB"; 1581 priv->hw_rev = RTL8187BvB; 1582 break; 1583 case RTL818X_R8187B_D: 1584 chip_name = "RTL8187BvD"; 1585 priv->hw_rev = RTL8187BvD; 1586 break; 1587 case RTL818X_R8187B_E: 1588 chip_name = "RTL8187BvE"; 1589 priv->hw_rev = RTL8187BvE; 1590 break; 1591 default: 1592 chip_name = "RTL8187BvB (default)"; 1593 priv->hw_rev = RTL8187BvB; 1594 } 1595 } 1596 1597 if (!priv->is_rtl8187b) { 1598 for (i = 0; i < 2; i++) { 1599 eeprom_93cx6_read(&eeprom, 1600 RTL8187_EEPROM_TXPWR_CHAN_6 + i, 1601 &txpwr); 1602 (*channel++).hw_value = txpwr & 0xFF; 1603 (*channel++).hw_value = txpwr >> 8; 1604 } 1605 } else { 1606 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, 1607 &txpwr); 1608 (*channel++).hw_value = txpwr & 0xFF; 1609 1610 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); 1611 (*channel++).hw_value = txpwr & 0xFF; 1612 1613 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); 1614 (*channel++).hw_value = txpwr & 0xFF; 1615 (*channel++).hw_value = txpwr >> 8; 1616 } 1617 /* Handle the differing rfkill GPIO bit in different models */ 1618 priv->rfkill_mask = RFKILL_MASK_8187_89_97; 1619 if (product_id == 0x8197 || product_id == 0x8198) { 1620 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®); 1621 if (reg & 0xFF00) 1622 priv->rfkill_mask = RFKILL_MASK_8198; 1623 } 1624 dev->vif_data_size = sizeof(struct rtl8187_vif); 1625 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1626 BIT(NL80211_IFTYPE_ADHOC) ; 1627 1628 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 1629 1630 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) 1631 printk(KERN_INFO "rtl8187: inconsistency between id with OEM" 1632 " info!\n"); 1633 1634 priv->rf = rtl8187_detect_rf(dev); 1635 dev->extra_tx_headroom = (!priv->is_rtl8187b) ? 1636 sizeof(struct rtl8187_tx_hdr) : 1637 sizeof(struct rtl8187b_tx_hdr); 1638 if (!priv->is_rtl8187b) 1639 dev->queues = 1; 1640 else 1641 dev->queues = 4; 1642 1643 err = ieee80211_register_hw(dev); 1644 if (err) { 1645 printk(KERN_ERR "rtl8187: Cannot register device\n"); 1646 goto err_free_dmabuf; 1647 } 1648 skb_queue_head_init(&priv->b_tx_status.queue); 1649 1650 wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n", 1651 mac_addr, chip_name, priv->asic_rev, priv->rf->name, 1652 priv->rfkill_mask); 1653 1654#ifdef CONFIG_RTL8187_LEDS 1655 eeprom_93cx6_read(&eeprom, 0x3F, ®); 1656 reg &= 0xFF; 1657 rtl8187_leds_init(dev, reg); 1658#endif 1659 rtl8187_rfkill_init(dev); 1660 1661 return 0; 1662 1663 err_free_dmabuf: 1664 kfree(priv->io_dmabuf); 1665 usb_set_intfdata(intf, NULL); 1666 usb_put_dev(udev); 1667 err_free_dev: 1668 ieee80211_free_hw(dev); 1669 return err; 1670} 1671 1672static void rtl8187_disconnect(struct usb_interface *intf) 1673{ 1674 struct ieee80211_hw *dev = usb_get_intfdata(intf); 1675 struct rtl8187_priv *priv; 1676 1677 if (!dev) 1678 return; 1679 1680#ifdef CONFIG_RTL8187_LEDS 1681 rtl8187_leds_exit(dev); 1682#endif 1683 rtl8187_rfkill_exit(dev); 1684 ieee80211_unregister_hw(dev); 1685 1686 priv = dev->priv; 1687 usb_reset_device(priv->udev); 1688 usb_put_dev(interface_to_usbdev(intf)); 1689 kfree(priv->io_dmabuf); 1690 ieee80211_free_hw(dev); 1691} 1692 1693static struct usb_driver rtl8187_driver = { 1694 .name = KBUILD_MODNAME, 1695 .id_table = rtl8187_table, 1696 .probe = rtl8187_probe, 1697 .disconnect = rtl8187_disconnect, 1698 .disable_hub_initiated_lpm = 1, 1699}; 1700 1701module_usb_driver(rtl8187_driver);
~/
Read-only file preview.