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commands.h
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linux-6.19.14/drivers/net/wireless/intel/iwlwifi/dvm/commands.h
1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2/* 3 * Copyright (C) 2005-2014, 2023-2025 Intel Corporation 4 */ 5/* 6 * Please use this file (commands.h) only for uCode API definitions. 7 * Please use iwl-xxxx-hw.h for hardware-related definitions. 8 * Please use dev.h for driver implementation definitions. 9 */ 10 11#ifndef __iwl_commands_h__ 12#define __iwl_commands_h__ 13 14#include <linux/ieee80211.h> 15#include <linux/types.h> 16 17 18enum { 19 REPLY_ALIVE = 0x1, 20 REPLY_ERROR = 0x2, 21 REPLY_ECHO = 0x3, /* test command */ 22 23 /* RXON and QOS commands */ 24 REPLY_RXON = 0x10, 25 REPLY_RXON_ASSOC = 0x11, 26 REPLY_QOS_PARAM = 0x13, 27 REPLY_RXON_TIMING = 0x14, 28 29 /* Multi-Station support */ 30 REPLY_ADD_STA = 0x18, 31 REPLY_REMOVE_STA = 0x19, 32 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ 33 REPLY_TXFIFO_FLUSH = 0x1e, 34 35 /* Security */ 36 REPLY_WEPKEY = 0x20, 37 38 /* RX, TX, LEDs */ 39 REPLY_TX = 0x1c, 40 REPLY_LEDS_CMD = 0x48, 41 REPLY_TX_LINK_QUALITY_CMD = 0x4e, 42 43 /* WiMAX coexistence */ 44 COEX_PRIORITY_TABLE_CMD = 0x5a, 45 COEX_MEDIUM_NOTIFICATION = 0x5b, 46 COEX_EVENT_CMD = 0x5c, 47 48 /* Calibration */ 49 TEMPERATURE_NOTIFICATION = 0x62, 50 CALIBRATION_CFG_CMD = 0x65, 51 CALIBRATION_RES_NOTIFICATION = 0x66, 52 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 53 54 /* 802.11h related */ 55 REPLY_QUIET_CMD = 0x71, /* not used */ 56 REPLY_CHANNEL_SWITCH = 0x72, 57 CHANNEL_SWITCH_NOTIFICATION = 0x73, 58 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, 59 SPECTRUM_MEASURE_NOTIFICATION = 0x75, 60 61 /* Power Management */ 62 POWER_TABLE_CMD = 0x77, 63 PM_SLEEP_NOTIFICATION = 0x7A, 64 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, 65 66 /* Scan commands and notifications */ 67 REPLY_SCAN_CMD = 0x80, 68 REPLY_SCAN_ABORT_CMD = 0x81, 69 SCAN_START_NOTIFICATION = 0x82, 70 SCAN_RESULTS_NOTIFICATION = 0x83, 71 SCAN_COMPLETE_NOTIFICATION = 0x84, 72 73 /* IBSS/AP commands */ 74 BEACON_NOTIFICATION = 0x90, 75 REPLY_TX_BEACON = 0x91, 76 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ 77 78 /* Miscellaneous commands */ 79 REPLY_TX_POWER_DBM_CMD = 0x95, 80 QUIET_NOTIFICATION = 0x96, /* not used */ 81 REPLY_TX_PWR_TABLE_CMD = 0x97, 82 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ 83 TX_ANT_CONFIGURATION_CMD = 0x98, 84 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ 85 86 /* Bluetooth device coexistence config command */ 87 REPLY_BT_CONFIG = 0x9b, 88 89 /* Statistics */ 90 REPLY_STATISTICS_CMD = 0x9c, 91 STATISTICS_NOTIFICATION = 0x9d, 92 93 /* RF-KILL commands and notifications */ 94 REPLY_CARD_STATE_CMD = 0xa0, 95 CARD_STATE_NOTIFICATION = 0xa1, 96 97 /* Missed beacons notification */ 98 MISSED_BEACONS_NOTIFICATION = 0xa2, 99 100 REPLY_CT_KILL_CONFIG_CMD = 0xa4, 101 SENSITIVITY_CMD = 0xa8, 102 REPLY_PHY_CALIBRATION_CMD = 0xb0, 103 REPLY_RX_PHY_CMD = 0xc0, 104 REPLY_RX_MPDU_CMD = 0xc1, 105 REPLY_RX = 0xc3, 106 REPLY_COMPRESSED_BA = 0xc5, 107 108 /* BT Coex */ 109 REPLY_BT_COEX_PRIO_TABLE = 0xcc, 110 REPLY_BT_COEX_PROT_ENV = 0xcd, 111 REPLY_BT_COEX_PROFILE_NOTIF = 0xce, 112 113 /* PAN commands */ 114 REPLY_WIPAN_PARAMS = 0xb2, 115 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */ 116 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */ 117 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */ 118 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */ 119 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */ 120 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9, 121 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, 122 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, 123 124 REPLY_WOWLAN_PATTERNS = 0xe0, 125 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1, 126 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2, 127 REPLY_WOWLAN_TKIP_PARAMS = 0xe3, 128 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4, 129 REPLY_WOWLAN_GET_STATUS = 0xe5, 130 REPLY_D3_CONFIG = 0xd3, 131 132 REPLY_MAX = 0xff 133}; 134 135/* 136 * Minimum number of queues. MAX_NUM is defined in hw specific files. 137 * Set the minimum to accommodate 138 * - 4 standard TX queues 139 * - the command queue 140 * - 4 PAN TX queues 141 * - the PAN multicast queue, and 142 * - the AUX (TX during scan dwell) queue. 143 */ 144#define IWL_MIN_NUM_QUEUES 11 145 146/* 147 * Command queue depends on iPAN support. 148 */ 149#define IWL_DEFAULT_CMD_QUEUE_NUM 4 150#define IWL_IPAN_CMD_QUEUE_NUM 9 151 152#define IWL_TX_FIFO_BK 0 /* shared */ 153#define IWL_TX_FIFO_BE 1 154#define IWL_TX_FIFO_VI 2 /* shared */ 155#define IWL_TX_FIFO_VO 3 156#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 157#define IWL_TX_FIFO_BE_IPAN 4 158#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 159#define IWL_TX_FIFO_VO_IPAN 5 160/* re-uses the VO FIFO, uCode will properly flush/schedule */ 161#define IWL_TX_FIFO_AUX 5 162#define IWL_TX_FIFO_UNUSED 255 163 164#define IWLAGN_CMD_FIFO_NUM 7 165 166/* 167 * This queue number is required for proper operation 168 * because the ucode will stop/start the scheduler as 169 * required. 170 */ 171#define IWL_IPAN_MCAST_QUEUE 8 172 173/****************************************************************************** 174 * (0) 175 * Commonly used structures and definitions: 176 * Command header, rate_n_flags, txpower 177 * 178 *****************************************************************************/ 179 180/* 181 * iwlagn rate_n_flags bit fields 182 * 183 * rate_n_flags format is used in following iwlagn commands: 184 * REPLY_RX (response only) 185 * REPLY_RX_MPDU (response only) 186 * REPLY_TX (both command and response) 187 * REPLY_TX_LINK_QUALITY_CMD 188 * 189 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"): 190 * 2-0: 0) 6 Mbps 191 * 1) 12 Mbps 192 * 2) 18 Mbps 193 * 3) 24 Mbps 194 * 4) 36 Mbps 195 * 5) 48 Mbps 196 * 6) 54 Mbps 197 * 7) 60 Mbps 198 * 199 * 4-3: 0) Single stream (SISO) 200 * 1) Dual stream (MIMO) 201 * 2) Triple stream (MIMO) 202 * 203 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 204 * 205 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"): 206 * 3-0: 0xD) 6 Mbps 207 * 0xF) 9 Mbps 208 * 0x5) 12 Mbps 209 * 0x7) 18 Mbps 210 * 0x9) 24 Mbps 211 * 0xB) 36 Mbps 212 * 0x1) 48 Mbps 213 * 0x3) 54 Mbps 214 * 215 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"): 216 * 6-0: 10) 1 Mbps 217 * 20) 2 Mbps 218 * 55) 5.5 Mbps 219 * 110) 11 Mbps 220 */ 221#define RATE_MCS_CODE_MSK 0x7 222#define RATE_MCS_SPATIAL_POS 3 223#define RATE_MCS_SPATIAL_MSK 0x18 224#define RATE_MCS_HT_DUP_POS 5 225#define RATE_MCS_HT_DUP_MSK 0x20 226/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ 227#define RATE_MCS_RATE_MSK 0xff 228 229/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ 230#define RATE_MCS_FLAGS_POS 8 231#define RATE_MCS_HT_POS 8 232#define RATE_MCS_HT_MSK 0x100 233 234/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 235#define RATE_MCS_CCK_POS 9 236#define RATE_MCS_CCK_MSK 0x200 237 238/* Bit 10: (1) Use Green Field preamble */ 239#define RATE_MCS_GF_POS 10 240#define RATE_MCS_GF_MSK 0x400 241 242/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */ 243#define RATE_MCS_HT40_POS 11 244#define RATE_MCS_HT40_MSK 0x800 245 246/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */ 247#define RATE_MCS_DUP_POS 12 248#define RATE_MCS_DUP_MSK 0x1000 249 250/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 251#define RATE_MCS_SGI_POS 13 252#define RATE_MCS_SGI_MSK 0x2000 253 254/* 255 * rate_n_flags Tx antenna masks 256 * bit14:16 257 */ 258#define RATE_MCS_ANT_POS 14 259#define RATE_MCS_ANT_A_MSK 0x04000 260#define RATE_MCS_ANT_B_MSK 0x08000 261#define RATE_MCS_ANT_C_MSK 0x10000 262#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) 263#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) 264#define RATE_ANT_NUM 3 265 266#define POWER_TABLE_NUM_ENTRIES 33 267#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 268#define POWER_TABLE_CCK_ENTRY 32 269 270#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24 271#define IWL_PWR_CCK_ENTRIES 2 272 273/* 274 * struct tx_power_dual_stream 275 * 276 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH 277 * 278 * Same format as iwl_tx_power_dual_stream, but __le32 279 */ 280struct tx_power_dual_stream { 281 __le32 dw; 282} __packed; 283 284/* 285 * Command REPLY_TX_POWER_DBM_CMD = 0x98 286 * struct iwlagn_tx_power_dbm_cmd 287 */ 288#define IWLAGN_TX_POWER_AUTO 0x7f 289#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6) 290 291struct iwlagn_tx_power_dbm_cmd { 292 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 293 u8 flags; 294 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 295 u8 reserved; 296} __packed; 297 298/* 299 * Command TX_ANT_CONFIGURATION_CMD = 0x98 300 * This command is used to configure valid Tx antenna. 301 * By default uCode concludes the valid antenna according to the radio flavor. 302 * This command enables the driver to override/modify this conclusion. 303 */ 304struct iwl_tx_ant_config_cmd { 305 __le32 valid; 306} __packed; 307 308/****************************************************************************** 309 * (0a) 310 * Alive and Error Commands & Responses: 311 * 312 *****************************************************************************/ 313 314#define UCODE_VALID_OK cpu_to_le32(0x1) 315 316/* 317 * REPLY_ALIVE = 0x1 (response only, not a command) 318 * 319 * uCode issues this "alive" notification once the runtime image is ready 320 * to receive commands from the driver. This is the *second* "alive" 321 * notification that the driver will receive after rebooting uCode; 322 * this "alive" is indicated by subtype field != 9. 323 * 324 * See comments documenting "BSM" (bootstrap state machine). 325 * 326 * This response includes two pointers to structures within the device's 327 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: 328 * 329 * 1) log_event_table_ptr indicates base of the event log. This traces 330 * a 256-entry history of uCode execution within a circular buffer. 331 * Its header format is: 332 * 333 * __le32 log_size; log capacity (in number of entries) 334 * __le32 type; (1) timestamp with each entry, (0) no timestamp 335 * __le32 wraps; # times uCode has wrapped to top of circular buffer 336 * __le32 write_index; next circular buffer entry that uCode would fill 337 * 338 * The header is followed by the circular buffer of log entries. Entries 339 * with timestamps have the following format: 340 * 341 * __le32 event_id; range 0 - 1500 342 * __le32 timestamp; low 32 bits of TSF (of network, if associated) 343 * __le32 data; event_id-specific data value 344 * 345 * Entries without timestamps contain only event_id and data. 346 * 347 * 348 * 2) error_event_table_ptr indicates base of the error log. This contains 349 * information about any uCode error that occurs. For agn, the format 350 * of the error log is defined by struct iwl_error_event_table. 351 * 352 * The Linux driver can print both logs to the system log when a uCode error 353 * occurs. 354 */ 355 356/* 357 * Note: This structure is read from the device with IO accesses, 358 * and the reading already does the endian conversion. As it is 359 * read with u32-sized accesses, any members with a different size 360 * need to be ordered correctly though! 361 */ 362struct iwl_error_event_table { 363 u32 valid; /* (nonzero) valid, (0) log is empty */ 364 u32 error_id; /* type of error */ 365 u32 pc; /* program counter */ 366 u32 blink1; /* branch link */ 367 u32 blink2; /* branch link */ 368 u32 ilink1; /* interrupt link */ 369 u32 ilink2; /* interrupt link */ 370 u32 data1; /* error-specific data */ 371 u32 data2; /* error-specific data */ 372 u32 line; /* source code line of error */ 373 u32 bcon_time; /* beacon timer */ 374 u32 tsf_low; /* network timestamp function timer */ 375 u32 tsf_hi; /* network timestamp function timer */ 376 u32 gp1; /* GP1 timer register */ 377 u32 gp2; /* GP2 timer register */ 378 u32 gp3; /* GP3 timer register */ 379 u32 ucode_ver; /* uCode version */ 380 u32 hw_ver; /* HW Silicon version */ 381 u32 brd_ver; /* HW board version */ 382 u32 log_pc; /* log program counter */ 383 u32 frame_ptr; /* frame pointer */ 384 u32 stack_ptr; /* stack pointer */ 385 u32 hcmd; /* last host command header */ 386 u32 isr0; /* isr status register LMPM_NIC_ISR0: 387 * rxtx_flag */ 388 u32 isr1; /* isr status register LMPM_NIC_ISR1: 389 * host_flag */ 390 u32 isr2; /* isr status register LMPM_NIC_ISR2: 391 * enc_flag */ 392 u32 isr3; /* isr status register LMPM_NIC_ISR3: 393 * time_flag */ 394 u32 isr4; /* isr status register LMPM_NIC_ISR4: 395 * wico interrupt */ 396 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 397 u32 wait_event; /* wait event() caller address */ 398 u32 l2p_control; /* L2pControlField */ 399 u32 l2p_duration; /* L2pDurationField */ 400 u32 l2p_mhvalid; /* L2pMhValidBits */ 401 u32 l2p_addr_match; /* L2pAddrMatchStat */ 402 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 403 * (LMPM_PMG_SEL) */ 404 u32 u_timestamp; /* indicate when the date and time of the 405 * compilation */ 406 u32 flow_handler; /* FH read/write pointers, RX credit */ 407} __packed; 408 409struct iwl_alive_resp { 410 u8 ucode_minor; 411 u8 ucode_major; 412 __le16 reserved1; 413 u8 sw_rev[8]; 414 u8 ver_type; 415 u8 ver_subtype; /* not "9" for runtime alive */ 416 __le16 reserved2; 417 __le32 log_event_table_ptr; /* SRAM address for event log */ 418 __le32 error_event_table_ptr; /* SRAM address for error log */ 419 __le32 timestamp; 420 __le32 is_valid; 421} __packed; 422 423/* 424 * REPLY_ERROR = 0x2 (response only, not a command) 425 */ 426struct iwl_error_resp { 427 __le32 error_type; 428 u8 cmd_id; 429 u8 reserved1; 430 __le16 bad_cmd_seq_num; 431 __le32 error_info; 432 __le64 timestamp; 433} __packed; 434 435/****************************************************************************** 436 * (1) 437 * RXON Commands & Responses: 438 * 439 *****************************************************************************/ 440 441/* 442 * Rx config defines & structure 443 */ 444/* rx_config device types */ 445enum { 446 RXON_DEV_TYPE_AP = 1, 447 RXON_DEV_TYPE_ESS = 3, 448 RXON_DEV_TYPE_IBSS = 4, 449 RXON_DEV_TYPE_SNIFFER = 6, 450 RXON_DEV_TYPE_CP = 7, 451 RXON_DEV_TYPE_2STA = 8, 452 RXON_DEV_TYPE_P2P = 9, 453}; 454 455 456#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) 457#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) 458#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) 459#define RXON_RX_CHAIN_VALID_POS (1) 460#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) 461#define RXON_RX_CHAIN_FORCE_SEL_POS (4) 462#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7) 463#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 464#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10) 465#define RXON_RX_CHAIN_CNT_POS (10) 466#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12) 467#define RXON_RX_CHAIN_MIMO_CNT_POS (12) 468#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14) 469#define RXON_RX_CHAIN_MIMO_FORCE_POS (14) 470 471/* rx_config flags */ 472/* band & modulation selection */ 473#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) 474#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) 475/* auto detection enable */ 476#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) 477/* TGg protection when tx */ 478#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) 479/* cck short slot & preamble */ 480#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) 481#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) 482/* antenna selection */ 483#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) 484#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) 485#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) 486#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) 487/* radar detection enable */ 488#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) 489#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) 490/* rx response to host with 8-byte TSF 491* (according to ON_AIR deassertion) */ 492#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) 493 494 495/* HT flags */ 496#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) 497#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) 498 499#define RXON_FLG_HT_OPERATING_MODE_POS (23) 500 501#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23) 502#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23) 503 504#define RXON_FLG_CHANNEL_MODE_POS (25) 505#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) 506 507/* channel mode */ 508enum { 509 CHANNEL_MODE_LEGACY = 0, 510 CHANNEL_MODE_PURE_40 = 1, 511 CHANNEL_MODE_MIXED = 2, 512 CHANNEL_MODE_RESERVED = 3, 513}; 514#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS) 515#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS) 516#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS) 517 518/* CTS to self (if spec allows) flag */ 519#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) 520 521/* rx_config filter flags */ 522/* accept all data frames */ 523#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) 524/* pass control & management to host */ 525#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) 526/* accept multi-cast */ 527#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) 528/* don't decrypt uni-cast frames */ 529#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) 530/* don't decrypt multi-cast frames */ 531#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) 532/* STA is associated */ 533#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) 534/* transfer to host non bssid beacons in associated state */ 535#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) 536 537/* 538 * REPLY_RXON = 0x10 (command, has simple generic response) 539 * 540 * RXON tunes the radio tuner to a service channel, and sets up a number 541 * of parameters that are used primarily for Rx, but also for Tx operations. 542 * 543 * NOTE: When tuning to a new channel, driver must set the 544 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent 545 * info within the device, including the station tables, tx retry 546 * rate tables, and txpower tables. Driver must build a new station 547 * table and txpower table before transmitting anything on the RXON 548 * channel. 549 * 550 * NOTE: All RXONs wipe clean the internal txpower table. Driver must 551 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), 552 * regardless of whether RXON_FILTER_ASSOC_MSK is set. 553 */ 554 555struct iwl_rxon_cmd { 556 u8 node_addr[6]; 557 __le16 reserved1; 558 u8 bssid_addr[6]; 559 __le16 reserved2; 560 u8 wlap_bssid_addr[6]; 561 __le16 reserved3; 562 u8 dev_type; 563 u8 air_propagation; 564 __le16 rx_chain; 565 u8 ofdm_basic_rates; 566 u8 cck_basic_rates; 567 __le16 assoc_id; 568 __le32 flags; 569 __le32 filter_flags; 570 __le16 channel; 571 u8 ofdm_ht_single_stream_basic_rates; 572 u8 ofdm_ht_dual_stream_basic_rates; 573 u8 ofdm_ht_triple_stream_basic_rates; 574 u8 reserved5; 575 __le16 acquisition_data; 576 __le16 reserved6; 577} __packed; 578 579/* 580 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) 581 */ 582struct iwl_rxon_assoc_cmd { 583 __le32 flags; 584 __le32 filter_flags; 585 u8 ofdm_basic_rates; 586 u8 cck_basic_rates; 587 __le16 reserved1; 588 u8 ofdm_ht_single_stream_basic_rates; 589 u8 ofdm_ht_dual_stream_basic_rates; 590 u8 ofdm_ht_triple_stream_basic_rates; 591 u8 reserved2; 592 __le16 rx_chain_select_flags; 593 __le16 acquisition_data; 594 __le32 reserved3; 595} __packed; 596 597#define IWL_CONN_MAX_LISTEN_INTERVAL 10 598#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ 599 600/* 601 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) 602 */ 603struct iwl_rxon_time_cmd { 604 __le64 timestamp; 605 __le16 beacon_interval; 606 __le16 atim_window; 607 __le32 beacon_init_val; 608 __le16 listen_interval; 609 u8 dtim_period; 610 u8 delta_cp_bss_tbtts; 611} __packed; 612 613/* 614 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) 615 */ 616/** 617 * struct iwl5000_channel_switch_cmd - channel switch command (5000 series) 618 * @band: 0- 5.2GHz, 1- 2.4GHz 619 * @expect_beacon: 0- resume transmits after channel switch 620 * 1- wait for beacon to resume transmits 621 * @channel: new channel number 622 * @rxon_flags: Rx on flags 623 * @rxon_filter_flags: filtering parameters 624 * @switch_time: switch time in extended beacon format 625 * @reserved: reserved bytes 626 */ 627struct iwl5000_channel_switch_cmd { 628 u8 band; 629 u8 expect_beacon; 630 __le16 channel; 631 __le32 rxon_flags; 632 __le32 rxon_filter_flags; 633 __le32 switch_time; 634 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 635} __packed; 636 637/** 638 * struct iwl6000_channel_switch_cmd - channel switch command (6000 series) 639 * @band: 0- 5.2GHz, 1- 2.4GHz 640 * @expect_beacon: 0- resume transmits after channel switch 641 * 1- wait for beacon to resume transmits 642 * @channel: new channel number 643 * @rxon_flags: Rx on flags 644 * @rxon_filter_flags: filtering parameters 645 * @switch_time: switch time in extended beacon format 646 * @reserved: reserved bytes 647 */ 648struct iwl6000_channel_switch_cmd { 649 u8 band; 650 u8 expect_beacon; 651 __le16 channel; 652 __le32 rxon_flags; 653 __le32 rxon_filter_flags; 654 __le32 switch_time; 655 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 656} __packed; 657 658/* 659 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) 660 */ 661struct iwl_csa_notification { 662 __le16 band; 663 __le16 channel; 664 __le32 status; /* 0 - OK, 1 - fail */ 665} __packed; 666 667/****************************************************************************** 668 * (2) 669 * Quality-of-Service (QOS) Commands & Responses: 670 * 671 *****************************************************************************/ 672 673/** 674 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM 675 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd 676 * 677 * @cw_min: Contention window, start value in numbers of slots. 678 * Should be a power-of-2, minus 1. Device's default is 0x0f. 679 * @cw_max: Contention window, max value in numbers of slots. 680 * Should be a power-of-2, minus 1. Device's default is 0x3f. 681 * @aifsn: Number of slots in Arbitration Interframe Space (before 682 * performing random backoff timing prior to Tx). Device default 1. 683 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. 684 * @reserved1: reserved for alignment 685 * 686 * Device will automatically increase contention window by (2*CW) + 1 for each 687 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW 688 * value, to cap the CW value. 689 */ 690struct iwl_ac_qos { 691 __le16 cw_min; 692 __le16 cw_max; 693 u8 aifsn; 694 u8 reserved1; 695 __le16 edca_txop; 696} __packed; 697 698/* QoS flags defines */ 699#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) 700#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) 701#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) 702 703/* Number of Access Categories (AC) (EDCA), queues 0..3 */ 704#define AC_NUM 4 705 706/* 707 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) 708 * 709 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs 710 * 0: Background, 1: Best Effort, 2: Video, 3: Voice. 711 */ 712struct iwl_qosparam_cmd { 713 __le32 qos_flags; 714 struct iwl_ac_qos ac[AC_NUM]; 715} __packed; 716 717/****************************************************************************** 718 * (3) 719 * Add/Modify Stations Commands & Responses: 720 * 721 *****************************************************************************/ 722/* 723 * Multi station support 724 */ 725 726/* Special, dedicated locations within device's station table */ 727#define IWL_AP_ID 0 728#define IWL_AP_ID_PAN 1 729#define IWL_STA_ID 2 730#define IWLAGN_PAN_BCAST_ID 14 731#define IWLAGN_BROADCAST_ID 15 732#define IWLAGN_STATION_COUNT 16 733 734#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT 735 736#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) 737#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8) 738#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13) 739#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) 740#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) 741#define STA_FLG_MAX_AGG_SIZE_POS (19) 742#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19) 743#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21) 744#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22) 745#define STA_FLG_AGG_MPDU_DENSITY_POS (23) 746#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23) 747 748/* Use in mode field. 1: modify existing entry, 0: add new station entry */ 749#define STA_CONTROL_MODIFY_MSK 0x01 750 751/* key flags __le16*/ 752#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) 753#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) 754#define STA_KEY_FLG_WEP cpu_to_le16(0x0001) 755#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) 756#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) 757 758#define STA_KEY_FLG_KEYID_POS 8 759#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) 760/* wep key is either from global key (0) or from station info array (1) */ 761#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008) 762 763/* wep key in STA: 5-bytes (0) or 13-bytes (1) */ 764#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) 765#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) 766#define STA_KEY_MAX_NUM 8 767#define STA_KEY_MAX_NUM_PAN 16 768/* must not match WEP_INVALID_OFFSET */ 769#define IWLAGN_HW_KEY_DEFAULT 0xfe 770 771/* Flags indicate whether to modify vs. don't change various station params */ 772#define STA_MODIFY_KEY_MASK 0x01 773#define STA_MODIFY_TID_DISABLE_TX 0x02 774#define STA_MODIFY_TX_RATE_MSK 0x04 775#define STA_MODIFY_ADDBA_TID_MSK 0x08 776#define STA_MODIFY_DELBA_TID_MSK 0x10 777#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20 778 779/* agn */ 780struct iwl_keyinfo { 781 __le16 key_flags; 782 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ 783 u8 reserved1; 784 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ 785 u8 key_offset; 786 u8 reserved2; 787 u8 key[16]; /* 16-byte unicast decryption key */ 788 __le64 tx_secur_seq_cnt; 789 __le64 hw_tkip_mic_rx_key; 790 __le64 hw_tkip_mic_tx_key; 791} __packed; 792 793/** 794 * struct sta_id_modify - station modify command 795 * @addr: station's MAC address 796 * @reserved1: reserved for alignment 797 * @sta_id: index of station in uCode's station table 798 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change 799 * @reserved2: reserved for alignment 800 * 801 * Driver selects unused table index when adding new station, 802 * or the index to a pre-existing station entry when modifying that station. 803 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). 804 * 805 * modify_mask flags select which parameters to modify vs. leave alone. 806 */ 807struct sta_id_modify { 808 u8 addr[ETH_ALEN]; 809 __le16 reserved1; 810 u8 sta_id; 811 u8 modify_mask; 812 __le16 reserved2; 813} __packed; 814 815/* 816 * REPLY_ADD_STA = 0x18 (command) 817 * 818 * The device contains an internal table of per-station information, 819 * with info on security keys, aggregation parameters, and Tx rates for 820 * initial Tx attempt and any retries (agn devices uses 821 * REPLY_TX_LINK_QUALITY_CMD, 822 * 823 * REPLY_ADD_STA sets up the table entry for one station, either creating 824 * a new entry, or modifying a pre-existing one. 825 * 826 * NOTE: RXON command (without "associated" bit set) wipes the station table 827 * clean. Moving into RF_KILL state does this also. Driver must set up 828 * new station table before transmitting anything on the RXON channel 829 * (except active scans or active measurements; those commands carry 830 * their own txpower/rate setup data). 831 * 832 * When getting started on a new channel, driver must set up the 833 * IWL_BROADCAST_ID entry (last entry in the table). For a client 834 * station in a BSS, once an AP is selected, driver sets up the AP STA 835 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP 836 * are all that are needed for a BSS client station. If the device is 837 * used as AP, or in an IBSS network, driver must set up station table 838 * entries for all STAs in network, starting with index IWL_STA_ID. 839 */ 840 841struct iwl_addsta_cmd { 842 u8 mode; /* 1: modify existing, 0: add new station */ 843 u8 reserved[3]; 844 struct sta_id_modify sta; 845 struct iwl_keyinfo key; 846 __le32 station_flags; /* STA_FLG_* */ 847 __le32 station_flags_msk; /* STA_FLG_* */ 848 849 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) 850 * corresponding to bit (e.g. bit 5 controls TID 5). 851 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ 852 __le16 tid_disable_tx; 853 __le16 legacy_reserved; 854 855 /* TID for which to add block-ack support. 856 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 857 u8 add_immediate_ba_tid; 858 859 /* TID for which to remove block-ack support. 860 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ 861 u8 remove_immediate_ba_tid; 862 863 /* Starting Sequence Number for added block-ack support. 864 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 865 __le16 add_immediate_ba_ssn; 866 867 /* 868 * Number of packets OK to transmit to station even though 869 * it is asleep -- used to synchronise PS-poll and u-APSD 870 * responses while ucode keeps track of STA sleep state. 871 */ 872 __le16 sleep_tx_count; 873 874 __le16 reserved2; 875} __packed; 876 877 878#define ADD_STA_SUCCESS_MSK 0x1 879#define ADD_STA_NO_ROOM_IN_TABLE 0x2 880#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 881#define ADD_STA_MODIFY_NON_EXIST_STA 0x8 882/* 883 * REPLY_ADD_STA = 0x18 (response) 884 */ 885struct iwl_add_sta_resp { 886 u8 status; /* ADD_STA_* */ 887} __packed; 888 889#define REM_STA_SUCCESS_MSK 0x1 890/* 891 * REPLY_REM_STA = 0x19 (response) 892 */ 893struct iwl_rem_sta_resp { 894 u8 status; 895} __packed; 896 897/* 898 * REPLY_REM_STA = 0x19 (command) 899 */ 900struct iwl_rem_sta_cmd { 901 u8 num_sta; /* number of removed stations */ 902 u8 reserved[3]; 903 u8 addr[ETH_ALEN]; /* MAC addr of the first station */ 904 u8 reserved2[2]; 905} __packed; 906 907 908/* WiFi queues mask */ 909#define IWL_SCD_BK_MSK BIT(0) 910#define IWL_SCD_BE_MSK BIT(1) 911#define IWL_SCD_VI_MSK BIT(2) 912#define IWL_SCD_VO_MSK BIT(3) 913#define IWL_SCD_MGMT_MSK BIT(3) 914 915/* PAN queues mask */ 916#define IWL_PAN_SCD_BK_MSK BIT(4) 917#define IWL_PAN_SCD_BE_MSK BIT(5) 918#define IWL_PAN_SCD_VI_MSK BIT(6) 919#define IWL_PAN_SCD_VO_MSK BIT(7) 920#define IWL_PAN_SCD_MGMT_MSK BIT(7) 921#define IWL_PAN_SCD_MULTICAST_MSK BIT(8) 922 923#define IWL_AGG_TX_QUEUE_MSK 0xffc00 924 925#define IWL_DROP_ALL BIT(1) 926 927/* 928 * REPLY_TXFIFO_FLUSH = 0x1e(command and response) 929 * 930 * When using full FIFO flush this command checks the scheduler HW block WR/RD 931 * pointers to check if all the frames were transferred by DMA into the 932 * relevant TX FIFO queue. Only when the DMA is finished and the queue is 933 * empty the command can finish. 934 * This command is used to flush the TXFIFO from transmit commands, it may 935 * operate on single or multiple queues, the command queue can't be flushed by 936 * this command. The command response is returned when all the queue flush 937 * operations are done. Each TX command flushed return response with the FLUSH 938 * status set in the TX response status. When FIFO flush operation is used, 939 * the flush operation ends when both the scheduler DMA done and TXFIFO empty 940 * are set. 941 * 942 * @queue_control: bit mask for which queues to flush 943 * @flush_control: flush controls 944 * 0: Dump single MSDU 945 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable. 946 * 2: Dump all FIFO 947 */ 948struct iwl_txfifo_flush_cmd_v3 { 949 __le32 queue_control; 950 __le16 flush_control; 951 __le16 reserved; 952} __packed; 953 954struct iwl_txfifo_flush_cmd_v2 { 955 __le16 queue_control; 956 __le16 flush_control; 957} __packed; 958 959/* 960 * REPLY_WEP_KEY = 0x20 961 */ 962struct iwl_wep_key { 963 u8 key_index; 964 u8 key_offset; 965 u8 reserved1[2]; 966 u8 key_size; 967 u8 reserved2[3]; 968 u8 key[16]; 969} __packed; 970 971struct iwl_wep_cmd { 972 u8 num_keys; 973 u8 global_key_type; 974 u8 flags; 975 u8 reserved; 976 struct iwl_wep_key key[]; 977} __packed; 978 979#define WEP_KEY_WEP_TYPE 1 980#define WEP_KEYS_MAX 4 981#define WEP_INVALID_OFFSET 0xff 982#define WEP_KEY_LEN_64 5 983#define WEP_KEY_LEN_128 13 984 985/****************************************************************************** 986 * (4) 987 * Rx Responses: 988 * 989 *****************************************************************************/ 990 991#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) 992#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) 993 994#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) 995#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) 996#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) 997#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) 998#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70 999#define RX_RES_PHY_FLAGS_ANTENNA_POS 4 1000#define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7) 1001 1002#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) 1003#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) 1004#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) 1005#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) 1006#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) 1007#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8) 1008 1009#define RX_RES_STATUS_STATION_FOUND (1<<6) 1010#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7) 1011 1012#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) 1013#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) 1014#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) 1015#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) 1016#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) 1017 1018#define RX_MPDU_RES_STATUS_ICV_OK (0x20) 1019#define RX_MPDU_RES_STATUS_MIC_OK (0x40) 1020#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) 1021#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) 1022 1023 1024#define IWLAGN_RX_RES_PHY_CNT 8 1025#define IWLAGN_RX_RES_AGC_IDX 1 1026#define IWLAGN_RX_RES_RSSI_AB_IDX 2 1027#define IWLAGN_RX_RES_RSSI_C_IDX 3 1028#define IWLAGN_OFDM_AGC_MSK 0xfe00 1029#define IWLAGN_OFDM_AGC_BIT_POS 9 1030#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff 1031#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00 1032#define IWLAGN_OFDM_RSSI_A_BIT_POS 0 1033#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000 1034#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000 1035#define IWLAGN_OFDM_RSSI_B_BIT_POS 16 1036#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff 1037#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00 1038#define IWLAGN_OFDM_RSSI_C_BIT_POS 0 1039 1040struct iwlagn_non_cfg_phy { 1041 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */ 1042} __packed; 1043 1044 1045/* 1046 * REPLY_RX = 0xc3 (response only, not a command) 1047 * Used only for legacy (non 11n) frames. 1048 */ 1049struct iwl_rx_phy_res { 1050 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ 1051 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ 1052 u8 stat_id; /* configurable DSP phy data set ID */ 1053 u8 reserved1; 1054 __le64 timestamp; /* TSF at on air rise */ 1055 __le32 beacon_time_stamp; /* beacon at on-air rise */ 1056 __le16 phy_flags; /* general phy flags: band, modulation, ... */ 1057 __le16 channel; /* channel number */ 1058 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ 1059 __le32 rate_n_flags; /* RATE_MCS_* */ 1060 __le16 byte_count; /* frame's byte-count */ 1061 __le16 frame_time; /* frame's time on the air */ 1062} __packed; 1063 1064struct iwl_rx_mpdu_res_start { 1065 __le16 byte_count; 1066 __le16 reserved; 1067} __packed; 1068 1069 1070/****************************************************************************** 1071 * (5) 1072 * Tx Commands & Responses: 1073 * 1074 * Driver must place each REPLY_TX command into one of the prioritized Tx 1075 * queues in host DRAM, shared between driver and device (see comments for 1076 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode 1077 * are preparing to transmit, the device pulls the Tx command over the PCI 1078 * bus via one of the device's Tx DMA channels, to fill an internal FIFO 1079 * from which data will be transmitted. 1080 * 1081 * uCode handles all timing and protocol related to control frames 1082 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler 1083 * handle reception of block-acks; uCode updates the host driver via 1084 * REPLY_COMPRESSED_BA. 1085 * 1086 * uCode handles retrying Tx when an ACK is expected but not received. 1087 * This includes trying lower data rates than the one requested in the Tx 1088 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn). 1089 * 1090 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. 1091 * This command must be executed after every RXON command, before Tx can occur. 1092 *****************************************************************************/ 1093 1094/* REPLY_TX Tx flags field */ 1095 1096/* 1097 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it 1098 * before this frame. if CTS-to-self required check 1099 * RXON_FLG_SELF_CTS_EN status. 1100 */ 1101#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0) 1102 1103/* 1: Expect ACK from receiving station 1104 * 0: Don't expect ACK (MAC header's duration field s/b 0) 1105 * Set this for unicast frames, but not broadcast/multicast. */ 1106#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) 1107 1108/* For agn devices: 1109 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). 1110 * Tx command's initial_rate_index indicates first rate to try; 1111 * uCode walks through table for additional Tx attempts. 1112 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. 1113 * This rate will be used for all Tx attempts; it will not be scaled. */ 1114#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) 1115 1116/* 1: Expect immediate block-ack. 1117 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ 1118#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) 1119 1120/* Tx antenna selection field; reserved (0) for agn devices. */ 1121#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) 1122 1123/* 1: Ignore Bluetooth priority for this frame. 1124 * 0: Delay Tx until Bluetooth device is done (normal usage). */ 1125#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12) 1126 1127/* 1: uCode overrides sequence control field in MAC header. 1128 * 0: Driver provides sequence control field in MAC header. 1129 * Set this for management frames, non-QOS data frames, non-unicast frames, 1130 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ 1131#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) 1132 1133/* 1: This frame is non-last MPDU; more fragments are coming. 1134 * 0: Last fragment, or not using fragmentation. */ 1135#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) 1136 1137/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. 1138 * 0: No TSF required in outgoing frame. 1139 * Set this for transmitting beacons and probe responses. */ 1140#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) 1141 1142/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword 1143 * alignment of frame's payload data field. 1144 * 0: No pad 1145 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 1146 * field (but not both). Driver must align frame data (i.e. data following 1147 * MAC header) to DWORD boundary. */ 1148#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) 1149 1150/* accelerate aggregation support 1151 * 0 - no CCMP encryption; 1 - CCMP encryption */ 1152#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22) 1153 1154/* HCCA-AP - disable duration overwriting. */ 1155#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) 1156 1157 1158/* 1159 * TX command security control 1160 */ 1161#define TX_CMD_SEC_WEP 0x01 1162#define TX_CMD_SEC_CCM 0x02 1163#define TX_CMD_SEC_TKIP 0x03 1164#define TX_CMD_SEC_MSK 0x03 1165#define TX_CMD_SEC_SHIFT 6 1166#define TX_CMD_SEC_KEY128 0x08 1167 1168/* 1169 * REPLY_TX = 0x1c (command) 1170 */ 1171 1172/* 1173 * Used for managing Tx retries when expecting block-acks. 1174 * Driver should set these fields to 0. 1175 */ 1176struct iwl_dram_scratch { 1177 u8 try_cnt; /* Tx attempts */ 1178 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ 1179 __le16 reserved; 1180} __packed; 1181 1182struct iwl_tx_cmd { 1183 /* New members MUST be added within the __struct_group() macro below. */ 1184 __struct_group(iwl_tx_cmd_hdr, __hdr, __packed, 1185 /* 1186 * MPDU byte count: 1187 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, 1188 * + 8 byte IV for CCM or TKIP (not used for WEP) 1189 * + Data payload 1190 * + 8-byte MIC (not used for CCM/WEP) 1191 * NOTE: Does not include Tx command bytes, post-MAC pad bytes, 1192 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i 1193 * Range: 14-2342 bytes. 1194 */ 1195 __le16 len; 1196 1197 /* 1198 * MPDU or MSDU byte count for next frame. 1199 * Used for fragmentation and bursting, but not 11n aggregation. 1200 * Same as "len", but for next frame. Set to 0 if not applicable. 1201 */ 1202 __le16 next_frame_len; 1203 1204 __le32 tx_flags; /* TX_CMD_FLG_* */ 1205 1206 /* uCode may modify this field of the Tx command (in host DRAM!). 1207 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */ 1208 struct iwl_dram_scratch scratch; 1209 1210 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */ 1211 __le32 rate_n_flags; /* RATE_MCS_* */ 1212 1213 /* Index of destination station in uCode's station table */ 1214 u8 sta_id; 1215 1216 /* Type of security encryption: CCM or TKIP */ 1217 u8 sec_ctl; /* TX_CMD_SEC_* */ 1218 1219 /* 1220 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial 1221 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for 1222 * data frames, this field may be used to selectively reduce initial 1223 * rate (via non-0 value) for special frames (e.g. management), while 1224 * still supporting rate scaling for all frames. 1225 */ 1226 u8 initial_rate_index; 1227 u8 reserved; 1228 u8 key[16]; 1229 __le16 next_frame_flags; 1230 __le16 reserved2; 1231 union { 1232 __le32 life_time; 1233 __le32 attempt; 1234 } stop_time; 1235 1236 /* Host DRAM physical address pointer to "scratch" in this command. 1237 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */ 1238 __le32 dram_lsb_ptr; 1239 u8 dram_msb_ptr; 1240 1241 u8 rts_retry_limit; /*byte 50 */ 1242 u8 data_retry_limit; /*byte 51 */ 1243 u8 tid_tspec; 1244 union { 1245 __le16 pm_frame_timeout; 1246 __le16 attempt_duration; 1247 } timeout; 1248 1249 /* 1250 * Duration of EDCA burst Tx Opportunity, in 32-usec units. 1251 * Set this if txop time is not specified by HCCA protocol (e.g. by AP). 1252 */ 1253 __le16 driver_txop; 1254 1255 ); 1256 /* 1257 * MAC header goes here, followed by 2 bytes padding if MAC header 1258 * length is 26 or 30 bytes, followed by payload data 1259 */ 1260 struct ieee80211_hdr hdr[]; 1261} __packed; 1262static_assert(offsetof(struct iwl_tx_cmd, hdr) == sizeof(struct iwl_tx_cmd_hdr), 1263 "struct member likely outside of __struct_group()"); 1264 1265/* 1266 * TX command response is sent after *agn* transmission attempts. 1267 * 1268 * both postpone and abort status are expected behavior from uCode. there is 1269 * no special operation required from driver; except for RFKILL_FLUSH, 1270 * which required tx flush host command to flush all the tx frames in queues 1271 */ 1272enum { 1273 TX_STATUS_SUCCESS = 0x01, 1274 TX_STATUS_DIRECT_DONE = 0x02, 1275 /* postpone TX */ 1276 TX_STATUS_POSTPONE_DELAY = 0x40, 1277 TX_STATUS_POSTPONE_FEW_BYTES = 0x41, 1278 TX_STATUS_POSTPONE_BT_PRIO = 0x42, 1279 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43, 1280 TX_STATUS_POSTPONE_CALC_TTAK = 0x44, 1281 /* abort TX */ 1282 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81, 1283 TX_STATUS_FAIL_SHORT_LIMIT = 0x82, 1284 TX_STATUS_FAIL_LONG_LIMIT = 0x83, 1285 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, 1286 TX_STATUS_FAIL_DRAIN_FLOW = 0x85, 1287 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86, 1288 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, 1289 TX_STATUS_FAIL_DEST_PS = 0x88, 1290 TX_STATUS_FAIL_HOST_ABORTED = 0x89, 1291 TX_STATUS_FAIL_BT_RETRY = 0x8a, 1292 TX_STATUS_FAIL_STA_INVALID = 0x8b, 1293 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, 1294 TX_STATUS_FAIL_TID_DISABLE = 0x8d, 1295 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e, 1296 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, 1297 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90, 1298 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, 1299}; 1300 1301#define TX_PACKET_MODE_REGULAR 0x0000 1302#define TX_PACKET_MODE_BURST_SEQ 0x0100 1303#define TX_PACKET_MODE_BURST_FIRST 0x0200 1304 1305enum { 1306 TX_POWER_PA_NOT_ACTIVE = 0x0, 1307}; 1308 1309enum { 1310 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ 1311 TX_STATUS_DELAY_MSK = 0x00000040, 1312 TX_STATUS_ABORT_MSK = 0x00000080, 1313 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ 1314 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ 1315 TX_RESERVED = 0x00780000, /* bits 19:22 */ 1316 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ 1317 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ 1318}; 1319 1320/* ******************************* 1321 * TX aggregation status 1322 ******************************* */ 1323 1324enum { 1325 AGG_TX_STATE_TRANSMITTED = 0x00, 1326 AGG_TX_STATE_UNDERRUN_MSK = 0x01, 1327 AGG_TX_STATE_BT_PRIO_MSK = 0x02, 1328 AGG_TX_STATE_FEW_BYTES_MSK = 0x04, 1329 AGG_TX_STATE_ABORT_MSK = 0x08, 1330 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10, 1331 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20, 1332 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40, 1333 AGG_TX_STATE_SCD_QUERY_MSK = 0x80, 1334 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100, 1335 AGG_TX_STATE_RESPONSE_MSK = 0x1ff, 1336 AGG_TX_STATE_DUMP_TX_MSK = 0x200, 1337 AGG_TX_STATE_DELAY_TX_MSK = 0x400 1338}; 1339 1340#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */ 1341#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */ 1342#define AGG_TX_TRY_POS 12 1343 1344#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \ 1345 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \ 1346 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK) 1347 1348/* # tx attempts for first frame in aggregation */ 1349#define AGG_TX_STATE_TRY_CNT_POS 12 1350#define AGG_TX_STATE_TRY_CNT_MSK 0xf000 1351 1352/* Command ID and sequence number of Tx command for this frame */ 1353#define AGG_TX_STATE_SEQ_NUM_POS 16 1354#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000 1355 1356/* 1357 * REPLY_TX = 0x1c (response) 1358 * 1359 * This response may be in one of two slightly different formats, indicated 1360 * by the frame_count field: 1361 * 1362 * 1) No aggregation (frame_count == 1). This reports Tx results for 1363 * a single frame. Multiple attempts, at various bit rates, may have 1364 * been made for this frame. 1365 * 1366 * 2) Aggregation (frame_count > 1). This reports Tx results for 1367 * 2 or more frames that used block-acknowledge. All frames were 1368 * transmitted at same rate. Rate scaling may have been used if first 1369 * frame in this new agg block failed in previous agg block(s). 1370 * 1371 * Note that, for aggregation, ACK (block-ack) status is not delivered here; 1372 * block-ack has not been received by the time the agn device records 1373 * this status. 1374 * This status relates to reasons the tx might have been blocked or aborted 1375 * within the sending station (this agn device), rather than whether it was 1376 * received successfully by the destination station. 1377 */ 1378struct agg_tx_status { 1379 __le16 status; 1380 __le16 sequence; 1381} __packed; 1382 1383/* refer to ra_tid */ 1384#define IWLAGN_TX_RES_TID_POS 0 1385#define IWLAGN_TX_RES_TID_MSK 0x0f 1386#define IWLAGN_TX_RES_RA_POS 4 1387#define IWLAGN_TX_RES_RA_MSK 0xf0 1388 1389struct iwlagn_tx_resp { 1390 u8 frame_count; /* 1 no aggregation, >1 aggregation */ 1391 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ 1392 u8 failure_rts; /* # failures due to unsuccessful RTS */ 1393 u8 failure_frame; /* # failures due to no ACK (unused for agg) */ 1394 1395 /* For non-agg: Rate at which frame was successful. 1396 * For agg: Rate at which all frames were transmitted. */ 1397 __le32 rate_n_flags; /* RATE_MCS_* */ 1398 1399 /* For non-agg: RTS + CTS + frame tx attempts time + ACK. 1400 * For agg: RTS + CTS + aggregation tx time + block-ack time. */ 1401 __le16 wireless_media_time; /* uSecs */ 1402 1403 u8 pa_status; /* RF power amplifier measurement (not used) */ 1404 u8 pa_integ_res_a[3]; 1405 u8 pa_integ_res_b[3]; 1406 u8 pa_integ_res_C[3]; 1407 1408 __le32 tfd_info; 1409 __le16 seq_ctl; 1410 __le16 byte_cnt; 1411 u8 tlc_info; 1412 u8 ra_tid; /* tid (0:3), sta_id (4:7) */ 1413 __le16 frame_ctrl; 1414 /* 1415 * For non-agg: frame status TX_STATUS_* 1416 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status 1417 * fields follow this one, up to frame_count. 1418 * Bit fields: 1419 * 11- 0: AGG_TX_STATE_* status code 1420 * 15-12: Retry count for 1st frame in aggregation (retries 1421 * occur if tx failed for this frame when it was a 1422 * member of a previous aggregation block). If rate 1423 * scaling is used, retry count indicates the rate 1424 * table entry used for all frames in the new agg. 1425 * 31-16: Sequence # for this frame's Tx cmd (not SSN!) 1426 */ 1427 struct agg_tx_status status; /* TX status (in aggregation - 1428 * status of 1st frame) */ 1429} __packed; 1430/* 1431 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) 1432 * 1433 * Reports Block-Acknowledge from recipient station 1434 */ 1435struct iwl_compressed_ba_resp { 1436 __le32 sta_addr_lo32; 1437 __le16 sta_addr_hi16; 1438 __le16 reserved; 1439 1440 /* Index of recipient (BA-sending) station in uCode's station table */ 1441 u8 sta_id; 1442 u8 tid; 1443 __le16 seq_ctl; 1444 __le64 bitmap; 1445 __le16 scd_flow; 1446 __le16 scd_ssn; 1447 u8 txed; /* number of frames sent */ 1448 u8 txed_2_done; /* number of frames acked */ 1449 __le16 reserved1; 1450} __packed; 1451 1452/* 1453 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) 1454 * 1455 */ 1456 1457/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ 1458#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) 1459 1460/* # of EDCA prioritized tx fifos */ 1461#define LINK_QUAL_AC_NUM AC_NUM 1462 1463/* # entries in rate scale table to support Tx retries */ 1464#define LINK_QUAL_MAX_RETRY_NUM 16 1465 1466/* Tx antenna selection values */ 1467#define LINK_QUAL_ANT_A_MSK (1 << 0) 1468#define LINK_QUAL_ANT_B_MSK (1 << 1) 1469#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) 1470 1471 1472/* 1473 * struct iwl_link_qual_general_params 1474 * 1475 * Used in REPLY_TX_LINK_QUALITY_CMD 1476 */ 1477struct iwl_link_qual_general_params { 1478 u8 flags; 1479 1480 /* No entries at or above this (driver chosen) index contain MIMO */ 1481 u8 mimo_delimiter; 1482 1483 /* Best single antenna to use for single stream (legacy, SISO). */ 1484 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1485 1486 /* Best antennas to use for MIMO */ 1487 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1488 1489 /* 1490 * If driver needs to use different initial rates for different 1491 * EDCA QOS access categories (as implemented by tx fifos 0-3), 1492 * this table will set that up, by indicating the indexes in the 1493 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start. 1494 * Otherwise, driver should set all entries to 0. 1495 * 1496 * Entry usage: 1497 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice 1498 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. 1499 */ 1500 u8 start_rate_index[LINK_QUAL_AC_NUM]; 1501} __packed; 1502 1503#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ 1504#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) 1505#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) 1506 1507#define LINK_QUAL_AGG_DISABLE_START_DEF (3) 1508#define LINK_QUAL_AGG_DISABLE_START_MAX (255) 1509#define LINK_QUAL_AGG_DISABLE_START_MIN (0) 1510 1511#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) 1512#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) 1513#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) 1514 1515/* 1516 * struct iwl_link_qual_agg_params 1517 * 1518 * Used in REPLY_TX_LINK_QUALITY_CMD 1519 */ 1520struct iwl_link_qual_agg_params { 1521 1522 /* 1523 *Maximum number of uSec in aggregation. 1524 * default set to 4000 (4 milliseconds) if not configured in .cfg 1525 */ 1526 __le16 agg_time_limit; 1527 1528 /* 1529 * Number of Tx retries allowed for a frame, before that frame will 1530 * no longer be considered for the start of an aggregation sequence 1531 * (scheduler will then try to tx it as single frame). 1532 * Driver should set this to 3. 1533 */ 1534 u8 agg_dis_start_th; 1535 1536 /* 1537 * Maximum number of frames in aggregation. 1538 * 0 = no limit (default). 1 = no aggregation. 1539 * Other values = max # frames in aggregation. 1540 */ 1541 u8 agg_frame_cnt_limit; 1542 1543 __le32 reserved; 1544} __packed; 1545 1546/* 1547 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) 1548 * 1549 * For agn devices 1550 * 1551 * Each station in the agn device's internal station table has its own table 1552 * of 16 1553 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when 1554 * an ACK is not received. This command replaces the entire table for 1555 * one station. 1556 * 1557 * NOTE: Station must already be in agn device's station table. 1558 * Use REPLY_ADD_STA. 1559 * 1560 * The rate scaling procedures described below work well. Of course, other 1561 * procedures are possible, and may work better for particular environments. 1562 * 1563 * 1564 * FILLING THE RATE TABLE 1565 * 1566 * Given a particular initial rate and mode, as determined by the rate 1567 * scaling algorithm described below, the Linux driver uses the following 1568 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the 1569 * Link Quality command: 1570 * 1571 * 1572 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate: 1573 * a) Use this same initial rate for first 3 entries. 1574 * b) Find next lower available rate using same mode (SISO or MIMO), 1575 * use for next 3 entries. If no lower rate available, switch to 1576 * legacy mode (no HT40 channel, no MIMO, no short guard interval). 1577 * c) If using MIMO, set command's mimo_delimiter to number of entries 1578 * using MIMO (3 or 6). 1579 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel, 1580 * no MIMO, no short guard interval), at the next lower bit rate 1581 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow 1582 * legacy procedure for remaining table entries. 1583 * 1584 * 2) If using legacy initial rate: 1585 * a) Use the initial rate for only one entry. 1586 * b) For each following entry, reduce the rate to next lower available 1587 * rate, until reaching the lowest available rate. 1588 * c) When reducing rate, also switch antenna selection. 1589 * d) Once lowest available rate is reached, repeat this rate until 1590 * rate table is filled (16 entries), switching antenna each entry. 1591 * 1592 * 1593 * ACCUMULATING HISTORY 1594 * 1595 * The rate scaling algorithm for agn devices, as implemented in Linux driver, 1596 * uses two sets of frame Tx success history: One for the current/active 1597 * modulation mode, and one for a speculative/search mode that is being 1598 * attempted. If the speculative mode turns out to be more effective (i.e. 1599 * actual transfer rate is better), then the driver continues to use the 1600 * speculative mode as the new current active mode. 1601 * 1602 * Each history set contains, separately for each possible rate, data for a 1603 * sliding window of the 62 most recent tx attempts at that rate. The data 1604 * includes a shifting bitmap of success(1)/failure(0), and sums of successful 1605 * and attempted frames, from which the driver can additionally calculate a 1606 * success ratio (success / attempted) and number of failures 1607 * (attempted - success), and control the size of the window (attempted). 1608 * The driver uses the bit map to remove successes from the success sum, as 1609 * the oldest tx attempts fall out of the window. 1610 * 1611 * When the agn device makes multiple tx attempts for a given frame, each 1612 * attempt might be at a different rate, and have different modulation 1613 * characteristics (e.g. antenna, fat channel, short guard interval), as set 1614 * up in the rate scaling table in the Link Quality command. The driver must 1615 * determine which rate table entry was used for each tx attempt, to determine 1616 * which rate-specific history to update, and record only those attempts that 1617 * match the modulation characteristics of the history set. 1618 * 1619 * When using block-ack (aggregation), all frames are transmitted at the same 1620 * rate, since there is no per-attempt acknowledgment from the destination 1621 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in 1622 * rate_n_flags field. After receiving a block-ack, the driver can update 1623 * history for the entire block all at once. 1624 * 1625 * 1626 * FINDING BEST STARTING RATE: 1627 * 1628 * When working with a selected initial modulation mode (see below), the 1629 * driver attempts to find a best initial rate. The initial rate is the 1630 * first entry in the Link Quality command's rate table. 1631 * 1632 * 1) Calculate actual throughput (success ratio * expected throughput, see 1633 * table below) for current initial rate. Do this only if enough frames 1634 * have been attempted to make the value meaningful: at least 6 failed 1635 * tx attempts, or at least 8 successes. If not enough, don't try rate 1636 * scaling yet. 1637 * 1638 * 2) Find available rates adjacent to current initial rate. Available means: 1639 * a) supported by hardware && 1640 * b) supported by association && 1641 * c) within any constraints selected by user 1642 * 1643 * 3) Gather measured throughputs for adjacent rates. These might not have 1644 * enough history to calculate a throughput. That's okay, we might try 1645 * using one of them anyway! 1646 * 1647 * 4) Try decreasing rate if, for current rate: 1648 * a) success ratio is < 15% || 1649 * b) lower adjacent rate has better measured throughput || 1650 * c) higher adjacent rate has worse throughput, and lower is unmeasured 1651 * 1652 * As a sanity check, if decrease was determined above, leave rate 1653 * unchanged if: 1654 * a) lower rate unavailable 1655 * b) success ratio at current rate > 85% (very good) 1656 * c) current measured throughput is better than expected throughput 1657 * of lower rate (under perfect 100% tx conditions, see table below) 1658 * 1659 * 5) Try increasing rate if, for current rate: 1660 * a) success ratio is < 15% || 1661 * b) both adjacent rates' throughputs are unmeasured (try it!) || 1662 * b) higher adjacent rate has better measured throughput || 1663 * c) lower adjacent rate has worse throughput, and higher is unmeasured 1664 * 1665 * As a sanity check, if increase was determined above, leave rate 1666 * unchanged if: 1667 * a) success ratio at current rate < 70%. This is not particularly 1668 * good performance; higher rate is sure to have poorer success. 1669 * 1670 * 6) Re-evaluate the rate after each tx frame. If working with block- 1671 * acknowledge, history and statistics may be calculated for the entire 1672 * block (including prior history that fits within the history windows), 1673 * before re-evaluation. 1674 * 1675 * FINDING BEST STARTING MODULATION MODE: 1676 * 1677 * After working with a modulation mode for a "while" (and doing rate scaling), 1678 * the driver searches for a new initial mode in an attempt to improve 1679 * throughput. The "while" is measured by numbers of attempted frames: 1680 * 1681 * For legacy mode, search for new mode after: 1682 * 480 successful frames, or 160 failed frames 1683 * For high-throughput modes (SISO or MIMO), search for new mode after: 1684 * 4500 successful frames, or 400 failed frames 1685 * 1686 * Mode switch possibilities are (3 for each mode): 1687 * 1688 * For legacy: 1689 * Change antenna, try SISO (if HT association), try MIMO (if HT association) 1690 * For SISO: 1691 * Change antenna, try MIMO, try shortened guard interval (SGI) 1692 * For MIMO: 1693 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI) 1694 * 1695 * When trying a new mode, use the same bit rate as the old/current mode when 1696 * trying antenna switches and shortened guard interval. When switching to 1697 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate 1698 * for which the expected throughput (under perfect conditions) is about the 1699 * same or slightly better than the actual measured throughput delivered by 1700 * the old/current mode. 1701 * 1702 * Actual throughput can be estimated by multiplying the expected throughput 1703 * by the success ratio (successful / attempted tx frames). Frame size is 1704 * not considered in this calculation; it assumes that frame size will average 1705 * out to be fairly consistent over several samples. The following are 1706 * metric values for expected throughput assuming 100% success ratio. 1707 * Only G band has support for CCK rates: 1708 * 1709 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60 1710 * 1711 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186 1712 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186 1713 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202 1714 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211 1715 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251 1716 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257 1717 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257 1718 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264 1719 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289 1720 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293 1721 * 1722 * After the new mode has been tried for a short while (minimum of 6 failed 1723 * frames or 8 successful frames), compare success ratio and actual throughput 1724 * estimate of the new mode with the old. If either is better with the new 1725 * mode, continue to use the new mode. 1726 * 1727 * Continue comparing modes until all 3 possibilities have been tried. 1728 * If moving from legacy to HT, try all 3 possibilities from the new HT 1729 * mode. After trying all 3, a best mode is found. Continue to use this mode 1730 * for the longer "while" described above (e.g. 480 successful frames for 1731 * legacy), and then repeat the search process. 1732 * 1733 */ 1734struct iwl_link_quality_cmd { 1735 1736 /* Index of destination/recipient station in uCode's station table */ 1737 u8 sta_id; 1738 u8 reserved1; 1739 __le16 control; /* not used */ 1740 struct iwl_link_qual_general_params general_params; 1741 struct iwl_link_qual_agg_params agg_params; 1742 1743 /* 1744 * Rate info; when using rate-scaling, Tx command's initial_rate_index 1745 * specifies 1st Tx rate attempted, via index into this table. 1746 * agn devices works its way through table when retrying Tx. 1747 */ 1748 struct { 1749 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ 1750 } rs_table[LINK_QUAL_MAX_RETRY_NUM]; 1751 __le32 reserved2; 1752} __packed; 1753 1754/* 1755 * BT configuration enable flags: 1756 * bit 0 - 1: BT channel announcement enabled 1757 * 0: disable 1758 * bit 1 - 1: priority of BT device enabled 1759 * 0: disable 1760 * bit 2 - 1: BT 2 wire support enabled 1761 * 0: disable 1762 */ 1763#define BT_COEX_DISABLE (0x0) 1764#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0) 1765#define BT_ENABLE_PRIORITY BIT(1) 1766#define BT_ENABLE_2_WIRE BIT(2) 1767 1768#define BT_COEX_DISABLE (0x0) 1769#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY) 1770 1771#define BT_LEAD_TIME_MIN (0x0) 1772#define BT_LEAD_TIME_DEF (0x1E) 1773#define BT_LEAD_TIME_MAX (0xFF) 1774 1775#define BT_MAX_KILL_MIN (0x1) 1776#define BT_MAX_KILL_DEF (0x5) 1777#define BT_MAX_KILL_MAX (0xFF) 1778 1779#define BT_DURATION_LIMIT_DEF 625 1780#define BT_DURATION_LIMIT_MAX 1250 1781#define BT_DURATION_LIMIT_MIN 625 1782 1783#define BT_ON_THRESHOLD_DEF 4 1784#define BT_ON_THRESHOLD_MAX 1000 1785#define BT_ON_THRESHOLD_MIN 1 1786 1787#define BT_FRAG_THRESHOLD_DEF 0 1788#define BT_FRAG_THRESHOLD_MAX 0 1789#define BT_FRAG_THRESHOLD_MIN 0 1790 1791#define BT_AGG_THRESHOLD_DEF 1200 1792#define BT_AGG_THRESHOLD_MAX 8000 1793#define BT_AGG_THRESHOLD_MIN 400 1794 1795/* 1796 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) 1797 * 1798 * agn devices support hardware handshake with Bluetooth device on 1799 * same platform. Bluetooth device alerts wireless device when it will Tx; 1800 * wireless device can delay or kill its own Tx to accommodate. 1801 */ 1802struct iwl_bt_cmd { 1803 u8 flags; 1804 u8 lead_time; 1805 u8 max_kill; 1806 u8 reserved; 1807 __le32 kill_ack_mask; 1808 __le32 kill_cts_mask; 1809} __packed; 1810 1811#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0) 1812 1813#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5)) 1814#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3 1815#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0 1816#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1 1817#define IWLAGN_BT_FLAG_COEX_MODE_3W 2 1818#define IWLAGN_BT_FLAG_COEX_MODE_4W 3 1819 1820#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) 1821/* Disable Sync PSPoll on SCO/eSCO */ 1822#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) 1823 1824#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */ 1825#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */ 1826 1827#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF 1828#define IWLAGN_BT_PRIO_BOOST_MIN 0x00 1829#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0 1830#define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0 1831 1832#define IWLAGN_BT_MAX_KILL_DEFAULT 5 1833 1834#define IWLAGN_BT3_T7_DEFAULT 1 1835 1836enum iwl_bt_kill_idx { 1837 IWL_BT_KILL_DEFAULT = 0, 1838 IWL_BT_KILL_OVERRIDE = 1, 1839 IWL_BT_KILL_REDUCE = 2, 1840}; 1841 1842#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) 1843#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) 1844#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff) 1845#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0) 1846 1847#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 1848 1849#define IWLAGN_BT3_T2_DEFAULT 0xc 1850 1851#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0)) 1852#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1)) 1853#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2)) 1854#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3)) 1855#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4)) 1856#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5)) 1857#define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6)) 1858#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7)) 1859 1860#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \ 1861 IWLAGN_BT_VALID_BOOST | \ 1862 IWLAGN_BT_VALID_MAX_KILL | \ 1863 IWLAGN_BT_VALID_3W_TIMERS | \ 1864 IWLAGN_BT_VALID_KILL_ACK_MASK | \ 1865 IWLAGN_BT_VALID_KILL_CTS_MASK | \ 1866 IWLAGN_BT_VALID_REDUCED_TX_PWR | \ 1867 IWLAGN_BT_VALID_3W_LUT) 1868 1869#define IWLAGN_BT_REDUCED_TX_PWR BIT(0) 1870 1871#define IWLAGN_BT_DECISION_LUT_SIZE 12 1872 1873struct iwl_basic_bt_cmd { 1874 u8 flags; 1875 u8 ledtime; /* unused */ 1876 u8 max_kill; 1877 u8 bt3_timer_t7_value; 1878 __le32 kill_ack_mask; 1879 __le32 kill_cts_mask; 1880 u8 bt3_prio_sample_time; 1881 u8 bt3_timer_t2_value; 1882 __le16 bt4_reaction_time; /* unused */ 1883 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE]; 1884 /* 1885 * bit 0: use reduced tx power for control frame 1886 * bit 1 - 7: reserved 1887 */ 1888 u8 reduce_txpower; 1889 u8 reserved; 1890 __le16 valid; 1891}; 1892 1893struct iwl_bt_cmd_v1 { 1894 struct iwl_basic_bt_cmd basic; 1895 u8 prio_boost; 1896 /* 1897 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1898 * if configure the following patterns 1899 */ 1900 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1901 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1902}; 1903 1904struct iwl_bt_cmd_v2 { 1905 struct iwl_basic_bt_cmd basic; 1906 __le32 prio_boost; 1907 /* 1908 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1909 * if configure the following patterns 1910 */ 1911 u8 reserved; 1912 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1913 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1914}; 1915 1916#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0)) 1917 1918struct iwlagn_bt_sco_cmd { 1919 __le32 flags; 1920}; 1921 1922/****************************************************************************** 1923 * (6) 1924 * Spectrum Management (802.11h) Commands, Responses, Notifications: 1925 * 1926 *****************************************************************************/ 1927 1928/* 1929 * Spectrum Management 1930 */ 1931#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ 1932 RXON_FILTER_CTL2HOST_MSK | \ 1933 RXON_FILTER_ACCEPT_GRP_MSK | \ 1934 RXON_FILTER_DIS_DECRYPT_MSK | \ 1935 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ 1936 RXON_FILTER_ASSOC_MSK | \ 1937 RXON_FILTER_BCON_AWARE_MSK) 1938 1939struct iwl_measure_channel { 1940 __le32 duration; /* measurement duration in extended beacon 1941 * format */ 1942 u8 channel; /* channel to measure */ 1943 u8 type; /* see enum iwl_measure_type */ 1944 __le16 reserved; 1945} __packed; 1946 1947/* 1948 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) 1949 */ 1950struct iwl_spectrum_cmd { 1951 __le16 len; /* number of bytes starting from token */ 1952 u8 token; /* token id */ 1953 u8 id; /* measurement id -- 0 or 1 */ 1954 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ 1955 u8 periodic; /* 1 = periodic */ 1956 __le16 path_loss_timeout; 1957 __le32 start_time; /* start time in extended beacon format */ 1958 __le32 reserved2; 1959 __le32 flags; /* rxon flags */ 1960 __le32 filter_flags; /* rxon filter flags */ 1961 __le16 channel_count; /* minimum 1, maximum 10 */ 1962 __le16 reserved3; 1963 struct iwl_measure_channel channels[10]; 1964} __packed; 1965 1966/* 1967 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) 1968 */ 1969struct iwl_spectrum_resp { 1970 u8 token; 1971 u8 id; /* id of the prior command replaced, or 0xff */ 1972 __le16 status; /* 0 - command will be handled 1973 * 1 - cannot handle (conflicts with another 1974 * measurement) */ 1975} __packed; 1976 1977enum iwl_measurement_state { 1978 IWL_MEASUREMENT_START = 0, 1979 IWL_MEASUREMENT_STOP = 1, 1980}; 1981 1982enum iwl_measurement_status { 1983 IWL_MEASUREMENT_OK = 0, 1984 IWL_MEASUREMENT_CONCURRENT = 1, 1985 IWL_MEASUREMENT_CSA_CONFLICT = 2, 1986 IWL_MEASUREMENT_TGH_CONFLICT = 3, 1987 /* 4-5 reserved */ 1988 IWL_MEASUREMENT_STOPPED = 6, 1989 IWL_MEASUREMENT_TIMEOUT = 7, 1990 IWL_MEASUREMENT_PERIODIC_FAILED = 8, 1991}; 1992 1993#define NUM_ELEMENTS_IN_HISTOGRAM 8 1994 1995struct iwl_measurement_histogram { 1996 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ 1997 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ 1998} __packed; 1999 2000/* clear channel availability counters */ 2001struct iwl_measurement_cca_counters { 2002 __le32 ofdm; 2003 __le32 cck; 2004} __packed; 2005 2006enum iwl_measure_type { 2007 IWL_MEASURE_BASIC = (1 << 0), 2008 IWL_MEASURE_CHANNEL_LOAD = (1 << 1), 2009 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), 2010 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), 2011 IWL_MEASURE_FRAME = (1 << 4), 2012 /* bits 5:6 are reserved */ 2013 IWL_MEASURE_IDLE = (1 << 7), 2014}; 2015 2016/* 2017 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) 2018 */ 2019struct iwl_spectrum_notification { 2020 u8 id; /* measurement id -- 0 or 1 */ 2021 u8 token; 2022 u8 channel_index; /* index in measurement channel list */ 2023 u8 state; /* 0 - start, 1 - stop */ 2024 __le32 start_time; /* lower 32-bits of TSF */ 2025 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ 2026 u8 channel; 2027 u8 type; /* see enum iwl_measurement_type */ 2028 u8 reserved1; 2029 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only 2030 * valid if applicable for measurement type requested. */ 2031 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ 2032 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ 2033 __le32 cca_time; /* channel load time in usecs */ 2034 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - 2035 * unidentified */ 2036 u8 reserved2[3]; 2037 struct iwl_measurement_histogram histogram; 2038 __le32 stop_time; /* lower 32-bits of TSF */ 2039 __le32 status; /* see iwl_measurement_status */ 2040} __packed; 2041 2042/****************************************************************************** 2043 * (7) 2044 * Power Management Commands, Responses, Notifications: 2045 * 2046 *****************************************************************************/ 2047 2048/* 2049 * struct iwl_powertable_cmd - Power Table Command 2050 * @flags: See below: 2051 * 2052 * POWER_TABLE_CMD = 0x77 (command, has simple generic response) 2053 * 2054 * PM allow: 2055 * bit 0 - '0' Driver not allow power management 2056 * '1' Driver allow PM (use rest of parameters) 2057 * 2058 * uCode send sleep notifications: 2059 * bit 1 - '0' Don't send sleep notification 2060 * '1' send sleep notification (SEND_PM_NOTIFICATION) 2061 * 2062 * Sleep over DTIM 2063 * bit 2 - '0' PM have to walk up every DTIM 2064 * '1' PM could sleep over DTIM till listen Interval. 2065 * 2066 * PCI power managed 2067 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1) 2068 * '1' !(PCI_CFG_LINK_CTRL & 0x1) 2069 * 2070 * Fast PD 2071 * bit 4 - '1' Put radio to sleep when receiving frame for others 2072 * 2073 * Force sleep Modes 2074 * bit 31/30- '00' use both mac/xtal sleeps 2075 * '01' force Mac sleep 2076 * '10' force xtal sleep 2077 * '11' Illegal set 2078 * 2079 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then 2080 * ucode assume sleep over DTIM is allowed and we don't need to wake up 2081 * for every DTIM. 2082 */ 2083#define IWL_POWER_VEC_SIZE 5 2084 2085#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) 2086#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) 2087#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) 2088#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) 2089#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) 2090#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) 2091#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) 2092#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) 2093#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) 2094#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) 2095#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) 2096 2097struct iwl_powertable_cmd { 2098 __le16 flags; 2099 u8 keep_alive_seconds; 2100 u8 debug_flags; 2101 __le32 rx_data_timeout; 2102 __le32 tx_data_timeout; 2103 __le32 sleep_interval[IWL_POWER_VEC_SIZE]; 2104 __le32 keep_alive_beacons; 2105} __packed; 2106 2107/* 2108 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) 2109 * all devices identical. 2110 */ 2111struct iwl_sleep_notification { 2112 u8 pm_sleep_mode; 2113 u8 pm_wakeup_src; 2114 __le16 reserved; 2115 __le32 sleep_time; 2116 __le32 tsf_low; 2117 __le32 bcon_timer; 2118} __packed; 2119 2120/* Sleep states. all devices identical. */ 2121enum { 2122 IWL_PM_NO_SLEEP = 0, 2123 IWL_PM_SLP_MAC = 1, 2124 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, 2125 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, 2126 IWL_PM_SLP_PHY = 4, 2127 IWL_PM_SLP_REPENT = 5, 2128 IWL_PM_WAKEUP_BY_TIMER = 6, 2129 IWL_PM_WAKEUP_BY_DRIVER = 7, 2130 IWL_PM_WAKEUP_BY_RFKILL = 8, 2131 /* 3 reserved */ 2132 IWL_PM_NUM_OF_MODES = 12, 2133}; 2134 2135/* 2136 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) 2137 */ 2138#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ 2139#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ 2140#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ 2141struct iwl_card_state_cmd { 2142 __le32 status; /* CARD_STATE_CMD_* request new power state */ 2143} __packed; 2144 2145/* 2146 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) 2147 */ 2148struct iwl_card_state_notif { 2149 __le32 flags; 2150} __packed; 2151 2152#define HW_CARD_DISABLED 0x01 2153#define SW_CARD_DISABLED 0x02 2154#define CT_CARD_DISABLED 0x04 2155#define RXON_CARD_DISABLED 0x10 2156 2157struct iwl_ct_kill_config { 2158 __le32 reserved; 2159 __le32 critical_temperature_M; 2160 __le32 critical_temperature_R; 2161} __packed; 2162 2163/* 1000, and 6x00 */ 2164struct iwl_ct_kill_throttling_config { 2165 __le32 critical_temperature_exit; 2166 __le32 reserved; 2167 __le32 critical_temperature_enter; 2168} __packed; 2169 2170/****************************************************************************** 2171 * (8) 2172 * Scan Commands, Responses, Notifications: 2173 * 2174 *****************************************************************************/ 2175 2176#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0) 2177#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1) 2178 2179/* 2180 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table 2181 * 2182 * One for each channel in the scan list. 2183 * Each channel can independently select: 2184 * 1) SSID for directed active scans 2185 * 2) Txpower setting (for rate specified within Tx command) 2186 * 3) How long to stay on-channel (behavior may be modified by quiet_time, 2187 * quiet_plcp_th, good_CRC_th) 2188 * 2189 * To avoid uCode errors, make sure the following are true (see comments 2190 * under struct iwl_scan_cmd about max_out_time and quiet_time): 2191 * 1) If using passive_dwell (i.e. passive_dwell != 0): 2192 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) 2193 * 2) quiet_time <= active_dwell 2194 * 3) If restricting off-channel time (i.e. max_out_time !=0): 2195 * passive_dwell < max_out_time 2196 * active_dwell < max_out_time 2197 */ 2198 2199struct iwl_scan_channel { 2200 /* 2201 * type is defined as: 2202 * 0:0 1 = active, 0 = passive 2203 * 1:20 SSID direct bit map; if a bit is set, then corresponding 2204 * SSID IE is transmitted in probe request. 2205 * 21:31 reserved 2206 */ 2207 __le32 type; 2208 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */ 2209 u8 tx_gain; /* gain for analog radio */ 2210 u8 dsp_atten; /* gain for DSP */ 2211 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ 2212 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ 2213} __packed; 2214 2215/* set number of direct probes __le32 type */ 2216#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) 2217 2218/* 2219 * struct iwl_ssid_ie - directed scan network information element 2220 * 2221 * Up to 20 of these may appear in REPLY_SCAN_CMD, 2222 * selected by "type" bit field in struct iwl_scan_channel; 2223 * each channel may select different ssids from among the 20 entries. 2224 * SSID IEs get transmitted in reverse order of entry. 2225 */ 2226struct iwl_ssid_ie { 2227 u8 id; 2228 u8 len; 2229 u8 ssid[32]; 2230} __packed; 2231 2232#define PROBE_OPTION_MAX 20 2233#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2234#define IWL_GOOD_CRC_TH_DISABLED 0 2235#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) 2236#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) 2237#define IWL_MAX_CMD_SIZE 4096 2238 2239/* 2240 * REPLY_SCAN_CMD = 0x80 (command) 2241 * 2242 * The hardware scan command is very powerful; the driver can set it up to 2243 * maintain (relatively) normal network traffic while doing a scan in the 2244 * background. The max_out_time and suspend_time control the ratio of how 2245 * long the device stays on an associated network channel ("service channel") 2246 * vs. how long it's away from the service channel, i.e. tuned to other channels 2247 * for scanning. 2248 * 2249 * max_out_time is the max time off-channel (in usec), and suspend_time 2250 * is how long (in "extended beacon" format) that the scan is "suspended" 2251 * after returning to the service channel. That is, suspend_time is the 2252 * time that we stay on the service channel, doing normal work, between 2253 * scan segments. The driver may set these parameters differently to support 2254 * scanning when associated vs. not associated, and light vs. heavy traffic 2255 * loads when associated. 2256 * 2257 * After receiving this command, the device's scan engine does the following; 2258 * 2259 * 1) Sends SCAN_START notification to driver 2260 * 2) Checks to see if it has time to do scan for one channel 2261 * 3) Sends NULL packet, with power-save (PS) bit set to 1, 2262 * to tell AP that we're going off-channel 2263 * 4) Tunes to first channel in scan list, does active or passive scan 2264 * 5) Sends SCAN_RESULT notification to driver 2265 * 6) Checks to see if it has time to do scan on *next* channel in list 2266 * 7) Repeats 4-6 until it no longer has time to scan the next channel 2267 * before max_out_time expires 2268 * 8) Returns to service channel 2269 * 9) Sends NULL packet with PS=0 to tell AP that we're back 2270 * 10) Stays on service channel until suspend_time expires 2271 * 11) Repeats entire process 2-10 until list is complete 2272 * 12) Sends SCAN_COMPLETE notification 2273 * 2274 * For fast, efficient scans, the scan command also has support for staying on 2275 * a channel for just a short time, if doing active scanning and getting no 2276 * responses to the transmitted probe request. This time is controlled by 2277 * quiet_time, and the number of received packets below which a channel is 2278 * considered "quiet" is controlled by quiet_plcp_threshold. 2279 * 2280 * For active scanning on channels that have regulatory restrictions against 2281 * blindly transmitting, the scan can listen before transmitting, to make sure 2282 * that there is already legitimate activity on the channel. If enough 2283 * packets are cleanly received on the channel (controlled by good_CRC_th, 2284 * typical value 1), the scan engine starts transmitting probe requests. 2285 * 2286 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. 2287 * 2288 * To avoid uCode errors, see timing restrictions described under 2289 * struct iwl_scan_channel. 2290 */ 2291 2292enum iwl_scan_flags { 2293 /* BIT(0) currently unused */ 2294 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), 2295 /* bits 2-7 reserved */ 2296}; 2297 2298struct iwl_scan_cmd { 2299 __le16 len; 2300 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */ 2301 u8 channel_count; /* # channels in channel list */ 2302 __le16 quiet_time; /* dwell only this # millisecs on quiet channel 2303 * (only for active scan) */ 2304 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ 2305 __le16 good_CRC_th; /* passive -> active promotion threshold */ 2306 __le16 rx_chain; /* RXON_RX_CHAIN_* */ 2307 __le32 max_out_time; /* max usec to be away from associated (service) 2308 * channel */ 2309 __le32 suspend_time; /* pause scan this long (in "extended beacon 2310 * format") when returning to service chnl: 2311 */ 2312 __le32 flags; /* RXON_FLG_* */ 2313 __le32 filter_flags; /* RXON_FILTER_* */ 2314 2315 /* For active scans (set to all-0s for passive scans). 2316 * Does not include payload. Must specify Tx rate; no rate scaling. */ 2317 struct iwl_tx_cmd_hdr tx_cmd; 2318 2319 /* For directed active scans (set to all-0s otherwise) */ 2320 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX]; 2321 2322 /* 2323 * Probe request frame, followed by channel list. 2324 * 2325 * Size of probe request frame is specified by byte count in tx_cmd. 2326 * Channel list follows immediately after probe request frame. 2327 * Number of channels in list is specified by channel_count. 2328 * Each channel in list is of type: 2329 * 2330 * struct iwl_scan_channel channels[0]; 2331 * 2332 * NOTE: Only one band of channels can be scanned per pass. You 2333 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait 2334 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) 2335 * before requesting another scan. 2336 */ 2337 u8 data[]; 2338} __packed; 2339 2340/* Can abort will notify by complete notification with abort status. */ 2341#define CAN_ABORT_STATUS cpu_to_le32(0x1) 2342/* complete notification statuses */ 2343#define ABORT_STATUS 0x2 2344 2345/* 2346 * REPLY_SCAN_CMD = 0x80 (response) 2347 */ 2348struct iwl_scanreq_notification { 2349 __le32 status; /* 1: okay, 2: cannot fulfill request */ 2350} __packed; 2351 2352/* 2353 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) 2354 */ 2355struct iwl_scanstart_notification { 2356 __le32 tsf_low; 2357 __le32 tsf_high; 2358 __le32 beacon_timer; 2359 u8 channel; 2360 u8 band; 2361 u8 reserved[2]; 2362 __le32 status; 2363} __packed; 2364 2365#define SCAN_OWNER_STATUS 0x1 2366#define MEASURE_OWNER_STATUS 0x2 2367 2368#define IWL_PROBE_STATUS_OK 0 2369#define IWL_PROBE_STATUS_TX_FAILED BIT(0) 2370/* error statuses combined with TX_FAILED */ 2371#define IWL_PROBE_STATUS_FAIL_TTL BIT(1) 2372#define IWL_PROBE_STATUS_FAIL_BT BIT(2) 2373 2374#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ 2375/* 2376 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) 2377 */ 2378struct iwl_scanresults_notification { 2379 u8 channel; 2380 u8 band; 2381 u8 probe_status; 2382 u8 num_probe_not_sent; /* not enough time to send */ 2383 __le32 tsf_low; 2384 __le32 tsf_high; 2385 __le32 statistics[NUMBER_OF_STATISTICS]; 2386} __packed; 2387 2388/* 2389 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) 2390 */ 2391struct iwl_scancomplete_notification { 2392 u8 scanned_channels; 2393 u8 status; 2394 u8 bt_status; /* BT On/Off status */ 2395 u8 last_channel; 2396 __le32 tsf_low; 2397 __le32 tsf_high; 2398} __packed; 2399 2400 2401/****************************************************************************** 2402 * (9) 2403 * IBSS/AP Commands and Notifications: 2404 * 2405 *****************************************************************************/ 2406 2407enum iwl_ibss_manager { 2408 IWL_NOT_IBSS_MANAGER = 0, 2409 IWL_IBSS_MANAGER = 1, 2410}; 2411 2412/* 2413 * BEACON_NOTIFICATION = 0x90 (notification only, not a command) 2414 */ 2415 2416struct iwlagn_beacon_notif { 2417 struct iwlagn_tx_resp beacon_notify_hdr; 2418 __le32 low_tsf; 2419 __le32 high_tsf; 2420 __le32 ibss_mgr_status; 2421} __packed; 2422 2423/* 2424 * REPLY_TX_BEACON = 0x91 (command, has simple generic response) 2425 */ 2426 2427struct iwl_tx_beacon_cmd { 2428 struct iwl_tx_cmd_hdr tx; 2429 __le16 tim_idx; 2430 u8 tim_size; 2431 u8 reserved1; 2432 struct ieee80211_hdr frame[]; /* beacon frame */ 2433} __packed; 2434 2435/****************************************************************************** 2436 * (10) 2437 * Statistics Commands and Notifications: 2438 * 2439 *****************************************************************************/ 2440 2441#define IWL_TEMP_CONVERT 260 2442 2443#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 2444#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 2445#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 2446 2447/* Used for passing to driver number of successes and failures per rate */ 2448struct rate_histogram { 2449 union { 2450 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2451 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2452 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2453 } success; 2454 union { 2455 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2456 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2457 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2458 } failed; 2459} __packed; 2460 2461/* statistics command response */ 2462 2463struct statistics_dbg { 2464 __le32 burst_check; 2465 __le32 burst_count; 2466 __le32 wait_for_silence_timeout_cnt; 2467 __le32 reserved[3]; 2468} __packed; 2469 2470struct statistics_rx_phy { 2471 __le32 ina_cnt; 2472 __le32 fina_cnt; 2473 __le32 plcp_err; 2474 __le32 crc32_err; 2475 __le32 overrun_err; 2476 __le32 early_overrun_err; 2477 __le32 crc32_good; 2478 __le32 false_alarm_cnt; 2479 __le32 fina_sync_err_cnt; 2480 __le32 sfd_timeout; 2481 __le32 fina_timeout; 2482 __le32 unresponded_rts; 2483 __le32 rxe_frame_limit_overrun; 2484 __le32 sent_ack_cnt; 2485 __le32 sent_cts_cnt; 2486 __le32 sent_ba_rsp_cnt; 2487 __le32 dsp_self_kill; 2488 __le32 mh_format_err; 2489 __le32 re_acq_main_rssi_sum; 2490 __le32 reserved3; 2491} __packed; 2492 2493struct statistics_rx_ht_phy { 2494 __le32 plcp_err; 2495 __le32 overrun_err; 2496 __le32 early_overrun_err; 2497 __le32 crc32_good; 2498 __le32 crc32_err; 2499 __le32 mh_format_err; 2500 __le32 agg_crc32_good; 2501 __le32 agg_mpdu_cnt; 2502 __le32 agg_cnt; 2503 __le32 unsupport_mcs; 2504} __packed; 2505 2506#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) 2507 2508struct statistics_rx_non_phy { 2509 __le32 bogus_cts; /* CTS received when not expecting CTS */ 2510 __le32 bogus_ack; /* ACK received when not expecting ACK */ 2511 __le32 non_bssid_frames; /* number of frames with BSSID that 2512 * doesn't belong to the STA BSSID */ 2513 __le32 filtered_frames; /* count frames that were dumped in the 2514 * filtering process */ 2515 __le32 non_channel_beacons; /* beacons with our bss id but not on 2516 * our serving channel */ 2517 __le32 channel_beacons; /* beacons with our bss id and in our 2518 * serving channel */ 2519 __le32 num_missed_bcon; /* number of missed beacons */ 2520 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the 2521 * ADC was in saturation */ 2522 __le32 ina_detection_search_time;/* total time (in 0.8us) searched 2523 * for INA */ 2524 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ 2525 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ 2526 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ 2527 __le32 interference_data_flag; /* flag for interference data 2528 * availability. 1 when data is 2529 * available. */ 2530 __le32 channel_load; /* counts RX Enable time in uSec */ 2531 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM 2532 * and CCK) counter */ 2533 __le32 beacon_rssi_a; 2534 __le32 beacon_rssi_b; 2535 __le32 beacon_rssi_c; 2536 __le32 beacon_energy_a; 2537 __le32 beacon_energy_b; 2538 __le32 beacon_energy_c; 2539} __packed; 2540 2541struct statistics_rx_non_phy_bt { 2542 struct statistics_rx_non_phy common; 2543 /* additional stats for bt */ 2544 __le32 num_bt_kills; 2545 __le32 reserved[2]; 2546} __packed; 2547 2548struct statistics_rx { 2549 struct statistics_rx_phy ofdm; 2550 struct statistics_rx_phy cck; 2551 struct statistics_rx_non_phy general; 2552 struct statistics_rx_ht_phy ofdm_ht; 2553} __packed; 2554 2555struct statistics_rx_bt { 2556 struct statistics_rx_phy ofdm; 2557 struct statistics_rx_phy cck; 2558 struct statistics_rx_non_phy_bt general; 2559 struct statistics_rx_ht_phy ofdm_ht; 2560} __packed; 2561 2562/** 2563 * struct statistics_tx_power - current tx power 2564 * 2565 * @ant_a: current tx power on chain a in 1/2 dB step 2566 * @ant_b: current tx power on chain b in 1/2 dB step 2567 * @ant_c: current tx power on chain c in 1/2 dB step 2568 * @reserved: reserved for alignment 2569 */ 2570struct statistics_tx_power { 2571 u8 ant_a; 2572 u8 ant_b; 2573 u8 ant_c; 2574 u8 reserved; 2575} __packed; 2576 2577struct statistics_tx_non_phy_agg { 2578 __le32 ba_timeout; 2579 __le32 ba_reschedule_frames; 2580 __le32 scd_query_agg_frame_cnt; 2581 __le32 scd_query_no_agg; 2582 __le32 scd_query_agg; 2583 __le32 scd_query_mismatch; 2584 __le32 frame_not_ready; 2585 __le32 underrun; 2586 __le32 bt_prio_kill; 2587 __le32 rx_ba_rsp_cnt; 2588} __packed; 2589 2590struct statistics_tx { 2591 __le32 preamble_cnt; 2592 __le32 rx_detected_cnt; 2593 __le32 bt_prio_defer_cnt; 2594 __le32 bt_prio_kill_cnt; 2595 __le32 few_bytes_cnt; 2596 __le32 cts_timeout; 2597 __le32 ack_timeout; 2598 __le32 expected_ack_cnt; 2599 __le32 actual_ack_cnt; 2600 __le32 dump_msdu_cnt; 2601 __le32 burst_abort_next_frame_mismatch_cnt; 2602 __le32 burst_abort_missing_next_frame_cnt; 2603 __le32 cts_timeout_collision; 2604 __le32 ack_or_ba_timeout_collision; 2605 struct statistics_tx_non_phy_agg agg; 2606 /* 2607 * "tx_power" are optional parameters provided by uCode, 2608 * 6000 series is the only device provide the information, 2609 * Those are reserved fields for all the other devices 2610 */ 2611 struct statistics_tx_power tx_power; 2612 __le32 reserved1; 2613} __packed; 2614 2615 2616struct statistics_div { 2617 __le32 tx_on_a; 2618 __le32 tx_on_b; 2619 __le32 exec_time; 2620 __le32 probe_time; 2621 __le32 reserved1; 2622 __le32 reserved2; 2623} __packed; 2624 2625struct statistics_general_common { 2626 __le32 temperature; /* radio temperature */ 2627 __le32 temperature_m; /* radio voltage */ 2628 struct statistics_dbg dbg; 2629 __le32 sleep_time; 2630 __le32 slots_out; 2631 __le32 slots_idle; 2632 __le32 ttl_timestamp; 2633 struct statistics_div div; 2634 __le32 rx_enable_counter; 2635 /* 2636 * num_of_sos_states: 2637 * count the number of times we have to re-tune 2638 * in order to get out of bad PHY status 2639 */ 2640 __le32 num_of_sos_states; 2641} __packed; 2642 2643struct statistics_bt_activity { 2644 /* Tx statistics */ 2645 __le32 hi_priority_tx_req_cnt; 2646 __le32 hi_priority_tx_denied_cnt; 2647 __le32 lo_priority_tx_req_cnt; 2648 __le32 lo_priority_tx_denied_cnt; 2649 /* Rx statistics */ 2650 __le32 hi_priority_rx_req_cnt; 2651 __le32 hi_priority_rx_denied_cnt; 2652 __le32 lo_priority_rx_req_cnt; 2653 __le32 lo_priority_rx_denied_cnt; 2654} __packed; 2655 2656struct statistics_general { 2657 struct statistics_general_common common; 2658 __le32 reserved2; 2659 __le32 reserved3; 2660} __packed; 2661 2662struct statistics_general_bt { 2663 struct statistics_general_common common; 2664 struct statistics_bt_activity activity; 2665 __le32 reserved2; 2666 __le32 reserved3; 2667} __packed; 2668 2669#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) 2670#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) 2671#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2) 2672 2673/* 2674 * REPLY_STATISTICS_CMD = 0x9c, 2675 * all devices identical. 2676 * 2677 * This command triggers an immediate response containing uCode statistics. 2678 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. 2679 * 2680 * If the CLEAR_STATS configuration flag is set, uCode will clear its 2681 * internal copy of the statistics (counters) after issuing the response. 2682 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). 2683 * 2684 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue 2685 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag 2686 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. 2687 */ 2688#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ 2689#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ 2690struct iwl_statistics_cmd { 2691 __le32 configuration_flags; /* IWL_STATS_CONF_* */ 2692} __packed; 2693 2694/* 2695 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) 2696 * 2697 * By default, uCode issues this notification after receiving a beacon 2698 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the 2699 * REPLY_STATISTICS_CMD 0x9c, above. 2700 * 2701 * Statistics counters continue to increment beacon after beacon, but are 2702 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD 2703 * 0x9c with CLEAR_STATS bit set (see above). 2704 * 2705 * uCode also issues this notification during scans. uCode clears statistics 2706 * appropriately so that each notification contains statistics for only the 2707 * one channel that has just been scanned. 2708 */ 2709#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) 2710#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) 2711 2712struct iwl_notif_statistics { 2713 __le32 flag; 2714 struct statistics_rx rx; 2715 struct statistics_tx tx; 2716 struct statistics_general general; 2717} __packed; 2718 2719struct iwl_bt_notif_statistics { 2720 __le32 flag; 2721 struct statistics_rx_bt rx; 2722 struct statistics_tx tx; 2723 struct statistics_general_bt general; 2724} __packed; 2725 2726/* 2727 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) 2728 * 2729 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed 2730 * in regardless of how many missed beacons, which mean when driver receive the 2731 * notification, inside the command, it can find all the beacons information 2732 * which include number of total missed beacons, number of consecutive missed 2733 * beacons, number of beacons received and number of beacons expected to 2734 * receive. 2735 * 2736 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio 2737 * in order to bring the radio/PHY back to working state; which has no relation 2738 * to when driver will perform sensitivity calibration. 2739 * 2740 * Driver should set it own missed_beacon_threshold to decide when to perform 2741 * sensitivity calibration based on number of consecutive missed beacons in 2742 * order to improve overall performance, especially in noisy environment. 2743 * 2744 */ 2745 2746#define IWL_MISSED_BEACON_THRESHOLD_MIN (1) 2747#define IWL_MISSED_BEACON_THRESHOLD_DEF (5) 2748#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF 2749 2750struct iwl_missed_beacon_notif { 2751 __le32 consecutive_missed_beacons; 2752 __le32 total_missed_becons; 2753 __le32 num_expected_beacons; 2754 __le32 num_recvd_beacons; 2755} __packed; 2756 2757 2758/****************************************************************************** 2759 * (11) 2760 * Rx Calibration Commands: 2761 * 2762 * With the uCode used for open source drivers, most Tx calibration (except 2763 * for Tx Power) and most Rx calibration is done by uCode during the 2764 * "initialize" phase of uCode boot. Driver must calibrate only: 2765 * 2766 * 1) Tx power (depends on temperature), described elsewhere 2767 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas) 2768 * 3) Receiver sensitivity (to optimize signal detection) 2769 * 2770 *****************************************************************************/ 2771 2772/* 2773 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response) 2774 * 2775 * This command sets up the Rx signal detector for a sensitivity level that 2776 * is high enough to lock onto all signals within the associated network, 2777 * but low enough to ignore signals that are below a certain threshold, so as 2778 * not to have too many "false alarms". False alarms are signals that the 2779 * Rx DSP tries to lock onto, but then discards after determining that they 2780 * are noise. 2781 * 2782 * The optimum number of false alarms is between 5 and 50 per 200 TUs 2783 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e. 2784 * time listening, not transmitting). Driver must adjust sensitivity so that 2785 * the ratio of actual false alarms to actual Rx time falls within this range. 2786 * 2787 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each 2788 * received beacon. These provide information to the driver to analyze the 2789 * sensitivity. Don't analyze statistics that come in from scanning, or any 2790 * other non-associated-network source. Pertinent statistics include: 2791 * 2792 * From "general" statistics (struct statistics_rx_non_phy): 2793 * 2794 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level) 2795 * Measure of energy of desired signal. Used for establishing a level 2796 * below which the device does not detect signals. 2797 * 2798 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB) 2799 * Measure of background noise in silent period after beacon. 2800 * 2801 * channel_load 2802 * uSecs of actual Rx time during beacon period (varies according to 2803 * how much time was spent transmitting). 2804 * 2805 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately: 2806 * 2807 * false_alarm_cnt 2808 * Signal locks abandoned early (before phy-level header). 2809 * 2810 * plcp_err 2811 * Signal locks abandoned late (during phy-level header). 2812 * 2813 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from 2814 * beacon to beacon, i.e. each value is an accumulation of all errors 2815 * before and including the latest beacon. Values will wrap around to 0 2816 * after counting up to 2^32 - 1. Driver must differentiate vs. 2817 * previous beacon's values to determine # false alarms in the current 2818 * beacon period. 2819 * 2820 * Total number of false alarms = false_alarms + plcp_errs 2821 * 2822 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd 2823 * (notice that the start points for OFDM are at or close to settings for 2824 * maximum sensitivity): 2825 * 2826 * START / MIN / MAX 2827 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120 2828 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210 2829 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140 2830 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270 2831 * 2832 * If actual rate of OFDM false alarms (+ plcp_errors) is too high 2833 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity 2834 * by *adding* 1 to all 4 of the table entries above, up to the max for 2835 * each entry. Conversely, if false alarm rate is too low (less than 5 2836 * for each 204.8 msecs listening), *subtract* 1 from each entry to 2837 * increase sensitivity. 2838 * 2839 * For CCK sensitivity, keep track of the following: 2840 * 2841 * 1). 20-beacon history of maximum background noise, indicated by 2842 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the 2843 * 3 receivers. For any given beacon, the "silence reference" is 2844 * the maximum of last 60 samples (20 beacons * 3 receivers). 2845 * 2846 * 2). 10-beacon history of strongest signal level, as indicated 2847 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers, 2848 * i.e. the strength of the signal through the best receiver at the 2849 * moment. These measurements are "upside down", with lower values 2850 * for stronger signals, so max energy will be *minimum* value. 2851 * 2852 * Then for any given beacon, the driver must determine the *weakest* 2853 * of the strongest signals; this is the minimum level that needs to be 2854 * successfully detected, when using the best receiver at the moment. 2855 * "Max cck energy" is the maximum (higher value means lower energy!) 2856 * of the last 10 minima. Once this is determined, driver must add 2857 * a little margin by adding "6" to it. 2858 * 2859 * 3). Number of consecutive beacon periods with too few false alarms. 2860 * Reset this to 0 at the first beacon period that falls within the 2861 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx). 2862 * 2863 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd 2864 * (notice that the start points for CCK are at maximum sensitivity): 2865 * 2866 * START / MIN / MAX 2867 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200 2868 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400 2869 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100 2870 * 2871 * If actual rate of CCK false alarms (+ plcp_errors) is too high 2872 * (greater than 50 for each 204.8 msecs listening), method for reducing 2873 * sensitivity is: 2874 * 2875 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2876 * up to max 400. 2877 * 2878 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160, 2879 * sensitivity has been reduced a significant amount; bring it up to 2880 * a moderate 161. Otherwise, *add* 3, up to max 200. 2881 * 2882 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160, 2883 * sensitivity has been reduced only a moderate or small amount; 2884 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX, 2885 * down to min 0. Otherwise (if gain has been significantly reduced), 2886 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value. 2887 * 2888 * b) Save a snapshot of the "silence reference". 2889 * 2890 * If actual rate of CCK false alarms (+ plcp_errors) is too low 2891 * (less than 5 for each 204.8 msecs listening), method for increasing 2892 * sensitivity is used only if: 2893 * 2894 * 1a) Previous beacon did not have too many false alarms 2895 * 1b) AND difference between previous "silence reference" and current 2896 * "silence reference" (prev - current) is 2 or more, 2897 * OR 2) 100 or more consecutive beacon periods have had rate of 2898 * less than 5 false alarms per 204.8 milliseconds rx time. 2899 * 2900 * Method for increasing sensitivity: 2901 * 2902 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX, 2903 * down to min 125. 2904 * 2905 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2906 * down to min 200. 2907 * 2908 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100. 2909 * 2910 * If actual rate of CCK false alarms (+ plcp_errors) is within good range 2911 * (between 5 and 50 for each 204.8 msecs listening): 2912 * 2913 * 1) Save a snapshot of the silence reference. 2914 * 2915 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors), 2916 * give some extra margin to energy threshold by *subtracting* 8 2917 * from value in HD_MIN_ENERGY_CCK_DET_INDEX. 2918 * 2919 * For all cases (too few, too many, good range), make sure that the CCK 2920 * detection threshold (energy) is below the energy level for robust 2921 * detection over the past 10 beacon periods, the "Max cck energy". 2922 * Lower values mean higher energy; this means making sure that the value 2923 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". 2924 * 2925 */ 2926 2927/* 2928 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd) 2929 */ 2930#define HD_TABLE_SIZE (11) /* number of entries */ 2931#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */ 2932#define HD_MIN_ENERGY_OFDM_DET_INDEX (1) 2933#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2) 2934#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3) 2935#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4) 2936#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5) 2937#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6) 2938#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7) 2939#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8) 2940#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9) 2941#define HD_OFDM_ENERGY_TH_IN_INDEX (10) 2942 2943/* 2944 * Additional table entries in enhance SENSITIVITY_CMD 2945 */ 2946#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11) 2947#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12) 2948#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13) 2949#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14) 2950#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15) 2951#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16) 2952#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17) 2953#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18) 2954#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19) 2955#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20) 2956#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21) 2957#define HD_RESERVED (22) 2958 2959/* number of entries for enhanced tbl */ 2960#define ENHANCE_HD_TABLE_SIZE (23) 2961 2962/* number of additional entries for enhanced tbl */ 2963#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE) 2964 2965#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0) 2966#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0) 2967#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0) 2968#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668) 2969#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 2970#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486) 2971#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37) 2972#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853) 2973#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 2974#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476) 2975#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99) 2976 2977#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1) 2978#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1) 2979#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1) 2980#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600) 2981#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40) 2982#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486) 2983#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45) 2984#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853) 2985#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60) 2986#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476) 2987#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99) 2988 2989 2990/* Control field in struct iwl_sensitivity_cmd */ 2991#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0) 2992#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1) 2993 2994/** 2995 * struct iwl_sensitivity_cmd - sensitivity configuration command 2996 * @control: (1) updates working table, (0) updates default table 2997 * @table: energy threshold values, use HD_* as index into table 2998 * 2999 * Always use "1" in "control" to update uCode's working table and DSP. 3000 */ 3001struct iwl_sensitivity_cmd { 3002 __le16 control; /* always use "1" */ 3003 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ 3004} __packed; 3005 3006/* 3007 * 3008 */ 3009struct iwl_enhance_sensitivity_cmd { 3010 __le16 control; /* always use "1" */ 3011 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */ 3012} __packed; 3013 3014 3015/* 3016 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response) 3017 * 3018 * This command sets the relative gains of agn device's 3 radio receiver chains. 3019 * 3020 * After the first association, driver should accumulate signal and noise 3021 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20 3022 * beacons from the associated network (don't collect statistics that come 3023 * in from scanning, or any other non-network source). 3024 * 3025 * DISCONNECTED ANTENNA: 3026 * 3027 * Driver should determine which antennas are actually connected, by comparing 3028 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the 3029 * following values over 20 beacons, one accumulator for each of the chains 3030 * a/b/c, from struct statistics_rx_non_phy: 3031 * 3032 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB) 3033 * 3034 * Find the strongest signal from among a/b/c. Compare the other two to the 3035 * strongest. If any signal is more than 15 dB (times 20, unless you 3036 * divide the accumulated values by 20) below the strongest, the driver 3037 * considers that antenna to be disconnected, and should not try to use that 3038 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected, 3039 * driver should declare the stronger one as connected, and attempt to use it 3040 * (A and B are the only 2 Tx chains!). 3041 * 3042 * 3043 * RX BALANCE: 3044 * 3045 * Driver should balance the 3 receivers (but just the ones that are connected 3046 * to antennas, see above) for gain, by comparing the average signal levels 3047 * detected during the silence after each beacon (background noise). 3048 * Accumulate (add) the following values over 20 beacons, one accumulator for 3049 * each of the chains a/b/c, from struct statistics_rx_non_phy: 3050 * 3051 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB) 3052 * 3053 * Find the weakest background noise level from among a/b/c. This Rx chain 3054 * will be the reference, with 0 gain adjustment. Attenuate other channels by 3055 * finding noise difference: 3056 * 3057 * (accum_noise[i] - accum_noise[reference]) / 30 3058 * 3059 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB. 3060 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the 3061 * driver should limit the difference results to a range of 0-3 (0-4.5 dB), 3062 * and set bit 2 to indicate "reduce gain". The value for the reference 3063 * (weakest) chain should be "0". 3064 * 3065 * diff_gain_[abc] bit fields: 3066 * 2: (1) reduce gain, (0) increase gain 3067 * 1-0: amount of gain, units of 1.5 dB 3068 */ 3069 3070/* Phy calibration command for series */ 3071enum { 3072 IWL_PHY_CALIBRATE_DC_CMD = 8, 3073 IWL_PHY_CALIBRATE_LO_CMD = 9, 3074 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3075 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, 3076 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, 3077 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, 3078 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18, 3079}; 3080 3081/* This enum defines the bitmap of various calibrations to enable in both 3082 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 3083 */ 3084enum iwl_ucode_calib_cfg { 3085 IWL_CALIB_CFG_RX_BB_IDX = BIT(0), 3086 IWL_CALIB_CFG_DC_IDX = BIT(1), 3087 IWL_CALIB_CFG_LO_IDX = BIT(2), 3088 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3), 3089 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4), 3090 IWL_CALIB_CFG_NOISE_IDX = BIT(5), 3091 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6), 3092 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7), 3093 IWL_CALIB_CFG_PAPD_IDX = BIT(8), 3094 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9), 3095 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10), 3096}; 3097 3098#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3099 IWL_CALIB_CFG_DC_IDX | \ 3100 IWL_CALIB_CFG_LO_IDX | \ 3101 IWL_CALIB_CFG_TX_IQ_IDX | \ 3102 IWL_CALIB_CFG_RX_IQ_IDX | \ 3103 IWL_CALIB_CFG_CRYSTAL_IDX) 3104 3105#define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3106 IWL_CALIB_CFG_DC_IDX | \ 3107 IWL_CALIB_CFG_LO_IDX | \ 3108 IWL_CALIB_CFG_TX_IQ_IDX | \ 3109 IWL_CALIB_CFG_RX_IQ_IDX | \ 3110 IWL_CALIB_CFG_TEMPERATURE_IDX | \ 3111 IWL_CALIB_CFG_PAPD_IDX | \ 3112 IWL_CALIB_CFG_TX_PWR_IDX | \ 3113 IWL_CALIB_CFG_CRYSTAL_IDX) 3114 3115#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) 3116 3117struct iwl_calib_cfg_elmnt_s { 3118 __le32 is_enable; 3119 __le32 start; 3120 __le32 send_res; 3121 __le32 apply_res; 3122 __le32 reserved; 3123} __packed; 3124 3125struct iwl_calib_cfg_status_s { 3126 struct iwl_calib_cfg_elmnt_s once; 3127 struct iwl_calib_cfg_elmnt_s perd; 3128 __le32 flags; 3129} __packed; 3130 3131struct iwl_calib_cfg_cmd { 3132 struct iwl_calib_cfg_status_s ucd_calib_cfg; 3133 struct iwl_calib_cfg_status_s drv_calib_cfg; 3134 __le32 reserved1; 3135} __packed; 3136 3137struct iwl_calib_hdr { 3138 u8 op_code; 3139 u8 first_group; 3140 u8 groups_num; 3141 u8 data_valid; 3142} __packed; 3143 3144struct iwl_calib_cmd { 3145 struct iwl_calib_hdr hdr; 3146 u8 data[]; 3147} __packed; 3148 3149struct iwl_calib_xtal_freq_cmd { 3150 struct iwl_calib_hdr hdr; 3151 u8 cap_pin1; 3152 u8 cap_pin2; 3153 u8 pad[2]; 3154} __packed; 3155 3156#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700) 3157struct iwl_calib_temperature_offset_cmd { 3158 struct iwl_calib_hdr hdr; 3159 __le16 radio_sensor_offset; 3160 __le16 reserved; 3161} __packed; 3162 3163struct iwl_calib_temperature_offset_v2_cmd { 3164 struct iwl_calib_hdr hdr; 3165 __le16 radio_sensor_offset_high; 3166 __le16 radio_sensor_offset_low; 3167 __le16 burntVoltageRef; 3168 __le16 reserved; 3169} __packed; 3170 3171/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3172struct iwl_calib_chain_noise_reset_cmd { 3173 struct iwl_calib_hdr hdr; 3174 u8 data[]; 3175}; 3176 3177/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */ 3178struct iwl_calib_chain_noise_gain_cmd { 3179 struct iwl_calib_hdr hdr; 3180 u8 delta_gain_1; 3181 u8 delta_gain_2; 3182 u8 pad[2]; 3183} __packed; 3184 3185/****************************************************************************** 3186 * (12) 3187 * Miscellaneous Commands: 3188 * 3189 *****************************************************************************/ 3190 3191/* 3192 * LEDs Command & Response 3193 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) 3194 * 3195 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), 3196 * this command turns it on or off, or sets up a periodic blinking cycle. 3197 */ 3198struct iwl_led_cmd { 3199 __le32 interval; /* "interval" in uSec */ 3200 u8 id; /* 1: Activity, 2: Link, 3: Tech */ 3201 u8 off; /* # intervals off while blinking; 3202 * "0", with >0 "on" value, turns LED on */ 3203 u8 on; /* # intervals on while blinking; 3204 * "0", regardless of "off", turns LED off */ 3205 u8 reserved; 3206} __packed; 3207 3208/* 3209 * station priority table entries 3210 * also used as potential "events" value for both 3211 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD 3212 */ 3213 3214/* 3215 * COEX events entry flag masks 3216 * RP - Requested Priority 3217 * WP - Win Medium Priority: priority assigned when the contention has been won 3218 */ 3219#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1) 3220#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2) 3221#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4) 3222 3223#define COEX_CU_UNASSOC_IDLE_RP 4 3224#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4 3225#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4 3226#define COEX_CU_CALIBRATION_RP 4 3227#define COEX_CU_PERIODIC_CALIBRATION_RP 4 3228#define COEX_CU_CONNECTION_ESTAB_RP 4 3229#define COEX_CU_ASSOCIATED_IDLE_RP 4 3230#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4 3231#define COEX_CU_ASSOC_AUTO_SCAN_RP 4 3232#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4 3233#define COEX_CU_RF_ON_RP 6 3234#define COEX_CU_RF_OFF_RP 4 3235#define COEX_CU_STAND_ALONE_DEBUG_RP 6 3236#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4 3237#define COEX_CU_RSRVD1_RP 4 3238#define COEX_CU_RSRVD2_RP 4 3239 3240#define COEX_CU_UNASSOC_IDLE_WP 3 3241#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3 3242#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3 3243#define COEX_CU_CALIBRATION_WP 3 3244#define COEX_CU_PERIODIC_CALIBRATION_WP 3 3245#define COEX_CU_CONNECTION_ESTAB_WP 3 3246#define COEX_CU_ASSOCIATED_IDLE_WP 3 3247#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3 3248#define COEX_CU_ASSOC_AUTO_SCAN_WP 3 3249#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3 3250#define COEX_CU_RF_ON_WP 3 3251#define COEX_CU_RF_OFF_WP 3 3252#define COEX_CU_STAND_ALONE_DEBUG_WP 6 3253#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3 3254#define COEX_CU_RSRVD1_WP 3 3255#define COEX_CU_RSRVD2_WP 3 3256 3257#define COEX_UNASSOC_IDLE_FLAGS 0 3258#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \ 3259 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3260 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3261#define COEX_UNASSOC_AUTO_SCAN_FLAGS \ 3262 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3263 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3264#define COEX_CALIBRATION_FLAGS \ 3265 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3266 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3267#define COEX_PERIODIC_CALIBRATION_FLAGS 0 3268/* 3269 * COEX_CONNECTION_ESTAB: 3270 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3271 */ 3272#define COEX_CONNECTION_ESTAB_FLAGS \ 3273 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3274 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3275 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3276#define COEX_ASSOCIATED_IDLE_FLAGS 0 3277#define COEX_ASSOC_MANUAL_SCAN_FLAGS \ 3278 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3279 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3280#define COEX_ASSOC_AUTO_SCAN_FLAGS \ 3281 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3282 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3283#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0 3284#define COEX_RF_ON_FLAGS 0 3285#define COEX_RF_OFF_FLAGS 0 3286#define COEX_STAND_ALONE_DEBUG_FLAGS \ 3287 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3288 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3289#define COEX_IPAN_ASSOC_LEVEL_FLAGS \ 3290 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3291 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3292 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3293#define COEX_RSRVD1_FLAGS 0 3294#define COEX_RSRVD2_FLAGS 0 3295/* 3296 * COEX_CU_RF_ON is the event wrapping all radio ownership. 3297 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3298 */ 3299#define COEX_CU_RF_ON_FLAGS \ 3300 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3301 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3302 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3303 3304 3305enum { 3306 /* un-association part */ 3307 COEX_UNASSOC_IDLE = 0, 3308 COEX_UNASSOC_MANUAL_SCAN = 1, 3309 COEX_UNASSOC_AUTO_SCAN = 2, 3310 /* calibration */ 3311 COEX_CALIBRATION = 3, 3312 COEX_PERIODIC_CALIBRATION = 4, 3313 /* connection */ 3314 COEX_CONNECTION_ESTAB = 5, 3315 /* association part */ 3316 COEX_ASSOCIATED_IDLE = 6, 3317 COEX_ASSOC_MANUAL_SCAN = 7, 3318 COEX_ASSOC_AUTO_SCAN = 8, 3319 COEX_ASSOC_ACTIVE_LEVEL = 9, 3320 /* RF ON/OFF */ 3321 COEX_RF_ON = 10, 3322 COEX_RF_OFF = 11, 3323 COEX_STAND_ALONE_DEBUG = 12, 3324 /* IPAN */ 3325 COEX_IPAN_ASSOC_LEVEL = 13, 3326 /* reserved */ 3327 COEX_RSRVD1 = 14, 3328 COEX_RSRVD2 = 15, 3329 COEX_NUM_OF_EVENTS = 16 3330}; 3331 3332/* 3333 * Coexistence WIFI/WIMAX Command 3334 * COEX_PRIORITY_TABLE_CMD = 0x5a 3335 * 3336 */ 3337struct iwl_wimax_coex_event_entry { 3338 u8 request_prio; 3339 u8 win_medium_prio; 3340 u8 reserved; 3341 u8 flags; 3342} __packed; 3343 3344/* COEX flag masks */ 3345 3346/* Station table is valid */ 3347#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1) 3348/* UnMask wake up src at unassociated sleep */ 3349#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4) 3350/* UnMask wake up src at associated sleep */ 3351#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8) 3352/* Enable CoEx feature. */ 3353#define COEX_FLAGS_COEX_ENABLE_MSK (0x80) 3354 3355struct iwl_wimax_coex_cmd { 3356 u8 flags; 3357 u8 reserved[3]; 3358 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; 3359} __packed; 3360 3361/* 3362 * Coexistence MEDIUM NOTIFICATION 3363 * COEX_MEDIUM_NOTIFICATION = 0x5b 3364 * 3365 * notification from uCode to host to indicate medium changes 3366 * 3367 */ 3368/* 3369 * status field 3370 * bit 0 - 2: medium status 3371 * bit 3: medium change indication 3372 * bit 4 - 31: reserved 3373 */ 3374/* status option values, (0 - 2 bits) */ 3375#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */ 3376#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */ 3377#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */ 3378#define COEX_MEDIUM_MSK (0x7) 3379 3380/* send notification status (1 bit) */ 3381#define COEX_MEDIUM_CHANGED (0x8) 3382#define COEX_MEDIUM_CHANGED_MSK (0x8) 3383#define COEX_MEDIUM_SHIFT (3) 3384 3385struct iwl_coex_medium_notification { 3386 __le32 status; 3387 __le32 events; 3388} __packed; 3389 3390/* 3391 * Coexistence EVENT Command 3392 * COEX_EVENT_CMD = 0x5c 3393 * 3394 * send from host to uCode for coex event request. 3395 */ 3396/* flags options */ 3397#define COEX_EVENT_REQUEST_MSK (0x1) 3398 3399struct iwl_coex_event_cmd { 3400 u8 flags; 3401 u8 event; 3402 __le16 reserved; 3403} __packed; 3404 3405struct iwl_coex_event_resp { 3406 __le32 status; 3407} __packed; 3408 3409 3410/****************************************************************************** 3411 * Bluetooth Coexistence commands 3412 * 3413 *****************************************************************************/ 3414 3415/* 3416 * BT Status notification 3417 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce 3418 */ 3419enum iwl_bt_coex_profile_traffic_load { 3420 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0, 3421 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1, 3422 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2, 3423 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3, 3424/* 3425 * There are no more even though below is a u8, the 3426 * indication from the BT device only has two bits. 3427 */ 3428}; 3429 3430#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1 3431#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2 3432 3433/* BT UART message - Share Part (BT -> WiFi) */ 3434#define BT_UART_MSG_FRAME1MSGTYPE_POS (0) 3435#define BT_UART_MSG_FRAME1MSGTYPE_MSK \ 3436 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS) 3437#define BT_UART_MSG_FRAME1SSN_POS (3) 3438#define BT_UART_MSG_FRAME1SSN_MSK \ 3439 (0x3 << BT_UART_MSG_FRAME1SSN_POS) 3440#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5) 3441#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \ 3442 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS) 3443#define BT_UART_MSG_FRAME1RESERVED_POS (6) 3444#define BT_UART_MSG_FRAME1RESERVED_MSK \ 3445 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS) 3446 3447#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0) 3448#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \ 3449 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS) 3450#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2) 3451#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \ 3452 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS) 3453#define BT_UART_MSG_FRAME2CHLSEQN_POS (4) 3454#define BT_UART_MSG_FRAME2CHLSEQN_MSK \ 3455 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS) 3456#define BT_UART_MSG_FRAME2INBAND_POS (5) 3457#define BT_UART_MSG_FRAME2INBAND_MSK \ 3458 (0x1 << BT_UART_MSG_FRAME2INBAND_POS) 3459#define BT_UART_MSG_FRAME2RESERVED_POS (6) 3460#define BT_UART_MSG_FRAME2RESERVED_MSK \ 3461 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS) 3462 3463#define BT_UART_MSG_FRAME3SCOESCO_POS (0) 3464#define BT_UART_MSG_FRAME3SCOESCO_MSK \ 3465 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS) 3466#define BT_UART_MSG_FRAME3SNIFF_POS (1) 3467#define BT_UART_MSG_FRAME3SNIFF_MSK \ 3468 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS) 3469#define BT_UART_MSG_FRAME3A2DP_POS (2) 3470#define BT_UART_MSG_FRAME3A2DP_MSK \ 3471 (0x1 << BT_UART_MSG_FRAME3A2DP_POS) 3472#define BT_UART_MSG_FRAME3ACL_POS (3) 3473#define BT_UART_MSG_FRAME3ACL_MSK \ 3474 (0x1 << BT_UART_MSG_FRAME3ACL_POS) 3475#define BT_UART_MSG_FRAME3MASTER_POS (4) 3476#define BT_UART_MSG_FRAME3MASTER_MSK \ 3477 (0x1 << BT_UART_MSG_FRAME3MASTER_POS) 3478#define BT_UART_MSG_FRAME3OBEX_POS (5) 3479#define BT_UART_MSG_FRAME3OBEX_MSK \ 3480 (0x1 << BT_UART_MSG_FRAME3OBEX_POS) 3481#define BT_UART_MSG_FRAME3RESERVED_POS (6) 3482#define BT_UART_MSG_FRAME3RESERVED_MSK \ 3483 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS) 3484 3485#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0) 3486#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \ 3487 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS) 3488#define BT_UART_MSG_FRAME4RESERVED_POS (6) 3489#define BT_UART_MSG_FRAME4RESERVED_MSK \ 3490 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS) 3491 3492#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0) 3493#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \ 3494 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS) 3495#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2) 3496#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \ 3497 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS) 3498#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4) 3499#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \ 3500 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS) 3501#define BT_UART_MSG_FRAME5RESERVED_POS (6) 3502#define BT_UART_MSG_FRAME5RESERVED_MSK \ 3503 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS) 3504 3505#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0) 3506#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \ 3507 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS) 3508#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5) 3509#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \ 3510 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS) 3511#define BT_UART_MSG_FRAME6RESERVED_POS (6) 3512#define BT_UART_MSG_FRAME6RESERVED_MSK \ 3513 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS) 3514 3515#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0) 3516#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \ 3517 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS) 3518#define BT_UART_MSG_FRAME7PAGE_POS (3) 3519#define BT_UART_MSG_FRAME7PAGE_MSK \ 3520 (0x1 << BT_UART_MSG_FRAME7PAGE_POS) 3521#define BT_UART_MSG_FRAME7INQUIRY_POS (4) 3522#define BT_UART_MSG_FRAME7INQUIRY_MSK \ 3523 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS) 3524#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5) 3525#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \ 3526 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS) 3527#define BT_UART_MSG_FRAME7RESERVED_POS (6) 3528#define BT_UART_MSG_FRAME7RESERVED_MSK \ 3529 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS) 3530 3531/* BT Session Activity 2 UART message (BT -> WiFi) */ 3532#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5) 3533#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \ 3534 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS) 3535#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6) 3536#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \ 3537 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS) 3538 3539#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0) 3540#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \ 3541 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS) 3542#define BT_UART_MSG_2_FRAME2RESERVED_POS (6) 3543#define BT_UART_MSG_2_FRAME2RESERVED_MSK \ 3544 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS) 3545 3546#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0) 3547#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \ 3548 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS) 3549#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4) 3550#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \ 3551 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS) 3552#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5) 3553#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \ 3554 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS) 3555#define BT_UART_MSG_2_FRAME3RESERVED_POS (6) 3556#define BT_UART_MSG_2_FRAME3RESERVED_MSK \ 3557 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS) 3558 3559#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0) 3560#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \ 3561 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS) 3562#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4) 3563#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \ 3564 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS) 3565#define BT_UART_MSG_2_FRAME4RESERVED_POS (6) 3566#define BT_UART_MSG_2_FRAME4RESERVED_MSK \ 3567 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS) 3568 3569#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0) 3570#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \ 3571 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS) 3572#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4) 3573#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \ 3574 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS) 3575#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5) 3576#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \ 3577 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS) 3578#define BT_UART_MSG_2_FRAME5RESERVED_POS (6) 3579#define BT_UART_MSG_2_FRAME5RESERVED_MSK \ 3580 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS) 3581 3582#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0) 3583#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \ 3584 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS) 3585#define BT_UART_MSG_2_FRAME6RFU_POS (5) 3586#define BT_UART_MSG_2_FRAME6RFU_MSK \ 3587 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS) 3588#define BT_UART_MSG_2_FRAME6RESERVED_POS (6) 3589#define BT_UART_MSG_2_FRAME6RESERVED_MSK \ 3590 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS) 3591 3592#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0) 3593#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \ 3594 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS) 3595#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3) 3596#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \ 3597 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS) 3598#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4) 3599#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \ 3600 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS) 3601#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5) 3602#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \ 3603 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS) 3604#define BT_UART_MSG_2_FRAME7RESERVED_POS (6) 3605#define BT_UART_MSG_2_FRAME7RESERVED_MSK \ 3606 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS) 3607 3608 3609#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62) 3610#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65) 3611 3612struct iwl_bt_uart_msg { 3613 u8 header; 3614 u8 frame1; 3615 u8 frame2; 3616 u8 frame3; 3617 u8 frame4; 3618 u8 frame5; 3619 u8 frame6; 3620 u8 frame7; 3621} __packed; 3622 3623struct iwl_bt_coex_profile_notif { 3624 struct iwl_bt_uart_msg last_bt_uart_msg; 3625 u8 bt_status; /* 0 - off, 1 - on */ 3626 u8 bt_traffic_load; /* 0 .. 3? */ 3627 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */ 3628 u8 reserved; 3629} __packed; 3630 3631#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0 3632#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1 3633#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1 3634#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e 3635#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4 3636#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0 3637#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1 3638 3639/* 3640 * BT Coexistence Priority table 3641 * REPLY_BT_COEX_PRIO_TABLE = 0xcc 3642 */ 3643enum bt_coex_prio_table_events { 3644 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0, 3645 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1, 3646 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2, 3647 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */ 3648 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4, 3649 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5, 3650 BT_COEX_PRIO_TBL_EVT_DTIM = 6, 3651 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7, 3652 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8, 3653 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9, 3654 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10, 3655 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11, 3656 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12, 3657 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13, 3658 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14, 3659 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15, 3660 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */ 3661 BT_COEX_PRIO_TBL_EVT_MAX, 3662}; 3663 3664enum bt_coex_prio_table_priorities { 3665 BT_COEX_PRIO_TBL_DISABLED = 0, 3666 BT_COEX_PRIO_TBL_PRIO_LOW = 1, 3667 BT_COEX_PRIO_TBL_PRIO_HIGH = 2, 3668 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3, 3669 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4, 3670 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5, 3671 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6, 3672 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7, 3673 BT_COEX_PRIO_TBL_MAX, 3674}; 3675 3676struct iwl_bt_coex_prio_table_cmd { 3677 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX]; 3678} __packed; 3679 3680#define IWL_BT_COEX_ENV_CLOSE 0 3681#define IWL_BT_COEX_ENV_OPEN 1 3682/* 3683 * BT Protection Envelope 3684 * REPLY_BT_COEX_PROT_ENV = 0xcd 3685 */ 3686struct iwl_bt_coex_prot_env_cmd { 3687 u8 action; /* 0 = closed, 1 = open */ 3688 u8 type; /* 0 .. 15 */ 3689 u8 reserved[2]; 3690} __packed; 3691 3692/* 3693 * REPLY_D3_CONFIG 3694 */ 3695enum iwlagn_d3_wakeup_filters { 3696 IWLAGN_D3_WAKEUP_RFKILL = BIT(0), 3697 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1), 3698}; 3699 3700struct iwlagn_d3_config_cmd { 3701 __le32 min_sleep_time; 3702 __le32 wakeup_flags; 3703} __packed; 3704 3705/* 3706 * REPLY_WOWLAN_PATTERNS 3707 */ 3708#define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16 3709#define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128 3710 3711struct iwlagn_wowlan_pattern { 3712 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8]; 3713 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN]; 3714 u8 mask_size; 3715 u8 pattern_size; 3716 __le16 reserved; 3717} __packed; 3718 3719#define IWLAGN_WOWLAN_MAX_PATTERNS 20 3720 3721struct iwlagn_wowlan_patterns_cmd { 3722 __le32 n_patterns; 3723 struct iwlagn_wowlan_pattern patterns[]; 3724} __packed; 3725 3726/* 3727 * REPLY_WOWLAN_WAKEUP_FILTER 3728 */ 3729enum iwlagn_wowlan_wakeup_filters { 3730 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0), 3731 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1), 3732 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2), 3733 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3), 3734 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4), 3735 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5), 3736 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6), 3737 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7), 3738 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8), 3739}; 3740 3741struct iwlagn_wowlan_wakeup_filter_cmd { 3742 __le32 enabled; 3743 __le16 non_qos_seq; 3744 __le16 reserved; 3745 __le16 qos_seq[8]; 3746}; 3747 3748/* 3749 * REPLY_WOWLAN_TSC_RSC_PARAMS 3750 */ 3751#define IWLAGN_NUM_RSC 16 3752 3753struct tkip_sc { 3754 __le16 iv16; 3755 __le16 pad; 3756 __le32 iv32; 3757} __packed; 3758 3759struct iwlagn_tkip_rsc_tsc { 3760 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC]; 3761 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC]; 3762 struct tkip_sc tsc; 3763} __packed; 3764 3765struct aes_sc { 3766 __le64 pn; 3767} __packed; 3768 3769struct iwlagn_aes_rsc_tsc { 3770 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC]; 3771 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC]; 3772 struct aes_sc tsc; 3773} __packed; 3774 3775union iwlagn_all_tsc_rsc { 3776 struct iwlagn_tkip_rsc_tsc tkip; 3777 struct iwlagn_aes_rsc_tsc aes; 3778}; 3779 3780struct iwlagn_wowlan_rsc_tsc_params_cmd { 3781 union iwlagn_all_tsc_rsc all_tsc_rsc; 3782} __packed; 3783 3784/* 3785 * REPLY_WOWLAN_TKIP_PARAMS 3786 */ 3787#define IWLAGN_MIC_KEY_SIZE 8 3788#define IWLAGN_P1K_SIZE 5 3789struct iwlagn_mic_keys { 3790 u8 tx[IWLAGN_MIC_KEY_SIZE]; 3791 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE]; 3792 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE]; 3793} __packed; 3794 3795struct iwlagn_p1k_cache { 3796 __le16 p1k[IWLAGN_P1K_SIZE]; 3797} __packed; 3798 3799#define IWLAGN_NUM_RX_P1K_CACHE 2 3800 3801struct iwlagn_wowlan_tkip_params_cmd { 3802 struct iwlagn_mic_keys mic_keys; 3803 struct iwlagn_p1k_cache tx; 3804 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE]; 3805 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE]; 3806} __packed; 3807 3808/* 3809 * REPLY_WOWLAN_KEK_KCK_MATERIAL 3810 */ 3811 3812#define IWLAGN_KCK_MAX_SIZE 32 3813#define IWLAGN_KEK_MAX_SIZE 32 3814 3815struct iwlagn_wowlan_kek_kck_material_cmd { 3816 u8 kck[IWLAGN_KCK_MAX_SIZE]; 3817 u8 kek[IWLAGN_KEK_MAX_SIZE]; 3818 __le16 kck_len; 3819 __le16 kek_len; 3820 __le64 replay_ctr; 3821} __packed; 3822 3823#define RF_KILL_INDICATOR_FOR_WOWLAN 0x87 3824 3825/* 3826 * REPLY_WOWLAN_GET_STATUS = 0xe5 3827 */ 3828struct iwlagn_wowlan_status { 3829 __le64 replay_ctr; 3830 __le32 rekey_status; 3831 __le32 wakeup_reason; 3832 u8 pattern_number; 3833 u8 reserved1; 3834 __le16 qos_seq_ctr[8]; 3835 __le16 non_qos_seq_ctr; 3836 __le16 reserved2; 3837 union iwlagn_all_tsc_rsc tsc_rsc; 3838 __le16 reserved3; 3839} __packed; 3840 3841/* 3842 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification) 3843 */ 3844 3845/* 3846 * Minimum slot time in TU 3847 */ 3848#define IWL_MIN_SLOT_TIME 20 3849 3850/** 3851 * struct iwl_wipan_slot - WiPAN slot configuration 3852 * @width: Time in TU 3853 * @type: 3854 * 0 - BSS 3855 * 1 - PAN 3856 * @reserved: reserved for alignment 3857 */ 3858struct iwl_wipan_slot { 3859 __le16 width; 3860 u8 type; 3861 u8 reserved; 3862} __packed; 3863 3864#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */ 3865#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */ 3866#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */ 3867#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4) 3868#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5) 3869 3870/** 3871 * struct iwl_wipan_params_cmd - WiPAN parameters 3872 * @flags: 3873 * bit0: reserved 3874 * bit1: CP leave channel with CTS 3875 * bit2: CP leave channel qith Quiet 3876 * bit3: slotted mode 3877 * 1 - work in slotted mode 3878 * 0 - work in non slotted mode 3879 * bit4: filter beacon notification 3880 * bit5: full tx slotted mode. if this flag is set, 3881 * uCode will perform leaving channel methods in context switch 3882 * also when working in same channel mode 3883 * @num_slots: 1 - 10 3884 * @slots: per-slot data 3885 * @reserved: reserved for alignment 3886 */ 3887struct iwl_wipan_params_cmd { 3888 __le16 flags; 3889 u8 reserved; 3890 u8 num_slots; 3891 struct iwl_wipan_slot slots[10]; 3892} __packed; 3893 3894/* 3895 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9 3896 * 3897 * TODO: Figure out what this is used for, 3898 * it can only switch between 2.4 GHz 3899 * channels!! 3900 */ 3901 3902struct iwl_wipan_p2p_channel_switch_cmd { 3903 __le16 channel; 3904 __le16 reserved; 3905}; 3906 3907/* 3908 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc 3909 * 3910 * This is used by the device to notify us of the 3911 * NoA schedule it determined so we can forward it 3912 * to userspace for inclusion in probe responses. 3913 * 3914 * In beacons, the NoA schedule is simply appended 3915 * to the frame we give the device. 3916 */ 3917 3918struct iwl_wipan_noa_descriptor { 3919 u8 count; 3920 __le32 duration; 3921 __le32 interval; 3922 __le32 starttime; 3923} __packed; 3924 3925struct iwl_wipan_noa_attribute { 3926 u8 id; 3927 __le16 length; 3928 u8 index; 3929 u8 ct_window; 3930 struct iwl_wipan_noa_descriptor descr0, descr1; 3931 u8 reserved; 3932} __packed; 3933 3934struct iwl_wipan_noa_notification { 3935 u32 noa_active; 3936 struct iwl_wipan_noa_attribute noa_attribute; 3937} __packed; 3938 3939#endif /* __iwl_commands_h__ */
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