wmi.h

   1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
   2/*
   3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
   4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
   5 */
   6
   7#ifndef ATH12K_WMI_H
   8#define ATH12K_WMI_H
   9
  10#include <net/mac80211.h>
  11#include "htc.h"
  12
  13/* Naming conventions for structures:
  14 *
  15 * _cmd means that this is a firmware command sent from host to firmware.
  16 *
  17 * _event means that this is a firmware event sent from firmware to host
  18 *
  19 * _params is a structure which is embedded either into _cmd or _event (or
  20 * both), it is not sent individually.
  21 *
  22 * _arg is used inside the host, the firmware does not see that at all.
  23 */
  24
  25struct ath12k_base;
  26struct ath12k;
  27struct ath12k_link_vif;
  28struct ath12k_fw_stats;
  29struct ath12k_reg_tpc_power_info;
  30
  31/* There is no signed version of __le32, so for a temporary solution come
  32 * up with our own version. The idea is from fs/ntfs/endian.h.
  33 *
  34 * Use a_ prefix so that it doesn't conflict if we get proper support to
  35 * linux/types.h.
  36 */
  37typedef __s32 __bitwise a_sle32;
  38
  39static inline a_sle32 a_cpu_to_sle32(s32 val)
  40{
  41	return (__force a_sle32)cpu_to_le32(val);
  42}
  43
  44static inline s32 a_sle32_to_cpu(a_sle32 val)
  45{
  46	return le32_to_cpu((__force __le32)val);
  47}
  48
  49/* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */
  50#define MAX_HE_NSS               8
  51#define MAX_HE_MODULATION        8
  52#define MAX_HE_RU                4
  53#define HE_MODULATION_NONE       7
  54#define HE_PET_0_USEC            0
  55#define HE_PET_8_USEC            1
  56#define HE_PET_16_USEC           2
  57
  58#define WMI_MAX_CHAINS		 8
  59
  60#define WMI_MAX_NUM_SS                    MAX_HE_NSS
  61#define WMI_MAX_NUM_RU                    MAX_HE_RU
  62
  63#define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
  64#define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
  65#define WMI_TLV_CMD_UNSUPPORTED 0
  66#define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
  67#define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
  68
  69struct wmi_cmd_hdr {
  70	__le32 cmd_id;
  71} __packed;
  72
  73struct wmi_tlv {
  74	__le32 header;
  75	u8 value[];
  76} __packed;
  77
  78#define WMI_TLV_LEN	GENMASK(15, 0)
  79#define WMI_TLV_TAG	GENMASK(31, 16)
  80#define TLV_HDR_SIZE	sizeof_field(struct wmi_tlv, header)
  81
  82#define WMI_CMD_HDR_CMD_ID      GENMASK(23, 0)
  83#define WMI_MAX_MEM_REQS        32
  84#define ATH12K_MAX_HW_LISTEN_INTERVAL 5
  85
  86#define WMI_HOST_RC_DS_FLAG			0x01
  87#define WMI_HOST_RC_CW40_FLAG			0x02
  88#define WMI_HOST_RC_SGI_FLAG			0x04
  89#define WMI_HOST_RC_HT_FLAG			0x08
  90#define WMI_HOST_RC_RTSCTS_FLAG			0x10
  91#define WMI_HOST_RC_TX_STBC_FLAG		0x20
  92#define WMI_HOST_RC_RX_STBC_FLAG		0xC0
  93#define WMI_HOST_RC_RX_STBC_FLAG_S		6
  94#define WMI_HOST_RC_WEP_TKIP_FLAG		0x100
  95#define WMI_HOST_RC_TS_FLAG			0x200
  96#define WMI_HOST_RC_UAPSD_FLAG			0x400
  97
  98#define WMI_HT_CAP_ENABLED			0x0001
  99#define WMI_HT_CAP_HT20_SGI			0x0002
 100#define WMI_HT_CAP_DYNAMIC_SMPS			0x0004
 101#define WMI_HT_CAP_TX_STBC			0x0008
 102#define WMI_HT_CAP_TX_STBC_MASK_SHIFT		3
 103#define WMI_HT_CAP_RX_STBC			0x0030
 104#define WMI_HT_CAP_RX_STBC_MASK_SHIFT		4
 105#define WMI_HT_CAP_LDPC				0x0040
 106#define WMI_HT_CAP_L_SIG_TXOP_PROT		0x0080
 107#define WMI_HT_CAP_MPDU_DENSITY			0x0700
 108#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT	8
 109#define WMI_HT_CAP_HT40_SGI			0x0800
 110#define WMI_HT_CAP_RX_LDPC			0x1000
 111#define WMI_HT_CAP_TX_LDPC			0x2000
 112#define WMI_HT_CAP_IBF_BFER			0x4000
 113
 114/* These macros should be used when we wish to advertise STBC support for
 115 * only 1SS or 2SS or 3SS.
 116 */
 117#define WMI_HT_CAP_RX_STBC_1SS			0x0010
 118#define WMI_HT_CAP_RX_STBC_2SS			0x0020
 119#define WMI_HT_CAP_RX_STBC_3SS			0x0030
 120
 121#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED    | \
 122				WMI_HT_CAP_HT20_SGI   | \
 123				WMI_HT_CAP_HT40_SGI   | \
 124				WMI_HT_CAP_TX_STBC    | \
 125				WMI_HT_CAP_RX_STBC    | \
 126				WMI_HT_CAP_LDPC)
 127
 128#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK		0x00000003
 129#define WMI_VHT_CAP_RX_LDPC			0x00000010
 130#define WMI_VHT_CAP_SGI_80MHZ			0x00000020
 131#define WMI_VHT_CAP_SGI_160MHZ			0x00000040
 132#define WMI_VHT_CAP_TX_STBC			0x00000080
 133#define WMI_VHT_CAP_RX_STBC_MASK		0x00000300
 134#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT		8
 135#define WMI_VHT_CAP_SU_BFER			0x00000800
 136#define WMI_VHT_CAP_SU_BFEE			0x00001000
 137#define WMI_VHT_CAP_MAX_CS_ANT_MASK		0x0000E000
 138#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT	13
 139#define WMI_VHT_CAP_MAX_SND_DIM_MASK		0x00070000
 140#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT	16
 141#define WMI_VHT_CAP_MU_BFER			0x00080000
 142#define WMI_VHT_CAP_MU_BFEE			0x00100000
 143#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP		0x03800000
 144#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT	23
 145#define WMI_VHT_CAP_RX_FIXED_ANT		0x10000000
 146#define WMI_VHT_CAP_TX_FIXED_ANT		0x20000000
 147
 148#define WMI_VHT_CAP_MAX_MPDU_LEN_11454		0x00000002
 149
 150/* These macros should be used when we wish to advertise STBC support for
 151 * only 1SS or 2SS or 3SS.
 152 */
 153#define WMI_VHT_CAP_RX_STBC_1SS			0x00000100
 154#define WMI_VHT_CAP_RX_STBC_2SS			0x00000200
 155#define WMI_VHT_CAP_RX_STBC_3SS			0x00000300
 156
 157#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  | \
 158				 WMI_VHT_CAP_SGI_80MHZ      |       \
 159				 WMI_VHT_CAP_TX_STBC        |       \
 160				 WMI_VHT_CAP_RX_STBC_MASK   |       \
 161				 WMI_VHT_CAP_RX_LDPC        |       \
 162				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   |  \
 163				 WMI_VHT_CAP_RX_FIXED_ANT   |       \
 164				 WMI_VHT_CAP_TX_FIXED_ANT)
 165
 166#define WLAN_SCAN_MAX_HINT_S_SSID        10
 167#define WLAN_SCAN_MAX_HINT_BSSID         10
 168#define MAX_RNR_BSS                    5
 169
 170#define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
 171
 172#define WMI_BA_MODE_BUFFER_SIZE_256  3
 173
 174/* HW mode config type replicated from FW header
 175 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
 176 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
 177 *                        one in 2G and another in 5G.
 178 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
 179 *                        same band; no tx allowed.
 180 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
 181 *                        Support for both PHYs within one band is planned
 182 *                        for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
 183 *                        but could be extended to other bands in the future.
 184 *                        The separation of the band between the two PHYs needs
 185 *                        to be communicated separately.
 186 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
 187 *                           as in WMI_HW_MODE_SBS, and 3rd on the other band
 188 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
 189 *                        5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
 190 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
 191 */
 192enum wmi_host_hw_mode_config_type {
 193	WMI_HOST_HW_MODE_SINGLE       = 0,
 194	WMI_HOST_HW_MODE_DBS          = 1,
 195	WMI_HOST_HW_MODE_SBS_PASSIVE  = 2,
 196	WMI_HOST_HW_MODE_SBS          = 3,
 197	WMI_HOST_HW_MODE_DBS_SBS      = 4,
 198	WMI_HOST_HW_MODE_DBS_OR_SBS   = 5,
 199
 200	/* keep last */
 201	WMI_HOST_HW_MODE_MAX
 202};
 203
 204/* HW mode priority values used to detect the preferred HW mode
 205 * on the available modes.
 206 */
 207enum wmi_host_hw_mode_priority {
 208	WMI_HOST_HW_MODE_DBS_SBS_PRI,
 209	WMI_HOST_HW_MODE_DBS_PRI,
 210	WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
 211	WMI_HOST_HW_MODE_SBS_PRI,
 212	WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
 213	WMI_HOST_HW_MODE_SINGLE_PRI,
 214
 215	/* keep last the lowest priority */
 216	WMI_HOST_HW_MODE_MAX_PRI
 217};
 218
 219enum WMI_HOST_WLAN_BAND {
 220	WMI_HOST_WLAN_2GHZ_CAP		= 1,
 221	WMI_HOST_WLAN_5GHZ_CAP		= 2,
 222	WMI_HOST_WLAN_2GHZ_5GHZ_CAP	= 3,
 223};
 224
 225/* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
 226 * Used for HE and EHT auto rate mode.
 227 */
 228enum {
 229	/* LTF related configuration */
 230	WMI_AUTORATE_LTF_1X = BIT(0),
 231	WMI_AUTORATE_LTF_2X = BIT(1),
 232	WMI_AUTORATE_LTF_4X = BIT(2),
 233
 234	/* GI related configuration */
 235	WMI_AUTORATE_400NS_GI = BIT(8),
 236	WMI_AUTORATE_800NS_GI = BIT(9),
 237	WMI_AUTORATE_1600NS_GI = BIT(10),
 238	WMI_AUTORATE_3200NS_GI = BIT(11),
 239};
 240
 241enum wmi_cmd_group {
 242	/* 0 to 2 are reserved */
 243	WMI_GRP_START = 0x3,
 244	WMI_GRP_SCAN = WMI_GRP_START,
 245	WMI_GRP_PDEV		= 0x4,
 246	WMI_GRP_VDEV           = 0x5,
 247	WMI_GRP_PEER           = 0x6,
 248	WMI_GRP_MGMT           = 0x7,
 249	WMI_GRP_BA_NEG         = 0x8,
 250	WMI_GRP_STA_PS         = 0x9,
 251	WMI_GRP_DFS            = 0xa,
 252	WMI_GRP_ROAM           = 0xb,
 253	WMI_GRP_OFL_SCAN       = 0xc,
 254	WMI_GRP_P2P            = 0xd,
 255	WMI_GRP_AP_PS          = 0xe,
 256	WMI_GRP_RATE_CTRL      = 0xf,
 257	WMI_GRP_PROFILE        = 0x10,
 258	WMI_GRP_SUSPEND        = 0x11,
 259	WMI_GRP_BCN_FILTER     = 0x12,
 260	WMI_GRP_WOW            = 0x13,
 261	WMI_GRP_RTT            = 0x14,
 262	WMI_GRP_SPECTRAL       = 0x15,
 263	WMI_GRP_STATS          = 0x16,
 264	WMI_GRP_ARP_NS_OFL     = 0x17,
 265	WMI_GRP_NLO_OFL        = 0x18,
 266	WMI_GRP_GTK_OFL        = 0x19,
 267	WMI_GRP_CSA_OFL        = 0x1a,
 268	WMI_GRP_CHATTER        = 0x1b,
 269	WMI_GRP_TID_ADDBA      = 0x1c,
 270	WMI_GRP_MISC           = 0x1d,
 271	WMI_GRP_GPIO           = 0x1e,
 272	WMI_GRP_FWTEST         = 0x1f,
 273	WMI_GRP_TDLS           = 0x20,
 274	WMI_GRP_RESMGR         = 0x21,
 275	WMI_GRP_STA_SMPS       = 0x22,
 276	WMI_GRP_WLAN_HB        = 0x23,
 277	WMI_GRP_RMC            = 0x24,
 278	WMI_GRP_MHF_OFL        = 0x25,
 279	WMI_GRP_LOCATION_SCAN  = 0x26,
 280	WMI_GRP_OEM            = 0x27,
 281	WMI_GRP_NAN            = 0x28,
 282	WMI_GRP_COEX           = 0x29,
 283	WMI_GRP_OBSS_OFL       = 0x2a,
 284	WMI_GRP_LPI            = 0x2b,
 285	WMI_GRP_EXTSCAN        = 0x2c,
 286	WMI_GRP_DHCP_OFL       = 0x2d,
 287	WMI_GRP_IPA            = 0x2e,
 288	WMI_GRP_MDNS_OFL       = 0x2f,
 289	WMI_GRP_SAP_OFL        = 0x30,
 290	WMI_GRP_OCB            = 0x31,
 291	WMI_GRP_SOC            = 0x32,
 292	WMI_GRP_PKT_FILTER     = 0x33,
 293	WMI_GRP_MAWC           = 0x34,
 294	WMI_GRP_PMF_OFFLOAD    = 0x35,
 295	WMI_GRP_BPF_OFFLOAD    = 0x36,
 296	WMI_GRP_NAN_DATA       = 0x37,
 297	WMI_GRP_PROTOTYPE      = 0x38,
 298	WMI_GRP_MONITOR        = 0x39,
 299	WMI_GRP_REGULATORY     = 0x3a,
 300	WMI_GRP_HW_DATA_FILTER = 0x3b,
 301	WMI_GRP_WLM            = 0x3c,
 302	WMI_GRP_11K_OFFLOAD    = 0x3d,
 303	WMI_GRP_TWT            = 0x3e,
 304	WMI_GRP_MOTION_DET     = 0x3f,
 305	WMI_GRP_SPATIAL_REUSE  = 0x40,
 306	WMI_GRP_MLO            = 0x48,
 307};
 308
 309#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
 310#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
 311
 312enum wmi_tlv_cmd_id {
 313	WMI_CMD_UNSUPPORTED = 0,
 314	WMI_INIT_CMDID = 0x1,
 315	WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
 316	WMI_STOP_SCAN_CMDID,
 317	WMI_SCAN_CHAN_LIST_CMDID,
 318	WMI_SCAN_SCH_PRIO_TBL_CMDID,
 319	WMI_SCAN_UPDATE_REQUEST_CMDID,
 320	WMI_SCAN_PROB_REQ_OUI_CMDID,
 321	WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
 322	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
 323	WMI_PDEV_SET_CHANNEL_CMDID,
 324	WMI_PDEV_SET_PARAM_CMDID,
 325	WMI_PDEV_PKTLOG_ENABLE_CMDID,
 326	WMI_PDEV_PKTLOG_DISABLE_CMDID,
 327	WMI_PDEV_SET_WMM_PARAMS_CMDID,
 328	WMI_PDEV_SET_HT_CAP_IE_CMDID,
 329	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
 330	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
 331	WMI_PDEV_SET_QUIET_MODE_CMDID,
 332	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
 333	WMI_PDEV_GET_TPC_CONFIG_CMDID,
 334	WMI_PDEV_SET_BASE_MACADDR_CMDID,
 335	WMI_PDEV_DUMP_CMDID,
 336	WMI_PDEV_SET_LED_CONFIG_CMDID,
 337	WMI_PDEV_GET_TEMPERATURE_CMDID,
 338	WMI_PDEV_SET_LED_FLASHING_CMDID,
 339	WMI_PDEV_SMART_ANT_ENABLE_CMDID,
 340	WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
 341	WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
 342	WMI_PDEV_SET_CTL_TABLE_CMDID,
 343	WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
 344	WMI_PDEV_FIPS_CMDID,
 345	WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
 346	WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
 347	WMI_PDEV_GET_NFCAL_POWER_CMDID,
 348	WMI_PDEV_GET_TPC_CMDID,
 349	WMI_MIB_STATS_ENABLE_CMDID,
 350	WMI_PDEV_SET_PCL_CMDID,
 351	WMI_PDEV_SET_HW_MODE_CMDID,
 352	WMI_PDEV_SET_MAC_CONFIG_CMDID,
 353	WMI_PDEV_SET_ANTENNA_MODE_CMDID,
 354	WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
 355	WMI_PDEV_WAL_POWER_DEBUG_CMDID,
 356	WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
 357	WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
 358	WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
 359	WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
 360	WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
 361	WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
 362	WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
 363	WMI_PDEV_CHECK_CAL_VERSION_CMDID,
 364	WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
 365	WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
 366	WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
 367	WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
 368	WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
 369	WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
 370	WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
 371	WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
 372	WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
 373	WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
 374	WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
 375	WMI_PDEV_PKTLOG_FILTER_CMDID,
 376	WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID = 0x4044,
 377	WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID = 0x4045,
 378	WMI_PDEV_SET_BIOS_INTERFACE_CMDID = 0x404A,
 379	WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
 380	WMI_VDEV_DELETE_CMDID,
 381	WMI_VDEV_START_REQUEST_CMDID,
 382	WMI_VDEV_RESTART_REQUEST_CMDID,
 383	WMI_VDEV_UP_CMDID,
 384	WMI_VDEV_STOP_CMDID,
 385	WMI_VDEV_DOWN_CMDID,
 386	WMI_VDEV_SET_PARAM_CMDID,
 387	WMI_VDEV_INSTALL_KEY_CMDID,
 388	WMI_VDEV_WNM_SLEEPMODE_CMDID,
 389	WMI_VDEV_WMM_ADDTS_CMDID,
 390	WMI_VDEV_WMM_DELTS_CMDID,
 391	WMI_VDEV_SET_WMM_PARAMS_CMDID,
 392	WMI_VDEV_SET_GTX_PARAMS_CMDID,
 393	WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
 394	WMI_VDEV_PLMREQ_START_CMDID,
 395	WMI_VDEV_PLMREQ_STOP_CMDID,
 396	WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
 397	WMI_VDEV_SET_IE_CMDID,
 398	WMI_VDEV_RATEMASK_CMDID,
 399	WMI_VDEV_ATF_REQUEST_CMDID,
 400	WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
 401	WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
 402	WMI_VDEV_SET_QUIET_MODE_CMDID,
 403	WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
 404	WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
 405	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
 406	WMI_VDEV_SET_ARP_STAT_CMDID,
 407	WMI_VDEV_GET_ARP_STAT_CMDID,
 408	WMI_VDEV_GET_TX_POWER_CMDID,
 409	WMI_VDEV_LIMIT_OFFCHAN_CMDID,
 410	WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID,
 411	WMI_VDEV_CHAINMASK_CONFIG_CMDID,
 412	WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID,
 413	WMI_VDEV_GET_MWS_COEX_INFO_CMDID,
 414	WMI_VDEV_DELETE_ALL_PEER_CMDID,
 415	WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID,
 416	WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID,
 417	WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID,
 418	WMI_VDEV_SET_PCL_CMDID,
 419	WMI_VDEV_GET_BIG_DATA_CMDID,
 420	WMI_VDEV_GET_BIG_DATA_P2_CMDID,
 421	WMI_VDEV_SET_TPC_POWER_CMDID,
 422	WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
 423	WMI_PEER_DELETE_CMDID,
 424	WMI_PEER_FLUSH_TIDS_CMDID,
 425	WMI_PEER_SET_PARAM_CMDID,
 426	WMI_PEER_ASSOC_CMDID,
 427	WMI_PEER_ADD_WDS_ENTRY_CMDID,
 428	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
 429	WMI_PEER_MCAST_GROUP_CMDID,
 430	WMI_PEER_INFO_REQ_CMDID,
 431	WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
 432	WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
 433	WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
 434	WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
 435	WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
 436	WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
 437	WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
 438	WMI_PEER_ATF_REQUEST_CMDID,
 439	WMI_PEER_BWF_REQUEST_CMDID,
 440	WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
 441	WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
 442	WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
 443	WMI_PEER_ANTDIV_INFO_REQ_CMDID,
 444	WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
 445	WMI_PDEV_SEND_BCN_CMDID,
 446	WMI_BCN_TMPL_CMDID,
 447	WMI_BCN_FILTER_RX_CMDID,
 448	WMI_PRB_REQ_FILTER_RX_CMDID,
 449	WMI_MGMT_TX_CMDID,
 450	WMI_PRB_TMPL_CMDID,
 451	WMI_MGMT_TX_SEND_CMDID,
 452	WMI_OFFCHAN_DATA_TX_SEND_CMDID,
 453	WMI_PDEV_SEND_FD_CMDID,
 454	WMI_BCN_OFFLOAD_CTRL_CMDID,
 455	WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
 456	WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
 457	WMI_FILS_DISCOVERY_TMPL_CMDID,
 458	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
 459	WMI_ADDBA_SEND_CMDID,
 460	WMI_ADDBA_STATUS_CMDID,
 461	WMI_DELBA_SEND_CMDID,
 462	WMI_ADDBA_SET_RESP_CMDID,
 463	WMI_SEND_SINGLEAMSDU_CMDID,
 464	WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
 465	WMI_STA_POWERSAVE_PARAM_CMDID,
 466	WMI_STA_MIMO_PS_MODE_CMDID,
 467	WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
 468	WMI_PDEV_DFS_DISABLE_CMDID,
 469	WMI_DFS_PHYERR_FILTER_ENA_CMDID,
 470	WMI_DFS_PHYERR_FILTER_DIS_CMDID,
 471	WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
 472	WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
 473	WMI_VDEV_ADFS_CH_CFG_CMDID,
 474	WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
 475	WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
 476	WMI_ROAM_SCAN_RSSI_THRESHOLD,
 477	WMI_ROAM_SCAN_PERIOD,
 478	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
 479	WMI_ROAM_AP_PROFILE,
 480	WMI_ROAM_CHAN_LIST,
 481	WMI_ROAM_SCAN_CMD,
 482	WMI_ROAM_SYNCH_COMPLETE,
 483	WMI_ROAM_SET_RIC_REQUEST_CMDID,
 484	WMI_ROAM_INVOKE_CMDID,
 485	WMI_ROAM_FILTER_CMDID,
 486	WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
 487	WMI_ROAM_CONFIGURE_MAWC_CMDID,
 488	WMI_ROAM_SET_MBO_PARAM_CMDID,
 489	WMI_ROAM_PER_CONFIG_CMDID,
 490	WMI_ROAM_BTM_CONFIG_CMDID,
 491	WMI_ENABLE_FILS_CMDID,
 492	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
 493	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
 494	WMI_OFL_SCAN_PERIOD,
 495	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
 496	WMI_P2P_DEV_SET_DISCOVERABILITY,
 497	WMI_P2P_GO_SET_BEACON_IE,
 498	WMI_P2P_GO_SET_PROBE_RESP_IE,
 499	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
 500	WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
 501	WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
 502	WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
 503	WMI_P2P_SET_OPPPS_PARAM_CMDID,
 504	WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
 505	WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
 506	WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
 507	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
 508	WMI_AP_PS_EGAP_PARAM_CMDID,
 509	WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
 510	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
 511	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
 512	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
 513	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
 514	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
 515	WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
 516	WMI_PDEV_RESUME_CMDID,
 517	WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
 518	WMI_RMV_BCN_FILTER_CMDID,
 519	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
 520	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
 521	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
 522	WMI_WOW_ENABLE_CMDID,
 523	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
 524	WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
 525	WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
 526	WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
 527	WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
 528	WMI_D0_WOW_ENABLE_DISABLE_CMDID,
 529	WMI_EXTWOW_ENABLE_CMDID,
 530	WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
 531	WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
 532	WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
 533	WMI_WOW_UDP_SVC_OFLD_CMDID,
 534	WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
 535	WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
 536	WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
 537	WMI_RTT_TSF_CMDID,
 538	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
 539	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
 540	WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
 541	WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
 542	WMI_REQUEST_STATS_EXT_CMDID,
 543	WMI_REQUEST_LINK_STATS_CMDID,
 544	WMI_START_LINK_STATS_CMDID,
 545	WMI_CLEAR_LINK_STATS_CMDID,
 546	WMI_GET_FW_MEM_DUMP_CMDID,
 547	WMI_DEBUG_MESG_FLUSH_CMDID,
 548	WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
 549	WMI_REQUEST_WLAN_STATS_CMDID,
 550	WMI_REQUEST_RCPI_CMDID,
 551	WMI_REQUEST_PEER_STATS_INFO_CMDID,
 552	WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
 553	WMI_REQUEST_WLM_STATS_CMDID,
 554	WMI_REQUEST_CTRL_PATH_STATS_CMDID,
 555	WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID = WMI_REQUEST_CTRL_PATH_STATS_CMDID + 3,
 556	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
 557	WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
 558	WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
 559	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
 560	WMI_APFIND_CMDID,
 561	WMI_PASSPOINT_LIST_CONFIG_CMDID,
 562	WMI_NLO_CONFIGURE_MAWC_CMDID,
 563	WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
 564	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
 565	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
 566	WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
 567	WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
 568	WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
 569	WMI_CHATTER_COALESCING_QUERY_CMDID,
 570	WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
 571	WMI_PEER_TID_DELBA_CMDID,
 572	WMI_STA_DTIM_PS_METHOD_CMDID,
 573	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
 574	WMI_STA_KEEPALIVE_CMDID,
 575	WMI_BA_REQ_SSN_CMDID,
 576	WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
 577	WMI_PDEV_UTF_CMDID,
 578	WMI_DBGLOG_CFG_CMDID,
 579	WMI_PDEV_QVIT_CMDID,
 580	WMI_PDEV_FTM_INTG_CMDID,
 581	WMI_VDEV_SET_KEEPALIVE_CMDID,
 582	WMI_VDEV_GET_KEEPALIVE_CMDID,
 583	WMI_FORCE_FW_HANG_CMDID,
 584	WMI_SET_MCASTBCAST_FILTER_CMDID,
 585	WMI_THERMAL_MGMT_CMDID,
 586	WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
 587	WMI_TPC_CHAINMASK_CONFIG_CMDID,
 588	WMI_SET_ANTENNA_DIVERSITY_CMDID,
 589	WMI_OCB_SET_SCHED_CMDID,
 590	WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
 591	WMI_LRO_CONFIG_CMDID,
 592	WMI_TRANSFER_DATA_TO_FLASH_CMDID,
 593	WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
 594	WMI_VDEV_WISA_CMDID,
 595	WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
 596	WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
 597	WMI_READ_DATA_FROM_FLASH_CMDID,
 598	WMI_THERM_THROT_SET_CONF_CMDID,
 599	WMI_RUNTIME_DPD_RECAL_CMDID,
 600	WMI_GET_TPC_POWER_CMDID,
 601	WMI_IDLE_TRIGGER_MONITOR_CMDID,
 602	WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
 603	WMI_GPIO_OUTPUT_CMDID,
 604	WMI_TXBF_CMDID,
 605	WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
 606	WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
 607	WMI_UNIT_TEST_CMDID,
 608	WMI_FWTEST_CMDID,
 609	WMI_QBOOST_CFG_CMDID,
 610	WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
 611	WMI_TDLS_PEER_UPDATE_CMDID,
 612	WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
 613	WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
 614	WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
 615	WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
 616	WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
 617	WMI_STA_SMPS_PARAM_CMDID,
 618	WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
 619	WMI_HB_SET_TCP_PARAMS_CMDID,
 620	WMI_HB_SET_TCP_PKT_FILTER_CMDID,
 621	WMI_HB_SET_UDP_PARAMS_CMDID,
 622	WMI_HB_SET_UDP_PKT_FILTER_CMDID,
 623	WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
 624	WMI_RMC_SET_ACTION_PERIOD_CMDID,
 625	WMI_RMC_CONFIG_CMDID,
 626	WMI_RMC_SET_MANUAL_LEADER_CMDID,
 627	WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
 628	WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
 629	WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
 630	WMI_BATCH_SCAN_DISABLE_CMDID,
 631	WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
 632	WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
 633	WMI_OEM_REQUEST_CMDID,
 634	WMI_LPI_OEM_REQ_CMDID,
 635	WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
 636	WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
 637	WMI_CHAN_AVOID_UPDATE_CMDID,
 638	WMI_COEX_CONFIG_CMDID,
 639	WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
 640	WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
 641	WMI_SAR_LIMITS_CMDID,
 642	WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
 643	WMI_OBSS_SCAN_DISABLE_CMDID,
 644	WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
 645	WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
 646	WMI_LPI_START_SCAN_CMDID,
 647	WMI_LPI_STOP_SCAN_CMDID,
 648	WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
 649	WMI_EXTSCAN_STOP_CMDID,
 650	WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
 651	WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
 652	WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
 653	WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
 654	WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
 655	WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
 656	WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
 657	WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
 658	WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
 659	WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
 660	WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
 661	WMI_MDNS_SET_FQDN_CMDID,
 662	WMI_MDNS_SET_RESPONSE_CMDID,
 663	WMI_MDNS_GET_STATS_CMDID,
 664	WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
 665	WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
 666	WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
 667	WMI_OCB_SET_UTC_TIME_CMDID,
 668	WMI_OCB_START_TIMING_ADVERT_CMDID,
 669	WMI_OCB_STOP_TIMING_ADVERT_CMDID,
 670	WMI_OCB_GET_TSF_TIMER_CMDID,
 671	WMI_DCC_GET_STATS_CMDID,
 672	WMI_DCC_CLEAR_STATS_CMDID,
 673	WMI_DCC_UPDATE_NDL_CMDID,
 674	WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
 675	WMI_SOC_SET_HW_MODE_CMDID,
 676	WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
 677	WMI_SOC_SET_ANTENNA_MODE_CMDID,
 678	WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
 679	WMI_PACKET_FILTER_ENABLE_CMDID,
 680	WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
 681	WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
 682	WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
 683	WMI_BPF_GET_VDEV_STATS_CMDID,
 684	WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
 685	WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
 686	WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
 687	WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
 688	WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
 689	WMI_11D_SCAN_START_CMDID,
 690	WMI_11D_SCAN_STOP_CMDID,
 691	WMI_SET_INIT_COUNTRY_CMDID,
 692	WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
 693	WMI_NDP_INITIATOR_REQ_CMDID,
 694	WMI_NDP_RESPONDER_REQ_CMDID,
 695	WMI_NDP_END_REQ_CMDID,
 696	WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
 697	WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
 698	WMI_TWT_DISABLE_CMDID,
 699	WMI_TWT_ADD_DIALOG_CMDID,
 700	WMI_TWT_DEL_DIALOG_CMDID,
 701	WMI_TWT_PAUSE_DIALOG_CMDID,
 702	WMI_TWT_RESUME_DIALOG_CMDID,
 703	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
 704				WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
 705	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
 706	WMI_MLO_LINK_SET_ACTIVE_CMDID = WMI_TLV_CMD(WMI_GRP_MLO),
 707	WMI_MLO_SETUP_CMDID,
 708	WMI_MLO_READY_CMDID,
 709	WMI_MLO_TEARDOWN_CMDID,
 710};
 711
 712enum wmi_tlv_event_id {
 713	WMI_SERVICE_READY_EVENTID = 0x1,
 714	WMI_READY_EVENTID,
 715	WMI_SERVICE_AVAILABLE_EVENTID,
 716	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
 717	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
 718	WMI_CHAN_INFO_EVENTID,
 719	WMI_PHYERR_EVENTID,
 720	WMI_PDEV_DUMP_EVENTID,
 721	WMI_TX_PAUSE_EVENTID,
 722	WMI_DFS_RADAR_EVENTID,
 723	WMI_PDEV_L1SS_TRACK_EVENTID,
 724	WMI_PDEV_TEMPERATURE_EVENTID,
 725	WMI_SERVICE_READY_EXT_EVENTID,
 726	WMI_PDEV_FIPS_EVENTID,
 727	WMI_PDEV_CHANNEL_HOPPING_EVENTID,
 728	WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
 729	WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
 730	WMI_PDEV_TPC_EVENTID,
 731	WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
 732	WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
 733	WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
 734	WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
 735	WMI_PDEV_ANTDIV_STATUS_EVENTID,
 736	WMI_PDEV_CHIP_POWER_STATS_EVENTID,
 737	WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
 738	WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
 739	WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
 740	WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
 741	WMI_PDEV_BSS_CHAN_INFO_EVENTID,
 742	WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
 743	WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
 744	WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
 745	WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
 746	WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
 747	WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
 748	WMI_PDEV_RAP_INFO_EVENTID,
 749	WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
 750	WMI_SERVICE_READY_EXT2_EVENTID,
 751	WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID =
 752					WMI_SERVICE_READY_EXT2_EVENTID + 4,
 753	WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID =
 754				WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID + 5,
 755	WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
 756	WMI_VDEV_STOPPED_EVENTID,
 757	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
 758	WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
 759	WMI_VDEV_TSF_REPORT_EVENTID,
 760	WMI_VDEV_DELETE_RESP_EVENTID,
 761	WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
 762	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
 763	WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
 764	WMI_PEER_INFO_EVENTID,
 765	WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
 766	WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
 767	WMI_PEER_STATE_EVENTID,
 768	WMI_PEER_ASSOC_CONF_EVENTID,
 769	WMI_PEER_DELETE_RESP_EVENTID,
 770	WMI_PEER_RATECODE_LIST_EVENTID,
 771	WMI_WDS_PEER_EVENTID,
 772	WMI_PEER_STA_PS_STATECHG_EVENTID,
 773	WMI_PEER_ANTDIV_INFO_EVENTID,
 774	WMI_PEER_RESERVED0_EVENTID,
 775	WMI_PEER_RESERVED1_EVENTID,
 776	WMI_PEER_RESERVED2_EVENTID,
 777	WMI_PEER_RESERVED3_EVENTID,
 778	WMI_PEER_RESERVED4_EVENTID,
 779	WMI_PEER_RESERVED5_EVENTID,
 780	WMI_PEER_RESERVED6_EVENTID,
 781	WMI_PEER_RESERVED7_EVENTID,
 782	WMI_PEER_RESERVED8_EVENTID,
 783	WMI_PEER_RESERVED9_EVENTID,
 784	WMI_PEER_RESERVED10_EVENTID,
 785	WMI_PEER_OPER_MODE_CHANGE_EVENTID,
 786	WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
 787	WMI_HOST_SWBA_EVENTID,
 788	WMI_TBTTOFFSET_UPDATE_EVENTID,
 789	WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
 790	WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
 791	WMI_MGMT_TX_COMPLETION_EVENTID,
 792	WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
 793	WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
 794	WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
 795	WMI_HOST_FILS_DISCOVERY_EVENTID,
 796	WMI_MGMT_RX_FW_CONSUMED_EVENTID = WMI_HOST_FILS_DISCOVERY_EVENTID + 3,
 797	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
 798	WMI_TX_ADDBA_COMPLETE_EVENTID,
 799	WMI_BA_RSP_SSN_EVENTID,
 800	WMI_AGGR_STATE_TRIG_EVENTID,
 801	WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
 802	WMI_PROFILE_MATCH,
 803	WMI_ROAM_SYNCH_EVENTID,
 804	WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
 805	WMI_P2P_NOA_EVENTID,
 806	WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
 807	WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
 808	WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
 809	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
 810	WMI_D0_WOW_DISABLE_ACK_EVENTID,
 811	WMI_WOW_INITIAL_WAKEUP_EVENTID,
 812	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
 813	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
 814	WMI_RTT_ERROR_REPORT_EVENTID,
 815	WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
 816	WMI_IFACE_LINK_STATS_EVENTID,
 817	WMI_PEER_LINK_STATS_EVENTID,
 818	WMI_RADIO_LINK_STATS_EVENTID,
 819	WMI_UPDATE_FW_MEM_DUMP_EVENTID,
 820	WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
 821	WMI_INST_RSSI_STATS_EVENTID,
 822	WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
 823	WMI_REPORT_STATS_EVENTID,
 824	WMI_UPDATE_RCPI_EVENTID,
 825	WMI_PEER_STATS_INFO_EVENTID,
 826	WMI_RADIO_CHAN_STATS_EVENTID,
 827	WMI_WLM_STATS_EVENTID,
 828	WMI_CTRL_PATH_STATS_EVENTID,
 829	WMI_HALPHY_STATS_CTRL_PATH_EVENTID,
 830	WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
 831	WMI_NLO_SCAN_COMPLETE_EVENTID,
 832	WMI_APFIND_EVENTID,
 833	WMI_PASSPOINT_MATCH_EVENTID,
 834	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
 835	WMI_GTK_REKEY_FAIL_EVENTID,
 836	WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
 837	WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
 838	WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
 839	WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
 840	WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
 841	WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
 842	WMI_PDEV_UTF_EVENTID,
 843	WMI_DEBUG_MESG_EVENTID,
 844	WMI_UPDATE_STATS_EVENTID,
 845	WMI_DEBUG_PRINT_EVENTID,
 846	WMI_DCS_INTERFERENCE_EVENTID,
 847	WMI_PDEV_QVIT_EVENTID,
 848	WMI_WLAN_PROFILE_DATA_EVENTID,
 849	WMI_PDEV_FTM_INTG_EVENTID,
 850	WMI_WLAN_FREQ_AVOID_EVENTID,
 851	WMI_VDEV_GET_KEEPALIVE_EVENTID,
 852	WMI_THERMAL_MGMT_EVENTID,
 853	WMI_DIAG_DATA_CONTAINER_EVENTID,
 854	WMI_HOST_AUTO_SHUTDOWN_EVENTID,
 855	WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
 856	WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
 857	WMI_DIAG_EVENTID,
 858	WMI_OCB_SET_SCHED_EVENTID,
 859	WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
 860	WMI_RSSI_BREACH_EVENTID,
 861	WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
 862	WMI_PDEV_UTF_SCPC_EVENTID,
 863	WMI_READ_DATA_FROM_FLASH_EVENTID,
 864	WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
 865	WMI_PKGID_EVENTID,
 866	WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
 867	WMI_UPLOADH_EVENTID,
 868	WMI_CAPTUREH_EVENTID,
 869	WMI_RFKILL_STATE_CHANGE_EVENTID,
 870	WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
 871	WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
 872	WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
 873	WMI_BATCH_SCAN_RESULT_EVENTID,
 874	WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
 875	WMI_OEM_MEASUREMENT_REPORT_EVENTID,
 876	WMI_OEM_ERROR_REPORT_EVENTID,
 877	WMI_OEM_RESPONSE_EVENTID,
 878	WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
 879	WMI_NAN_DISC_IFACE_CREATED_EVENTID,
 880	WMI_NAN_DISC_IFACE_DELETED_EVENTID,
 881	WMI_NAN_STARTED_CLUSTER_EVENTID,
 882	WMI_NAN_JOINED_CLUSTER_EVENTID,
 883	WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
 884	WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
 885	WMI_LPI_STATUS_EVENTID,
 886	WMI_LPI_HANDOFF_EVENTID,
 887	WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
 888	WMI_EXTSCAN_OPERATION_EVENTID,
 889	WMI_EXTSCAN_TABLE_USAGE_EVENTID,
 890	WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
 891	WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
 892	WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
 893	WMI_EXTSCAN_CAPABILITIES_EVENTID,
 894	WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
 895	WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
 896	WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
 897	WMI_SAP_OFL_DEL_STA_EVENTID,
 898	WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID =
 899				    WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL),
 900	WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
 901	WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
 902	WMI_DCC_GET_STATS_RESP_EVENTID,
 903	WMI_DCC_UPDATE_NDL_RESP_EVENTID,
 904	WMI_DCC_STATS_EVENTID,
 905	WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
 906	WMI_SOC_HW_MODE_TRANSITION_EVENTID,
 907	WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
 908	WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
 909	WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
 910	WMI_BPF_VDEV_STATS_INFO_EVENTID,
 911	WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
 912	WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
 913	WMI_11D_NEW_COUNTRY_EVENTID,
 914	WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
 915	WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
 916	WMI_NDP_INITIATOR_RSP_EVENTID,
 917	WMI_NDP_RESPONDER_RSP_EVENTID,
 918	WMI_NDP_END_RSP_EVENTID,
 919	WMI_NDP_INDICATION_EVENTID,
 920	WMI_NDP_CONFIRM_EVENTID,
 921	WMI_NDP_END_INDICATION_EVENTID,
 922
 923	WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
 924	WMI_TWT_DISABLE_EVENTID,
 925	WMI_TWT_ADD_DIALOG_EVENTID,
 926	WMI_TWT_DEL_DIALOG_EVENTID,
 927	WMI_TWT_PAUSE_DIALOG_EVENTID,
 928	WMI_TWT_RESUME_DIALOG_EVENTID,
 929	WMI_MLO_LINK_SET_ACTIVE_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MLO),
 930	WMI_MLO_SETUP_COMPLETE_EVENTID,
 931	WMI_MLO_TEARDOWN_COMPLETE_EVENTID,
 932};
 933
 934enum wmi_tlv_pdev_param {
 935	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
 936	WMI_PDEV_PARAM_RX_CHAIN_MASK,
 937	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
 938	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
 939	WMI_PDEV_PARAM_TXPOWER_SCALE,
 940	WMI_PDEV_PARAM_BEACON_GEN_MODE,
 941	WMI_PDEV_PARAM_BEACON_TX_MODE,
 942	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
 943	WMI_PDEV_PARAM_PROTECTION_MODE,
 944	WMI_PDEV_PARAM_DYNAMIC_BW,
 945	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
 946	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
 947	WMI_PDEV_PARAM_STA_KICKOUT_TH,
 948	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
 949	WMI_PDEV_PARAM_LTR_ENABLE,
 950	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
 951	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
 952	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
 953	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
 954	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
 955	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
 956	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
 957	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
 958	WMI_PDEV_PARAM_L1SS_ENABLE,
 959	WMI_PDEV_PARAM_DSLEEP_ENABLE,
 960	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
 961	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
 962	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
 963	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
 964	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
 965	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
 966	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
 967	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
 968	WMI_PDEV_PARAM_PMF_QOS,
 969	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
 970	WMI_PDEV_PARAM_DCS,
 971	WMI_PDEV_PARAM_ANI_ENABLE,
 972	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
 973	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
 974	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
 975	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
 976	WMI_PDEV_PARAM_DYNTXCHAIN,
 977	WMI_PDEV_PARAM_PROXY_STA,
 978	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
 979	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
 980	WMI_PDEV_PARAM_RFKILL_ENABLE,
 981	WMI_PDEV_PARAM_BURST_DUR,
 982	WMI_PDEV_PARAM_BURST_ENABLE,
 983	WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
 984	WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
 985	WMI_PDEV_PARAM_L1SS_TRACK,
 986	WMI_PDEV_PARAM_HYST_EN,
 987	WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
 988	WMI_PDEV_PARAM_LED_SYS_STATE,
 989	WMI_PDEV_PARAM_LED_ENABLE,
 990	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
 991	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
 992	WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
 993	WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
 994	WMI_PDEV_PARAM_CTS_CBW,
 995	WMI_PDEV_PARAM_WNTS_CONFIG,
 996	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
 997	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
 998	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
 999	WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
1000	WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
1001	WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
1002	WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
1003	WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
1004	WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
1005	WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
1006	WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
1007	WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
1008	WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
1009	WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
1010	WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
1011	WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
1012	WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
1013	WMI_PDEV_PARAM_TXPOWER_DECR_DB,
1014	WMI_PDEV_PARAM_AGGR_BURST,
1015	WMI_PDEV_PARAM_RX_DECAP_MODE,
1016	WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
1017	WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1018	WMI_PDEV_PARAM_ANTENNA_GAIN,
1019	WMI_PDEV_PARAM_RX_FILTER,
1020	WMI_PDEV_SET_MCAST_TO_UCAST_TID,
1021	WMI_PDEV_PARAM_PROXY_STA_MODE,
1022	WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1023	WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1024	WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1025	WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1026	WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1027	WMI_PDEV_PARAM_BLOCK_INTERBSS,
1028	WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1029	WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1030	WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1031	WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1032	WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1033	WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
1034	WMI_PDEV_PARAM_EN_STATS,
1035	WMI_PDEV_PARAM_MU_GROUP_POLICY,
1036	WMI_PDEV_PARAM_NOISE_DETECTION,
1037	WMI_PDEV_PARAM_NOISE_THRESHOLD,
1038	WMI_PDEV_PARAM_DPD_ENABLE,
1039	WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1040	WMI_PDEV_PARAM_ATF_STRICT_SCH,
1041	WMI_PDEV_PARAM_ATF_SCHED_DURATION,
1042	WMI_PDEV_PARAM_ANT_PLZN,
1043	WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
1044	WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
1045	WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
1046	WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
1047	WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1048	WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1049	WMI_PDEV_PARAM_CCA_THRESHOLD,
1050	WMI_PDEV_PARAM_RTS_FIXED_RATE,
1051	WMI_PDEV_PARAM_PDEV_RESET,
1052	WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1053	WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
1054	WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
1055	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
1056	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
1057	WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
1058	WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
1059	WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
1060	WMI_PDEV_PARAM_PROPAGATION_DELAY,
1061	WMI_PDEV_PARAM_ENA_ANT_DIV,
1062	WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
1063	WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
1064	WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
1065	WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
1066	WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
1067	WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
1068	WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
1069	WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
1070	WMI_PDEV_PARAM_TX_SCH_DELAY,
1071	WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
1072	WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
1073	WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
1074	WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
1075	WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
1076	WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
1077	WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
1078};
1079
1080enum wmi_tlv_vdev_param {
1081	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
1082	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
1083	WMI_VDEV_PARAM_BEACON_INTERVAL,
1084	WMI_VDEV_PARAM_LISTEN_INTERVAL,
1085	WMI_VDEV_PARAM_MULTICAST_RATE,
1086	WMI_VDEV_PARAM_MGMT_TX_RATE,
1087	WMI_VDEV_PARAM_SLOT_TIME,
1088	WMI_VDEV_PARAM_PREAMBLE,
1089	WMI_VDEV_PARAM_SWBA_TIME,
1090	WMI_VDEV_STATS_UPDATE_PERIOD,
1091	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
1092	WMI_VDEV_HOST_SWBA_INTERVAL,
1093	WMI_VDEV_PARAM_DTIM_PERIOD,
1094	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1095	WMI_VDEV_PARAM_WDS,
1096	WMI_VDEV_PARAM_ATIM_WINDOW,
1097	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
1098	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
1099	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
1100	WMI_VDEV_PARAM_FEATURE_WMM,
1101	WMI_VDEV_PARAM_CHWIDTH,
1102	WMI_VDEV_PARAM_CHEXTOFFSET,
1103	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
1104	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
1105	WMI_VDEV_PARAM_MGMT_RATE,
1106	WMI_VDEV_PARAM_PROTECTION_MODE,
1107	WMI_VDEV_PARAM_FIXED_RATE,
1108	WMI_VDEV_PARAM_SGI,
1109	WMI_VDEV_PARAM_LDPC,
1110	WMI_VDEV_PARAM_TX_STBC,
1111	WMI_VDEV_PARAM_RX_STBC,
1112	WMI_VDEV_PARAM_INTRA_BSS_FWD,
1113	WMI_VDEV_PARAM_DEF_KEYID,
1114	WMI_VDEV_PARAM_NSS,
1115	WMI_VDEV_PARAM_BCAST_DATA_RATE,
1116	WMI_VDEV_PARAM_MCAST_DATA_RATE,
1117	WMI_VDEV_PARAM_MCAST_INDICATE,
1118	WMI_VDEV_PARAM_DHCP_INDICATE,
1119	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1120	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1121	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1122	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1123	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
1124	WMI_VDEV_PARAM_ENABLE_RTSCTS,
1125	WMI_VDEV_PARAM_TXBF,
1126	WMI_VDEV_PARAM_PACKET_POWERSAVE,
1127	WMI_VDEV_PARAM_DROP_UNENCRY,
1128	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
1129	WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1130	WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1131	WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1132	WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1133	WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1134	WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1135	WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1136	WMI_VDEV_PARAM_TX_PWRLIMIT,
1137	WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
1138	WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
1139	WMI_VDEV_PARAM_ENABLE_RMC,
1140	WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
1141	WMI_VDEV_PARAM_MAX_RATE,
1142	WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
1143	WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
1144	WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
1145	WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
1146	WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
1147	WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
1148	WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
1149	WMI_VDEV_PARAM_INACTIVITY_CNT,
1150	WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
1151	WMI_VDEV_PARAM_DTIM_POLICY,
1152	WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
1153	WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
1154	WMI_VDEV_PARAM_RX_LEAK_WINDOW,
1155	WMI_VDEV_PARAM_STATS_AVG_FACTOR,
1156	WMI_VDEV_PARAM_DISCONNECT_TH,
1157	WMI_VDEV_PARAM_RTSCTS_RATE,
1158	WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
1159	WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
1160	WMI_VDEV_PARAM_TXPOWER_SCALE,
1161	WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1162	WMI_VDEV_PARAM_MCAST2UCAST_SET,
1163	WMI_VDEV_PARAM_RC_NUM_RETRIES,
1164	WMI_VDEV_PARAM_CABQ_MAXDUR,
1165	WMI_VDEV_PARAM_MFPTEST_SET,
1166	WMI_VDEV_PARAM_RTS_FIXED_RATE,
1167	WMI_VDEV_PARAM_VHT_SGIMASK,
1168	WMI_VDEV_PARAM_VHT80_RATEMASK,
1169	WMI_VDEV_PARAM_PROXY_STA,
1170	WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1171	WMI_VDEV_PARAM_RX_DECAP_TYPE,
1172	WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1173	WMI_VDEV_PARAM_SENSOR_AP,
1174	WMI_VDEV_PARAM_BEACON_RATE,
1175	WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1176	WMI_VDEV_PARAM_STA_KICKOUT,
1177	WMI_VDEV_PARAM_CAPABILITIES,
1178	WMI_VDEV_PARAM_TSF_INCREMENT,
1179	WMI_VDEV_PARAM_AMPDU_PER_AC,
1180	WMI_VDEV_PARAM_RX_FILTER,
1181	WMI_VDEV_PARAM_MGMT_TX_POWER,
1182	WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1183	WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1184	WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1185	WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1186	WMI_VDEV_PARAM_HE_DCM,
1187	WMI_VDEV_PARAM_HE_RANGE_EXT,
1188	WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1189	WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1190	WMI_VDEV_PARAM_HE_LTF = 0x74,
1191	WMI_VDEV_PARAM_BA_MODE = 0x7e,
1192	WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
1193	WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1194	WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1195	WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1196	WMI_VDEV_PARAM_BSS_COLOR,
1197	WMI_VDEV_PARAM_SET_HEMU_MODE,
1198	WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
1199	WMI_VDEV_PARAM_SET_EHT_MU_MODE = 0x8005,
1200	WMI_VDEV_PARAM_EHT_LTF,
1201};
1202
1203enum wmi_tlv_peer_flags {
1204	WMI_PEER_AUTH		= 0x00000001,
1205	WMI_PEER_QOS		= 0x00000002,
1206	WMI_PEER_NEED_PTK_4_WAY	= 0x00000004,
1207	WMI_PEER_NEED_GTK_2_WAY	= 0x00000010,
1208	WMI_PEER_HE		= 0x00000400,
1209	WMI_PEER_APSD		= 0x00000800,
1210	WMI_PEER_HT		= 0x00001000,
1211	WMI_PEER_40MHZ		= 0x00002000,
1212	WMI_PEER_STBC		= 0x00008000,
1213	WMI_PEER_LDPC		= 0x00010000,
1214	WMI_PEER_DYN_MIMOPS	= 0x00020000,
1215	WMI_PEER_STATIC_MIMOPS	= 0x00040000,
1216	WMI_PEER_SPATIAL_MUX	= 0x00200000,
1217	WMI_PEER_TWT_REQ	= 0x00400000,
1218	WMI_PEER_TWT_RESP	= 0x00800000,
1219	WMI_PEER_VHT		= 0x02000000,
1220	WMI_PEER_80MHZ		= 0x04000000,
1221	WMI_PEER_PMF		= 0x08000000,
1222	WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1223	WMI_PEER_160MHZ         = 0x40000000,
1224	WMI_PEER_SAFEMODE_EN    = 0x80000000,
1225};
1226
1227enum wmi_tlv_peer_flags_ext {
1228	WMI_PEER_EXT_EHT = BIT(0),
1229	WMI_PEER_EXT_320MHZ = BIT(1),
1230};
1231
1232/** Enum list of TLV Tags for each parameter structure type. */
1233enum wmi_tlv_tag {
1234	WMI_TAG_LAST_RESERVED = 15,
1235	WMI_TAG_FIRST_ARRAY_ENUM,
1236	WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1237	WMI_TAG_ARRAY_BYTE,
1238	WMI_TAG_ARRAY_STRUCT,
1239	WMI_TAG_ARRAY_FIXED_STRUCT,
1240	WMI_TAG_ARRAY_INT16,
1241	WMI_TAG_LAST_ARRAY_ENUM = 31,
1242	WMI_TAG_SERVICE_READY_EVENT,
1243	WMI_TAG_HAL_REG_CAPABILITIES,
1244	WMI_TAG_WLAN_HOST_MEM_REQ,
1245	WMI_TAG_READY_EVENT,
1246	WMI_TAG_SCAN_EVENT,
1247	WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1248	WMI_TAG_CHAN_INFO_EVENT,
1249	WMI_TAG_COMB_PHYERR_RX_HDR,
1250	WMI_TAG_VDEV_START_RESPONSE_EVENT,
1251	WMI_TAG_VDEV_STOPPED_EVENT,
1252	WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1253	WMI_TAG_PEER_STA_KICKOUT_EVENT,
1254	WMI_TAG_MGMT_RX_HDR,
1255	WMI_TAG_TBTT_OFFSET_EVENT,
1256	WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1257	WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1258	WMI_TAG_ROAM_EVENT,
1259	WMI_TAG_WOW_EVENT_INFO,
1260	WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1261	WMI_TAG_RTT_EVENT_HEADER,
1262	WMI_TAG_RTT_ERROR_REPORT_EVENT,
1263	WMI_TAG_RTT_MEAS_EVENT,
1264	WMI_TAG_ECHO_EVENT,
1265	WMI_TAG_FTM_INTG_EVENT,
1266	WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1267	WMI_TAG_GPIO_INPUT_EVENT,
1268	WMI_TAG_CSA_EVENT,
1269	WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1270	WMI_TAG_IGTK_INFO,
1271	WMI_TAG_DCS_INTERFERENCE_EVENT,
1272	WMI_TAG_ATH_DCS_CW_INT,
1273	WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1274		WMI_TAG_ATH_DCS_CW_INT,
1275	WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1276	WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1277		WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1278	WMI_TAG_WLAN_PROFILE_CTX_T,
1279	WMI_TAG_WLAN_PROFILE_T,
1280	WMI_TAG_PDEV_QVIT_EVENT,
1281	WMI_TAG_HOST_SWBA_EVENT,
1282	WMI_TAG_TIM_INFO,
1283	WMI_TAG_P2P_NOA_INFO,
1284	WMI_TAG_STATS_EVENT,
1285	WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1286	WMI_TAG_AVOID_FREQ_RANGE_DESC,
1287	WMI_TAG_GTK_REKEY_FAIL_EVENT,
1288	WMI_TAG_INIT_CMD,
1289	WMI_TAG_RESOURCE_CONFIG,
1290	WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1291	WMI_TAG_START_SCAN_CMD,
1292	WMI_TAG_STOP_SCAN_CMD,
1293	WMI_TAG_SCAN_CHAN_LIST_CMD,
1294	WMI_TAG_CHANNEL,
1295	WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1296	WMI_TAG_PDEV_SET_PARAM_CMD,
1297	WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1298	WMI_TAG_WMM_PARAMS,
1299	WMI_TAG_PDEV_SET_QUIET_CMD,
1300	WMI_TAG_VDEV_CREATE_CMD,
1301	WMI_TAG_VDEV_DELETE_CMD,
1302	WMI_TAG_VDEV_START_REQUEST_CMD,
1303	WMI_TAG_P2P_NOA_DESCRIPTOR,
1304	WMI_TAG_P2P_GO_SET_BEACON_IE,
1305	WMI_TAG_GTK_OFFLOAD_CMD,
1306	WMI_TAG_VDEV_UP_CMD,
1307	WMI_TAG_VDEV_STOP_CMD,
1308	WMI_TAG_VDEV_DOWN_CMD,
1309	WMI_TAG_VDEV_SET_PARAM_CMD,
1310	WMI_TAG_VDEV_INSTALL_KEY_CMD,
1311	WMI_TAG_PEER_CREATE_CMD,
1312	WMI_TAG_PEER_DELETE_CMD,
1313	WMI_TAG_PEER_FLUSH_TIDS_CMD,
1314	WMI_TAG_PEER_SET_PARAM_CMD,
1315	WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1316	WMI_TAG_VHT_RATE_SET,
1317	WMI_TAG_BCN_TMPL_CMD,
1318	WMI_TAG_PRB_TMPL_CMD,
1319	WMI_TAG_BCN_PRB_INFO,
1320	WMI_TAG_PEER_TID_ADDBA_CMD,
1321	WMI_TAG_PEER_TID_DELBA_CMD,
1322	WMI_TAG_STA_POWERSAVE_MODE_CMD,
1323	WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1324	WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1325	WMI_TAG_ROAM_SCAN_MODE,
1326	WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1327	WMI_TAG_ROAM_SCAN_PERIOD,
1328	WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1329	WMI_TAG_PDEV_SUSPEND_CMD,
1330	WMI_TAG_PDEV_RESUME_CMD,
1331	WMI_TAG_ADD_BCN_FILTER_CMD,
1332	WMI_TAG_RMV_BCN_FILTER_CMD,
1333	WMI_TAG_WOW_ENABLE_CMD,
1334	WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1335	WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1336	WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1337	WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1338	WMI_TAG_ARP_OFFLOAD_TUPLE,
1339	WMI_TAG_NS_OFFLOAD_TUPLE,
1340	WMI_TAG_FTM_INTG_CMD,
1341	WMI_TAG_STA_KEEPALIVE_CMD,
1342	WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
1343	WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1344	WMI_TAG_AP_PS_PEER_CMD,
1345	WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1346	WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1347	WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1348	WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1349	WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1350	WMI_TAG_WOW_DEL_PATTERN_CMD,
1351	WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1352	WMI_TAG_RTT_MEASREQ_HEAD,
1353	WMI_TAG_RTT_MEASREQ_BODY,
1354	WMI_TAG_RTT_TSF_CMD,
1355	WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1356	WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1357	WMI_TAG_REQUEST_STATS_CMD,
1358	WMI_TAG_NLO_CONFIG_CMD,
1359	WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1360	WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1361	WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1362	WMI_TAG_CHATTER_SET_MODE_CMD,
1363	WMI_TAG_ECHO_CMD,
1364	WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1365	WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1366	WMI_TAG_FORCE_FW_HANG_CMD,
1367	WMI_TAG_GPIO_CONFIG_CMD,
1368	WMI_TAG_GPIO_OUTPUT_CMD,
1369	WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1370	WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1371	WMI_TAG_BCN_TX_HDR,
1372	WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1373	WMI_TAG_MGMT_TX_HDR,
1374	WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1375	WMI_TAG_ADDBA_SEND_CMD,
1376	WMI_TAG_DELBA_SEND_CMD,
1377	WMI_TAG_ADDBA_SETRESPONSE_CMD,
1378	WMI_TAG_SEND_SINGLEAMSDU_CMD,
1379	WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1380	WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1381	WMI_TAG_PDEV_SET_HT_IE_CMD,
1382	WMI_TAG_PDEV_SET_VHT_IE_CMD,
1383	WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1384	WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1385	WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1386	WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1387	WMI_TAG_PEER_MCAST_GROUP_CMD,
1388	WMI_TAG_ROAM_AP_PROFILE,
1389	WMI_TAG_AP_PROFILE,
1390	WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1391	WMI_TAG_PDEV_DFS_ENABLE_CMD,
1392	WMI_TAG_PDEV_DFS_DISABLE_CMD,
1393	WMI_TAG_WOW_ADD_PATTERN_CMD,
1394	WMI_TAG_WOW_BITMAP_PATTERN_T,
1395	WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1396	WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1397	WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1398	WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1399	WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1400	WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1401	WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1402	WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1403	WMI_TAG_TXBF_CMD,
1404	WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1405	WMI_TAG_NLO_EVENT,
1406	WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1407	WMI_TAG_UPLOAD_H_HDR,
1408	WMI_TAG_CAPTURE_H_EVENT_HDR,
1409	WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1410	WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1411	WMI_TAG_VDEV_WMM_ADDTS_CMD,
1412	WMI_TAG_VDEV_WMM_DELTS_CMD,
1413	WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1414	WMI_TAG_TDLS_SET_STATE_CMD,
1415	WMI_TAG_TDLS_PEER_UPDATE_CMD,
1416	WMI_TAG_TDLS_PEER_EVENT,
1417	WMI_TAG_TDLS_PEER_CAPABILITIES,
1418	WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1419	WMI_TAG_ROAM_CHAN_LIST,
1420	WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1421	WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1422	WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1423	WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1424	WMI_TAG_BA_REQ_SSN_CMD,
1425	WMI_TAG_BA_RSP_SSN_EVENT,
1426	WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1427	WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1428	WMI_TAG_P2P_SET_OPPPS_CMD,
1429	WMI_TAG_P2P_SET_NOA_CMD,
1430	WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1431	WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1432	WMI_TAG_STA_SMPS_PARAM_CMD,
1433	WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1434	WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1435	WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1436	WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1437	WMI_TAG_P2P_NOA_EVENT,
1438	WMI_TAG_HB_SET_ENABLE_CMD,
1439	WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1440	WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1441	WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1442	WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1443	WMI_TAG_HB_IND_EVENT,
1444	WMI_TAG_TX_PAUSE_EVENT,
1445	WMI_TAG_RFKILL_EVENT,
1446	WMI_TAG_DFS_RADAR_EVENT,
1447	WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1448	WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1449	WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1450	WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1451	WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1452	WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1453	WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1454	WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1455	WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1456	WMI_TAG_VDEV_PLMREQ_START_CMD,
1457	WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1458	WMI_TAG_THERMAL_MGMT_CMD,
1459	WMI_TAG_THERMAL_MGMT_EVENT,
1460	WMI_TAG_PEER_INFO_REQ_CMD,
1461	WMI_TAG_PEER_INFO_EVENT,
1462	WMI_TAG_PEER_INFO,
1463	WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1464	WMI_TAG_RMC_SET_MODE_CMD,
1465	WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1466	WMI_TAG_RMC_CONFIG_CMD,
1467	WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1468	WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1469	WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1470	WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1471	WMI_TAG_NAN_CMD_PARAM,
1472	WMI_TAG_NAN_EVENT_HDR,
1473	WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1474	WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1475	WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1476	WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1477	WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1478	WMI_TAG_AGGR_STATE_TRIG_EVENT,
1479	WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1480	WMI_TAG_ROAM_SCAN_CMD,
1481	WMI_TAG_REQ_STATS_EXT_CMD,
1482	WMI_TAG_STATS_EXT_EVENT,
1483	WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1484	WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1485	WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1486	WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1487	WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1488	WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1489	WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1490	WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1491	WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1492	WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1493	WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1494	WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1495	WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1496	WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1497	WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1498	WMI_TAG_START_LINK_STATS_CMD,
1499	WMI_TAG_CLEAR_LINK_STATS_CMD,
1500	WMI_TAG_REQUEST_LINK_STATS_CMD,
1501	WMI_TAG_IFACE_LINK_STATS_EVENT,
1502	WMI_TAG_RADIO_LINK_STATS_EVENT,
1503	WMI_TAG_PEER_STATS_EVENT,
1504	WMI_TAG_CHANNEL_STATS,
1505	WMI_TAG_RADIO_LINK_STATS,
1506	WMI_TAG_RATE_STATS,
1507	WMI_TAG_PEER_LINK_STATS,
1508	WMI_TAG_WMM_AC_STATS,
1509	WMI_TAG_IFACE_LINK_STATS,
1510	WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1511	WMI_TAG_LPI_START_SCAN_CMD,
1512	WMI_TAG_LPI_STOP_SCAN_CMD,
1513	WMI_TAG_LPI_RESULT_EVENT,
1514	WMI_TAG_PEER_STATE_EVENT,
1515	WMI_TAG_EXTSCAN_BUCKET_CMD,
1516	WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1517	WMI_TAG_EXTSCAN_START_CMD,
1518	WMI_TAG_EXTSCAN_STOP_CMD,
1519	WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1520	WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1521	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1522	WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1523	WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1524	WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1525	WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1526	WMI_TAG_EXTSCAN_OPERATION_EVENT,
1527	WMI_TAG_EXTSCAN_START_STOP_EVENT,
1528	WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1529	WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1530	WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1531	WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1532	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1533	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1534	WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1535	WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1536	WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1537	WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1538	WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1539	WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1540	WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1541	WMI_TAG_UNIT_TEST_CMD,
1542	WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1543	WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1544	WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1545	WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1546	WMI_TAG_ROAM_SYNCH_EVENT,
1547	WMI_TAG_ROAM_SYNCH_COMPLETE,
1548	WMI_TAG_EXTWOW_ENABLE_CMD,
1549	WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1550	WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1551	WMI_TAG_LPI_STATUS_EVENT,
1552	WMI_TAG_LPI_HANDOFF_EVENT,
1553	WMI_TAG_VDEV_RATE_STATS_EVENT,
1554	WMI_TAG_VDEV_RATE_HT_INFO,
1555	WMI_TAG_RIC_REQUEST,
1556	WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1557	WMI_TAG_PDEV_TEMPERATURE_EVENT,
1558	WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1559	WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1560	WMI_TAG_RIC_TSPEC,
1561	WMI_TAG_TPC_CHAINMASK_CONFIG,
1562	WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1563	WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1564	WMI_TAG_KEY_MATERIAL,
1565	WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1566	WMI_TAG_SET_LED_FLASHING_CMD,
1567	WMI_TAG_MDNS_OFFLOAD_CMD,
1568	WMI_TAG_MDNS_SET_FQDN_CMD,
1569	WMI_TAG_MDNS_SET_RESP_CMD,
1570	WMI_TAG_MDNS_GET_STATS_CMD,
1571	WMI_TAG_MDNS_STATS_EVENT,
1572	WMI_TAG_ROAM_INVOKE_CMD,
1573	WMI_TAG_PDEV_RESUME_EVENT,
1574	WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1575	WMI_TAG_SAP_OFL_ENABLE_CMD,
1576	WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1577	WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1578	WMI_TAG_APFIND_CMD_PARAM,
1579	WMI_TAG_APFIND_EVENT_HDR,
1580	WMI_TAG_OCB_SET_SCHED_CMD,
1581	WMI_TAG_OCB_SET_SCHED_EVENT,
1582	WMI_TAG_OCB_SET_CONFIG_CMD,
1583	WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1584	WMI_TAG_OCB_SET_UTC_TIME_CMD,
1585	WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1586	WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1587	WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1588	WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1589	WMI_TAG_DCC_GET_STATS_CMD,
1590	WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1591	WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1592	WMI_TAG_DCC_CLEAR_STATS_CMD,
1593	WMI_TAG_DCC_UPDATE_NDL_CMD,
1594	WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1595	WMI_TAG_DCC_STATS_EVENT,
1596	WMI_TAG_OCB_CHANNEL,
1597	WMI_TAG_OCB_SCHEDULE_ELEMENT,
1598	WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1599	WMI_TAG_DCC_NDL_CHAN,
1600	WMI_TAG_QOS_PARAMETER,
1601	WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1602	WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1603	WMI_TAG_ROAM_FILTER,
1604	WMI_TAG_PASSPOINT_CONFIG_CMD,
1605	WMI_TAG_PASSPOINT_EVENT_HDR,
1606	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1607	WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1608	WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1609	WMI_TAG_VDEV_TSF_REPORT_EVENT,
1610	WMI_TAG_GET_FW_MEM_DUMP,
1611	WMI_TAG_UPDATE_FW_MEM_DUMP,
1612	WMI_TAG_FW_MEM_DUMP_PARAMS,
1613	WMI_TAG_DEBUG_MESG_FLUSH,
1614	WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1615	WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1616	WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1617	WMI_TAG_VDEV_SET_IE_CMD,
1618	WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1619	WMI_TAG_RSSI_BREACH_EVENT,
1620	WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1621	WMI_TAG_SOC_SET_PCL_CMD,
1622	WMI_TAG_SOC_SET_HW_MODE_CMD,
1623	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1624	WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1625	WMI_TAG_VDEV_TXRX_STREAMS,
1626	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1627	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1628	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1629	WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1630	WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1631	WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1632	WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1633	WMI_TAG_PACKET_FILTER_CONFIG,
1634	WMI_TAG_PACKET_FILTER_ENABLE,
1635	WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1636	WMI_TAG_MGMT_TX_SEND_CMD,
1637	WMI_TAG_MGMT_TX_COMPL_EVENT,
1638	WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1639	WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1640	WMI_TAG_LRO_INFO_CMD,
1641	WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1642	WMI_TAG_SERVICE_READY_EXT_EVENT,
1643	WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1644	WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1645	WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1646	WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1647	WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1648	WMI_TAG_PEER_ASSOC_CONF_EVENT,
1649	WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1650	WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1651	WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1652	WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1653	WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1654	WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1655	WMI_TAG_SCPC_EVENT,
1656	WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1657	WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1658	WMI_TAG_BPF_GET_CAPABILITY_CMD,
1659	WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1660	WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1661	WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1662	WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1663	WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1664	WMI_TAG_VDEV_DELETE_RESP_EVENT,
1665	WMI_TAG_PEER_DELETE_RESP_EVENT,
1666	WMI_TAG_ROAM_DENSE_THRES_PARAM,
1667	WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1668	WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1669	WMI_TAG_VDEV_CONFIG_RATEMASK,
1670	WMI_TAG_PDEV_FIPS_CMD,
1671	WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1672	WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1673	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1674	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1675	WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1676	WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1677	WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1678	WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1679	WMI_TAG_FWTEST_SET_PARAM_CMD,
1680	WMI_TAG_PEER_ATF_REQUEST,
1681	WMI_TAG_VDEV_ATF_REQUEST,
1682	WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1683	WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1684	WMI_TAG_INST_RSSI_STATS_RESP,
1685	WMI_TAG_MED_UTIL_REPORT_EVENT,
1686	WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1687	WMI_TAG_WDS_ADDR_EVENT,
1688	WMI_TAG_PEER_RATECODE_LIST_EVENT,
1689	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1690	WMI_TAG_PDEV_TPC_EVENT,
1691	WMI_TAG_ANI_OFDM_EVENT,
1692	WMI_TAG_ANI_CCK_EVENT,
1693	WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1694	WMI_TAG_PDEV_FIPS_EVENT,
1695	WMI_TAG_ATF_PEER_INFO,
1696	WMI_TAG_PDEV_GET_TPC_CMD,
1697	WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1698	WMI_TAG_QBOOST_CFG_CMD,
1699	WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1700	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1701	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1702	WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1703	WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1704	WMI_TAG_PEER_MCS_RATE_INFO,
1705	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1706	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1707	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1708	WMI_TAG_MU_REPORT_TOTAL_MU,
1709	WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1710	WMI_TAG_ROAM_SET_MBO,
1711	WMI_TAG_MIB_STATS_ENABLE_CMD,
1712	WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1713	WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1714	WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1715	WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1716	WMI_TAG_NDI_GET_CAP_REQ,
1717	WMI_TAG_NDP_INITIATOR_REQ,
1718	WMI_TAG_NDP_RESPONDER_REQ,
1719	WMI_TAG_NDP_END_REQ,
1720	WMI_TAG_NDI_CAP_RSP_EVENT,
1721	WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1722	WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1723	WMI_TAG_NDP_END_RSP_EVENT,
1724	WMI_TAG_NDP_INDICATION_EVENT,
1725	WMI_TAG_NDP_CONFIRM_EVENT,
1726	WMI_TAG_NDP_END_INDICATION_EVENT,
1727	WMI_TAG_VDEV_SET_QUIET_CMD,
1728	WMI_TAG_PDEV_SET_PCL_CMD,
1729	WMI_TAG_PDEV_SET_HW_MODE_CMD,
1730	WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1731	WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1732	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1733	WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1734	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1735	WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1736	WMI_TAG_COEX_CONFIG_CMD,
1737	WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1738	WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1739	WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1740	WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1741	WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1742	WMI_TAG_MAC_PHY_CAPABILITIES,
1743	WMI_TAG_HW_MODE_CAPABILITIES,
1744	WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1745	WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1746	WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1747	WMI_TAG_VDEV_WISA_CMD,
1748	WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1749	WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1750	WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1751	WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1752	WMI_TAG_NDP_END_RSP_PER_NDI,
1753	WMI_TAG_PEER_BWF_REQUEST,
1754	WMI_TAG_BWF_PEER_INFO,
1755	WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1756	WMI_TAG_RMC_SET_LEADER_CMD,
1757	WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1758	WMI_TAG_PER_CHAIN_RSSI_STATS,
1759	WMI_TAG_RSSI_STATS,
1760	WMI_TAG_P2P_LO_START_CMD,
1761	WMI_TAG_P2P_LO_STOP_CMD,
1762	WMI_TAG_P2P_LO_STOPPED_EVENT,
1763	WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1764	WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1765	WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1766	WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1767	WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1768	WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1769	WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1770	WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1771	WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1772	WMI_TAG_TLV_BUF_LEN_PARAM,
1773	WMI_TAG_SERVICE_AVAILABLE_EVENT,
1774	WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1775	WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1776	WMI_TAG_PEER_ANTDIV_INFO,
1777	WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1778	WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1779	WMI_TAG_MNT_FILTER_CMD,
1780	WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1781	WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1782	WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1783	WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1784	WMI_TAG_CHAN_CCA_STATS,
1785	WMI_TAG_PEER_SIGNAL_STATS,
1786	WMI_TAG_TX_STATS,
1787	WMI_TAG_PEER_AC_TX_STATS,
1788	WMI_TAG_RX_STATS,
1789	WMI_TAG_PEER_AC_RX_STATS,
1790	WMI_TAG_REPORT_STATS_EVENT,
1791	WMI_TAG_CHAN_CCA_STATS_THRESH,
1792	WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1793	WMI_TAG_TX_STATS_THRESH,
1794	WMI_TAG_RX_STATS_THRESH,
1795	WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1796	WMI_TAG_REQUEST_WLAN_STATS_CMD,
1797	WMI_TAG_RX_AGGR_FAILURE_EVENT,
1798	WMI_TAG_RX_AGGR_FAILURE_INFO,
1799	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1800	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1801	WMI_TAG_PDEV_BAND_TO_MAC,
1802	WMI_TAG_TBTT_OFFSET_INFO,
1803	WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1804	WMI_TAG_SAR_LIMITS_CMD,
1805	WMI_TAG_SAR_LIMIT_CMD_ROW,
1806	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1807	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1808	WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1809	WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1810	WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1811	WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1812	WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1813	WMI_TAG_VENDOR_OUI,
1814	WMI_TAG_REQUEST_RCPI_CMD,
1815	WMI_TAG_UPDATE_RCPI_EVENT,
1816	WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1817	WMI_TAG_PEER_STATS_INFO,
1818	WMI_TAG_PEER_STATS_INFO_EVENT,
1819	WMI_TAG_PKGID_EVENT,
1820	WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1821	WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1822	WMI_TAG_REGULATORY_RULE_STRUCT,
1823	WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1824	WMI_TAG_11D_SCAN_START_CMD,
1825	WMI_TAG_11D_SCAN_STOP_CMD,
1826	WMI_TAG_11D_NEW_COUNTRY_EVENT,
1827	WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1828	WMI_TAG_RADIO_CHAN_STATS,
1829	WMI_TAG_RADIO_CHAN_STATS_EVENT,
1830	WMI_TAG_ROAM_PER_CONFIG,
1831	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1832	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1833	WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1834	WMI_TAG_HW_DATA_FILTER_CMD,
1835	WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1836	WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1837	WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1838	WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1839	WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1840	WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1841	WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1842	WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1843	WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1844	WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1845	WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1846	WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1847	WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1848	WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1849	WMI_TAG_IFACE_OFFLOAD_STATS,
1850	WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1851	WMI_TAG_RSSI_CTL_EXT,
1852	WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1853	WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1854	WMI_TAG_VDEV_GET_TX_POWER_CMD,
1855	WMI_TAG_VDEV_TX_POWER_EVENT,
1856	WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1857	WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1858	WMI_TAG_TX_SEND_PARAMS,
1859	WMI_TAG_HE_RATE_SET,
1860	WMI_TAG_CONGESTION_STATS,
1861	WMI_TAG_SET_INIT_COUNTRY_CMD,
1862	WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1863	WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1864	WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1865	WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1866	WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1867	WMI_TAG_THERM_THROT_STATS_EVENT,
1868	WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1869	WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1870	WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1871	WMI_TAG_OEM_DMA_RING_CFG_REQ,
1872	WMI_TAG_OEM_DMA_RING_CFG_RSP,
1873	WMI_TAG_OEM_INDIRECT_DATA,
1874	WMI_TAG_OEM_DMA_BUF_RELEASE,
1875	WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1876	WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1877	WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1878	WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1879	WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1880	WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1881	WMI_TAG_UNIT_TEST_EVENT,
1882	WMI_TAG_ROAM_FILS_OFFLOAD,
1883	WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1884	WMI_TAG_PMK_CACHE,
1885	WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1886	WMI_TAG_ROAM_FILS_SYNCH,
1887	WMI_TAG_GTK_OFFLOAD_EXTENDED,
1888	WMI_TAG_ROAM_BG_SCAN_ROAMING,
1889	WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1890	WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1891	WMI_TAG_OIC_PING_HANDOFF_EVENT,
1892	WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1893	WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1894	WMI_TAG_BTM_CONFIG,
1895	WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1896	WMI_TAG_WLM_CONFIG_CMD,
1897	WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1898	WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1899	WMI_TAG_ROAM_CND_SCORING_PARAM,
1900	WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1901	WMI_TAG_VENDOR_OUI_EXT,
1902	WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1903	WMI_TAG_FD_SEND_FROM_HOST_CMD,
1904	WMI_TAG_ENABLE_FILS_CMD,
1905	WMI_TAG_HOST_SWFDA_EVENT,
1906	WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1907	WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1908	WMI_TAG_STATS_PERIOD,
1909	WMI_TAG_NDL_SCHEDULE_UPDATE,
1910	WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1911	WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1912	WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1913	WMI_TAG_SAR2_RESULT_EVENT,
1914	WMI_TAG_SAR_CAPABILITIES,
1915	WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1916	WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1917	WMI_TAG_DMA_RING_CAPABILITIES,
1918	WMI_TAG_DMA_RING_CFG_REQ,
1919	WMI_TAG_DMA_RING_CFG_RSP,
1920	WMI_TAG_DMA_BUF_RELEASE,
1921	WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1922	WMI_TAG_SAR_GET_LIMITS_CMD,
1923	WMI_TAG_SAR_GET_LIMITS_EVENT,
1924	WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1925	WMI_TAG_OFFLOAD_11K_REPORT,
1926	WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1927	WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1928	WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1929	WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1930	WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1931	WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1932	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1933	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1934	WMI_TAG_PDEV_GET_NFCAL_POWER,
1935	WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1936	WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1937	WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1938	WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1939	WMI_TAG_TWT_ENABLE_CMD,
1940	WMI_TAG_TWT_DISABLE_CMD,
1941	WMI_TAG_TWT_ADD_DIALOG_CMD,
1942	WMI_TAG_TWT_DEL_DIALOG_CMD,
1943	WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1944	WMI_TAG_TWT_RESUME_DIALOG_CMD,
1945	WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1946	WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1947	WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1948	WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1949	WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1950	WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1951	WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1952	WMI_TAG_ROAM_SCAN_STATS_EVENT,
1953	WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1954	WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1955	WMI_TAG_GET_TPC_POWER_CMD,
1956	WMI_TAG_GET_TPC_POWER_EVENT,
1957	WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1958	WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1959	WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1960	WMI_TAG_MOTION_DET_START_STOP_CMD,
1961	WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1962	WMI_TAG_MOTION_DET_EVENT,
1963	WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1964	WMI_TAG_NDP_TRANSPORT_IP,
1965	WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1966	WMI_TAG_ESP_ESTIMATE_EVENT,
1967	WMI_TAG_NAN_HOST_CONFIG,
1968	WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1969	WMI_TAG_PEER_CFR_CAPTURE_CMD,
1970	WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1971	WMI_TAG_CHAN_WIDTH_PEER_LIST,
1972	WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1973	WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1974	WMI_TAG_PEER_EXTD2_STATS,
1975	WMI_TAG_HPCS_PULSE_START_CMD,
1976	WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1977	WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1978	WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1979	WMI_TAG_NAN_EVENT_INFO,
1980	WMI_TAG_NDP_CHANNEL_INFO,
1981	WMI_TAG_NDP_CMD,
1982	WMI_TAG_NDP_EVENT,
1983	/* TODO add all the missing cmds */
1984	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1985	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1986	WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334,
1987	WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
1988	WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F,
1989	WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
1990	WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
1991	WMI_TAG_TPC_STATS_GET_CMD = 0x38B,
1992	WMI_TAG_TPC_STATS_EVENT_FIXED_PARAM,
1993	WMI_TAG_TPC_STATS_CONFIG_EVENT,
1994	WMI_TAG_TPC_STATS_REG_PWR_ALLOWED,
1995	WMI_TAG_TPC_STATS_RATES_ARRAY,
1996	WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT,
1997	WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5,
1998	WMI_TAG_VDEV_CH_POWER_INFO,
1999	WMI_TAG_MLO_LINK_SET_ACTIVE_CMD = 0x3BE,
2000	WMI_TAG_EHT_RATE_SET = 0x3C4,
2001	WMI_TAG_DCS_AWGN_INT_TYPE = 0x3C5,
2002	WMI_TAG_MLO_TX_SEND_PARAMS,
2003	WMI_TAG_MLO_PARTNER_LINK_PARAMS,
2004	WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC,
2005	WMI_TAG_MLO_SETUP_CMD = 0x3C9,
2006	WMI_TAG_MLO_SETUP_COMPLETE_EVENT,
2007	WMI_TAG_MLO_READY_CMD,
2008	WMI_TAG_MLO_TEARDOWN_CMD,
2009	WMI_TAG_MLO_TEARDOWN_COMPLETE,
2010	WMI_TAG_MLO_PEER_ASSOC_PARAMS = 0x3D0,
2011	WMI_TAG_MLO_PEER_CREATE_PARAMS = 0x3D5,
2012	WMI_TAG_MLO_VDEV_START_PARAMS = 0x3D6,
2013	WMI_TAG_MLO_VDEV_CREATE_PARAMS = 0x3D7,
2014	WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
2015	WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9,
2016	WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB,
2017	WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM = 0x427,
2018	WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO,
2019	WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO,
2020	WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM = 0x442,
2021	WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM,
2022	WMI_TAG_MAX
2023};
2024
2025enum wmi_tlv_service {
2026	WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
2027	WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
2028	WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
2029	WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
2030	WMI_TLV_SERVICE_STA_PWRSAVE = 4,
2031	WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
2032	WMI_TLV_SERVICE_AP_UAPSD = 6,
2033	WMI_TLV_SERVICE_AP_DFS = 7,
2034	WMI_TLV_SERVICE_11AC = 8,
2035	WMI_TLV_SERVICE_BLOCKACK = 9,
2036	WMI_TLV_SERVICE_PHYERR = 10,
2037	WMI_TLV_SERVICE_BCN_FILTER = 11,
2038	WMI_TLV_SERVICE_RTT = 12,
2039	WMI_TLV_SERVICE_WOW = 13,
2040	WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
2041	WMI_TLV_SERVICE_IRAM_TIDS = 15,
2042	WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
2043	WMI_TLV_SERVICE_NLO = 17,
2044	WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
2045	WMI_TLV_SERVICE_SCAN_SCH = 19,
2046	WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
2047	WMI_TLV_SERVICE_CHATTER = 21,
2048	WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
2049	WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
2050	WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
2051	WMI_TLV_SERVICE_GPIO = 25,
2052	WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
2053	WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
2054	WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
2055	WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
2056	WMI_TLV_SERVICE_TX_ENCAP = 30,
2057	WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
2058	WMI_TLV_SERVICE_EARLY_RX = 32,
2059	WMI_TLV_SERVICE_STA_SMPS = 33,
2060	WMI_TLV_SERVICE_FWTEST = 34,
2061	WMI_TLV_SERVICE_STA_WMMAC = 35,
2062	WMI_TLV_SERVICE_TDLS = 36,
2063	WMI_TLV_SERVICE_BURST = 37,
2064	WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
2065	WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
2066	WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
2067	WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
2068	WMI_TLV_SERVICE_WLAN_HB = 42,
2069	WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
2070	WMI_TLV_SERVICE_BATCH_SCAN = 44,
2071	WMI_TLV_SERVICE_QPOWER = 45,
2072	WMI_TLV_SERVICE_PLMREQ = 46,
2073	WMI_TLV_SERVICE_THERMAL_MGMT = 47,
2074	WMI_TLV_SERVICE_RMC = 48,
2075	WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
2076	WMI_TLV_SERVICE_COEX_SAR = 50,
2077	WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
2078	WMI_TLV_SERVICE_NAN = 52,
2079	WMI_TLV_SERVICE_L1SS_STAT = 53,
2080	WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
2081	WMI_TLV_SERVICE_OBSS_SCAN = 55,
2082	WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
2083	WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
2084	WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
2085	WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
2086	WMI_TLV_SERVICE_LPASS = 60,
2087	WMI_TLV_SERVICE_EXTSCAN = 61,
2088	WMI_TLV_SERVICE_D0WOW = 62,
2089	WMI_TLV_SERVICE_HSOFFLOAD = 63,
2090	WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
2091	WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
2092	WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
2093	WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
2094	WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
2095	WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
2096	WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
2097	WMI_TLV_SERVICE_OCB = 71,
2098	WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
2099	WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
2100	WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
2101	WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
2102	WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
2103	WMI_TLV_SERVICE_EXT_MSG = 77,
2104	WMI_TLV_SERVICE_MAWC = 78,
2105	WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
2106	WMI_TLV_SERVICE_EGAP = 80,
2107	WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
2108	WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
2109	WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
2110	WMI_TLV_SERVICE_ATF = 84,
2111	WMI_TLV_SERVICE_COEX_GPIO = 85,
2112	WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
2113	WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
2114	WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
2115	WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
2116	WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
2117	WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
2118	WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
2119	WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
2120	WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
2121	WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
2122	WMI_TLV_SERVICE_NAN_DATA = 96,
2123	WMI_TLV_SERVICE_NAN_RTT = 97,
2124	WMI_TLV_SERVICE_11AX = 98,
2125	WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
2126	WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
2127	WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
2128	WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
2129	WMI_TLV_SERVICE_MESH_11S = 103,
2130	WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
2131	WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
2132	WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
2133	WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
2134	WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
2135	WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
2136	WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
2137	WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
2138	WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
2139	WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
2140	WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
2141	WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
2142	WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
2143	WMI_TLV_SERVICE_REGULATORY_DB = 117,
2144	WMI_TLV_SERVICE_11D_OFFLOAD = 118,
2145	WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
2146	WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
2147	WMI_TLV_SERVICE_PKT_ROUTING = 121,
2148	WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
2149	WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
2150	WMI_TLV_SERVICE_8SS_TX_BFEE  = 124,
2151	WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
2152	WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
2153	WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
2154
2155	WMI_MAX_SERVICE = 128,
2156
2157	WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
2158	WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
2159	WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
2160	WMI_TLV_SERVICE_FILS_SUPPORT = 131,
2161	WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
2162	WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
2163	WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
2164	WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
2165	WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
2166	WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
2167	WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
2168	WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
2169	WMI_TLV_SERVICE_THERM_THROT = 140,
2170	WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
2171	WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
2172	WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
2173	WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
2174	WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
2175	WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
2176	WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
2177	WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
2178	WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
2179	WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
2180	WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
2181	WMI_TLV_SERVICE_STA_TWT = 152,
2182	WMI_TLV_SERVICE_AP_TWT = 153,
2183	WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
2184	WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
2185	WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
2186	WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
2187	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
2188	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
2189	WMI_TLV_SERVICE_MOTION_DET = 160,
2190	WMI_TLV_SERVICE_INFRA_MBSSID = 161,
2191	WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
2192	WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
2193	WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
2194	WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
2195	WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
2196	WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
2197	WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
2198	WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
2199	WMI_TLV_SERVICE_ESP_SUPPORT = 170,
2200	WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
2201	WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
2202	WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
2203	WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
2204	WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
2205	WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
2206	WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
2207	WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
2208	WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2209	WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2210	WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2211	WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2212	WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2213	WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2214	WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2215	WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2216	WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2217	WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2218	WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2219	WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2220	WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2221	WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2222	WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2223	WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2224	WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2225	WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2226	WMI_TLV_SERVICE_VOW_ENABLE = 197,
2227	WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2228	WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2229	WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2230	WMI_TLV_SERVICE_PS_TDCC = 201,
2231	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY   = 202,
2232	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2233	WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2234	WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2235	WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2236	WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2237	WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2238	WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2239	WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2240	WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2241	WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2242	WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2243	WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2244	WMI_TLV_SERVICE_EXT2_MSG = 220,
2245	WMI_TLV_SERVICE_BEACON_PROTECTION_SUPPORT = 244,
2246	WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
2247
2248	WMI_MAX_EXT_SERVICE = 256,
2249
2250	WMI_TLV_SERVICE_EXT_TPC_REG_SUPPORT = 280,
2251
2252	WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
2253
2254	WMI_TLV_SERVICE_11BE = 289,
2255
2256	WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361,
2257
2258	WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365,
2259	WMI_TLV_SERVICE_ETH_OFFLOAD = 461,
2260
2261	WMI_MAX_EXT2_SERVICE,
2262};
2263
2264enum {
2265	WMI_SMPS_FORCED_MODE_NONE = 0,
2266	WMI_SMPS_FORCED_MODE_DISABLED,
2267	WMI_SMPS_FORCED_MODE_STATIC,
2268	WMI_SMPS_FORCED_MODE_DYNAMIC
2269};
2270
2271enum wmi_tpc_chainmask {
2272	WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0,
2273	WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1,
2274	WMI_NUM_SUPPORTED_BAND_MAX = 2,
2275};
2276
2277enum wmi_peer_param {
2278	WMI_PEER_MIMO_PS_STATE = 1,
2279	WMI_PEER_AMPDU = 2,
2280	WMI_PEER_AUTHORIZE = 3,
2281	WMI_PEER_CHWIDTH = 4,
2282	WMI_PEER_NSS = 5,
2283	WMI_PEER_USE_4ADDR = 6,
2284	WMI_PEER_MEMBERSHIP = 7,
2285	WMI_PEER_USERPOS = 8,
2286	WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9,
2287	WMI_PEER_TX_FAIL_CNT_THR = 10,
2288	WMI_PEER_SET_HW_RETRY_CTS2S = 11,
2289	WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12,
2290	WMI_PEER_PHYMODE = 13,
2291	WMI_PEER_USE_FIXED_PWR = 14,
2292	WMI_PEER_PARAM_FIXED_RATE = 15,
2293	WMI_PEER_SET_MU_WHITELIST = 16,
2294	WMI_PEER_SET_MAX_TX_RATE = 17,
2295	WMI_PEER_SET_MIN_TX_RATE = 18,
2296	WMI_PEER_SET_DEFAULT_ROUTING = 19,
2297	WMI_PEER_CHWIDTH_PUNCTURE_20MHZ_BITMAP = 39,
2298};
2299
2300#define WMI_PEER_PUNCTURE_BITMAP		GENMASK(23, 8)
2301
2302enum wmi_slot_time {
2303	WMI_VDEV_SLOT_TIME_LONG = 1,
2304	WMI_VDEV_SLOT_TIME_SHORT = 2,
2305};
2306
2307enum wmi_preamble {
2308	WMI_VDEV_PREAMBLE_LONG = 1,
2309	WMI_VDEV_PREAMBLE_SHORT = 2,
2310};
2311
2312enum wmi_peer_smps_state {
2313	WMI_PEER_SMPS_PS_NONE =	0,
2314	WMI_PEER_SMPS_STATIC  = 1,
2315	WMI_PEER_SMPS_DYNAMIC = 2
2316};
2317
2318enum wmi_peer_chwidth {
2319	WMI_PEER_CHWIDTH_20MHZ = 0,
2320	WMI_PEER_CHWIDTH_40MHZ = 1,
2321	WMI_PEER_CHWIDTH_80MHZ = 2,
2322	WMI_PEER_CHWIDTH_160MHZ = 3,
2323	WMI_PEER_CHWIDTH_320MHZ = 4,
2324};
2325
2326enum wmi_beacon_gen_mode {
2327	WMI_BEACON_STAGGERED_MODE = 0,
2328	WMI_BEACON_BURST_MODE = 1
2329};
2330
2331enum wmi_direct_buffer_module {
2332	WMI_DIRECT_BUF_SPECTRAL = 0,
2333	WMI_DIRECT_BUF_CFR = 1,
2334
2335	/* keep it last */
2336	WMI_DIRECT_BUF_MAX
2337};
2338
2339/**
2340 * enum wmi_nss_ratio - NSS ratio received from FW during service ready ext event
2341 * @WMI_NSS_RATIO_1BY2_NSS: Max nss of 160MHz is equals to half of the max nss of 80MHz
2342 * @WMI_NSS_RATIO_3BY4_NSS: Max nss of 160MHz is equals to 3/4 of the max nss of 80MHz
2343 * @WMI_NSS_RATIO_1_NSS: Max nss of 160MHz is equals to the max nss of 80MHz
2344 * @WMI_NSS_RATIO_2_NSS: Max nss of 160MHz is equals to two times the max nss of 80MHz
2345 */
2346
2347enum wmi_nss_ratio {
2348	WMI_NSS_RATIO_1BY2_NSS,
2349	WMI_NSS_RATIO_3BY4_NSS,
2350	WMI_NSS_RATIO_1_NSS,
2351	WMI_NSS_RATIO_2_NSS
2352};
2353
2354struct ath12k_wmi_pdev_band_arg {
2355	u32 pdev_id;
2356	u32 start_freq;
2357	u32 end_freq;
2358};
2359
2360struct ath12k_wmi_ppe_threshold_arg {
2361	u32 numss_m1;
2362	u32 ru_bit_mask;
2363	u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2364};
2365
2366#define PSOC_HOST_MAX_PHY_SIZE (3)
2367#define ATH12K_11B_SUPPORT                 BIT(0)
2368#define ATH12K_11G_SUPPORT                 BIT(1)
2369#define ATH12K_11A_SUPPORT                 BIT(2)
2370#define ATH12K_11N_SUPPORT                 BIT(3)
2371#define ATH12K_11AC_SUPPORT                BIT(4)
2372#define ATH12K_11AX_SUPPORT                BIT(5)
2373
2374struct ath12k_wmi_hal_reg_capabilities_ext_arg {
2375	u32 phy_id;
2376	u32 eeprom_reg_domain;
2377	u32 eeprom_reg_domain_ext;
2378	u32 regcap1;
2379	u32 regcap2;
2380	u32 wireless_modes;
2381	u32 low_2ghz_chan;
2382	u32 high_2ghz_chan;
2383	u32 low_5ghz_chan;
2384	u32 high_5ghz_chan;
2385};
2386
2387#define WMI_HOST_MAX_PDEV 3
2388
2389struct ath12k_wmi_host_mem_chunk_params {
2390	__le32 tlv_header;
2391	__le32 req_id;
2392	__le32 ptr;
2393	__le32 size;
2394} __packed;
2395
2396struct ath12k_wmi_host_mem_chunk_arg {
2397	void *vaddr;
2398	dma_addr_t paddr;
2399	u32 len;
2400	u32 req_id;
2401};
2402
2403enum ath12k_peer_metadata_version {
2404	ATH12K_PEER_METADATA_V0,
2405	ATH12K_PEER_METADATA_V1,
2406	ATH12K_PEER_METADATA_V1A,
2407	ATH12K_PEER_METADATA_V1B
2408};
2409
2410struct ath12k_wmi_resource_config_arg {
2411	u32 num_vdevs;
2412	u32 num_peers;
2413	u32 num_active_peers;
2414	u32 num_offload_peers;
2415	u32 num_offload_reorder_buffs;
2416	u32 num_peer_keys;
2417	u32 num_tids;
2418	u32 ast_skid_limit;
2419	u32 tx_chain_mask;
2420	u32 rx_chain_mask;
2421	u32 rx_timeout_pri[4];
2422	u32 rx_decap_mode;
2423	u32 scan_max_pending_req;
2424	u32 bmiss_offload_max_vdev;
2425	u32 roam_offload_max_vdev;
2426	u32 roam_offload_max_ap_profiles;
2427	u32 num_mcast_groups;
2428	u32 num_mcast_table_elems;
2429	u32 mcast2ucast_mode;
2430	u32 tx_dbg_log_size;
2431	u32 num_wds_entries;
2432	u32 dma_burst_size;
2433	u32 mac_aggr_delim;
2434	u32 rx_skip_defrag_timeout_dup_detection_check;
2435	u32 vow_config;
2436	u32 gtk_offload_max_vdev;
2437	u32 num_msdu_desc;
2438	u32 max_frag_entries;
2439	u32 max_peer_ext_stats;
2440	u32 smart_ant_cap;
2441	u32 bk_minfree;
2442	u32 be_minfree;
2443	u32 vi_minfree;
2444	u32 vo_minfree;
2445	u32 rx_batchmode;
2446	u32 tt_support;
2447	u32 atf_config;
2448	u32 iphdr_pad_config;
2449	u32 qwrap_config:16,
2450	    alloc_frag_desc_for_data_pkt:16;
2451	u32 num_tdls_vdevs;
2452	u32 num_tdls_conn_table_entries;
2453	u32 beacon_tx_offload_max_vdev;
2454	u32 num_multicast_filter_entries;
2455	u32 num_wow_filters;
2456	u32 num_keep_alive_pattern;
2457	u32 keep_alive_pattern_size;
2458	u32 max_tdls_concurrent_sleep_sta;
2459	u32 max_tdls_concurrent_buffer_sta;
2460	u32 wmi_send_separate;
2461	u32 num_ocb_vdevs;
2462	u32 num_ocb_channels;
2463	u32 num_ocb_schedules;
2464	u32 num_ns_ext_tuples_cfg;
2465	u32 bpf_instruction_size;
2466	u32 max_bssid_rx_filters;
2467	u32 use_pdev_id;
2468	u32 peer_map_unmap_version;
2469	u32 sched_params;
2470	u32 twt_ap_pdev_count;
2471	u32 twt_ap_sta_count;
2472	enum ath12k_peer_metadata_version peer_metadata_ver;
2473	u32 ema_max_vap_cnt;
2474	u32 ema_max_profile_period;
2475	bool is_reg_cc_ext_event_supported;
2476};
2477
2478struct ath12k_wmi_init_cmd_arg {
2479	struct ath12k_wmi_resource_config_arg res_cfg;
2480	u8 num_mem_chunks;
2481	struct ath12k_wmi_host_mem_chunk_arg *mem_chunks;
2482	u32 hw_mode_id;
2483	u32 num_band_to_mac;
2484	struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV];
2485};
2486
2487struct ath12k_wmi_pdev_band_to_mac_params {
2488	__le32 tlv_header;
2489	__le32 pdev_id;
2490	__le32 start_freq;
2491	__le32 end_freq;
2492} __packed;
2493
2494/* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part
2495 * of WMI_TAG_INIT_CMD.
2496 */
2497struct ath12k_wmi_pdev_set_hw_mode_cmd {
2498	__le32 tlv_header;
2499	__le32 pdev_id;
2500	__le32 hw_mode_index;
2501	__le32 num_band_to_mac;
2502} __packed;
2503
2504struct ath12k_wmi_ppe_threshold_params {
2505	__le32 numss_m1; /** NSS - 1*/
2506	__le32 ru_info;
2507	__le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2508} __packed;
2509
2510#define HW_BD_INFO_SIZE       5
2511
2512struct ath12k_wmi_abi_version_params {
2513	__le32 abi_version_0;
2514	__le32 abi_version_1;
2515	__le32 abi_version_ns_0;
2516	__le32 abi_version_ns_1;
2517	__le32 abi_version_ns_2;
2518	__le32 abi_version_ns_3;
2519} __packed;
2520
2521struct wmi_init_cmd {
2522	__le32 tlv_header;
2523	struct ath12k_wmi_abi_version_params host_abi_vers;
2524	__le32 num_host_mem_chunks;
2525} __packed;
2526
2527#define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4
2528#define WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT   12
2529#define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION		GENMASK(5, 4)
2530#define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64	BIT(5)
2531#define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET      BIT(9)
2532#define WMI_RSRC_CFG_FLAG1_ACK_RSSI	BIT(18)
2533
2534struct ath12k_wmi_resource_config_params {
2535	__le32 tlv_header;
2536	__le32 num_vdevs;
2537	__le32 num_peers;
2538	__le32 num_offload_peers;
2539	__le32 num_offload_reorder_buffs;
2540	__le32 num_peer_keys;
2541	__le32 num_tids;
2542	__le32 ast_skid_limit;
2543	__le32 tx_chain_mask;
2544	__le32 rx_chain_mask;
2545	__le32 rx_timeout_pri[4];
2546	__le32 rx_decap_mode;
2547	__le32 scan_max_pending_req;
2548	__le32 bmiss_offload_max_vdev;
2549	__le32 roam_offload_max_vdev;
2550	__le32 roam_offload_max_ap_profiles;
2551	__le32 num_mcast_groups;
2552	__le32 num_mcast_table_elems;
2553	__le32 mcast2ucast_mode;
2554	__le32 tx_dbg_log_size;
2555	__le32 num_wds_entries;
2556	__le32 dma_burst_size;
2557	__le32 mac_aggr_delim;
2558	__le32 rx_skip_defrag_timeout_dup_detection_check;
2559	__le32 vow_config;
2560	__le32 gtk_offload_max_vdev;
2561	__le32 num_msdu_desc;
2562	__le32 max_frag_entries;
2563	__le32 num_tdls_vdevs;
2564	__le32 num_tdls_conn_table_entries;
2565	__le32 beacon_tx_offload_max_vdev;
2566	__le32 num_multicast_filter_entries;
2567	__le32 num_wow_filters;
2568	__le32 num_keep_alive_pattern;
2569	__le32 keep_alive_pattern_size;
2570	__le32 max_tdls_concurrent_sleep_sta;
2571	__le32 max_tdls_concurrent_buffer_sta;
2572	__le32 wmi_send_separate;
2573	__le32 num_ocb_vdevs;
2574	__le32 num_ocb_channels;
2575	__le32 num_ocb_schedules;
2576	__le32 flag1;
2577	__le32 smart_ant_cap;
2578	__le32 bk_minfree;
2579	__le32 be_minfree;
2580	__le32 vi_minfree;
2581	__le32 vo_minfree;
2582	__le32 alloc_frag_desc_for_data_pkt;
2583	__le32 num_ns_ext_tuples_cfg;
2584	__le32 bpf_instruction_size;
2585	__le32 max_bssid_rx_filters;
2586	__le32 use_pdev_id;
2587	__le32 max_num_dbs_scan_duty_cycle;
2588	__le32 max_num_group_keys;
2589	__le32 peer_map_unmap_version;
2590	__le32 sched_params;
2591	__le32 twt_ap_pdev_count;
2592	__le32 twt_ap_sta_count;
2593	__le32 max_nlo_ssids;
2594	__le32 num_pkt_filters;
2595	__le32 num_max_sta_vdevs;
2596	__le32 max_bssid_indicator;
2597	__le32 ul_resp_config;
2598	__le32 msdu_flow_override_config0;
2599	__le32 msdu_flow_override_config1;
2600	__le32 flags2;
2601	__le32 host_service_flags;
2602	__le32 max_rnr_neighbours;
2603	__le32 ema_max_vap_cnt;
2604	__le32 ema_max_profile_period;
2605} __packed;
2606
2607struct wmi_service_ready_event {
2608	__le32 fw_build_vers;
2609	struct ath12k_wmi_abi_version_params fw_abi_vers;
2610	__le32 phy_capability;
2611	__le32 max_frag_entry;
2612	__le32 num_rf_chains;
2613	__le32 ht_cap_info;
2614	__le32 vht_cap_info;
2615	__le32 vht_supp_mcs;
2616	__le32 hw_min_tx_power;
2617	__le32 hw_max_tx_power;
2618	__le32 sys_cap_info;
2619	__le32 min_pkt_size_enable;
2620	__le32 max_bcn_ie_size;
2621	__le32 num_mem_reqs;
2622	__le32 max_num_scan_channels;
2623	__le32 hw_bd_id;
2624	__le32 hw_bd_info[HW_BD_INFO_SIZE];
2625	__le32 max_supported_macs;
2626	__le32 wmi_fw_sub_feat_caps;
2627	__le32 num_dbs_hw_modes;
2628	/* txrx_chainmask
2629	 *    [7:0]   - 2G band tx chain mask
2630	 *    [15:8]  - 2G band rx chain mask
2631	 *    [23:16] - 5G band tx chain mask
2632	 *    [31:24] - 5G band rx chain mask
2633	 */
2634	__le32 txrx_chainmask;
2635	__le32 default_dbs_hw_mode_index;
2636	__le32 num_msdu_desc;
2637} __packed;
2638
2639#define WMI_SERVICE_BM_SIZE	((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2640
2641#define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2642#define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2643#define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2644#define WMI_SERVICE_BITS_IN_SIZE32 4
2645
2646struct wmi_service_ready_ext_event {
2647	__le32 default_conc_scan_config_bits;
2648	__le32 default_fw_config_bits;
2649	struct ath12k_wmi_ppe_threshold_params ppet;
2650	__le32 he_cap_info;
2651	__le32 mpdu_density;
2652	__le32 max_bssid_rx_filters;
2653	__le32 fw_build_vers_ext;
2654	__le32 max_nlo_ssids;
2655	__le32 max_bssid_indicator;
2656	__le32 he_cap_info_ext;
2657} __packed;
2658
2659struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params {
2660	__le32 num_hw_modes;
2661	__le32 num_chainmask_tables;
2662} __packed;
2663
2664#define WMI_HW_MODE_CAP_CFG_TYPE	GENMASK(27, 0)
2665
2666struct ath12k_wmi_hw_mode_cap_params {
2667	__le32 tlv_header;
2668	__le32 hw_mode_id;
2669	__le32 phy_id_map;
2670	__le32 hw_mode_config_type;
2671} __packed;
2672
2673#define WMI_MAX_HECAP_PHY_SIZE                 (3)
2674#define WMI_NSS_RATIO_EN_DIS_BITPOS    BIT(0)
2675#define WMI_NSS_RATIO_EN_DIS_GET(_val) \
2676	le32_get_bits(_val, WMI_NSS_RATIO_EN_DIS_BITPOS)
2677#define WMI_NSS_RATIO_INFO_BITPOS              GENMASK(4, 1)
2678#define WMI_NSS_RATIO_INFO_GET(_val) \
2679	le32_get_bits(_val, WMI_NSS_RATIO_INFO_BITPOS)
2680
2681/* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in
2682 * ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params.
2683 *
2684 * hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids.
2685 */
2686#define WMI_CAPS_PARAMS_PDEV_ID		GENMASK(15, 0)
2687#define WMI_CAPS_PARAMS_HW_LINK_ID	GENMASK(31, 16)
2688
2689struct ath12k_wmi_mac_phy_caps_params {
2690	__le32 hw_mode_id;
2691	__le32 pdev_and_hw_link_ids;
2692	__le32 phy_id;
2693	__le32 supported_flags;
2694	__le32 supported_bands;
2695	__le32 ampdu_density;
2696	__le32 max_bw_supported_2g;
2697	__le32 ht_cap_info_2g;
2698	__le32 vht_cap_info_2g;
2699	__le32 vht_supp_mcs_2g;
2700	__le32 he_cap_info_2g;
2701	__le32 he_supp_mcs_2g;
2702	__le32 tx_chain_mask_2g;
2703	__le32 rx_chain_mask_2g;
2704	__le32 max_bw_supported_5g;
2705	__le32 ht_cap_info_5g;
2706	__le32 vht_cap_info_5g;
2707	__le32 vht_supp_mcs_5g;
2708	__le32 he_cap_info_5g;
2709	__le32 he_supp_mcs_5g;
2710	__le32 tx_chain_mask_5g;
2711	__le32 rx_chain_mask_5g;
2712	__le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2713	__le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2714	struct ath12k_wmi_ppe_threshold_params he_ppet2g;
2715	struct ath12k_wmi_ppe_threshold_params he_ppet5g;
2716	__le32 chainmask_table_id;
2717	__le32 lmac_id;
2718	__le32 he_cap_info_2g_ext;
2719	__le32 he_cap_info_5g_ext;
2720	__le32 he_cap_info_internal;
2721	__le32 wireless_modes;
2722	__le32 low_2ghz_chan_freq;
2723	__le32 high_2ghz_chan_freq;
2724	__le32 low_5ghz_chan_freq;
2725	__le32 high_5ghz_chan_freq;
2726	__le32 nss_ratio;
2727} __packed;
2728
2729struct ath12k_wmi_hal_reg_caps_ext_params {
2730	__le32 tlv_header;
2731	__le32 phy_id;
2732	__le32 eeprom_reg_domain;
2733	__le32 eeprom_reg_domain_ext;
2734	__le32 regcap1;
2735	__le32 regcap2;
2736	__le32 wireless_modes;
2737	__le32 low_2ghz_chan;
2738	__le32 high_2ghz_chan;
2739	__le32 low_5ghz_chan;
2740	__le32 high_5ghz_chan;
2741} __packed;
2742
2743struct ath12k_wmi_soc_hal_reg_caps_params {
2744	__le32 num_phy;
2745} __packed;
2746
2747enum wmi_channel_width {
2748	WMI_CHAN_WIDTH_20 = 0,
2749	WMI_CHAN_WIDTH_40 = 1,
2750	WMI_CHAN_WIDTH_80 = 2,
2751	WMI_CHAN_WIDTH_160 = 3,
2752	WMI_CHAN_WIDTH_80P80 = 4,
2753	WMI_CHAN_WIDTH_5 = 5,
2754	WMI_CHAN_WIDTH_10 = 6,
2755	WMI_CHAN_WIDTH_165 = 7,
2756	WMI_CHAN_WIDTH_160P160 = 8,
2757	WMI_CHAN_WIDTH_320 = 9,
2758};
2759
2760#define WMI_MAX_EHTCAP_MAC_SIZE  2
2761#define WMI_MAX_EHTCAP_PHY_SIZE  3
2762#define WMI_MAX_EHTCAP_RATE_SET  3
2763
2764/* Used for EHT MCS-NSS array. Data at each array index follows the format given
2765 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4.
2766 *
2767 * Index interpretation:
2768 * 0 - 20 MHz only sta, all 4 bytes valid
2769 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid
2770 * 2 - index for 160 MHz, first 3 bytes valid
2771 * 3 - index for 320 MHz, first 3 bytes valid
2772 */
2773#define WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE  2
2774#define WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE  4
2775
2776#define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80    0
2777#define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160   1
2778#define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320   2
2779
2780#define WMI_EHT_MCS_NSS_0_7    GENMASK(3, 0)
2781#define WMI_EHT_MCS_NSS_8_9    GENMASK(7, 4)
2782#define WMI_EHT_MCS_NSS_10_11  GENMASK(11, 8)
2783#define WMI_EHT_MCS_NSS_12_13  GENMASK(15, 12)
2784
2785struct wmi_service_ready_ext2_event {
2786	__le32 reg_db_version;
2787	__le32 hw_min_max_tx_power_2ghz;
2788	__le32 hw_min_max_tx_power_5ghz;
2789	__le32 chwidth_num_peer_caps;
2790	__le32 preamble_puncture_bw;
2791	__le32 max_user_per_ppdu_ofdma;
2792	__le32 max_user_per_ppdu_mumimo;
2793	__le32 target_cap_flags;
2794	__le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
2795	__le32 max_num_linkview_peers;
2796	__le32 max_num_msduq_supported_per_tid;
2797	__le32 default_num_msduq_supported_per_tid;
2798} __packed;
2799
2800struct ath12k_wmi_dbs_or_sbs_cap_params {
2801	__le32 hw_mode_id;
2802	__le32 sbs_lower_band_end_freq;
2803} __packed;
2804
2805struct ath12k_wmi_caps_ext_params {
2806	__le32 hw_mode_id;
2807	__le32 pdev_and_hw_link_ids;
2808	__le32 phy_id;
2809	__le32 wireless_modes_ext;
2810	__le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE];
2811	__le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE];
2812	__le32 rsvd0[2];
2813	__le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE];
2814	__le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE];
2815	struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz;
2816	struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz;
2817	__le32 eht_cap_info_internal;
2818	__le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE];
2819	__le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE];
2820	__le32 eml_capability;
2821	__le32 mld_capability;
2822} __packed;
2823
2824/* 2 word representation of MAC addr */
2825struct ath12k_wmi_mac_addr_params {
2826	u8 addr[ETH_ALEN];
2827	u8 padding[2];
2828} __packed;
2829
2830struct ath12k_wmi_dma_ring_caps_params {
2831	__le32 tlv_header;
2832	__le32 pdev_id;
2833	__le32 module_id;
2834	__le32 min_elem;
2835	__le32 min_buf_sz;
2836	__le32 min_buf_align;
2837} __packed;
2838
2839struct ath12k_wmi_ready_event_min_params {
2840	struct ath12k_wmi_abi_version_params fw_abi_vers;
2841	struct ath12k_wmi_mac_addr_params mac_addr;
2842	__le32 status;
2843	__le32 num_dscp_table;
2844	__le32 num_extra_mac_addr;
2845	__le32 num_total_peers;
2846	__le32 num_extra_peers;
2847} __packed;
2848
2849struct wmi_ready_event {
2850	struct ath12k_wmi_ready_event_min_params ready_event_min;
2851	__le32 max_ast_index;
2852	__le32 pktlog_defs_checksum;
2853} __packed;
2854
2855struct wmi_service_available_event {
2856	__le32 wmi_service_segment_offset;
2857	__le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2858} __packed;
2859
2860struct ath12k_wmi_vdev_create_arg {
2861	u8 if_id;
2862	u32 type;
2863	u32 subtype;
2864	struct {
2865		u8 tx;
2866		u8 rx;
2867	} chains[NUM_NL80211_BANDS];
2868	u32 pdev_id;
2869	u8 if_stats_id;
2870	u32 mbssid_flags;
2871	u32 mbssid_tx_vdev_id;
2872	u8 mld_addr[ETH_ALEN];
2873};
2874
2875#define ATH12K_MAX_VDEV_STATS_ID	0x30
2876#define ATH12K_INVAL_VDEV_STATS_ID	0xFF
2877
2878struct wmi_vdev_create_cmd {
2879	__le32 tlv_header;
2880	__le32 vdev_id;
2881	__le32 vdev_type;
2882	__le32 vdev_subtype;
2883	struct ath12k_wmi_mac_addr_params vdev_macaddr;
2884	__le32 num_cfg_txrx_streams;
2885	__le32 pdev_id;
2886	__le32 mbssid_flags;
2887	__le32 mbssid_tx_vdev_id;
2888	__le32 vdev_stats_id_valid;
2889	__le32 vdev_stats_id;
2890} __packed;
2891
2892struct ath12k_wmi_vdev_txrx_streams_params {
2893	__le32 tlv_header;
2894	__le32 band;
2895	__le32 supported_tx_streams;
2896	__le32 supported_rx_streams;
2897} __packed;
2898
2899struct wmi_vdev_create_mlo_params {
2900	__le32 tlv_header;
2901	struct ath12k_wmi_mac_addr_params mld_macaddr;
2902} __packed;
2903
2904#define ATH12K_WMI_FLAG_MLO_ENABLED			BIT(0)
2905#define ATH12K_WMI_FLAG_MLO_ASSOC_LINK			BIT(1)
2906#define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC		BIT(2)
2907#define ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID	BIT(3)
2908#define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID		BIT(4)
2909#define ATH12K_WMI_FLAG_MLO_MCAST_VDEV			BIT(5)
2910#define ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT		BIT(6)
2911#define ATH12K_WMI_FLAG_MLO_FORCED_INACTIVE		BIT(7)
2912#define ATH12K_WMI_FLAG_MLO_LINK_ADD			BIT(8)
2913
2914struct wmi_vdev_start_mlo_params {
2915	__le32 tlv_header;
2916	__le32 flags;
2917} __packed;
2918
2919struct wmi_partner_link_info {
2920	__le32 tlv_header;
2921	__le32 vdev_id;
2922	__le32 hw_link_id;
2923	struct ath12k_wmi_mac_addr_params vdev_addr;
2924} __packed;
2925
2926struct wmi_vdev_delete_cmd {
2927	__le32 tlv_header;
2928	__le32 vdev_id;
2929} __packed;
2930
2931struct ath12k_wmi_vdev_up_params {
2932	u32 vdev_id;
2933	u32 aid;
2934	const u8 *bssid;
2935	const u8 *tx_bssid;
2936	u32 nontx_profile_idx;
2937	u32 nontx_profile_cnt;
2938};
2939
2940struct wmi_vdev_up_cmd {
2941	__le32 tlv_header;
2942	__le32 vdev_id;
2943	__le32 vdev_assoc_id;
2944	struct ath12k_wmi_mac_addr_params vdev_bssid;
2945	struct ath12k_wmi_mac_addr_params tx_vdev_bssid;
2946	__le32 nontx_profile_idx;
2947	__le32 nontx_profile_cnt;
2948} __packed;
2949
2950struct wmi_vdev_stop_cmd {
2951	__le32 tlv_header;
2952	__le32 vdev_id;
2953} __packed;
2954
2955struct wmi_vdev_down_cmd {
2956	__le32 tlv_header;
2957	__le32 vdev_id;
2958} __packed;
2959
2960#define WMI_VDEV_START_HIDDEN_SSID  BIT(0)
2961#define WMI_VDEV_START_PMF_ENABLED  BIT(1)
2962#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2963
2964#define ATH12K_WMI_SSID_LEN 32
2965
2966struct ath12k_wmi_ssid_params {
2967	__le32 ssid_len;
2968	u8 ssid[ATH12K_WMI_SSID_LEN];
2969} __packed;
2970
2971#define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
2972
2973enum wmi_vdev_mbssid_flags {
2974	WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP	= BIT(0),
2975	WMI_VDEV_MBSSID_FLAGS_TRANSMIT_AP	= BIT(1),
2976	WMI_VDEV_MBSSID_FLAGS_NON_TRANSMIT_AP	= BIT(2),
2977	WMI_VDEV_MBSSID_FLAGS_EMA_MODE		= BIT(3),
2978	WMI_VDEV_MBSSID_FLAGS_SCAN_MODE_VAP	= BIT(4),
2979};
2980
2981struct wmi_vdev_start_request_cmd {
2982	__le32 tlv_header;
2983	__le32 vdev_id;
2984	__le32 requestor_id;
2985	__le32 beacon_interval;
2986	__le32 dtim_period;
2987	__le32 flags;
2988	struct ath12k_wmi_ssid_params ssid;
2989	__le32 bcn_tx_rate;
2990	__le32 bcn_txpower;
2991	__le32 num_noa_descriptors;
2992	__le32 disable_hw_ack;
2993	__le32 preferred_tx_streams;
2994	__le32 preferred_rx_streams;
2995	__le32 he_ops;
2996	__le32 cac_duration_ms;
2997	__le32 regdomain;
2998	__le32 min_data_rate;
2999	__le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */
3000	__le32 mbssid_tx_vdev_id;
3001	__le32 eht_ops;
3002	__le32 punct_bitmap;
3003} __packed;
3004
3005#define MGMT_TX_DL_FRM_LEN		     64
3006
3007struct ath12k_wmi_channel_arg {
3008	u8 chan_id;
3009	u8 pwr;
3010	u32 mhz;
3011	u32 half_rate:1,
3012	    quarter_rate:1,
3013	    dfs_set:1,
3014	    dfs_set_cfreq2:1,
3015	    is_chan_passive:1,
3016	    allow_ht:1,
3017	    allow_vht:1,
3018	    allow_he:1,
3019	    set_agile:1,
3020	    psc_channel:1;
3021	u32 phy_mode;
3022	u32 cfreq1;
3023	u32 cfreq2;
3024	char   maxpower;
3025	char   minpower;
3026	char   maxregpower;
3027	u8  antennamax;
3028	u8  reg_class_id;
3029};
3030
3031enum wmi_phy_mode {
3032	MODE_11A        = 0,
3033	MODE_11G        = 1,   /* 11b/g Mode */
3034	MODE_11B        = 2,   /* 11b Mode */
3035	MODE_11GONLY    = 3,   /* 11g only Mode */
3036	MODE_11NA_HT20   = 4,
3037	MODE_11NG_HT20   = 5,
3038	MODE_11NA_HT40   = 6,
3039	MODE_11NG_HT40   = 7,
3040	MODE_11AC_VHT20 = 8,
3041	MODE_11AC_VHT40 = 9,
3042	MODE_11AC_VHT80 = 10,
3043	MODE_11AC_VHT20_2G = 11,
3044	MODE_11AC_VHT40_2G = 12,
3045	MODE_11AC_VHT80_2G = 13,
3046	MODE_11AC_VHT80_80 = 14,
3047	MODE_11AC_VHT160 = 15,
3048	MODE_11AX_HE20 = 16,
3049	MODE_11AX_HE40 = 17,
3050	MODE_11AX_HE80 = 18,
3051	MODE_11AX_HE80_80 = 19,
3052	MODE_11AX_HE160 = 20,
3053	MODE_11AX_HE20_2G = 21,
3054	MODE_11AX_HE40_2G = 22,
3055	MODE_11AX_HE80_2G = 23,
3056	MODE_11BE_EHT20 = 24,
3057	MODE_11BE_EHT40 = 25,
3058	MODE_11BE_EHT80 = 26,
3059	MODE_11BE_EHT80_80 = 27,
3060	MODE_11BE_EHT160 = 28,
3061	MODE_11BE_EHT160_160 = 29,
3062	MODE_11BE_EHT320 = 30,
3063	MODE_11BE_EHT20_2G = 31,
3064	MODE_11BE_EHT40_2G = 32,
3065	MODE_UNKNOWN = 33,
3066	MODE_MAX = 33,
3067};
3068
3069#define ATH12K_WMI_MLO_MAX_LINKS 4
3070
3071struct wmi_ml_partner_info {
3072	u32 vdev_id;
3073	u32 hw_link_id;
3074	u8 addr[ETH_ALEN];
3075	bool assoc_link;
3076	bool primary_umac;
3077	bool logical_link_idx_valid;
3078	u32 logical_link_idx;
3079};
3080
3081struct wmi_ml_arg {
3082	bool enabled;
3083	bool assoc_link;
3084	bool mcast_link;
3085	bool link_add;
3086	u8 num_partner_links;
3087	struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS];
3088};
3089
3090struct wmi_vdev_start_req_arg {
3091	u32 vdev_id;
3092	u32 freq;
3093	u32 band_center_freq1;
3094	u32 band_center_freq2;
3095	bool passive;
3096	bool allow_ibss;
3097	bool allow_ht;
3098	bool allow_vht;
3099	bool ht40plus;
3100	bool chan_radar;
3101	bool freq2_radar;
3102	bool allow_he;
3103	u32 min_power;
3104	u32 max_power;
3105	u32 max_reg_power;
3106	u32 max_antenna_gain;
3107	enum wmi_phy_mode mode;
3108	u32 bcn_intval;
3109	u32 dtim_period;
3110	u8 *ssid;
3111	u32 ssid_len;
3112	u32 bcn_tx_rate;
3113	u32 bcn_tx_power;
3114	bool disable_hw_ack;
3115	bool hidden_ssid;
3116	bool pmf_enabled;
3117	u32 he_ops;
3118	u32 cac_duration_ms;
3119	u32 regdomain;
3120	u32 pref_rx_streams;
3121	u32 pref_tx_streams;
3122	u32 num_noa_descriptors;
3123	u32 min_data_rate;
3124	u32 mbssid_flags;
3125	u32 mbssid_tx_vdev_id;
3126	u32 punct_bitmap;
3127	struct wmi_ml_arg ml;
3128};
3129
3130struct ath12k_wmi_peer_create_arg {
3131	const u8 *peer_addr;
3132	u32 peer_type;
3133	u32 vdev_id;
3134	bool ml_enabled;
3135};
3136
3137struct wmi_peer_create_mlo_params {
3138	__le32 tlv_header;
3139	__le32 flags;
3140};
3141
3142struct ath12k_wmi_pdev_set_regdomain_arg {
3143	u16 current_rd_in_use;
3144	u16 current_rd_2g;
3145	u16 current_rd_5g;
3146	u32 ctl_2g;
3147	u32 ctl_5g;
3148	u8 dfs_domain;
3149	u32 pdev_id;
3150};
3151
3152struct ath12k_wmi_rx_reorder_queue_remove_arg {
3153	u8 *peer_macaddr;
3154	u16 vdev_id;
3155	u32 peer_tid_bitmap;
3156};
3157
3158#define WMI_HOST_PDEV_ID_SOC 0xFF
3159#define WMI_HOST_PDEV_ID_0   0
3160#define WMI_HOST_PDEV_ID_1   1
3161#define WMI_HOST_PDEV_ID_2   2
3162
3163#define WMI_PDEV_ID_SOC         0
3164#define WMI_PDEV_ID_1ST         1
3165#define WMI_PDEV_ID_2ND         2
3166#define WMI_PDEV_ID_3RD         3
3167
3168/* Freq units in MHz */
3169#define REG_RULE_START_FREQ			0x0000ffff
3170#define REG_RULE_END_FREQ			0xffff0000
3171#define REG_RULE_FLAGS				0x0000ffff
3172#define REG_RULE_MAX_BW				0x0000ffff
3173#define REG_RULE_REG_PWR			0x00ff0000
3174#define REG_RULE_ANT_GAIN			0xff000000
3175#define REG_RULE_PSD_INFO			BIT(2)
3176#define REG_RULE_PSD_EIRP			0xffff0000
3177
3178#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
3179#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
3180#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
3181#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
3182
3183#define HE_MODE_SU_TX_BFEE	BIT(0)
3184#define HE_MODE_SU_TX_BFER	BIT(1)
3185#define HE_MODE_MU_TX_BFEE	BIT(2)
3186#define HE_MODE_MU_TX_BFER	BIT(3)
3187#define HE_MODE_DL_OFDMA	BIT(4)
3188#define HE_MODE_UL_OFDMA	BIT(5)
3189#define HE_MODE_UL_MUMIMO	BIT(6)
3190
3191#define HE_DL_MUOFDMA_ENABLE	1
3192#define HE_UL_MUOFDMA_ENABLE	1
3193#define HE_DL_MUMIMO_ENABLE	1
3194#define HE_UL_MUMIMO_ENABLE	1
3195#define HE_MU_BFEE_ENABLE	1
3196#define HE_SU_BFEE_ENABLE	1
3197#define HE_MU_BFER_ENABLE	1
3198#define HE_SU_BFER_ENABLE	1
3199
3200#define EHT_MODE_SU_TX_BFEE		BIT(0)
3201#define EHT_MODE_SU_TX_BFER		BIT(1)
3202#define EHT_MODE_MU_TX_BFEE		BIT(2)
3203#define EHT_MODE_MU_TX_BFER		BIT(3)
3204#define EHT_MODE_DL_OFDMA		BIT(4)
3205#define EHT_MODE_UL_OFDMA		BIT(5)
3206#define EHT_MODE_MUMIMO			BIT(6)
3207#define EHT_MODE_DL_OFDMA_TXBF		BIT(7)
3208#define EHT_MODE_DL_OFDMA_MUMIMO	BIT(8)
3209#define EHT_MODE_UL_OFDMA_MUMIMO	BIT(9)
3210
3211#define EHT_DL_MUOFDMA_ENABLE    1
3212#define EHT_UL_MUOFDMA_ENABLE    1
3213#define EHT_DL_MUMIMO_ENABLE     1
3214#define EHT_UL_MUMIMO_ENABLE     1
3215#define EHT_MU_BFEE_ENABLE       1
3216#define EHT_SU_BFEE_ENABLE       1
3217#define EHT_MU_BFER_ENABLE       1
3218#define EHT_SU_BFER_ENABLE       1
3219
3220#define HE_VHT_SOUNDING_MODE_ENABLE		1
3221#define HE_SU_MU_SOUNDING_MODE_ENABLE		1
3222#define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE	1
3223
3224/* HE or VHT Sounding */
3225#define HE_VHT_SOUNDING_MODE		BIT(0)
3226/* SU or MU Sounding */
3227#define HE_SU_MU_SOUNDING_MODE		BIT(2)
3228/* Trig or Non-Trig Sounding */
3229#define HE_TRIG_NONTRIG_SOUNDING_MODE	BIT(3)
3230
3231#define WMI_TXBF_STS_CAP_OFFSET_LSB	4
3232#define WMI_TXBF_STS_CAP_OFFSET_MASK	0x70
3233#define WMI_BF_SOUND_DIM_OFFSET_LSB	8
3234#define WMI_BF_SOUND_DIM_OFFSET_MASK	0x700
3235
3236enum wmi_peer_type {
3237	WMI_PEER_TYPE_DEFAULT = 0,
3238	WMI_PEER_TYPE_BSS = 1,
3239	WMI_PEER_TYPE_TDLS = 2,
3240};
3241
3242struct wmi_peer_create_cmd {
3243	__le32 tlv_header;
3244	__le32 vdev_id;
3245	struct ath12k_wmi_mac_addr_params peer_macaddr;
3246	__le32 peer_type;
3247} __packed;
3248
3249struct wmi_peer_delete_cmd {
3250	__le32 tlv_header;
3251	__le32 vdev_id;
3252	struct ath12k_wmi_mac_addr_params peer_macaddr;
3253} __packed;
3254
3255struct wmi_peer_reorder_queue_setup_cmd {
3256	__le32 tlv_header;
3257	__le32 vdev_id;
3258	struct ath12k_wmi_mac_addr_params peer_macaddr;
3259	__le32 tid;
3260	__le32 queue_ptr_lo;
3261	__le32 queue_ptr_hi;
3262	__le32 queue_no;
3263	__le32 ba_window_size_valid;
3264	__le32 ba_window_size;
3265} __packed;
3266
3267struct wmi_peer_reorder_queue_remove_cmd {
3268	__le32 tlv_header;
3269	__le32 vdev_id;
3270	struct ath12k_wmi_mac_addr_params peer_macaddr;
3271	__le32 tid_mask;
3272} __packed;
3273
3274enum wmi_bss_chan_info_req_type {
3275	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
3276	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
3277};
3278
3279struct wmi_pdev_set_param_cmd {
3280	__le32 tlv_header;
3281	__le32 pdev_id;
3282	__le32 param_id;
3283	__le32 param_value;
3284} __packed;
3285
3286struct wmi_pdev_set_ps_mode_cmd {
3287	__le32 tlv_header;
3288	__le32 vdev_id;
3289	__le32 sta_ps_mode;
3290} __packed;
3291
3292struct wmi_pdev_suspend_cmd {
3293	__le32 tlv_header;
3294	__le32 pdev_id;
3295	__le32 suspend_opt;
3296} __packed;
3297
3298struct wmi_pdev_resume_cmd {
3299	__le32 tlv_header;
3300	__le32 pdev_id;
3301} __packed;
3302
3303struct wmi_pdev_bss_chan_info_req_cmd {
3304	__le32 tlv_header;
3305	/* ref wmi_bss_chan_info_req_type */
3306	__le32 req_type;
3307	__le32 pdev_id;
3308} __packed;
3309
3310struct wmi_ap_ps_peer_cmd {
3311	__le32 tlv_header;
3312	__le32 vdev_id;
3313	struct ath12k_wmi_mac_addr_params peer_macaddr;
3314	__le32 param;
3315	__le32 value;
3316} __packed;
3317
3318struct wmi_sta_powersave_param_cmd {
3319	__le32 tlv_header;
3320	__le32 vdev_id;
3321	__le32 param;
3322	__le32 value;
3323} __packed;
3324
3325struct wmi_pdev_set_regdomain_cmd {
3326	__le32 tlv_header;
3327	__le32 pdev_id;
3328	__le32 reg_domain;
3329	__le32 reg_domain_2g;
3330	__le32 reg_domain_5g;
3331	__le32 conformance_test_limit_2g;
3332	__le32 conformance_test_limit_5g;
3333	__le32 dfs_domain;
3334} __packed;
3335
3336struct wmi_peer_set_param_cmd {
3337	__le32 tlv_header;
3338	__le32 vdev_id;
3339	struct ath12k_wmi_mac_addr_params peer_macaddr;
3340	__le32 param_id;
3341	__le32 param_value;
3342} __packed;
3343
3344struct wmi_peer_flush_tids_cmd {
3345	__le32 tlv_header;
3346	__le32 vdev_id;
3347	struct ath12k_wmi_mac_addr_params peer_macaddr;
3348	__le32 peer_tid_bitmap;
3349} __packed;
3350
3351struct wmi_dfs_phyerr_offload_cmd {
3352	__le32 tlv_header;
3353	__le32 pdev_id;
3354} __packed;
3355
3356struct wmi_bcn_offload_ctrl_cmd {
3357	__le32 tlv_header;
3358	__le32 vdev_id;
3359	__le32 bcn_ctrl_op;
3360} __packed;
3361
3362enum scan_dwelltime_adaptive_mode {
3363	SCAN_DWELL_MODE_DEFAULT = 0,
3364	SCAN_DWELL_MODE_CONSERVATIVE = 1,
3365	SCAN_DWELL_MODE_MODERATE = 2,
3366	SCAN_DWELL_MODE_AGGRESSIVE = 3,
3367	SCAN_DWELL_MODE_STATIC = 4
3368};
3369
3370#define WLAN_SCAN_MAX_NUM_SSID          10
3371#define WLAN_SCAN_MAX_NUM_BSSID         10
3372
3373struct ath12k_wmi_element_info_arg {
3374	u32 len;
3375	u8 *ptr;
3376};
3377
3378#define WMI_IE_BITMAP_SIZE             8
3379
3380#define WMI_SCAN_MAX_NUM_SSID                0x0A
3381/* prefix used by scan requestor ids on the host */
3382#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3383
3384/* prefix used by scan request ids generated on the host */
3385/* host cycles through the lower 12 bits to generate ids */
3386#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3387
3388#define WLAN_SCAN_PARAMS_MAX_SSID    16
3389#define WLAN_SCAN_PARAMS_MAX_BSSID   4
3390#define WLAN_SCAN_PARAMS_MAX_IE_LEN  512
3391
3392/* Values lower than this may be refused by some firmware revisions with a scan
3393 * completion with a timedout reason.
3394 */
3395#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3396
3397/* Scan priority numbers must be sequential, starting with 0 */
3398enum wmi_scan_priority {
3399	WMI_SCAN_PRIORITY_VERY_LOW = 0,
3400	WMI_SCAN_PRIORITY_LOW,
3401	WMI_SCAN_PRIORITY_MEDIUM,
3402	WMI_SCAN_PRIORITY_HIGH,
3403	WMI_SCAN_PRIORITY_VERY_HIGH,
3404	WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
3405};
3406
3407enum wmi_scan_event_type {
3408	WMI_SCAN_EVENT_STARTED              = BIT(0),
3409	WMI_SCAN_EVENT_COMPLETED            = BIT(1),
3410	WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
3411	WMI_SCAN_EVENT_FOREIGN_CHAN         = BIT(3),
3412	WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
3413	/* possibly by high-prio scan */
3414	WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
3415	WMI_SCAN_EVENT_START_FAILED         = BIT(6),
3416	WMI_SCAN_EVENT_RESTARTED            = BIT(7),
3417	WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT    = BIT(8),
3418	WMI_SCAN_EVENT_SUSPENDED            = BIT(9),
3419	WMI_SCAN_EVENT_RESUMED              = BIT(10),
3420	WMI_SCAN_EVENT_MAX                  = BIT(15),
3421};
3422
3423enum wmi_scan_completion_reason {
3424	WMI_SCAN_REASON_COMPLETED,
3425	WMI_SCAN_REASON_CANCELLED,
3426	WMI_SCAN_REASON_PREEMPTED,
3427	WMI_SCAN_REASON_TIMEDOUT,
3428	WMI_SCAN_REASON_INTERNAL_FAILURE,
3429	WMI_SCAN_REASON_MAX,
3430};
3431
3432struct  wmi_start_scan_cmd {
3433	__le32 tlv_header;
3434	__le32 scan_id;
3435	__le32 scan_req_id;
3436	__le32 vdev_id;
3437	__le32 scan_priority;
3438	__le32 notify_scan_events;
3439	__le32 dwell_time_active;
3440	__le32 dwell_time_passive;
3441	__le32 min_rest_time;
3442	__le32 max_rest_time;
3443	__le32 repeat_probe_time;
3444	__le32 probe_spacing_time;
3445	__le32 idle_time;
3446	__le32 max_scan_time;
3447	__le32 probe_delay;
3448	__le32 scan_ctrl_flags;
3449	__le32 burst_duration;
3450	__le32 num_chan;
3451	__le32 num_bssid;
3452	__le32 num_ssids;
3453	__le32 ie_len;
3454	__le32 n_probes;
3455	struct ath12k_wmi_mac_addr_params mac_addr;
3456	struct ath12k_wmi_mac_addr_params mac_mask;
3457	u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3458	__le32 num_vendor_oui;
3459	__le32 scan_ctrl_flags_ext;
3460	__le32 dwell_time_active_2g;
3461	__le32 dwell_time_active_6g;
3462	__le32 dwell_time_passive_6g;
3463	__le32 scan_start_offset;
3464} __packed;
3465
3466#define WMI_SCAN_FLAG_PASSIVE        0x1
3467#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3468#define WMI_SCAN_ADD_CCK_RATES       0x4
3469#define WMI_SCAN_ADD_OFDM_RATES      0x8
3470#define WMI_SCAN_CHAN_STAT_EVENT     0x10
3471#define WMI_SCAN_FILTER_PROBE_REQ    0x20
3472#define WMI_SCAN_BYPASS_DFS_CHN      0x40
3473#define WMI_SCAN_CONTINUE_ON_ERROR   0x80
3474#define WMI_SCAN_FILTER_PROMISCUOS   0x100
3475#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3476#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ  0x400
3477#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ   0x800
3478#define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ   0x1000
3479#define WMI_SCAN_OFFCHAN_MGMT_TX    0x2000
3480#define WMI_SCAN_OFFCHAN_DATA_TX    0x4000
3481#define WMI_SCAN_CAPTURE_PHY_ERROR  0x8000
3482#define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3483#define WMI_SCAN_FLAG_HALF_RATE_SUPPORT      0x20000
3484#define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT   0x40000
3485#define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3486#define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3487
3488#define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21)
3489
3490enum {
3491	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
3492	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3493	WMI_SCAN_DWELL_MODE_MODERATE     = 2,
3494	WMI_SCAN_DWELL_MODE_AGGRESSIVE   = 3,
3495	WMI_SCAN_DWELL_MODE_STATIC       = 4,
3496};
3497
3498struct ath12k_wmi_hint_short_ssid_arg {
3499	u32 freq_flags;
3500	u32 short_ssid;
3501};
3502
3503struct ath12k_wmi_hint_bssid_arg {
3504	u32 freq_flags;
3505	struct ath12k_wmi_mac_addr_params bssid;
3506};
3507
3508struct ath12k_wmi_scan_req_arg {
3509	u32 scan_id;
3510	u32 scan_req_id;
3511	u32 vdev_id;
3512	u32 pdev_id;
3513	enum wmi_scan_priority scan_priority;
3514	u32 scan_ev_started:1,
3515	    scan_ev_completed:1,
3516	    scan_ev_bss_chan:1,
3517	    scan_ev_foreign_chan:1,
3518	    scan_ev_dequeued:1,
3519	    scan_ev_preempted:1,
3520	    scan_ev_start_failed:1,
3521	    scan_ev_restarted:1,
3522	    scan_ev_foreign_chn_exit:1,
3523	    scan_ev_invalid:1,
3524	    scan_ev_gpio_timeout:1,
3525	    scan_ev_suspended:1,
3526	    scan_ev_resumed:1;
3527	u32 dwell_time_active;
3528	u32 dwell_time_active_2g;
3529	u32 dwell_time_passive;
3530	u32 dwell_time_active_6g;
3531	u32 dwell_time_passive_6g;
3532	u32 min_rest_time;
3533	u32 max_rest_time;
3534	u32 repeat_probe_time;
3535	u32 probe_spacing_time;
3536	u32 idle_time;
3537	u32 max_scan_time;
3538	u32 probe_delay;
3539	u32 scan_f_passive:1,
3540	    scan_f_bcast_probe:1,
3541	    scan_f_cck_rates:1,
3542	    scan_f_ofdm_rates:1,
3543	    scan_f_chan_stat_evnt:1,
3544	    scan_f_filter_prb_req:1,
3545	    scan_f_bypass_dfs_chn:1,
3546	    scan_f_continue_on_err:1,
3547	    scan_f_offchan_mgmt_tx:1,
3548	    scan_f_offchan_data_tx:1,
3549	    scan_f_promisc_mode:1,
3550	    scan_f_capture_phy_err:1,
3551	    scan_f_strict_passive_pch:1,
3552	    scan_f_half_rate:1,
3553	    scan_f_quarter_rate:1,
3554	    scan_f_force_active_dfs_chn:1,
3555	    scan_f_add_tpc_ie_in_probe:1,
3556	    scan_f_add_ds_ie_in_probe:1,
3557	    scan_f_add_spoofed_mac_in_probe:1,
3558	    scan_f_add_rand_seq_in_probe:1,
3559	    scan_f_en_ie_whitelist_in_probe:1,
3560	    scan_f_forced:1,
3561	    scan_f_2ghz:1,
3562	    scan_f_5ghz:1,
3563	    scan_f_80mhz:1;
3564	enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3565	u32 burst_duration;
3566	u32 num_chan;
3567	u32 num_bssid;
3568	u32 num_ssids;
3569	u32 n_probes;
3570	u32 *chan_list;
3571	u32 notify_scan_events;
3572	struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
3573	struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
3574	struct ath12k_wmi_element_info_arg extraie;
3575	u32 num_hint_s_ssid;
3576	u32 num_hint_bssid;
3577	struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3578	struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3579};
3580
3581struct wmi_ssid_arg {
3582	int len;
3583	const u8 *ssid;
3584};
3585
3586struct wmi_bssid_arg {
3587	const u8 *bssid;
3588};
3589
3590#define WMI_SCAN_STOP_ONE       0x00000000
3591#define WMI_SCAN_STOP_VAP_ALL   0x01000000
3592#define WMI_SCAN_STOP_ALL       0x04000000
3593
3594/* Prefix 0xA000 indicates that the scan request
3595 * is trigger by HOST
3596 */
3597#define ATH12K_SCAN_ID          0xA000
3598
3599enum scan_cancel_req_type {
3600	WLAN_SCAN_CANCEL_SINGLE = 1,
3601	WLAN_SCAN_CANCEL_VDEV_ALL,
3602	WLAN_SCAN_CANCEL_PDEV_ALL,
3603};
3604
3605struct ath12k_wmi_scan_cancel_arg {
3606	u32 requester;
3607	u32 scan_id;
3608	enum scan_cancel_req_type req_type;
3609	u32 vdev_id;
3610	u32 pdev_id;
3611};
3612
3613#define WMI_CHAN_INFO_MODE		GENMASK(5, 0)
3614#define WMI_CHAN_INFO_HT40_PLUS		BIT(6)
3615#define WMI_CHAN_INFO_PASSIVE		BIT(7)
3616#define WMI_CHAN_INFO_ADHOC_ALLOWED	BIT(8)
3617#define WMI_CHAN_INFO_AP_DISABLED	BIT(9)
3618#define WMI_CHAN_INFO_DFS		BIT(10)
3619#define WMI_CHAN_INFO_ALLOW_HT		BIT(11)
3620#define WMI_CHAN_INFO_ALLOW_VHT		BIT(12)
3621#define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA	BIT(13)
3622#define WMI_CHAN_INFO_HALF_RATE		BIT(14)
3623#define WMI_CHAN_INFO_QUARTER_RATE	BIT(15)
3624#define WMI_CHAN_INFO_DFS_FREQ2		BIT(16)
3625#define WMI_CHAN_INFO_ALLOW_HE		BIT(17)
3626#define WMI_CHAN_INFO_PSC		BIT(18)
3627
3628#define WMI_CHAN_REG_INFO1_MIN_PWR	GENMASK(7, 0)
3629#define WMI_CHAN_REG_INFO1_MAX_PWR	GENMASK(15, 8)
3630#define WMI_CHAN_REG_INFO1_MAX_REG_PWR	GENMASK(23, 16)
3631#define WMI_CHAN_REG_INFO1_REG_CLS	GENMASK(31, 24)
3632
3633#define WMI_CHAN_REG_INFO2_ANT_MAX	GENMASK(7, 0)
3634#define WMI_CHAN_REG_INFO2_MAX_TX_PWR	GENMASK(15, 8)
3635
3636struct ath12k_wmi_channel_params {
3637	__le32 tlv_header;
3638	__le32 mhz;
3639	__le32 band_center_freq1;
3640	__le32 band_center_freq2;
3641	__le32 info;
3642	__le32 reg_info_1;
3643	__le32 reg_info_2;
3644} __packed;
3645
3646enum wmi_sta_ps_mode {
3647	WMI_STA_PS_MODE_DISABLED = 0,
3648	WMI_STA_PS_MODE_ENABLED = 1,
3649};
3650
3651#define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3652#define WMI_SMPS_MASK_UPPER_3BITS 0x7
3653#define WMI_SMPS_PARAM_VALUE_SHIFT 29
3654
3655#define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1
3656#define ATH12K_WMI_FW_HANG_DELAY 0
3657
3658/* type, 0:unused 1: ASSERT 2: not respond detect command
3659 * delay_time_ms, the simulate will delay time
3660 */
3661
3662struct wmi_force_fw_hang_cmd {
3663	__le32 tlv_header;
3664	__le32 type;
3665	__le32 delay_time_ms;
3666} __packed;
3667
3668/* Param values to be sent for WMI_VDEV_PARAM_SGI param_id
3669 * which are used in 11n, 11ac systems
3670 * @WMI_GI_800_NS - Always uses 0.8us (Long GI)
3671 * @WMI_GI_400_NS - Firmware switches between 0.4us (Short GI)
3672 *			and 0.8us (Long GI) based on packet error rate.
3673 */
3674#define WMI_GI_800_NS 0
3675#define WMI_GI_400_NS 1
3676
3677struct wmi_vdev_set_param_cmd {
3678	__le32 tlv_header;
3679	__le32 vdev_id;
3680	__le32 param_id;
3681	__le32 param_value;
3682} __packed;
3683
3684struct wmi_get_pdev_temperature_cmd {
3685	__le32 tlv_header;
3686	__le32 param;
3687	__le32 pdev_id;
3688} __packed;
3689
3690#define WMI_P2P_MAX_NOA_DESCRIPTORS		4
3691
3692struct wmi_p2p_noa_event {
3693	__le32 vdev_id;
3694} __packed;
3695
3696struct ath12k_wmi_p2p_noa_descriptor {
3697	__le32 type_count; /* 255: continuous schedule, 0: reserved */
3698	__le32 duration;  /* Absent period duration in micro seconds */
3699	__le32 interval;   /* Absent period interval in micro seconds */
3700	__le32 start_time; /* 32 bit tsf time when in starts */
3701} __packed;
3702
3703#define WMI_P2P_NOA_INFO_CHANGED_FLAG		BIT(0)
3704#define WMI_P2P_NOA_INFO_INDEX			GENMASK(15, 8)
3705#define WMI_P2P_NOA_INFO_OPP_PS			BIT(16)
3706#define WMI_P2P_NOA_INFO_CTWIN_TU		GENMASK(23, 17)
3707#define WMI_P2P_NOA_INFO_DESC_NUM		GENMASK(31, 24)
3708
3709struct ath12k_wmi_p2p_noa_info {
3710	/* Bit 0 - Flag to indicate an update in NOA schedule
3711	 * Bits 7-1 - Reserved
3712	 * Bits 15-8 - Index (identifies the instance of NOA sub element)
3713	 * Bit  16 - Opp PS state of the AP
3714	 * Bits 23-17 -  Ctwindow in TUs
3715	 * Bits 31-24 -  Number of NOA descriptors
3716	 */
3717	__le32 noa_attr;
3718	struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
3719} __packed;
3720
3721#define MAX_WMI_UTF_LEN 252
3722
3723struct ath12k_wmi_ftm_seg_hdr_params {
3724	__le32 len;
3725	__le32 msgref;
3726	__le32 segmentinfo;
3727	__le32 pdev_id;
3728} __packed;
3729
3730struct ath12k_wmi_ftm_cmd {
3731	__le32 tlv_header;
3732	struct ath12k_wmi_ftm_seg_hdr_params seg_hdr;
3733	u8 data[];
3734} __packed;
3735
3736struct ath12k_wmi_ftm_event {
3737	struct ath12k_wmi_ftm_seg_hdr_params seg_hdr;
3738	u8 data[];
3739} __packed;
3740
3741#define WMI_BEACON_TX_BUFFER_SIZE	512
3742
3743#define WMI_EMA_BEACON_CNT      GENMASK(7, 0)
3744#define WMI_EMA_BEACON_IDX      GENMASK(15, 8)
3745#define WMI_EMA_BEACON_FIRST    GENMASK(23, 16)
3746#define WMI_EMA_BEACON_LAST     GENMASK(31, 24)
3747
3748#define WMI_BEACON_PROTECTION_EN_BIT	BIT(0)
3749
3750struct ath12k_wmi_bcn_tmpl_ema_arg {
3751	u8 bcn_cnt;
3752	u8 bcn_index;
3753};
3754
3755struct wmi_bcn_tmpl_cmd {
3756	__le32 tlv_header;
3757	__le32 vdev_id;
3758	__le32 tim_ie_offset;
3759	__le32 buf_len;
3760	__le32 csa_switch_count_offset;
3761	__le32 ext_csa_switch_count_offset;
3762	__le32 csa_event_bitmap;
3763	__le32 mbssid_ie_offset;
3764	__le32 esp_ie_offset;
3765	__le32 csc_switch_count_offset;
3766	__le32 csc_event_bitmap;
3767	__le32 mu_edca_ie_offset;
3768	__le32 feature_enable_bitmap;
3769	__le32 ema_params;
3770} __packed;
3771
3772struct wmi_p2p_go_set_beacon_ie_cmd {
3773	__le32 tlv_header;
3774	__le32 vdev_id;
3775	__le32 ie_buf_len;
3776} __packed;
3777
3778struct wmi_vdev_install_key_cmd {
3779	__le32 tlv_header;
3780	__le32 vdev_id;
3781	struct ath12k_wmi_mac_addr_params peer_macaddr;
3782	__le32 key_idx;
3783	__le32 key_flags;
3784	__le32 key_cipher;
3785	__le64 key_rsc_counter;
3786	__le64 key_global_rsc_counter;
3787	__le64 key_tsc_counter;
3788	u8 wpi_key_rsc_counter[16];
3789	u8 wpi_key_tsc_counter[16];
3790	__le32 key_len;
3791	__le32 key_txmic_len;
3792	__le32 key_rxmic_len;
3793	__le32 is_group_key_id_valid;
3794	__le32 group_key_id;
3795
3796	/* Followed by key_data containing key followed by
3797	 * tx mic and then rx mic
3798	 */
3799} __packed;
3800
3801struct wmi_vdev_install_key_arg {
3802	u32 vdev_id;
3803	const u8 *macaddr;
3804	u32 key_idx;
3805	u32 key_flags;
3806	u32 key_cipher;
3807	u32 ieee80211_key_cipher;
3808	u32 key_len;
3809	u32 key_txmic_len;
3810	u32 key_rxmic_len;
3811	u64 key_rsc_counter;
3812	const void *key_data;
3813};
3814
3815#define WMI_MAX_SUPPORTED_RATES			128
3816#define WMI_HOST_MAX_HECAP_PHY_SIZE		3
3817#define WMI_HOST_MAX_HE_RATE_SET		3
3818#define WMI_HECAP_TXRX_MCS_NSS_IDX_80		0
3819#define WMI_HECAP_TXRX_MCS_NSS_IDX_160		1
3820
3821#define ATH12K_WMI_MLO_MAX_PARTNER_LINKS \
3822	(ATH12K_WMI_MLO_MAX_LINKS + ATH12K_MAX_NUM_BRIDGE_LINKS - 1)
3823
3824struct peer_assoc_mlo_params {
3825	bool enabled;
3826	bool assoc_link;
3827	bool primary_umac;
3828	bool peer_id_valid;
3829	bool logical_link_idx_valid;
3830	bool bridge_peer;
3831	u8 mld_addr[ETH_ALEN];
3832	u32 logical_link_idx;
3833	u32 ml_peer_id;
3834	u32 ieee_link_id;
3835	u8 num_partner_links;
3836	struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS];
3837	u16 eml_cap;
3838};
3839
3840struct wmi_rate_set_arg {
3841	u32 num_rates;
3842	u8 rates[WMI_MAX_SUPPORTED_RATES];
3843};
3844
3845struct ath12k_wmi_peer_assoc_arg {
3846	u32 vdev_id;
3847	u32 peer_new_assoc;
3848	u32 peer_associd;
3849	u32 peer_flags;
3850	u32 peer_caps;
3851	u32 peer_listen_intval;
3852	u32 peer_ht_caps;
3853	u32 peer_max_mpdu;
3854	u32 peer_mpdu_density;
3855	u32 peer_rate_caps;
3856	u32 peer_nss;
3857	u32 peer_vht_caps;
3858	u32 peer_phymode;
3859	u32 peer_ht_info[2];
3860	struct wmi_rate_set_arg peer_legacy_rates;
3861	struct wmi_rate_set_arg peer_ht_rates;
3862	u32 rx_max_rate;
3863	u32 rx_mcs_set;
3864	u32 tx_max_rate;
3865	u32 tx_mcs_set;
3866	u8 vht_capable;
3867	u8 min_data_rate;
3868	u32 tx_max_mcs_nss;
3869	u32 peer_bw_rxnss_override;
3870	bool is_pmf_enabled;
3871	bool is_wme_set;
3872	bool qos_flag;
3873	bool apsd_flag;
3874	bool ht_flag;
3875	bool bw_40;
3876	bool bw_80;
3877	bool bw_160;
3878	bool bw_320;
3879	bool stbc_flag;
3880	bool ldpc_flag;
3881	bool static_mimops_flag;
3882	bool dynamic_mimops_flag;
3883	bool spatial_mux_flag;
3884	bool vht_flag;
3885	bool vht_ng_flag;
3886	bool need_ptk_4_way;
3887	bool need_gtk_2_way;
3888	bool auth_flag;
3889	bool safe_mode_enabled;
3890	bool amsdu_disable;
3891	/* Use common structure */
3892	u8 peer_mac[ETH_ALEN];
3893
3894	bool he_flag;
3895	u32 peer_he_cap_macinfo[2];
3896	u32 peer_he_cap_macinfo_internal;
3897	u32 peer_he_caps_6ghz;
3898	u32 peer_he_ops;
3899	u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3900	u32 peer_he_mcs_count;
3901	u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3902	u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3903	bool twt_responder;
3904	bool twt_requester;
3905	struct ath12k_wmi_ppe_threshold_arg peer_ppet;
3906	bool eht_flag;
3907	u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE];
3908	u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE];
3909	u32 peer_eht_mcs_count;
3910	u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET];
3911	u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET];
3912	struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet;
3913	u32 punct_bitmap;
3914	bool is_assoc;
3915	struct peer_assoc_mlo_params ml;
3916	bool eht_disable_mcs15;
3917};
3918
3919#define ATH12K_WMI_FLAG_MLO_ENABLED			BIT(0)
3920#define ATH12K_WMI_FLAG_MLO_ASSOC_LINK			BIT(1)
3921#define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC		BIT(2)
3922#define ATH12K_WMI_FLAG_MLO_LINK_ID_VALID		BIT(3)
3923#define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID		BIT(4)
3924
3925struct wmi_peer_assoc_mlo_partner_info_params {
3926	__le32 tlv_header;
3927	__le32 vdev_id;
3928	__le32 hw_link_id;
3929	__le32 flags;
3930	__le32 logical_link_idx;
3931} __packed;
3932
3933struct wmi_peer_assoc_mlo_params {
3934	__le32 tlv_header;
3935	__le32 flags;
3936	struct ath12k_wmi_mac_addr_params mld_addr;
3937	__le32 logical_link_idx;
3938	__le32 ml_peer_id;
3939	__le32 ieee_link_id;
3940	__le32 emlsr_trans_timeout_us;
3941	__le32 emlsr_trans_delay_us;
3942	__le32 emlsr_padding_delay_us;
3943} __packed;
3944
3945struct wmi_peer_assoc_complete_cmd {
3946	__le32 tlv_header;
3947	struct ath12k_wmi_mac_addr_params peer_macaddr;
3948	__le32 vdev_id;
3949	__le32 peer_new_assoc;
3950	__le32 peer_associd;
3951	__le32 peer_flags;
3952	__le32 peer_caps;
3953	__le32 peer_listen_intval;
3954	__le32 peer_ht_caps;
3955	__le32 peer_max_mpdu;
3956	__le32 peer_mpdu_density;
3957	__le32 peer_rate_caps;
3958	__le32 peer_nss;
3959	__le32 peer_vht_caps;
3960	__le32 peer_phymode;
3961	__le32 peer_ht_info[2];
3962	__le32 num_peer_legacy_rates;
3963	__le32 num_peer_ht_rates;
3964	__le32 peer_bw_rxnss_override;
3965	struct ath12k_wmi_ppe_threshold_params peer_ppet;
3966	__le32 peer_he_cap_info;
3967	__le32 peer_he_ops;
3968	__le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3969	__le32 peer_he_mcs;
3970	__le32 peer_he_cap_info_ext;
3971	__le32 peer_he_cap_info_internal;
3972	__le32 min_data_rate;
3973	__le32 peer_he_caps_6ghz;
3974	__le32 sta_type;
3975	__le32 bss_max_idle_option;
3976	__le32 auth_mode;
3977	__le32 peer_flags_ext;
3978	__le32 punct_bitmap;
3979	__le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE];
3980	__le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE];
3981	__le32 peer_eht_ops;
3982	struct ath12k_wmi_ppe_threshold_params peer_eht_ppet;
3983} __packed;
3984
3985struct wmi_stop_scan_cmd {
3986	__le32 tlv_header;
3987	__le32 requestor;
3988	__le32 scan_id;
3989	__le32 req_type;
3990	__le32 vdev_id;
3991	__le32 pdev_id;
3992} __packed;
3993
3994struct ath12k_wmi_scan_chan_list_arg {
3995	struct list_head list;
3996	u32 pdev_id;
3997	u16 nallchans;
3998	struct ath12k_wmi_channel_arg channel[];
3999};
4000
4001struct wmi_scan_chan_list_cmd {
4002	__le32 tlv_header;
4003	__le32 num_scan_chans;
4004	__le32 flags;
4005	__le32 pdev_id;
4006} __packed;
4007
4008#define WMI_MGMT_SEND_DOWNLD_LEN	64
4009#define WMI_MGMT_LINK_AGNOSTIC_ID	0xFFFFFFFF
4010
4011#define WMI_TX_PARAMS_DWORD0_POWER		GENMASK(7, 0)
4012#define WMI_TX_PARAMS_DWORD0_MCS_MASK		GENMASK(19, 8)
4013#define WMI_TX_PARAMS_DWORD0_NSS_MASK		GENMASK(27, 20)
4014#define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT	GENMASK(31, 28)
4015
4016#define WMI_TX_PARAMS_DWORD1_CHAIN_MASK		GENMASK(7, 0)
4017#define WMI_TX_PARAMS_DWORD1_BW_MASK		GENMASK(14, 8)
4018#define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE	GENMASK(19, 15)
4019#define WMI_TX_PARAMS_DWORD1_FRAME_TYPE		BIT(20)
4020#define WMI_TX_PARAMS_DWORD1_RSVD		GENMASK(31, 21)
4021
4022struct wmi_mgmt_send_cmd {
4023	__le32 tlv_header;
4024	__le32 vdev_id;
4025	__le32 desc_id;
4026	__le32 chanfreq;
4027	__le32 paddr_lo;
4028	__le32 paddr_hi;
4029	__le32 frame_len;
4030	__le32 buf_len;
4031	__le32 tx_params_valid;
4032
4033	/* This TLV is followed by struct wmi_mgmt_frame */
4034
4035	/* Followed by struct ath12k_wmi_mlo_mgmt_send_params */
4036} __packed;
4037
4038struct ath12k_wmi_mlo_mgmt_send_params {
4039	__le32 tlv_header;
4040	__le32 hw_link_id;
4041} __packed;
4042
4043struct ath12k_wmi_mgmt_send_tx_params {
4044	__le32 tlv_header;
4045	__le32 tx_param_dword0;
4046	__le32 tx_param_dword1;
4047} __packed;
4048
4049struct wmi_sta_powersave_mode_cmd {
4050	__le32 tlv_header;
4051	__le32 vdev_id;
4052	__le32 sta_ps_mode;
4053} __packed;
4054
4055struct wmi_sta_smps_force_mode_cmd {
4056	__le32 tlv_header;
4057	__le32 vdev_id;
4058	__le32 forced_mode;
4059} __packed;
4060
4061struct wmi_sta_smps_param_cmd {
4062	__le32 tlv_header;
4063	__le32 vdev_id;
4064	__le32 param;
4065	__le32 value;
4066} __packed;
4067
4068struct ath12k_wmi_bcn_prb_info_params {
4069	__le32 tlv_header;
4070	__le32 caps;
4071	__le32 erp;
4072} __packed;
4073
4074enum {
4075	WMI_PDEV_SUSPEND,
4076	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4077};
4078
4079struct wmi_pdev_green_ap_ps_enable_cmd_param {
4080	__le32 tlv_header;
4081	__le32 pdev_id;
4082	__le32 enable;
4083} __packed;
4084
4085struct ath12k_wmi_ap_ps_arg {
4086	u32 vdev_id;
4087	u32 param;
4088	u32 value;
4089};
4090
4091enum set_init_cc_type {
4092	WMI_COUNTRY_INFO_TYPE_ALPHA,
4093	WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
4094	WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
4095};
4096
4097enum set_init_cc_flags {
4098	INVALID_CC,
4099	CC_IS_SET,
4100	REGDMN_IS_SET,
4101	ALPHA_IS_SET,
4102};
4103
4104struct ath12k_wmi_init_country_arg {
4105	union {
4106		u16 country_code;
4107		u16 regdom_id;
4108		u8 alpha2[3];
4109	} cc_info;
4110	enum set_init_cc_flags flags;
4111};
4112
4113struct wmi_init_country_cmd {
4114	__le32 tlv_header;
4115	__le32 pdev_id;
4116	__le32 init_cc_type;
4117	union {
4118		__le32 country_code;
4119		__le32 regdom_id;
4120		__le32 alpha2;
4121	} cc_info;
4122} __packed;
4123
4124struct wmi_11d_scan_start_arg {
4125	u32 vdev_id;
4126	u32 scan_period_msec;
4127	u32 start_interval_msec;
4128};
4129
4130struct wmi_11d_scan_start_cmd {
4131	__le32 tlv_header;
4132	__le32 vdev_id;
4133	__le32 scan_period_msec;
4134	__le32 start_interval_msec;
4135} __packed;
4136
4137struct wmi_11d_scan_stop_cmd {
4138	__le32 tlv_header;
4139	__le32 vdev_id;
4140} __packed;
4141
4142struct wmi_11d_new_cc_event {
4143	__le32 new_alpha2;
4144} __packed;
4145
4146struct wmi_delba_send_cmd {
4147	__le32 tlv_header;
4148	__le32 vdev_id;
4149	struct ath12k_wmi_mac_addr_params peer_macaddr;
4150	__le32 tid;
4151	__le32 initiator;
4152	__le32 reasoncode;
4153} __packed;
4154
4155struct wmi_addba_setresponse_cmd {
4156	__le32 tlv_header;
4157	__le32 vdev_id;
4158	struct ath12k_wmi_mac_addr_params peer_macaddr;
4159	__le32 tid;
4160	__le32 statuscode;
4161} __packed;
4162
4163struct wmi_addba_send_cmd {
4164	__le32 tlv_header;
4165	__le32 vdev_id;
4166	struct ath12k_wmi_mac_addr_params peer_macaddr;
4167	__le32 tid;
4168	__le32 buffersize;
4169} __packed;
4170
4171struct wmi_addba_clear_resp_cmd {
4172	__le32 tlv_header;
4173	__le32 vdev_id;
4174	struct ath12k_wmi_mac_addr_params peer_macaddr;
4175} __packed;
4176
4177#define DFS_PHYERR_UNIT_TEST_CMD 0
4178#define DFS_UNIT_TEST_MODULE	0x2b
4179#define DFS_UNIT_TEST_TOKEN	0xAA
4180
4181enum dfs_test_args_idx {
4182	DFS_TEST_CMDID = 0,
4183	DFS_TEST_PDEV_ID,
4184	DFS_TEST_RADAR_PARAM,
4185	DFS_MAX_TEST_ARGS,
4186};
4187
4188struct wmi_dfs_unit_test_arg {
4189	u32 cmd_id;
4190	u32 pdev_id;
4191	u32 radar_param;
4192};
4193
4194struct wmi_unit_test_cmd {
4195	__le32 tlv_header;
4196	__le32 vdev_id;
4197	__le32 module_id;
4198	__le32 num_args;
4199	__le32 diag_token;
4200	/* Followed by test args*/
4201} __packed;
4202
4203#define MAX_SUPPORTED_RATES 128
4204
4205struct ath12k_wmi_vht_rate_set_params {
4206	__le32 tlv_header;
4207	__le32 rx_max_rate;
4208	/* MCS at which the peer can transmit */
4209	__le32 rx_mcs_set;
4210	__le32 tx_max_rate;
4211	/* MCS at which the peer can receive */
4212	__le32 tx_mcs_set;
4213	__le32 tx_max_mcs_nss;
4214} __packed;
4215
4216struct ath12k_wmi_he_rate_set_params {
4217	__le32 tlv_header;
4218	__le32 rx_mcs_set;
4219	__le32 tx_mcs_set;
4220} __packed;
4221
4222struct ath12k_wmi_eht_rate_set_params {
4223	__le32 tlv_header;
4224	__le32 rx_mcs_set;
4225	__le32 tx_mcs_set;
4226} __packed;
4227
4228#define MAX_REG_RULES 10
4229#define REG_ALPHA2_LEN 2
4230#define MAX_6GHZ_REG_RULES 5
4231
4232struct wmi_set_current_country_arg {
4233	u8 alpha2[REG_ALPHA2_LEN];
4234};
4235
4236struct wmi_set_current_country_cmd {
4237	__le32 tlv_header;
4238	__le32 pdev_id;
4239	__le32 new_alpha2;
4240} __packed;
4241
4242enum wmi_start_event_param {
4243	WMI_VDEV_START_RESP_EVENT = 0,
4244	WMI_VDEV_RESTART_RESP_EVENT,
4245};
4246
4247struct wmi_vdev_start_resp_event {
4248	__le32 vdev_id;
4249	__le32 requestor_id;
4250	/* enum wmi_start_event_param */
4251	__le32 resp_type;
4252	__le32 status;
4253	__le32 chain_mask;
4254	__le32 smps_mode;
4255	union {
4256		__le32 mac_id;
4257		__le32 pdev_id;
4258	};
4259	__le32 cfgd_tx_streams;
4260	__le32 cfgd_rx_streams;
4261	__le32 max_allowed_tx_power;
4262} __packed;
4263
4264/* VDEV start response status codes */
4265enum wmi_vdev_start_resp_status_code {
4266	WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
4267	WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
4268	WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
4269	WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
4270	WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
4271};
4272
4273enum wmi_reg_6g_ap_type {
4274	WMI_REG_INDOOR_AP = 0,
4275	WMI_REG_STD_POWER_AP = 1,
4276	WMI_REG_VLP_AP = 2,
4277	WMI_REG_CURRENT_MAX_AP_TYPE,
4278	WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP,
4279	WMI_REG_MAX_AP_TYPE = 7,
4280};
4281
4282enum wmi_reg_6g_client_type {
4283	WMI_REG_DEFAULT_CLIENT = 0,
4284	WMI_REG_SUBORDINATE_CLIENT = 1,
4285	WMI_REG_MAX_CLIENT_TYPE = 2,
4286};
4287
4288/* Regulatory Rule Flags Passed by FW */
4289#define REGULATORY_CHAN_DISABLED     BIT(0)
4290#define REGULATORY_CHAN_NO_IR        BIT(1)
4291#define REGULATORY_CHAN_RADAR        BIT(3)
4292#define REGULATORY_CHAN_NO_OFDM      BIT(6)
4293#define REGULATORY_CHAN_INDOOR_ONLY  BIT(9)
4294
4295#define REGULATORY_CHAN_NO_HT40      BIT(4)
4296#define REGULATORY_CHAN_NO_80MHZ     BIT(7)
4297#define REGULATORY_CHAN_NO_160MHZ    BIT(8)
4298#define REGULATORY_CHAN_NO_20MHZ     BIT(11)
4299#define REGULATORY_CHAN_NO_10MHZ     BIT(12)
4300
4301enum {
4302	WMI_REG_SET_CC_STATUS_PASS = 0,
4303	WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4304	WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
4305	WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4306	WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
4307	WMI_REG_SET_CC_STATUS_FAIL = 5,
4308};
4309
4310#define WMI_REG_CLIENT_MAX 4
4311
4312struct wmi_reg_chan_list_cc_ext_event {
4313	__le32 status_code;
4314	__le32 phy_id;
4315	__le32 alpha2;
4316	__le32 num_phy;
4317	__le32 country_id;
4318	__le32 domain_code;
4319	__le32 dfs_region;
4320	__le32 phybitmap;
4321	__le32 min_bw_2g;
4322	__le32 max_bw_2g;
4323	__le32 min_bw_5g;
4324	__le32 max_bw_5g;
4325	__le32 num_2g_reg_rules;
4326	__le32 num_5g_reg_rules;
4327	__le32 client_type;
4328	__le32 rnr_tpe_usable;
4329	__le32 unspecified_ap_usable;
4330	__le32 domain_code_6g_ap_lpi;
4331	__le32 domain_code_6g_ap_sp;
4332	__le32 domain_code_6g_ap_vlp;
4333	__le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX];
4334	__le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX];
4335	__le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX];
4336	__le32 domain_code_6g_super_id;
4337	__le32 min_bw_6g_ap_sp;
4338	__le32 max_bw_6g_ap_sp;
4339	__le32 min_bw_6g_ap_lpi;
4340	__le32 max_bw_6g_ap_lpi;
4341	__le32 min_bw_6g_ap_vlp;
4342	__le32 max_bw_6g_ap_vlp;
4343	__le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX];
4344	__le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX];
4345	__le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX];
4346	__le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX];
4347	__le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX];
4348	__le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX];
4349	__le32 num_6g_reg_rules_ap_sp;
4350	__le32 num_6g_reg_rules_ap_lpi;
4351	__le32 num_6g_reg_rules_ap_vlp;
4352	__le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX];
4353	__le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX];
4354	__le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX];
4355} __packed;
4356
4357struct ath12k_wmi_reg_rule_ext_params {
4358	__le32 tlv_header;
4359	__le32 freq_info;
4360	__le32 bw_pwr_info;
4361	__le32 flag_info;
4362	__le32 psd_power_info;
4363} __packed;
4364
4365struct wmi_vdev_delete_resp_event {
4366	__le32 vdev_id;
4367} __packed;
4368
4369struct wmi_peer_delete_resp_event {
4370	__le32 vdev_id;
4371	struct ath12k_wmi_mac_addr_params peer_macaddr;
4372} __packed;
4373
4374struct wmi_bcn_tx_status_event {
4375	__le32 vdev_id;
4376	__le32 tx_status;
4377} __packed;
4378
4379struct wmi_vdev_stopped_event {
4380	__le32 vdev_id;
4381} __packed;
4382
4383struct wmi_pdev_bss_chan_info_event {
4384	__le32 freq;	/* Units in MHz */
4385	__le32 noise_floor;	/* units are dBm */
4386	/* rx clear - how often the channel was unused */
4387	__le32 rx_clear_count_low;
4388	__le32 rx_clear_count_high;
4389	/* cycle count - elapsed time during measured period, in clock ticks */
4390	__le32 cycle_count_low;
4391	__le32 cycle_count_high;
4392	/* tx cycle count - elapsed time spent in tx, in clock ticks */
4393	__le32 tx_cycle_count_low;
4394	__le32 tx_cycle_count_high;
4395	/* rx cycle count - elapsed time spent in rx, in clock ticks */
4396	__le32 rx_cycle_count_low;
4397	__le32 rx_cycle_count_high;
4398	/*rx_cycle cnt for my bss in 64bits format */
4399	__le32 rx_bss_cycle_count_low;
4400	__le32 rx_bss_cycle_count_high;
4401	__le32 pdev_id;
4402} __packed;
4403
4404#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4405
4406struct wmi_vdev_install_key_compl_event {
4407	__le32 vdev_id;
4408	struct ath12k_wmi_mac_addr_params peer_macaddr;
4409	__le32 key_idx;
4410	__le32 key_flags;
4411	__le32 status;
4412} __packed;
4413
4414struct wmi_vdev_install_key_complete_arg {
4415	u32 vdev_id;
4416	const u8 *macaddr;
4417	u32 key_idx;
4418	u32 key_flags;
4419	u32 status;
4420};
4421
4422struct wmi_peer_assoc_conf_event {
4423	__le32 vdev_id;
4424	struct ath12k_wmi_mac_addr_params peer_macaddr;
4425} __packed;
4426
4427struct wmi_peer_assoc_conf_arg {
4428	u32 vdev_id;
4429	const u8 *macaddr;
4430};
4431
4432struct wmi_fils_discovery_event {
4433	__le32 vdev_id;
4434	__le32 fils_tt;
4435	__le32 tbtt;
4436} __packed;
4437
4438struct wmi_probe_resp_tx_status_event {
4439	__le32 vdev_id;
4440	__le32 tx_status;
4441} __packed;
4442
4443struct wmi_pdev_ctl_failsafe_chk_event {
4444	__le32 pdev_id;
4445	__le32 ctl_failsafe_status;
4446} __packed;
4447
4448struct ath12k_wmi_pdev_csa_event {
4449	__le32 pdev_id;
4450	__le32 current_switch_count;
4451	__le32 num_vdevs;
4452} __packed;
4453
4454struct ath12k_wmi_pdev_radar_event {
4455	__le32 pdev_id;
4456	__le32 detection_mode;
4457	__le32 chan_freq;
4458	__le32 chan_width;
4459	__le32 detector_id;
4460	__le32 segment_id;
4461	__le32 timestamp;
4462	__le32 is_chirp;
4463	a_sle32 freq_offset;
4464	a_sle32 sidx;
4465} __packed;
4466
4467struct wmi_pdev_temperature_event {
4468	/* temperature value in Celsius degree */
4469	a_sle32 temp;
4470	__le32 pdev_id;
4471} __packed;
4472
4473#define WMI_RX_STATUS_OK			0x00
4474#define WMI_RX_STATUS_ERR_CRC			0x01
4475#define WMI_RX_STATUS_ERR_DECRYPT		0x08
4476#define WMI_RX_STATUS_ERR_MIC			0x10
4477#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS	0x20
4478
4479#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4480
4481struct ath12k_wmi_mgmt_rx_arg {
4482	u32 chan_freq;
4483	u32 channel;
4484	u32 snr;
4485	u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4486	u32 rate;
4487	enum wmi_phy_mode phy_mode;
4488	u32 buf_len;
4489	int status;
4490	u32 flags;
4491	int rssi;
4492	u32 tsf_delta;
4493	u8 pdev_id;
4494};
4495
4496#define ATH_MAX_ANTENNA 4
4497
4498struct ath12k_wmi_mgmt_rx_params {
4499	__le32 channel;
4500	__le32 snr;
4501	__le32 rate;
4502	__le32 phy_mode;
4503	__le32 buf_len;
4504	__le32 status;
4505	__le32 rssi_ctl[ATH_MAX_ANTENNA];
4506	__le32 flags;
4507	a_sle32 rssi;
4508	__le32 tsf_delta;
4509	__le32 rx_tsf_l32;
4510	__le32 rx_tsf_u32;
4511	__le32 pdev_id;
4512	__le32 chan_freq;
4513} __packed;
4514
4515#define MAX_ANTENNA_EIGHT 8
4516
4517struct wmi_mgmt_tx_compl_event {
4518	__le32 desc_id;
4519	__le32 status;
4520	__le32 pdev_id;
4521	__le32 ppdu_id;
4522	__le32 ack_rssi;
4523} __packed;
4524
4525struct wmi_scan_event {
4526	__le32 event_type; /* %WMI_SCAN_EVENT_ */
4527	__le32 reason; /* %WMI_SCAN_REASON_ */
4528	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4529	__le32 scan_req_id;
4530	__le32 scan_id;
4531	__le32 vdev_id;
4532	/* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4533	 * In case of AP it is TSF of the AP vdev
4534	 * In case of STA connected state, this is the TSF of the AP
4535	 * In case of STA not connected, it will be the free running HW timer
4536	 */
4537	__le32 tsf_timestamp;
4538} __packed;
4539
4540enum wmi_peer_sta_kickout_reason {
4541	WMI_PEER_STA_KICKOUT_REASON_UNSPECIFIED = 0,
4542	WMI_PEER_STA_KICKOUT_REASON_XRETRY = 1,
4543	WMI_PEER_STA_KICKOUT_REASON_INACTIVITY = 2,
4544	WMI_PEER_STA_KICKOUT_REASON_IBSS_DISCONNECT = 3,
4545	WMI_PEER_STA_KICKOUT_REASON_TDLS_DISCONNECT = 4,
4546	WMI_PEER_STA_KICKOUT_REASON_SA_QUERY_TIMEOUT = 5,
4547	WMI_PEER_STA_KICKOUT_REASON_ROAMING_EVENT = 6,
4548	WMI_PEER_STA_KICKOUT_REASON_PMF_ERROR = 7,
4549};
4550
4551struct wmi_peer_sta_kickout_arg {
4552	const u8 *mac_addr;
4553	enum wmi_peer_sta_kickout_reason reason;
4554	u32 rssi;
4555};
4556
4557struct wmi_peer_sta_kickout_event {
4558	struct ath12k_wmi_mac_addr_params peer_macaddr;
4559	__le32 reason;
4560	__le32 rssi;
4561} __packed;
4562
4563#define WMI_ROAM_REASON_MASK		GENMASK(3, 0)
4564#define WMI_ROAM_SUBNET_STATUS_MASK	GENMASK(5, 4)
4565
4566enum wmi_roam_reason {
4567	WMI_ROAM_REASON_BETTER_AP = 1,
4568	WMI_ROAM_REASON_BEACON_MISS = 2,
4569	WMI_ROAM_REASON_LOW_RSSI = 3,
4570	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4571	WMI_ROAM_REASON_HO_FAILED = 5,
4572
4573	/* keep last */
4574	WMI_ROAM_REASON_MAX,
4575};
4576
4577struct wmi_roam_event {
4578	__le32 vdev_id;
4579	__le32 reason;
4580	__le32 rssi;
4581} __packed;
4582
4583#define WMI_CHAN_INFO_START_RESP 0
4584#define WMI_CHAN_INFO_END_RESP 1
4585
4586struct wmi_chan_info_event {
4587	__le32 err_code;
4588	__le32 freq;
4589	__le32 cmd_flags;
4590	__le32 noise_floor;
4591	__le32 rx_clear_count;
4592	__le32 cycle_count;
4593	__le32 chan_tx_pwr_range;
4594	__le32 chan_tx_pwr_tp;
4595	__le32 rx_frame_count;
4596	__le32 my_bss_rx_cycle_count;
4597	__le32 rx_11b_mode_data_duration;
4598	__le32 tx_frame_cnt;
4599	__le32 mac_clk_mhz;
4600	__le32 vdev_id;
4601} __packed;
4602
4603struct ath12k_wmi_target_cap_arg {
4604	u32 phy_capability;
4605	u32 max_frag_entry;
4606	u32 num_rf_chains;
4607	u32 ht_cap_info;
4608	u32 vht_cap_info;
4609	u32 vht_supp_mcs;
4610	u32 hw_min_tx_power;
4611	u32 hw_max_tx_power;
4612	u32 sys_cap_info;
4613	u32 min_pkt_size_enable;
4614	u32 max_bcn_ie_size;
4615	u32 max_num_scan_channels;
4616	u32 max_supported_macs;
4617	u32 wmi_fw_sub_feat_caps;
4618	u32 txrx_chainmask;
4619	u32 default_dbs_hw_mode_index;
4620	u32 num_msdu_desc;
4621};
4622
4623enum wmi_vdev_type {
4624	WMI_VDEV_TYPE_UNSPEC  = 0,
4625	WMI_VDEV_TYPE_AP      = 1,
4626	WMI_VDEV_TYPE_STA     = 2,
4627	WMI_VDEV_TYPE_IBSS    = 3,
4628	WMI_VDEV_TYPE_MONITOR = 4,
4629};
4630
4631enum wmi_vdev_subtype {
4632	WMI_VDEV_SUBTYPE_NONE,
4633	WMI_VDEV_SUBTYPE_P2P_DEVICE,
4634	WMI_VDEV_SUBTYPE_P2P_CLIENT,
4635	WMI_VDEV_SUBTYPE_P2P_GO,
4636	WMI_VDEV_SUBTYPE_PROXY_STA,
4637	WMI_VDEV_SUBTYPE_MESH_NON_11S,
4638	WMI_VDEV_SUBTYPE_MESH_11S,
4639};
4640
4641enum wmi_sta_powersave_param {
4642	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4643	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4644	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4645	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4646	WMI_STA_PS_PARAM_UAPSD = 4,
4647};
4648
4649enum wmi_sta_ps_param_uapsd {
4650	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4651	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
4652	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4653	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
4654	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4655	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
4656	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4657	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
4658};
4659
4660enum wmi_sta_ps_param_tx_wake_threshold {
4661	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4662	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4663
4664	/* Values greater than one indicate that many TX attempts per beacon
4665	 * interval before the STA will wake up
4666	 */
4667};
4668
4669/* The maximum number of PS-Poll frames the FW will send in response to
4670 * traffic advertised in TIM before waking up (by sending a null frame with PS
4671 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
4672 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
4673 * parameter is used when the RX wake policy is
4674 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
4675 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
4676 */
4677enum wmi_sta_ps_param_pspoll_count {
4678	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4679	/* Values greater than 0 indicate the maximum number of PS-Poll frames
4680	 * FW will send before waking up.
4681	 */
4682};
4683
4684/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
4685enum wmi_ap_ps_param_uapsd {
4686	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4687	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
4688	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4689	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
4690	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4691	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
4692	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4693	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
4694};
4695
4696/* U-APSD maximum service period of peer station */
4697enum wmi_ap_ps_peer_param_max_sp {
4698	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4699	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4700	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4701	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4702	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4703};
4704
4705enum wmi_ap_ps_peer_param {
4706	/** Set uapsd configuration for a given peer.
4707	 *
4708	 * This include the delivery and trigger enabled state for each AC.
4709	 * The host MLME needs to set this based on AP capability and stations
4710	 * request Set in the association request  received from the station.
4711	 *
4712	 * Lower 8 bits of the value specify the UAPSD configuration.
4713	 *
4714	 * (see enum wmi_ap_ps_param_uapsd)
4715	 * The default value is 0.
4716	 */
4717	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4718
4719	/**
4720	 * Set the service period for a UAPSD capable station
4721	 *
4722	 * The service period from wme ie in the (re)assoc request frame.
4723	 *
4724	 * (see enum wmi_ap_ps_peer_param_max_sp)
4725	 */
4726	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4727
4728	/** Time in seconds for aging out buffered frames
4729	 * for STA in power save
4730	 */
4731	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4732
4733	/** Specify frame types that are considered SIFS
4734	 * RESP trigger frame
4735	 */
4736	WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
4737
4738	/** Specifies the trigger state of TID.
4739	 * Valid only for UAPSD frame type
4740	 */
4741	WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
4742
4743	/* Specifies the WNM sleep state of a STA */
4744	WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
4745};
4746
4747#define DISABLE_SIFS_RESPONSE_TRIGGER 0
4748
4749#define WMI_MAX_KEY_INDEX   7
4750#define WMI_MAX_KEY_LEN     32
4751
4752enum wmi_key_type {
4753	WMI_KEY_PAIRWISE = 0,
4754	WMI_KEY_GROUP = 1,
4755};
4756
4757enum wmi_cipher_type {
4758	WMI_CIPHER_NONE = 0, /* clear key */
4759	WMI_CIPHER_WEP = 1,
4760	WMI_CIPHER_TKIP = 2,
4761	WMI_CIPHER_AES_OCB = 3,
4762	WMI_CIPHER_AES_CCM = 4,
4763	WMI_CIPHER_WAPI = 5,
4764	WMI_CIPHER_CKIP = 6,
4765	WMI_CIPHER_AES_CMAC = 7,
4766	WMI_CIPHER_ANY = 8,
4767	WMI_CIPHER_AES_GCM = 9,
4768	WMI_CIPHER_AES_GMAC = 10,
4769};
4770
4771/* Value to disable fixed rate setting */
4772#define WMI_FIXED_RATE_NONE	(0xffff)
4773
4774#define ATH12K_RC_VERSION_OFFSET	28
4775#define ATH12K_RC_PREAMBLE_OFFSET	8
4776#define ATH12K_RC_NSS_OFFSET		5
4777
4778#define ATH12K_HW_RATE_CODE(rate, nss, preamble)	\
4779	((1 << ATH12K_RC_VERSION_OFFSET) |		\
4780	 ((nss) << ATH12K_RC_NSS_OFFSET) |		\
4781	 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) |	\
4782	 (rate))
4783
4784/* Preamble types to be used with VDEV fixed rate configuration */
4785enum wmi_rate_preamble {
4786	WMI_RATE_PREAMBLE_OFDM,
4787	WMI_RATE_PREAMBLE_CCK,
4788	WMI_RATE_PREAMBLE_HT,
4789	WMI_RATE_PREAMBLE_VHT,
4790	WMI_RATE_PREAMBLE_HE,
4791	WMI_RATE_PREAMBLE_EHT,
4792};
4793
4794/**
4795 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
4796 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled.
4797 * @WMI_USE_RTS_CTS: RTS/CTS Enabled.
4798 * @WMI_USE_CTS2SELF: CTS to self protection Enabled.
4799 */
4800enum wmi_rtscts_prot_mode {
4801	WMI_RTS_CTS_DISABLED = 0,
4802	WMI_USE_RTS_CTS = 1,
4803	WMI_USE_CTS2SELF = 2,
4804};
4805
4806/**
4807 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
4808 *                           protection mode.
4809 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS
4810 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS
4811 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS,
4812 *                                but if there's a sw retry, both the rate
4813 *                                series will use RTS-CTS.
4814 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU.
4815 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series.
4816 */
4817enum wmi_rtscts_profile {
4818	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
4819	WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
4820	WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
4821	WMI_RTSCTS_ERP = 3,
4822	WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
4823};
4824
4825#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4826
4827enum wmi_sta_ps_param_rx_wake_policy {
4828	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4829	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4830};
4831
4832/* Do not change existing values! Used by ath12k_frame_mode parameter
4833 * module parameter.
4834 */
4835enum ath12k_hw_txrx_mode {
4836	ATH12K_HW_TXRX_RAW = 0,
4837	ATH12K_HW_TXRX_NATIVE_WIFI = 1,
4838	ATH12K_HW_TXRX_ETHERNET = 2,
4839};
4840
4841struct wmi_wmm_params {
4842	__le32 tlv_header;
4843	__le32 cwmin;
4844	__le32 cwmax;
4845	__le32 aifs;
4846	__le32 txoplimit;
4847	__le32 acm;
4848	__le32 no_ack;
4849} __packed;
4850
4851struct wmi_wmm_params_arg {
4852	u8 acm;
4853	u8 aifs;
4854	u16 cwmin;
4855	u16 cwmax;
4856	u16 txop;
4857	u8 no_ack;
4858};
4859
4860struct wmi_vdev_set_wmm_params_cmd {
4861	__le32 tlv_header;
4862	__le32 vdev_id;
4863	struct wmi_wmm_params wmm_params[4];
4864	__le32 wmm_param_type;
4865} __packed;
4866
4867struct wmi_wmm_params_all_arg {
4868	struct wmi_wmm_params_arg ac_be;
4869	struct wmi_wmm_params_arg ac_bk;
4870	struct wmi_wmm_params_arg ac_vi;
4871	struct wmi_wmm_params_arg ac_vo;
4872};
4873
4874#define ATH12K_TWT_DEF_STA_CONG_TIMER_MS		5000
4875#define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE		10
4876#define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP		50
4877#define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN	20
4878#define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL	100
4879#define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN	80
4880#define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP	50
4881#define ATH12K_TWT_DEF_MIN_NO_STA_SETUP			10
4882#define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN		2
4883#define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS		2
4884#define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS			2
4885#define ATH12K_TWT_DEF_MAX_NO_STA_TWT			500
4886#define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL		10000
4887#define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL		1000
4888#define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL		5000
4889
4890struct wmi_twt_enable_params_cmd {
4891	__le32 tlv_header;
4892	__le32 pdev_id;
4893	__le32 sta_cong_timer_ms;
4894	__le32 mbss_support;
4895	__le32 default_slot_size;
4896	__le32 congestion_thresh_setup;
4897	__le32 congestion_thresh_teardown;
4898	__le32 congestion_thresh_critical;
4899	__le32 interference_thresh_teardown;
4900	__le32 interference_thresh_setup;
4901	__le32 min_no_sta_setup;
4902	__le32 min_no_sta_teardown;
4903	__le32 no_of_bcast_mcast_slots;
4904	__le32 min_no_twt_slots;
4905	__le32 max_no_sta_twt;
4906	__le32 mode_check_interval;
4907	__le32 add_sta_slot_interval;
4908	__le32 remove_sta_slot_interval;
4909} __packed;
4910
4911struct wmi_twt_disable_params_cmd {
4912	__le32 tlv_header;
4913	__le32 pdev_id;
4914} __packed;
4915
4916struct wmi_obss_spatial_reuse_params_cmd {
4917	__le32 tlv_header;
4918	__le32 pdev_id;
4919	__le32 enable;
4920	a_sle32 obss_min;
4921	a_sle32 obss_max;
4922	__le32 vdev_id;
4923} __packed;
4924
4925#define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS		200
4926#define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE		0
4927#define ATH12K_OBSS_COLOR_COLLISION_DETECTION			1
4928
4929#define ATH12K_BSS_COLOR_STA_PERIODS				10000
4930#define ATH12K_BSS_COLOR_AP_PERIODS				5000
4931
4932/**
4933 * enum wmi_bss_color_collision - Event types for BSS color collision handling
4934 * @WMI_BSS_COLOR_COLLISION_DISABLE: Indicates that BSS color collision detection
4935 *                                   is disabled.
4936 * @WMI_BSS_COLOR_COLLISION_DETECTION: Event triggered when a BSS color collision
4937 *                                     is detected.
4938 * @WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY: Event indicating that the timer for waiting
4939 *                                        on a free BSS color slot has expired.
4940 * @WMI_BSS_COLOR_FREE_SLOT_AVAILABLE: Event indicating that a free BSS color slot
4941 *                                     has become available.
4942 */
4943enum wmi_bss_color_collision {
4944	WMI_BSS_COLOR_COLLISION_DISABLE = 0,
4945	WMI_BSS_COLOR_COLLISION_DETECTION,
4946	WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY,
4947	WMI_BSS_COLOR_FREE_SLOT_AVAILABLE,
4948};
4949
4950struct wmi_obss_color_collision_cfg_params_cmd {
4951	__le32 tlv_header;
4952	__le32 vdev_id;
4953	__le32 flags;
4954	__le32 evt_type;
4955	__le32 current_bss_color;
4956	__le32 detection_period_ms;
4957	__le32 scan_period_ms;
4958	__le32 free_slot_expiry_time_ms;
4959} __packed;
4960
4961struct wmi_bss_color_change_enable_params_cmd {
4962	__le32 tlv_header;
4963	__le32 vdev_id;
4964	__le32 enable;
4965} __packed;
4966
4967struct wmi_obss_color_collision_event {
4968	__le32 vdev_id;
4969	__le32 evt_type;
4970	__le64 obss_color_bitmap;
4971} __packed;
4972
4973#define ATH12K_IPV4_TH_SEED_SIZE 5
4974#define ATH12K_IPV6_TH_SEED_SIZE 11
4975
4976struct ath12k_wmi_pdev_lro_config_cmd {
4977	__le32 tlv_header;
4978	__le32 lro_enable;
4979	__le32 res;
4980	u32 th_4[ATH12K_IPV4_TH_SEED_SIZE];
4981	u32 th_6[ATH12K_IPV6_TH_SEED_SIZE];
4982	__le32 pdev_id;
4983} __packed;
4984
4985#define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT                 0
4986#define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT              224
4987#define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT              1
4988#define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT              7
4989#define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT                1
4990#define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT           0
4991#define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT     -96
4992#define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT           80
4993#define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT          12
4994#define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT           8
4995#define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT           0
4996#define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT         0
4997#define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT           0xf0
4998#define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT            0
4999#define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT              2
5000#define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT             1
5001#define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT               1
5002#define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT              1
5003
5004struct ath12k_wmi_vdev_spectral_conf_arg {
5005	u32 vdev_id;
5006	u32 scan_count;
5007	u32 scan_period;
5008	u32 scan_priority;
5009	u32 scan_fft_size;
5010	u32 scan_gc_ena;
5011	u32 scan_restart_ena;
5012	u32 scan_noise_floor_ref;
5013	u32 scan_init_delay;
5014	u32 scan_nb_tone_thr;
5015	u32 scan_str_bin_thr;
5016	u32 scan_wb_rpt_mode;
5017	u32 scan_rssi_rpt_mode;
5018	u32 scan_rssi_thr;
5019	u32 scan_pwr_format;
5020	u32 scan_rpt_mode;
5021	u32 scan_bin_scale;
5022	u32 scan_dbm_adj;
5023	u32 scan_chn_mask;
5024};
5025
5026struct ath12k_wmi_vdev_spectral_conf_cmd {
5027	__le32 tlv_header;
5028	__le32 vdev_id;
5029	__le32 scan_count;
5030	__le32 scan_period;
5031	__le32 scan_priority;
5032	__le32 scan_fft_size;
5033	__le32 scan_gc_ena;
5034	__le32 scan_restart_ena;
5035	__le32 scan_noise_floor_ref;
5036	__le32 scan_init_delay;
5037	__le32 scan_nb_tone_thr;
5038	__le32 scan_str_bin_thr;
5039	__le32 scan_wb_rpt_mode;
5040	__le32 scan_rssi_rpt_mode;
5041	__le32 scan_rssi_thr;
5042	__le32 scan_pwr_format;
5043	__le32 scan_rpt_mode;
5044	__le32 scan_bin_scale;
5045	__le32 scan_dbm_adj;
5046	__le32 scan_chn_mask;
5047} __packed;
5048
5049#define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
5050#define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
5051#define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
5052#define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
5053
5054struct ath12k_wmi_vdev_spectral_enable_cmd {
5055	__le32 tlv_header;
5056	__le32 vdev_id;
5057	__le32 trigger_cmd;
5058	__le32 enable_cmd;
5059} __packed;
5060
5061struct ath12k_wmi_pdev_dma_ring_cfg_arg {
5062	u32 tlv_header;
5063	u32 pdev_id;
5064	u32 module_id;
5065	u32 base_paddr_lo;
5066	u32 base_paddr_hi;
5067	u32 head_idx_paddr_lo;
5068	u32 head_idx_paddr_hi;
5069	u32 tail_idx_paddr_lo;
5070	u32 tail_idx_paddr_hi;
5071	u32 num_elems;
5072	u32 buf_size;
5073	u32 num_resp_per_event;
5074	u32 event_timeout_ms;
5075};
5076
5077struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd {
5078	__le32 tlv_header;
5079	__le32 pdev_id;
5080	__le32 module_id;		/* see enum wmi_direct_buffer_module */
5081	__le32 base_paddr_lo;
5082	__le32 base_paddr_hi;
5083	__le32 head_idx_paddr_lo;
5084	__le32 head_idx_paddr_hi;
5085	__le32 tail_idx_paddr_lo;
5086	__le32 tail_idx_paddr_hi;
5087	__le32 num_elems;		/* Number of elems in the ring */
5088	__le32 buf_size;		/* size of allocated buffer in bytes */
5089
5090	/* Number of wmi_dma_buf_release_entry packed together */
5091	__le32 num_resp_per_event;
5092
5093	/* Target should timeout and send whatever resp
5094	 * it has if this time expires, units in milliseconds
5095	 */
5096	__le32 event_timeout_ms;
5097} __packed;
5098
5099struct ath12k_wmi_dma_buf_release_fixed_params {
5100	__le32 pdev_id;
5101	__le32 module_id;
5102	__le32 num_buf_release_entry;
5103	__le32 num_meta_data_entry;
5104} __packed;
5105
5106struct ath12k_wmi_dma_buf_release_entry_params {
5107	__le32 tlv_header;
5108	__le32 paddr_lo;
5109
5110	/* Bits 11:0:   address of data
5111	 * Bits 31:12:  host context data
5112	 */
5113	__le32 paddr_hi;
5114} __packed;
5115
5116#define WMI_SPECTRAL_META_INFO1_FREQ1		GENMASK(15, 0)
5117#define WMI_SPECTRAL_META_INFO1_FREQ2		GENMASK(31, 16)
5118
5119#define WMI_SPECTRAL_META_INFO2_CHN_WIDTH	GENMASK(7, 0)
5120
5121struct ath12k_wmi_dma_buf_release_meta_data_params {
5122	__le32 tlv_header;
5123	a_sle32 noise_floor[WMI_MAX_CHAINS];
5124	__le32 reset_delay;
5125	__le32 freq1;
5126	__le32 freq2;
5127	__le32 ch_width;
5128} __packed;
5129
5130enum wmi_fils_discovery_cmd_type {
5131	WMI_FILS_DISCOVERY_CMD,
5132	WMI_UNSOL_BCAST_PROBE_RESP,
5133};
5134
5135struct wmi_fils_discovery_cmd {
5136	__le32 tlv_header;
5137	__le32 vdev_id;
5138	__le32 interval;
5139	__le32 config; /* enum wmi_fils_discovery_cmd_type */
5140} __packed;
5141
5142struct wmi_fils_discovery_tmpl_cmd {
5143	__le32 tlv_header;
5144	__le32 vdev_id;
5145	__le32 buf_len;
5146} __packed;
5147
5148struct wmi_probe_tmpl_cmd {
5149	__le32 tlv_header;
5150	__le32 vdev_id;
5151	__le32 buf_len;
5152} __packed;
5153
5154#define MAX_RADIOS 2
5155
5156#define WMI_MLO_CMD_TIMEOUT_HZ (5 * HZ)
5157#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
5158#define WMI_SEND_TIMEOUT_HZ (3 * HZ)
5159
5160struct ath12k_wmi_pdev {
5161	struct ath12k_wmi_base *wmi_ab;
5162	enum ath12k_htc_ep_id eid;
5163	u32 rx_decap_mode;
5164};
5165
5166struct ath12k_hw_mode_freq_range_arg {
5167	u32 low_2ghz_freq;
5168	u32 high_2ghz_freq;
5169	u32 low_5ghz_freq;
5170	u32 high_5ghz_freq;
5171};
5172
5173struct ath12k_svc_ext_mac_phy_info {
5174	enum wmi_host_hw_mode_config_type hw_mode_config_type;
5175	u32 phy_id;
5176	u32 supported_bands;
5177	struct ath12k_hw_mode_freq_range_arg hw_freq_range;
5178};
5179
5180#define ATH12K_MAX_MAC_PHY_CAP	8
5181
5182struct ath12k_svc_ext_info {
5183	u32 num_hw_modes;
5184	struct ath12k_svc_ext_mac_phy_info mac_phy_info[ATH12K_MAX_MAC_PHY_CAP];
5185};
5186
5187/**
5188 * enum ath12k_hw_mode - enum for host mode
5189 * @ATH12K_HW_MODE_SMM: Single mac mode
5190 * @ATH12K_HW_MODE_DBS: DBS mode
5191 * @ATH12K_HW_MODE_SBS: SBS mode with either high share or low share
5192 * @ATH12K_HW_MODE_SBS_UPPER_SHARE: Higher 5 GHz shared with 2.4 GHz
5193 * @ATH12K_HW_MODE_SBS_LOWER_SHARE: Lower 5 GHz shared with 2.4 GHz
5194 * @ATH12K_HW_MODE_MAX: Max, used to indicate invalid mode
5195 */
5196enum ath12k_hw_mode {
5197	ATH12K_HW_MODE_SMM,
5198	ATH12K_HW_MODE_DBS,
5199	ATH12K_HW_MODE_SBS,
5200	ATH12K_HW_MODE_SBS_UPPER_SHARE,
5201	ATH12K_HW_MODE_SBS_LOWER_SHARE,
5202	ATH12K_HW_MODE_MAX,
5203};
5204
5205struct ath12k_hw_mode_info {
5206	bool support_dbs:1;
5207	bool support_sbs:1;
5208
5209	struct ath12k_hw_mode_freq_range_arg freq_range_caps[ATH12K_HW_MODE_MAX]
5210							    [MAX_RADIOS];
5211};
5212
5213struct ath12k_wmi_base {
5214	struct ath12k_base *ab;
5215	struct ath12k_wmi_pdev wmi[MAX_RADIOS];
5216	enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
5217	u32 max_msg_len[MAX_RADIOS];
5218
5219	struct completion service_ready;
5220	struct completion unified_ready;
5221	DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE);
5222	wait_queue_head_t tx_credits_wq;
5223	u32 num_mem_chunks;
5224	u32 rx_decap_mode;
5225	struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS];
5226
5227	enum wmi_host_hw_mode_config_type preferred_hw_mode;
5228
5229	struct ath12k_wmi_target_cap_arg *targ_cap;
5230
5231	struct ath12k_svc_ext_info svc_ext_info;
5232	u32 sbs_lower_band_end_freq;
5233	struct ath12k_hw_mode_info hw_mode_info;
5234};
5235
5236struct wmi_pdev_set_bios_interface_cmd {
5237	__le32 tlv_header;
5238	__le32 pdev_id;
5239	__le32 param_type_id;
5240	__le32 length;
5241} __packed;
5242
5243enum wmi_bios_param_type {
5244	WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE	= 0,
5245	WMI_BIOS_PARAM_TAS_CONFIG_TYPE		= 1,
5246	WMI_BIOS_PARAM_TAS_DATA_TYPE		= 2,
5247
5248	/* bandedge control power */
5249	WMI_BIOS_PARAM_TYPE_BANDEDGE		= 3,
5250
5251	WMI_BIOS_PARAM_TYPE_MAX,
5252};
5253
5254struct wmi_pdev_set_bios_sar_table_cmd {
5255	__le32 tlv_header;
5256	__le32 pdev_id;
5257	__le32 sar_len;
5258	__le32 dbs_backoff_len;
5259} __packed;
5260
5261struct wmi_pdev_set_bios_geo_table_cmd {
5262	__le32 tlv_header;
5263	__le32 pdev_id;
5264	__le32 geo_len;
5265} __packed;
5266
5267#define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024)
5268
5269enum wmi_sys_cap_info_flags {
5270	WMI_SYS_CAP_INFO_RXTX_LED	= BIT(0),
5271	WMI_SYS_CAP_INFO_RFKILL		= BIT(1),
5272};
5273
5274#define WMI_RFKILL_CFG_GPIO_PIN_NUM		GENMASK(5, 0)
5275#define WMI_RFKILL_CFG_RADIO_LEVEL		BIT(6)
5276#define WMI_RFKILL_CFG_PIN_AS_GPIO		GENMASK(10, 7)
5277
5278enum wmi_rfkill_enable_radio {
5279	WMI_RFKILL_ENABLE_RADIO_ON	= 0,
5280	WMI_RFKILL_ENABLE_RADIO_OFF	= 1,
5281};
5282
5283enum wmi_rfkill_radio_state {
5284	WMI_RFKILL_RADIO_STATE_OFF	= 1,
5285	WMI_RFKILL_RADIO_STATE_ON	= 2,
5286};
5287
5288struct wmi_rfkill_state_change_event {
5289	__le32 gpio_pin_num;
5290	__le32 int_type;
5291	__le32 radio_state;
5292} __packed;
5293
5294struct wmi_twt_enable_event {
5295	__le32 pdev_id;
5296	__le32 status;
5297} __packed;
5298
5299struct wmi_twt_disable_event {
5300	__le32 pdev_id;
5301	__le32 status;
5302} __packed;
5303
5304struct wmi_mlo_setup_cmd {
5305	__le32 tlv_header;
5306	__le32 mld_group_id;
5307	__le32 pdev_id;
5308} __packed;
5309
5310struct wmi_mlo_setup_arg {
5311	__le32 group_id;
5312	u8 num_partner_links;
5313	u8 *partner_link_id;
5314};
5315
5316struct wmi_mlo_ready_cmd {
5317	__le32 tlv_header;
5318	__le32 pdev_id;
5319} __packed;
5320
5321enum wmi_mlo_tear_down_reason_code_type {
5322	WMI_MLO_TEARDOWN_SSR_REASON,
5323};
5324
5325struct wmi_mlo_teardown_cmd {
5326	__le32 tlv_header;
5327	__le32 pdev_id;
5328	__le32 reason_code;
5329} __packed;
5330
5331struct wmi_mlo_setup_complete_event {
5332	__le32 pdev_id;
5333	__le32 status;
5334} __packed;
5335
5336struct wmi_mlo_teardown_complete_event {
5337	__le32 pdev_id;
5338	__le32 status;
5339} __packed;
5340
5341/* WOW structures */
5342enum wmi_wow_wakeup_event {
5343	WOW_BMISS_EVENT = 0,
5344	WOW_BETTER_AP_EVENT,
5345	WOW_DEAUTH_RECVD_EVENT,
5346	WOW_MAGIC_PKT_RECVD_EVENT,
5347	WOW_GTK_ERR_EVENT,
5348	WOW_FOURWAY_HSHAKE_EVENT,
5349	WOW_EAPOL_RECVD_EVENT,
5350	WOW_NLO_DETECTED_EVENT,
5351	WOW_DISASSOC_RECVD_EVENT,
5352	WOW_PATTERN_MATCH_EVENT,
5353	WOW_CSA_IE_EVENT,
5354	WOW_PROBE_REQ_WPS_IE_EVENT,
5355	WOW_AUTH_REQ_EVENT,
5356	WOW_ASSOC_REQ_EVENT,
5357	WOW_HTT_EVENT,
5358	WOW_RA_MATCH_EVENT,
5359	WOW_HOST_AUTO_SHUTDOWN_EVENT,
5360	WOW_IOAC_MAGIC_EVENT,
5361	WOW_IOAC_SHORT_EVENT,
5362	WOW_IOAC_EXTEND_EVENT,
5363	WOW_IOAC_TIMER_EVENT,
5364	WOW_DFS_PHYERR_RADAR_EVENT,
5365	WOW_BEACON_EVENT,
5366	WOW_CLIENT_KICKOUT_EVENT,
5367	WOW_EVENT_MAX,
5368};
5369
5370enum wmi_wow_interface_cfg {
5371	WOW_IFACE_PAUSE_ENABLED,
5372	WOW_IFACE_PAUSE_DISABLED
5373};
5374
5375#define C2S(x) case x: return #x
5376
5377static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
5378{
5379	switch (ev) {
5380	C2S(WOW_BMISS_EVENT);
5381	C2S(WOW_BETTER_AP_EVENT);
5382	C2S(WOW_DEAUTH_RECVD_EVENT);
5383	C2S(WOW_MAGIC_PKT_RECVD_EVENT);
5384	C2S(WOW_GTK_ERR_EVENT);
5385	C2S(WOW_FOURWAY_HSHAKE_EVENT);
5386	C2S(WOW_EAPOL_RECVD_EVENT);
5387	C2S(WOW_NLO_DETECTED_EVENT);
5388	C2S(WOW_DISASSOC_RECVD_EVENT);
5389	C2S(WOW_PATTERN_MATCH_EVENT);
5390	C2S(WOW_CSA_IE_EVENT);
5391	C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
5392	C2S(WOW_AUTH_REQ_EVENT);
5393	C2S(WOW_ASSOC_REQ_EVENT);
5394	C2S(WOW_HTT_EVENT);
5395	C2S(WOW_RA_MATCH_EVENT);
5396	C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
5397	C2S(WOW_IOAC_MAGIC_EVENT);
5398	C2S(WOW_IOAC_SHORT_EVENT);
5399	C2S(WOW_IOAC_EXTEND_EVENT);
5400	C2S(WOW_IOAC_TIMER_EVENT);
5401	C2S(WOW_DFS_PHYERR_RADAR_EVENT);
5402	C2S(WOW_BEACON_EVENT);
5403	C2S(WOW_CLIENT_KICKOUT_EVENT);
5404	C2S(WOW_EVENT_MAX);
5405	default:
5406		return NULL;
5407	}
5408}
5409
5410enum wmi_wow_wake_reason {
5411	WOW_REASON_UNSPECIFIED = -1,
5412	WOW_REASON_NLOD = 0,
5413	WOW_REASON_AP_ASSOC_LOST,
5414	WOW_REASON_LOW_RSSI,
5415	WOW_REASON_DEAUTH_RECVD,
5416	WOW_REASON_DISASSOC_RECVD,
5417	WOW_REASON_GTK_HS_ERR,
5418	WOW_REASON_EAP_REQ,
5419	WOW_REASON_FOURWAY_HS_RECV,
5420	WOW_REASON_TIMER_INTR_RECV,
5421	WOW_REASON_PATTERN_MATCH_FOUND,
5422	WOW_REASON_RECV_MAGIC_PATTERN,
5423	WOW_REASON_P2P_DISC,
5424	WOW_REASON_WLAN_HB,
5425	WOW_REASON_CSA_EVENT,
5426	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
5427	WOW_REASON_AUTH_REQ_RECV,
5428	WOW_REASON_ASSOC_REQ_RECV,
5429	WOW_REASON_HTT_EVENT,
5430	WOW_REASON_RA_MATCH,
5431	WOW_REASON_HOST_AUTO_SHUTDOWN,
5432	WOW_REASON_IOAC_MAGIC_EVENT,
5433	WOW_REASON_IOAC_SHORT_EVENT,
5434	WOW_REASON_IOAC_EXTEND_EVENT,
5435	WOW_REASON_IOAC_TIMER_EVENT,
5436	WOW_REASON_ROAM_HO,
5437	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
5438	WOW_REASON_BEACON_RECV,
5439	WOW_REASON_CLIENT_KICKOUT_EVENT,
5440	WOW_REASON_PAGE_FAULT = 0x3a,
5441	WOW_REASON_DEBUG_TEST = 0xFF,
5442};
5443
5444static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
5445{
5446	switch (reason) {
5447	C2S(WOW_REASON_UNSPECIFIED);
5448	C2S(WOW_REASON_NLOD);
5449	C2S(WOW_REASON_AP_ASSOC_LOST);
5450	C2S(WOW_REASON_LOW_RSSI);
5451	C2S(WOW_REASON_DEAUTH_RECVD);
5452	C2S(WOW_REASON_DISASSOC_RECVD);
5453	C2S(WOW_REASON_GTK_HS_ERR);
5454	C2S(WOW_REASON_EAP_REQ);
5455	C2S(WOW_REASON_FOURWAY_HS_RECV);
5456	C2S(WOW_REASON_TIMER_INTR_RECV);
5457	C2S(WOW_REASON_PATTERN_MATCH_FOUND);
5458	C2S(WOW_REASON_RECV_MAGIC_PATTERN);
5459	C2S(WOW_REASON_P2P_DISC);
5460	C2S(WOW_REASON_WLAN_HB);
5461	C2S(WOW_REASON_CSA_EVENT);
5462	C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
5463	C2S(WOW_REASON_AUTH_REQ_RECV);
5464	C2S(WOW_REASON_ASSOC_REQ_RECV);
5465	C2S(WOW_REASON_HTT_EVENT);
5466	C2S(WOW_REASON_RA_MATCH);
5467	C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
5468	C2S(WOW_REASON_IOAC_MAGIC_EVENT);
5469	C2S(WOW_REASON_IOAC_SHORT_EVENT);
5470	C2S(WOW_REASON_IOAC_EXTEND_EVENT);
5471	C2S(WOW_REASON_IOAC_TIMER_EVENT);
5472	C2S(WOW_REASON_ROAM_HO);
5473	C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
5474	C2S(WOW_REASON_BEACON_RECV);
5475	C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
5476	C2S(WOW_REASON_PAGE_FAULT);
5477	C2S(WOW_REASON_DEBUG_TEST);
5478	default:
5479		return NULL;
5480	}
5481}
5482
5483#undef C2S
5484
5485#define WOW_DEFAULT_BITMAP_PATTERN_SIZE		148
5486#define WOW_DEFAULT_BITMASK_SIZE		148
5487
5488#define WOW_MIN_PATTERN_SIZE	1
5489#define WOW_MAX_PATTERN_SIZE	148
5490#define WOW_MAX_PKT_OFFSET	128
5491#define WOW_HDR_LEN	(sizeof(struct ieee80211_hdr_3addr) + \
5492	sizeof(struct rfc1042_hdr))
5493#define WOW_MAX_REDUCE	(WOW_HDR_LEN - sizeof(struct ethhdr) - \
5494	offsetof(struct ieee80211_hdr_3addr, addr1))
5495
5496struct wmi_wow_bitmap_pattern_params {
5497	__le32 tlv_header;
5498	u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE];
5499	u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE];
5500	__le32 pattern_offset;
5501	__le32 pattern_len;
5502	__le32 bitmask_len;
5503	__le32 pattern_id;
5504} __packed;
5505
5506struct wmi_wow_add_pattern_cmd {
5507	__le32 tlv_header;
5508	__le32 vdev_id;
5509	__le32 pattern_id;
5510	__le32 pattern_type;
5511} __packed;
5512
5513struct wmi_wow_del_pattern_cmd {
5514	__le32 tlv_header;
5515	__le32 vdev_id;
5516	__le32 pattern_id;
5517	__le32 pattern_type;
5518} __packed;
5519
5520enum wmi_tlv_pattern_type {
5521	WOW_PATTERN_MIN = 0,
5522	WOW_BITMAP_PATTERN = WOW_PATTERN_MIN,
5523	WOW_IPV4_SYNC_PATTERN,
5524	WOW_IPV6_SYNC_PATTERN,
5525	WOW_WILD_CARD_PATTERN,
5526	WOW_TIMER_PATTERN,
5527	WOW_MAGIC_PATTERN,
5528	WOW_IPV6_RA_PATTERN,
5529	WOW_IOAC_PKT_PATTERN,
5530	WOW_IOAC_TMR_PATTERN,
5531	WOW_PATTERN_MAX
5532};
5533
5534struct wmi_wow_add_del_event_cmd {
5535	__le32 tlv_header;
5536	__le32 vdev_id;
5537	__le32 is_add;
5538	__le32 event_bitmap;
5539} __packed;
5540
5541struct wmi_wow_enable_cmd {
5542	__le32 tlv_header;
5543	__le32 enable;
5544	__le32 pause_iface_config;
5545	__le32 flags;
5546}  __packed;
5547
5548struct wmi_wow_host_wakeup_cmd {
5549	__le32 tlv_header;
5550	__le32 reserved;
5551} __packed;
5552
5553struct wmi_wow_ev_param {
5554	__le32 vdev_id;
5555	__le32 flag;
5556	__le32 wake_reason;
5557	__le32 data_len;
5558} __packed;
5559
5560struct wmi_wow_ev_pg_fault_param {
5561	__le32 len;
5562	u8 data[];
5563} __packed;
5564
5565struct wmi_wow_ev_arg {
5566	enum wmi_wow_wake_reason wake_reason;
5567};
5568
5569#define WMI_PNO_MAX_SCHED_SCAN_PLANS      2
5570#define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT   7200
5571#define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
5572#define WMI_PNO_MAX_NETW_CHANNELS         26
5573#define WMI_PNO_MAX_NETW_CHANNELS_EX      60
5574#define WMI_PNO_MAX_SUPP_NETWORKS         WLAN_SCAN_PARAMS_MAX_SSID
5575#define WMI_PNO_MAX_IE_LENGTH             WLAN_SCAN_PARAMS_MAX_IE_LEN
5576
5577/* size based of dot11 declaration without extra IEs as we will not carry those for PNO */
5578#define WMI_PNO_MAX_PB_REQ_SIZE    450
5579
5580#define WMI_PNO_24GHZ_DEFAULT_CH     1
5581#define WMI_PNO_5GHZ_DEFAULT_CH      36
5582
5583#define WMI_ACTIVE_MAX_CHANNEL_TIME 40
5584#define WMI_PASSIVE_MAX_CHANNEL_TIME   110
5585
5586/* SSID broadcast type */
5587enum wmi_ssid_bcast_type {
5588	BCAST_UNKNOWN      = 0,
5589	BCAST_NORMAL       = 1,
5590	BCAST_HIDDEN       = 2,
5591};
5592
5593#define WMI_NLO_MAX_SSIDS    16
5594#define WMI_NLO_MAX_CHAN     48
5595
5596#define WMI_NLO_CONFIG_STOP                             BIT(0)
5597#define WMI_NLO_CONFIG_START                            BIT(1)
5598#define WMI_NLO_CONFIG_RESET                            BIT(2)
5599#define WMI_NLO_CONFIG_SLOW_SCAN                        BIT(4)
5600#define WMI_NLO_CONFIG_FAST_SCAN                        BIT(5)
5601#define WMI_NLO_CONFIG_SSID_HIDE_EN                     BIT(6)
5602
5603/* This bit is used to indicate if EPNO or supplicant PNO is enabled.
5604 * Only one of them can be enabled at a given time
5605 */
5606#define WMI_NLO_CONFIG_ENLO                             BIT(7)
5607#define WMI_NLO_CONFIG_SCAN_PASSIVE                     BIT(8)
5608#define WMI_NLO_CONFIG_ENLO_RESET                       BIT(9)
5609#define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ         BIT(10)
5610#define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ       BIT(11)
5611#define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12)
5612#define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG          BIT(13)
5613
5614struct wmi_nlo_ssid_params {
5615	__le32 valid;
5616	struct ath12k_wmi_ssid_params ssid;
5617} __packed;
5618
5619struct wmi_nlo_enc_params {
5620	__le32 valid;
5621	__le32 enc_type;
5622} __packed;
5623
5624struct wmi_nlo_auth_params {
5625	__le32 valid;
5626	__le32 auth_type;
5627} __packed;
5628
5629struct wmi_nlo_bcast_nw_params {
5630	__le32 valid;
5631	__le32 bcast_nw_type;
5632} __packed;
5633
5634struct wmi_nlo_rssi_params {
5635	__le32 valid;
5636	__le32 rssi;
5637} __packed;
5638
5639struct nlo_configured_params {
5640	/* TLV tag and len;*/
5641	__le32 tlv_header;
5642	struct wmi_nlo_ssid_params ssid;
5643	struct wmi_nlo_enc_params enc_type;
5644	struct wmi_nlo_auth_params auth_type;
5645	struct wmi_nlo_rssi_params rssi_cond;
5646
5647	/* indicates if the SSID is hidden or not */
5648	struct wmi_nlo_bcast_nw_params bcast_nw_type;
5649} __packed;
5650
5651struct wmi_network_type_arg {
5652	struct cfg80211_ssid ssid;
5653	u32 authentication;
5654	u32 encryption;
5655	u32 bcast_nw_type;
5656	u8 channel_count;
5657	u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
5658	s32 rssi_threshold;
5659};
5660
5661struct wmi_pno_scan_req_arg {
5662	u8 enable;
5663	u8 vdev_id;
5664	u8 uc_networks_count;
5665	struct wmi_network_type_arg a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
5666	u32 fast_scan_period;
5667	u32 slow_scan_period;
5668	u8 fast_scan_max_cycles;
5669
5670	bool do_passive_scan;
5671
5672	u32 delay_start_time;
5673	u32 active_min_time;
5674	u32 active_max_time;
5675	u32 passive_min_time;
5676	u32 passive_max_time;
5677
5678	/* mac address randomization attributes */
5679	u32 enable_pno_scan_randomization;
5680	u8 mac_addr[ETH_ALEN];
5681	u8 mac_addr_mask[ETH_ALEN];
5682};
5683
5684struct wmi_wow_nlo_config_cmd {
5685	__le32 tlv_header;
5686	__le32 flags;
5687	__le32 vdev_id;
5688	__le32 fast_scan_max_cycles;
5689	__le32 active_dwell_time;
5690	__le32 passive_dwell_time;
5691	__le32 probe_bundle_size;
5692
5693	/* ART = IRT */
5694	__le32 rest_time;
5695
5696	/* max value that can be reached after scan_backoff_multiplier */
5697	__le32 max_rest_time;
5698
5699	__le32 scan_backoff_multiplier;
5700	__le32 fast_scan_period;
5701
5702	/* specific to windows */
5703	__le32 slow_scan_period;
5704
5705	__le32 no_of_ssids;
5706
5707	__le32 num_of_channels;
5708
5709	/* NLO scan start delay time in milliseconds */
5710	__le32 delay_start_time;
5711
5712	/* MAC Address to use in Probe Req as SA */
5713	struct ath12k_wmi_mac_addr_params mac_addr;
5714
5715	/* Mask on which MAC has to be randomized */
5716	struct ath12k_wmi_mac_addr_params mac_mask;
5717
5718	/* IE bitmap to use in Probe Req */
5719	__le32 ie_bitmap[8];
5720
5721	/* Number of vendor OUIs. In the TLV vendor_oui[] */
5722	__le32 num_vendor_oui;
5723
5724	/* Number of connected NLO band preferences */
5725	__le32 num_cnlo_band_pref;
5726
5727	/* The TLVs will follow.
5728	 * nlo_configured_params nlo_list[];
5729	 * u32 channel_list[num_of_channels];
5730	 */
5731} __packed;
5732
5733/* Definition of HW data filtering */
5734enum hw_data_filter_type {
5735	WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0),
5736	WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1),
5737};
5738
5739struct wmi_hw_data_filter_cmd {
5740	__le32 tlv_header;
5741	__le32 vdev_id;
5742	__le32 enable;
5743	__le32 hw_filter_bitmap;
5744} __packed;
5745
5746struct wmi_hw_data_filter_arg {
5747	u32 vdev_id;
5748	bool enable;
5749	u32 hw_filter_bitmap;
5750};
5751
5752#define WMI_IPV6_UC_TYPE     0
5753#define WMI_IPV6_AC_TYPE     1
5754
5755#define WMI_IPV6_MAX_COUNT   16
5756#define WMI_IPV4_MAX_COUNT   2
5757
5758struct wmi_arp_ns_offload_arg {
5759	u8  ipv4_addr[WMI_IPV4_MAX_COUNT][4];
5760	u32 ipv4_count;
5761	u32 ipv6_count;
5762	u8  ipv6_addr[WMI_IPV6_MAX_COUNT][16];
5763	u8  self_ipv6_addr[WMI_IPV6_MAX_COUNT][16];
5764	u8  ipv6_type[WMI_IPV6_MAX_COUNT];
5765	bool ipv6_valid[WMI_IPV6_MAX_COUNT];
5766	u8  mac_addr[ETH_ALEN];
5767};
5768
5769#define WMI_MAX_NS_OFFLOADS           2
5770#define WMI_MAX_ARP_OFFLOADS          2
5771
5772#define WMI_ARPOL_FLAGS_VALID              BIT(0)
5773#define WMI_ARPOL_FLAGS_MAC_VALID          BIT(1)
5774#define WMI_ARPOL_FLAGS_REMOTE_IP_VALID    BIT(2)
5775
5776struct wmi_arp_offload_params {
5777	__le32 tlv_header;
5778	__le32 flags;
5779	u8 target_ipaddr[4];
5780	u8 remote_ipaddr[4];
5781	struct ath12k_wmi_mac_addr_params target_mac;
5782} __packed;
5783
5784#define WMI_NSOL_FLAGS_VALID               BIT(0)
5785#define WMI_NSOL_FLAGS_MAC_VALID           BIT(1)
5786#define WMI_NSOL_FLAGS_REMOTE_IP_VALID     BIT(2)
5787#define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST     BIT(3)
5788
5789#define WMI_NSOL_MAX_TARGET_IPS    2
5790
5791struct wmi_ns_offload_params {
5792	__le32 tlv_header;
5793	__le32 flags;
5794	u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16];
5795	u8 solicitation_ipaddr[16];
5796	u8 remote_ipaddr[16];
5797	struct ath12k_wmi_mac_addr_params target_mac;
5798} __packed;
5799
5800struct wmi_set_arp_ns_offload_cmd {
5801	__le32 tlv_header;
5802	__le32 flags;
5803	__le32 vdev_id;
5804	__le32 num_ns_ext_tuples;
5805	/* The TLVs follow:
5806	 * wmi_ns_offload_params  ns[WMI_MAX_NS_OFFLOADS];
5807	 * wmi_arp_offload_params arp[WMI_MAX_ARP_OFFLOADS];
5808	 * wmi_ns_offload_params  ns_ext[num_ns_ext_tuples];
5809	 */
5810} __packed;
5811
5812#define GTK_OFFLOAD_OPCODE_MASK             0xFF000000
5813#define GTK_OFFLOAD_ENABLE_OPCODE           0x01000000
5814#define GTK_OFFLOAD_DISABLE_OPCODE          0x02000000
5815#define GTK_OFFLOAD_REQUEST_STATUS_OPCODE   0x04000000
5816
5817#define GTK_OFFLOAD_KEK_BYTES       16
5818#define GTK_OFFLOAD_KCK_BYTES       16
5819#define GTK_REPLAY_COUNTER_BYTES    8
5820#define WMI_MAX_KEY_LEN             32
5821#define IGTK_PN_SIZE                6
5822
5823struct wmi_gtk_offload_status_event {
5824	__le32 vdev_id;
5825	__le32 flags;
5826	__le32 refresh_cnt;
5827	__le64 replay_ctr;
5828	u8 igtk_key_index;
5829	u8 igtk_key_length;
5830	u8 igtk_key_rsc[IGTK_PN_SIZE];
5831	u8 igtk_key[WMI_MAX_KEY_LEN];
5832	u8 gtk_key_index;
5833	u8 gtk_key_length;
5834	u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES];
5835	u8 gtk_key[WMI_MAX_KEY_LEN];
5836} __packed;
5837
5838struct wmi_gtk_rekey_offload_cmd {
5839	__le32 tlv_header;
5840	__le32 vdev_id;
5841	__le32 flags;
5842	u8 kek[GTK_OFFLOAD_KEK_BYTES];
5843	u8 kck[GTK_OFFLOAD_KCK_BYTES];
5844	u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES];
5845} __packed;
5846
5847struct wmi_sta_keepalive_cmd {
5848	__le32 tlv_header;
5849	__le32 vdev_id;
5850	__le32 enabled;
5851
5852	/* WMI_STA_KEEPALIVE_METHOD_ */
5853	__le32 method;
5854
5855	/* in seconds */
5856	__le32 interval;
5857
5858	/* following this structure is the TLV for struct
5859	 * wmi_sta_keepalive_arp_resp_params
5860	 */
5861} __packed;
5862
5863struct wmi_sta_keepalive_arp_resp_params {
5864	__le32 tlv_header;
5865	__le32 src_ip4_addr;
5866	__le32 dest_ip4_addr;
5867	struct ath12k_wmi_mac_addr_params dest_mac_addr;
5868} __packed;
5869
5870struct wmi_sta_keepalive_arg {
5871	u32 vdev_id;
5872	u32 enabled;
5873	u32 method;
5874	u32 interval;
5875	u32 src_ip4_addr;
5876	u32 dest_ip4_addr;
5877	const u8 dest_mac_addr[ETH_ALEN];
5878};
5879
5880enum wmi_sta_keepalive_method {
5881	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
5882	WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2,
5883	WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3,
5884	WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4,
5885	WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5,
5886};
5887
5888#define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT	30
5889#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE	0
5890
5891struct wmi_stats_event {
5892	__le32 stats_id;
5893	__le32 num_pdev_stats;
5894	__le32 num_vdev_stats;
5895	__le32 num_peer_stats;
5896	__le32 num_bcnflt_stats;
5897	__le32 num_chan_stats;
5898	__le32 num_mib_stats;
5899	__le32 pdev_id;
5900	__le32 num_bcn_stats;
5901	__le32 num_peer_extd_stats;
5902	__le32 num_peer_extd2_stats;
5903} __packed;
5904
5905enum wmi_stats_id {
5906	WMI_REQUEST_PDEV_STAT		= BIT(2),
5907	WMI_REQUEST_VDEV_STAT		= BIT(3),
5908	WMI_REQUEST_RSSI_PER_CHAIN_STAT	= BIT(8),
5909	WMI_REQUEST_BCN_STAT		= BIT(11),
5910};
5911
5912struct wmi_request_stats_cmd {
5913	__le32 tlv_header;
5914	__le32 stats_id;
5915	__le32 vdev_id;
5916	struct ath12k_wmi_mac_addr_params peer_macaddr;
5917	__le32 pdev_id;
5918} __packed;
5919
5920struct wmi_rssi_stat_params {
5921	__le32 vdev_id;
5922	__le32 rssi_avg_beacon[WMI_MAX_CHAINS];
5923	__le32 rssi_avg_data[WMI_MAX_CHAINS];
5924	struct ath12k_wmi_mac_addr_params peer_macaddr;
5925} __packed;
5926
5927struct wmi_per_chain_rssi_stat_params {
5928	__le32 num_per_chain_rssi;
5929} __packed;
5930
5931#define WLAN_MAX_AC 4
5932#define MAX_TX_RATE_VALUES 10
5933
5934struct wmi_vdev_stats_params {
5935	__le32 vdev_id;
5936	__le32 beacon_snr;
5937	__le32 data_snr;
5938	__le32 num_tx_frames[WLAN_MAX_AC];
5939	__le32 num_rx_frames;
5940	__le32 num_tx_frames_retries[WLAN_MAX_AC];
5941	__le32 num_tx_frames_failures[WLAN_MAX_AC];
5942	__le32 num_rts_fail;
5943	__le32 num_rts_success;
5944	__le32 num_rx_err;
5945	__le32 num_rx_discard;
5946	__le32 num_tx_not_acked;
5947	__le32 tx_rate_history[MAX_TX_RATE_VALUES];
5948	__le32 beacon_rssi_history[MAX_TX_RATE_VALUES];
5949} __packed;
5950
5951struct ath12k_wmi_bcn_stats_params {
5952	__le32 vdev_id;
5953	__le32 tx_bcn_succ_cnt;
5954	__le32 tx_bcn_outage_cnt;
5955} __packed;
5956
5957struct ath12k_wmi_pdev_base_stats_params {
5958	a_sle32 chan_nf;
5959	__le32 tx_frame_count; /* Cycles spent transmitting frames */
5960	__le32 rx_frame_count; /* Cycles spent receiving frames */
5961	__le32 rx_clear_count; /* Total channel busy time, evidently */
5962	__le32 cycle_count; /* Total on-channel time */
5963	__le32 phy_err_count;
5964	__le32 chan_tx_pwr;
5965} __packed;
5966
5967struct ath12k_wmi_pdev_tx_stats_params {
5968	a_sle32 comp_queued;
5969	a_sle32 comp_delivered;
5970	a_sle32 msdu_enqued;
5971	a_sle32 mpdu_enqued;
5972	a_sle32 wmm_drop;
5973	a_sle32 local_enqued;
5974	a_sle32 local_freed;
5975	a_sle32 hw_queued;
5976	a_sle32 hw_reaped;
5977	a_sle32 underrun;
5978	a_sle32 tx_abort;
5979	a_sle32 mpdus_requed;
5980	__le32 tx_ko;
5981	__le32 data_rc;
5982	__le32 self_triggers;
5983	__le32 sw_retry_failure;
5984	__le32 illgl_rate_phy_err;
5985	__le32 pdev_cont_xretry;
5986	__le32 pdev_tx_timeout;
5987	__le32 pdev_resets;
5988	__le32 stateless_tid_alloc_failure;
5989	__le32 phy_underrun;
5990	__le32 txop_ovf;
5991} __packed;
5992
5993struct ath12k_wmi_pdev_rx_stats_params {
5994	a_sle32 mid_ppdu_route_change;
5995	a_sle32 status_rcvd;
5996	a_sle32 r0_frags;
5997	a_sle32 r1_frags;
5998	a_sle32 r2_frags;
5999	a_sle32 r3_frags;
6000	a_sle32 htt_msdus;
6001	a_sle32 htt_mpdus;
6002	a_sle32 loc_msdus;
6003	a_sle32 loc_mpdus;
6004	a_sle32 oversize_amsdu;
6005	a_sle32 phy_errs;
6006	a_sle32 phy_err_drop;
6007	a_sle32 mpdu_errs;
6008} __packed;
6009
6010struct ath12k_wmi_pdev_stats_params {
6011	struct ath12k_wmi_pdev_base_stats_params base;
6012	struct ath12k_wmi_pdev_tx_stats_params tx;
6013	struct ath12k_wmi_pdev_rx_stats_params rx;
6014} __packed;
6015
6016struct ath12k_fw_stats_req_params {
6017	u32 stats_id;
6018	u32 vdev_id;
6019	u32 pdev_id;
6020};
6021
6022#define WMI_REQ_CTRL_PATH_PDEV_TX_STAT		1
6023#define WMI_REQUEST_CTRL_PATH_STAT_GET		1
6024
6025#define WMI_TPC_CONFIG			BIT(1)
6026#define WMI_TPC_REG_PWR_ALLOWED		BIT(2)
6027#define WMI_TPC_RATES_ARRAY1		BIT(3)
6028#define WMI_TPC_RATES_ARRAY2		BIT(4)
6029#define WMI_TPC_RATES_DL_OFDMA_ARRAY	BIT(5)
6030#define WMI_TPC_CTL_PWR_ARRAY		BIT(6)
6031#define WMI_TPC_CONFIG_PARAM		0x1
6032#define ATH12K_TPC_RATE_ARRAY_MU	GENMASK(15, 8)
6033#define ATH12K_TPC_RATE_ARRAY_SU	GENMASK(7, 0)
6034#define TPC_STATS_REG_PWR_ALLOWED_TYPE	0
6035
6036enum wmi_halphy_ctrl_path_stats_id {
6037	WMI_HALPHY_PDEV_TX_SU_STATS = 0,
6038	WMI_HALPHY_PDEV_TX_SUTXBF_STATS,
6039	WMI_HALPHY_PDEV_TX_MU_STATS,
6040	WMI_HALPHY_PDEV_TX_MUTXBF_STATS,
6041	WMI_HALPHY_PDEV_TX_STATS_MAX,
6042};
6043
6044enum ath12k_wmi_tpc_stats_rates_array {
6045	ATH12K_TPC_STATS_RATES_ARRAY1,
6046	ATH12K_TPC_STATS_RATES_ARRAY2,
6047};
6048
6049enum ath12k_wmi_tpc_stats_ctl_array {
6050	ATH12K_TPC_STATS_CTL_ARRAY,
6051	ATH12K_TPC_STATS_CTL_160ARRAY,
6052};
6053
6054enum ath12k_wmi_tpc_stats_events {
6055	ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT,
6056	ATH12K_TPC_STATS_RATES_EVENT1,
6057	ATH12K_TPC_STATS_RATES_EVENT2,
6058	ATH12K_TPC_STATS_CTL_TABLE_EVENT
6059};
6060
6061struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params {
6062	__le32 tlv_header;
6063	__le32 stats_id_mask;
6064	__le32 request_id;
6065	__le32 action;
6066	__le32 subid;
6067} __packed;
6068
6069struct ath12k_wmi_pdev_tpc_stats_event_fixed_params {
6070	__le32 pdev_id;
6071	__le32 end_of_event;
6072	__le32 event_count;
6073} __packed;
6074
6075struct wmi_tpc_config_params {
6076	__le32 reg_domain;
6077	__le32 chan_freq;
6078	__le32 phy_mode;
6079	__le32 twice_antenna_reduction;
6080	__le32 twice_max_reg_power;
6081	__le32 twice_antenna_gain;
6082	__le32 power_limit;
6083	__le32 rate_max;
6084	__le32 num_tx_chain;
6085	__le32 ctl;
6086	__le32 flags;
6087	__le32 caps;
6088} __packed;
6089
6090struct wmi_max_reg_power_fixed_params {
6091	__le32 reg_power_type;
6092	__le32 reg_array_len;
6093	__le32 d1;
6094	__le32 d2;
6095	__le32 d3;
6096	__le32 d4;
6097} __packed;
6098
6099struct wmi_max_reg_power_allowed_arg {
6100	struct wmi_max_reg_power_fixed_params tpc_reg_pwr;
6101	s16 *reg_pwr_array;
6102};
6103
6104struct wmi_tpc_rates_array_fixed_params {
6105	__le32 rate_array_type;
6106	__le32 rate_array_len;
6107} __packed;
6108
6109struct wmi_tpc_rates_array_arg {
6110	struct wmi_tpc_rates_array_fixed_params tpc_rates_array;
6111	s16 *rate_array;
6112};
6113
6114struct wmi_tpc_ctl_pwr_fixed_params {
6115	__le32 ctl_array_type;
6116	__le32 ctl_array_len;
6117	__le32 end_of_ctl_pwr;
6118	__le32 ctl_pwr_count;
6119	__le32 d1;
6120	__le32 d2;
6121	__le32 d3;
6122	__le32 d4;
6123} __packed;
6124
6125struct wmi_tpc_ctl_pwr_table_arg {
6126	struct wmi_tpc_ctl_pwr_fixed_params tpc_ctl_pwr;
6127	s8 *ctl_pwr_table;
6128};
6129
6130struct wmi_tpc_stats_arg {
6131	u32 pdev_id;
6132	u32 event_count;
6133	u32 end_of_event;
6134	u32 tlvs_rcvd;
6135	struct wmi_max_reg_power_allowed_arg max_reg_allowed_power;
6136	struct wmi_tpc_rates_array_arg rates_array1;
6137	struct wmi_tpc_rates_array_arg rates_array2;
6138	struct wmi_tpc_config_params tpc_config;
6139	struct wmi_tpc_ctl_pwr_table_arg ctl_array;
6140};
6141
6142struct wmi_vdev_ch_power_params {
6143	__le32 tlv_header;
6144
6145	/* Channel center frequency (MHz) */
6146	__le32 chan_cfreq;
6147
6148	/* Unit: dBm, either PSD/EIRP power for this frequency or
6149	 * incremental for non-PSD BW
6150	 */
6151	__le32 tx_power;
6152} __packed;
6153
6154struct wmi_vdev_set_tpc_power_cmd {
6155	__le32 tlv_header;
6156	__le32 vdev_id;
6157
6158	/* Value: 0 or 1, is PSD power or not */
6159	__le32 psd_power;
6160
6161	 /* Maximum EIRP power (dBm units), valid only if power is PSD */
6162	__le32 eirp_power;
6163
6164	/* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */
6165	__le32 power_type_6ghz;
6166
6167	/* This fixed_param TLV is followed by the below TLVs:
6168	 * num_pwr_levels of wmi_vdev_ch_power_info
6169	 * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks).
6170	 * For non-PSD power, the power values are for 20, 40, and till
6171	 * BSS BW power levels.
6172	 * The num_pwr_levels will be checked by sw how many elements present
6173	 * in the variable-length array.
6174	 */
6175} __packed;
6176
6177#define CRTL_F_DYNC_FORCE_LINK_NUM GENMASK(3, 2)
6178
6179struct wmi_mlo_link_set_active_cmd {
6180	__le32 tlv_header;
6181	__le32 force_mode;
6182	__le32 reason;
6183	__le32 use_ieee_link_id_bitmap;
6184	struct ath12k_wmi_mac_addr_params ap_mld_mac_addr;
6185	__le32 ctrl_flags;
6186} __packed;
6187
6188struct wmi_mlo_set_active_link_number_params {
6189	__le32 tlv_header;
6190	__le32 num_of_link;
6191	__le32 vdev_type;
6192	__le32 vdev_subtype;
6193	__le32 home_freq;
6194} __packed;
6195
6196#define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1 GENMASK(7, 0)
6197#define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2 GENMASK(15, 8)
6198#define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3 GENMASK(23, 16)
6199#define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4 GENMASK(31, 24)
6200
6201struct wmi_disallowed_mlo_mode_bitmap_params {
6202	__le32 tlv_header;
6203	__le32 disallowed_mode_bitmap;
6204	__le32 ieee_link_id_comb;
6205} __packed;
6206
6207enum wmi_mlo_link_force_mode {
6208	WMI_MLO_LINK_FORCE_MODE_ACTIVE			= 1,
6209	WMI_MLO_LINK_FORCE_MODE_INACTIVE		= 2,
6210	WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM		= 3,
6211	WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM	= 4,
6212	WMI_MLO_LINK_FORCE_MODE_NO_FORCE		= 5,
6213	WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE		= 6,
6214	WMI_MLO_LINK_FORCE_MODE_NON_FORCE_UPDATE	= 7,
6215};
6216
6217enum wmi_mlo_link_force_reason {
6218	WMI_MLO_LINK_FORCE_REASON_NEW_CONNECT		= 1,
6219	WMI_MLO_LINK_FORCE_REASON_NEW_DISCONNECT	= 2,
6220	WMI_MLO_LINK_FORCE_REASON_LINK_REMOVAL		= 3,
6221	WMI_MLO_LINK_FORCE_REASON_TDLS			= 4,
6222	WMI_MLO_LINK_FORCE_REASON_REVERT_FAILURE	= 5,
6223	WMI_MLO_LINK_FORCE_REASON_LINK_DELETE		= 6,
6224	WMI_MLO_LINK_FORCE_REASON_SINGLE_LINK_EMLSR_OP	= 7,
6225};
6226
6227struct wmi_mlo_link_num_arg {
6228	u32 num_of_link;
6229	u32 vdev_type;
6230	u32 vdev_subtype;
6231	u32 home_freq;
6232};
6233
6234struct wmi_mlo_control_flags_arg {
6235	bool overwrite_force_active_bitmap;
6236	bool overwrite_force_inactive_bitmap;
6237	bool dync_force_link_num;
6238	bool post_re_evaluate;
6239	u8 post_re_evaluate_loops;
6240	bool dont_reschedule_workqueue;
6241};
6242
6243struct wmi_ml_link_force_cmd_arg {
6244	u8 ap_mld_mac_addr[ETH_ALEN];
6245	u16 ieee_link_id_bitmap;
6246	u16 ieee_link_id_bitmap2;
6247	u8 link_num;
6248};
6249
6250struct wmi_ml_disallow_mode_bmap_arg {
6251	u32 disallowed_mode;
6252	union {
6253		u32 ieee_link_id_comb;
6254		u8 ieee_link_id[4];
6255	};
6256};
6257
6258/* maximum size of link number param array
6259 * for MLO link set active command
6260 */
6261#define WMI_MLO_LINK_NUM_SZ 2
6262
6263/* maximum size of vdev bitmap array for
6264 * MLO link set active command
6265 */
6266#define WMI_MLO_VDEV_BITMAP_SZ 2
6267
6268/* Max number of disallowed bitmap combination
6269 * sent to firmware
6270 */
6271#define WMI_ML_MAX_DISALLOW_BMAP_COMB 4
6272
6273struct wmi_mlo_link_set_active_arg {
6274	enum wmi_mlo_link_force_mode force_mode;
6275	enum wmi_mlo_link_force_reason reason;
6276	u32 num_link_entry;
6277	u32 num_vdev_bitmap;
6278	u32 num_inactive_vdev_bitmap;
6279	struct wmi_mlo_link_num_arg link_num[WMI_MLO_LINK_NUM_SZ];
6280	u32 vdev_bitmap[WMI_MLO_VDEV_BITMAP_SZ];
6281	u32 inactive_vdev_bitmap[WMI_MLO_VDEV_BITMAP_SZ];
6282	struct wmi_mlo_control_flags_arg ctrl_flags;
6283	bool use_ieee_link_id;
6284	struct wmi_ml_link_force_cmd_arg force_cmd;
6285	u32 num_disallow_mode_comb;
6286	struct wmi_ml_disallow_mode_bmap_arg disallow_bmap[WMI_ML_MAX_DISALLOW_BMAP_COMB];
6287};
6288
6289#define ATH12K_MAX_20MHZ_SEGMENTS	16
6290#define ATH12K_MAX_NUM_ANTENNA		8
6291#define ATH12K_MAX_NUM_NF_HW_DBM	32
6292
6293struct ath12k_wmi_rssi_dbm_conv_info_fixed_params {
6294	__le32 pdev_id;
6295} __packed;
6296
6297struct ath12k_wmi_rssi_dbm_conv_info_params {
6298	__le32 curr_bw;
6299	__le32 curr_rx_chainmask;
6300	__le32 xbar_config;
6301	a_sle32 xlna_bypass_offset;
6302	a_sle32 xlna_bypass_threshold;
6303	a_sle32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
6304} __packed;
6305
6306struct ath12k_wmi_rssi_dbm_conv_temp_info_params {
6307	a_sle32 offset;
6308} __packed;
6309
6310struct ath12k_wmi_rssi_dbm_conv_param_arg {
6311	u32 curr_bw;
6312	u32 curr_rx_chainmask;
6313	u32 xbar_config;
6314	s32 xlna_bypass_offset;
6315	s32 xlna_bypass_threshold;
6316	s8 nf_hw_dbm[ATH12K_MAX_NUM_ANTENNA][ATH12K_MAX_20MHZ_SEGMENTS];
6317};
6318
6319struct ath12k_wmi_rssi_dbm_conv_info_arg {
6320	bool temp_offset_present;
6321	s32 temp_offset;
6322	bool nf_dbm_present;
6323	s8 min_nf_dbm;
6324};
6325
6326void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
6327			     struct ath12k_wmi_resource_config_arg *config);
6328void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
6329			     struct ath12k_wmi_resource_config_arg *config);
6330int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
6331			u32 cmd_id);
6332struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len);
6333int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
6334			 struct sk_buff *frame);
6335int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
6336			     const u8 *p2p_ie);
6337int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
6338			struct ieee80211_mutable_offsets *offs,
6339			struct sk_buff *bcn,
6340			struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args);
6341int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id);
6342int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params);
6343int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id);
6344int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
6345			  bool restart);
6346int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
6347			      u32 vdev_id, u32 param_id, u32 param_val);
6348int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
6349			      u32 param_value, u8 pdev_id);
6350int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable);
6351int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab);
6352int ath12k_wmi_cmd_init(struct ath12k_base *ab);
6353int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab);
6354int ath12k_wmi_connect(struct ath12k_base *ab);
6355int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
6356			   u8 pdev_id);
6357int ath12k_wmi_attach(struct ath12k_base *ab);
6358void ath12k_wmi_detach(struct ath12k_base *ab);
6359int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
6360			   struct ath12k_wmi_vdev_create_arg *arg);
6361int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
6362				    struct ath12k_wmi_peer_create_arg *arg);
6363int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
6364				  u32 param_id, u32 param_value);
6365
6366int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
6367				u32 param, u32 param_value);
6368int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms);
6369int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
6370				    const u8 *peer_addr, u8 vdev_id);
6371int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id);
6372void ath12k_wmi_start_scan_init(struct ath12k *ar,
6373				struct ath12k_wmi_scan_req_arg *arg);
6374int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
6375				   struct ath12k_wmi_scan_req_arg *arg);
6376int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
6377				  struct ath12k_wmi_scan_cancel_arg *arg);
6378int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
6379				   struct wmi_wmm_params_all_arg *param);
6380int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
6381			    u32 pdev_id);
6382int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id);
6383
6384int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
6385				   struct ath12k_wmi_peer_assoc_arg *arg);
6386int ath12k_wmi_vdev_install_key(struct ath12k *ar,
6387				struct wmi_vdev_install_key_arg *arg);
6388int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
6389					  enum wmi_bss_chan_info_req_type type);
6390int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar);
6391int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
6392					u8 peer_addr[ETH_ALEN],
6393					u32 peer_tid_bitmap,
6394					u8 vdev_id);
6395int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
6396					struct ath12k_wmi_ap_ps_arg *arg);
6397int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
6398				       struct ath12k_wmi_scan_chan_list_arg *arg);
6399int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
6400						  u32 pdev_id);
6401int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac);
6402int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
6403			  u32 tid, u32 buf_size);
6404int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
6405			      u32 tid, u32 status);
6406int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
6407			  u32 tid, u32 initiator, u32 reason);
6408int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
6409					    u32 vdev_id, u32 bcn_ctrl_op);
6410int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
6411				     struct ath12k_wmi_init_country_arg *arg);
6412int
6413ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar,
6414					struct wmi_set_current_country_arg *arg);
6415int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
6416					   int vdev_id, const u8 *addr,
6417					   dma_addr_t paddr, u8 tid,
6418					   u8 ba_window_size_valid,
6419					   u32 ba_window_size);
6420int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar,
6421				       struct wmi_11d_scan_start_arg *arg);
6422int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id);
6423int
6424ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
6425				 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg);
6426int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
6427				       struct ath12k_wmi_pdev_set_regdomain_arg *arg);
6428int ath12k_wmi_simulate_radar(struct ath12k *ar);
6429int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id);
6430int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id);
6431int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
6432				 struct ieee80211_he_obss_pd *he_obss_pd);
6433int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
6434				  u8 bss_color, u32 period,
6435				  bool enable);
6436int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
6437						bool enable);
6438int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id);
6439int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
6440				 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg);
6441int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
6442				    u32 trigger, u32 enable);
6443int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
6444				  struct ath12k_wmi_vdev_spectral_conf_arg *arg);
6445int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
6446				   struct sk_buff *tmpl);
6447int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
6448			      bool unsol_bcast_probe_resp_enabled);
6449int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
6450			       struct sk_buff *tmpl);
6451int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
6452			   enum wmi_host_hw_mode_config_type mode);
6453int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
6454			    const u8 *buf, size_t buf_len);
6455int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table);
6456int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table);
6457int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
6458				      u32 vdev_id, u32 pdev_id);
6459__le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len);
6460
6461int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar,
6462				      enum wmi_halphy_ctrl_path_stats_id tpc_stats_type);
6463void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar);
6464
6465static inline u32
6466ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param)
6467{
6468	return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID);
6469}
6470
6471static inline u32
6472ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param)
6473{
6474	return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID);
6475}
6476
6477static inline u32
6478ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param)
6479{
6480	return le32_get_bits(param->pdev_and_hw_link_ids,
6481			     WMI_CAPS_PARAMS_PDEV_ID);
6482}
6483
6484static inline u32
6485ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param)
6486{
6487	return le32_get_bits(param->pdev_and_hw_link_ids,
6488			     WMI_CAPS_PARAMS_HW_LINK_ID);
6489}
6490
6491int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar);
6492int ath12k_wmi_wow_enable(struct ath12k *ar);
6493int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id);
6494int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
6495			       const u8 *pattern, const u8 *mask,
6496			       int pattern_len, int pattern_offset);
6497int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
6498				    enum wmi_wow_wakeup_event event,
6499				    u32 enable);
6500int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
6501			      struct wmi_pno_scan_req_arg  *pno_scan);
6502int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar,
6503				  struct wmi_hw_data_filter_arg *arg);
6504int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
6505			      struct ath12k_link_vif *arvif,
6506			      struct wmi_arp_ns_offload_arg *offload,
6507			      bool enable);
6508int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
6509				 struct ath12k_link_vif *arvif, bool enable);
6510int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
6511				 struct ath12k_link_vif *arvif);
6512int ath12k_wmi_sta_keepalive(struct ath12k *ar,
6513			     const struct wmi_sta_keepalive_arg *arg);
6514int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params);
6515int ath12k_wmi_mlo_ready(struct ath12k *ar);
6516int ath12k_wmi_mlo_teardown(struct ath12k *ar);
6517void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
6518			      struct ath12k_fw_stats *fw_stats, u32 stats_id,
6519			      char *buf);
6520bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar);
6521int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
6522				       u32 vdev_id,
6523				       struct ath12k_reg_tpc_power_info *param);
6524int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab,
6525					    struct wmi_mlo_link_set_active_arg *param);
6526#endif