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asix_devices.c
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linux-6.19.14/drivers/net/usb/asix_devices.c
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * ASIX AX8817X based USB 2.0 Ethernet Devices 4 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> 5 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> 6 * Copyright (C) 2006 James Painter <jamie.painter@iname.com> 7 * Copyright (c) 2002-2003 TiVo Inc. 8 */ 9 10#include "asix.h" 11 12#define PHY_MODE_MARVELL 0x0000 13#define MII_MARVELL_LED_CTRL 0x0018 14#define MII_MARVELL_STATUS 0x001b 15#define MII_MARVELL_CTRL 0x0014 16 17#define MARVELL_LED_MANUAL 0x0019 18 19#define MARVELL_STATUS_HWCFG 0x0004 20 21#define MARVELL_CTRL_TXDELAY 0x0002 22#define MARVELL_CTRL_RXDELAY 0x0080 23 24#define PHY_MODE_RTL8211CL 0x000C 25 26#define AX88772A_PHY14H 0x14 27#define AX88772A_PHY14H_DEFAULT 0x442C 28 29#define AX88772A_PHY15H 0x15 30#define AX88772A_PHY15H_DEFAULT 0x03C8 31 32#define AX88772A_PHY16H 0x16 33#define AX88772A_PHY16H_DEFAULT 0x4044 34 35struct ax88172_int_data { 36 __le16 res1; 37 u8 link; 38 __le16 res2; 39 u8 status; 40 __le16 res3; 41} __packed; 42 43static void asix_status(struct usbnet *dev, struct urb *urb) 44{ 45 struct ax88172_int_data *event; 46 int link; 47 48 if (urb->actual_length < 8) 49 return; 50 51 event = urb->transfer_buffer; 52 link = event->link & 0x01; 53 if (netif_carrier_ok(dev->net) != link) { 54 usbnet_link_change(dev, link, 1); 55 netdev_dbg(dev->net, "Link Status is: %d\n", link); 56 } 57} 58 59static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr) 60{ 61 if (is_valid_ether_addr(addr)) { 62 eth_hw_addr_set(dev->net, addr); 63 } else { 64 netdev_info(dev->net, "invalid hw address, using random\n"); 65 eth_hw_addr_random(dev->net); 66 } 67} 68 69/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ 70static u32 asix_get_phyid(struct usbnet *dev) 71{ 72 int phy_reg; 73 u32 phy_id; 74 int i; 75 76 /* Poll for the rare case the FW or phy isn't ready yet. */ 77 for (i = 0; i < 100; i++) { 78 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); 79 if (phy_reg < 0) 80 return 0; 81 if (phy_reg != 0 && phy_reg != 0xFFFF) 82 break; 83 mdelay(1); 84 } 85 86 if (phy_reg <= 0 || phy_reg == 0xFFFF) 87 return 0; 88 89 phy_id = (phy_reg & 0xffff) << 16; 90 91 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); 92 if (phy_reg < 0) 93 return 0; 94 95 phy_id |= (phy_reg & 0xffff); 96 97 return phy_id; 98} 99 100static u32 asix_get_link(struct net_device *net) 101{ 102 struct usbnet *dev = netdev_priv(net); 103 104 return mii_link_ok(&dev->mii); 105} 106 107static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) 108{ 109 struct usbnet *dev = netdev_priv(net); 110 111 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 112} 113 114/* We need to override some ethtool_ops so we require our 115 own structure so we don't interfere with other usbnet 116 devices that may be connected at the same time. */ 117static const struct ethtool_ops ax88172_ethtool_ops = { 118 .get_drvinfo = asix_get_drvinfo, 119 .get_link = asix_get_link, 120 .get_msglevel = usbnet_get_msglevel, 121 .set_msglevel = usbnet_set_msglevel, 122 .get_wol = asix_get_wol, 123 .set_wol = asix_set_wol, 124 .get_eeprom_len = asix_get_eeprom_len, 125 .get_eeprom = asix_get_eeprom, 126 .set_eeprom = asix_set_eeprom, 127 .nway_reset = usbnet_nway_reset, 128 .get_link_ksettings = usbnet_get_link_ksettings_mii, 129 .set_link_ksettings = usbnet_set_link_ksettings_mii, 130}; 131 132static void ax88172_set_multicast(struct net_device *net) 133{ 134 struct usbnet *dev = netdev_priv(net); 135 struct asix_data *data = (struct asix_data *)&dev->data; 136 u8 rx_ctl = 0x8c; 137 138 if (net->flags & IFF_PROMISC) { 139 rx_ctl |= 0x01; 140 } else if (net->flags & IFF_ALLMULTI || 141 netdev_mc_count(net) > AX_MAX_MCAST) { 142 rx_ctl |= 0x02; 143 } else if (netdev_mc_empty(net)) { 144 /* just broadcast and directed */ 145 } else { 146 /* We use the 20 byte dev->data 147 * for our 8 byte filter buffer 148 * to avoid allocating memory that 149 * is tricky to free later */ 150 struct netdev_hw_addr *ha; 151 u32 crc_bits; 152 153 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); 154 155 /* Build the multicast hash filter. */ 156 netdev_for_each_mc_addr(ha, net) { 157 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; 158 data->multi_filter[crc_bits >> 3] |= 159 1 << (crc_bits & 7); 160 } 161 162 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, 163 AX_MCAST_FILTER_SIZE, data->multi_filter); 164 165 rx_ctl |= 0x10; 166 } 167 168 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); 169} 170 171static int ax88172_link_reset(struct usbnet *dev) 172{ 173 u8 mode; 174 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 175 176 mii_check_media(&dev->mii, 1, 1); 177 mii_ethtool_gset(&dev->mii, &ecmd); 178 mode = AX88172_MEDIUM_DEFAULT; 179 180 if (ecmd.duplex != DUPLEX_FULL) 181 mode |= ~AX88172_MEDIUM_FD; 182 183 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", 184 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); 185 186 asix_write_medium_mode(dev, mode, 0); 187 188 return 0; 189} 190 191static const struct net_device_ops ax88172_netdev_ops = { 192 .ndo_open = usbnet_open, 193 .ndo_stop = usbnet_stop, 194 .ndo_start_xmit = usbnet_start_xmit, 195 .ndo_tx_timeout = usbnet_tx_timeout, 196 .ndo_change_mtu = usbnet_change_mtu, 197 .ndo_get_stats64 = dev_get_tstats64, 198 .ndo_set_mac_address = eth_mac_addr, 199 .ndo_validate_addr = eth_validate_addr, 200 .ndo_eth_ioctl = asix_ioctl, 201 .ndo_set_rx_mode = ax88172_set_multicast, 202}; 203 204static void asix_phy_reset(struct usbnet *dev, unsigned int reset_bits) 205{ 206 unsigned int timeout = 5000; 207 208 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits); 209 210 /* give phy_id a chance to process reset */ 211 udelay(500); 212 213 /* See IEEE 802.3 "22.2.4.1.1 Reset": 500ms max */ 214 while (timeout--) { 215 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR) 216 & BMCR_RESET) 217 udelay(100); 218 else 219 return; 220 } 221 222 netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n", 223 dev->mii.phy_id); 224} 225 226static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) 227{ 228 int ret = 0; 229 u8 buf[ETH_ALEN] = {0}; 230 int i; 231 unsigned long gpio_bits = dev->driver_info->data; 232 233 ret = usbnet_get_endpoints(dev, intf); 234 if (ret) 235 goto out; 236 237 /* Toggle the GPIOs in a manufacturer/model specific way */ 238 for (i = 2; i >= 0; i--) { 239 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, 240 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0); 241 if (ret < 0) 242 goto out; 243 msleep(5); 244 } 245 246 ret = asix_write_rx_ctl(dev, 0x80, 0); 247 if (ret < 0) 248 goto out; 249 250 /* Get the MAC address */ 251 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 252 0, 0, ETH_ALEN, buf, 0); 253 if (ret < 0) { 254 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n", 255 ret); 256 goto out; 257 } 258 259 asix_set_netdev_dev_addr(dev, buf); 260 261 /* Initialize MII structure */ 262 dev->mii.dev = dev->net; 263 dev->mii.mdio_read = asix_mdio_read; 264 dev->mii.mdio_write = asix_mdio_write; 265 dev->mii.phy_id_mask = 0x3f; 266 dev->mii.reg_num_mask = 0x1f; 267 268 dev->mii.phy_id = asix_read_phy_addr(dev, true); 269 if (dev->mii.phy_id < 0) 270 return dev->mii.phy_id; 271 272 dev->net->netdev_ops = &ax88172_netdev_ops; 273 dev->net->ethtool_ops = &ax88172_ethtool_ops; 274 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ 275 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ 276 277 asix_phy_reset(dev, BMCR_RESET); 278 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 279 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); 280 mii_nway_restart(&dev->mii); 281 282 return 0; 283 284out: 285 return ret; 286} 287 288static void ax88772_ethtool_get_strings(struct net_device *netdev, u32 sset, 289 u8 *data) 290{ 291 switch (sset) { 292 case ETH_SS_TEST: 293 net_selftest_get_strings(data); 294 break; 295 } 296} 297 298static int ax88772_ethtool_get_sset_count(struct net_device *ndev, int sset) 299{ 300 switch (sset) { 301 case ETH_SS_TEST: 302 return net_selftest_get_count(); 303 default: 304 return -EOPNOTSUPP; 305 } 306} 307 308static void ax88772_ethtool_get_pauseparam(struct net_device *ndev, 309 struct ethtool_pauseparam *pause) 310{ 311 struct usbnet *dev = netdev_priv(ndev); 312 struct asix_common_private *priv = dev->driver_priv; 313 314 phylink_ethtool_get_pauseparam(priv->phylink, pause); 315} 316 317static int ax88772_ethtool_set_pauseparam(struct net_device *ndev, 318 struct ethtool_pauseparam *pause) 319{ 320 struct usbnet *dev = netdev_priv(ndev); 321 struct asix_common_private *priv = dev->driver_priv; 322 323 return phylink_ethtool_set_pauseparam(priv->phylink, pause); 324} 325 326static const struct ethtool_ops ax88772_ethtool_ops = { 327 .get_drvinfo = asix_get_drvinfo, 328 .get_link = usbnet_get_link, 329 .get_msglevel = usbnet_get_msglevel, 330 .set_msglevel = usbnet_set_msglevel, 331 .get_wol = asix_get_wol, 332 .set_wol = asix_set_wol, 333 .get_eeprom_len = asix_get_eeprom_len, 334 .get_eeprom = asix_get_eeprom, 335 .set_eeprom = asix_set_eeprom, 336 .nway_reset = phy_ethtool_nway_reset, 337 .get_link_ksettings = phy_ethtool_get_link_ksettings, 338 .set_link_ksettings = phy_ethtool_set_link_ksettings, 339 .self_test = net_selftest, 340 .get_strings = ax88772_ethtool_get_strings, 341 .get_sset_count = ax88772_ethtool_get_sset_count, 342 .get_pauseparam = ax88772_ethtool_get_pauseparam, 343 .set_pauseparam = ax88772_ethtool_set_pauseparam, 344}; 345 346static int ax88772_reset(struct usbnet *dev) 347{ 348 struct asix_data *data = (struct asix_data *)&dev->data; 349 struct asix_common_private *priv = dev->driver_priv; 350 int ret; 351 352 /* Rewrite MAC address */ 353 ether_addr_copy(data->mac_addr, dev->net->dev_addr); 354 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, 355 ETH_ALEN, data->mac_addr, 0); 356 if (ret < 0) 357 goto out; 358 359 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ 360 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0); 361 if (ret < 0) 362 goto out; 363 364 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0); 365 if (ret < 0) 366 goto out; 367 368 phylink_start(priv->phylink); 369 370 return 0; 371 372out: 373 return ret; 374} 375 376static int ax88772_hw_reset(struct usbnet *dev, int in_pm) 377{ 378 struct asix_data *data = (struct asix_data *)&dev->data; 379 struct asix_common_private *priv = dev->driver_priv; 380 u16 rx_ctl; 381 int ret; 382 383 ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 | 384 AX_GPIO_GPO2EN, 5, in_pm); 385 if (ret < 0) 386 goto out; 387 388 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy, 389 0, 0, NULL, in_pm); 390 if (ret < 0) { 391 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); 392 goto out; 393 } 394 395 if (priv->embd_phy) { 396 ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm); 397 if (ret < 0) 398 goto out; 399 400 usleep_range(10000, 11000); 401 402 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm); 403 if (ret < 0) 404 goto out; 405 406 msleep(60); 407 408 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL, 409 in_pm); 410 if (ret < 0) 411 goto out; 412 } else { 413 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL, 414 in_pm); 415 if (ret < 0) 416 goto out; 417 } 418 419 msleep(150); 420 421 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id, 422 MII_PHYSID1))){ 423 ret = -EIO; 424 goto out; 425 } 426 427 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm); 428 if (ret < 0) 429 goto out; 430 431 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm); 432 if (ret < 0) 433 goto out; 434 435 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, 436 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, 437 AX88772_IPG2_DEFAULT, 0, NULL, in_pm); 438 if (ret < 0) { 439 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); 440 goto out; 441 } 442 443 /* Rewrite MAC address */ 444 ether_addr_copy(data->mac_addr, dev->net->dev_addr); 445 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, 446 ETH_ALEN, data->mac_addr, in_pm); 447 if (ret < 0) 448 goto out; 449 450 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ 451 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm); 452 if (ret < 0) 453 goto out; 454 455 rx_ctl = asix_read_rx_ctl(dev, in_pm); 456 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", 457 rx_ctl); 458 459 rx_ctl = asix_read_medium_status(dev, in_pm); 460 netdev_dbg(dev->net, 461 "Medium Status is 0x%04x after all initializations\n", 462 rx_ctl); 463 464 return 0; 465 466out: 467 return ret; 468} 469 470static int ax88772a_hw_reset(struct usbnet *dev, int in_pm) 471{ 472 struct asix_data *data = (struct asix_data *)&dev->data; 473 struct asix_common_private *priv = dev->driver_priv; 474 u16 rx_ctl, phy14h, phy15h, phy16h; 475 int ret; 476 477 ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm); 478 if (ret < 0) 479 goto out; 480 481 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy | 482 AX_PHYSEL_SSEN, 0, 0, NULL, in_pm); 483 if (ret < 0) { 484 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); 485 goto out; 486 } 487 usleep_range(10000, 11000); 488 489 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm); 490 if (ret < 0) 491 goto out; 492 493 usleep_range(10000, 11000); 494 495 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm); 496 if (ret < 0) 497 goto out; 498 499 msleep(160); 500 501 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm); 502 if (ret < 0) 503 goto out; 504 505 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm); 506 if (ret < 0) 507 goto out; 508 509 msleep(200); 510 511 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id, 512 MII_PHYSID1))) { 513 ret = -1; 514 goto out; 515 } 516 517 if (priv->chipcode == AX_AX88772B_CHIPCODE) { 518 ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001, 519 0, NULL, in_pm); 520 if (ret < 0) { 521 netdev_dbg(dev->net, "Write BQ setting failed: %d\n", 522 ret); 523 goto out; 524 } 525 } else if (priv->chipcode == AX_AX88772A_CHIPCODE) { 526 /* Check if the PHY registers have default settings */ 527 phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id, 528 AX88772A_PHY14H); 529 phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id, 530 AX88772A_PHY15H); 531 phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id, 532 AX88772A_PHY16H); 533 534 netdev_dbg(dev->net, 535 "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n", 536 phy14h, phy15h, phy16h); 537 538 /* Restore PHY registers default setting if not */ 539 if (phy14h != AX88772A_PHY14H_DEFAULT) 540 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, 541 AX88772A_PHY14H, 542 AX88772A_PHY14H_DEFAULT); 543 if (phy15h != AX88772A_PHY15H_DEFAULT) 544 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, 545 AX88772A_PHY15H, 546 AX88772A_PHY15H_DEFAULT); 547 if (phy16h != AX88772A_PHY16H_DEFAULT) 548 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, 549 AX88772A_PHY16H, 550 AX88772A_PHY16H_DEFAULT); 551 } 552 553 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, 554 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, 555 AX88772_IPG2_DEFAULT, 0, NULL, in_pm); 556 if (ret < 0) { 557 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); 558 goto out; 559 } 560 561 /* Rewrite MAC address */ 562 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); 563 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, 564 data->mac_addr, in_pm); 565 if (ret < 0) 566 goto out; 567 568 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ 569 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm); 570 if (ret < 0) 571 goto out; 572 573 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm); 574 if (ret < 0) 575 return ret; 576 577 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ 578 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm); 579 if (ret < 0) 580 goto out; 581 582 rx_ctl = asix_read_rx_ctl(dev, in_pm); 583 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", 584 rx_ctl); 585 586 rx_ctl = asix_read_medium_status(dev, in_pm); 587 netdev_dbg(dev->net, 588 "Medium Status is 0x%04x after all initializations\n", 589 rx_ctl); 590 591 return 0; 592 593out: 594 return ret; 595} 596 597static const struct net_device_ops ax88772_netdev_ops = { 598 .ndo_open = usbnet_open, 599 .ndo_stop = usbnet_stop, 600 .ndo_start_xmit = usbnet_start_xmit, 601 .ndo_tx_timeout = usbnet_tx_timeout, 602 .ndo_change_mtu = usbnet_change_mtu, 603 .ndo_get_stats64 = dev_get_tstats64, 604 .ndo_set_mac_address = asix_set_mac_address, 605 .ndo_validate_addr = eth_validate_addr, 606 .ndo_eth_ioctl = phy_do_ioctl_running, 607 .ndo_set_rx_mode = asix_set_multicast, 608}; 609 610static void ax88772_suspend(struct usbnet *dev) 611{ 612 struct asix_common_private *priv = dev->driver_priv; 613 u16 medium; 614 615 if (netif_running(dev->net)) { 616 rtnl_lock(); 617 phylink_suspend(priv->phylink, false); 618 rtnl_unlock(); 619 } 620 621 /* Stop MAC operation */ 622 medium = asix_read_medium_status(dev, 1); 623 medium &= ~AX_MEDIUM_RE; 624 asix_write_medium_mode(dev, medium, 1); 625 626 netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n", 627 asix_read_medium_status(dev, 1)); 628} 629 630/* Notes on PM callbacks and locking context: 631 * 632 * - asix_suspend()/asix_resume() are invoked for both runtime PM and 633 * system-wide suspend/resume. For struct usb_driver the ->resume() 634 * callback does not receive pm_message_t, so the resume type cannot 635 * be distinguished here. 636 * 637 * - The MAC driver must hold RTNL when calling phylink interfaces such as 638 * phylink_suspend()/resume(). Those calls will also perform MDIO I/O. 639 * 640 * - Taking RTNL and doing MDIO from a runtime-PM resume callback (while 641 * the USB PM lock is held) is fragile. Since autosuspend brings no 642 * measurable power saving here, we block it by holding a PM usage 643 * reference in ax88772_bind(). 644 */ 645static int asix_suspend(struct usb_interface *intf, pm_message_t message) 646{ 647 struct usbnet *dev = usb_get_intfdata(intf); 648 struct asix_common_private *priv = dev->driver_priv; 649 650 if (priv && priv->suspend) 651 priv->suspend(dev); 652 653 return usbnet_suspend(intf, message); 654} 655 656static void ax88772_resume(struct usbnet *dev) 657{ 658 struct asix_common_private *priv = dev->driver_priv; 659 int i; 660 661 for (i = 0; i < 3; i++) 662 if (!priv->reset(dev, 1)) 663 break; 664 665 if (netif_running(dev->net)) { 666 rtnl_lock(); 667 phylink_resume(priv->phylink); 668 rtnl_unlock(); 669 } 670} 671 672static int asix_resume(struct usb_interface *intf) 673{ 674 struct usbnet *dev = usb_get_intfdata(intf); 675 struct asix_common_private *priv = dev->driver_priv; 676 677 if (priv && priv->resume) 678 priv->resume(dev); 679 680 return usbnet_resume(intf); 681} 682 683static int ax88772_init_mdio(struct usbnet *dev) 684{ 685 struct asix_common_private *priv = dev->driver_priv; 686 int ret; 687 688 priv->mdio = mdiobus_alloc(); 689 if (!priv->mdio) 690 return -ENOMEM; 691 692 priv->mdio->priv = dev; 693 priv->mdio->read = &asix_mdio_bus_read; 694 priv->mdio->write = &asix_mdio_bus_write; 695 priv->mdio->name = "Asix MDIO Bus"; 696 priv->mdio->phy_mask = ~(BIT(priv->phy_addr & 0x1f) | BIT(AX_EMBD_PHY_ADDR)); 697 /* mii bus name is usb-<usb bus number>-<usb device number> */ 698 snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d", 699 dev->udev->bus->busnum, dev->udev->devnum); 700 701 ret = mdiobus_register(priv->mdio); 702 if (ret) { 703 netdev_err(dev->net, "Could not register MDIO bus (err %d)\n", ret); 704 mdiobus_free(priv->mdio); 705 priv->mdio = NULL; 706 } 707 708 return ret; 709} 710 711static void ax88772_mdio_unregister(struct asix_common_private *priv) 712{ 713 mdiobus_unregister(priv->mdio); 714 mdiobus_free(priv->mdio); 715} 716 717static int ax88772_init_phy(struct usbnet *dev) 718{ 719 struct asix_common_private *priv = dev->driver_priv; 720 int ret; 721 722 priv->phydev = mdiobus_get_phy(priv->mdio, priv->phy_addr); 723 if (!priv->phydev) { 724 netdev_err(dev->net, "Could not find PHY\n"); 725 return -ENODEV; 726 } 727 728 ret = phylink_connect_phy(priv->phylink, priv->phydev); 729 if (ret) { 730 netdev_err(dev->net, "Could not connect PHY\n"); 731 return ret; 732 } 733 734 phy_suspend(priv->phydev); 735 priv->phydev->mac_managed_pm = true; 736 737 phy_attached_info(priv->phydev); 738 739 if (priv->embd_phy) 740 return 0; 741 742 /* In case main PHY is not the embedded PHY and MAC is RMII clock 743 * provider, we need to suspend embedded PHY by keeping PLL enabled 744 * (AX_SWRESET_IPPD == 0). 745 */ 746 priv->phydev_int = mdiobus_get_phy(priv->mdio, AX_EMBD_PHY_ADDR); 747 if (!priv->phydev_int) { 748 rtnl_lock(); 749 phylink_disconnect_phy(priv->phylink); 750 rtnl_unlock(); 751 netdev_err(dev->net, "Could not find internal PHY\n"); 752 return -ENODEV; 753 } 754 755 priv->phydev_int->mac_managed_pm = true; 756 phy_suspend(priv->phydev_int); 757 758 return 0; 759} 760 761static void ax88772_mac_config(struct phylink_config *config, unsigned int mode, 762 const struct phylink_link_state *state) 763{ 764 /* Nothing to do */ 765} 766 767static void ax88772_mac_link_down(struct phylink_config *config, 768 unsigned int mode, phy_interface_t interface) 769{ 770 struct usbnet *dev = netdev_priv(to_net_dev(config->dev)); 771 772 asix_write_medium_mode(dev, 0, 0); 773} 774 775static void ax88772_mac_link_up(struct phylink_config *config, 776 struct phy_device *phy, 777 unsigned int mode, phy_interface_t interface, 778 int speed, int duplex, 779 bool tx_pause, bool rx_pause) 780{ 781 struct usbnet *dev = netdev_priv(to_net_dev(config->dev)); 782 u16 m = AX_MEDIUM_AC | AX_MEDIUM_RE; 783 784 m |= duplex ? AX_MEDIUM_FD : 0; 785 786 switch (speed) { 787 case SPEED_100: 788 m |= AX_MEDIUM_PS; 789 break; 790 case SPEED_10: 791 break; 792 default: 793 return; 794 } 795 796 if (tx_pause) 797 m |= AX_MEDIUM_TFC; 798 799 if (rx_pause) 800 m |= AX_MEDIUM_RFC; 801 802 asix_write_medium_mode(dev, m, 0); 803} 804 805static const struct phylink_mac_ops ax88772_phylink_mac_ops = { 806 .mac_config = ax88772_mac_config, 807 .mac_link_down = ax88772_mac_link_down, 808 .mac_link_up = ax88772_mac_link_up, 809}; 810 811static int ax88772_phylink_setup(struct usbnet *dev) 812{ 813 struct asix_common_private *priv = dev->driver_priv; 814 phy_interface_t phy_if_mode; 815 struct phylink *phylink; 816 817 priv->phylink_config.dev = &dev->net->dev; 818 priv->phylink_config.type = PHYLINK_NETDEV; 819 priv->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | 820 MAC_10 | MAC_100; 821 822 __set_bit(PHY_INTERFACE_MODE_INTERNAL, 823 priv->phylink_config.supported_interfaces); 824 __set_bit(PHY_INTERFACE_MODE_RMII, 825 priv->phylink_config.supported_interfaces); 826 827 if (priv->embd_phy) 828 phy_if_mode = PHY_INTERFACE_MODE_INTERNAL; 829 else 830 phy_if_mode = PHY_INTERFACE_MODE_RMII; 831 832 phylink = phylink_create(&priv->phylink_config, dev->net->dev.fwnode, 833 phy_if_mode, &ax88772_phylink_mac_ops); 834 if (IS_ERR(phylink)) 835 return PTR_ERR(phylink); 836 837 priv->phylink = phylink; 838 return 0; 839} 840 841static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) 842{ 843 struct asix_common_private *priv; 844 u8 buf[ETH_ALEN] = {0}; 845 int ret, i; 846 847 priv = devm_kzalloc(&dev->udev->dev, sizeof(*priv), GFP_KERNEL); 848 if (!priv) 849 return -ENOMEM; 850 851 dev->driver_priv = priv; 852 853 ret = usbnet_get_endpoints(dev, intf); 854 if (ret) 855 return ret; 856 857 /* Maybe the boot loader passed the MAC address via device tree */ 858 if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) { 859 netif_dbg(dev, ifup, dev->net, 860 "MAC address read from device tree"); 861 } else { 862 /* Try getting the MAC address from EEPROM */ 863 if (dev->driver_info->data & FLAG_EEPROM_MAC) { 864 for (i = 0; i < (ETH_ALEN >> 1); i++) { 865 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 866 0x04 + i, 0, 2, buf + i * 2, 867 0); 868 if (ret < 0) 869 break; 870 } 871 } else { 872 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 873 0, 0, ETH_ALEN, buf, 0); 874 } 875 876 if (ret < 0) { 877 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", 878 ret); 879 return ret; 880 } 881 } 882 883 asix_set_netdev_dev_addr(dev, buf); 884 885 dev->net->netdev_ops = &ax88772_netdev_ops; 886 dev->net->ethtool_ops = &ax88772_ethtool_ops; 887 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ 888 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ 889 890 ret = asix_read_phy_addr(dev, true); 891 if (ret < 0) 892 return ret; 893 894 priv->phy_addr = ret; 895 priv->embd_phy = ((priv->phy_addr & 0x1f) == AX_EMBD_PHY_ADDR); 896 897 ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, 898 &priv->chipcode, 0); 899 if (ret < 0) { 900 netdev_dbg(dev->net, "Failed to read STATMNGSTS_REG: %d\n", ret); 901 return ret; 902 } 903 904 priv->chipcode &= AX_CHIPCODE_MASK; 905 906 priv->resume = ax88772_resume; 907 priv->suspend = ax88772_suspend; 908 if (priv->chipcode == AX_AX88772_CHIPCODE) 909 priv->reset = ax88772_hw_reset; 910 else 911 priv->reset = ax88772a_hw_reset; 912 913 ret = priv->reset(dev, 0); 914 if (ret < 0) { 915 netdev_dbg(dev->net, "Failed to reset AX88772: %d\n", ret); 916 return ret; 917 } 918 919 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ 920 if (dev->driver_info->flags & FLAG_FRAMING_AX) { 921 /* hard_mtu is still the default - the device does not support 922 jumbo eth frames */ 923 dev->rx_urb_size = 2048; 924 } 925 926 priv->presvd_phy_bmcr = 0; 927 priv->presvd_phy_advertise = 0; 928 929 ret = ax88772_init_mdio(dev); 930 if (ret) 931 goto mdio_err; 932 933 ret = ax88772_phylink_setup(dev); 934 if (ret) 935 goto phylink_err; 936 937 ret = ax88772_init_phy(dev); 938 if (ret) 939 goto initphy_err; 940 941 /* Keep this interface runtime-PM active by taking a usage ref. 942 * Prevents runtime suspend while bound and avoids resume paths 943 * that could deadlock (autoresume under RTNL while USB PM lock 944 * is held, phylink/MDIO wants RTNL). 945 */ 946 pm_runtime_get_noresume(&intf->dev); 947 948 return 0; 949 950initphy_err: 951 phylink_destroy(priv->phylink); 952phylink_err: 953 ax88772_mdio_unregister(priv); 954mdio_err: 955 return ret; 956} 957 958static int ax88772_stop(struct usbnet *dev) 959{ 960 struct asix_common_private *priv = dev->driver_priv; 961 962 phylink_stop(priv->phylink); 963 964 return 0; 965} 966 967static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf) 968{ 969 struct asix_common_private *priv = dev->driver_priv; 970 971 rtnl_lock(); 972 phylink_disconnect_phy(priv->phylink); 973 rtnl_unlock(); 974 phylink_destroy(priv->phylink); 975 ax88772_mdio_unregister(priv); 976 asix_rx_fixup_common_free(dev->driver_priv); 977 /* Drop the PM usage ref taken in bind() */ 978 pm_runtime_put(&intf->dev); 979} 980 981static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf) 982{ 983 asix_rx_fixup_common_free(dev->driver_priv); 984 kfree(dev->driver_priv); 985} 986 987static const struct ethtool_ops ax88178_ethtool_ops = { 988 .get_drvinfo = asix_get_drvinfo, 989 .get_link = asix_get_link, 990 .get_msglevel = usbnet_get_msglevel, 991 .set_msglevel = usbnet_set_msglevel, 992 .get_wol = asix_get_wol, 993 .set_wol = asix_set_wol, 994 .get_eeprom_len = asix_get_eeprom_len, 995 .get_eeprom = asix_get_eeprom, 996 .set_eeprom = asix_set_eeprom, 997 .nway_reset = usbnet_nway_reset, 998 .get_link_ksettings = usbnet_get_link_ksettings_mii, 999 .set_link_ksettings = usbnet_set_link_ksettings_mii, 1000}; 1001 1002static int marvell_phy_init(struct usbnet *dev) 1003{ 1004 struct asix_data *data = (struct asix_data *)&dev->data; 1005 u16 reg; 1006 1007 netdev_dbg(dev->net, "marvell_phy_init()\n"); 1008 1009 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); 1010 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); 1011 1012 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, 1013 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); 1014 1015 if (data->ledmode) { 1016 reg = asix_mdio_read(dev->net, dev->mii.phy_id, 1017 MII_MARVELL_LED_CTRL); 1018 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); 1019 1020 reg &= 0xf8ff; 1021 reg |= (1 + 0x0100); 1022 asix_mdio_write(dev->net, dev->mii.phy_id, 1023 MII_MARVELL_LED_CTRL, reg); 1024 1025 reg = asix_mdio_read(dev->net, dev->mii.phy_id, 1026 MII_MARVELL_LED_CTRL); 1027 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); 1028 } 1029 1030 return 0; 1031} 1032 1033static int rtl8211cl_phy_init(struct usbnet *dev) 1034{ 1035 struct asix_data *data = (struct asix_data *)&dev->data; 1036 1037 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); 1038 1039 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); 1040 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); 1041 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, 1042 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); 1043 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); 1044 1045 if (data->ledmode == 12) { 1046 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); 1047 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); 1048 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); 1049 } 1050 1051 return 0; 1052} 1053 1054static int marvell_led_status(struct usbnet *dev, u16 speed) 1055{ 1056 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); 1057 1058 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); 1059 1060 /* Clear out the center LED bits - 0x03F0 */ 1061 reg &= 0xfc0f; 1062 1063 switch (speed) { 1064 case SPEED_1000: 1065 reg |= 0x03e0; 1066 break; 1067 case SPEED_100: 1068 reg |= 0x03b0; 1069 break; 1070 default: 1071 reg |= 0x02f0; 1072 } 1073 1074 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); 1075 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); 1076 1077 return 0; 1078} 1079 1080static int ax88178_reset(struct usbnet *dev) 1081{ 1082 struct asix_data *data = (struct asix_data *)&dev->data; 1083 int ret; 1084 __le16 eeprom; 1085 u8 status; 1086 int gpio0 = 0; 1087 u32 phyid; 1088 1089 ret = asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0); 1090 if (ret < 0) { 1091 netdev_dbg(dev->net, "Failed to read GPIOS: %d\n", ret); 1092 return ret; 1093 } 1094 1095 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status); 1096 1097 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0); 1098 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0); 1099 if (ret < 0) { 1100 netdev_dbg(dev->net, "Failed to read EEPROM: %d\n", ret); 1101 return ret; 1102 } 1103 1104 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0); 1105 1106 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom); 1107 1108 if (eeprom == cpu_to_le16(0xffff)) { 1109 data->phymode = PHY_MODE_MARVELL; 1110 data->ledmode = 0; 1111 gpio0 = 1; 1112 } else { 1113 data->phymode = le16_to_cpu(eeprom) & 0x7F; 1114 data->ledmode = le16_to_cpu(eeprom) >> 8; 1115 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1; 1116 } 1117 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode); 1118 1119 /* Power up external GigaPHY through AX88178 GPIO pin */ 1120 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | 1121 AX_GPIO_GPO1EN, 40, 0); 1122 if ((le16_to_cpu(eeprom) >> 8) != 1) { 1123 asix_write_gpio(dev, 0x003c, 30, 0); 1124 asix_write_gpio(dev, 0x001c, 300, 0); 1125 asix_write_gpio(dev, 0x003c, 30, 0); 1126 } else { 1127 netdev_dbg(dev->net, "gpio phymode == 1 path\n"); 1128 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0); 1129 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0); 1130 } 1131 1132 /* Read PHYID register *AFTER* powering up PHY */ 1133 phyid = asix_get_phyid(dev); 1134 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); 1135 1136 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */ 1137 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0); 1138 1139 asix_sw_reset(dev, 0, 0); 1140 msleep(150); 1141 1142 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0); 1143 msleep(150); 1144 1145 asix_write_rx_ctl(dev, 0, 0); 1146 1147 if (data->phymode == PHY_MODE_MARVELL) { 1148 marvell_phy_init(dev); 1149 msleep(60); 1150 } else if (data->phymode == PHY_MODE_RTL8211CL) 1151 rtl8211cl_phy_init(dev); 1152 1153 asix_phy_reset(dev, BMCR_RESET | BMCR_ANENABLE); 1154 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 1155 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); 1156 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, 1157 ADVERTISE_1000FULL); 1158 1159 asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0); 1160 mii_nway_restart(&dev->mii); 1161 1162 /* Rewrite MAC address */ 1163 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); 1164 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, 1165 data->mac_addr, 0); 1166 if (ret < 0) 1167 return ret; 1168 1169 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0); 1170 if (ret < 0) 1171 return ret; 1172 1173 return 0; 1174} 1175 1176static int ax88178_link_reset(struct usbnet *dev) 1177{ 1178 u16 mode; 1179 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 1180 struct asix_data *data = (struct asix_data *)&dev->data; 1181 u32 speed; 1182 1183 netdev_dbg(dev->net, "ax88178_link_reset()\n"); 1184 1185 mii_check_media(&dev->mii, 1, 1); 1186 mii_ethtool_gset(&dev->mii, &ecmd); 1187 mode = AX88178_MEDIUM_DEFAULT; 1188 speed = ethtool_cmd_speed(&ecmd); 1189 1190 if (speed == SPEED_1000) 1191 mode |= AX_MEDIUM_GM; 1192 else if (speed == SPEED_100) 1193 mode |= AX_MEDIUM_PS; 1194 else 1195 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); 1196 1197 mode |= AX_MEDIUM_ENCK; 1198 1199 if (ecmd.duplex == DUPLEX_FULL) 1200 mode |= AX_MEDIUM_FD; 1201 else 1202 mode &= ~AX_MEDIUM_FD; 1203 1204 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", 1205 speed, ecmd.duplex, mode); 1206 1207 asix_write_medium_mode(dev, mode, 0); 1208 1209 if (data->phymode == PHY_MODE_MARVELL && data->ledmode) 1210 marvell_led_status(dev, speed); 1211 1212 return 0; 1213} 1214 1215static void ax88178_set_mfb(struct usbnet *dev) 1216{ 1217 u16 mfb = AX_RX_CTL_MFB_16384; 1218 u16 rxctl; 1219 u16 medium; 1220 int old_rx_urb_size = dev->rx_urb_size; 1221 1222 if (dev->hard_mtu < 2048) { 1223 dev->rx_urb_size = 2048; 1224 mfb = AX_RX_CTL_MFB_2048; 1225 } else if (dev->hard_mtu < 4096) { 1226 dev->rx_urb_size = 4096; 1227 mfb = AX_RX_CTL_MFB_4096; 1228 } else if (dev->hard_mtu < 8192) { 1229 dev->rx_urb_size = 8192; 1230 mfb = AX_RX_CTL_MFB_8192; 1231 } else if (dev->hard_mtu < 16384) { 1232 dev->rx_urb_size = 16384; 1233 mfb = AX_RX_CTL_MFB_16384; 1234 } 1235 1236 rxctl = asix_read_rx_ctl(dev, 0); 1237 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0); 1238 1239 medium = asix_read_medium_status(dev, 0); 1240 if (dev->net->mtu > 1500) 1241 medium |= AX_MEDIUM_JFE; 1242 else 1243 medium &= ~AX_MEDIUM_JFE; 1244 asix_write_medium_mode(dev, medium, 0); 1245 1246 if (dev->rx_urb_size > old_rx_urb_size) 1247 usbnet_unlink_rx_urbs(dev); 1248} 1249 1250static int ax88178_change_mtu(struct net_device *net, int new_mtu) 1251{ 1252 struct usbnet *dev = netdev_priv(net); 1253 int ll_mtu = new_mtu + net->hard_header_len + 4; 1254 1255 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); 1256 1257 if ((ll_mtu % dev->maxpacket) == 0) 1258 return -EDOM; 1259 1260 WRITE_ONCE(net->mtu, new_mtu); 1261 dev->hard_mtu = net->mtu + net->hard_header_len; 1262 ax88178_set_mfb(dev); 1263 1264 /* max qlen depend on hard_mtu and rx_urb_size */ 1265 usbnet_update_max_qlen(dev); 1266 1267 return 0; 1268} 1269 1270static const struct net_device_ops ax88178_netdev_ops = { 1271 .ndo_open = usbnet_open, 1272 .ndo_stop = usbnet_stop, 1273 .ndo_start_xmit = usbnet_start_xmit, 1274 .ndo_tx_timeout = usbnet_tx_timeout, 1275 .ndo_get_stats64 = dev_get_tstats64, 1276 .ndo_set_mac_address = asix_set_mac_address, 1277 .ndo_validate_addr = eth_validate_addr, 1278 .ndo_set_rx_mode = asix_set_multicast, 1279 .ndo_eth_ioctl = asix_ioctl, 1280 .ndo_change_mtu = ax88178_change_mtu, 1281}; 1282 1283static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) 1284{ 1285 int ret; 1286 u8 buf[ETH_ALEN] = {0}; 1287 1288 ret = usbnet_get_endpoints(dev, intf); 1289 if (ret) 1290 return ret; 1291 1292 /* Get the MAC address */ 1293 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0); 1294 if (ret < 0) { 1295 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); 1296 return ret; 1297 } 1298 1299 asix_set_netdev_dev_addr(dev, buf); 1300 1301 /* Initialize MII structure */ 1302 dev->mii.dev = dev->net; 1303 dev->mii.mdio_read = asix_mdio_read; 1304 dev->mii.mdio_write = asix_mdio_write; 1305 dev->mii.phy_id_mask = 0x1f; 1306 dev->mii.reg_num_mask = 0xff; 1307 dev->mii.supports_gmii = 1; 1308 1309 dev->mii.phy_id = asix_read_phy_addr(dev, true); 1310 if (dev->mii.phy_id < 0) 1311 return dev->mii.phy_id; 1312 1313 dev->net->netdev_ops = &ax88178_netdev_ops; 1314 dev->net->ethtool_ops = &ax88178_ethtool_ops; 1315 dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4); 1316 1317 /* Blink LEDS so users know driver saw dongle */ 1318 asix_sw_reset(dev, 0, 0); 1319 msleep(150); 1320 1321 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0); 1322 msleep(150); 1323 1324 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ 1325 if (dev->driver_info->flags & FLAG_FRAMING_AX) { 1326 /* hard_mtu is still the default - the device does not support 1327 jumbo eth frames */ 1328 dev->rx_urb_size = 2048; 1329 } 1330 1331 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL); 1332 if (!dev->driver_priv) 1333 return -ENOMEM; 1334 1335 return 0; 1336} 1337 1338static const struct driver_info ax8817x_info = { 1339 .description = "ASIX AX8817x USB 2.0 Ethernet", 1340 .bind = ax88172_bind, 1341 .status = asix_status, 1342 .link_reset = ax88172_link_reset, 1343 .reset = ax88172_link_reset, 1344 .flags = FLAG_ETHER | FLAG_LINK_INTR, 1345 .data = 0x00130103, 1346}; 1347 1348static const struct driver_info dlink_dub_e100_info = { 1349 .description = "DLink DUB-E100 USB Ethernet", 1350 .bind = ax88172_bind, 1351 .status = asix_status, 1352 .link_reset = ax88172_link_reset, 1353 .reset = ax88172_link_reset, 1354 .flags = FLAG_ETHER | FLAG_LINK_INTR, 1355 .data = 0x009f9d9f, 1356}; 1357 1358static const struct driver_info netgear_fa120_info = { 1359 .description = "Netgear FA-120 USB Ethernet", 1360 .bind = ax88172_bind, 1361 .status = asix_status, 1362 .link_reset = ax88172_link_reset, 1363 .reset = ax88172_link_reset, 1364 .flags = FLAG_ETHER | FLAG_LINK_INTR, 1365 .data = 0x00130103, 1366}; 1367 1368static const struct driver_info hawking_uf200_info = { 1369 .description = "Hawking UF200 USB Ethernet", 1370 .bind = ax88172_bind, 1371 .status = asix_status, 1372 .link_reset = ax88172_link_reset, 1373 .reset = ax88172_link_reset, 1374 .flags = FLAG_ETHER | FLAG_LINK_INTR, 1375 .data = 0x001f1d1f, 1376}; 1377 1378static const struct driver_info ax88772_info = { 1379 .description = "ASIX AX88772 USB 2.0 Ethernet", 1380 .bind = ax88772_bind, 1381 .unbind = ax88772_unbind, 1382 .reset = ax88772_reset, 1383 .stop = ax88772_stop, 1384 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET, 1385 .rx_fixup = asix_rx_fixup_common, 1386 .tx_fixup = asix_tx_fixup, 1387}; 1388 1389static const struct driver_info ax88772b_info = { 1390 .description = "ASIX AX88772B USB 2.0 Ethernet", 1391 .bind = ax88772_bind, 1392 .unbind = ax88772_unbind, 1393 .reset = ax88772_reset, 1394 .stop = ax88772_stop, 1395 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET, 1396 .rx_fixup = asix_rx_fixup_common, 1397 .tx_fixup = asix_tx_fixup, 1398 .data = FLAG_EEPROM_MAC, 1399}; 1400 1401static const struct driver_info lxausb_t1l_info = { 1402 .description = "Linux Automation GmbH USB 10Base-T1L", 1403 .bind = ax88772_bind, 1404 .unbind = ax88772_unbind, 1405 .reset = ax88772_reset, 1406 .stop = ax88772_stop, 1407 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET, 1408 .rx_fixup = asix_rx_fixup_common, 1409 .tx_fixup = asix_tx_fixup, 1410 .data = FLAG_EEPROM_MAC, 1411}; 1412 1413static const struct driver_info ax88178_info = { 1414 .description = "ASIX AX88178 USB 2.0 Ethernet", 1415 .bind = ax88178_bind, 1416 .unbind = ax88178_unbind, 1417 .status = asix_status, 1418 .link_reset = ax88178_link_reset, 1419 .reset = ax88178_reset, 1420 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | 1421 FLAG_MULTI_PACKET, 1422 .rx_fixup = asix_rx_fixup_common, 1423 .tx_fixup = asix_tx_fixup, 1424}; 1425 1426/* 1427 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in 1428 * no-name packaging. 1429 * USB device strings are: 1430 * 1: Manufacturer: USBLINK 1431 * 2: Product: HG20F9 USB2.0 1432 * 3: Serial: 000003 1433 * Appears to be compatible with Asix 88772B. 1434 */ 1435static const struct driver_info hg20f9_info = { 1436 .description = "HG20F9 USB 2.0 Ethernet", 1437 .bind = ax88772_bind, 1438 .unbind = ax88772_unbind, 1439 .reset = ax88772_reset, 1440 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET, 1441 .rx_fixup = asix_rx_fixup_common, 1442 .tx_fixup = asix_tx_fixup, 1443 .data = FLAG_EEPROM_MAC, 1444}; 1445 1446static const struct driver_info lyconsys_fibergecko100_info = { 1447 .description = "LyconSys FiberGecko 100 USB 2.0 to SFP Adapter", 1448 .bind = ax88178_bind, 1449 .status = asix_status, 1450 .link_reset = ax88178_link_reset, 1451 .reset = ax88178_link_reset, 1452 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | 1453 FLAG_MULTI_PACKET, 1454 .rx_fixup = asix_rx_fixup_common, 1455 .tx_fixup = asix_tx_fixup, 1456 .data = 0x20061201, 1457}; 1458 1459static const struct usb_device_id products [] = { 1460{ 1461 // Linksys USB200M 1462 USB_DEVICE (0x077b, 0x2226), 1463 .driver_info = (unsigned long) &ax8817x_info, 1464}, { 1465 // Netgear FA120 1466 USB_DEVICE (0x0846, 0x1040), 1467 .driver_info = (unsigned long) &netgear_fa120_info, 1468}, { 1469 // DLink DUB-E100 1470 USB_DEVICE (0x2001, 0x1a00), 1471 .driver_info = (unsigned long) &dlink_dub_e100_info, 1472}, { 1473 // Intellinet, ST Lab USB Ethernet 1474 USB_DEVICE (0x0b95, 0x1720), 1475 .driver_info = (unsigned long) &ax8817x_info, 1476}, { 1477 // Hawking UF200, TrendNet TU2-ET100 1478 USB_DEVICE (0x07b8, 0x420a), 1479 .driver_info = (unsigned long) &hawking_uf200_info, 1480}, { 1481 // Billionton Systems, USB2AR 1482 USB_DEVICE (0x08dd, 0x90ff), 1483 .driver_info = (unsigned long) &ax8817x_info, 1484}, { 1485 // Billionton Systems, GUSB2AM-1G-B 1486 USB_DEVICE(0x08dd, 0x0114), 1487 .driver_info = (unsigned long) &ax88178_info, 1488}, { 1489 // ATEN UC210T 1490 USB_DEVICE (0x0557, 0x2009), 1491 .driver_info = (unsigned long) &ax8817x_info, 1492}, { 1493 // Buffalo LUA-U2-KTX 1494 USB_DEVICE (0x0411, 0x003d), 1495 .driver_info = (unsigned long) &ax8817x_info, 1496}, { 1497 // Buffalo LUA-U2-GT 10/100/1000 1498 USB_DEVICE (0x0411, 0x006e), 1499 .driver_info = (unsigned long) &ax88178_info, 1500}, { 1501 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" 1502 USB_DEVICE (0x6189, 0x182d), 1503 .driver_info = (unsigned long) &ax8817x_info, 1504}, { 1505 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter" 1506 USB_DEVICE (0x0df6, 0x0056), 1507 .driver_info = (unsigned long) &ax88178_info, 1508}, { 1509 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter" 1510 USB_DEVICE (0x0df6, 0x061c), 1511 .driver_info = (unsigned long) &ax88178_info, 1512}, { 1513 // corega FEther USB2-TX 1514 USB_DEVICE (0x07aa, 0x0017), 1515 .driver_info = (unsigned long) &ax8817x_info, 1516}, { 1517 // Surecom EP-1427X-2 1518 USB_DEVICE (0x1189, 0x0893), 1519 .driver_info = (unsigned long) &ax8817x_info, 1520}, { 1521 // goodway corp usb gwusb2e 1522 USB_DEVICE (0x1631, 0x6200), 1523 .driver_info = (unsigned long) &ax8817x_info, 1524}, { 1525 // JVC MP-PRX1 Port Replicator 1526 USB_DEVICE (0x04f1, 0x3008), 1527 .driver_info = (unsigned long) &ax8817x_info, 1528}, { 1529 // Lenovo U2L100P 10/100 1530 USB_DEVICE (0x17ef, 0x7203), 1531 .driver_info = (unsigned long)&ax88772b_info, 1532}, { 1533 // ASIX AX88772B 10/100 1534 USB_DEVICE (0x0b95, 0x772b), 1535 .driver_info = (unsigned long) &ax88772b_info, 1536}, { 1537 // ASIX AX88772 10/100 1538 USB_DEVICE (0x0b95, 0x7720), 1539 .driver_info = (unsigned long) &ax88772_info, 1540}, { 1541 // ASIX AX88178 10/100/1000 1542 USB_DEVICE (0x0b95, 0x1780), 1543 .driver_info = (unsigned long) &ax88178_info, 1544}, { 1545 // Logitec LAN-GTJ/U2A 1546 USB_DEVICE (0x0789, 0x0160), 1547 .driver_info = (unsigned long) &ax88178_info, 1548}, { 1549 // Linksys USB200M Rev 2 1550 USB_DEVICE (0x13b1, 0x0018), 1551 .driver_info = (unsigned long) &ax88772_info, 1552}, { 1553 // 0Q0 cable ethernet 1554 USB_DEVICE (0x1557, 0x7720), 1555 .driver_info = (unsigned long) &ax88772_info, 1556}, { 1557 // DLink DUB-E100 H/W Ver B1 1558 USB_DEVICE (0x07d1, 0x3c05), 1559 .driver_info = (unsigned long) &ax88772_info, 1560}, { 1561 // DLink DUB-E100 H/W Ver B1 Alternate 1562 USB_DEVICE (0x2001, 0x3c05), 1563 .driver_info = (unsigned long) &ax88772_info, 1564}, { 1565 // DLink DUB-E100 H/W Ver C1 1566 USB_DEVICE (0x2001, 0x1a02), 1567 .driver_info = (unsigned long) &ax88772_info, 1568}, { 1569 // Linksys USB1000 1570 USB_DEVICE (0x1737, 0x0039), 1571 .driver_info = (unsigned long) &ax88178_info, 1572}, { 1573 // IO-DATA ETG-US2 1574 USB_DEVICE (0x04bb, 0x0930), 1575 .driver_info = (unsigned long) &ax88178_info, 1576}, { 1577 // Belkin F5D5055 1578 USB_DEVICE(0x050d, 0x5055), 1579 .driver_info = (unsigned long) &ax88178_info, 1580}, { 1581 // Apple USB Ethernet Adapter 1582 USB_DEVICE(0x05ac, 0x1402), 1583 .driver_info = (unsigned long) &ax88772_info, 1584}, { 1585 // Cables-to-Go USB Ethernet Adapter 1586 USB_DEVICE(0x0b95, 0x772a), 1587 .driver_info = (unsigned long) &ax88772_info, 1588}, { 1589 // ABOCOM for pci 1590 USB_DEVICE(0x14ea, 0xab11), 1591 .driver_info = (unsigned long) &ax88178_info, 1592}, { 1593 // ASIX 88772a 1594 USB_DEVICE(0x0db0, 0xa877), 1595 .driver_info = (unsigned long) &ax88772_info, 1596}, { 1597 // Asus USB Ethernet Adapter 1598 USB_DEVICE (0x0b95, 0x7e2b), 1599 .driver_info = (unsigned long)&ax88772b_info, 1600}, { 1601 /* ASIX 88172a demo board */ 1602 USB_DEVICE(0x0b95, 0x172a), 1603 .driver_info = (unsigned long) &ax88172a_info, 1604}, { 1605 /* 1606 * USBLINK HG20F9 "USB 2.0 LAN" 1607 * Appears to have gazumped Linksys's manufacturer ID but 1608 * doesn't (yet) conflict with any known Linksys product. 1609 */ 1610 USB_DEVICE(0x066b, 0x20f9), 1611 .driver_info = (unsigned long) &hg20f9_info, 1612}, { 1613 // Linux Automation GmbH USB 10Base-T1L 1614 USB_DEVICE(0x33f7, 0x0004), 1615 .driver_info = (unsigned long) &lxausb_t1l_info, 1616}, { 1617 /* LyconSys FiberGecko 100 */ 1618 USB_DEVICE(0x1d2a, 0x0801), 1619 .driver_info = (unsigned long) &lyconsys_fibergecko100_info, 1620}, 1621 { }, // END 1622}; 1623MODULE_DEVICE_TABLE(usb, products); 1624 1625static struct usb_driver asix_driver = { 1626 .name = DRIVER_NAME, 1627 .id_table = products, 1628 .probe = usbnet_probe, 1629 .suspend = asix_suspend, 1630 .resume = asix_resume, 1631 .reset_resume = asix_resume, 1632 .disconnect = usbnet_disconnect, 1633 /* usbnet enables autosuspend by default (supports_autosuspend=1). 1634 * We keep runtime-PM active for AX88772* by taking a PM usage 1635 * reference in ax88772_bind() (pm_runtime_get_noresume()) and 1636 * dropping it in unbind(), which effectively blocks autosuspend. 1637 */ 1638 .supports_autosuspend = 1, 1639 .disable_hub_initiated_lpm = 1, 1640}; 1641 1642module_usb_driver(asix_driver); 1643 1644MODULE_AUTHOR("David Hollis"); 1645MODULE_VERSION(DRIVER_VERSION); 1646MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices"); 1647MODULE_LICENSE("GPL"); 1648
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