icssg_prueth.c

   1// SPDX-License-Identifier: GPL-2.0
   2
   3/* Texas Instruments ICSSG Ethernet Driver
   4 *
   5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
   6 *
   7 */
   8
   9#include <linux/bitops.h>
  10#include <linux/clk.h>
  11#include <linux/delay.h>
  12#include <linux/dma-mapping.h>
  13#include <linux/dma/ti-cppi5.h>
  14#include <linux/etherdevice.h>
  15#include <linux/genalloc.h>
  16#include <linux/if_hsr.h>
  17#include <linux/if_vlan.h>
  18#include <linux/interrupt.h>
  19#include <linux/io-64-nonatomic-hi-lo.h>
  20#include <linux/kernel.h>
  21#include <linux/mfd/syscon.h>
  22#include <linux/module.h>
  23#include <linux/of.h>
  24#include <linux/of_mdio.h>
  25#include <linux/of_net.h>
  26#include <linux/platform_device.h>
  27#include <linux/phy.h>
  28#include <linux/property.h>
  29#include <linux/remoteproc/pruss.h>
  30#include <linux/regmap.h>
  31#include <linux/remoteproc.h>
  32#include <net/switchdev.h>
  33
  34#include "icssg_prueth.h"
  35#include "icssg_mii_rt.h"
  36#include "icssg_switchdev.h"
  37#include "../k3-cppi-desc-pool.h"
  38
  39#define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver"
  40
  41#define DEFAULT_VID		1
  42#define DEFAULT_PORT_MASK	1
  43#define DEFAULT_UNTAG_MASK	1
  44
  45#define NETIF_PRUETH_HSR_OFFLOAD_FEATURES	(NETIF_F_HW_HSR_FWD | \
  46						 NETIF_F_HW_HSR_DUP | \
  47						 NETIF_F_HW_HSR_TAG_INS | \
  48						 NETIF_F_HW_HSR_TAG_RM)
  49
  50#define PRUETH_RX_DMA_ATTR			(DMA_ATTR_SKIP_CPU_SYNC |\
  51						 DMA_ATTR_WEAK_ORDERING)
  52
  53/* CTRLMMR_ICSSG_RGMII_CTRL register bits */
  54#define ICSSG_CTRL_RGMII_ID_MODE                BIT(24)
  55
  56static void emac_adjust_link(struct net_device *ndev);
  57
  58static int emac_get_tx_ts(struct prueth_emac *emac,
  59			  struct emac_tx_ts_response *rsp)
  60{
  61	struct prueth *prueth = emac->prueth;
  62	int slice = prueth_emac_slice(emac);
  63	int addr;
  64
  65	addr = icssg_queue_pop(prueth, slice == 0 ?
  66			       ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1);
  67	if (addr < 0)
  68		return addr;
  69
  70	memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp));
  71	/* return buffer back for to pool */
  72	icssg_queue_push(prueth, slice == 0 ?
  73			 ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr);
  74
  75	return 0;
  76}
  77
  78static void tx_ts_work(struct prueth_emac *emac)
  79{
  80	struct skb_shared_hwtstamps ssh;
  81	struct emac_tx_ts_response tsr;
  82	struct sk_buff *skb;
  83	int ret = 0;
  84	u32 hi_sw;
  85	u64 ns;
  86
  87	/* There may be more than one pending requests */
  88	while (1) {
  89		ret = emac_get_tx_ts(emac, &tsr);
  90		if (ret) /* nothing more */
  91			break;
  92
  93		if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS ||
  94		    !emac->tx_ts_skb[tsr.cookie]) {
  95			netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n",
  96				   tsr.cookie);
  97			break;
  98		}
  99
 100		skb = emac->tx_ts_skb[tsr.cookie];
 101		emac->tx_ts_skb[tsr.cookie] = NULL;	/* free slot */
 102		if (!skb) {
 103			netdev_err(emac->ndev, "Driver Bug! got NULL skb\n");
 104			break;
 105		}
 106
 107		hi_sw = readl(emac->prueth->shram.va +
 108			      TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET);
 109		ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts,
 110				    IEP_DEFAULT_CYCLE_TIME_NS);
 111
 112		memset(&ssh, 0, sizeof(ssh));
 113		ssh.hwtstamp = ns_to_ktime(ns);
 114
 115		skb_tstamp_tx(skb, &ssh);
 116		dev_consume_skb_any(skb);
 117
 118		if (atomic_dec_and_test(&emac->tx_ts_pending))	/* no more? */
 119			break;
 120	}
 121}
 122
 123static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id)
 124{
 125	struct prueth_emac *emac = dev_id;
 126
 127	/* currently only TX timestamp is being returned */
 128	tx_ts_work(emac);
 129
 130	return IRQ_HANDLED;
 131}
 132
 133static int prueth_start(struct rproc *rproc, const char *fw_name)
 134{
 135	int ret;
 136
 137	ret = rproc_set_firmware(rproc, fw_name);
 138	if (ret)
 139		return ret;
 140	return rproc_boot(rproc);
 141}
 142
 143static void prueth_shutdown(struct rproc *rproc)
 144{
 145	rproc_shutdown(rproc);
 146}
 147
 148static int prueth_emac_start(struct prueth *prueth)
 149{
 150	struct icssg_firmwares *firmwares;
 151	struct device *dev = prueth->dev;
 152	int ret, slice;
 153
 154	if (prueth->is_switch_mode)
 155		firmwares = prueth->icssg_switch_firmwares;
 156	else if (prueth->is_hsr_offload_mode && HSR_V1 == prueth->hsr_prp_version)
 157		firmwares = prueth->icssg_hsr_firmwares;
 158	else if (prueth->is_hsr_offload_mode && PRP_V1 == prueth->hsr_prp_version)
 159		firmwares = prueth->icssg_prp_firmwares;
 160	else
 161		firmwares = prueth->icssg_emac_firmwares;
 162
 163	for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {
 164		ret = prueth_start(prueth->pru[slice], firmwares[slice].pru);
 165		if (ret) {
 166			dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);
 167			goto unwind_slices;
 168		}
 169
 170		ret = prueth_start(prueth->rtu[slice], firmwares[slice].rtu);
 171		if (ret) {
 172			dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);
 173			rproc_shutdown(prueth->pru[slice]);
 174			goto unwind_slices;
 175		}
 176
 177		ret = prueth_start(prueth->txpru[slice], firmwares[slice].txpru);
 178		if (ret) {
 179			dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret);
 180			rproc_shutdown(prueth->rtu[slice]);
 181			rproc_shutdown(prueth->pru[slice]);
 182			goto unwind_slices;
 183		}
 184	}
 185
 186	return 0;
 187
 188unwind_slices:
 189	while (--slice >= 0) {
 190		prueth_shutdown(prueth->txpru[slice]);
 191		prueth_shutdown(prueth->rtu[slice]);
 192		prueth_shutdown(prueth->pru[slice]);
 193	}
 194
 195	return ret;
 196}
 197
 198static void prueth_emac_stop(struct prueth *prueth)
 199{
 200	int slice;
 201
 202	for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {
 203		prueth_shutdown(prueth->txpru[slice]);
 204		prueth_shutdown(prueth->rtu[slice]);
 205		prueth_shutdown(prueth->pru[slice]);
 206	}
 207}
 208
 209static void icssg_enable_fw_offload(struct prueth *prueth)
 210{
 211	struct prueth_emac *emac;
 212	int mac;
 213
 214	for (mac = PRUETH_MAC0; mac < PRUETH_NUM_MACS; mac++) {
 215		emac = prueth->emac[mac];
 216		if (prueth->is_hsr_offload_mode) {
 217			if (emac->ndev->features & NETIF_F_HW_HSR_TAG_RM)
 218				icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_ENABLE);
 219			else
 220				icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_DISABLE);
 221		}
 222
 223		if (prueth->is_switch_mode || prueth->is_hsr_offload_mode) {
 224			if (netif_running(emac->ndev)) {
 225				icssg_fdb_add_del(emac, eth_stp_addr, prueth->default_vlan,
 226						  ICSSG_FDB_ENTRY_P0_MEMBERSHIP |
 227						  ICSSG_FDB_ENTRY_P1_MEMBERSHIP |
 228						  ICSSG_FDB_ENTRY_P2_MEMBERSHIP |
 229						  ICSSG_FDB_ENTRY_BLOCK,
 230						  true);
 231				icssg_vtbl_modify(emac, emac->port_vlan | DEFAULT_VID,
 232						  BIT(emac->port_id) | DEFAULT_PORT_MASK,
 233						  BIT(emac->port_id) | DEFAULT_UNTAG_MASK,
 234						  true);
 235				if (prueth->is_hsr_offload_mode)
 236					icssg_vtbl_modify(emac, DEFAULT_VID,
 237							  DEFAULT_PORT_MASK,
 238							  DEFAULT_UNTAG_MASK, true);
 239				icssg_set_pvid(prueth, emac->port_vlan, emac->port_id);
 240				if (prueth->is_switch_mode)
 241					icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE);
 242			}
 243		}
 244	}
 245}
 246
 247static int prueth_emac_common_start(struct prueth *prueth)
 248{
 249	struct prueth_emac *emac;
 250	int ret = 0;
 251	int slice;
 252
 253	if (!prueth->emac[ICSS_SLICE0] && !prueth->emac[ICSS_SLICE1])
 254		return -EINVAL;
 255
 256	/* clear SMEM and MSMC settings for all slices */
 257	memset_io(prueth->msmcram.va, 0, prueth->msmcram.size);
 258	memset_io(prueth->shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS);
 259
 260	icssg_class_default(prueth->miig_rt, ICSS_SLICE0, 0, false);
 261	icssg_class_default(prueth->miig_rt, ICSS_SLICE1, 0, false);
 262
 263	if (prueth->is_switch_mode || prueth->is_hsr_offload_mode)
 264		icssg_init_fw_offload_mode(prueth);
 265	else
 266		icssg_init_emac_mode(prueth);
 267
 268	for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {
 269		emac = prueth->emac[slice];
 270		if (!emac)
 271			continue;
 272		ret = icssg_config(prueth, emac, slice);
 273		if (ret)
 274			goto disable_class;
 275
 276		/* Reset link state to force reconfiguration in
 277		 * emac_adjust_link(). Without this, if the link was already up
 278		 * before restart, emac_adjust_link() won't detect any state
 279		 * change and will skip critical configuration like writing
 280		 * speed to firmware.
 281		 */
 282		emac->link = 0;
 283
 284		mutex_lock(&emac->ndev->phydev->lock);
 285		emac_adjust_link(emac->ndev);
 286		mutex_unlock(&emac->ndev->phydev->lock);
 287	}
 288
 289	ret = prueth_emac_start(prueth);
 290	if (ret)
 291		goto disable_class;
 292
 293	emac = prueth->emac[ICSS_SLICE0] ? prueth->emac[ICSS_SLICE0] :
 294	       prueth->emac[ICSS_SLICE1];
 295	ret = icss_iep_init(emac->iep, &prueth_iep_clockops,
 296			    emac, IEP_DEFAULT_CYCLE_TIME_NS);
 297	if (ret) {
 298		dev_err(prueth->dev, "Failed to initialize IEP module\n");
 299		goto stop_pruss;
 300	}
 301
 302	return 0;
 303
 304stop_pruss:
 305	prueth_emac_stop(prueth);
 306
 307disable_class:
 308	icssg_class_disable(prueth->miig_rt, ICSS_SLICE0);
 309	icssg_class_disable(prueth->miig_rt, ICSS_SLICE1);
 310
 311	return ret;
 312}
 313
 314static int prueth_emac_common_stop(struct prueth *prueth)
 315{
 316	struct prueth_emac *emac;
 317
 318	if (!prueth->emac[ICSS_SLICE0] && !prueth->emac[ICSS_SLICE1])
 319		return -EINVAL;
 320
 321	icssg_class_disable(prueth->miig_rt, ICSS_SLICE0);
 322	icssg_class_disable(prueth->miig_rt, ICSS_SLICE1);
 323
 324	prueth_emac_stop(prueth);
 325
 326	emac = prueth->emac[ICSS_SLICE0] ? prueth->emac[ICSS_SLICE0] :
 327	       prueth->emac[ICSS_SLICE1];
 328	icss_iep_exit(emac->iep);
 329
 330	return 0;
 331}
 332
 333/* called back by PHY layer if there is change in link state of hw port*/
 334static void emac_adjust_link(struct net_device *ndev)
 335{
 336	struct prueth_emac *emac = netdev_priv(ndev);
 337	struct phy_device *phydev = ndev->phydev;
 338	struct prueth *prueth = emac->prueth;
 339	bool new_state = false;
 340	unsigned long flags;
 341
 342	if (phydev->link) {
 343		/* check the mode of operation - full/half duplex */
 344		if (phydev->duplex != emac->duplex) {
 345			new_state = true;
 346			emac->duplex = phydev->duplex;
 347		}
 348		if (phydev->speed != emac->speed) {
 349			new_state = true;
 350			emac->speed = phydev->speed;
 351		}
 352		if (!emac->link) {
 353			new_state = true;
 354			emac->link = 1;
 355		}
 356	} else if (emac->link) {
 357		new_state = true;
 358		emac->link = 0;
 359
 360		/* f/w should support 100 & 1000 */
 361		emac->speed = SPEED_1000;
 362
 363		/* half duplex may not be supported by f/w */
 364		emac->duplex = DUPLEX_FULL;
 365	}
 366
 367	if (new_state) {
 368		phy_print_status(phydev);
 369
 370		/* update RGMII and MII configuration based on PHY negotiated
 371		 * values
 372		 */
 373		if (emac->link) {
 374			if (emac->duplex == DUPLEX_HALF)
 375				icssg_config_half_duplex(emac);
 376			/* Set the RGMII cfg for gig en and full duplex */
 377			icssg_update_rgmii_cfg(prueth->miig_rt, emac);
 378
 379			/* update the Tx IPG based on 100M/1G speed */
 380			spin_lock_irqsave(&emac->lock, flags);
 381			icssg_config_ipg(emac);
 382			spin_unlock_irqrestore(&emac->lock, flags);
 383			icssg_config_set_speed(emac);
 384			icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
 385
 386		} else {
 387			icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
 388		}
 389	}
 390
 391	if (emac->link) {
 392		/* reactivate the transmit queue */
 393		netif_tx_wake_all_queues(ndev);
 394	} else {
 395		netif_tx_stop_all_queues(ndev);
 396		prueth_cleanup_tx_ts(emac);
 397	}
 398}
 399
 400static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer)
 401{
 402	struct prueth_emac *emac =
 403			container_of(timer, struct prueth_emac, rx_hrtimer);
 404	int rx_flow = PRUETH_RX_FLOW_DATA;
 405
 406	if (emac->rx_chns.irq_disabled) {
 407		/* re-enable the RX IRQ */
 408		emac->rx_chns.irq_disabled = false;
 409		enable_irq(emac->rx_chns.irq[rx_flow]);
 410	}
 411	return HRTIMER_NORESTART;
 412}
 413
 414static int emac_phy_connect(struct prueth_emac *emac)
 415{
 416	struct prueth *prueth = emac->prueth;
 417	struct net_device *ndev = emac->ndev;
 418	/* connect PHY */
 419	ndev->phydev = of_phy_connect(emac->ndev, emac->phy_node,
 420				      &emac_adjust_link, 0,
 421				      emac->phy_if);
 422	if (!ndev->phydev) {
 423		dev_err(prueth->dev, "couldn't connect to phy %s\n",
 424			emac->phy_node->full_name);
 425		return -ENODEV;
 426	}
 427
 428	if (!emac->half_duplex) {
 429		dev_dbg(prueth->dev, "half duplex mode is not supported\n");
 430		phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
 431		phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
 432	}
 433
 434	/* remove unsupported modes */
 435	phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
 436	phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Pause_BIT);
 437	phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT);
 438
 439	if (emac->phy_if == PHY_INTERFACE_MODE_MII)
 440		phy_set_max_speed(ndev->phydev, SPEED_100);
 441
 442	return 0;
 443}
 444
 445static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts)
 446{
 447	u32 hi_rollover_count, hi_rollover_count_r;
 448	struct prueth_emac *emac = clockops_data;
 449	struct prueth *prueth = emac->prueth;
 450	void __iomem *fw_hi_r_count_addr;
 451	void __iomem *fw_count_hi_addr;
 452	u32 iepcount_hi, iepcount_hi_r;
 453	unsigned long flags;
 454	u32 iepcount_lo;
 455	u64 ts = 0;
 456
 457	fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET;
 458	fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET;
 459
 460	local_irq_save(flags);
 461	do {
 462		iepcount_hi = icss_iep_get_count_hi(emac->iep);
 463		iepcount_hi += readl(fw_count_hi_addr);
 464		hi_rollover_count = readl(fw_hi_r_count_addr);
 465		ptp_read_system_prets(sts);
 466		iepcount_lo = icss_iep_get_count_low(emac->iep);
 467		ptp_read_system_postts(sts);
 468
 469		iepcount_hi_r = icss_iep_get_count_hi(emac->iep);
 470		iepcount_hi_r += readl(fw_count_hi_addr);
 471		hi_rollover_count_r = readl(fw_hi_r_count_addr);
 472	} while ((iepcount_hi_r != iepcount_hi) ||
 473		 (hi_rollover_count != hi_rollover_count_r));
 474	local_irq_restore(flags);
 475
 476	ts = ((u64)hi_rollover_count) << 23 | iepcount_hi;
 477	ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo;
 478
 479	return ts;
 480}
 481
 482static void prueth_iep_settime(void *clockops_data, u64 ns)
 483{
 484	struct icssg_setclock_desc __iomem *sc_descp;
 485	struct prueth_emac *emac = clockops_data;
 486	struct icssg_setclock_desc sc_desc;
 487	u64 cyclecount;
 488	u32 cycletime;
 489	int timeout;
 490
 491	sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET;
 492
 493	cycletime = IEP_DEFAULT_CYCLE_TIME_NS;
 494	cyclecount = ns / cycletime;
 495
 496	memset(&sc_desc, 0, sizeof(sc_desc));
 497	sc_desc.margin = cycletime - 1000;
 498	sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0);
 499	sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32;
 500	sc_desc.iepcount_set = ns % cycletime;
 501	/* Count from 0 to (cycle time) - emac->iep->def_inc */
 502	sc_desc.CMP0_current = cycletime - emac->iep->def_inc;
 503
 504	memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc));
 505
 506	writeb(1, &sc_descp->request);
 507
 508	timeout = 5;	/* fw should take 2-3 ms */
 509	while (timeout--) {
 510		if (readb(&sc_descp->acknowledgment))
 511			return;
 512
 513		usleep_range(500, 1000);
 514	}
 515
 516	dev_err(emac->prueth->dev, "settime timeout\n");
 517}
 518
 519static int prueth_perout_enable(void *clockops_data,
 520				struct ptp_perout_request *req, int on,
 521				u64 *cmp)
 522{
 523	struct prueth_emac *emac = clockops_data;
 524	u32 reduction_factor = 0, offset = 0;
 525	struct timespec64 ts;
 526	u64 current_cycle;
 527	u64 start_offset;
 528	u64 ns_period;
 529
 530	if (!on)
 531		return 0;
 532
 533	/* Any firmware specific stuff for PPS/PEROUT handling */
 534	ts.tv_sec = req->period.sec;
 535	ts.tv_nsec = req->period.nsec;
 536	ns_period = timespec64_to_ns(&ts);
 537
 538	/* f/w doesn't support period less than cycle time */
 539	if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS)
 540		return -ENXIO;
 541
 542	reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS;
 543	offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS;
 544
 545	/* f/w requires at least 1uS within a cycle so CMP
 546	 * can trigger after SYNC is enabled
 547	 */
 548	if (offset < 5 * NSEC_PER_USEC)
 549		offset = 5 * NSEC_PER_USEC;
 550
 551	/* if offset is close to cycle time then we will miss
 552	 * the CMP event for last tick when IEP rolls over.
 553	 * In normal mode, IEP tick is 4ns.
 554	 * In slow compensation it could be 0ns or 8ns at
 555	 * every slow compensation cycle.
 556	 */
 557	if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8)
 558		offset = IEP_DEFAULT_CYCLE_TIME_NS - 8;
 559
 560	/* we're in shadow mode so need to set upper 32-bits */
 561	*cmp = (u64)offset << 32;
 562
 563	writel(reduction_factor, emac->prueth->shram.va +
 564		TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET);
 565
 566	current_cycle = icssg_read_time(emac->prueth->shram.va +
 567					TIMESYNC_FW_WC_CYCLECOUNT_OFFSET);
 568
 569	/* Rounding of current_cycle count to next second */
 570	start_offset = roundup(current_cycle, MSEC_PER_SEC);
 571
 572	hi_lo_writeq(start_offset, emac->prueth->shram.va +
 573		     TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET);
 574
 575	return 0;
 576}
 577
 578const struct icss_iep_clockops prueth_iep_clockops = {
 579	.settime = prueth_iep_settime,
 580	.gettime = prueth_iep_gettime,
 581	.perout_enable = prueth_perout_enable,
 582};
 583
 584static void prueth_destroy_xdp_rxqs(struct prueth_emac *emac)
 585{
 586	struct xdp_rxq_info *rxq = &emac->rx_chns.xdp_rxq;
 587
 588	if (xdp_rxq_info_is_reg(rxq))
 589		xdp_rxq_info_unreg(rxq);
 590}
 591
 592static int prueth_create_xdp_rxqs(struct prueth_emac *emac)
 593{
 594	struct xdp_rxq_info *rxq = &emac->rx_chns.xdp_rxq;
 595	struct page_pool *pool = emac->rx_chns.pg_pool;
 596	struct prueth_rx_chn *rx_chn = &emac->rx_chns;
 597	int ret;
 598
 599	ret = xdp_rxq_info_reg(rxq, emac->ndev, 0, emac->napi_rx.napi_id);
 600	if (ret)
 601		return ret;
 602
 603	if (rx_chn->xsk_pool) {
 604		ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_XSK_BUFF_POOL, NULL);
 605		if (ret)
 606			goto xdp_unreg;
 607		xsk_pool_set_rxq_info(rx_chn->xsk_pool, rxq);
 608	} else {
 609		ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_PAGE_POOL, pool);
 610		if (ret)
 611			goto xdp_unreg;
 612	}
 613
 614	return 0;
 615
 616xdp_unreg:
 617	prueth_destroy_xdp_rxqs(emac);
 618	return ret;
 619}
 620
 621static int icssg_prueth_add_mcast(struct net_device *ndev, const u8 *addr)
 622{
 623	struct net_device *real_dev;
 624	struct prueth_emac *emac;
 625	int port_mask;
 626	u8 vlan_id;
 627
 628	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_MAC;
 629	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;
 630	emac = netdev_priv(real_dev);
 631
 632	port_mask = BIT(emac->port_id) | icssg_fdb_lookup(emac, addr, vlan_id);
 633	icssg_fdb_add_del(emac, addr, vlan_id, port_mask, true);
 634	icssg_vtbl_modify(emac, vlan_id, port_mask, port_mask, true);
 635
 636	return 0;
 637}
 638
 639static int icssg_prueth_del_mcast(struct net_device *ndev, const u8 *addr)
 640{
 641	struct net_device *real_dev;
 642	struct prueth_emac *emac;
 643	int other_port_mask;
 644	int port_mask;
 645	u8 vlan_id;
 646
 647	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_MAC;
 648	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;
 649	emac = netdev_priv(real_dev);
 650
 651	port_mask = BIT(emac->port_id);
 652	other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, vlan_id);
 653
 654	icssg_fdb_add_del(emac, addr, vlan_id, port_mask, false);
 655	icssg_vtbl_modify(emac, vlan_id, port_mask, port_mask, false);
 656
 657	if (other_port_mask) {
 658		icssg_fdb_add_del(emac, addr, vlan_id, other_port_mask, true);
 659		icssg_vtbl_modify(emac, vlan_id, other_port_mask,
 660				  other_port_mask, true);
 661	}
 662
 663	return 0;
 664}
 665
 666static void icssg_prueth_hsr_fdb_add_del(struct prueth_emac *emac,
 667					 const u8 *addr, u8 vid, bool add)
 668{
 669	icssg_fdb_add_del(emac, addr, vid,
 670			  ICSSG_FDB_ENTRY_P0_MEMBERSHIP |
 671			  ICSSG_FDB_ENTRY_P1_MEMBERSHIP |
 672			  ICSSG_FDB_ENTRY_P2_MEMBERSHIP |
 673			  ICSSG_FDB_ENTRY_BLOCK, add);
 674
 675	if (add)
 676		icssg_vtbl_modify(emac, vid, BIT(emac->port_id),
 677				  BIT(emac->port_id), add);
 678}
 679
 680static int icssg_prueth_hsr_add_mcast(struct net_device *ndev, const u8 *addr)
 681{
 682	struct net_device *real_dev, *port_dev;
 683	struct prueth_emac *emac;
 684	u8 vlan_id, i;
 685
 686	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_HSR;
 687	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;
 688
 689	if (is_hsr_master(real_dev)) {
 690		for (i = HSR_PT_SLAVE_A; i < HSR_PT_INTERLINK; i++) {
 691			port_dev = hsr_get_port_ndev(real_dev, i);
 692			emac = netdev_priv(port_dev);
 693			if (!emac) {
 694				dev_put(port_dev);
 695				return -EINVAL;
 696			}
 697			icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
 698						     true);
 699			dev_put(port_dev);
 700		}
 701	} else {
 702		emac = netdev_priv(real_dev);
 703		icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id, true);
 704	}
 705
 706	return 0;
 707}
 708
 709static int icssg_prueth_hsr_del_mcast(struct net_device *ndev, const u8 *addr)
 710{
 711	struct net_device *real_dev, *port_dev;
 712	struct prueth_emac *emac;
 713	u8 vlan_id, i;
 714
 715	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_HSR;
 716	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;
 717
 718	if (is_hsr_master(real_dev)) {
 719		for (i = HSR_PT_SLAVE_A; i < HSR_PT_INTERLINK; i++) {
 720			port_dev = hsr_get_port_ndev(real_dev, i);
 721			emac = netdev_priv(port_dev);
 722			if (!emac) {
 723				dev_put(port_dev);
 724				return -EINVAL;
 725			}
 726			icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
 727						     false);
 728			dev_put(port_dev);
 729		}
 730	} else {
 731		emac = netdev_priv(real_dev);
 732		icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id, false);
 733	}
 734
 735	return 0;
 736}
 737
 738static int icssg_update_vlan_mcast(struct net_device *vdev, int vid,
 739				   void *args)
 740{
 741	struct prueth_emac *emac = args;
 742
 743	if (!vdev || !vid)
 744		return 0;
 745
 746	netif_addr_lock_bh(vdev);
 747	__hw_addr_sync_multiple(&emac->vlan_mcast_list[vid], &vdev->mc,
 748				vdev->addr_len);
 749	netif_addr_unlock_bh(vdev);
 750
 751	if (emac->prueth->is_hsr_offload_mode)
 752		__hw_addr_sync_dev(&emac->vlan_mcast_list[vid], vdev,
 753				   icssg_prueth_hsr_add_mcast,
 754				   icssg_prueth_hsr_del_mcast);
 755	else
 756		__hw_addr_sync_dev(&emac->vlan_mcast_list[vid], vdev,
 757				   icssg_prueth_add_mcast,
 758				   icssg_prueth_del_mcast);
 759
 760	return 0;
 761}
 762
 763static void prueth_set_xsk_pool(struct prueth_emac *emac, u16 queue_id)
 764{
 765	struct prueth_tx_chn *tx_chn = &emac->tx_chns[queue_id];
 766	struct prueth_rx_chn *rx_chn = &emac->rx_chns;
 767
 768	if (emac->xsk_qid != queue_id) {
 769		rx_chn->xsk_pool = NULL;
 770		tx_chn->xsk_pool = NULL;
 771	} else {
 772		rx_chn->xsk_pool = xsk_get_pool_from_qid(emac->ndev, queue_id);
 773		tx_chn->xsk_pool = xsk_get_pool_from_qid(emac->ndev, queue_id);
 774	}
 775}
 776
 777static void prueth_destroy_txq(struct prueth_emac *emac)
 778{
 779	int ret, i;
 780
 781	atomic_set(&emac->tdown_cnt, emac->tx_ch_num);
 782	/* ensure new tdown_cnt value is visible */
 783	smp_mb__after_atomic();
 784	/* tear down and disable UDMA channels */
 785	reinit_completion(&emac->tdown_complete);
 786	for (i = 0; i < emac->tx_ch_num; i++)
 787		k3_udma_glue_tdown_tx_chn(emac->tx_chns[i].tx_chn, false);
 788
 789	ret = wait_for_completion_timeout(&emac->tdown_complete,
 790					  msecs_to_jiffies(1000));
 791	if (!ret)
 792		netdev_err(emac->ndev, "tx teardown timeout\n");
 793
 794	for (i = 0; i < emac->tx_ch_num; i++) {
 795		napi_disable(&emac->tx_chns[i].napi_tx);
 796		hrtimer_cancel(&emac->tx_chns[i].tx_hrtimer);
 797		k3_udma_glue_reset_tx_chn(emac->tx_chns[i].tx_chn,
 798					  &emac->tx_chns[i],
 799					  prueth_tx_cleanup);
 800		k3_udma_glue_disable_tx_chn(emac->tx_chns[i].tx_chn);
 801	}
 802}
 803
 804static void prueth_destroy_rxq(struct prueth_emac *emac)
 805{
 806	int i, ret;
 807
 808	/* tear down and disable UDMA channels */
 809	reinit_completion(&emac->tdown_complete);
 810	k3_udma_glue_tdown_rx_chn(emac->rx_chns.rx_chn, true);
 811
 812	/* When RX DMA Channel Teardown is initiated, it will result in an
 813	 * interrupt and a Teardown Completion Marker (TDCM) is queued into
 814	 * the RX Completion queue. Acknowledging the interrupt involves
 815	 * popping the TDCM descriptor from the RX Completion queue via the
 816	 * RX NAPI Handler. To avoid timing out when waiting for the TDCM to
 817	 * be popped, schedule the RX NAPI handler to run immediately.
 818	 */
 819	if (!napi_if_scheduled_mark_missed(&emac->napi_rx)) {
 820		if (napi_schedule_prep(&emac->napi_rx))
 821			__napi_schedule(&emac->napi_rx);
 822	}
 823
 824	ret = wait_for_completion_timeout(&emac->tdown_complete,
 825					  msecs_to_jiffies(1000));
 826	if (!ret)
 827		netdev_err(emac->ndev, "rx teardown timeout\n");
 828
 829	for (i = 0; i < PRUETH_MAX_RX_FLOWS; i++) {
 830		napi_disable(&emac->napi_rx);
 831		hrtimer_cancel(&emac->rx_hrtimer);
 832		k3_udma_glue_reset_rx_chn(emac->rx_chns.rx_chn, i,
 833					  &emac->rx_chns,
 834					  prueth_rx_cleanup);
 835	}
 836
 837	prueth_destroy_xdp_rxqs(emac);
 838	k3_udma_glue_disable_rx_chn(emac->rx_chns.rx_chn);
 839}
 840
 841static int prueth_create_txq(struct prueth_emac *emac)
 842{
 843	int ret, i;
 844
 845	for (i = 0; i < emac->tx_ch_num; i++) {
 846		ret = k3_udma_glue_enable_tx_chn(emac->tx_chns[i].tx_chn);
 847		if (ret)
 848			goto reset_tx_chan;
 849		napi_enable(&emac->tx_chns[i].napi_tx);
 850	}
 851	return 0;
 852
 853reset_tx_chan:
 854	/* Since interface is not yet up, there is wouldn't be
 855	 * any SKB for completion. So set false to free_skb
 856	 */
 857	prueth_reset_tx_chan(emac, i, false);
 858	return ret;
 859}
 860
 861static int prueth_create_rxq(struct prueth_emac *emac)
 862{
 863	int ret;
 864
 865	ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE);
 866	if (ret)
 867		return ret;
 868
 869	ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn);
 870	if (ret)
 871		goto reset_rx_chn;
 872
 873	ret = prueth_create_xdp_rxqs(emac);
 874	if (ret)
 875		goto reset_rx_chn;
 876
 877	napi_enable(&emac->napi_rx);
 878	return 0;
 879
 880reset_rx_chn:
 881	prueth_reset_rx_chan(&emac->rx_chns, PRUETH_MAX_RX_FLOWS, false);
 882	return ret;
 883}
 884
 885/**
 886 * emac_ndo_open - EMAC device open
 887 * @ndev: network adapter device
 888 *
 889 * Called when system wants to start the interface.
 890 *
 891 * Return: 0 for a successful open, or appropriate error code
 892 */
 893static int emac_ndo_open(struct net_device *ndev)
 894{
 895	struct prueth_emac *emac = netdev_priv(ndev);
 896	int ret, num_data_chn = emac->tx_ch_num;
 897	struct icssg_flow_cfg __iomem *flow_cfg;
 898	struct prueth *prueth = emac->prueth;
 899	int slice = prueth_emac_slice(emac);
 900	struct device *dev = prueth->dev;
 901	int max_rx_flows;
 902	int rx_flow;
 903
 904	/* set h/w MAC as user might have re-configured */
 905	ether_addr_copy(emac->mac_addr, ndev->dev_addr);
 906
 907	icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);
 908	icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);
 909
 910	/* Notify the stack of the actual queue counts. */
 911	ret = netif_set_real_num_tx_queues(ndev, num_data_chn);
 912	if (ret) {
 913		dev_err(dev, "cannot set real number of tx queues\n");
 914		return ret;
 915	}
 916
 917	emac->xsk_qid = -EINVAL;
 918	init_completion(&emac->cmd_complete);
 919	ret = prueth_init_tx_chns(emac);
 920	if (ret) {
 921		dev_err(dev, "failed to init tx channel: %d\n", ret);
 922		return ret;
 923	}
 924
 925	max_rx_flows = PRUETH_MAX_RX_FLOWS;
 926	ret = prueth_init_rx_chns(emac, &emac->rx_chns, "rx",
 927				  max_rx_flows, PRUETH_MAX_RX_DESC);
 928	if (ret) {
 929		dev_err(dev, "failed to init rx channel: %d\n", ret);
 930		goto cleanup_tx;
 931	}
 932
 933	ret = prueth_ndev_add_tx_napi(emac);
 934	if (ret)
 935		goto cleanup_rx;
 936
 937	/* we use only the highest priority flow for now i.e. @irq[3] */
 938	rx_flow = PRUETH_RX_FLOW_DATA;
 939	ret = request_irq(emac->rx_chns.irq[rx_flow], prueth_rx_irq,
 940			  IRQF_TRIGGER_HIGH, dev_name(dev), emac);
 941	if (ret) {
 942		dev_err(dev, "unable to request RX IRQ\n");
 943		goto cleanup_napi;
 944	}
 945
 946	if (!prueth->emacs_initialized) {
 947		ret = prueth_emac_common_start(prueth);
 948		if (ret)
 949			goto free_rx_irq;
 950		icssg_enable_fw_offload(prueth);
 951	}
 952
 953	flow_cfg = emac->dram.va + ICSSG_CONFIG_OFFSET + PSI_L_REGULAR_FLOW_ID_BASE_OFFSET;
 954	writew(emac->rx_flow_id_base, &flow_cfg->rx_base_flow);
 955	ret = emac_fdb_flow_id_updated(emac);
 956
 957	if (ret) {
 958		netdev_err(ndev, "Failed to update Rx Flow ID %d", ret);
 959		goto stop;
 960	}
 961
 962	icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu);
 963
 964	ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq,
 965				   IRQF_ONESHOT, dev_name(dev), emac);
 966	if (ret)
 967		goto stop;
 968
 969	/* Prepare RX */
 970	ret = prueth_create_rxq(emac);
 971	if (ret)
 972		goto free_tx_ts_irq;
 973
 974	ret = prueth_create_txq(emac);
 975	if (ret)
 976		goto destroy_rxq;
 977
 978	/* start PHY */
 979	phy_start(ndev->phydev);
 980
 981	prueth->emacs_initialized++;
 982
 983	queue_work(system_long_wq, &emac->stats_work.work);
 984
 985	return 0;
 986
 987destroy_rxq:
 988	prueth_destroy_rxq(emac);
 989free_tx_ts_irq:
 990	free_irq(emac->tx_ts_irq, emac);
 991stop:
 992	if (!prueth->emacs_initialized)
 993		prueth_emac_common_stop(prueth);
 994free_rx_irq:
 995	free_irq(emac->rx_chns.irq[rx_flow], emac);
 996cleanup_napi:
 997	prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
 998cleanup_rx:
 999	prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows);
1000cleanup_tx:
1001	prueth_cleanup_tx_chns(emac);
1002
1003	return ret;
1004}
1005
1006/**
1007 * emac_ndo_stop - EMAC device stop
1008 * @ndev: network adapter device
1009 *
1010 * Called when system wants to stop or down the interface.
1011 *
1012 * Return: Always 0 (Success)
1013 */
1014static int emac_ndo_stop(struct net_device *ndev)
1015{
1016	struct prueth_emac *emac = netdev_priv(ndev);
1017	struct prueth *prueth = emac->prueth;
1018
1019	/* inform the upper layers. */
1020	netif_tx_stop_all_queues(ndev);
1021
1022	/* block packets from wire */
1023	if (ndev->phydev)
1024		phy_stop(ndev->phydev);
1025
1026	if (emac->prueth->is_hsr_offload_mode)
1027		__dev_mc_unsync(ndev, icssg_prueth_hsr_del_mcast);
1028	else
1029		__dev_mc_unsync(ndev, icssg_prueth_del_mcast);
1030
1031	prueth_destroy_txq(emac);
1032	prueth_destroy_rxq(emac);
1033
1034	cancel_work_sync(&emac->rx_mode_work);
1035
1036	/* Destroying the queued work in ndo_stop() */
1037	cancel_delayed_work_sync(&emac->stats_work);
1038
1039	/* stop PRUs */
1040	if (prueth->emacs_initialized == 1)
1041		prueth_emac_common_stop(prueth);
1042
1043	free_irq(emac->tx_ts_irq, emac);
1044
1045	free_irq(emac->rx_chns.irq[PRUETH_RX_FLOW_DATA], emac);
1046	prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
1047
1048	prueth_cleanup_rx_chns(emac, &emac->rx_chns, PRUETH_MAX_RX_FLOWS);
1049	prueth_cleanup_tx_chns(emac);
1050
1051	prueth->emacs_initialized--;
1052
1053	return 0;
1054}
1055
1056static void emac_ndo_set_rx_mode_work(struct work_struct *work)
1057{
1058	struct prueth_emac *emac = container_of(work, struct prueth_emac, rx_mode_work);
1059	struct net_device *ndev = emac->ndev;
1060	bool promisc, allmulti;
1061
1062	if (!netif_running(ndev))
1063		return;
1064
1065	promisc = ndev->flags & IFF_PROMISC;
1066	allmulti = ndev->flags & IFF_ALLMULTI;
1067	icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_DISABLE);
1068	icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_DISABLE);
1069
1070	if (promisc) {
1071		icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_ENABLE);
1072		icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE);
1073		return;
1074	}
1075
1076	if (allmulti) {
1077		icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE);
1078		return;
1079	}
1080
1081	if (emac->prueth->is_hsr_offload_mode) {
1082		__dev_mc_sync(ndev, icssg_prueth_hsr_add_mcast,
1083			      icssg_prueth_hsr_del_mcast);
1084		if (rtnl_trylock()) {
1085			vlan_for_each(emac->prueth->hsr_dev,
1086				      icssg_update_vlan_mcast, emac);
1087			rtnl_unlock();
1088		}
1089	} else {
1090		__dev_mc_sync(ndev, icssg_prueth_add_mcast,
1091			      icssg_prueth_del_mcast);
1092		if (rtnl_trylock()) {
1093			vlan_for_each(ndev, icssg_update_vlan_mcast, emac);
1094			rtnl_unlock();
1095		}
1096	}
1097}
1098
1099/**
1100 * emac_ndo_set_rx_mode - EMAC set receive mode function
1101 * @ndev: The EMAC network adapter
1102 *
1103 * Called when system wants to set the receive mode of the device.
1104 *
1105 */
1106static void emac_ndo_set_rx_mode(struct net_device *ndev)
1107{
1108	struct prueth_emac *emac = netdev_priv(ndev);
1109
1110	queue_work(emac->cmd_wq, &emac->rx_mode_work);
1111}
1112
1113static netdev_features_t emac_ndo_fix_features(struct net_device *ndev,
1114					       netdev_features_t features)
1115{
1116	/* hsr tag insertion offload and hsr dup offload are tightly coupled in
1117	 * firmware implementation. Both these features need to be enabled /
1118	 * disabled together.
1119	 */
1120	if (!(ndev->features & (NETIF_F_HW_HSR_DUP | NETIF_F_HW_HSR_TAG_INS)))
1121		if ((features & NETIF_F_HW_HSR_DUP) ||
1122		    (features & NETIF_F_HW_HSR_TAG_INS))
1123			features |= NETIF_F_HW_HSR_DUP |
1124				    NETIF_F_HW_HSR_TAG_INS;
1125
1126	if ((ndev->features & NETIF_F_HW_HSR_DUP) ||
1127	    (ndev->features & NETIF_F_HW_HSR_TAG_INS))
1128		if (!(features & NETIF_F_HW_HSR_DUP) ||
1129		    !(features & NETIF_F_HW_HSR_TAG_INS))
1130			features &= ~(NETIF_F_HW_HSR_DUP |
1131				      NETIF_F_HW_HSR_TAG_INS);
1132
1133	return features;
1134}
1135
1136static int emac_ndo_vlan_rx_add_vid(struct net_device *ndev,
1137				    __be16 proto, u16 vid)
1138{
1139	struct prueth_emac *emac = netdev_priv(ndev);
1140	struct prueth *prueth = emac->prueth;
1141	int port_mask = BIT(emac->port_id);
1142	int untag_mask = 0;
1143
1144	if (prueth->is_hsr_offload_mode)
1145		port_mask |= BIT(PRUETH_PORT_HOST);
1146
1147	__hw_addr_init(&emac->vlan_mcast_list[vid]);
1148	netdev_dbg(emac->ndev, "VID add vid:%u port_mask:%X untag_mask %X\n",
1149		   vid, port_mask, untag_mask);
1150
1151	icssg_vtbl_modify(emac, vid, port_mask, untag_mask, true);
1152	icssg_set_pvid(emac->prueth, vid, emac->port_id);
1153
1154	return 0;
1155}
1156
1157static int emac_ndo_vlan_rx_del_vid(struct net_device *ndev,
1158				    __be16 proto, u16 vid)
1159{
1160	struct prueth_emac *emac = netdev_priv(ndev);
1161	struct prueth *prueth = emac->prueth;
1162	int port_mask = BIT(emac->port_id);
1163	int untag_mask = 0;
1164
1165	if (prueth->is_hsr_offload_mode)
1166		port_mask = BIT(PRUETH_PORT_HOST);
1167
1168	netdev_dbg(emac->ndev, "VID del vid:%u port_mask:%X untag_mask  %X\n",
1169		   vid, port_mask, untag_mask);
1170	icssg_vtbl_modify(emac, vid, port_mask, untag_mask, false);
1171
1172	return 0;
1173}
1174
1175/**
1176 * emac_xdp_xmit - Implements ndo_xdp_xmit
1177 * @dev: netdev
1178 * @n: number of frames
1179 * @frames: array of XDP buffer pointers
1180 * @flags: XDP extra info
1181 *
1182 * Return: number of frames successfully sent. Failed frames
1183 * will be free'ed by XDP core.
1184 *
1185 * For error cases, a negative errno code is returned and no-frames
1186 * are transmitted (caller must handle freeing frames).
1187 **/
1188static int emac_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
1189			 u32 flags)
1190{
1191	struct prueth_emac *emac = netdev_priv(dev);
1192	struct net_device *ndev = emac->ndev;
1193	struct netdev_queue *netif_txq;
1194	int cpu = smp_processor_id();
1195	struct xdp_frame *xdpf;
1196	unsigned int q_idx;
1197	int nxmit = 0;
1198	u32 err;
1199	int i;
1200
1201	q_idx = cpu % emac->tx_ch_num;
1202	netif_txq = netdev_get_tx_queue(ndev, q_idx);
1203
1204	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
1205		return -EINVAL;
1206
1207	__netif_tx_lock(netif_txq, cpu);
1208	for (i = 0; i < n; i++) {
1209		xdpf = frames[i];
1210		err = emac_xmit_xdp_frame(emac, xdpf, q_idx,
1211					  PRUETH_TX_BUFF_TYPE_XDP_NDO);
1212		if (err != ICSSG_XDP_TX) {
1213			ndev->stats.tx_dropped++;
1214			break;
1215		}
1216		nxmit++;
1217	}
1218	__netif_tx_unlock(netif_txq);
1219
1220	return nxmit;
1221}
1222
1223/**
1224 * emac_xdp_setup - add/remove an XDP program
1225 * @emac: emac device
1226 * @bpf: XDP program
1227 *
1228 * Return: Always 0 (Success)
1229 **/
1230static int emac_xdp_setup(struct prueth_emac *emac, struct netdev_bpf *bpf)
1231{
1232	struct bpf_prog *prog = bpf->prog;
1233
1234	if (!emac->xdpi.prog && !prog)
1235		return 0;
1236
1237	WRITE_ONCE(emac->xdp_prog, prog);
1238
1239	xdp_attachment_setup(&emac->xdpi, bpf);
1240
1241	return 0;
1242}
1243
1244static int prueth_xsk_pool_enable(struct prueth_emac *emac,
1245				  struct xsk_buff_pool *pool, u16 queue_id)
1246{
1247	struct prueth_rx_chn *rx_chn = &emac->rx_chns;
1248	u32 frame_size;
1249	int ret;
1250
1251	if (queue_id >= PRUETH_MAX_RX_FLOWS ||
1252	    queue_id >= emac->tx_ch_num) {
1253		netdev_err(emac->ndev, "Invalid XSK queue ID %d\n", queue_id);
1254		return -EINVAL;
1255	}
1256
1257	frame_size = xsk_pool_get_rx_frame_size(pool);
1258	if (frame_size < PRUETH_MAX_PKT_SIZE)
1259		return -EOPNOTSUPP;
1260
1261	ret = xsk_pool_dma_map(pool, rx_chn->dma_dev, PRUETH_RX_DMA_ATTR);
1262	if (ret) {
1263		netdev_err(emac->ndev, "Failed to map XSK pool: %d\n", ret);
1264		return ret;
1265	}
1266
1267	if (netif_running(emac->ndev)) {
1268		/* stop packets from wire for graceful teardown */
1269		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
1270		if (ret)
1271			return ret;
1272		prueth_destroy_rxq(emac);
1273	}
1274
1275	emac->xsk_qid = queue_id;
1276	prueth_set_xsk_pool(emac, queue_id);
1277
1278	if (netif_running(emac->ndev)) {
1279		ret = prueth_create_rxq(emac);
1280		if (ret) {
1281			netdev_err(emac->ndev, "Failed to create RX queue: %d\n", ret);
1282			return ret;
1283		}
1284		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
1285		if (ret) {
1286			prueth_destroy_rxq(emac);
1287			return ret;
1288		}
1289		ret = prueth_xsk_wakeup(emac->ndev, queue_id, XDP_WAKEUP_RX);
1290		if (ret)
1291			return ret;
1292	}
1293
1294	return 0;
1295}
1296
1297static int prueth_xsk_pool_disable(struct prueth_emac *emac, u16 queue_id)
1298{
1299	struct xsk_buff_pool *pool;
1300	int ret;
1301
1302	if (queue_id >= PRUETH_MAX_RX_FLOWS ||
1303	    queue_id >= emac->tx_ch_num) {
1304		netdev_err(emac->ndev, "Invalid XSK queue ID %d\n", queue_id);
1305		return -EINVAL;
1306	}
1307
1308	if (emac->xsk_qid != queue_id) {
1309		netdev_err(emac->ndev, "XSK queue ID %d not registered\n", queue_id);
1310		return -EINVAL;
1311	}
1312
1313	pool = xsk_get_pool_from_qid(emac->ndev, queue_id);
1314	if (!pool) {
1315		netdev_err(emac->ndev, "No XSK pool registered for queue %d\n", queue_id);
1316		return -EINVAL;
1317	}
1318
1319	if (netif_running(emac->ndev)) {
1320		/* stop packets from wire for graceful teardown */
1321		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
1322		if (ret)
1323			return ret;
1324		prueth_destroy_rxq(emac);
1325	}
1326
1327	xsk_pool_dma_unmap(pool, PRUETH_RX_DMA_ATTR);
1328	emac->xsk_qid = -EINVAL;
1329	prueth_set_xsk_pool(emac, queue_id);
1330
1331	if (netif_running(emac->ndev)) {
1332		ret = prueth_create_rxq(emac);
1333		if (ret) {
1334			netdev_err(emac->ndev, "Failed to create RX queue: %d\n", ret);
1335			return ret;
1336		}
1337		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
1338		if (ret) {
1339			prueth_destroy_rxq(emac);
1340			return ret;
1341		}
1342	}
1343
1344	return 0;
1345}
1346
1347/**
1348 * emac_ndo_bpf - implements ndo_bpf for icssg_prueth
1349 * @ndev: network adapter device
1350 * @bpf: XDP program
1351 *
1352 * Return: 0 on success, error code on failure.
1353 **/
1354static int emac_ndo_bpf(struct net_device *ndev, struct netdev_bpf *bpf)
1355{
1356	struct prueth_emac *emac = netdev_priv(ndev);
1357
1358	switch (bpf->command) {
1359	case XDP_SETUP_PROG:
1360		return emac_xdp_setup(emac, bpf);
1361	case XDP_SETUP_XSK_POOL:
1362		return bpf->xsk.pool ?
1363			prueth_xsk_pool_enable(emac, bpf->xsk.pool, bpf->xsk.queue_id) :
1364			prueth_xsk_pool_disable(emac, bpf->xsk.queue_id);
1365	default:
1366		return -EINVAL;
1367	}
1368}
1369
1370int prueth_xsk_wakeup(struct net_device *ndev, u32 qid, u32 flags)
1371{
1372	struct prueth_emac *emac = netdev_priv(ndev);
1373	struct prueth_tx_chn *tx_chn = &emac->tx_chns[qid];
1374	struct prueth_rx_chn *rx_chn = &emac->rx_chns;
1375
1376	if (emac->xsk_qid != qid) {
1377		netdev_err(ndev, "XSK queue %d not registered\n", qid);
1378		return -EINVAL;
1379	}
1380
1381	if (qid >= PRUETH_MAX_RX_FLOWS || qid >= emac->tx_ch_num) {
1382		netdev_err(ndev, "Invalid XSK queue ID %d\n", qid);
1383		return -EINVAL;
1384	}
1385
1386	if (!tx_chn->xsk_pool) {
1387		netdev_err(ndev, "XSK pool not registered for queue %d\n", qid);
1388		return -EINVAL;
1389	}
1390
1391	if (!rx_chn->xsk_pool) {
1392		netdev_err(ndev, "XSK pool not registered for RX queue %d\n", qid);
1393		return -EINVAL;
1394	}
1395
1396	if (flags & XDP_WAKEUP_TX) {
1397		if (!napi_if_scheduled_mark_missed(&tx_chn->napi_tx)) {
1398			if (likely(napi_schedule_prep(&tx_chn->napi_tx)))
1399				__napi_schedule(&tx_chn->napi_tx);
1400		}
1401	}
1402
1403	if (flags & XDP_WAKEUP_RX) {
1404		if (!napi_if_scheduled_mark_missed(&emac->napi_rx)) {
1405			if (likely(napi_schedule_prep(&emac->napi_rx)))
1406				__napi_schedule(&emac->napi_rx);
1407		}
1408	}
1409
1410	return 0;
1411}
1412
1413static const struct net_device_ops emac_netdev_ops = {
1414	.ndo_open = emac_ndo_open,
1415	.ndo_stop = emac_ndo_stop,
1416	.ndo_start_xmit = icssg_ndo_start_xmit,
1417	.ndo_set_mac_address = eth_mac_addr,
1418	.ndo_validate_addr = eth_validate_addr,
1419	.ndo_tx_timeout = icssg_ndo_tx_timeout,
1420	.ndo_set_rx_mode = emac_ndo_set_rx_mode,
1421	.ndo_eth_ioctl = phy_do_ioctl,
1422	.ndo_get_stats64 = icssg_ndo_get_stats64,
1423	.ndo_get_phys_port_name = icssg_ndo_get_phys_port_name,
1424	.ndo_fix_features = emac_ndo_fix_features,
1425	.ndo_vlan_rx_add_vid = emac_ndo_vlan_rx_add_vid,
1426	.ndo_vlan_rx_kill_vid = emac_ndo_vlan_rx_del_vid,
1427	.ndo_bpf = emac_ndo_bpf,
1428	.ndo_xdp_xmit = emac_xdp_xmit,
1429	.ndo_hwtstamp_get = icssg_ndo_get_ts_config,
1430	.ndo_hwtstamp_set = icssg_ndo_set_ts_config,
1431	.ndo_xsk_wakeup = prueth_xsk_wakeup,
1432};
1433
1434static int prueth_netdev_init(struct prueth *prueth,
1435			      struct device_node *eth_node)
1436{
1437	int ret, num_tx_chn = PRUETH_MAX_TX_QUEUES;
1438	struct prueth_emac *emac;
1439	struct net_device *ndev;
1440	enum prueth_port port;
1441	const char *irq_name;
1442	enum prueth_mac mac;
1443
1444	port = prueth_node_port(eth_node);
1445	if (port == PRUETH_PORT_INVALID)
1446		return -EINVAL;
1447
1448	mac = prueth_node_mac(eth_node);
1449	if (mac == PRUETH_MAC_INVALID)
1450		return -EINVAL;
1451
1452	ndev = alloc_etherdev_mq(sizeof(*emac), num_tx_chn);
1453	if (!ndev)
1454		return -ENOMEM;
1455
1456	emac = netdev_priv(ndev);
1457	emac->prueth = prueth;
1458	emac->ndev = ndev;
1459	emac->port_id = port;
1460	emac->xdp_prog = NULL;
1461	emac->ndev->pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;
1462	emac->cmd_wq = create_singlethread_workqueue("icssg_cmd_wq");
1463	if (!emac->cmd_wq) {
1464		ret = -ENOMEM;
1465		goto free_ndev;
1466	}
1467	INIT_WORK(&emac->rx_mode_work, emac_ndo_set_rx_mode_work);
1468
1469	INIT_DELAYED_WORK(&emac->stats_work, icssg_stats_work_handler);
1470
1471	ret = pruss_request_mem_region(prueth->pruss,
1472				       port == PRUETH_PORT_MII0 ?
1473				       PRUSS_MEM_DRAM0 : PRUSS_MEM_DRAM1,
1474				       &emac->dram);
1475	if (ret) {
1476		dev_err(prueth->dev, "unable to get DRAM: %d\n", ret);
1477		ret = -ENOMEM;
1478		goto free_wq;
1479	}
1480
1481	emac->tx_ch_num = 1;
1482
1483	irq_name = "tx_ts0";
1484	if (emac->port_id == PRUETH_PORT_MII1)
1485		irq_name = "tx_ts1";
1486	emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name);
1487	if (emac->tx_ts_irq < 0) {
1488		ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n");
1489		goto free;
1490	}
1491
1492	SET_NETDEV_DEV(ndev, prueth->dev);
1493	spin_lock_init(&emac->lock);
1494	mutex_init(&emac->cmd_lock);
1495
1496	emac->phy_node = of_parse_phandle(eth_node, "phy-handle", 0);
1497	if (!emac->phy_node && !of_phy_is_fixed_link(eth_node)) {
1498		dev_err(prueth->dev, "couldn't find phy-handle\n");
1499		ret = -ENODEV;
1500		goto free;
1501	} else if (of_phy_is_fixed_link(eth_node)) {
1502		ret = of_phy_register_fixed_link(eth_node);
1503		if (ret) {
1504			dev_err_probe(prueth->dev, ret, "failed to register fixed-link phy\n");
1505			goto free;
1506		}
1507
1508		emac->phy_node = eth_node;
1509	}
1510
1511	ret = of_get_phy_mode(eth_node, &emac->phy_if);
1512	if (ret) {
1513		dev_err(prueth->dev, "could not get phy-mode property\n");
1514		goto free;
1515	}
1516
1517	if (emac->phy_if != PHY_INTERFACE_MODE_MII &&
1518	    !phy_interface_mode_is_rgmii(emac->phy_if)) {
1519		dev_err(prueth->dev, "PHY mode unsupported %s\n", phy_modes(emac->phy_if));
1520		ret = -EINVAL;
1521		goto free;
1522	}
1523
1524	/* AM65 SR2.0 has TX Internal delay always enabled by hardware
1525	 * and it is not possible to disable TX Internal delay. The below
1526	 * switch case block describes how we handle different phy modes
1527	 * based on hardware restriction.
1528	 */
1529	switch (emac->phy_if) {
1530	case PHY_INTERFACE_MODE_RGMII_ID:
1531		emac->phy_if = PHY_INTERFACE_MODE_RGMII_RXID;
1532		break;
1533	case PHY_INTERFACE_MODE_RGMII_TXID:
1534		emac->phy_if = PHY_INTERFACE_MODE_RGMII;
1535		break;
1536	case PHY_INTERFACE_MODE_RGMII:
1537	case PHY_INTERFACE_MODE_RGMII_RXID:
1538		dev_err(prueth->dev, "RGMII mode without TX delay is not supported");
1539		ret = -EINVAL;
1540		goto free;
1541	default:
1542		break;
1543	}
1544
1545	/* get mac address from DT and set private and netdev addr */
1546	ret = of_get_ethdev_address(eth_node, ndev);
1547	if (!is_valid_ether_addr(ndev->dev_addr)) {
1548		eth_hw_addr_random(ndev);
1549		dev_warn(prueth->dev, "port %d: using random MAC addr: %pM\n",
1550			 port, ndev->dev_addr);
1551	}
1552	ether_addr_copy(emac->mac_addr, ndev->dev_addr);
1553
1554	ndev->dev.of_node = eth_node;
1555	ndev->min_mtu = PRUETH_MIN_PKT_SIZE;
1556	ndev->max_mtu = PRUETH_MAX_MTU;
1557	ndev->netdev_ops = &emac_netdev_ops;
1558	ndev->ethtool_ops = &icssg_ethtool_ops;
1559	ndev->hw_features = NETIF_F_SG;
1560	ndev->features = ndev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
1561	ndev->hw_features |= NETIF_PRUETH_HSR_OFFLOAD_FEATURES;
1562	xdp_set_features_flag(ndev,
1563			      NETDEV_XDP_ACT_BASIC |
1564			      NETDEV_XDP_ACT_REDIRECT |
1565			      NETDEV_XDP_ACT_NDO_XMIT |
1566			      NETDEV_XDP_ACT_XSK_ZEROCOPY);
1567
1568	netif_napi_add(ndev, &emac->napi_rx, icssg_napi_rx_poll);
1569	hrtimer_setup(&emac->rx_hrtimer, &emac_rx_timer_callback, CLOCK_MONOTONIC,
1570		      HRTIMER_MODE_REL_PINNED);
1571	prueth->emac[mac] = emac;
1572
1573	return 0;
1574
1575free:
1576	pruss_release_mem_region(prueth->pruss, &emac->dram);
1577free_wq:
1578	destroy_workqueue(emac->cmd_wq);
1579free_ndev:
1580	emac->ndev = NULL;
1581	prueth->emac[mac] = NULL;
1582	free_netdev(ndev);
1583
1584	return ret;
1585}
1586
1587bool prueth_dev_check(const struct net_device *ndev)
1588{
1589	if (ndev->netdev_ops == &emac_netdev_ops && netif_running(ndev)) {
1590		struct prueth_emac *emac = netdev_priv(ndev);
1591
1592		return emac->prueth->is_switch_mode;
1593	}
1594
1595	return false;
1596}
1597
1598static void prueth_offload_fwd_mark_update(struct prueth *prueth)
1599{
1600	int set_val = 0;
1601	int i;
1602
1603	if (prueth->br_members == (BIT(PRUETH_PORT_MII0) | BIT(PRUETH_PORT_MII1)))
1604		set_val = 1;
1605
1606	dev_dbg(prueth->dev, "set offload_fwd_mark %d\n", set_val);
1607
1608	for (i = PRUETH_MAC0; i < PRUETH_NUM_MACS; i++) {
1609		struct prueth_emac *emac = prueth->emac[i];
1610
1611		if (!emac || !emac->ndev)
1612			continue;
1613
1614		emac->offload_fwd_mark = set_val;
1615	}
1616}
1617
1618static int prueth_emac_restart(struct prueth *prueth)
1619{
1620	struct prueth_emac *emac0 = prueth->emac[PRUETH_MAC0];
1621	struct prueth_emac *emac1 = prueth->emac[PRUETH_MAC1];
1622	int ret;
1623
1624	/* Detach the net_device for both PRUeth ports*/
1625	if (netif_running(emac0->ndev))
1626		netif_device_detach(emac0->ndev);
1627	if (netif_running(emac1->ndev))
1628		netif_device_detach(emac1->ndev);
1629
1630	/* Disable both PRUeth ports */
1631	ret = icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE);
1632	ret |= icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE);
1633	if (ret)
1634		return ret;
1635
1636	/* Stop both pru cores for both PRUeth ports*/
1637	ret = prueth_emac_common_stop(prueth);
1638	if (ret) {
1639		dev_err(prueth->dev, "Failed to stop the firmwares");
1640		return ret;
1641	}
1642
1643	/* Start both pru cores for both PRUeth ports */
1644	ret = prueth_emac_common_start(prueth);
1645	if (ret) {
1646		dev_err(prueth->dev, "Failed to start the firmwares");
1647		return ret;
1648	}
1649
1650	/* Enable forwarding for both PRUeth ports */
1651	ret = icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD);
1652	ret |= icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD);
1653
1654	/* Attache net_device for both PRUeth ports */
1655	netif_device_attach(emac0->ndev);
1656	netif_device_attach(emac1->ndev);
1657
1658	return ret;
1659}
1660
1661static void icssg_change_mode(struct prueth *prueth)
1662{
1663	int ret;
1664
1665	ret = prueth_emac_restart(prueth);
1666	if (ret) {
1667		dev_err(prueth->dev, "Failed to restart the firmwares, aborting the process");
1668		return;
1669	}
1670
1671	icssg_enable_fw_offload(prueth);
1672}
1673
1674static int prueth_netdevice_port_link(struct net_device *ndev,
1675				      struct net_device *br_ndev,
1676				      struct netlink_ext_ack *extack)
1677{
1678	struct prueth_emac *emac = netdev_priv(ndev);
1679	struct prueth *prueth = emac->prueth;
1680	int err;
1681
1682	if (!prueth->br_members) {
1683		prueth->hw_bridge_dev = br_ndev;
1684	} else {
1685		/* This is adding the port to a second bridge, this is
1686		 * unsupported
1687		 */
1688		if (prueth->hw_bridge_dev != br_ndev)
1689			return -EOPNOTSUPP;
1690	}
1691
1692	err = switchdev_bridge_port_offload(br_ndev, ndev, emac,
1693					    &prueth->prueth_switchdev_nb,
1694					    &prueth->prueth_switchdev_bl_nb,
1695					    false, extack);
1696	if (err)
1697		return err;
1698
1699	prueth->br_members |= BIT(emac->port_id);
1700
1701	if (!prueth->is_switch_mode) {
1702		if (prueth->br_members & BIT(PRUETH_PORT_MII0) &&
1703		    prueth->br_members & BIT(PRUETH_PORT_MII1)) {
1704			prueth->is_switch_mode = true;
1705			prueth->default_vlan = PRUETH_DFLT_VLAN_SW;
1706			emac->port_vlan = prueth->default_vlan;
1707			icssg_change_mode(prueth);
1708		}
1709	}
1710
1711	prueth_offload_fwd_mark_update(prueth);
1712
1713	return NOTIFY_DONE;
1714}
1715
1716static void prueth_netdevice_port_unlink(struct net_device *ndev)
1717{
1718	struct prueth_emac *emac = netdev_priv(ndev);
1719	struct prueth *prueth = emac->prueth;
1720	int ret;
1721
1722	prueth->br_members &= ~BIT(emac->port_id);
1723
1724	if (prueth->is_switch_mode) {
1725		prueth->is_switch_mode = false;
1726		emac->port_vlan = 0;
1727		ret = prueth_emac_restart(prueth);
1728		if (ret) {
1729			dev_err(prueth->dev, "Failed to restart the firmwares, aborting the process");
1730			return;
1731		}
1732	}
1733
1734	prueth_offload_fwd_mark_update(prueth);
1735
1736	if (!prueth->br_members)
1737		prueth->hw_bridge_dev = NULL;
1738}
1739
1740static int prueth_hsr_port_link(struct net_device *ndev)
1741{
1742	struct prueth_emac *emac = netdev_priv(ndev);
1743	struct prueth *prueth = emac->prueth;
1744	struct prueth_emac *emac0;
1745	struct prueth_emac *emac1;
1746
1747	emac0 = prueth->emac[PRUETH_MAC0];
1748	emac1 = prueth->emac[PRUETH_MAC1];
1749
1750	if (prueth->is_switch_mode)
1751		return -EOPNOTSUPP;
1752
1753	prueth->hsr_members |= BIT(emac->port_id);
1754	if (!prueth->is_hsr_offload_mode) {
1755		if (prueth->hsr_members & BIT(PRUETH_PORT_MII0) &&
1756		    prueth->hsr_members & BIT(PRUETH_PORT_MII1)) {
1757			if (!(emac0->ndev->features &
1758			      NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &&
1759			    !(emac1->ndev->features &
1760			      NETIF_PRUETH_HSR_OFFLOAD_FEATURES))
1761				return -EOPNOTSUPP;
1762			prueth->is_hsr_offload_mode = true;
1763			prueth->default_vlan = PRUETH_DFLT_VLAN_HSR;
1764			emac0->port_vlan = prueth->default_vlan;
1765			emac1->port_vlan = prueth->default_vlan;
1766			icssg_change_mode(prueth);
1767			netdev_dbg(ndev, "Enabling HSR offload mode\n");
1768		}
1769	}
1770
1771	return 0;
1772}
1773
1774static void prueth_hsr_port_unlink(struct net_device *ndev)
1775{
1776	struct prueth_emac *emac = netdev_priv(ndev);
1777	struct prueth *prueth = emac->prueth;
1778	struct prueth_emac *emac0;
1779	struct prueth_emac *emac1;
1780	int ret;
1781
1782	emac0 = prueth->emac[PRUETH_MAC0];
1783	emac1 = prueth->emac[PRUETH_MAC1];
1784
1785	prueth->hsr_members &= ~BIT(emac->port_id);
1786	if (prueth->is_hsr_offload_mode) {
1787		prueth->is_hsr_offload_mode = false;
1788		emac0->port_vlan = 0;
1789		emac1->port_vlan = 0;
1790		prueth->hsr_dev = NULL;
1791		ret = prueth_emac_restart(prueth);
1792		if (ret) {
1793			dev_err(prueth->dev, "Failed to restart the firmwares, aborting the process");
1794			return;
1795		}
1796		netdev_dbg(ndev, "Disabling HSR Offload mode\n");
1797	}
1798}
1799
1800/* netdev notifier */
1801static int prueth_netdevice_event(struct notifier_block *unused,
1802				  unsigned long event, void *ptr)
1803{
1804	struct netlink_ext_ack *extack = netdev_notifier_info_to_extack(ptr);
1805	struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
1806	struct netdev_notifier_changeupper_info *info;
1807	struct prueth_emac *emac = netdev_priv(ndev);
1808	struct prueth *prueth = emac->prueth;
1809	enum hsr_version hsr_ndev_version;
1810	int ret = NOTIFY_DONE;
1811
1812	if (ndev->netdev_ops != &emac_netdev_ops)
1813		return NOTIFY_DONE;
1814
1815	switch (event) {
1816	case NETDEV_CHANGEUPPER:
1817		info = ptr;
1818
1819		if ((ndev->features & NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &&
1820		    is_hsr_master(info->upper_dev)) {
1821			hsr_get_version(info->upper_dev, &hsr_ndev_version);
1822			if (hsr_ndev_version != HSR_V1 && hsr_ndev_version != PRP_V1)
1823				return -EOPNOTSUPP;
1824			prueth->hsr_prp_version = hsr_ndev_version;
1825
1826			if (info->linking) {
1827				if (!prueth->hsr_dev) {
1828					prueth->hsr_dev = info->upper_dev;
1829					icssg_class_set_host_mac_addr(prueth->miig_rt,
1830								      prueth->hsr_dev->dev_addr);
1831				} else {
1832					if (prueth->hsr_dev != info->upper_dev) {
1833						netdev_dbg(ndev, "Both interfaces must be linked to same upper device\n");
1834						return -EOPNOTSUPP;
1835					}
1836				}
1837				prueth_hsr_port_link(ndev);
1838			} else {
1839				prueth_hsr_port_unlink(ndev);
1840			}
1841		}
1842
1843		if (netif_is_bridge_master(info->upper_dev)) {
1844			if (info->linking)
1845				ret = prueth_netdevice_port_link(ndev, info->upper_dev, extack);
1846			else
1847				prueth_netdevice_port_unlink(ndev);
1848		}
1849		break;
1850	default:
1851		return NOTIFY_DONE;
1852	}
1853
1854	return notifier_from_errno(ret);
1855}
1856
1857static int prueth_register_notifiers(struct prueth *prueth)
1858{
1859	int ret = 0;
1860
1861	prueth->prueth_netdevice_nb.notifier_call = &prueth_netdevice_event;
1862	ret = register_netdevice_notifier(&prueth->prueth_netdevice_nb);
1863	if (ret) {
1864		dev_err(prueth->dev, "can't register netdevice notifier\n");
1865		return ret;
1866	}
1867
1868	ret = prueth_switchdev_register_notifiers(prueth);
1869	if (ret)
1870		unregister_netdevice_notifier(&prueth->prueth_netdevice_nb);
1871
1872	return ret;
1873}
1874
1875static void prueth_unregister_notifiers(struct prueth *prueth)
1876{
1877	prueth_switchdev_unregister_notifiers(prueth);
1878	unregister_netdevice_notifier(&prueth->prueth_netdevice_nb);
1879}
1880
1881static void icssg_read_firmware_names(struct device_node *np,
1882				      struct icssg_firmwares *fw)
1883{
1884	int i;
1885
1886	for (i = 0; i < PRUETH_NUM_MACS; i++) {
1887		of_property_read_string_index(np, "firmware-name", i * 3 + 0,
1888					      &fw[i].pru);
1889		of_property_read_string_index(np, "firmware-name", i * 3 + 1,
1890					      &fw[i].rtu);
1891		of_property_read_string_index(np, "firmware-name", i * 3 + 2,
1892					      &fw[i].txpru);
1893	}
1894}
1895
1896/* icssg_firmware_name_replace - Replace a substring in firmware name
1897 * @dev: device pointer for memory allocation
1898 * @src: source firmware name string
1899 * @from: substring to replace
1900 * @to: replacement substring
1901 *
1902 * Return: a newly allocated string with the replacement, or the original
1903 * string if replacement is not possible.
1904 */
1905static const char *icssg_firmware_name_replace(struct device *dev,
1906					       const char *src,
1907					       const char *from,
1908					       const char *to)
1909{
1910	size_t prefix, from_len, to_len, total;
1911	const char *p = strstr(src, from);
1912	char *buf;
1913
1914	if (!p)
1915		return src; /* fallback: no replacement, use original */
1916
1917	prefix = p - src;
1918	from_len = strlen(from);
1919	to_len = strlen(to);
1920	total = strlen(src) - from_len + to_len + 1;
1921
1922	buf = devm_kzalloc(dev, total, GFP_KERNEL);
1923	if (!buf)
1924		return src; /* fallback: allocation failed, use original */
1925
1926	strscpy(buf, src, prefix + 1);
1927	strscpy(buf + prefix, to, to_len + 1);
1928	strscpy(buf + prefix + to_len, p + from_len, total - prefix - to_len);
1929
1930	return buf;
1931}
1932
1933/**
1934 * icssg_mode_firmware_names - Generate firmware names for a specific mode
1935 * @dev: device pointer for logging and context
1936 * @src: source array of firmware name structures
1937 * @dst: destination array to store updated firmware name structures
1938 * @from: substring in firmware names to be replaced
1939 * @to: substring to replace @from in firmware names
1940 *
1941 * Iterates over all MACs and replaces occurrences of the @from substring
1942 * with @to in the firmware names (pru, rtu, txpru) for each MAC. The
1943 * updated firmware names are stored in the @dst array.
1944 */
1945static void icssg_mode_firmware_names(struct device *dev,
1946				      struct icssg_firmwares *src,
1947				      struct icssg_firmwares *dst,
1948				      const char *from, const char *to)
1949{
1950	int i;
1951
1952	for (i = 0; i < PRUETH_NUM_MACS; i++) {
1953		dst[i].pru = icssg_firmware_name_replace(dev, src[i].pru,
1954							 from, to);
1955		dst[i].rtu = icssg_firmware_name_replace(dev, src[i].rtu,
1956							 from, to);
1957		dst[i].txpru = icssg_firmware_name_replace(dev, src[i].txpru,
1958							   from, to);
1959	}
1960}
1961
1962static int prueth_probe(struct platform_device *pdev)
1963{
1964	struct device_node *eth_node, *eth_ports_node;
1965	struct device_node  *eth0_node = NULL;
1966	struct device_node  *eth1_node = NULL;
1967	struct genpool_data_align gp_data = {
1968		.align = SZ_64K,
1969	};
1970	struct device *dev = &pdev->dev;
1971	struct device_node *np;
1972	struct prueth *prueth;
1973	struct pruss *pruss;
1974	u32 msmc_ram_size;
1975	int i, ret;
1976
1977	np = dev->of_node;
1978
1979	BUILD_BUG_ON_MSG((sizeof(struct prueth_swdata) > PRUETH_NAV_SW_DATA_SIZE),
1980			 "insufficient SW_DATA size");
1981
1982	prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL);
1983	if (!prueth)
1984		return -ENOMEM;
1985
1986	dev_set_drvdata(dev, prueth);
1987	prueth->pdev = pdev;
1988	prueth->pdata = *(const struct prueth_pdata *)device_get_match_data(dev);
1989
1990	prueth->dev = dev;
1991	eth_ports_node = of_get_child_by_name(np, "ethernet-ports");
1992	if (!eth_ports_node)
1993		return -ENOENT;
1994
1995	for_each_child_of_node(eth_ports_node, eth_node) {
1996		u32 reg;
1997
1998		if (strcmp(eth_node->name, "port"))
1999			continue;
2000		ret = of_property_read_u32(eth_node, "reg", &reg);
2001		if (ret < 0) {
2002			dev_err(dev, "%pOF error reading port_id %d\n",
2003				eth_node, ret);
2004		}
2005
2006		of_node_get(eth_node);
2007
2008		if (reg == 0) {
2009			eth0_node = eth_node;
2010			if (!of_device_is_available(eth0_node)) {
2011				of_node_put(eth0_node);
2012				eth0_node = NULL;
2013			}
2014		} else if (reg == 1) {
2015			eth1_node = eth_node;
2016			if (!of_device_is_available(eth1_node)) {
2017				of_node_put(eth1_node);
2018				eth1_node = NULL;
2019			}
2020		} else {
2021			dev_err(dev, "port reg should be 0 or 1\n");
2022		}
2023	}
2024
2025	of_node_put(eth_ports_node);
2026
2027	/* At least one node must be present and available else we fail */
2028	if (!eth0_node && !eth1_node) {
2029		dev_err(dev, "neither port0 nor port1 node available\n");
2030		return -ENODEV;
2031	}
2032
2033	if (eth0_node == eth1_node) {
2034		dev_err(dev, "port0 and port1 can't have same reg\n");
2035		of_node_put(eth0_node);
2036		return -ENODEV;
2037	}
2038
2039	prueth->eth_node[PRUETH_MAC0] = eth0_node;
2040	prueth->eth_node[PRUETH_MAC1] = eth1_node;
2041
2042	prueth->miig_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-g-rt");
2043	if (IS_ERR(prueth->miig_rt)) {
2044		dev_err(dev, "couldn't get ti,mii-g-rt syscon regmap\n");
2045		return -ENODEV;
2046	}
2047
2048	prueth->mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt");
2049	if (IS_ERR(prueth->mii_rt)) {
2050		dev_err(dev, "couldn't get ti,mii-rt syscon regmap\n");
2051		return -ENODEV;
2052	}
2053
2054	prueth->pa_stats = syscon_regmap_lookup_by_phandle(np, "ti,pa-stats");
2055	if (IS_ERR(prueth->pa_stats)) {
2056		dev_err(dev, "couldn't get ti,pa-stats syscon regmap\n");
2057		prueth->pa_stats = NULL;
2058	}
2059
2060	if (eth0_node || eth1_node) {
2061		ret = prueth_get_cores(prueth, ICSS_SLICE0, false);
2062		if (ret)
2063			goto put_cores;
2064		ret = prueth_get_cores(prueth, ICSS_SLICE1, false);
2065		if (ret)
2066			goto put_cores;
2067	}
2068
2069	pruss = pruss_get(eth0_node ?
2070			  prueth->pru[ICSS_SLICE0] : prueth->pru[ICSS_SLICE1]);
2071	if (IS_ERR(pruss)) {
2072		ret = PTR_ERR(pruss);
2073		dev_err(dev, "unable to get pruss handle\n");
2074		goto put_cores;
2075	}
2076
2077	prueth->pruss = pruss;
2078
2079	ret = pruss_request_mem_region(pruss, PRUSS_MEM_SHRD_RAM2,
2080				       &prueth->shram);
2081	if (ret) {
2082		dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret);
2083		goto put_pruss;
2084	}
2085
2086	prueth->sram_pool = of_gen_pool_get(np, "sram", 0);
2087	if (!prueth->sram_pool) {
2088		dev_err(dev, "unable to get SRAM pool\n");
2089		ret = -ENODEV;
2090
2091		goto put_mem;
2092	}
2093
2094	prueth->is_switchmode_supported = prueth->pdata.switch_mode;
2095	if (prueth->pdata.banked_ms_ram) {
2096		/* Reserve 2 MSMC RAM banks for buffers to avoid arbitration */
2097		msmc_ram_size = (2 * MSMC_RAM_BANK_SIZE);
2098	} else {
2099		msmc_ram_size = PRUETH_EMAC_TOTAL_BUF_SIZE;
2100		if (prueth->is_switchmode_supported)
2101			msmc_ram_size = PRUETH_SW_TOTAL_BUF_SIZE;
2102	}
2103
2104	/* NOTE: FW bug needs buffer base to be 64KB aligned */
2105	prueth->msmcram.va =
2106		(void __iomem *)gen_pool_alloc_algo(prueth->sram_pool,
2107						    msmc_ram_size,
2108						    gen_pool_first_fit_align,
2109						    &gp_data);
2110
2111	if (!prueth->msmcram.va) {
2112		ret = -ENOMEM;
2113		dev_err(dev, "unable to allocate MSMC resource\n");
2114		goto put_mem;
2115	}
2116	prueth->msmcram.pa = gen_pool_virt_to_phys(prueth->sram_pool,
2117						   (unsigned long)prueth->msmcram.va);
2118	prueth->msmcram.size = msmc_ram_size;
2119	memset_io(prueth->msmcram.va, 0, msmc_ram_size);
2120	dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa,
2121		prueth->msmcram.va, prueth->msmcram.size);
2122
2123	prueth->iep0 = icss_iep_get_idx(np, 0);
2124	if (IS_ERR(prueth->iep0)) {
2125		ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n");
2126		prueth->iep0 = NULL;
2127		goto free_pool;
2128	}
2129
2130	prueth->iep1 = icss_iep_get_idx(np, 1);
2131	if (IS_ERR(prueth->iep1)) {
2132		ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n");
2133		goto put_iep0;
2134	}
2135
2136	if (prueth->pdata.quirk_10m_link_issue) {
2137		/* Enable IEP1 for FW in 64bit mode as W/A for 10M FD link detect issue under TX
2138		 * traffic.
2139		 */
2140		icss_iep_init_fw(prueth->iep1);
2141	}
2142
2143	/* Read EMAC firmware names from device tree */
2144	icssg_read_firmware_names(np, prueth->icssg_emac_firmwares);
2145
2146	/* Generate other mode firmware names based on EMAC firmware names */
2147	icssg_mode_firmware_names(dev, prueth->icssg_emac_firmwares,
2148				  prueth->icssg_switch_firmwares, "eth", "sw");
2149	icssg_mode_firmware_names(dev, prueth->icssg_emac_firmwares,
2150				  prueth->icssg_hsr_firmwares, "eth", "hsr");
2151	icssg_mode_firmware_names(dev, prueth->icssg_emac_firmwares,
2152				  prueth->icssg_prp_firmwares, "eth", "prp");
2153
2154	spin_lock_init(&prueth->vtbl_lock);
2155	spin_lock_init(&prueth->stats_lock);
2156	/* setup netdev interfaces */
2157	if (eth0_node) {
2158		ret = prueth_netdev_init(prueth, eth0_node);
2159		if (ret) {
2160			dev_err_probe(dev, ret, "netdev init %s failed\n",
2161				      eth0_node->name);
2162			goto exit_iep;
2163		}
2164
2165		prueth->emac[PRUETH_MAC0]->half_duplex =
2166			of_property_read_bool(eth0_node, "ti,half-duplex-capable");
2167
2168		prueth->emac[PRUETH_MAC0]->iep = prueth->iep0;
2169	}
2170
2171	if (eth1_node) {
2172		ret = prueth_netdev_init(prueth, eth1_node);
2173		if (ret) {
2174			dev_err_probe(dev, ret, "netdev init %s failed\n",
2175				      eth1_node->name);
2176			goto netdev_exit;
2177		}
2178
2179		prueth->emac[PRUETH_MAC1]->half_duplex =
2180			of_property_read_bool(eth1_node, "ti,half-duplex-capable");
2181
2182		prueth->emac[PRUETH_MAC1]->iep = prueth->iep0;
2183	}
2184
2185	/* register the network devices */
2186	if (eth0_node) {
2187		ret = register_netdev(prueth->emac[PRUETH_MAC0]->ndev);
2188		if (ret) {
2189			dev_err(dev, "can't register netdev for port MII0");
2190			goto netdev_exit;
2191		}
2192
2193		prueth->registered_netdevs[PRUETH_MAC0] = prueth->emac[PRUETH_MAC0]->ndev;
2194
2195		ret = emac_phy_connect(prueth->emac[PRUETH_MAC0]);
2196		if (ret) {
2197			dev_err(dev,
2198				"can't connect to MII0 PHY, error -%d", ret);
2199			goto netdev_unregister;
2200		}
2201		phy_attached_info(prueth->emac[PRUETH_MAC0]->ndev->phydev);
2202	}
2203
2204	if (eth1_node) {
2205		ret = register_netdev(prueth->emac[PRUETH_MAC1]->ndev);
2206		if (ret) {
2207			dev_err(dev, "can't register netdev for port MII1");
2208			goto netdev_unregister;
2209		}
2210
2211		prueth->registered_netdevs[PRUETH_MAC1] = prueth->emac[PRUETH_MAC1]->ndev;
2212		ret = emac_phy_connect(prueth->emac[PRUETH_MAC1]);
2213		if (ret) {
2214			dev_err(dev,
2215				"can't connect to MII1 PHY, error %d", ret);
2216			goto netdev_unregister;
2217		}
2218		phy_attached_info(prueth->emac[PRUETH_MAC1]->ndev->phydev);
2219	}
2220
2221	if (prueth->is_switchmode_supported) {
2222		ret = prueth_register_notifiers(prueth);
2223		if (ret)
2224			goto netdev_unregister;
2225
2226		sprintf(prueth->switch_id, "%s", dev_name(dev));
2227	}
2228
2229	dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n",
2230		 (!eth0_node || !eth1_node) ? "single" : "dual");
2231
2232	if (eth1_node)
2233		of_node_put(eth1_node);
2234	if (eth0_node)
2235		of_node_put(eth0_node);
2236	return 0;
2237
2238netdev_unregister:
2239	for (i = 0; i < PRUETH_NUM_MACS; i++) {
2240		if (!prueth->registered_netdevs[i])
2241			continue;
2242		if (prueth->emac[i]->ndev->phydev) {
2243			phy_disconnect(prueth->emac[i]->ndev->phydev);
2244			prueth->emac[i]->ndev->phydev = NULL;
2245		}
2246		unregister_netdev(prueth->registered_netdevs[i]);
2247	}
2248
2249netdev_exit:
2250	for (i = 0; i < PRUETH_NUM_MACS; i++) {
2251		eth_node = prueth->eth_node[i];
2252		if (!eth_node)
2253			continue;
2254
2255		prueth_netdev_exit(prueth, eth_node);
2256	}
2257
2258exit_iep:
2259	if (prueth->pdata.quirk_10m_link_issue)
2260		icss_iep_exit_fw(prueth->iep1);
2261	icss_iep_put(prueth->iep1);
2262
2263put_iep0:
2264	icss_iep_put(prueth->iep0);
2265	prueth->iep0 = NULL;
2266	prueth->iep1 = NULL;
2267
2268free_pool:
2269	gen_pool_free(prueth->sram_pool,
2270		      (unsigned long)prueth->msmcram.va,
2271		      prueth->msmcram.size);
2272
2273put_mem:
2274	pruss_release_mem_region(prueth->pruss, &prueth->shram);
2275
2276put_pruss:
2277	pruss_put(prueth->pruss);
2278
2279put_cores:
2280	if (eth0_node || eth1_node) {
2281		prueth_put_cores(prueth, ICSS_SLICE0);
2282		of_node_put(eth0_node);
2283
2284		prueth_put_cores(prueth, ICSS_SLICE1);
2285		of_node_put(eth1_node);
2286	}
2287
2288	return ret;
2289}
2290
2291static void prueth_remove(struct platform_device *pdev)
2292{
2293	struct prueth *prueth = platform_get_drvdata(pdev);
2294	struct device_node *eth_node;
2295	int i;
2296
2297	prueth_unregister_notifiers(prueth);
2298
2299	for (i = 0; i < PRUETH_NUM_MACS; i++) {
2300		if (!prueth->registered_netdevs[i])
2301			continue;
2302		phy_stop(prueth->emac[i]->ndev->phydev);
2303		phy_disconnect(prueth->emac[i]->ndev->phydev);
2304		prueth->emac[i]->ndev->phydev = NULL;
2305		unregister_netdev(prueth->registered_netdevs[i]);
2306	}
2307
2308	for (i = 0; i < PRUETH_NUM_MACS; i++) {
2309		eth_node = prueth->eth_node[i];
2310		if (!eth_node)
2311			continue;
2312
2313		prueth_netdev_exit(prueth, eth_node);
2314	}
2315
2316	if (prueth->pdata.quirk_10m_link_issue)
2317		icss_iep_exit_fw(prueth->iep1);
2318
2319	icss_iep_put(prueth->iep1);
2320	icss_iep_put(prueth->iep0);
2321
2322	gen_pool_free(prueth->sram_pool,
2323		(unsigned long)prueth->msmcram.va,
2324		prueth->msmcram.size);
2325
2326	pruss_release_mem_region(prueth->pruss, &prueth->shram);
2327
2328	pruss_put(prueth->pruss);
2329
2330	if (prueth->eth_node[PRUETH_MAC1])
2331		prueth_put_cores(prueth, ICSS_SLICE1);
2332
2333	if (prueth->eth_node[PRUETH_MAC0])
2334		prueth_put_cores(prueth, ICSS_SLICE0);
2335}
2336
2337static const struct prueth_pdata am654_icssg_pdata = {
2338	.fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2339	.quirk_10m_link_issue = 1,
2340	.switch_mode = 1,
2341	.banked_ms_ram = 0,
2342};
2343
2344static const struct prueth_pdata am64x_icssg_pdata = {
2345	.fdqring_mode = K3_RINGACC_RING_MODE_RING,
2346	.quirk_10m_link_issue = 1,
2347	.switch_mode = 1,
2348	.banked_ms_ram = 1,
2349};
2350
2351static const struct of_device_id prueth_dt_match[] = {
2352	{ .compatible = "ti,am654-icssg-prueth", .data = &am654_icssg_pdata },
2353	{ .compatible = "ti,am642-icssg-prueth", .data = &am64x_icssg_pdata },
2354	{ /* sentinel */ }
2355};
2356MODULE_DEVICE_TABLE(of, prueth_dt_match);
2357
2358static struct platform_driver prueth_driver = {
2359	.probe = prueth_probe,
2360	.remove = prueth_remove,
2361	.driver = {
2362		.name = "icssg-prueth",
2363		.of_match_table = prueth_dt_match,
2364		.pm = &prueth_dev_pm_ops,
2365	},
2366};
2367module_platform_driver(prueth_driver);
2368
2369MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
2370MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>");
2371MODULE_DESCRIPTION("PRUSS ICSSG Ethernet Driver");
2372MODULE_LICENSE("GPL");