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stmmac_platform.c
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linux-6.19.14/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
1// SPDX-License-Identifier: GPL-2.0-only 2/******************************************************************************* 3 This contains the functions to handle the platform driver. 4 5 Copyright (C) 2007-2011 STMicroelectronics Ltd 6 7 8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 9*******************************************************************************/ 10 11#include <linux/device.h> 12#include <linux/platform_device.h> 13#include <linux/pm_runtime.h> 14#include <linux/module.h> 15#include <linux/io.h> 16#include <linux/of.h> 17#include <linux/of_net.h> 18#include <linux/of_mdio.h> 19 20#include "stmmac.h" 21#include "stmmac_platform.h" 22 23#ifdef CONFIG_OF 24 25/** 26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins 27 * @dev: struct device of the platform device 28 * @mcast_bins: Multicast filtering bins 29 * Description: 30 * this function validates the number of Multicast filtering bins specified 31 * by the configuration through the device tree. The Synopsys GMAC supports 32 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC 33 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds 34 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is 35 * invalid and will cause the filtering algorithm to use Multicast 36 * promiscuous mode. 37 */ 38static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins) 39{ 40 int x = mcast_bins; 41 42 switch (x) { 43 case HASH_TABLE_SIZE: 44 case 128: 45 case 256: 46 break; 47 default: 48 x = 0; 49 dev_info(dev, "Hash table entries set to unexpected value %d\n", 50 mcast_bins); 51 break; 52 } 53 return x; 54} 55 56/** 57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries 58 * @dev: struct device of the platform device 59 * @ucast_entries: number of Unicast address entries 60 * Description: 61 * This function validates the number of Unicast address entries supported 62 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller 63 * supports 1..32, 64, or 128 Unicast filter entries for its Unicast filter 64 * logic. This function validates a valid, supported configuration is 65 * selected, and defaults to 1 Unicast address if an unsupported 66 * configuration is selected. 67 */ 68static int dwmac1000_validate_ucast_entries(struct device *dev, 69 int ucast_entries) 70{ 71 int x = ucast_entries; 72 73 switch (x) { 74 case 1 ... 32: 75 case 64: 76 case 128: 77 break; 78 default: 79 x = 1; 80 dev_info(dev, "Unicast table entries set to unexpected value %d\n", 81 ucast_entries); 82 break; 83 } 84 return x; 85} 86 87/** 88 * stmmac_axi_setup - parse DT parameters for programming the AXI register 89 * @pdev: platform device 90 * Description: 91 * if required, from device-tree the AXI internal register can be tuned 92 * by using platform parameters. 93 */ 94static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev) 95{ 96 struct device_node *np; 97 struct stmmac_axi *axi; 98 u32 axi_blen[AXI_BLEN]; 99 100 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); 101 if (!np) 102 return NULL; 103 104 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); 105 if (!axi) { 106 of_node_put(np); 107 return ERR_PTR(-ENOMEM); 108 } 109 110 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); 111 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm"); 112 axi->axi_kbbe = of_property_read_bool(np, "snps,kbbe"); 113 axi->axi_fb = of_property_read_bool(np, "snps,fb"); 114 axi->axi_mb = of_property_read_bool(np, "snps,mb"); 115 axi->axi_rb = of_property_read_bool(np, "snps,rb"); 116 117 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt)) 118 axi->axi_wr_osr_lmt = 1; 119 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt)) 120 axi->axi_rd_osr_lmt = 1; 121 of_property_read_u32_array(np, "snps,blen", axi_blen, AXI_BLEN); 122 stmmac_axi_blen_to_mask(&axi->axi_blen_regval, axi_blen, AXI_BLEN); 123 of_node_put(np); 124 125 return axi; 126} 127 128/** 129 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration 130 * @pdev: platform device 131 * @plat: enet data 132 */ 133static int stmmac_mtl_setup(struct platform_device *pdev, 134 struct plat_stmmacenet_data *plat) 135{ 136 struct device_node *q_node; 137 struct device_node *rx_node; 138 struct device_node *tx_node; 139 u8 queue = 0; 140 int ret = 0; 141 142 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need 143 * to always set this, otherwise Queue will be classified as AVB 144 * (because MTL_QUEUE_AVB = 0). 145 */ 146 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB; 147 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB; 148 149 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0); 150 if (!rx_node) 151 return ret; 152 153 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0); 154 if (!tx_node) { 155 of_node_put(rx_node); 156 return ret; 157 } 158 159 /* Processing RX queues common config */ 160 of_property_read_u32(rx_node, "snps,rx-queues-to-use", 161 &plat->rx_queues_to_use); 162 163 if (of_property_read_bool(rx_node, "snps,rx-sched-sp")) 164 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 165 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp")) 166 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP; 167 else 168 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 169 170 /* Processing individual RX queue config */ 171 for_each_child_of_node(rx_node, q_node) { 172 if (queue >= plat->rx_queues_to_use) 173 break; 174 175 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) 176 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 177 else if (of_property_read_bool(q_node, "snps,avb-algorithm")) 178 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 179 else 180 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 181 182 of_property_read_u32(q_node, "snps,map-to-dma-channel", 183 &plat->rx_queues_cfg[queue].chan); 184 /* TODO: Dynamic mapping to be included in the future */ 185 186 if (!of_property_read_u32(q_node, "snps,priority", 187 &plat->rx_queues_cfg[queue].prio)) 188 plat->rx_queues_cfg[queue].use_prio = true; 189 190 /* RX queue specific packet type routing */ 191 if (of_property_read_bool(q_node, "snps,route-avcp")) 192 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ; 193 else if (of_property_read_bool(q_node, "snps,route-ptp")) 194 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ; 195 else if (of_property_read_bool(q_node, "snps,route-dcbcp")) 196 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ; 197 else if (of_property_read_bool(q_node, "snps,route-up")) 198 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ; 199 else if (of_property_read_bool(q_node, "snps,route-multi-broad")) 200 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ; 201 202 queue++; 203 } 204 if (queue != plat->rx_queues_to_use) { 205 ret = -EINVAL; 206 dev_err(&pdev->dev, "Not all RX queues were configured\n"); 207 goto out; 208 } 209 210 /* Processing TX queues common config */ 211 of_property_read_u32(tx_node, "snps,tx-queues-to-use", 212 &plat->tx_queues_to_use); 213 214 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr")) 215 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR; 216 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq")) 217 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ; 218 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr")) 219 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR; 220 else 221 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP; 222 223 queue = 0; 224 225 /* Processing individual TX queue config */ 226 for_each_child_of_node(tx_node, q_node) { 227 if (queue >= plat->tx_queues_to_use) 228 break; 229 230 if (of_property_read_u32(q_node, "snps,weight", 231 &plat->tx_queues_cfg[queue].weight)) 232 plat->tx_queues_cfg[queue].weight = 0x10 + queue; 233 234 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) { 235 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 236 } else if (of_property_read_bool(q_node, 237 "snps,avb-algorithm")) { 238 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 239 240 /* Credit Base Shaper parameters used by AVB */ 241 if (of_property_read_u32(q_node, "snps,send_slope", 242 &plat->tx_queues_cfg[queue].send_slope)) 243 plat->tx_queues_cfg[queue].send_slope = 0x0; 244 if (of_property_read_u32(q_node, "snps,idle_slope", 245 &plat->tx_queues_cfg[queue].idle_slope)) 246 plat->tx_queues_cfg[queue].idle_slope = 0x0; 247 if (of_property_read_u32(q_node, "snps,high_credit", 248 &plat->tx_queues_cfg[queue].high_credit)) 249 plat->tx_queues_cfg[queue].high_credit = 0x0; 250 if (of_property_read_u32(q_node, "snps,low_credit", 251 &plat->tx_queues_cfg[queue].low_credit)) 252 plat->tx_queues_cfg[queue].low_credit = 0x0; 253 } else { 254 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 255 } 256 257 if (!of_property_read_u32(q_node, "snps,priority", 258 &plat->tx_queues_cfg[queue].prio)) 259 plat->tx_queues_cfg[queue].use_prio = true; 260 261 plat->tx_queues_cfg[queue].coe_unsupported = 262 of_property_read_bool(q_node, "snps,coe-unsupported"); 263 264 queue++; 265 } 266 if (queue != plat->tx_queues_to_use) { 267 ret = -EINVAL; 268 dev_err(&pdev->dev, "Not all TX queues were configured\n"); 269 goto out; 270 } 271 272out: 273 of_node_put(rx_node); 274 of_node_put(tx_node); 275 of_node_put(q_node); 276 277 return ret; 278} 279 280/** 281 * stmmac_of_get_mdio() - Gets the MDIO bus from the devicetree. 282 * @np: devicetree node 283 * 284 * The MDIO bus will be searched for in the following ways: 285 * 1. The compatible is "snps,dwc-qos-ethernet-4.10" && a "mdio" named 286 * child node exists 287 * 2. A child node with the "snps,dwmac-mdio" compatible is present 288 * 289 * Return: The MDIO node if present otherwise NULL 290 */ 291static struct device_node *stmmac_of_get_mdio(struct device_node *np) 292{ 293 static const struct of_device_id need_mdio_ids[] = { 294 { .compatible = "snps,dwc-qos-ethernet-4.10" }, 295 {}, 296 }; 297 struct device_node *mdio_node = NULL; 298 299 if (of_match_node(need_mdio_ids, np)) { 300 mdio_node = of_get_child_by_name(np, "mdio"); 301 } else { 302 /** 303 * If snps,dwmac-mdio is passed from DT, always register 304 * the MDIO 305 */ 306 for_each_child_of_node(np, mdio_node) { 307 if (of_device_is_compatible(mdio_node, 308 "snps,dwmac-mdio")) 309 break; 310 } 311 } 312 313 return mdio_node; 314} 315 316/** 317 * stmmac_mdio_setup() - Populate platform related MDIO structures. 318 * @plat: driver data platform structure 319 * @np: devicetree node 320 * @dev: device pointer 321 * 322 * This searches for MDIO information from the devicetree. 323 * If an MDIO node is found, it's assigned to plat->mdio_node and 324 * plat->mdio_bus_data is allocated. 325 * If no connection can be determined, just plat->mdio_bus_data is allocated 326 * to indicate a bus should be created and scanned for a phy. 327 * If it's determined there's no MDIO bus needed, both are left NULL. 328 * 329 * This expects that plat->phy_node has already been searched for. 330 * 331 * Return: 0 on success, errno otherwise. 332 */ 333static int stmmac_mdio_setup(struct plat_stmmacenet_data *plat, 334 struct device_node *np, struct device *dev) 335{ 336 bool legacy_mdio; 337 338 plat->mdio_node = stmmac_of_get_mdio(np); 339 if (plat->mdio_node) 340 dev_dbg(dev, "Found MDIO subnode\n"); 341 342 /* Legacy devicetrees allowed for no MDIO bus description and expect 343 * the bus to be scanned for devices. If there's no phy or fixed-link 344 * described assume this is the case since there must be something 345 * connected to the MAC. 346 */ 347 legacy_mdio = !of_phy_is_fixed_link(np) && !plat->phy_node; 348 if (legacy_mdio) 349 dev_info(dev, "Deprecated MDIO bus assumption used\n"); 350 351 if (plat->mdio_node || legacy_mdio) { 352 plat->mdio_bus_data = devm_kzalloc(dev, 353 sizeof(*plat->mdio_bus_data), 354 GFP_KERNEL); 355 if (!plat->mdio_bus_data) 356 return -ENOMEM; 357 358 plat->mdio_bus_data->needs_reset = true; 359 } 360 361 return 0; 362} 363 364/** 365 * stmmac_of_get_mac_mode - retrieves the interface of the MAC 366 * @np: - device-tree node 367 * Description: 368 * Similar to `of_get_phy_mode()`, this function will retrieve (from 369 * the device-tree) the interface mode on the MAC side. This assumes 370 * that there is mode converter in-between the MAC & PHY 371 * (e.g. GMII-to-RGMII). 372 */ 373static int stmmac_of_get_mac_mode(struct device_node *np) 374{ 375 const char *pm; 376 int err, i; 377 378 err = of_property_read_string(np, "mac-mode", &pm); 379 if (err < 0) 380 return err; 381 382 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) { 383 if (!strcasecmp(pm, phy_modes(i))) 384 return i; 385 } 386 387 return -ENODEV; 388} 389 390/* Compatible string array for all gmac4 devices */ 391static const char * const stmmac_gmac4_compats[] = { 392 "snps,dwmac-4.00", 393 "snps,dwmac-4.10a", 394 "snps,dwmac-4.20a", 395 "snps,dwmac-5.00a", 396 "snps,dwmac-5.10a", 397 "snps,dwmac-5.20", 398 "snps,dwmac-5.30a", 399 NULL 400}; 401 402/** 403 * stmmac_probe_config_dt - parse device-tree driver parameters 404 * @pdev: platform_device structure 405 * @mac: MAC address to use 406 * Description: 407 * this function is to read the driver parameters from device-tree and 408 * set some private fields that will be used by the main at runtime. 409 */ 410static struct plat_stmmacenet_data * 411stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) 412{ 413 struct device_node *np = pdev->dev.of_node; 414 struct plat_stmmacenet_data *plat; 415 struct stmmac_dma_cfg *dma_cfg; 416 static int bus_id = -ENODEV; 417 int phy_mode; 418 void *ret; 419 int rc; 420 421 plat = stmmac_plat_dat_alloc(&pdev->dev); 422 if (!plat) 423 return ERR_PTR(-ENOMEM); 424 425 rc = of_get_mac_address(np, mac); 426 if (rc) { 427 if (rc == -EPROBE_DEFER) 428 return ERR_PTR(rc); 429 430 eth_zero_addr(mac); 431 } 432 433 phy_mode = device_get_phy_mode(&pdev->dev); 434 if (phy_mode < 0) 435 return ERR_PTR(phy_mode); 436 437 plat->phy_interface = phy_mode; 438 439 rc = stmmac_of_get_mac_mode(np); 440 if (rc >= 0 && rc != phy_mode) 441 dev_warn(&pdev->dev, 442 "\"mac-mode\" property used for %s but differs to \"phy-mode\" of %s, and will be ignored. Please report.\n", 443 phy_modes(rc), phy_modes(phy_mode)); 444 445 /* Some wrapper drivers still rely on phy_node. Let's save it while 446 * they are not converted to phylink. */ 447 plat->phy_node = of_parse_phandle(np, "phy-handle", 0); 448 449 /* PHYLINK automatically parses the phy-handle property */ 450 plat->port_node = of_fwnode_handle(np); 451 452 /* Get max speed of operation from device tree */ 453 of_property_read_u32(np, "max-speed", &plat->max_speed); 454 455 plat->bus_id = of_alias_get_id(np, "ethernet"); 456 if (plat->bus_id < 0) { 457 if (bus_id < 0) 458 bus_id = of_alias_get_highest_id("ethernet"); 459 /* No ethernet alias found, init at -1 so first bus_id is 0 */ 460 if (bus_id < 0) 461 bus_id = -1; 462 plat->bus_id = ++bus_id; 463 } 464 465 if (of_property_read_u32(np, "snps,clk-csr", &plat->clk_csr)) 466 of_property_read_u32(np, "clk_csr", &plat->clk_csr); 467 468 /* "snps,phy-addr" is not a standard property. Mark it as deprecated 469 * and warn of its use. Remove this when phy node support is added. 470 */ 471 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0) 472 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n"); 473 474 rc = stmmac_mdio_setup(plat, np, &pdev->dev); 475 if (rc) { 476 ret = ERR_PTR(rc); 477 goto error_put_phy; 478 } 479 480 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size); 481 482 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size); 483 484 plat->force_sf_dma_mode = 485 of_property_read_bool(np, "snps,force_sf_dma_mode"); 486 487 if (of_property_read_bool(np, "snps,en-tx-lpi-clockgating")) { 488 dev_warn(&pdev->dev, 489 "OF property snps,en-tx-lpi-clockgating is deprecated, please convert driver to use STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP\n"); 490 plat->flags |= STMMAC_FLAG_EN_TX_LPI_CLOCKGATING; 491 } 492 493 /* 494 * Currently only the properties needed on SPEAr600 495 * are provided. All other properties should be added 496 * once needed on other platforms. 497 */ 498 if (of_device_is_compatible(np, "st,spear600-gmac") || 499 of_device_is_compatible(np, "snps,dwmac-3.50a") || 500 of_device_is_compatible(np, "snps,dwmac-3.70a") || 501 of_device_is_compatible(np, "snps,dwmac-3.72a") || 502 of_device_is_compatible(np, "snps,dwmac")) { 503 /* Note that the max-frame-size parameter as defined in the 504 * ePAPR v1.1 spec is defined as max-frame-size, it's 505 * actually used as the IEEE definition of MAC Client 506 * data, or MTU. The ePAPR specification is confusing as 507 * the definition is max-frame-size, but usage examples 508 * are clearly MTUs 509 */ 510 of_property_read_u32(np, "max-frame-size", &plat->maxmtu); 511 of_property_read_u32(np, "snps,multicast-filter-bins", 512 &plat->multicast_filter_bins); 513 of_property_read_u32(np, "snps,perfect-filter-entries", 514 &plat->unicast_filter_entries); 515 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries( 516 &pdev->dev, plat->unicast_filter_entries); 517 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins( 518 &pdev->dev, plat->multicast_filter_bins); 519 plat->core_type = DWMAC_CORE_GMAC; 520 plat->pmt = 1; 521 } 522 523 if (of_device_is_compatible(np, "snps,dwmac-3.40a")) { 524 plat->core_type = DWMAC_CORE_GMAC; 525 plat->enh_desc = 1; 526 plat->tx_coe = 1; 527 plat->bugged_jumbo = 1; 528 plat->pmt = 1; 529 } 530 531 if (of_device_compatible_match(np, stmmac_gmac4_compats)) { 532 plat->core_type = DWMAC_CORE_GMAC4; 533 plat->pmt = 1; 534 if (of_property_read_bool(np, "snps,tso")) 535 plat->flags |= STMMAC_FLAG_TSO_EN; 536 } 537 538 if (of_device_is_compatible(np, "snps,dwmac-3.610") || 539 of_device_is_compatible(np, "snps,dwmac-3.710")) { 540 plat->enh_desc = 1; 541 plat->bugged_jumbo = 1; 542 plat->force_sf_dma_mode = 1; 543 } 544 545 if (of_device_is_compatible(np, "snps,dwxgmac")) { 546 plat->core_type = DWMAC_CORE_XGMAC; 547 plat->pmt = 1; 548 if (of_property_read_bool(np, "snps,tso")) 549 plat->flags |= STMMAC_FLAG_TSO_EN; 550 of_property_read_u32(np, "snps,multicast-filter-bins", 551 &plat->multicast_filter_bins); 552 } 553 554 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg), 555 GFP_KERNEL); 556 if (!dma_cfg) { 557 ret = ERR_PTR(-ENOMEM); 558 goto error_put_mdio; 559 } 560 plat->dma_cfg = dma_cfg; 561 562 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl); 563 if (!dma_cfg->pbl) 564 dma_cfg->pbl = DEFAULT_DMA_PBL; 565 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl); 566 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl); 567 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8"); 568 569 dma_cfg->aal = of_property_read_bool(np, "snps,aal"); 570 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst"); 571 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst"); 572 573 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode"); 574 if (plat->force_thresh_dma_mode && plat->force_sf_dma_mode) { 575 plat->force_sf_dma_mode = 0; 576 dev_warn(&pdev->dev, 577 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n"); 578 } 579 580 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed); 581 582 plat->axi = stmmac_axi_setup(pdev); 583 584 rc = stmmac_mtl_setup(pdev, plat); 585 if (rc) { 586 ret = ERR_PTR(rc); 587 goto error_put_mdio; 588 } 589 590 /* clock setup */ 591 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) { 592 plat->stmmac_clk = devm_clk_get(&pdev->dev, 593 STMMAC_RESOURCE_NAME); 594 if (IS_ERR(plat->stmmac_clk)) { 595 dev_warn(&pdev->dev, "Cannot get CSR clock\n"); 596 plat->stmmac_clk = NULL; 597 } 598 clk_prepare_enable(plat->stmmac_clk); 599 } 600 601 plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk"); 602 if (IS_ERR(plat->pclk)) { 603 ret = plat->pclk; 604 goto error_pclk_get; 605 } 606 clk_prepare_enable(plat->pclk); 607 608 /* Fall-back to main clock in case of no PTP ref is passed */ 609 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref"); 610 if (IS_ERR(plat->clk_ptp_ref)) { 611 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk); 612 plat->clk_ptp_ref = NULL; 613 dev_info(&pdev->dev, "PTP uses main clock\n"); 614 } else { 615 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref); 616 dev_dbg(&pdev->dev, "PTP rate %lu\n", plat->clk_ptp_rate); 617 } 618 619 plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev, 620 STMMAC_RESOURCE_NAME); 621 if (IS_ERR(plat->stmmac_rst)) { 622 ret = plat->stmmac_rst; 623 goto error_hw_init; 624 } 625 626 plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared( 627 &pdev->dev, "ahb"); 628 if (IS_ERR(plat->stmmac_ahb_rst)) { 629 ret = plat->stmmac_ahb_rst; 630 goto error_hw_init; 631 } 632 633 return plat; 634 635error_hw_init: 636 clk_disable_unprepare(plat->pclk); 637error_pclk_get: 638 clk_disable_unprepare(plat->stmmac_clk); 639error_put_mdio: 640 of_node_put(plat->mdio_node); 641error_put_phy: 642 of_node_put(plat->phy_node); 643 644 return ret; 645} 646 647static void devm_stmmac_remove_config_dt(void *data) 648{ 649 struct plat_stmmacenet_data *plat = data; 650 651 clk_disable_unprepare(plat->stmmac_clk); 652 clk_disable_unprepare(plat->pclk); 653 of_node_put(plat->mdio_node); 654 of_node_put(plat->phy_node); 655} 656 657/** 658 * devm_stmmac_probe_config_dt 659 * @pdev: platform_device structure 660 * @mac: MAC address to use 661 * Description: Devres variant of stmmac_probe_config_dt(). 662 */ 663struct plat_stmmacenet_data * 664devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) 665{ 666 struct plat_stmmacenet_data *plat; 667 int ret; 668 669 plat = stmmac_probe_config_dt(pdev, mac); 670 if (IS_ERR(plat)) 671 return plat; 672 673 ret = devm_add_action_or_reset(&pdev->dev, 674 devm_stmmac_remove_config_dt, plat); 675 if (ret) 676 return ERR_PTR(ret); 677 678 return plat; 679} 680#else 681struct plat_stmmacenet_data * 682devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) 683{ 684 return ERR_PTR(-EINVAL); 685} 686#endif /* CONFIG_OF */ 687EXPORT_SYMBOL_GPL(devm_stmmac_probe_config_dt); 688 689struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat, 690 const char *name) 691{ 692 for (int i = 0; i < plat_dat->num_clks; i++) 693 if (strcmp(plat_dat->clks[i].id, name) == 0) 694 return plat_dat->clks[i].clk; 695 696 return NULL; 697} 698EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk); 699 700int stmmac_get_platform_resources(struct platform_device *pdev, 701 struct stmmac_resources *stmmac_res) 702{ 703 memset(stmmac_res, 0, sizeof(*stmmac_res)); 704 705 /* Get IRQ information early to have an ability to ask for deferred 706 * probe if needed before we went too far with resource allocation. 707 */ 708 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq"); 709 if (stmmac_res->irq < 0) 710 return stmmac_res->irq; 711 712 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq 713 * The external wake up irq can be passed through the platform code 714 * named as "eth_wake_irq" 715 * 716 * In case the wake up interrupt is not passed from the platform 717 * so the driver will continue to use the mac irq (ndev->irq) 718 */ 719 stmmac_res->wol_irq = 720 platform_get_irq_byname_optional(pdev, "eth_wake_irq"); 721 if (stmmac_res->wol_irq < 0) { 722 if (stmmac_res->wol_irq == -EPROBE_DEFER) 723 return -EPROBE_DEFER; 724 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n"); 725 stmmac_res->wol_irq = stmmac_res->irq; 726 } 727 728 stmmac_res->sfty_irq = 729 platform_get_irq_byname_optional(pdev, "sfty"); 730 if (stmmac_res->sfty_irq < 0) { 731 if (stmmac_res->sfty_irq == -EPROBE_DEFER) 732 return -EPROBE_DEFER; 733 dev_info(&pdev->dev, "IRQ sfty not found\n"); 734 } 735 736 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0); 737 738 return PTR_ERR_OR_ZERO(stmmac_res->addr); 739} 740EXPORT_SYMBOL_GPL(stmmac_get_platform_resources); 741 742/** 743 * stmmac_pltfr_init 744 * @dev: pointer to the device structure 745 * @plat: driver data platform structure 746 * Description: Call the platform's init callback (if any) and propagate 747 * the return value. 748 */ 749static int stmmac_pltfr_init(struct device *dev, 750 struct plat_stmmacenet_data *plat) 751{ 752 int ret = 0; 753 754 if (plat->init) 755 ret = plat->init(dev, plat->bsp_priv); 756 757 return ret; 758} 759 760/** 761 * stmmac_pltfr_exit 762 * @dev: pointer to the device structure 763 * @plat: driver data platform structure 764 * Description: Call the platform's exit callback (if any). 765 */ 766static void stmmac_pltfr_exit(struct device *dev, 767 struct plat_stmmacenet_data *plat) 768{ 769 if (plat->exit) 770 plat->exit(dev, plat->bsp_priv); 771} 772 773static int stmmac_plat_suspend(struct device *dev, void *bsp_priv) 774{ 775 struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev)); 776 777 stmmac_pltfr_exit(dev, priv->plat); 778 779 return 0; 780} 781 782static int stmmac_plat_resume(struct device *dev, void *bsp_priv) 783{ 784 struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev)); 785 786 return stmmac_pltfr_init(dev, priv->plat); 787} 788 789/** 790 * stmmac_pltfr_probe 791 * @pdev: platform device pointer 792 * @plat: driver data platform structure 793 * @res: stmmac resources structure 794 * Description: This calls the platform's init() callback and probes the 795 * stmmac driver. 796 */ 797int stmmac_pltfr_probe(struct platform_device *pdev, 798 struct plat_stmmacenet_data *plat, 799 struct stmmac_resources *res) 800{ 801 if (!plat->suspend && plat->exit) 802 plat->suspend = stmmac_plat_suspend; 803 if (!plat->resume && plat->init) 804 plat->resume = stmmac_plat_resume; 805 806 return stmmac_dvr_probe(&pdev->dev, plat, res); 807} 808EXPORT_SYMBOL_GPL(stmmac_pltfr_probe); 809 810static void devm_stmmac_pltfr_remove(void *data) 811{ 812 struct platform_device *pdev = data; 813 814 stmmac_pltfr_remove(pdev); 815} 816 817/** 818 * devm_stmmac_pltfr_probe 819 * @pdev: pointer to the platform device 820 * @plat: driver data platform structure 821 * @res: stmmac resources 822 * Description: Devres variant of stmmac_pltfr_probe(). Allows users to skip 823 * calling stmmac_pltfr_remove() on driver detach. 824 */ 825int devm_stmmac_pltfr_probe(struct platform_device *pdev, 826 struct plat_stmmacenet_data *plat, 827 struct stmmac_resources *res) 828{ 829 int ret; 830 831 ret = stmmac_pltfr_probe(pdev, plat, res); 832 if (ret) 833 return ret; 834 835 return devm_add_action_or_reset(&pdev->dev, devm_stmmac_pltfr_remove, 836 pdev); 837} 838EXPORT_SYMBOL_GPL(devm_stmmac_pltfr_probe); 839 840/** 841 * stmmac_pltfr_remove 842 * @pdev: pointer to the platform device 843 * Description: This undoes the effects of stmmac_pltfr_probe() by removing the 844 * driver and calling the platform's exit() callback. 845 */ 846void stmmac_pltfr_remove(struct platform_device *pdev) 847{ 848 stmmac_dvr_remove(&pdev->dev); 849} 850EXPORT_SYMBOL_GPL(stmmac_pltfr_remove); 851 852static int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled) 853{ 854 struct plat_stmmacenet_data *plat_dat = priv->plat; 855 int ret; 856 857 if (enabled) { 858 ret = clk_prepare_enable(plat_dat->stmmac_clk); 859 if (ret) 860 return ret; 861 ret = clk_prepare_enable(plat_dat->pclk); 862 if (ret) { 863 clk_disable_unprepare(plat_dat->stmmac_clk); 864 return ret; 865 } 866 if (plat_dat->clks_config) { 867 ret = plat_dat->clks_config(plat_dat->bsp_priv, enabled); 868 if (ret) { 869 clk_disable_unprepare(plat_dat->stmmac_clk); 870 clk_disable_unprepare(plat_dat->pclk); 871 return ret; 872 } 873 } 874 } else { 875 clk_disable_unprepare(plat_dat->stmmac_clk); 876 clk_disable_unprepare(plat_dat->pclk); 877 if (plat_dat->clks_config) 878 plat_dat->clks_config(plat_dat->bsp_priv, enabled); 879 } 880 881 return 0; 882} 883 884static int __maybe_unused stmmac_runtime_suspend(struct device *dev) 885{ 886 struct net_device *ndev = dev_get_drvdata(dev); 887 struct stmmac_priv *priv = netdev_priv(ndev); 888 889 stmmac_bus_clks_config(priv, false); 890 891 return 0; 892} 893 894static int __maybe_unused stmmac_runtime_resume(struct device *dev) 895{ 896 struct net_device *ndev = dev_get_drvdata(dev); 897 struct stmmac_priv *priv = netdev_priv(ndev); 898 899 return stmmac_bus_clks_config(priv, true); 900} 901 902static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev) 903{ 904 struct net_device *ndev = dev_get_drvdata(dev); 905 struct stmmac_priv *priv = netdev_priv(ndev); 906 int ret; 907 908 if (!netif_running(ndev)) 909 return 0; 910 911 if (!priv->wolopts) { 912 /* Disable clock in case of PWM is off */ 913 clk_disable_unprepare(priv->plat->clk_ptp_ref); 914 915 ret = pm_runtime_force_suspend(dev); 916 if (ret) 917 return ret; 918 } 919 920 return 0; 921} 922 923static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev) 924{ 925 struct net_device *ndev = dev_get_drvdata(dev); 926 struct stmmac_priv *priv = netdev_priv(ndev); 927 int ret; 928 929 if (!netif_running(ndev)) 930 return 0; 931 932 if (!priv->wolopts) { 933 /* enable the clk previously disabled */ 934 ret = pm_runtime_force_resume(dev); 935 if (ret) 936 return ret; 937 938 ret = clk_prepare_enable(priv->plat->clk_ptp_ref); 939 if (ret < 0) { 940 netdev_warn(priv->dev, 941 "failed to enable PTP reference clock: %pe\n", 942 ERR_PTR(ret)); 943 return ret; 944 } 945 } 946 947 return 0; 948} 949 950const struct dev_pm_ops stmmac_pltfr_pm_ops = { 951 SET_SYSTEM_SLEEP_PM_OPS(stmmac_suspend, stmmac_resume) 952 SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL) 953 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume) 954}; 955EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops); 956 957MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support"); 958MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); 959MODULE_LICENSE("GPL");
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