dwmac-sunxi.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer
  4 *
  5 * Copyright (C) 2013 Chen-Yu Tsai
  6 *
  7 * Chen-Yu Tsai  <wens@csie.org>
  8 */
  9
 10#include <linux/stmmac.h>
 11#include <linux/clk.h>
 12#include <linux/module.h>
 13#include <linux/phy.h>
 14#include <linux/platform_device.h>
 15#include <linux/of_net.h>
 16#include <linux/regulator/consumer.h>
 17
 18#include "stmmac_platform.h"
 19
 20struct sunxi_priv_data {
 21	phy_interface_t interface;
 22	int clk_enabled;
 23	struct clk *tx_clk;
 24	struct regulator *regulator;
 25};
 26
 27#define SUN7I_GMAC_GMII_RGMII_RATE	125000000
 28#define SUN7I_GMAC_MII_RATE		25000000
 29
 30static int sun7i_gmac_init(struct device *dev, void *priv)
 31{
 32	struct sunxi_priv_data *gmac = priv;
 33	int ret = 0;
 34
 35	if (gmac->regulator) {
 36		ret = regulator_enable(gmac->regulator);
 37		if (ret)
 38			return ret;
 39	}
 40
 41	/* Set GMAC interface port mode
 42	 *
 43	 * The GMAC TX clock lines are configured by setting the clock
 44	 * rate, which then uses the auto-reparenting feature of the
 45	 * clock driver, and enabling/disabling the clock.
 46	 */
 47	if (phy_interface_mode_is_rgmii(gmac->interface)) {
 48		clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE);
 49		clk_prepare_enable(gmac->tx_clk);
 50		gmac->clk_enabled = 1;
 51	} else {
 52		clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE);
 53		ret = clk_prepare(gmac->tx_clk);
 54		if (ret && gmac->regulator)
 55			regulator_disable(gmac->regulator);
 56	}
 57
 58	return ret;
 59}
 60
 61static void sun7i_gmac_exit(struct device *dev, void *priv)
 62{
 63	struct sunxi_priv_data *gmac = priv;
 64
 65	if (gmac->clk_enabled) {
 66		clk_disable(gmac->tx_clk);
 67		gmac->clk_enabled = 0;
 68	}
 69	clk_unprepare(gmac->tx_clk);
 70
 71	if (gmac->regulator)
 72		regulator_disable(gmac->regulator);
 73}
 74
 75static int sun7i_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,
 76				 phy_interface_t interface, int speed)
 77{
 78	struct sunxi_priv_data *gmac = bsp_priv;
 79
 80	if (interface == PHY_INTERFACE_MODE_GMII) {
 81		if (gmac->clk_enabled) {
 82			clk_disable(gmac->tx_clk);
 83			gmac->clk_enabled = 0;
 84		}
 85		clk_unprepare(gmac->tx_clk);
 86
 87		if (speed == 1000) {
 88			clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE);
 89			clk_prepare_enable(gmac->tx_clk);
 90			gmac->clk_enabled = 1;
 91		} else {
 92			clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE);
 93			clk_prepare(gmac->tx_clk);
 94		}
 95	}
 96	return 0;
 97}
 98
 99static int sun7i_gmac_probe(struct platform_device *pdev)
100{
101	struct plat_stmmacenet_data *plat_dat;
102	struct stmmac_resources stmmac_res;
103	struct sunxi_priv_data *gmac;
104	struct device *dev = &pdev->dev;
105	int ret;
106
107	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
108	if (ret)
109		return ret;
110
111	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
112	if (IS_ERR(plat_dat))
113		return PTR_ERR(plat_dat);
114
115	gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL);
116	if (!gmac)
117		return -ENOMEM;
118
119	gmac->interface = plat_dat->phy_interface;
120
121	gmac->tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");
122	if (IS_ERR(gmac->tx_clk)) {
123		dev_err(dev, "could not get tx clock\n");
124		return PTR_ERR(gmac->tx_clk);
125	}
126
127	/* Optional regulator for PHY */
128	gmac->regulator = devm_regulator_get_optional(dev, "phy");
129	if (IS_ERR(gmac->regulator)) {
130		if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
131			return -EPROBE_DEFER;
132		dev_info(dev, "no regulator found\n");
133		gmac->regulator = NULL;
134	}
135
136	/* platform data specifying hardware features and callbacks.
137	 * hardware features were copied from Allwinner drivers. */
138	plat_dat->tx_coe = 1;
139	plat_dat->core_type = DWMAC_CORE_GMAC;
140	plat_dat->bsp_priv = gmac;
141	plat_dat->init = sun7i_gmac_init;
142	plat_dat->exit = sun7i_gmac_exit;
143	plat_dat->set_clk_tx_rate = sun7i_set_clk_tx_rate;
144	plat_dat->tx_fifo_size = 4096;
145	plat_dat->rx_fifo_size = 16384;
146
147	return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
148}
149
150static const struct of_device_id sun7i_dwmac_match[] = {
151	{ .compatible = "allwinner,sun7i-a20-gmac" },
152	{ }
153};
154MODULE_DEVICE_TABLE(of, sun7i_dwmac_match);
155
156static struct platform_driver sun7i_dwmac_driver = {
157	.probe  = sun7i_gmac_probe,
158	.driver = {
159		.name           = "sun7i-dwmac",
160		.pm		= &stmmac_pltfr_pm_ops,
161		.of_match_table = sun7i_dwmac_match,
162	},
163};
164module_platform_driver(sun7i_dwmac_driver);
165
166MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
167MODULE_DESCRIPTION("Allwinner sunxi DWMAC specific glue layer");
168MODULE_LICENSE("GPL");