rx.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/****************************************************************************
  3 * Driver for Solarflare network controllers and boards
  4 * Copyright 2005-2006 Fen Systems Ltd.
  5 * Copyright 2005-2013 Solarflare Communications Inc.
  6 */
  7
  8#include <linux/socket.h>
  9#include <linux/in.h>
 10#include <linux/slab.h>
 11#include <linux/ip.h>
 12#include <linux/ipv6.h>
 13#include <linux/tcp.h>
 14#include <linux/udp.h>
 15#include <linux/prefetch.h>
 16#include <linux/moduleparam.h>
 17#include <linux/iommu.h>
 18#include <net/ip.h>
 19#include <net/checksum.h>
 20#include "net_driver.h"
 21#include "efx.h"
 22#include "filter.h"
 23#include "nic.h"
 24#include "selftest.h"
 25#include "workarounds.h"
 26
 27/* Preferred number of descriptors to fill at once */
 28#define EF4_RX_PREFERRED_BATCH 8U
 29
 30/* Number of RX buffers to recycle pages for.  When creating the RX page recycle
 31 * ring, this number is divided by the number of buffers per page to calculate
 32 * the number of pages to store in the RX page recycle ring.
 33 */
 34#define EF4_RECYCLE_RING_SIZE_IOMMU 4096
 35#define EF4_RECYCLE_RING_SIZE_NOIOMMU (2 * EF4_RX_PREFERRED_BATCH)
 36
 37/* Size of buffer allocated for skb header area. */
 38#define EF4_SKB_HEADERS  128u
 39
 40/* This is the percentage fill level below which new RX descriptors
 41 * will be added to the RX descriptor ring.
 42 */
 43static unsigned int rx_refill_threshold;
 44
 45/* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
 46#define EF4_RX_MAX_FRAGS DIV_ROUND_UP(EF4_MAX_FRAME_LEN(EF4_MAX_MTU), \
 47				      EF4_RX_USR_BUF_SIZE)
 48
 49/*
 50 * RX maximum head room required.
 51 *
 52 * This must be at least 1 to prevent overflow, plus one packet-worth
 53 * to allow pipelined receives.
 54 */
 55#define EF4_RXD_HEAD_ROOM (1 + EF4_RX_MAX_FRAGS)
 56
 57static inline u8 *ef4_rx_buf_va(struct ef4_rx_buffer *buf)
 58{
 59	return page_address(buf->page) + buf->page_offset;
 60}
 61
 62static inline u32 ef4_rx_buf_hash(struct ef4_nic *efx, const u8 *eh)
 63{
 64#if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
 65	return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
 66#else
 67	const u8 *data = eh + efx->rx_packet_hash_offset;
 68	return (u32)data[0]	  |
 69	       (u32)data[1] << 8  |
 70	       (u32)data[2] << 16 |
 71	       (u32)data[3] << 24;
 72#endif
 73}
 74
 75static inline struct ef4_rx_buffer *
 76ef4_rx_buf_next(struct ef4_rx_queue *rx_queue, struct ef4_rx_buffer *rx_buf)
 77{
 78	if (unlikely(rx_buf == ef4_rx_buffer(rx_queue, rx_queue->ptr_mask)))
 79		return ef4_rx_buffer(rx_queue, 0);
 80	else
 81		return rx_buf + 1;
 82}
 83
 84static inline void ef4_sync_rx_buffer(struct ef4_nic *efx,
 85				      struct ef4_rx_buffer *rx_buf,
 86				      unsigned int len)
 87{
 88	dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
 89				DMA_FROM_DEVICE);
 90}
 91
 92void ef4_rx_config_page_split(struct ef4_nic *efx)
 93{
 94	efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
 95				      EF4_RX_BUF_ALIGNMENT);
 96	efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
 97		((PAGE_SIZE - sizeof(struct ef4_rx_page_state)) /
 98		 efx->rx_page_buf_step);
 99	efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
100		efx->rx_bufs_per_page;
101	efx->rx_pages_per_batch = DIV_ROUND_UP(EF4_RX_PREFERRED_BATCH,
102					       efx->rx_bufs_per_page);
103}
104
105/* Check the RX page recycle ring for a page that can be reused. */
106static struct page *ef4_reuse_page(struct ef4_rx_queue *rx_queue)
107{
108	struct ef4_nic *efx = rx_queue->efx;
109	struct page *page;
110	struct ef4_rx_page_state *state;
111	unsigned index;
112
113	if (unlikely(!rx_queue->page_ring))
114		return NULL;
115	index = rx_queue->page_remove & rx_queue->page_ptr_mask;
116	page = rx_queue->page_ring[index];
117	if (page == NULL)
118		return NULL;
119
120	rx_queue->page_ring[index] = NULL;
121	/* page_remove cannot exceed page_add. */
122	if (rx_queue->page_remove != rx_queue->page_add)
123		++rx_queue->page_remove;
124
125	/* If page_count is 1 then we hold the only reference to this page. */
126	if (page_count(page) == 1) {
127		++rx_queue->page_recycle_count;
128		return page;
129	} else {
130		state = page_address(page);
131		dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
132			       PAGE_SIZE << efx->rx_buffer_order,
133			       DMA_FROM_DEVICE);
134		put_page(page);
135		++rx_queue->page_recycle_failed;
136	}
137
138	return NULL;
139}
140
141/**
142 * ef4_init_rx_buffers - create EF4_RX_BATCH page-based RX buffers
143 *
144 * @rx_queue:		Efx RX queue
145 * @atomic:		control memory allocation flags
146 *
147 * This allocates a batch of pages, maps them for DMA, and populates
148 * struct ef4_rx_buffers for each one. Return a negative error code or
149 * 0 on success. If a single page can be used for multiple buffers,
150 * then the page will either be inserted fully, or not at all.
151 */
152static int ef4_init_rx_buffers(struct ef4_rx_queue *rx_queue, bool atomic)
153{
154	struct ef4_nic *efx = rx_queue->efx;
155	struct ef4_rx_buffer *rx_buf;
156	struct page *page;
157	unsigned int page_offset;
158	struct ef4_rx_page_state *state;
159	dma_addr_t dma_addr;
160	unsigned index, count;
161
162	count = 0;
163	do {
164		page = ef4_reuse_page(rx_queue);
165		if (page == NULL) {
166			page = alloc_pages(__GFP_COMP |
167					   (atomic ? GFP_ATOMIC : GFP_KERNEL),
168					   efx->rx_buffer_order);
169			if (unlikely(page == NULL))
170				return -ENOMEM;
171			dma_addr =
172				dma_map_page(&efx->pci_dev->dev, page, 0,
173					     PAGE_SIZE << efx->rx_buffer_order,
174					     DMA_FROM_DEVICE);
175			if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176						       dma_addr))) {
177				__free_pages(page, efx->rx_buffer_order);
178				return -EIO;
179			}
180			state = page_address(page);
181			state->dma_addr = dma_addr;
182		} else {
183			state = page_address(page);
184			dma_addr = state->dma_addr;
185		}
186
187		dma_addr += sizeof(struct ef4_rx_page_state);
188		page_offset = sizeof(struct ef4_rx_page_state);
189
190		do {
191			index = rx_queue->added_count & rx_queue->ptr_mask;
192			rx_buf = ef4_rx_buffer(rx_queue, index);
193			rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
194			rx_buf->page = page;
195			rx_buf->page_offset = page_offset + efx->rx_ip_align;
196			rx_buf->len = efx->rx_dma_len;
197			rx_buf->flags = 0;
198			++rx_queue->added_count;
199			get_page(page);
200			dma_addr += efx->rx_page_buf_step;
201			page_offset += efx->rx_page_buf_step;
202		} while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
203
204		rx_buf->flags = EF4_RX_BUF_LAST_IN_PAGE;
205	} while (++count < efx->rx_pages_per_batch);
206
207	return 0;
208}
209
210/* Unmap a DMA-mapped page.  This function is only called for the final RX
211 * buffer in a page.
212 */
213static void ef4_unmap_rx_buffer(struct ef4_nic *efx,
214				struct ef4_rx_buffer *rx_buf)
215{
216	struct page *page = rx_buf->page;
217
218	if (page) {
219		struct ef4_rx_page_state *state = page_address(page);
220		dma_unmap_page(&efx->pci_dev->dev,
221			       state->dma_addr,
222			       PAGE_SIZE << efx->rx_buffer_order,
223			       DMA_FROM_DEVICE);
224	}
225}
226
227static void ef4_free_rx_buffers(struct ef4_rx_queue *rx_queue,
228				struct ef4_rx_buffer *rx_buf,
229				unsigned int num_bufs)
230{
231	do {
232		if (rx_buf->page) {
233			put_page(rx_buf->page);
234			rx_buf->page = NULL;
235		}
236		rx_buf = ef4_rx_buf_next(rx_queue, rx_buf);
237	} while (--num_bufs);
238}
239
240/* Attempt to recycle the page if there is an RX recycle ring; the page can
241 * only be added if this is the final RX buffer, to prevent pages being used in
242 * the descriptor ring and appearing in the recycle ring simultaneously.
243 */
244static void ef4_recycle_rx_page(struct ef4_channel *channel,
245				struct ef4_rx_buffer *rx_buf)
246{
247	struct page *page = rx_buf->page;
248	struct ef4_rx_queue *rx_queue = ef4_channel_get_rx_queue(channel);
249	struct ef4_nic *efx = rx_queue->efx;
250	unsigned index;
251
252	/* Only recycle the page after processing the final buffer. */
253	if (!(rx_buf->flags & EF4_RX_BUF_LAST_IN_PAGE))
254		return;
255
256	index = rx_queue->page_add & rx_queue->page_ptr_mask;
257	if (rx_queue->page_ring[index] == NULL) {
258		unsigned read_index = rx_queue->page_remove &
259			rx_queue->page_ptr_mask;
260
261		/* The next slot in the recycle ring is available, but
262		 * increment page_remove if the read pointer currently
263		 * points here.
264		 */
265		if (read_index == index)
266			++rx_queue->page_remove;
267		rx_queue->page_ring[index] = page;
268		++rx_queue->page_add;
269		return;
270	}
271	++rx_queue->page_recycle_full;
272	ef4_unmap_rx_buffer(efx, rx_buf);
273	put_page(rx_buf->page);
274}
275
276static void ef4_fini_rx_buffer(struct ef4_rx_queue *rx_queue,
277			       struct ef4_rx_buffer *rx_buf)
278{
279	/* Release the page reference we hold for the buffer. */
280	if (rx_buf->page)
281		put_page(rx_buf->page);
282
283	/* If this is the last buffer in a page, unmap and free it. */
284	if (rx_buf->flags & EF4_RX_BUF_LAST_IN_PAGE) {
285		ef4_unmap_rx_buffer(rx_queue->efx, rx_buf);
286		ef4_free_rx_buffers(rx_queue, rx_buf, 1);
287	}
288	rx_buf->page = NULL;
289}
290
291/* Recycle the pages that are used by buffers that have just been received. */
292static void ef4_recycle_rx_pages(struct ef4_channel *channel,
293				 struct ef4_rx_buffer *rx_buf,
294				 unsigned int n_frags)
295{
296	struct ef4_rx_queue *rx_queue = ef4_channel_get_rx_queue(channel);
297
298	if (unlikely(!rx_queue->page_ring))
299		return;
300
301	do {
302		ef4_recycle_rx_page(channel, rx_buf);
303		rx_buf = ef4_rx_buf_next(rx_queue, rx_buf);
304	} while (--n_frags);
305}
306
307static void ef4_discard_rx_packet(struct ef4_channel *channel,
308				  struct ef4_rx_buffer *rx_buf,
309				  unsigned int n_frags)
310{
311	struct ef4_rx_queue *rx_queue = ef4_channel_get_rx_queue(channel);
312
313	ef4_recycle_rx_pages(channel, rx_buf, n_frags);
314
315	ef4_free_rx_buffers(rx_queue, rx_buf, n_frags);
316}
317
318/**
319 * ef4_fast_push_rx_descriptors - push new RX descriptors quickly
320 * @rx_queue:		RX descriptor queue
321 *
322 * This will aim to fill the RX descriptor queue up to
323 * @rx_queue->@max_fill. If there is insufficient atomic
324 * memory to do so, a slow fill will be scheduled.
325 * @atomic: control memory allocation flags
326 *
327 * The caller must provide serialisation (none is used here). In practise,
328 * this means this function must run from the NAPI handler, or be called
329 * when NAPI is disabled.
330 */
331void ef4_fast_push_rx_descriptors(struct ef4_rx_queue *rx_queue, bool atomic)
332{
333	struct ef4_nic *efx = rx_queue->efx;
334	unsigned int fill_level, batch_size;
335	int space, rc = 0;
336
337	if (!rx_queue->refill_enabled)
338		return;
339
340	/* Calculate current fill level, and exit if we don't need to fill */
341	fill_level = (rx_queue->added_count - rx_queue->removed_count);
342	EF4_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
343	if (fill_level >= rx_queue->fast_fill_trigger)
344		goto out;
345
346	/* Record minimum fill level */
347	if (unlikely(fill_level < rx_queue->min_fill)) {
348		if (fill_level)
349			rx_queue->min_fill = fill_level;
350	}
351
352	batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
353	space = rx_queue->max_fill - fill_level;
354	EF4_BUG_ON_PARANOID(space < batch_size);
355
356	netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
357		   "RX queue %d fast-filling descriptor ring from"
358		   " level %d to level %d\n",
359		   ef4_rx_queue_index(rx_queue), fill_level,
360		   rx_queue->max_fill);
361
362
363	do {
364		rc = ef4_init_rx_buffers(rx_queue, atomic);
365		if (unlikely(rc)) {
366			/* Ensure that we don't leave the rx queue empty */
367			if (rx_queue->added_count == rx_queue->removed_count)
368				ef4_schedule_slow_fill(rx_queue);
369			goto out;
370		}
371	} while ((space -= batch_size) >= batch_size);
372
373	netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
374		   "RX queue %d fast-filled descriptor ring "
375		   "to level %d\n", ef4_rx_queue_index(rx_queue),
376		   rx_queue->added_count - rx_queue->removed_count);
377
378 out:
379	if (rx_queue->notified_count != rx_queue->added_count)
380		ef4_nic_notify_rx_desc(rx_queue);
381}
382
383void ef4_rx_slow_fill(struct timer_list *t)
384{
385	struct ef4_rx_queue *rx_queue = timer_container_of(rx_queue, t,
386							   slow_fill);
387
388	/* Post an event to cause NAPI to run and refill the queue */
389	ef4_nic_generate_fill_event(rx_queue);
390	++rx_queue->slow_fill_count;
391}
392
393static void ef4_rx_packet__check_len(struct ef4_rx_queue *rx_queue,
394				     struct ef4_rx_buffer *rx_buf,
395				     int len)
396{
397	struct ef4_nic *efx = rx_queue->efx;
398	unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
399
400	if (likely(len <= max_len))
401		return;
402
403	/* The packet must be discarded, but this is only a fatal error
404	 * if the caller indicated it was
405	 */
406	rx_buf->flags |= EF4_RX_PKT_DISCARD;
407
408	if ((len > rx_buf->len) && EF4_WORKAROUND_8071(efx)) {
409		if (net_ratelimit())
410			netif_err(efx, rx_err, efx->net_dev,
411				  " RX queue %d seriously overlength "
412				  "RX event (0x%x > 0x%x+0x%x). Leaking\n",
413				  ef4_rx_queue_index(rx_queue), len, max_len,
414				  efx->type->rx_buffer_padding);
415		ef4_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
416	} else {
417		if (net_ratelimit())
418			netif_err(efx, rx_err, efx->net_dev,
419				  " RX queue %d overlength RX event "
420				  "(0x%x > 0x%x)\n",
421				  ef4_rx_queue_index(rx_queue), len, max_len);
422	}
423
424	ef4_rx_queue_channel(rx_queue)->n_rx_overlength++;
425}
426
427/* Pass a received packet up through GRO.  GRO can handle pages
428 * regardless of checksum state and skbs with a good checksum.
429 */
430static void
431ef4_rx_packet_gro(struct ef4_channel *channel, struct ef4_rx_buffer *rx_buf,
432		  unsigned int n_frags, u8 *eh)
433{
434	struct napi_struct *napi = &channel->napi_str;
435	struct ef4_nic *efx = channel->efx;
436	struct sk_buff *skb;
437
438	skb = napi_get_frags(napi);
439	if (unlikely(!skb)) {
440		struct ef4_rx_queue *rx_queue;
441
442		rx_queue = ef4_channel_get_rx_queue(channel);
443		ef4_free_rx_buffers(rx_queue, rx_buf, n_frags);
444		return;
445	}
446
447	if (efx->net_dev->features & NETIF_F_RXHASH)
448		skb_set_hash(skb, ef4_rx_buf_hash(efx, eh),
449			     PKT_HASH_TYPE_L3);
450	skb->ip_summed = ((rx_buf->flags & EF4_RX_PKT_CSUMMED) ?
451			  CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
452
453	for (;;) {
454		skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
455				   rx_buf->page, rx_buf->page_offset,
456				   rx_buf->len);
457		rx_buf->page = NULL;
458		skb->len += rx_buf->len;
459		if (skb_shinfo(skb)->nr_frags == n_frags)
460			break;
461
462		rx_buf = ef4_rx_buf_next(&channel->rx_queue, rx_buf);
463	}
464
465	skb->data_len = skb->len;
466	skb->truesize += n_frags * efx->rx_buffer_truesize;
467
468	skb_record_rx_queue(skb, channel->rx_queue.core_index);
469
470	napi_gro_frags(napi);
471}
472
473/* Allocate and construct an SKB around page fragments */
474static struct sk_buff *ef4_rx_mk_skb(struct ef4_channel *channel,
475				     struct ef4_rx_buffer *rx_buf,
476				     unsigned int n_frags,
477				     u8 *eh, int hdr_len)
478{
479	struct ef4_nic *efx = channel->efx;
480	struct sk_buff *skb;
481
482	/* Allocate an SKB to store the headers */
483	skb = netdev_alloc_skb(efx->net_dev,
484			       efx->rx_ip_align + efx->rx_prefix_size +
485			       hdr_len);
486	if (unlikely(skb == NULL)) {
487		atomic_inc(&efx->n_rx_noskb_drops);
488		return NULL;
489	}
490
491	EF4_BUG_ON_PARANOID(rx_buf->len < hdr_len);
492
493	memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
494	       efx->rx_prefix_size + hdr_len);
495	skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
496	__skb_put(skb, hdr_len);
497
498	/* Append the remaining page(s) onto the frag list */
499	if (rx_buf->len > hdr_len) {
500		rx_buf->page_offset += hdr_len;
501		rx_buf->len -= hdr_len;
502
503		for (;;) {
504			skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
505					   rx_buf->page, rx_buf->page_offset,
506					   rx_buf->len);
507			rx_buf->page = NULL;
508			skb->len += rx_buf->len;
509			skb->data_len += rx_buf->len;
510			if (skb_shinfo(skb)->nr_frags == n_frags)
511				break;
512
513			rx_buf = ef4_rx_buf_next(&channel->rx_queue, rx_buf);
514		}
515	} else {
516		__free_pages(rx_buf->page, efx->rx_buffer_order);
517		rx_buf->page = NULL;
518		n_frags = 0;
519	}
520
521	skb->truesize += n_frags * efx->rx_buffer_truesize;
522
523	/* Move past the ethernet header */
524	skb->protocol = eth_type_trans(skb, efx->net_dev);
525
526	skb_mark_napi_id(skb, &channel->napi_str);
527
528	return skb;
529}
530
531void ef4_rx_packet(struct ef4_rx_queue *rx_queue, unsigned int index,
532		   unsigned int n_frags, unsigned int len, u16 flags)
533{
534	struct ef4_nic *efx = rx_queue->efx;
535	struct ef4_channel *channel = ef4_rx_queue_channel(rx_queue);
536	struct ef4_rx_buffer *rx_buf;
537
538	rx_queue->rx_packets++;
539
540	rx_buf = ef4_rx_buffer(rx_queue, index);
541	rx_buf->flags |= flags;
542
543	/* Validate the number of fragments and completed length */
544	if (n_frags == 1) {
545		if (!(flags & EF4_RX_PKT_PREFIX_LEN))
546			ef4_rx_packet__check_len(rx_queue, rx_buf, len);
547	} else if (unlikely(n_frags > EF4_RX_MAX_FRAGS) ||
548		   unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
549		   unlikely(len > n_frags * efx->rx_dma_len) ||
550		   unlikely(!efx->rx_scatter)) {
551		/* If this isn't an explicit discard request, either
552		 * the hardware or the driver is broken.
553		 */
554		WARN_ON(!(len == 0 && rx_buf->flags & EF4_RX_PKT_DISCARD));
555		rx_buf->flags |= EF4_RX_PKT_DISCARD;
556	}
557
558	netif_vdbg(efx, rx_status, efx->net_dev,
559		   "RX queue %d received ids %x-%x len %d %s%s\n",
560		   ef4_rx_queue_index(rx_queue), index,
561		   (index + n_frags - 1) & rx_queue->ptr_mask, len,
562		   (rx_buf->flags & EF4_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
563		   (rx_buf->flags & EF4_RX_PKT_DISCARD) ? " [DISCARD]" : "");
564
565	/* Discard packet, if instructed to do so.  Process the
566	 * previous receive first.
567	 */
568	if (unlikely(rx_buf->flags & EF4_RX_PKT_DISCARD)) {
569		ef4_rx_flush_packet(channel);
570		ef4_discard_rx_packet(channel, rx_buf, n_frags);
571		return;
572	}
573
574	if (n_frags == 1 && !(flags & EF4_RX_PKT_PREFIX_LEN))
575		rx_buf->len = len;
576
577	/* Release and/or sync the DMA mapping - assumes all RX buffers
578	 * consumed in-order per RX queue.
579	 */
580	ef4_sync_rx_buffer(efx, rx_buf, rx_buf->len);
581
582	/* Prefetch nice and early so data will (hopefully) be in cache by
583	 * the time we look at it.
584	 */
585	prefetch(ef4_rx_buf_va(rx_buf));
586
587	rx_buf->page_offset += efx->rx_prefix_size;
588	rx_buf->len -= efx->rx_prefix_size;
589
590	if (n_frags > 1) {
591		/* Release/sync DMA mapping for additional fragments.
592		 * Fix length for last fragment.
593		 */
594		unsigned int tail_frags = n_frags - 1;
595
596		for (;;) {
597			rx_buf = ef4_rx_buf_next(rx_queue, rx_buf);
598			if (--tail_frags == 0)
599				break;
600			ef4_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
601		}
602		rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
603		ef4_sync_rx_buffer(efx, rx_buf, rx_buf->len);
604	}
605
606	/* All fragments have been DMA-synced, so recycle pages. */
607	rx_buf = ef4_rx_buffer(rx_queue, index);
608	ef4_recycle_rx_pages(channel, rx_buf, n_frags);
609
610	/* Pipeline receives so that we give time for packet headers to be
611	 * prefetched into cache.
612	 */
613	ef4_rx_flush_packet(channel);
614	channel->rx_pkt_n_frags = n_frags;
615	channel->rx_pkt_index = index;
616}
617
618static void ef4_rx_deliver(struct ef4_channel *channel, u8 *eh,
619			   struct ef4_rx_buffer *rx_buf,
620			   unsigned int n_frags)
621{
622	struct sk_buff *skb;
623	u16 hdr_len = min_t(u16, rx_buf->len, EF4_SKB_HEADERS);
624
625	skb = ef4_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
626	if (unlikely(skb == NULL)) {
627		struct ef4_rx_queue *rx_queue;
628
629		rx_queue = ef4_channel_get_rx_queue(channel);
630		ef4_free_rx_buffers(rx_queue, rx_buf, n_frags);
631		return;
632	}
633	skb_record_rx_queue(skb, channel->rx_queue.core_index);
634
635	/* Set the SKB flags */
636	skb_checksum_none_assert(skb);
637	if (likely(rx_buf->flags & EF4_RX_PKT_CSUMMED))
638		skb->ip_summed = CHECKSUM_UNNECESSARY;
639
640	if (channel->type->receive_skb)
641		if (channel->type->receive_skb(channel, skb))
642			return;
643
644	/* Pass the packet up */
645	netif_receive_skb(skb);
646}
647
648/* Handle a received packet.  Second half: Touches packet payload. */
649void __ef4_rx_packet(struct ef4_channel *channel)
650{
651	struct ef4_nic *efx = channel->efx;
652	struct ef4_rx_buffer *rx_buf =
653		ef4_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
654	u8 *eh = ef4_rx_buf_va(rx_buf);
655
656	/* Read length from the prefix if necessary.  This already
657	 * excludes the length of the prefix itself.
658	 */
659	if (rx_buf->flags & EF4_RX_PKT_PREFIX_LEN)
660		rx_buf->len = le16_to_cpup((__le16 *)
661					   (eh + efx->rx_packet_len_offset));
662
663	/* If we're in loopback test, then pass the packet directly to the
664	 * loopback layer, and free the rx_buf here
665	 */
666	if (unlikely(efx->loopback_selftest)) {
667		struct ef4_rx_queue *rx_queue;
668
669		ef4_loopback_rx_packet(efx, eh, rx_buf->len);
670		rx_queue = ef4_channel_get_rx_queue(channel);
671		ef4_free_rx_buffers(rx_queue, rx_buf,
672				    channel->rx_pkt_n_frags);
673		goto out;
674	}
675
676	if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
677		rx_buf->flags &= ~EF4_RX_PKT_CSUMMED;
678
679	if ((rx_buf->flags & EF4_RX_PKT_TCP) && !channel->type->receive_skb)
680		ef4_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
681	else
682		ef4_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
683out:
684	channel->rx_pkt_n_frags = 0;
685}
686
687int ef4_probe_rx_queue(struct ef4_rx_queue *rx_queue)
688{
689	struct ef4_nic *efx = rx_queue->efx;
690	unsigned int entries;
691	int rc;
692
693	/* Create the smallest power-of-two aligned ring */
694	entries = max(roundup_pow_of_two(efx->rxq_entries), EF4_MIN_DMAQ_SIZE);
695	EF4_BUG_ON_PARANOID(entries > EF4_MAX_DMAQ_SIZE);
696	rx_queue->ptr_mask = entries - 1;
697
698	netif_dbg(efx, probe, efx->net_dev,
699		  "creating RX queue %d size %#x mask %#x\n",
700		  ef4_rx_queue_index(rx_queue), efx->rxq_entries,
701		  rx_queue->ptr_mask);
702
703	/* Allocate RX buffers */
704	rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
705				   GFP_KERNEL);
706	if (!rx_queue->buffer)
707		return -ENOMEM;
708
709	rc = ef4_nic_probe_rx(rx_queue);
710	if (rc) {
711		kfree(rx_queue->buffer);
712		rx_queue->buffer = NULL;
713	}
714
715	return rc;
716}
717
718static void ef4_init_rx_recycle_ring(struct ef4_nic *efx,
719				     struct ef4_rx_queue *rx_queue)
720{
721	unsigned int bufs_in_recycle_ring, page_ring_size;
722	struct iommu_domain __maybe_unused *domain;
723
724	/* Set the RX recycle ring size */
725#ifdef CONFIG_PPC64
726	bufs_in_recycle_ring = EF4_RECYCLE_RING_SIZE_IOMMU;
727#else
728	domain = iommu_get_domain_for_dev(&efx->pci_dev->dev);
729	if (domain && domain->type != IOMMU_DOMAIN_IDENTITY)
730		bufs_in_recycle_ring = EF4_RECYCLE_RING_SIZE_IOMMU;
731	else
732		bufs_in_recycle_ring = EF4_RECYCLE_RING_SIZE_NOIOMMU;
733#endif /* CONFIG_PPC64 */
734
735	page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
736					    efx->rx_bufs_per_page);
737	rx_queue->page_ring = kcalloc(page_ring_size,
738				      sizeof(*rx_queue->page_ring), GFP_KERNEL);
739	if (!rx_queue->page_ring)
740		rx_queue->page_ptr_mask = 0;
741	else
742		rx_queue->page_ptr_mask = page_ring_size - 1;
743}
744
745void ef4_init_rx_queue(struct ef4_rx_queue *rx_queue)
746{
747	struct ef4_nic *efx = rx_queue->efx;
748	unsigned int max_fill, trigger, max_trigger;
749
750	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
751		  "initialising RX queue %d\n", ef4_rx_queue_index(rx_queue));
752
753	/* Initialise ptr fields */
754	rx_queue->added_count = 0;
755	rx_queue->notified_count = 0;
756	rx_queue->removed_count = 0;
757	rx_queue->min_fill = -1U;
758	ef4_init_rx_recycle_ring(efx, rx_queue);
759
760	rx_queue->page_remove = 0;
761	rx_queue->page_add = rx_queue->page_ptr_mask + 1;
762	rx_queue->page_recycle_count = 0;
763	rx_queue->page_recycle_failed = 0;
764	rx_queue->page_recycle_full = 0;
765
766	/* Initialise limit fields */
767	max_fill = efx->rxq_entries - EF4_RXD_HEAD_ROOM;
768	max_trigger =
769		max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
770	if (rx_refill_threshold != 0) {
771		trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
772		if (trigger > max_trigger)
773			trigger = max_trigger;
774	} else {
775		trigger = max_trigger;
776	}
777
778	rx_queue->max_fill = max_fill;
779	rx_queue->fast_fill_trigger = trigger;
780	rx_queue->refill_enabled = true;
781
782	/* Set up RX descriptor ring */
783	ef4_nic_init_rx(rx_queue);
784}
785
786void ef4_fini_rx_queue(struct ef4_rx_queue *rx_queue)
787{
788	int i;
789	struct ef4_nic *efx = rx_queue->efx;
790	struct ef4_rx_buffer *rx_buf;
791
792	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
793		  "shutting down RX queue %d\n", ef4_rx_queue_index(rx_queue));
794
795	timer_delete_sync(&rx_queue->slow_fill);
796
797	/* Release RX buffers from the current read ptr to the write ptr */
798	if (rx_queue->buffer) {
799		for (i = rx_queue->removed_count; i < rx_queue->added_count;
800		     i++) {
801			unsigned index = i & rx_queue->ptr_mask;
802			rx_buf = ef4_rx_buffer(rx_queue, index);
803			ef4_fini_rx_buffer(rx_queue, rx_buf);
804		}
805	}
806
807	/* Unmap and release the pages in the recycle ring. Remove the ring. */
808	for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
809		struct page *page = rx_queue->page_ring[i];
810		struct ef4_rx_page_state *state;
811
812		if (page == NULL)
813			continue;
814
815		state = page_address(page);
816		dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
817			       PAGE_SIZE << efx->rx_buffer_order,
818			       DMA_FROM_DEVICE);
819		put_page(page);
820	}
821	kfree(rx_queue->page_ring);
822	rx_queue->page_ring = NULL;
823}
824
825void ef4_remove_rx_queue(struct ef4_rx_queue *rx_queue)
826{
827	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
828		  "destroying RX queue %d\n", ef4_rx_queue_index(rx_queue));
829
830	ef4_nic_remove_rx(rx_queue);
831
832	kfree(rx_queue->buffer);
833	rx_queue->buffer = NULL;
834}
835
836
837module_param(rx_refill_threshold, uint, 0444);
838MODULE_PARM_DESC(rx_refill_threshold,
839		 "RX descriptor ring refill threshold (%)");
840
841#ifdef CONFIG_RFS_ACCEL
842
843int ef4_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
844		   u16 rxq_index, u32 flow_id)
845{
846	struct ef4_nic *efx = netdev_priv(net_dev);
847	struct ef4_channel *channel;
848	struct ef4_filter_spec spec;
849	struct flow_keys fk;
850	int rc;
851
852	if (flow_id == RPS_FLOW_ID_INVALID)
853		return -EINVAL;
854
855	if (!skb_flow_dissect_flow_keys(skb, &fk, 0))
856		return -EPROTONOSUPPORT;
857
858	if (fk.basic.n_proto != htons(ETH_P_IP) && fk.basic.n_proto != htons(ETH_P_IPV6))
859		return -EPROTONOSUPPORT;
860	if (fk.control.flags & FLOW_DIS_IS_FRAGMENT)
861		return -EPROTONOSUPPORT;
862
863	ef4_filter_init_rx(&spec, EF4_FILTER_PRI_HINT,
864			   efx->rx_scatter ? EF4_FILTER_FLAG_RX_SCATTER : 0,
865			   rxq_index);
866	spec.match_flags =
867		EF4_FILTER_MATCH_ETHER_TYPE | EF4_FILTER_MATCH_IP_PROTO |
868		EF4_FILTER_MATCH_LOC_HOST | EF4_FILTER_MATCH_LOC_PORT |
869		EF4_FILTER_MATCH_REM_HOST | EF4_FILTER_MATCH_REM_PORT;
870	spec.ether_type = fk.basic.n_proto;
871	spec.ip_proto = fk.basic.ip_proto;
872
873	if (fk.basic.n_proto == htons(ETH_P_IP)) {
874		spec.rem_host[0] = fk.addrs.v4addrs.src;
875		spec.loc_host[0] = fk.addrs.v4addrs.dst;
876	} else {
877		memcpy(spec.rem_host, &fk.addrs.v6addrs.src, sizeof(struct in6_addr));
878		memcpy(spec.loc_host, &fk.addrs.v6addrs.dst, sizeof(struct in6_addr));
879	}
880
881	spec.rem_port = fk.ports.src;
882	spec.loc_port = fk.ports.dst;
883
884	rc = efx->type->filter_rfs_insert(efx, &spec);
885	if (rc < 0)
886		return rc;
887
888	/* Remember this so we can check whether to expire the filter later */
889	channel = ef4_get_channel(efx, rxq_index);
890	channel->rps_flow_id[rc] = flow_id;
891	++channel->rfs_filters_added;
892
893	if (spec.ether_type == htons(ETH_P_IP))
894		netif_info(efx, rx_status, efx->net_dev,
895			   "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
896			   (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
897			   spec.rem_host, ntohs(spec.rem_port), spec.loc_host,
898			   ntohs(spec.loc_port), rxq_index, flow_id, rc);
899	else
900		netif_info(efx, rx_status, efx->net_dev,
901			   "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
902			   (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
903			   spec.rem_host, ntohs(spec.rem_port), spec.loc_host,
904			   ntohs(spec.loc_port), rxq_index, flow_id, rc);
905
906	return rc;
907}
908
909bool __ef4_filter_rfs_expire(struct ef4_nic *efx, unsigned int quota)
910{
911	bool (*expire_one)(struct ef4_nic *efx, u32 flow_id, unsigned int index);
912	unsigned int channel_idx, index, size;
913	u32 flow_id;
914
915	if (!spin_trylock_bh(&efx->filter_lock))
916		return false;
917
918	expire_one = efx->type->filter_rfs_expire_one;
919	channel_idx = efx->rps_expire_channel;
920	index = efx->rps_expire_index;
921	size = efx->type->max_rx_ip_filters;
922	while (quota--) {
923		struct ef4_channel *channel = ef4_get_channel(efx, channel_idx);
924		flow_id = channel->rps_flow_id[index];
925
926		if (flow_id != RPS_FLOW_ID_INVALID &&
927		    expire_one(efx, flow_id, index)) {
928			netif_info(efx, rx_status, efx->net_dev,
929				   "expired filter %d [queue %u flow %u]\n",
930				   index, channel_idx, flow_id);
931			channel->rps_flow_id[index] = RPS_FLOW_ID_INVALID;
932		}
933		if (++index == size) {
934			if (++channel_idx == efx->n_channels)
935				channel_idx = 0;
936			index = 0;
937		}
938	}
939	efx->rps_expire_channel = channel_idx;
940	efx->rps_expire_index = index;
941
942	spin_unlock_bh(&efx->filter_lock);
943	return true;
944}
945
946#endif /* CONFIG_RFS_ACCEL */
947
948/**
949 * ef4_filter_is_mc_recipient - test whether spec is a multicast recipient
950 * @spec: Specification to test
951 *
952 * Return: %true if the specification is a non-drop RX filter that
953 * matches a local MAC address I/G bit value of 1 or matches a local
954 * IPv4 or IPv6 address value in the respective multicast address
955 * range.  Otherwise %false.
956 */
957bool ef4_filter_is_mc_recipient(const struct ef4_filter_spec *spec)
958{
959	if (!(spec->flags & EF4_FILTER_FLAG_RX) ||
960	    spec->dmaq_id == EF4_FILTER_RX_DMAQ_ID_DROP)
961		return false;
962
963	if (spec->match_flags &
964	    (EF4_FILTER_MATCH_LOC_MAC | EF4_FILTER_MATCH_LOC_MAC_IG) &&
965	    is_multicast_ether_addr(spec->loc_mac))
966		return true;
967
968	if ((spec->match_flags &
969	     (EF4_FILTER_MATCH_ETHER_TYPE | EF4_FILTER_MATCH_LOC_HOST)) ==
970	    (EF4_FILTER_MATCH_ETHER_TYPE | EF4_FILTER_MATCH_LOC_HOST)) {
971		if (spec->ether_type == htons(ETH_P_IP) &&
972		    ipv4_is_multicast(spec->loc_host[0]))
973			return true;
974		if (spec->ether_type == htons(ETH_P_IPV6) &&
975		    ((const u8 *)spec->loc_host)[0] == 0xff)
976			return true;
977	}
978
979	return false;
980}