qed_hw.h

  1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
  2/* QLogic qed NIC Driver
  3 * Copyright (c) 2015-2017  QLogic Corporation
  4 * Copyright (c) 2019-2020 Marvell International Ltd.
  5 */
  6
  7#ifndef _QED_HW_H
  8#define _QED_HW_H
  9
 10#include <linux/types.h>
 11#include <linux/bitops.h>
 12#include <linux/slab.h>
 13#include <linux/string.h>
 14#include "qed.h"
 15#include "qed_dev_api.h"
 16
 17/* Forward decleration */
 18struct qed_ptt;
 19
 20enum reserved_ptts {
 21	RESERVED_PTT_EDIAG,
 22	RESERVED_PTT_USER_SPACE,
 23	RESERVED_PTT_MAIN,
 24	RESERVED_PTT_DPC,
 25	RESERVED_PTT_MAX
 26};
 27
 28enum _dmae_cmd_dst_mask {
 29	DMAE_CMD_DST_MASK_NONE	= 0,
 30	DMAE_CMD_DST_MASK_PCIE	= 1,
 31	DMAE_CMD_DST_MASK_GRC	= 2
 32};
 33
 34enum _dmae_cmd_src_mask {
 35	DMAE_CMD_SRC_MASK_PCIE	= 0,
 36	DMAE_CMD_SRC_MASK_GRC	= 1
 37};
 38
 39enum _dmae_cmd_crc_mask {
 40	DMAE_CMD_COMP_CRC_EN_MASK_NONE	= 0,
 41	DMAE_CMD_COMP_CRC_EN_MASK_SET	= 1
 42};
 43
 44/* definitions for DMA constants */
 45#define DMAE_GO_VALUE   0x1
 46
 47#define DMAE_COMPLETION_VAL     0xD1AE
 48#define DMAE_CMD_ENDIANITY      0x2
 49
 50#define DMAE_CMD_SIZE   14
 51#define DMAE_CMD_SIZE_TO_FILL   (DMAE_CMD_SIZE - 5)
 52#define DMAE_MIN_WAIT_TIME      0x2
 53#define DMAE_MAX_CLIENTS        32
 54
 55/**
 56 * qed_gtt_init(): Initialize GTT windows.
 57 *
 58 * @p_hwfn: HW device data.
 59 *
 60 * Return: Void.
 61 */
 62void qed_gtt_init(struct qed_hwfn *p_hwfn);
 63
 64/**
 65 * qed_ptt_pool_alloc(): Allocate and initialize PTT pool.
 66 *
 67 * @p_hwfn: HW device data.
 68 *
 69 * Return: struct _qed_status - success (0), negative - error.
 70 */
 71int qed_ptt_pool_alloc(struct qed_hwfn *p_hwfn);
 72
 73/**
 74 * qed_ptt_pool_free(): Free PTT pool.
 75 *
 76 * @p_hwfn: HW device data.
 77 *
 78 * Return: Void.
 79 */
 80void qed_ptt_pool_free(struct qed_hwfn *p_hwfn);
 81
 82/**
 83 * qed_ptt_get_hw_addr(): Get PTT's GRC/HW address.
 84 *
 85 * @p_hwfn: HW device data.
 86 * @p_ptt: P_ptt
 87 *
 88 * Return: u32.
 89 */
 90u32 qed_ptt_get_hw_addr(struct qed_hwfn *p_hwfn,
 91			struct qed_ptt *p_ptt);
 92
 93/**
 94 * qed_ptt_get_bar_addr(): Get PPT's external BAR address.
 95 *
 96 * @p_ptt: P_ptt
 97 *
 98 * Return: u32.
 99 */
100u32 qed_ptt_get_bar_addr(struct qed_ptt *p_ptt);
101
102/**
103 * qed_ptt_set_win(): Set PTT Window's GRC BAR address
104 *
105 * @p_hwfn: HW device data.
106 * @new_hw_addr: New HW address.
107 * @p_ptt: P_Ptt
108 *
109 * Return: Void.
110 */
111void qed_ptt_set_win(struct qed_hwfn *p_hwfn,
112		     struct qed_ptt *p_ptt,
113		     u32 new_hw_addr);
114
115/**
116 * qed_get_reserved_ptt(): Get a specific reserved PTT.
117 *
118 * @p_hwfn: HW device data.
119 * @ptt_idx: Ptt Index.
120 *
121 * Return: struct qed_ptt *.
122 */
123struct qed_ptt *qed_get_reserved_ptt(struct qed_hwfn *p_hwfn,
124				     enum reserved_ptts ptt_idx);
125
126/**
127 * qed_wr(): Write value to BAR using the given ptt.
128 *
129 * @p_hwfn: HW device data.
130 * @p_ptt: P_ptt.
131 * @val: Val.
132 * @hw_addr: HW address
133 *
134 * Return: Void.
135 */
136void qed_wr(struct qed_hwfn *p_hwfn,
137	    struct qed_ptt *p_ptt,
138	    u32 hw_addr,
139	    u32 val);
140
141/**
142 * qed_rd(): Read value from BAR using the given ptt.
143 *
144 * @p_hwfn: HW device data.
145 * @p_ptt: P_ptt.
146 * @hw_addr: HW address
147 *
148 * Return: Void.
149 */
150u32 qed_rd(struct qed_hwfn *p_hwfn,
151	   struct qed_ptt *p_ptt,
152	   u32 hw_addr);
153
154/**
155 * qed_memcpy_from(): Copy n bytes from BAR using the given ptt.
156 *
157 * @p_hwfn: HW device data.
158 * @p_ptt: P_ptt.
159 * @dest: Destination.
160 * @hw_addr: HW address.
161 * @n: N
162 *
163 * Return: Void.
164 */
165void qed_memcpy_from(struct qed_hwfn *p_hwfn,
166		     struct qed_ptt *p_ptt,
167		     void *dest,
168		     u32 hw_addr,
169		     size_t n);
170
171/**
172 * qed_memcpy_to(): Copy n bytes to BAR using the given  ptt
173 *
174 * @p_hwfn: HW device data.
175 * @p_ptt: P_ptt.
176 * @hw_addr: HW address.
177 * @src: Source.
178 * @n: N
179 *
180 * Return: Void.
181 */
182void qed_memcpy_to(struct qed_hwfn *p_hwfn,
183		   struct qed_ptt *p_ptt,
184		   u32 hw_addr,
185		   void *src,
186		   size_t n);
187/**
188 * qed_fid_pretend(): pretend to another function when
189 *                    accessing the ptt window. There is no way to unpretend
190 *                    a function. The only way to cancel a pretend is to
191 *                    pretend back to the original function.
192 *
193 * @p_hwfn: HW device data.
194 * @p_ptt: P_ptt.
195 * @fid: fid field of pxp_pretend structure. Can contain
196 *        either pf / vf, port/path fields are don't care.
197 *
198 * Return: Void.
199 */
200void qed_fid_pretend(struct qed_hwfn *p_hwfn,
201		     struct qed_ptt *p_ptt,
202		     u16 fid);
203
204/**
205 * qed_port_pretend(): Pretend to another port when accessing the ptt window
206 *
207 * @p_hwfn: HW device data.
208 * @p_ptt: P_ptt.
209 * @port_id: The port to pretend to
210 *
211 * Return: Void.
212 */
213void qed_port_pretend(struct qed_hwfn *p_hwfn,
214		      struct qed_ptt *p_ptt,
215		      u8 port_id);
216
217/**
218 * qed_port_unpretend(): Cancel any previously set port pretend
219 *
220 * @p_hwfn: HW device data.
221 * @p_ptt: P_ptt.
222 *
223 * Return: Void.
224 */
225void qed_port_unpretend(struct qed_hwfn *p_hwfn,
226			struct qed_ptt *p_ptt);
227
228/**
229 * qed_port_fid_pretend(): Pretend to another port and another function
230 *                         when accessing the ptt window
231 *
232 * @p_hwfn: HW device data.
233 * @p_ptt: P_ptt.
234 * @port_id: The port to pretend to
235 * @fid: fid field of pxp_pretend structure. Can contain either pf / vf.
236 *
237 * Return: Void.
238 */
239void qed_port_fid_pretend(struct qed_hwfn *p_hwfn,
240			  struct qed_ptt *p_ptt, u8 port_id, u16 fid);
241
242/**
243 * qed_vfid_to_concrete(): Build a concrete FID for a given VF ID
244 *
245 * @p_hwfn: HW device data.
246 * @vfid: VFID.
247 *
248 * Return: Void.
249 */
250u32 qed_vfid_to_concrete(struct qed_hwfn *p_hwfn, u8 vfid);
251
252/**
253 * qed_dmae_idx_to_go_cmd(): Map the idx to dmae cmd
254 *    this is declared here since other files will require it.
255 *
256 * @idx: Index
257 *
258 * Return: Void.
259 */
260u32 qed_dmae_idx_to_go_cmd(u8 idx);
261
262/**
263 * qed_dmae_info_alloc(): Init the dmae_info structure
264 *                        which is part of p_hwfn.
265 *
266 * @p_hwfn: HW device data.
267 *
268 * Return: Int.
269 */
270int qed_dmae_info_alloc(struct qed_hwfn *p_hwfn);
271
272/**
273 * qed_dmae_info_free(): Free the dmae_info structure
274 *                       which is part of p_hwfn.
275 *
276 * @p_hwfn: HW device data.
277 *
278 * Return: Void.
279 */
280void qed_dmae_info_free(struct qed_hwfn *p_hwfn);
281
282union qed_qm_pq_params {
283	struct {
284		u8 q_idx;
285	} iscsi;
286
287	struct {
288		u8 tc;
289	}	core;
290
291	struct {
292		u8	is_vf;
293		u8	vf_id;
294		u8	tc;
295	}	eth;
296
297	struct {
298		u8 dcqcn;
299		u8 qpid;	/* roce relative */
300	} roce;
301};
302
303int qed_init_fw_data(struct qed_dev *cdev,
304		     const u8 *fw_data);
305
306int qed_dmae_sanity(struct qed_hwfn *p_hwfn,
307		    struct qed_ptt *p_ptt, const char *phase);
308
309#define QED_HW_ERR_MAX_STR_SIZE 256
310
311/**
312 * qed_hw_err_notify(): Notify upper layer driver and management FW
313 *                      about a HW error.
314 *
315 * @p_hwfn: HW device data.
316 * @p_ptt: P_ptt.
317 * @err_type: Err Type.
318 * @fmt: Debug data buffer to send to the MFW
319 * @...: buffer format args
320 *
321 * Return void.
322 */
323void __printf(4, 5) __cold qed_hw_err_notify(struct qed_hwfn *p_hwfn,
324					     struct qed_ptt *p_ptt,
325					     enum qed_hw_err_type err_type,
326					     const char *fmt, ...);
327#endif