sparx5_vcap_impl.h

  1/* SPDX-License-Identifier: GPL-2.0+ */
  2/* Microchip Sparx5 Switch driver VCAP implementation
  3 *
  4 * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
  5 *
  6 * The Sparx5 Chip Register Model can be browsed at this location:
  7 * https://github.com/microchip-ung/sparx-5_reginfo
  8 */
  9
 10#ifndef __SPARX5_VCAP_IMPL_H__
 11#define __SPARX5_VCAP_IMPL_H__
 12
 13#include <linux/types.h>
 14#include <linux/list.h>
 15
 16#include "vcap_api.h"
 17#include "vcap_api_client.h"
 18
 19#define SPARX5_IS2_LOOKUPS 4
 20#define SPARX5_IS0_LOOKUPS 6
 21#define SPARX5_ES0_LOOKUPS 1
 22#define SPARX5_ES2_LOOKUPS 2
 23
 24#define SPARX5_VCAP_CID_IS0_L0 VCAP_CID_INGRESS_L0 /* IS0/CLM lookup 0 */
 25#define SPARX5_VCAP_CID_IS0_L1 VCAP_CID_INGRESS_L1 /* IS0/CLM lookup 1 */
 26#define SPARX5_VCAP_CID_IS0_L2 VCAP_CID_INGRESS_L2 /* IS0/CLM lookup 2 */
 27#define SPARX5_VCAP_CID_IS0_L3 VCAP_CID_INGRESS_L3 /* IS0/CLM lookup 3 */
 28#define SPARX5_VCAP_CID_IS0_L4 VCAP_CID_INGRESS_L4 /* IS0/CLM lookup 4 */
 29#define SPARX5_VCAP_CID_IS0_L5 VCAP_CID_INGRESS_L5 /* IS0/CLM lookup 5 */
 30#define SPARX5_VCAP_CID_IS0_MAX \
 31	(VCAP_CID_INGRESS_L5 + VCAP_CID_LOOKUP_SIZE - 1) /* IS0/CLM Max */
 32
 33#define SPARX5_VCAP_CID_IS2_L0 VCAP_CID_INGRESS_STAGE2_L0 /* IS2 lookup 0 */
 34#define SPARX5_VCAP_CID_IS2_L1 VCAP_CID_INGRESS_STAGE2_L1 /* IS2 lookup 1 */
 35#define SPARX5_VCAP_CID_IS2_L2 VCAP_CID_INGRESS_STAGE2_L2 /* IS2 lookup 2 */
 36#define SPARX5_VCAP_CID_IS2_L3 VCAP_CID_INGRESS_STAGE2_L3 /* IS2 lookup 3 */
 37#define SPARX5_VCAP_CID_IS2_MAX \
 38	(VCAP_CID_INGRESS_STAGE2_L3 + VCAP_CID_LOOKUP_SIZE - 1) /* IS2 Max */
 39
 40#define SPARX5_VCAP_CID_ES0_L0 VCAP_CID_EGRESS_L0 /* ES0 lookup 0 */
 41#define SPARX5_VCAP_CID_ES0_MAX (VCAP_CID_EGRESS_L1 - 1) /* ES0 Max */
 42
 43#define SPARX5_VCAP_CID_ES2_L0 VCAP_CID_EGRESS_STAGE2_L0 /* ES2 lookup 0 */
 44#define SPARX5_VCAP_CID_ES2_L1 VCAP_CID_EGRESS_STAGE2_L1 /* ES2 lookup 1 */
 45#define SPARX5_VCAP_CID_ES2_MAX \
 46	(VCAP_CID_EGRESS_STAGE2_L1 + VCAP_CID_LOOKUP_SIZE - 1) /* ES2 Max */
 47
 48struct sparx5_vcap_inst {
 49	enum vcap_type vtype; /* type of vcap */
 50	int vinst; /* instance number within the same type */
 51	int lookups; /* number of lookups in this vcap type */
 52	int lookups_per_instance; /* number of lookups in this instance */
 53	int first_cid; /* first chain id in this vcap */
 54	int last_cid; /* last chain id in this vcap */
 55	int count; /* number of available addresses, not in super vcap */
 56	int map_id; /* id in the super vcap block mapping (if applicable) */
 57	int blockno; /* starting block in super vcap (if applicable) */
 58	int blocks; /* number of blocks in super vcap (if applicable) */
 59	bool ingress; /* is vcap in the ingress path */
 60};
 61
 62extern const struct sparx5_vcap_inst sparx5_vcap_inst_cfg[];
 63
 64/* IS0 port keyset selection control */
 65
 66/* IS0 ethernet, IPv4, IPv6 traffic type keyset generation */
 67enum vcap_is0_port_sel_etype {
 68	VCAP_IS0_PS_ETYPE_DEFAULT, /* None or follow depending on class */
 69	VCAP_IS0_PS_ETYPE_MLL,
 70	VCAP_IS0_PS_ETYPE_SGL_MLBS,
 71	VCAP_IS0_PS_ETYPE_DBL_MLBS,
 72	VCAP_IS0_PS_ETYPE_TRI_MLBS,
 73	VCAP_IS0_PS_ETYPE_TRI_VID,
 74	VCAP_IS0_PS_ETYPE_LL_FULL,
 75	VCAP_IS0_PS_ETYPE_NORMAL_SRC,
 76	VCAP_IS0_PS_ETYPE_NORMAL_DST,
 77	VCAP_IS0_PS_ETYPE_NORMAL_7TUPLE,
 78	VCAP_IS0_PS_ETYPE_NORMAL_5TUPLE_IP4,
 79	VCAP_IS0_PS_ETYPE_PURE_5TUPLE_IP4,
 80	VCAP_IS0_PS_ETYPE_DBL_VID_IDX,
 81	VCAP_IS0_PS_ETYPE_ETAG,
 82	VCAP_IS0_PS_ETYPE_NO_LOOKUP,
 83};
 84
 85/* IS0 MPLS traffic type keyset generation */
 86enum vcap_is0_port_sel_mpls_uc_mc {
 87	VCAP_IS0_PS_MPLS_FOLLOW_ETYPE,
 88	VCAP_IS0_PS_MPLS_MLL,
 89	VCAP_IS0_PS_MPLS_SGL_MLBS,
 90	VCAP_IS0_PS_MPLS_DBL_MLBS,
 91	VCAP_IS0_PS_MPLS_TRI_MLBS,
 92	VCAP_IS0_PS_MPLS_TRI_VID,
 93	VCAP_IS0_PS_MPLS_LL_FULL,
 94	VCAP_IS0_PS_MPLS_NORMAL_SRC,
 95	VCAP_IS0_PS_MPLS_NORMAL_DST,
 96	VCAP_IS0_PS_MPLS_NORMAL_7TUPLE,
 97	VCAP_IS0_PS_MPLS_NORMAL_5TUPLE_IP4,
 98	VCAP_IS0_PS_MPLS_PURE_5TUPLE_IP4,
 99	VCAP_IS0_PS_MPLS_DBL_VID_IDX,
100	VCAP_IS0_PS_MPLS_ETAG,
101	VCAP_IS0_PS_MPLS_NO_LOOKUP,
102};
103
104/* IS0 MBLS traffic type keyset generation */
105enum vcap_is0_port_sel_mlbs {
106	VCAP_IS0_PS_MLBS_FOLLOW_ETYPE,
107	VCAP_IS0_PS_MLBS_SGL_MLBS,
108	VCAP_IS0_PS_MLBS_DBL_MLBS,
109	VCAP_IS0_PS_MLBS_TRI_MLBS,
110	VCAP_IS0_PS_MLBS_NO_LOOKUP = 17,
111};
112
113/* IS2 port keyset selection control */
114
115/* IS2 non-ethernet traffic type keyset generation */
116enum vcap_is2_port_sel_noneth {
117	VCAP_IS2_PS_NONETH_MAC_ETYPE,
118	VCAP_IS2_PS_NONETH_CUSTOM_1,
119	VCAP_IS2_PS_NONETH_CUSTOM_2,
120	VCAP_IS2_PS_NONETH_NO_LOOKUP
121};
122
123/* IS2 IPv4 unicast traffic type keyset generation */
124enum vcap_is2_port_sel_ipv4_uc {
125	VCAP_IS2_PS_IPV4_UC_MAC_ETYPE,
126	VCAP_IS2_PS_IPV4_UC_IP4_TCP_UDP_OTHER,
127	VCAP_IS2_PS_IPV4_UC_IP_7TUPLE,
128};
129
130/* IS2 IPv4 multicast traffic type keyset generation */
131enum vcap_is2_port_sel_ipv4_mc {
132	VCAP_IS2_PS_IPV4_MC_MAC_ETYPE,
133	VCAP_IS2_PS_IPV4_MC_IP4_TCP_UDP_OTHER,
134	VCAP_IS2_PS_IPV4_MC_IP_7TUPLE,
135	VCAP_IS2_PS_IPV4_MC_IP4_VID,
136};
137
138/* IS2 IPv6 unicast traffic type keyset generation */
139enum vcap_is2_port_sel_ipv6_uc {
140	VCAP_IS2_PS_IPV6_UC_MAC_ETYPE,
141	VCAP_IS2_PS_IPV6_UC_IP_7TUPLE,
142	VCAP_IS2_PS_IPV6_UC_IP6_STD,
143	VCAP_IS2_PS_IPV6_UC_IP4_TCP_UDP_OTHER,
144};
145
146/* IS2 IPv6 multicast traffic type keyset generation */
147enum vcap_is2_port_sel_ipv6_mc {
148	VCAP_IS2_PS_IPV6_MC_MAC_ETYPE,
149	VCAP_IS2_PS_IPV6_MC_IP_7TUPLE,
150	VCAP_IS2_PS_IPV6_MC_IP6_VID,
151	VCAP_IS2_PS_IPV6_MC_IP6_STD,
152	VCAP_IS2_PS_IPV6_MC_IP4_TCP_UDP_OTHER,
153};
154
155/* IS2 ARP traffic type keyset generation */
156enum vcap_is2_port_sel_arp {
157	VCAP_IS2_PS_ARP_MAC_ETYPE,
158	VCAP_IS2_PS_ARP_ARP,
159};
160
161/* ES0 port keyset selection control */
162
163/* ES0 Egress port traffic type classification */
164enum vcap_es0_port_sel {
165	VCAP_ES0_PS_NORMAL_SELECTION,
166	VCAP_ES0_PS_FORCE_ISDX_LOOKUPS,
167	VCAP_ES0_PS_FORCE_VID_LOOKUPS,
168	VCAP_ES0_PS_RESERVED,
169};
170
171/* ES2 port keyset selection control */
172
173/* ES2 IPv4 traffic type keyset generation */
174enum vcap_es2_port_sel_ipv4 {
175	VCAP_ES2_PS_IPV4_MAC_ETYPE,
176	VCAP_ES2_PS_IPV4_IP_7TUPLE,
177	VCAP_ES2_PS_IPV4_IP4_TCP_UDP_VID,
178	VCAP_ES2_PS_IPV4_IP4_TCP_UDP_OTHER,
179	VCAP_ES2_PS_IPV4_IP4_VID,
180	VCAP_ES2_PS_IPV4_IP4_OTHER,
181};
182
183/* ES2 IPv6 traffic type keyset generation */
184enum vcap_es2_port_sel_ipv6 {
185	VCAP_ES2_PS_IPV6_MAC_ETYPE,
186	VCAP_ES2_PS_IPV6_IP_7TUPLE,
187	VCAP_ES2_PS_IPV6_IP_7TUPLE_VID,
188	VCAP_ES2_PS_IPV6_IP_7TUPLE_STD,
189	VCAP_ES2_PS_IPV6_IP6_VID,
190	VCAP_ES2_PS_IPV6_IP6_STD,
191	VCAP_ES2_PS_IPV6_IP4_DOWNGRADE,
192};
193
194/* ES2 ARP traffic type keyset generation */
195enum vcap_es2_port_sel_arp {
196	VCAP_ES2_PS_ARP_MAC_ETYPE,
197	VCAP_ES2_PS_ARP_ARP,
198};
199
200/* Selects TPID for ES0 matching */
201enum SPX5_TPID_SEL {
202	SPX5_TPID_SEL_UNTAGGED,
203	SPX5_TPID_SEL_8100,
204	SPX5_TPID_SEL_UNUSED_0,
205	SPX5_TPID_SEL_UNUSED_1,
206	SPX5_TPID_SEL_88A8,
207	SPX5_TPID_SEL_TPIDCFG_1,
208	SPX5_TPID_SEL_TPIDCFG_2,
209	SPX5_TPID_SEL_TPIDCFG_3,
210};
211
212/* Get the port keyset for the vcap lookup */
213int sparx5_vcap_get_port_keyset(struct net_device *ndev,
214				struct vcap_admin *admin,
215				int cid,
216				u16 l3_proto,
217				struct vcap_keyset_list *kslist);
218
219/* Change the port keyset for the lookup and protocol */
220void sparx5_vcap_set_port_keyset(struct net_device *ndev,
221				 struct vcap_admin *admin, int cid,
222				 u16 l3_proto, enum vcap_keyfield_set keyset,
223				 struct vcap_keyset_list *orig);
224
225/* Check if the ethertype is supported by the vcap port classification */
226bool sparx5_vcap_is_known_etype(struct vcap_admin *admin, u16 etype);
227
228#endif /* __SPARX5_VCAP_IMPL_H__ */