lan966x_fdma.c

   1// SPDX-License-Identifier: GPL-2.0+
   2
   3#include <linux/bpf.h>
   4#include <linux/filter.h>
   5#include <net/page_pool/helpers.h>
   6
   7#include "lan966x_main.h"
   8
   9static int lan966x_fdma_rx_dataptr_cb(struct fdma *fdma, int dcb, int db,
  10				      u64 *dataptr)
  11{
  12	struct lan966x *lan966x = (struct lan966x *)fdma->priv;
  13	struct lan966x_rx *rx = &lan966x->rx;
  14	struct page *page;
  15
  16	page = page_pool_dev_alloc_pages(rx->page_pool);
  17	if (unlikely(!page))
  18		return -ENOMEM;
  19
  20	rx->page[dcb][db] = page;
  21	*dataptr = page_pool_get_dma_addr(page) + XDP_PACKET_HEADROOM;
  22
  23	return 0;
  24}
  25
  26static int lan966x_fdma_tx_dataptr_cb(struct fdma *fdma, int dcb, int db,
  27				      u64 *dataptr)
  28{
  29	struct lan966x *lan966x = (struct lan966x *)fdma->priv;
  30
  31	*dataptr = lan966x->tx.dcbs_buf[dcb].dma_addr;
  32
  33	return 0;
  34}
  35
  36static int lan966x_fdma_xdp_tx_dataptr_cb(struct fdma *fdma, int dcb, int db,
  37					  u64 *dataptr)
  38{
  39	struct lan966x *lan966x = (struct lan966x *)fdma->priv;
  40
  41	*dataptr = lan966x->tx.dcbs_buf[dcb].dma_addr + XDP_PACKET_HEADROOM;
  42
  43	return 0;
  44}
  45
  46static int lan966x_fdma_channel_active(struct lan966x *lan966x)
  47{
  48	return lan_rd(lan966x, FDMA_CH_ACTIVE);
  49}
  50
  51static void lan966x_fdma_rx_free_pages(struct lan966x_rx *rx)
  52{
  53	struct fdma *fdma = &rx->fdma;
  54	int i, j;
  55
  56	for (i = 0; i < fdma->n_dcbs; ++i) {
  57		for (j = 0; j < fdma->n_dbs; ++j)
  58			page_pool_put_full_page(rx->page_pool,
  59						rx->page[i][j], false);
  60	}
  61}
  62
  63static void lan966x_fdma_rx_free_page(struct lan966x_rx *rx)
  64{
  65	struct fdma *fdma = &rx->fdma;
  66	struct page *page;
  67
  68	page = rx->page[fdma->dcb_index][fdma->db_index];
  69	if (unlikely(!page))
  70		return;
  71
  72	page_pool_recycle_direct(rx->page_pool, page);
  73}
  74
  75static int lan966x_fdma_rx_alloc_page_pool(struct lan966x_rx *rx)
  76{
  77	struct lan966x *lan966x = rx->lan966x;
  78	struct page_pool_params pp_params = {
  79		.order = rx->page_order,
  80		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,
  81		.pool_size = rx->fdma.n_dcbs,
  82		.nid = NUMA_NO_NODE,
  83		.dev = lan966x->dev,
  84		.dma_dir = DMA_FROM_DEVICE,
  85		.offset = XDP_PACKET_HEADROOM,
  86		.max_len = rx->max_mtu -
  87			   SKB_DATA_ALIGN(sizeof(struct skb_shared_info)),
  88	};
  89
  90	if (lan966x_xdp_present(lan966x))
  91		pp_params.dma_dir = DMA_BIDIRECTIONAL;
  92
  93	rx->page_pool = page_pool_create(&pp_params);
  94	if (unlikely(IS_ERR(rx->page_pool)))
  95		return PTR_ERR(rx->page_pool);
  96
  97	for (int i = 0; i < lan966x->num_phys_ports; ++i) {
  98		struct lan966x_port *port;
  99
 100		if (!lan966x->ports[i])
 101			continue;
 102
 103		port = lan966x->ports[i];
 104		xdp_rxq_info_unreg_mem_model(&port->xdp_rxq);
 105		xdp_rxq_info_reg_mem_model(&port->xdp_rxq, MEM_TYPE_PAGE_POOL,
 106					   rx->page_pool);
 107	}
 108
 109	return PTR_ERR_OR_ZERO(rx->page_pool);
 110}
 111
 112static int lan966x_fdma_rx_alloc(struct lan966x_rx *rx)
 113{
 114	struct lan966x *lan966x = rx->lan966x;
 115	struct fdma *fdma = &rx->fdma;
 116	int err;
 117
 118	if (lan966x_fdma_rx_alloc_page_pool(rx))
 119		return PTR_ERR(rx->page_pool);
 120
 121	err = fdma_alloc_coherent(lan966x->dev, fdma);
 122	if (err) {
 123		page_pool_destroy(rx->page_pool);
 124		return err;
 125	}
 126
 127	fdma_dcbs_init(fdma, FDMA_DCB_INFO_DATAL(fdma->db_size),
 128		       FDMA_DCB_STATUS_INTR);
 129
 130	return 0;
 131}
 132
 133static void lan966x_fdma_rx_start(struct lan966x_rx *rx)
 134{
 135	struct lan966x *lan966x = rx->lan966x;
 136	struct fdma *fdma = &rx->fdma;
 137	u32 mask;
 138
 139	/* When activating a channel, first is required to write the first DCB
 140	 * address and then to activate it
 141	 */
 142	lan_wr(lower_32_bits((u64)fdma->dma), lan966x,
 143	       FDMA_DCB_LLP(fdma->channel_id));
 144	lan_wr(upper_32_bits((u64)fdma->dma), lan966x,
 145	       FDMA_DCB_LLP1(fdma->channel_id));
 146
 147	lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) |
 148	       FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) |
 149	       FDMA_CH_CFG_CH_INJ_PORT_SET(0) |
 150	       FDMA_CH_CFG_CH_MEM_SET(1),
 151	       lan966x, FDMA_CH_CFG(fdma->channel_id));
 152
 153	/* Start fdma */
 154	lan_rmw(FDMA_PORT_CTRL_XTR_STOP_SET(0),
 155		FDMA_PORT_CTRL_XTR_STOP,
 156		lan966x, FDMA_PORT_CTRL(0));
 157
 158	/* Enable interrupts */
 159	mask = lan_rd(lan966x, FDMA_INTR_DB_ENA);
 160	mask = FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(mask);
 161	mask |= BIT(fdma->channel_id);
 162	lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask),
 163		FDMA_INTR_DB_ENA_INTR_DB_ENA,
 164		lan966x, FDMA_INTR_DB_ENA);
 165
 166	/* Activate the channel */
 167	lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)),
 168		FDMA_CH_ACTIVATE_CH_ACTIVATE,
 169		lan966x, FDMA_CH_ACTIVATE);
 170}
 171
 172static void lan966x_fdma_rx_disable(struct lan966x_rx *rx)
 173{
 174	struct lan966x *lan966x = rx->lan966x;
 175	struct fdma *fdma = &rx->fdma;
 176	u32 val;
 177
 178	/* Disable the channel */
 179	lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)),
 180		FDMA_CH_DISABLE_CH_DISABLE,
 181		lan966x, FDMA_CH_DISABLE);
 182
 183	readx_poll_timeout_atomic(lan966x_fdma_channel_active, lan966x,
 184				  val, !(val & BIT(fdma->channel_id)),
 185				  READL_SLEEP_US, READL_TIMEOUT_US);
 186
 187	lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)),
 188		FDMA_CH_DB_DISCARD_DB_DISCARD,
 189		lan966x, FDMA_CH_DB_DISCARD);
 190}
 191
 192static void lan966x_fdma_rx_reload(struct lan966x_rx *rx)
 193{
 194	struct lan966x *lan966x = rx->lan966x;
 195
 196	lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(rx->fdma.channel_id)),
 197		FDMA_CH_RELOAD_CH_RELOAD,
 198		lan966x, FDMA_CH_RELOAD);
 199}
 200
 201static int lan966x_fdma_tx_alloc(struct lan966x_tx *tx)
 202{
 203	struct lan966x *lan966x = tx->lan966x;
 204	struct fdma *fdma = &tx->fdma;
 205	int err;
 206
 207	tx->dcbs_buf = kcalloc(fdma->n_dcbs, sizeof(struct lan966x_tx_dcb_buf),
 208			       GFP_KERNEL);
 209	if (!tx->dcbs_buf)
 210		return -ENOMEM;
 211
 212	err = fdma_alloc_coherent(lan966x->dev, fdma);
 213	if (err)
 214		goto out;
 215
 216	fdma_dcbs_init(fdma, 0, 0);
 217
 218	return 0;
 219
 220out:
 221	kfree(tx->dcbs_buf);
 222	return -ENOMEM;
 223}
 224
 225static void lan966x_fdma_tx_free(struct lan966x_tx *tx)
 226{
 227	struct lan966x *lan966x = tx->lan966x;
 228
 229	kfree(tx->dcbs_buf);
 230	fdma_free_coherent(lan966x->dev, &tx->fdma);
 231}
 232
 233static void lan966x_fdma_tx_activate(struct lan966x_tx *tx)
 234{
 235	struct lan966x *lan966x = tx->lan966x;
 236	struct fdma *fdma = &tx->fdma;
 237	u32 mask;
 238
 239	/* When activating a channel, first is required to write the first DCB
 240	 * address and then to activate it
 241	 */
 242	lan_wr(lower_32_bits((u64)fdma->dma), lan966x,
 243	       FDMA_DCB_LLP(fdma->channel_id));
 244	lan_wr(upper_32_bits((u64)fdma->dma), lan966x,
 245	       FDMA_DCB_LLP1(fdma->channel_id));
 246
 247	lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) |
 248	       FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) |
 249	       FDMA_CH_CFG_CH_INJ_PORT_SET(0) |
 250	       FDMA_CH_CFG_CH_MEM_SET(1),
 251	       lan966x, FDMA_CH_CFG(fdma->channel_id));
 252
 253	/* Start fdma */
 254	lan_rmw(FDMA_PORT_CTRL_INJ_STOP_SET(0),
 255		FDMA_PORT_CTRL_INJ_STOP,
 256		lan966x, FDMA_PORT_CTRL(0));
 257
 258	/* Enable interrupts */
 259	mask = lan_rd(lan966x, FDMA_INTR_DB_ENA);
 260	mask = FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(mask);
 261	mask |= BIT(fdma->channel_id);
 262	lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask),
 263		FDMA_INTR_DB_ENA_INTR_DB_ENA,
 264		lan966x, FDMA_INTR_DB_ENA);
 265
 266	/* Activate the channel */
 267	lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)),
 268		FDMA_CH_ACTIVATE_CH_ACTIVATE,
 269		lan966x, FDMA_CH_ACTIVATE);
 270}
 271
 272static void lan966x_fdma_tx_disable(struct lan966x_tx *tx)
 273{
 274	struct lan966x *lan966x = tx->lan966x;
 275	struct fdma *fdma = &tx->fdma;
 276	u32 val;
 277
 278	/* Disable the channel */
 279	lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)),
 280		FDMA_CH_DISABLE_CH_DISABLE,
 281		lan966x, FDMA_CH_DISABLE);
 282
 283	readx_poll_timeout_atomic(lan966x_fdma_channel_active, lan966x,
 284				  val, !(val & BIT(fdma->channel_id)),
 285				  READL_SLEEP_US, READL_TIMEOUT_US);
 286
 287	lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)),
 288		FDMA_CH_DB_DISCARD_DB_DISCARD,
 289		lan966x, FDMA_CH_DB_DISCARD);
 290
 291	tx->activated = false;
 292}
 293
 294static void lan966x_fdma_tx_reload(struct lan966x_tx *tx)
 295{
 296	struct lan966x *lan966x = tx->lan966x;
 297
 298	/* Write the registers to reload the channel */
 299	lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(tx->fdma.channel_id)),
 300		FDMA_CH_RELOAD_CH_RELOAD,
 301		lan966x, FDMA_CH_RELOAD);
 302}
 303
 304static void lan966x_fdma_wakeup_netdev(struct lan966x *lan966x)
 305{
 306	struct lan966x_port *port;
 307	int i;
 308
 309	for (i = 0; i < lan966x->num_phys_ports; ++i) {
 310		port = lan966x->ports[i];
 311		if (!port)
 312			continue;
 313
 314		if (netif_queue_stopped(port->dev))
 315			netif_wake_queue(port->dev);
 316	}
 317}
 318
 319static void lan966x_fdma_stop_netdev(struct lan966x *lan966x)
 320{
 321	struct lan966x_port *port;
 322	int i;
 323
 324	for (i = 0; i < lan966x->num_phys_ports; ++i) {
 325		port = lan966x->ports[i];
 326		if (!port)
 327			continue;
 328
 329		netif_stop_queue(port->dev);
 330	}
 331}
 332
 333static void lan966x_fdma_tx_clear_buf(struct lan966x *lan966x, int weight)
 334{
 335	struct lan966x_tx *tx = &lan966x->tx;
 336	struct lan966x_rx *rx = &lan966x->rx;
 337	struct lan966x_tx_dcb_buf *dcb_buf;
 338	struct fdma *fdma = &tx->fdma;
 339	struct xdp_frame_bulk bq;
 340	unsigned long flags;
 341	bool clear = false;
 342	struct fdma_db *db;
 343	int i;
 344
 345	xdp_frame_bulk_init(&bq);
 346
 347	spin_lock_irqsave(&lan966x->tx_lock, flags);
 348	for (i = 0; i < fdma->n_dcbs; ++i) {
 349		dcb_buf = &tx->dcbs_buf[i];
 350
 351		if (!dcb_buf->used)
 352			continue;
 353
 354		db = fdma_db_get(fdma, i, 0);
 355		if (!fdma_db_is_done(db))
 356			continue;
 357
 358		dcb_buf->dev->stats.tx_packets++;
 359		dcb_buf->dev->stats.tx_bytes += dcb_buf->len;
 360
 361		dcb_buf->used = false;
 362		if (dcb_buf->use_skb) {
 363			dma_unmap_single(lan966x->dev,
 364					 dcb_buf->dma_addr,
 365					 dcb_buf->len,
 366					 DMA_TO_DEVICE);
 367
 368			if (!dcb_buf->ptp)
 369				napi_consume_skb(dcb_buf->data.skb, weight);
 370		} else {
 371			if (dcb_buf->xdp_ndo)
 372				dma_unmap_single(lan966x->dev,
 373						 dcb_buf->dma_addr,
 374						 dcb_buf->len,
 375						 DMA_TO_DEVICE);
 376
 377			if (dcb_buf->xdp_ndo)
 378				xdp_return_frame_bulk(dcb_buf->data.xdpf, &bq);
 379			else
 380				page_pool_recycle_direct(rx->page_pool,
 381							 dcb_buf->data.page);
 382		}
 383
 384		clear = true;
 385	}
 386
 387	xdp_flush_frame_bulk(&bq);
 388
 389	if (clear)
 390		lan966x_fdma_wakeup_netdev(lan966x);
 391
 392	spin_unlock_irqrestore(&lan966x->tx_lock, flags);
 393}
 394
 395static int lan966x_fdma_rx_check_frame(struct lan966x_rx *rx, u64 *src_port)
 396{
 397	struct lan966x *lan966x = rx->lan966x;
 398	struct fdma *fdma = &rx->fdma;
 399	struct lan966x_port *port;
 400	struct fdma_db *db;
 401	struct page *page;
 402
 403	db = fdma_db_next_get(fdma);
 404	page = rx->page[fdma->dcb_index][fdma->db_index];
 405	if (unlikely(!page))
 406		return FDMA_ERROR;
 407
 408	dma_sync_single_for_cpu(lan966x->dev,
 409				(dma_addr_t)db->dataptr + XDP_PACKET_HEADROOM,
 410				FDMA_DCB_STATUS_BLOCKL(db->status),
 411				DMA_FROM_DEVICE);
 412
 413	lan966x_ifh_get_src_port(page_address(page) + XDP_PACKET_HEADROOM,
 414				 src_port);
 415	if (WARN_ON(*src_port >= lan966x->num_phys_ports))
 416		return FDMA_ERROR;
 417
 418	port = lan966x->ports[*src_port];
 419	if (!lan966x_xdp_port_present(port))
 420		return FDMA_PASS;
 421
 422	return lan966x_xdp_run(port, page, FDMA_DCB_STATUS_BLOCKL(db->status));
 423}
 424
 425static struct sk_buff *lan966x_fdma_rx_get_frame(struct lan966x_rx *rx,
 426						 u64 src_port)
 427{
 428	struct lan966x *lan966x = rx->lan966x;
 429	struct fdma *fdma = &rx->fdma;
 430	struct sk_buff *skb;
 431	struct fdma_db *db;
 432	struct page *page;
 433	u64 timestamp;
 434
 435	/* Get the received frame and unmap it */
 436	db = fdma_db_next_get(fdma);
 437	page = rx->page[fdma->dcb_index][fdma->db_index];
 438
 439	skb = build_skb(page_address(page), fdma->db_size);
 440	if (unlikely(!skb))
 441		goto free_page;
 442
 443	skb_mark_for_recycle(skb);
 444
 445	skb_reserve(skb, XDP_PACKET_HEADROOM);
 446	skb_put(skb, FDMA_DCB_STATUS_BLOCKL(db->status));
 447
 448	lan966x_ifh_get_timestamp(skb->data, &timestamp);
 449
 450	skb->dev = lan966x->ports[src_port]->dev;
 451	skb_pull(skb, IFH_LEN_BYTES);
 452
 453	if (likely(!(skb->dev->features & NETIF_F_RXFCS)))
 454		skb_trim(skb, skb->len - ETH_FCS_LEN);
 455
 456	lan966x_ptp_rxtstamp(lan966x, skb, src_port, timestamp);
 457	skb->protocol = eth_type_trans(skb, skb->dev);
 458
 459	if (lan966x->bridge_mask & BIT(src_port)) {
 460		skb->offload_fwd_mark = 1;
 461
 462		skb_reset_network_header(skb);
 463		if (!lan966x_hw_offload(lan966x, src_port, skb))
 464			skb->offload_fwd_mark = 0;
 465	}
 466
 467	skb->dev->stats.rx_bytes += skb->len;
 468	skb->dev->stats.rx_packets++;
 469
 470	return skb;
 471
 472free_page:
 473	page_pool_recycle_direct(rx->page_pool, page);
 474
 475	return NULL;
 476}
 477
 478static int lan966x_fdma_napi_poll(struct napi_struct *napi, int weight)
 479{
 480	struct lan966x *lan966x = container_of(napi, struct lan966x, napi);
 481	struct lan966x_rx *rx = &lan966x->rx;
 482	int old_dcb, dcb_reload, counter = 0;
 483	struct fdma *fdma = &rx->fdma;
 484	bool redirect = false;
 485	struct sk_buff *skb;
 486	u64 src_port;
 487
 488	dcb_reload = fdma->dcb_index;
 489
 490	lan966x_fdma_tx_clear_buf(lan966x, weight);
 491
 492	/* Get all received skb */
 493	while (counter < weight) {
 494		if (!fdma_has_frames(fdma))
 495			break;
 496
 497		counter++;
 498
 499		switch (lan966x_fdma_rx_check_frame(rx, &src_port)) {
 500		case FDMA_PASS:
 501			break;
 502		case FDMA_ERROR:
 503			lan966x_fdma_rx_free_page(rx);
 504			fdma_dcb_advance(fdma);
 505			goto allocate_new;
 506		case FDMA_REDIRECT:
 507			redirect = true;
 508			fallthrough;
 509		case FDMA_TX:
 510			fdma_dcb_advance(fdma);
 511			continue;
 512		case FDMA_DROP:
 513			lan966x_fdma_rx_free_page(rx);
 514			fdma_dcb_advance(fdma);
 515			continue;
 516		}
 517
 518		skb = lan966x_fdma_rx_get_frame(rx, src_port);
 519		fdma_dcb_advance(fdma);
 520		if (!skb)
 521			goto allocate_new;
 522
 523		napi_gro_receive(&lan966x->napi, skb);
 524	}
 525
 526allocate_new:
 527	/* Allocate new pages and map them */
 528	while (dcb_reload != fdma->dcb_index) {
 529		old_dcb = dcb_reload;
 530		dcb_reload++;
 531		dcb_reload &= fdma->n_dcbs - 1;
 532
 533		fdma_dcb_add(fdma, old_dcb, FDMA_DCB_INFO_DATAL(fdma->db_size),
 534			     FDMA_DCB_STATUS_INTR);
 535
 536		lan966x_fdma_rx_reload(rx);
 537	}
 538
 539	if (redirect)
 540		xdp_do_flush();
 541
 542	if (counter < weight && napi_complete_done(napi, counter))
 543		lan_wr(0xff, lan966x, FDMA_INTR_DB_ENA);
 544
 545	return counter;
 546}
 547
 548irqreturn_t lan966x_fdma_irq_handler(int irq, void *args)
 549{
 550	struct lan966x *lan966x = args;
 551	u32 db, err, err_type;
 552
 553	db = lan_rd(lan966x, FDMA_INTR_DB);
 554	err = lan_rd(lan966x, FDMA_INTR_ERR);
 555
 556	if (db) {
 557		lan_wr(0, lan966x, FDMA_INTR_DB_ENA);
 558		lan_wr(db, lan966x, FDMA_INTR_DB);
 559
 560		napi_schedule(&lan966x->napi);
 561	}
 562
 563	if (err) {
 564		err_type = lan_rd(lan966x, FDMA_ERRORS);
 565
 566		WARN(1, "Unexpected error: %d, error_type: %d\n", err, err_type);
 567
 568		lan_wr(err, lan966x, FDMA_INTR_ERR);
 569		lan_wr(err_type, lan966x, FDMA_ERRORS);
 570	}
 571
 572	return IRQ_HANDLED;
 573}
 574
 575static int lan966x_fdma_get_next_dcb(struct lan966x_tx *tx)
 576{
 577	struct lan966x_tx_dcb_buf *dcb_buf;
 578	struct fdma *fdma = &tx->fdma;
 579	int i;
 580
 581	for (i = 0; i < fdma->n_dcbs; ++i) {
 582		dcb_buf = &tx->dcbs_buf[i];
 583		if (!dcb_buf->used &&
 584		    !fdma_is_last(&tx->fdma, &tx->fdma.dcbs[i]))
 585			return i;
 586	}
 587
 588	return -1;
 589}
 590
 591static void lan966x_fdma_tx_start(struct lan966x_tx *tx)
 592{
 593	struct lan966x *lan966x = tx->lan966x;
 594
 595	if (likely(lan966x->tx.activated)) {
 596		lan966x_fdma_tx_reload(tx);
 597	} else {
 598		/* Because it is first time, then just activate */
 599		lan966x->tx.activated = true;
 600		lan966x_fdma_tx_activate(tx);
 601	}
 602}
 603
 604int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, void *ptr, u32 len)
 605{
 606	struct lan966x *lan966x = port->lan966x;
 607	struct lan966x_tx_dcb_buf *next_dcb_buf;
 608	struct lan966x_tx *tx = &lan966x->tx;
 609	struct xdp_frame *xdpf;
 610	dma_addr_t dma_addr;
 611	struct page *page;
 612	int next_to_use;
 613	__be32 *ifh;
 614	int ret = 0;
 615
 616	spin_lock(&lan966x->tx_lock);
 617
 618	/* Get next index */
 619	next_to_use = lan966x_fdma_get_next_dcb(tx);
 620	if (next_to_use < 0) {
 621		netif_stop_queue(port->dev);
 622		ret = NETDEV_TX_BUSY;
 623		goto out;
 624	}
 625
 626	/* Get the next buffer */
 627	next_dcb_buf = &tx->dcbs_buf[next_to_use];
 628
 629	/* Generate new IFH */
 630	if (!len) {
 631		xdpf = ptr;
 632
 633		if (xdpf->headroom < IFH_LEN_BYTES) {
 634			ret = NETDEV_TX_OK;
 635			goto out;
 636		}
 637
 638		ifh = xdpf->data - IFH_LEN_BYTES;
 639		memset(ifh, 0x0, sizeof(__be32) * IFH_LEN);
 640		lan966x_ifh_set_bypass(ifh, 1);
 641		lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port));
 642
 643		dma_addr = dma_map_single(lan966x->dev,
 644					  xdpf->data - IFH_LEN_BYTES,
 645					  xdpf->len + IFH_LEN_BYTES,
 646					  DMA_TO_DEVICE);
 647		if (dma_mapping_error(lan966x->dev, dma_addr)) {
 648			ret = NETDEV_TX_OK;
 649			goto out;
 650		}
 651
 652		next_dcb_buf->data.xdpf = xdpf;
 653		next_dcb_buf->len = xdpf->len + IFH_LEN_BYTES;
 654	} else {
 655		page = ptr;
 656
 657		ifh = page_address(page) + XDP_PACKET_HEADROOM;
 658		memset(ifh, 0x0, sizeof(__be32) * IFH_LEN);
 659		lan966x_ifh_set_bypass(ifh, 1);
 660		lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port));
 661
 662		dma_addr = page_pool_get_dma_addr(page);
 663		dma_sync_single_for_device(lan966x->dev,
 664					   dma_addr + XDP_PACKET_HEADROOM,
 665					   len + IFH_LEN_BYTES,
 666					   DMA_TO_DEVICE);
 667
 668		next_dcb_buf->data.page = page;
 669		next_dcb_buf->len = len + IFH_LEN_BYTES;
 670	}
 671
 672	/* Fill up the buffer */
 673	next_dcb_buf->use_skb = false;
 674	next_dcb_buf->xdp_ndo = !len;
 675	next_dcb_buf->dma_addr = dma_addr;
 676	next_dcb_buf->used = true;
 677	next_dcb_buf->ptp = false;
 678	next_dcb_buf->dev = port->dev;
 679
 680	__fdma_dcb_add(&tx->fdma,
 681		       next_to_use,
 682		       0,
 683		       FDMA_DCB_STATUS_INTR |
 684		       FDMA_DCB_STATUS_SOF |
 685		       FDMA_DCB_STATUS_EOF |
 686		       FDMA_DCB_STATUS_BLOCKO(0) |
 687		       FDMA_DCB_STATUS_BLOCKL(next_dcb_buf->len),
 688		       &fdma_nextptr_cb,
 689		       &lan966x_fdma_xdp_tx_dataptr_cb);
 690
 691	/* Start the transmission */
 692	lan966x_fdma_tx_start(tx);
 693
 694out:
 695	spin_unlock(&lan966x->tx_lock);
 696
 697	return ret;
 698}
 699
 700int lan966x_fdma_xmit(struct sk_buff *skb, __be32 *ifh, struct net_device *dev)
 701{
 702	struct lan966x_port *port = netdev_priv(dev);
 703	struct lan966x *lan966x = port->lan966x;
 704	struct lan966x_tx_dcb_buf *next_dcb_buf;
 705	struct lan966x_tx *tx = &lan966x->tx;
 706	int needed_headroom;
 707	int needed_tailroom;
 708	dma_addr_t dma_addr;
 709	int next_to_use;
 710	int err;
 711
 712	/* Get next index */
 713	next_to_use = lan966x_fdma_get_next_dcb(tx);
 714	if (next_to_use < 0) {
 715		netif_stop_queue(dev);
 716		return NETDEV_TX_BUSY;
 717	}
 718
 719	if (skb_put_padto(skb, ETH_ZLEN)) {
 720		dev->stats.tx_dropped++;
 721		return NETDEV_TX_OK;
 722	}
 723
 724	/* skb processing */
 725	needed_headroom = max_t(int, IFH_LEN_BYTES - skb_headroom(skb), 0);
 726	needed_tailroom = max_t(int, ETH_FCS_LEN - skb_tailroom(skb), 0);
 727	if (needed_headroom || needed_tailroom || skb_header_cloned(skb)) {
 728		err = pskb_expand_head(skb, needed_headroom, needed_tailroom,
 729				       GFP_ATOMIC);
 730		if (unlikely(err)) {
 731			dev->stats.tx_dropped++;
 732			err = NETDEV_TX_OK;
 733			goto release;
 734		}
 735	}
 736
 737	skb_tx_timestamp(skb);
 738	skb_push(skb, IFH_LEN_BYTES);
 739	memcpy(skb->data, ifh, IFH_LEN_BYTES);
 740	skb_put(skb, 4);
 741
 742	dma_addr = dma_map_single(lan966x->dev, skb->data, skb->len,
 743				  DMA_TO_DEVICE);
 744	if (dma_mapping_error(lan966x->dev, dma_addr)) {
 745		dev->stats.tx_dropped++;
 746		err = NETDEV_TX_OK;
 747		goto release;
 748	}
 749
 750	/* Fill up the buffer */
 751	next_dcb_buf = &tx->dcbs_buf[next_to_use];
 752	next_dcb_buf->use_skb = true;
 753	next_dcb_buf->data.skb = skb;
 754	next_dcb_buf->xdp_ndo = false;
 755	next_dcb_buf->len = skb->len;
 756	next_dcb_buf->dma_addr = dma_addr;
 757	next_dcb_buf->used = true;
 758	next_dcb_buf->ptp = false;
 759	next_dcb_buf->dev = dev;
 760
 761	fdma_dcb_add(&tx->fdma,
 762		     next_to_use,
 763		     0,
 764		     FDMA_DCB_STATUS_INTR |
 765		     FDMA_DCB_STATUS_SOF |
 766		     FDMA_DCB_STATUS_EOF |
 767		     FDMA_DCB_STATUS_BLOCKO(0) |
 768		     FDMA_DCB_STATUS_BLOCKL(skb->len));
 769
 770	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
 771	    LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
 772		next_dcb_buf->ptp = true;
 773
 774	/* Start the transmission */
 775	lan966x_fdma_tx_start(tx);
 776
 777	return NETDEV_TX_OK;
 778
 779release:
 780	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
 781	    LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
 782		lan966x_ptp_txtstamp_release(port, skb);
 783
 784	dev_kfree_skb_any(skb);
 785	return err;
 786}
 787
 788static int lan966x_fdma_get_max_mtu(struct lan966x *lan966x)
 789{
 790	int max_mtu = 0;
 791	int i;
 792
 793	for (i = 0; i < lan966x->num_phys_ports; ++i) {
 794		struct lan966x_port *port;
 795		int mtu;
 796
 797		port = lan966x->ports[i];
 798		if (!port)
 799			continue;
 800
 801		mtu = lan_rd(lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port));
 802		if (mtu > max_mtu)
 803			max_mtu = mtu;
 804	}
 805
 806	return max_mtu;
 807}
 808
 809static int lan966x_qsys_sw_status(struct lan966x *lan966x)
 810{
 811	return lan_rd(lan966x, QSYS_SW_STATUS(CPU_PORT));
 812}
 813
 814static int lan966x_fdma_reload(struct lan966x *lan966x, int new_mtu)
 815{
 816	struct page *(*old_pages)[FDMA_RX_DCB_MAX_DBS];
 817	struct page_pool *page_pool;
 818	struct fdma fdma_rx_old;
 819	int err, i, j;
 820
 821	old_pages = kmemdup(lan966x->rx.page, sizeof(lan966x->rx.page),
 822			   GFP_KERNEL);
 823	if (!old_pages)
 824		return -ENOMEM;
 825
 826	/* Store these for later to free them */
 827	memcpy(&fdma_rx_old, &lan966x->rx.fdma, sizeof(struct fdma));
 828	page_pool = lan966x->rx.page_pool;
 829
 830	napi_synchronize(&lan966x->napi);
 831	napi_disable(&lan966x->napi);
 832	lan966x_fdma_stop_netdev(lan966x);
 833
 834	lan966x_fdma_rx_disable(&lan966x->rx);
 835	lan966x->rx.page_order = round_up(new_mtu, PAGE_SIZE) / PAGE_SIZE - 1;
 836	lan966x->rx.max_mtu = new_mtu;
 837	err = lan966x_fdma_rx_alloc(&lan966x->rx);
 838	if (err)
 839		goto restore;
 840	lan966x_fdma_rx_start(&lan966x->rx);
 841
 842	for (i = 0; i < fdma_rx_old.n_dcbs; ++i)
 843		for (j = 0; j < fdma_rx_old.n_dbs; ++j)
 844			page_pool_put_full_page(page_pool,
 845						old_pages[i][j], false);
 846
 847	fdma_free_coherent(lan966x->dev, &fdma_rx_old);
 848
 849	page_pool_destroy(page_pool);
 850
 851	lan966x_fdma_wakeup_netdev(lan966x);
 852	napi_enable(&lan966x->napi);
 853
 854	kfree(old_pages);
 855	return 0;
 856restore:
 857	lan966x->rx.page_pool = page_pool;
 858	memcpy(&lan966x->rx.fdma, &fdma_rx_old, sizeof(struct fdma));
 859	lan966x_fdma_rx_start(&lan966x->rx);
 860
 861	lan966x_fdma_wakeup_netdev(lan966x);
 862	napi_enable(&lan966x->napi);
 863
 864	kfree(old_pages);
 865	return err;
 866}
 867
 868static int lan966x_fdma_get_max_frame(struct lan966x *lan966x)
 869{
 870	return lan966x_fdma_get_max_mtu(lan966x) +
 871	       IFH_LEN_BYTES +
 872	       SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
 873	       VLAN_HLEN * 2 +
 874	       XDP_PACKET_HEADROOM;
 875}
 876
 877static int __lan966x_fdma_reload(struct lan966x *lan966x, int max_mtu)
 878{
 879	int err;
 880	u32 val;
 881
 882	/* Disable the CPU port */
 883	lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(0),
 884		QSYS_SW_PORT_MODE_PORT_ENA,
 885		lan966x, QSYS_SW_PORT_MODE(CPU_PORT));
 886
 887	/* Flush the CPU queues */
 888	readx_poll_timeout(lan966x_qsys_sw_status, lan966x,
 889			   val, !(QSYS_SW_STATUS_EQ_AVAIL_GET(val)),
 890			   READL_SLEEP_US, READL_TIMEOUT_US);
 891
 892	/* Add a sleep in case there are frames between the queues and the CPU
 893	 * port
 894	 */
 895	usleep_range(1000, 2000);
 896
 897	err = lan966x_fdma_reload(lan966x, max_mtu);
 898
 899	/* Enable back the CPU port */
 900	lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(1),
 901		QSYS_SW_PORT_MODE_PORT_ENA,
 902		lan966x,  QSYS_SW_PORT_MODE(CPU_PORT));
 903
 904	return err;
 905}
 906
 907int lan966x_fdma_change_mtu(struct lan966x *lan966x)
 908{
 909	int max_mtu;
 910
 911	max_mtu = lan966x_fdma_get_max_frame(lan966x);
 912	if (max_mtu == lan966x->rx.max_mtu)
 913		return 0;
 914
 915	return __lan966x_fdma_reload(lan966x, max_mtu);
 916}
 917
 918int lan966x_fdma_reload_page_pool(struct lan966x *lan966x)
 919{
 920	int max_mtu;
 921
 922	max_mtu = lan966x_fdma_get_max_frame(lan966x);
 923	return __lan966x_fdma_reload(lan966x, max_mtu);
 924}
 925
 926void lan966x_fdma_netdev_init(struct lan966x *lan966x, struct net_device *dev)
 927{
 928	if (lan966x->fdma_ndev)
 929		return;
 930
 931	lan966x->fdma_ndev = dev;
 932	netif_napi_add(dev, &lan966x->napi, lan966x_fdma_napi_poll);
 933	napi_enable(&lan966x->napi);
 934}
 935
 936void lan966x_fdma_netdev_deinit(struct lan966x *lan966x, struct net_device *dev)
 937{
 938	if (lan966x->fdma_ndev == dev) {
 939		netif_napi_del(&lan966x->napi);
 940		lan966x->fdma_ndev = NULL;
 941	}
 942}
 943
 944int lan966x_fdma_init(struct lan966x *lan966x)
 945{
 946	int err;
 947
 948	if (!lan966x->fdma)
 949		return 0;
 950
 951	lan966x->rx.lan966x = lan966x;
 952	lan966x->rx.fdma.channel_id = FDMA_XTR_CHANNEL;
 953	lan966x->rx.fdma.n_dcbs = FDMA_DCB_MAX;
 954	lan966x->rx.fdma.n_dbs = FDMA_RX_DCB_MAX_DBS;
 955	lan966x->rx.fdma.priv = lan966x;
 956	lan966x->rx.fdma.size = fdma_get_size(&lan966x->rx.fdma);
 957	lan966x->rx.fdma.db_size = PAGE_SIZE << lan966x->rx.page_order;
 958	lan966x->rx.fdma.ops.nextptr_cb = &fdma_nextptr_cb;
 959	lan966x->rx.fdma.ops.dataptr_cb = &lan966x_fdma_rx_dataptr_cb;
 960	lan966x->rx.max_mtu = lan966x_fdma_get_max_frame(lan966x);
 961	lan966x->tx.lan966x = lan966x;
 962	lan966x->tx.fdma.channel_id = FDMA_INJ_CHANNEL;
 963	lan966x->tx.fdma.n_dcbs = FDMA_DCB_MAX;
 964	lan966x->tx.fdma.n_dbs = FDMA_TX_DCB_MAX_DBS;
 965	lan966x->tx.fdma.priv = lan966x;
 966	lan966x->tx.fdma.size = fdma_get_size(&lan966x->tx.fdma);
 967	lan966x->tx.fdma.db_size = PAGE_SIZE << lan966x->rx.page_order;
 968	lan966x->tx.fdma.ops.nextptr_cb = &fdma_nextptr_cb;
 969	lan966x->tx.fdma.ops.dataptr_cb = &lan966x_fdma_tx_dataptr_cb;
 970
 971	err = lan966x_fdma_rx_alloc(&lan966x->rx);
 972	if (err)
 973		return err;
 974
 975	err = lan966x_fdma_tx_alloc(&lan966x->tx);
 976	if (err) {
 977		fdma_free_coherent(lan966x->dev, &lan966x->rx.fdma);
 978		page_pool_destroy(lan966x->rx.page_pool);
 979		return err;
 980	}
 981
 982	lan966x_fdma_rx_start(&lan966x->rx);
 983
 984	return 0;
 985}
 986
 987void lan966x_fdma_deinit(struct lan966x *lan966x)
 988{
 989	if (!lan966x->fdma)
 990		return;
 991
 992	lan966x_fdma_rx_disable(&lan966x->rx);
 993	lan966x_fdma_tx_disable(&lan966x->tx);
 994
 995	napi_synchronize(&lan966x->napi);
 996	napi_disable(&lan966x->napi);
 997
 998	lan966x_fdma_rx_free_pages(&lan966x->rx);
 999	fdma_free_coherent(lan966x->dev, &lan966x->rx.fdma);
1000	page_pool_destroy(lan966x->rx.page_pool);
1001	lan966x_fdma_tx_free(&lan966x->tx);
1002}