lan743x_main.c

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/* Copyright (C) 2018 Microchip Technology Inc. */
   3
   4#include <linux/module.h>
   5#include <linux/pci.h>
   6#include <linux/netdevice.h>
   7#include <linux/etherdevice.h>
   8#include <linux/crc32.h>
   9#include <linux/microchipphy.h>
  10#include <linux/net_tstamp.h>
  11#include <linux/of_mdio.h>
  12#include <linux/of_net.h>
  13#include <linux/phy.h>
  14#include <linux/phy_fixed.h>
  15#include <linux/rtnetlink.h>
  16#include <linux/iopoll.h>
  17#include <linux/crc16.h>
  18#include <linux/phylink.h>
  19#include "lan743x_main.h"
  20#include "lan743x_ethtool.h"
  21
  22#define MMD_ACCESS_ADDRESS	0
  23#define MMD_ACCESS_WRITE	1
  24#define MMD_ACCESS_READ		2
  25#define MMD_ACCESS_READ_INC	3
  26#define PCS_POWER_STATE_DOWN	0x6
  27#define PCS_POWER_STATE_UP	0x4
  28
  29#define RFE_RD_FIFO_TH_3_DWORDS	0x3
  30
  31static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter)
  32{
  33	u32 chip_rev;
  34	u32 cfg_load;
  35	u32 hw_cfg;
  36	u32 strap;
  37	int ret;
  38
  39	/* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */
  40	ret = lan743x_hs_syslock_acquire(adapter, 100);
  41	if (ret < 0) {
  42		netif_err(adapter, drv, adapter->netdev,
  43			  "Sys Lock acquire failed ret:%d\n", ret);
  44		return;
  45	}
  46
  47	cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG);
  48	lan743x_hs_syslock_release(adapter);
  49	hw_cfg = lan743x_csr_read(adapter, HW_CFG);
  50
  51	if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
  52	    hw_cfg & HW_CFG_RST_PROTECT_) {
  53		strap = lan743x_csr_read(adapter, STRAP_READ);
  54		if (strap & STRAP_READ_SGMII_EN_)
  55			adapter->is_sgmii_en = true;
  56		else
  57			adapter->is_sgmii_en = false;
  58	} else {
  59		chip_rev = lan743x_csr_read(adapter, FPGA_REV);
  60		if (chip_rev) {
  61			if (chip_rev & FPGA_SGMII_OP)
  62				adapter->is_sgmii_en = true;
  63			else
  64				adapter->is_sgmii_en = false;
  65		} else {
  66			adapter->is_sgmii_en = false;
  67		}
  68	}
  69	netif_dbg(adapter, drv, adapter->netdev,
  70		  "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis");
  71}
  72
  73static bool is_pci11x1x_chip(struct lan743x_adapter *adapter)
  74{
  75	struct lan743x_csr *csr = &adapter->csr;
  76	u32 id_rev = csr->id_rev;
  77
  78	if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) ||
  79	    ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) {
  80		return true;
  81	}
  82	return false;
  83}
  84
  85static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
  86{
  87	pci_release_selected_regions(adapter->pdev,
  88				     pci_select_bars(adapter->pdev,
  89						     IORESOURCE_MEM));
  90	pci_disable_device(adapter->pdev);
  91}
  92
  93static int lan743x_pci_init(struct lan743x_adapter *adapter,
  94			    struct pci_dev *pdev)
  95{
  96	unsigned long bars = 0;
  97	int ret;
  98
  99	adapter->pdev = pdev;
 100	ret = pci_enable_device_mem(pdev);
 101	if (ret)
 102		goto return_error;
 103
 104	netif_info(adapter, probe, adapter->netdev,
 105		   "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
 106		   pdev->vendor, pdev->device);
 107	bars = pci_select_bars(pdev, IORESOURCE_MEM);
 108	if (!test_bit(0, &bars))
 109		goto disable_device;
 110
 111	ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
 112	if (ret)
 113		goto disable_device;
 114
 115	pci_set_master(pdev);
 116	return 0;
 117
 118disable_device:
 119	pci_disable_device(adapter->pdev);
 120
 121return_error:
 122	return ret;
 123}
 124
 125u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
 126{
 127	return ioread32(&adapter->csr.csr_address[offset]);
 128}
 129
 130void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
 131		       u32 data)
 132{
 133	iowrite32(data, &adapter->csr.csr_address[offset]);
 134}
 135
 136#define LAN743X_CSR_READ_OP(offset)	lan743x_csr_read(adapter, offset)
 137
 138static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
 139{
 140	u32 data;
 141
 142	data = lan743x_csr_read(adapter, HW_CFG);
 143	data |= HW_CFG_LRST_;
 144	lan743x_csr_write(adapter, HW_CFG, data);
 145
 146	return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
 147				  !(data & HW_CFG_LRST_), 100000, 10000000);
 148}
 149
 150static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter,
 151					   int offset, u32 bit_mask,
 152					   int target_value, int udelay_min,
 153					   int udelay_max, int count)
 154{
 155	u32 data;
 156
 157	return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data,
 158					 target_value == !!(data & bit_mask),
 159					 udelay_max, udelay_min * count);
 160}
 161
 162static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
 163				    int offset, u32 bit_mask,
 164				    int target_value, int usleep_min,
 165				    int usleep_max, int count)
 166{
 167	u32 data;
 168
 169	return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
 170				  target_value == !!(data & bit_mask),
 171				  usleep_max, usleep_min * count);
 172}
 173
 174static int lan743x_csr_init(struct lan743x_adapter *adapter)
 175{
 176	struct lan743x_csr *csr = &adapter->csr;
 177	resource_size_t bar_start, bar_length;
 178
 179	bar_start = pci_resource_start(adapter->pdev, 0);
 180	bar_length = pci_resource_len(adapter->pdev, 0);
 181	csr->csr_address = devm_ioremap(&adapter->pdev->dev,
 182					bar_start, bar_length);
 183	if (!csr->csr_address)
 184		return -ENOMEM;
 185
 186	csr->id_rev = lan743x_csr_read(adapter, ID_REV);
 187	csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
 188	netif_info(adapter, probe, adapter->netdev,
 189		   "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
 190		   csr->id_rev,	FPGA_REV_GET_MAJOR_(csr->fpga_rev),
 191		   FPGA_REV_GET_MINOR_(csr->fpga_rev));
 192	if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev))
 193		return -ENODEV;
 194
 195	csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
 196	switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
 197	case ID_REV_CHIP_REV_A0_:
 198		csr->flags |= LAN743X_CSR_FLAG_IS_A0;
 199		csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
 200		break;
 201	case ID_REV_CHIP_REV_B0_:
 202		csr->flags |= LAN743X_CSR_FLAG_IS_B0;
 203		break;
 204	}
 205
 206	return lan743x_csr_light_reset(adapter);
 207}
 208
 209static void lan743x_intr_software_isr(struct lan743x_adapter *adapter)
 210{
 211	struct lan743x_intr *intr = &adapter->intr;
 212
 213	/* disable the interrupt to prevent repeated re-triggering */
 214	lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
 215	intr->software_isr_flag = true;
 216	wake_up(&intr->software_isr_wq);
 217}
 218
 219static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
 220{
 221	struct lan743x_tx *tx = context;
 222	struct lan743x_adapter *adapter = tx->adapter;
 223	bool enable_flag = true;
 224
 225	lan743x_csr_read(adapter, INT_EN_SET);
 226	if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
 227		lan743x_csr_write(adapter, INT_EN_CLR,
 228				  INT_BIT_DMA_TX_(tx->channel_number));
 229	}
 230
 231	if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
 232		u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
 233		u32 dmac_int_sts;
 234		u32 dmac_int_en;
 235
 236		if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
 237			dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
 238		else
 239			dmac_int_sts = ioc_bit;
 240		if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
 241			dmac_int_en = lan743x_csr_read(adapter,
 242						       DMAC_INT_EN_SET);
 243		else
 244			dmac_int_en = ioc_bit;
 245
 246		dmac_int_en &= ioc_bit;
 247		dmac_int_sts &= dmac_int_en;
 248		if (dmac_int_sts & ioc_bit) {
 249			napi_schedule(&tx->napi);
 250			enable_flag = false;/* poll func will enable later */
 251		}
 252	}
 253
 254	if (enable_flag)
 255		/* enable isr */
 256		lan743x_csr_write(adapter, INT_EN_SET,
 257				  INT_BIT_DMA_TX_(tx->channel_number));
 258}
 259
 260static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
 261{
 262	struct lan743x_rx *rx = context;
 263	struct lan743x_adapter *adapter = rx->adapter;
 264	bool enable_flag = true;
 265
 266	if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
 267		lan743x_csr_write(adapter, INT_EN_CLR,
 268				  INT_BIT_DMA_RX_(rx->channel_number));
 269	}
 270
 271	if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
 272		u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
 273		u32 dmac_int_sts;
 274		u32 dmac_int_en;
 275
 276		if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
 277			dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
 278		else
 279			dmac_int_sts = rx_frame_bit;
 280		if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
 281			dmac_int_en = lan743x_csr_read(adapter,
 282						       DMAC_INT_EN_SET);
 283		else
 284			dmac_int_en = rx_frame_bit;
 285
 286		dmac_int_en &= rx_frame_bit;
 287		dmac_int_sts &= dmac_int_en;
 288		if (dmac_int_sts & rx_frame_bit) {
 289			napi_schedule(&rx->napi);
 290			enable_flag = false;/* poll funct will enable later */
 291		}
 292	}
 293
 294	if (enable_flag) {
 295		/* enable isr */
 296		lan743x_csr_write(adapter, INT_EN_SET,
 297				  INT_BIT_DMA_RX_(rx->channel_number));
 298	}
 299}
 300
 301static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
 302{
 303	struct lan743x_adapter *adapter = context;
 304	unsigned int channel;
 305
 306	if (int_sts & INT_BIT_ALL_RX_) {
 307		for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
 308			channel++) {
 309			u32 int_bit = INT_BIT_DMA_RX_(channel);
 310
 311			if (int_sts & int_bit) {
 312				lan743x_rx_isr(&adapter->rx[channel],
 313					       int_bit, flags);
 314				int_sts &= ~int_bit;
 315			}
 316		}
 317	}
 318	if (int_sts & INT_BIT_ALL_TX_) {
 319		for (channel = 0; channel < adapter->used_tx_channels;
 320			channel++) {
 321			u32 int_bit = INT_BIT_DMA_TX_(channel);
 322
 323			if (int_sts & int_bit) {
 324				lan743x_tx_isr(&adapter->tx[channel],
 325					       int_bit, flags);
 326				int_sts &= ~int_bit;
 327			}
 328		}
 329	}
 330	if (int_sts & INT_BIT_ALL_OTHER_) {
 331		if (int_sts & INT_BIT_SW_GP_) {
 332			lan743x_intr_software_isr(adapter);
 333			int_sts &= ~INT_BIT_SW_GP_;
 334		}
 335		if (int_sts & INT_BIT_1588_) {
 336			lan743x_ptp_isr(adapter);
 337			int_sts &= ~INT_BIT_1588_;
 338		}
 339	}
 340	if (int_sts)
 341		lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
 342}
 343
 344static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
 345{
 346	struct lan743x_vector *vector = ptr;
 347	struct lan743x_adapter *adapter = vector->adapter;
 348	irqreturn_t result = IRQ_NONE;
 349	u32 int_enables;
 350	u32 int_sts;
 351
 352	if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
 353		int_sts = lan743x_csr_read(adapter, INT_STS);
 354	} else if (vector->flags &
 355		   (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
 356		   LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
 357		int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
 358	} else {
 359		/* use mask as implied status */
 360		int_sts = vector->int_mask | INT_BIT_MAS_;
 361	}
 362
 363	if (!(int_sts & INT_BIT_MAS_))
 364		goto irq_done;
 365
 366	if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
 367		/* disable vector interrupt */
 368		lan743x_csr_write(adapter,
 369				  INT_VEC_EN_CLR,
 370				  INT_VEC_EN_(vector->vector_index));
 371
 372	if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
 373		/* disable master interrupt */
 374		lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
 375
 376	if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
 377		int_enables = lan743x_csr_read(adapter, INT_EN_SET);
 378	} else {
 379		/*  use vector mask as implied enable mask */
 380		int_enables = vector->int_mask;
 381	}
 382
 383	int_sts &= int_enables;
 384	int_sts &= vector->int_mask;
 385	if (int_sts) {
 386		if (vector->handler) {
 387			vector->handler(vector->context,
 388					int_sts, vector->flags);
 389		} else {
 390			/* disable interrupts on this vector */
 391			lan743x_csr_write(adapter, INT_EN_CLR,
 392					  vector->int_mask);
 393		}
 394		result = IRQ_HANDLED;
 395	}
 396
 397	if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
 398		/* enable master interrupt */
 399		lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
 400
 401	if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
 402		/* enable vector interrupt */
 403		lan743x_csr_write(adapter,
 404				  INT_VEC_EN_SET,
 405				  INT_VEC_EN_(vector->vector_index));
 406irq_done:
 407	return result;
 408}
 409
 410static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
 411{
 412	struct lan743x_intr *intr = &adapter->intr;
 413	int ret;
 414
 415	intr->software_isr_flag = false;
 416
 417	/* enable and activate test interrupt */
 418	lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
 419	lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
 420
 421	ret = wait_event_timeout(intr->software_isr_wq,
 422				 intr->software_isr_flag,
 423				 msecs_to_jiffies(200));
 424
 425	/* disable test interrupt */
 426	lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
 427
 428	return ret > 0 ? 0 : -ENODEV;
 429}
 430
 431static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
 432				     int vector_index, u32 flags,
 433				     u32 int_mask,
 434				     lan743x_vector_handler handler,
 435				     void *context)
 436{
 437	struct lan743x_vector *vector = &adapter->intr.vector_list
 438					[vector_index];
 439	int ret;
 440
 441	vector->adapter = adapter;
 442	vector->flags = flags;
 443	vector->vector_index = vector_index;
 444	vector->int_mask = int_mask;
 445	vector->handler = handler;
 446	vector->context = context;
 447
 448	ret = request_irq(vector->irq,
 449			  lan743x_intr_entry_isr,
 450			  (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
 451			  IRQF_SHARED : 0, DRIVER_NAME, vector);
 452	if (ret) {
 453		vector->handler = NULL;
 454		vector->context = NULL;
 455		vector->int_mask = 0;
 456		vector->flags = 0;
 457	}
 458	return ret;
 459}
 460
 461static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
 462					int vector_index)
 463{
 464	struct lan743x_vector *vector = &adapter->intr.vector_list
 465					[vector_index];
 466
 467	free_irq(vector->irq, vector);
 468	vector->handler = NULL;
 469	vector->context = NULL;
 470	vector->int_mask = 0;
 471	vector->flags = 0;
 472}
 473
 474static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
 475					 u32 int_mask)
 476{
 477	int index;
 478
 479	for (index = 0; index < adapter->max_vector_count; index++) {
 480		if (adapter->intr.vector_list[index].int_mask & int_mask)
 481			return adapter->intr.vector_list[index].flags;
 482	}
 483	return 0;
 484}
 485
 486static void lan743x_intr_close(struct lan743x_adapter *adapter)
 487{
 488	struct lan743x_intr *intr = &adapter->intr;
 489	int index = 0;
 490
 491	lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
 492	if (adapter->is_pci11x1x)
 493		lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF);
 494	else
 495		lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
 496
 497	for (index = 0; index < intr->number_of_vectors; index++) {
 498		if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
 499			lan743x_intr_unregister_isr(adapter, index);
 500			intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
 501		}
 502	}
 503
 504	if (intr->flags & INTR_FLAG_MSI_ENABLED) {
 505		pci_disable_msi(adapter->pdev);
 506		intr->flags &= ~INTR_FLAG_MSI_ENABLED;
 507	}
 508
 509	if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
 510		pci_disable_msix(adapter->pdev);
 511		intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
 512	}
 513}
 514
 515static int lan743x_intr_open(struct lan743x_adapter *adapter)
 516{
 517	struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT];
 518	struct lan743x_intr *intr = &adapter->intr;
 519	unsigned int used_tx_channels;
 520	u32 int_vec_en_auto_clr = 0;
 521	u8 max_vector_count;
 522	u32 int_vec_map0 = 0;
 523	u32 int_vec_map1 = 0;
 524	int ret = -ENODEV;
 525	int index = 0;
 526	u32 flags = 0;
 527
 528	intr->number_of_vectors = 0;
 529
 530	/* Try to set up MSIX interrupts */
 531	max_vector_count = adapter->max_vector_count;
 532	memset(&msix_entries[0], 0,
 533	       sizeof(struct msix_entry) * max_vector_count);
 534	for (index = 0; index < max_vector_count; index++)
 535		msix_entries[index].entry = index;
 536	used_tx_channels = adapter->used_tx_channels;
 537	ret = pci_enable_msix_range(adapter->pdev,
 538				    msix_entries, 1,
 539				    1 + used_tx_channels +
 540				    LAN743X_USED_RX_CHANNELS);
 541
 542	if (ret > 0) {
 543		intr->flags |= INTR_FLAG_MSIX_ENABLED;
 544		intr->number_of_vectors = ret;
 545		intr->using_vectors = true;
 546		for (index = 0; index < intr->number_of_vectors; index++)
 547			intr->vector_list[index].irq = msix_entries
 548						       [index].vector;
 549		netif_info(adapter, ifup, adapter->netdev,
 550			   "using MSIX interrupts, number of vectors = %d\n",
 551			   intr->number_of_vectors);
 552	}
 553
 554	/* If MSIX failed try to setup using MSI interrupts */
 555	if (!intr->number_of_vectors) {
 556		if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
 557			if (!pci_enable_msi(adapter->pdev)) {
 558				intr->flags |= INTR_FLAG_MSI_ENABLED;
 559				intr->number_of_vectors = 1;
 560				intr->using_vectors = true;
 561				intr->vector_list[0].irq =
 562					adapter->pdev->irq;
 563				netif_info(adapter, ifup, adapter->netdev,
 564					   "using MSI interrupts, number of vectors = %d\n",
 565					   intr->number_of_vectors);
 566			}
 567		}
 568	}
 569
 570	/* If MSIX, and MSI failed, setup using legacy interrupt */
 571	if (!intr->number_of_vectors) {
 572		intr->number_of_vectors = 1;
 573		intr->using_vectors = false;
 574		intr->vector_list[0].irq = intr->irq;
 575		netif_info(adapter, ifup, adapter->netdev,
 576			   "using legacy interrupts\n");
 577	}
 578
 579	/* At this point we must have at least one irq */
 580	lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
 581
 582	/* map all interrupts to vector 0 */
 583	lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
 584	lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
 585	lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
 586	flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
 587		LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
 588		LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
 589		LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
 590
 591	if (intr->using_vectors) {
 592		flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
 593			 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
 594	} else {
 595		flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
 596			 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
 597			 LAN743X_VECTOR_FLAG_IRQ_SHARED;
 598	}
 599
 600	if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
 601		flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
 602		flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
 603		flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
 604		flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
 605		flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
 606		flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
 607	}
 608
 609	init_waitqueue_head(&intr->software_isr_wq);
 610
 611	ret = lan743x_intr_register_isr(adapter, 0, flags,
 612					INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
 613					INT_BIT_ALL_OTHER_,
 614					lan743x_intr_shared_isr, adapter);
 615	if (ret)
 616		goto clean_up;
 617	intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
 618
 619	if (intr->using_vectors)
 620		lan743x_csr_write(adapter, INT_VEC_EN_SET,
 621				  INT_VEC_EN_(0));
 622
 623	if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
 624		lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
 625		lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
 626		lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
 627		lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
 628		lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
 629		lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
 630		lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
 631		lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
 632		if (adapter->is_pci11x1x) {
 633			lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD);
 634			lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD);
 635			lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654);
 636			lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210);
 637		} else {
 638			lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
 639			lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
 640		}
 641		lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
 642	}
 643
 644	/* enable interrupts */
 645	lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
 646	ret = lan743x_intr_test_isr(adapter);
 647	if (ret)
 648		goto clean_up;
 649
 650	if (intr->number_of_vectors > 1) {
 651		int number_of_tx_vectors = intr->number_of_vectors - 1;
 652
 653		if (number_of_tx_vectors > used_tx_channels)
 654			number_of_tx_vectors = used_tx_channels;
 655		flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
 656			LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
 657			LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
 658			LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
 659			LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
 660			LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
 661
 662		if (adapter->csr.flags &
 663		   LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
 664			flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
 665				LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
 666				LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
 667				LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
 668		}
 669
 670		for (index = 0; index < number_of_tx_vectors; index++) {
 671			u32 int_bit = INT_BIT_DMA_TX_(index);
 672			int vector = index + 1;
 673
 674			/* map TX interrupt to vector */
 675			int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
 676			lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
 677
 678			/* Remove TX interrupt from shared mask */
 679			intr->vector_list[0].int_mask &= ~int_bit;
 680			ret = lan743x_intr_register_isr(adapter, vector, flags,
 681							int_bit, lan743x_tx_isr,
 682							&adapter->tx[index]);
 683			if (ret)
 684				goto clean_up;
 685			intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
 686			if (!(flags &
 687			    LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
 688				lan743x_csr_write(adapter, INT_VEC_EN_SET,
 689						  INT_VEC_EN_(vector));
 690		}
 691	}
 692	if ((intr->number_of_vectors - used_tx_channels) > 1) {
 693		int number_of_rx_vectors = intr->number_of_vectors -
 694						used_tx_channels - 1;
 695
 696		if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
 697			number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
 698
 699		flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
 700			LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
 701			LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
 702			LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
 703			LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
 704			LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
 705
 706		if (adapter->csr.flags &
 707		    LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
 708			flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
 709				LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
 710				LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
 711				LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
 712				LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
 713		}
 714		for (index = 0; index < number_of_rx_vectors; index++) {
 715			int vector = index + 1 + used_tx_channels;
 716			u32 int_bit = INT_BIT_DMA_RX_(index);
 717
 718			/* map RX interrupt to vector */
 719			int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
 720			lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
 721			if (flags &
 722			    LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
 723				int_vec_en_auto_clr |= INT_VEC_EN_(vector);
 724				lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
 725						  int_vec_en_auto_clr);
 726			}
 727
 728			/* Remove RX interrupt from shared mask */
 729			intr->vector_list[0].int_mask &= ~int_bit;
 730			ret = lan743x_intr_register_isr(adapter, vector, flags,
 731							int_bit, lan743x_rx_isr,
 732							&adapter->rx[index]);
 733			if (ret)
 734				goto clean_up;
 735			intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
 736
 737			lan743x_csr_write(adapter, INT_VEC_EN_SET,
 738					  INT_VEC_EN_(vector));
 739		}
 740	}
 741	return 0;
 742
 743clean_up:
 744	lan743x_intr_close(adapter);
 745	return ret;
 746}
 747
 748static int lan743x_dp_write(struct lan743x_adapter *adapter,
 749			    u32 select, u32 addr, u32 length, u32 *buf)
 750{
 751	u32 dp_sel;
 752	int i;
 753
 754	if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_,
 755					    1, 40, 100, 100))
 756		return -EIO;
 757	dp_sel = lan743x_csr_read(adapter, DP_SEL);
 758	dp_sel &= ~DP_SEL_MASK_;
 759	dp_sel |= select;
 760	lan743x_csr_write(adapter, DP_SEL, dp_sel);
 761
 762	for (i = 0; i < length; i++) {
 763		lan743x_csr_write(adapter, DP_ADDR, addr + i);
 764		lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
 765		lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
 766		if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL,
 767						    DP_SEL_DPRDY_,
 768						    1, 40, 100, 100))
 769			return -EIO;
 770	}
 771
 772	return 0;
 773}
 774
 775static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
 776{
 777	u32 ret;
 778
 779	ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
 780		MAC_MII_ACC_PHY_ADDR_MASK_;
 781	ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
 782		MAC_MII_ACC_MIIRINDA_MASK_;
 783
 784	if (read)
 785		ret |= MAC_MII_ACC_MII_READ_;
 786	else
 787		ret |= MAC_MII_ACC_MII_WRITE_;
 788	ret |= MAC_MII_ACC_MII_BUSY_;
 789
 790	return ret;
 791}
 792
 793static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
 794{
 795	u32 data;
 796
 797	return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
 798				  !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
 799}
 800
 801static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index)
 802{
 803	struct lan743x_adapter *adapter = bus->priv;
 804	u32 val, mii_access;
 805	int ret;
 806
 807	/* confirm MII not busy */
 808	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 809	if (ret < 0)
 810		return ret;
 811
 812	/* set the address, index & direction (read from PHY) */
 813	mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
 814	lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
 815	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 816	if (ret < 0)
 817		return ret;
 818
 819	val = lan743x_csr_read(adapter, MAC_MII_DATA);
 820	return (int)(val & 0xFFFF);
 821}
 822
 823static int lan743x_mdiobus_write_c22(struct mii_bus *bus,
 824				     int phy_id, int index, u16 regval)
 825{
 826	struct lan743x_adapter *adapter = bus->priv;
 827	u32 val, mii_access;
 828	int ret;
 829
 830	/* confirm MII not busy */
 831	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 832	if (ret < 0)
 833		return ret;
 834	val = (u32)regval;
 835	lan743x_csr_write(adapter, MAC_MII_DATA, val);
 836
 837	/* set the address, index & direction (write to PHY) */
 838	mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
 839	lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
 840	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 841	return ret;
 842}
 843
 844static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op)
 845{
 846	u32 ret;
 847
 848	ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
 849		MAC_MII_ACC_PHY_ADDR_MASK_;
 850	ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) &
 851		MAC_MII_ACC_MIIMMD_MASK_;
 852	if (op == MMD_ACCESS_WRITE)
 853		ret |= MAC_MII_ACC_MIICMD_WRITE_;
 854	else if (op == MMD_ACCESS_READ)
 855		ret |= MAC_MII_ACC_MIICMD_READ_;
 856	else if (op == MMD_ACCESS_READ_INC)
 857		ret |= MAC_MII_ACC_MIICMD_READ_INC_;
 858	else
 859		ret |= MAC_MII_ACC_MIICMD_ADDR_;
 860	ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_);
 861
 862	return ret;
 863}
 864
 865static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id,
 866				    int dev_addr, int index)
 867{
 868	struct lan743x_adapter *adapter = bus->priv;
 869	u32 mmd_access;
 870	int ret;
 871
 872	/* confirm MII not busy */
 873	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 874	if (ret < 0)
 875		return ret;
 876
 877	/* Load Register Address */
 878	lan743x_csr_write(adapter, MAC_MII_DATA, index);
 879	mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
 880					    MMD_ACCESS_ADDRESS);
 881	lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
 882	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 883	if (ret < 0)
 884		return ret;
 885
 886	/* Read Data */
 887	mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
 888					    MMD_ACCESS_READ);
 889	lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
 890	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 891	if (ret < 0)
 892		return ret;
 893
 894	ret = lan743x_csr_read(adapter, MAC_MII_DATA);
 895	return (int)(ret & 0xFFFF);
 896}
 897
 898static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id,
 899				     int dev_addr, int index, u16 regval)
 900{
 901	struct lan743x_adapter *adapter = bus->priv;
 902	u32 mmd_access;
 903	int ret;
 904
 905	/* confirm MII not busy */
 906	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 907	if (ret < 0)
 908		return ret;
 909
 910	/* Load Register Address */
 911	lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index);
 912	mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
 913					    MMD_ACCESS_ADDRESS);
 914	lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
 915	ret = lan743x_mac_mii_wait_till_not_busy(adapter);
 916	if (ret < 0)
 917		return ret;
 918
 919	/* Write Data */
 920	lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval);
 921	mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
 922					    MMD_ACCESS_WRITE);
 923	lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
 924
 925	return lan743x_mac_mii_wait_till_not_busy(adapter);
 926}
 927
 928static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter)
 929{
 930	u32 data;
 931	int ret;
 932
 933	ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data,
 934				 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000);
 935	if (ret < 0)
 936		netif_err(adapter, drv, adapter->netdev,
 937			  "%s: error %d sgmii wait timeout\n", __func__, ret);
 938
 939	return ret;
 940}
 941
 942int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr)
 943{
 944	u32 mmd_access;
 945	int ret;
 946	u32 val;
 947
 948	if (mmd > 31) {
 949		netif_err(adapter, probe, adapter->netdev,
 950			  "%s mmd should <= 31\n", __func__);
 951		return -EINVAL;
 952	}
 953
 954	mutex_lock(&adapter->sgmii_rw_lock);
 955	/* Load Register Address */
 956	mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
 957	mmd_access |= (addr | SGMII_ACC_SGMII_BZY_);
 958	lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
 959	ret = lan743x_sgmii_wait_till_not_busy(adapter);
 960	if (ret < 0)
 961		goto sgmii_unlock;
 962
 963	val = lan743x_csr_read(adapter, SGMII_DATA);
 964	ret = (int)(val & SGMII_DATA_MASK_);
 965
 966sgmii_unlock:
 967	mutex_unlock(&adapter->sgmii_rw_lock);
 968
 969	return ret;
 970}
 971
 972static int lan743x_sgmii_write(struct lan743x_adapter *adapter,
 973			       u8 mmd, u16 addr, u16 val)
 974{
 975	u32 mmd_access;
 976	int ret;
 977
 978	if (mmd > 31) {
 979		netif_err(adapter, probe, adapter->netdev,
 980			  "%s mmd should <= 31\n", __func__);
 981		return -EINVAL;
 982	}
 983	mutex_lock(&adapter->sgmii_rw_lock);
 984	/* Load Register Data */
 985	lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_));
 986	/* Load Register Address */
 987	mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
 988	mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_);
 989	lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
 990	ret = lan743x_sgmii_wait_till_not_busy(adapter);
 991	mutex_unlock(&adapter->sgmii_rw_lock);
 992
 993	return ret;
 994}
 995
 996static int lan743x_get_lsd(int speed, int duplex, u8 mss)
 997{
 998	int lsd;
 999
1000	switch (speed) {
1001	case SPEED_2500:
1002		if (mss == MASTER_SLAVE_STATE_SLAVE)
1003			lsd = LINK_2500_SLAVE;
1004		else
1005			lsd = LINK_2500_MASTER;
1006		break;
1007	case SPEED_1000:
1008		if (mss == MASTER_SLAVE_STATE_SLAVE)
1009			lsd = LINK_1000_SLAVE;
1010		else
1011			lsd = LINK_1000_MASTER;
1012		break;
1013	case SPEED_100:
1014		if (duplex == DUPLEX_FULL)
1015			lsd = LINK_100FD;
1016		else
1017			lsd = LINK_100HD;
1018		break;
1019	case SPEED_10:
1020		if (duplex == DUPLEX_FULL)
1021			lsd = LINK_10FD;
1022		else
1023			lsd = LINK_10HD;
1024		break;
1025	default:
1026		lsd = -EINVAL;
1027	}
1028
1029	return lsd;
1030}
1031
1032static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter,
1033				  u16 baud)
1034{
1035	int mpllctrl0;
1036	int mpllctrl1;
1037	int miscctrl1;
1038	int ret;
1039
1040	mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1041				       VR_MII_GEN2_4_MPLL_CTRL0);
1042	if (mpllctrl0 < 0)
1043		return mpllctrl0;
1044
1045	mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_;
1046	if (baud == VR_MII_BAUD_RATE_1P25GBPS) {
1047		mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100;
1048		/* mpll_baud_clk/4 */
1049		miscctrl1 = 0xA;
1050	} else {
1051		mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125;
1052		/* mpll_baud_clk/2 */
1053		miscctrl1 = 0x5;
1054	}
1055
1056	ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1057				  VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0);
1058	if (ret < 0)
1059		return ret;
1060
1061	ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1062				  VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1);
1063	if (ret < 0)
1064		return ret;
1065
1066	return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1067				  VR_MII_GEN2_4_MISC_CTRL1, miscctrl1);
1068}
1069
1070static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter,
1071				       bool enable)
1072{
1073	if (enable)
1074		return lan743x_sgmii_mpll_set(adapter,
1075					      VR_MII_BAUD_RATE_3P125GBPS);
1076	else
1077		return lan743x_sgmii_mpll_set(adapter,
1078					      VR_MII_BAUD_RATE_1P25GBPS);
1079}
1080
1081static int lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter *adapter)
1082{
1083	enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd;
1084	int mii_ctrl;
1085	int dgt_ctrl;
1086	int an_ctrl;
1087	int ret;
1088
1089	if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE)
1090		/* Switch to 2.5 Gbps */
1091		ret = lan743x_sgmii_2_5G_mode_set(adapter, true);
1092	else
1093		/* Switch to 10/100/1000 Mbps clock */
1094		ret = lan743x_sgmii_2_5G_mode_set(adapter, false);
1095	if (ret < 0)
1096		return ret;
1097
1098	/* Enable SGMII Auto NEG */
1099	mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1100	if (mii_ctrl < 0)
1101		return mii_ctrl;
1102
1103	an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL);
1104	if (an_ctrl < 0)
1105		return an_ctrl;
1106
1107	dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1108				      VR_MII_DIG_CTRL1);
1109	if (dgt_ctrl < 0)
1110		return dgt_ctrl;
1111
1112	if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) {
1113		mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100);
1114		mii_ctrl |= BMCR_SPEED1000;
1115		dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1116		dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1117		/* In order for Auto-Negotiation to operate properly at
1118		 * 2.5 Gbps the 1.6ms link timer values must be adjusted
1119		 * The VR_MII_LINK_TIMER_CTRL Register must be set to
1120		 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the
1121		 * VR_MII_DIG_CTRL1 Register set to 1
1122		 */
1123		ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1124					  VR_MII_LINK_TIMER_CTRL, 0x7A1);
1125		if (ret < 0)
1126			return ret;
1127	} else {
1128		mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART);
1129		an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_;
1130		dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1131		dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1132	}
1133
1134	ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR,
1135				  mii_ctrl);
1136	if (ret < 0)
1137		return ret;
1138
1139	ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1140				  VR_MII_DIG_CTRL1, dgt_ctrl);
1141	if (ret < 0)
1142		return ret;
1143
1144	return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1145				  VR_MII_AN_CTRL, an_ctrl);
1146}
1147
1148static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state)
1149{
1150	u8 wait_cnt = 0;
1151	u32 dig_sts;
1152
1153	do {
1154		dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1155					     VR_MII_DIG_STS);
1156		if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >>
1157		      VR_MII_DIG_STS_PSEQ_STATE_POS_) == state)
1158			break;
1159		usleep_range(1000, 2000);
1160	} while (wait_cnt++ < 10);
1161
1162	if (wait_cnt >= 10)
1163		return -ETIMEDOUT;
1164
1165	return 0;
1166}
1167
1168static int lan743x_pcs_power_reset(struct lan743x_adapter *adapter)
1169{
1170	int mii_ctl;
1171	int ret;
1172
1173	/* SGMII/1000/2500BASE-X PCS power down */
1174	mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1175	if (mii_ctl < 0)
1176		return mii_ctl;
1177
1178	mii_ctl |= BMCR_PDOWN;
1179	ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1180	if (ret < 0)
1181		return ret;
1182
1183	ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN);
1184	if (ret < 0)
1185		return ret;
1186
1187	/* SGMII/1000/2500BASE-X PCS power up */
1188	mii_ctl &= ~BMCR_PDOWN;
1189	ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1190	if (ret < 0)
1191		return ret;
1192
1193	return lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP);
1194}
1195
1196static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
1197				    u8 *addr)
1198{
1199	u32 addr_lo, addr_hi;
1200
1201	addr_lo = addr[0] |
1202		addr[1] << 8 |
1203		addr[2] << 16 |
1204		addr[3] << 24;
1205	addr_hi = addr[4] |
1206		addr[5] << 8;
1207	lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
1208	lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
1209
1210	ether_addr_copy(adapter->mac_address, addr);
1211	netif_info(adapter, drv, adapter->netdev,
1212		   "MAC address set to %pM\n", addr);
1213}
1214
1215static int lan743x_mac_init(struct lan743x_adapter *adapter)
1216{
1217	bool mac_address_valid = true;
1218	struct net_device *netdev;
1219	u32 mac_addr_hi = 0;
1220	u32 mac_addr_lo = 0;
1221	u32 data;
1222
1223	netdev = adapter->netdev;
1224
1225	/* disable auto duplex, and speed detection. Phylib does that */
1226	data = lan743x_csr_read(adapter, MAC_CR);
1227	data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
1228	data |= MAC_CR_CNTR_RST_;
1229	lan743x_csr_write(adapter, MAC_CR, data);
1230
1231	if (!is_valid_ether_addr(adapter->mac_address)) {
1232		mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
1233		mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
1234		adapter->mac_address[0] = mac_addr_lo & 0xFF;
1235		adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
1236		adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
1237		adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
1238		adapter->mac_address[4] = mac_addr_hi & 0xFF;
1239		adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
1240
1241		if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
1242		    mac_addr_lo == 0xFFFFFFFF) {
1243			mac_address_valid = false;
1244		} else if (!is_valid_ether_addr(adapter->mac_address)) {
1245			mac_address_valid = false;
1246		}
1247
1248		if (!mac_address_valid)
1249			eth_random_addr(adapter->mac_address);
1250	}
1251	lan743x_mac_set_address(adapter, adapter->mac_address);
1252	eth_hw_addr_set(netdev, adapter->mac_address);
1253
1254	return 0;
1255}
1256
1257static int lan743x_mac_open(struct lan743x_adapter *adapter)
1258{
1259	u32 temp;
1260
1261	temp = lan743x_csr_read(adapter, MAC_RX);
1262	lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
1263	temp = lan743x_csr_read(adapter, MAC_TX);
1264	lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
1265	return 0;
1266}
1267
1268static void lan743x_mac_close(struct lan743x_adapter *adapter)
1269{
1270	u32 temp;
1271
1272	temp = lan743x_csr_read(adapter, MAC_TX);
1273	temp &= ~MAC_TX_TXEN_;
1274	lan743x_csr_write(adapter, MAC_TX, temp);
1275	lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
1276				 1, 1000, 20000, 100);
1277
1278	temp = lan743x_csr_read(adapter, MAC_RX);
1279	temp &= ~MAC_RX_RXEN_;
1280	lan743x_csr_write(adapter, MAC_RX, temp);
1281	lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1282				 1, 1000, 20000, 100);
1283}
1284
1285void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
1286				       bool tx_enable, bool rx_enable)
1287{
1288	u32 flow_setting = 0;
1289
1290	/* set maximum pause time because when fifo space frees
1291	 * up a zero value pause frame will be sent to release the pause
1292	 */
1293	flow_setting = MAC_FLOW_CR_FCPT_MASK_;
1294	if (tx_enable)
1295		flow_setting |= MAC_FLOW_CR_TX_FCEN_;
1296	if (rx_enable)
1297		flow_setting |= MAC_FLOW_CR_RX_FCEN_;
1298	lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
1299}
1300
1301static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
1302{
1303	int enabled = 0;
1304	u32 mac_rx = 0;
1305
1306	mac_rx = lan743x_csr_read(adapter, MAC_RX);
1307	if (mac_rx & MAC_RX_RXEN_) {
1308		enabled = 1;
1309		if (mac_rx & MAC_RX_RXD_) {
1310			lan743x_csr_write(adapter, MAC_RX, mac_rx);
1311			mac_rx &= ~MAC_RX_RXD_;
1312		}
1313		mac_rx &= ~MAC_RX_RXEN_;
1314		lan743x_csr_write(adapter, MAC_RX, mac_rx);
1315		lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1316					 1, 1000, 20000, 100);
1317		lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
1318	}
1319
1320	mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
1321	mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN)
1322		  << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
1323	lan743x_csr_write(adapter, MAC_RX, mac_rx);
1324
1325	if (enabled) {
1326		mac_rx |= MAC_RX_RXEN_;
1327		lan743x_csr_write(adapter, MAC_RX, mac_rx);
1328	}
1329	return 0;
1330}
1331
1332/* PHY */
1333static int lan743x_hw_reset_phy(struct lan743x_adapter *adapter)
1334{
1335	u32 data;
1336
1337	/* Only called with in probe, and before mdiobus_register */
1338
1339	data = lan743x_csr_read(adapter, PMT_CTL);
1340	data |= PMT_CTL_ETH_PHY_RST_;
1341	lan743x_csr_write(adapter, PMT_CTL, data);
1342
1343	return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
1344				  (!(data & PMT_CTL_ETH_PHY_RST_) &&
1345				  (data & PMT_CTL_READY_)),
1346				  50000, 1000000);
1347}
1348
1349static void lan743x_phy_interface_select(struct lan743x_adapter *adapter)
1350{
1351	u32 id_rev;
1352	u32 data;
1353
1354	data = lan743x_csr_read(adapter, MAC_CR);
1355	id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_;
1356
1357	if (adapter->is_pci11x1x && adapter->is_sgmii_en)
1358		adapter->phy_interface = PHY_INTERFACE_MODE_SGMII;
1359	else if (id_rev == ID_REV_ID_LAN7430_)
1360		adapter->phy_interface = PHY_INTERFACE_MODE_GMII;
1361	else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_))
1362		adapter->phy_interface = PHY_INTERFACE_MODE_MII;
1363	else
1364		adapter->phy_interface = PHY_INTERFACE_MODE_RGMII;
1365
1366	netif_dbg(adapter, drv, adapter->netdev,
1367		  "selected phy interface: 0x%X\n", adapter->phy_interface);
1368}
1369
1370static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1371{
1372	lan743x_csr_write(adapter, RFE_RSS_CFG,
1373		RFE_RSS_CFG_UDP_IPV6_EX_ |
1374		RFE_RSS_CFG_TCP_IPV6_EX_ |
1375		RFE_RSS_CFG_IPV6_EX_ |
1376		RFE_RSS_CFG_UDP_IPV6_ |
1377		RFE_RSS_CFG_TCP_IPV6_ |
1378		RFE_RSS_CFG_IPV6_ |
1379		RFE_RSS_CFG_UDP_IPV4_ |
1380		RFE_RSS_CFG_TCP_IPV4_ |
1381		RFE_RSS_CFG_IPV4_ |
1382		RFE_RSS_CFG_VALID_HASH_BITS_ |
1383		RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1384		RFE_RSS_CFG_RSS_HASH_STORE_ |
1385		RFE_RSS_CFG_RSS_ENABLE_);
1386}
1387
1388static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1389{
1390	u8 *mac_addr;
1391	u32 mac_addr_hi = 0;
1392	u32 mac_addr_lo = 0;
1393
1394	/* Add mac address to perfect Filter */
1395	mac_addr = adapter->mac_address;
1396	mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1397		      (((u32)(mac_addr[1])) << 8) |
1398		      (((u32)(mac_addr[2])) << 16) |
1399		      (((u32)(mac_addr[3])) << 24));
1400	mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1401		      (((u32)(mac_addr[5])) << 8));
1402
1403	lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1404	lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1405			  mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1406}
1407
1408static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1409{
1410	struct net_device *netdev = adapter->netdev;
1411	u32 hash_table[DP_SEL_VHF_HASH_LEN];
1412	u32 rfctl;
1413	u32 data;
1414
1415	rfctl = lan743x_csr_read(adapter, RFE_CTL);
1416	rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1417		 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1418	rfctl |= RFE_CTL_AB_;
1419	if (netdev->flags & IFF_PROMISC) {
1420		rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1421	} else {
1422		if (netdev->flags & IFF_ALLMULTI)
1423			rfctl |= RFE_CTL_AM_;
1424	}
1425
1426	if (netdev->features & NETIF_F_RXCSUM)
1427		rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_;
1428
1429	memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1430	if (netdev_mc_count(netdev)) {
1431		struct netdev_hw_addr *ha;
1432		int i;
1433
1434		rfctl |= RFE_CTL_DA_PERFECT_;
1435		i = 1;
1436		netdev_for_each_mc_addr(ha, netdev) {
1437			/* set first 32 into Perfect Filter */
1438			if (i < 33) {
1439				lan743x_csr_write(adapter,
1440						  RFE_ADDR_FILT_HI(i), 0);
1441				data = ha->addr[3];
1442				data = ha->addr[2] | (data << 8);
1443				data = ha->addr[1] | (data << 8);
1444				data = ha->addr[0] | (data << 8);
1445				lan743x_csr_write(adapter,
1446						  RFE_ADDR_FILT_LO(i), data);
1447				data = ha->addr[5];
1448				data = ha->addr[4] | (data << 8);
1449				data |= RFE_ADDR_FILT_HI_VALID_;
1450				lan743x_csr_write(adapter,
1451						  RFE_ADDR_FILT_HI(i), data);
1452			} else {
1453				u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1454					     23) & 0x1FF;
1455				hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1456				rfctl |= RFE_CTL_MCAST_HASH_;
1457			}
1458			i++;
1459		}
1460	}
1461
1462	lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1463			 DP_SEL_VHF_VLAN_LEN,
1464			 DP_SEL_VHF_HASH_LEN, hash_table);
1465	lan743x_csr_write(adapter, RFE_CTL, rfctl);
1466}
1467
1468static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1469{
1470	u32 data = 0;
1471
1472	lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1473	lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1474				 0, 1000, 20000, 100);
1475	switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1476	case DMA_DESCRIPTOR_SPACING_16:
1477		data = DMAC_CFG_MAX_DSPACE_16_;
1478		break;
1479	case DMA_DESCRIPTOR_SPACING_32:
1480		data = DMAC_CFG_MAX_DSPACE_32_;
1481		break;
1482	case DMA_DESCRIPTOR_SPACING_64:
1483		data = DMAC_CFG_MAX_DSPACE_64_;
1484		break;
1485	case DMA_DESCRIPTOR_SPACING_128:
1486		data = DMAC_CFG_MAX_DSPACE_128_;
1487		break;
1488	default:
1489		return -EPERM;
1490	}
1491	if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1492		data |= DMAC_CFG_COAL_EN_;
1493	data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1494	data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1495	lan743x_csr_write(adapter, DMAC_CFG, data);
1496	data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1497	data |= DMAC_COAL_CFG_TIMER_TX_START_;
1498	data |= DMAC_COAL_CFG_FLUSH_INTS_;
1499	data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1500	data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1501	data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1502	data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1503	lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1504	data = DMAC_OBFF_TX_THRES_SET_(0x08);
1505	data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1506	lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1507	return 0;
1508}
1509
1510static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1511				     int tx_channel)
1512{
1513	u32 dmac_cmd = 0;
1514
1515	dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1516	return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1517				      DMAC_CMD_START_T_(tx_channel)),
1518				      (dmac_cmd &
1519				      DMAC_CMD_STOP_T_(tx_channel)));
1520}
1521
1522static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1523					     int tx_channel)
1524{
1525	int timeout = 100;
1526	int result = 0;
1527
1528	while (timeout &&
1529	       ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1530	       DMAC_CHANNEL_STATE_STOP_PENDING)) {
1531		usleep_range(1000, 20000);
1532		timeout--;
1533	}
1534	if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1535		result = -ENODEV;
1536	return result;
1537}
1538
1539static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1540				     int rx_channel)
1541{
1542	u32 dmac_cmd = 0;
1543
1544	dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1545	return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1546				      DMAC_CMD_START_R_(rx_channel)),
1547				      (dmac_cmd &
1548				      DMAC_CMD_STOP_R_(rx_channel)));
1549}
1550
1551static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1552					     int rx_channel)
1553{
1554	int timeout = 100;
1555	int result = 0;
1556
1557	while (timeout &&
1558	       ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1559	       DMAC_CHANNEL_STATE_STOP_PENDING)) {
1560		usleep_range(1000, 20000);
1561		timeout--;
1562	}
1563	if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1564		result = -ENODEV;
1565	return result;
1566}
1567
1568static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1569				    int descriptor_index, bool cleanup)
1570{
1571	struct lan743x_tx_buffer_info *buffer_info = NULL;
1572	struct lan743x_tx_descriptor *descriptor = NULL;
1573	u32 descriptor_type = 0;
1574	bool ignore_sync;
1575
1576	descriptor = &tx->ring_cpu_ptr[descriptor_index];
1577	buffer_info = &tx->buffer_info[descriptor_index];
1578	if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1579		goto done;
1580
1581	descriptor_type = le32_to_cpu(descriptor->data0) &
1582			  TX_DESC_DATA0_DTYPE_MASK_;
1583	if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1584		goto clean_up_data_descriptor;
1585	else
1586		goto clear_active;
1587
1588clean_up_data_descriptor:
1589	if (buffer_info->dma_ptr) {
1590		if (buffer_info->flags &
1591		    TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1592			dma_unmap_page(&tx->adapter->pdev->dev,
1593				       buffer_info->dma_ptr,
1594				       buffer_info->buffer_length,
1595				       DMA_TO_DEVICE);
1596		} else {
1597			dma_unmap_single(&tx->adapter->pdev->dev,
1598					 buffer_info->dma_ptr,
1599					 buffer_info->buffer_length,
1600					 DMA_TO_DEVICE);
1601		}
1602		buffer_info->dma_ptr = 0;
1603		buffer_info->buffer_length = 0;
1604	}
1605	if (!buffer_info->skb)
1606		goto clear_active;
1607
1608	if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
1609		dev_kfree_skb_any(buffer_info->skb);
1610		goto clear_skb;
1611	}
1612
1613	if (cleanup) {
1614		lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1615		dev_kfree_skb_any(buffer_info->skb);
1616	} else {
1617		ignore_sync = (buffer_info->flags &
1618			       TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1619		lan743x_ptp_tx_timestamp_skb(tx->adapter,
1620					     buffer_info->skb, ignore_sync);
1621	}
1622
1623clear_skb:
1624	buffer_info->skb = NULL;
1625
1626clear_active:
1627	buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1628
1629done:
1630	memset(buffer_info, 0, sizeof(*buffer_info));
1631	memset(descriptor, 0, sizeof(*descriptor));
1632}
1633
1634static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1635{
1636	return ((++index) % tx->ring_size);
1637}
1638
1639static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1640{
1641	while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) {
1642		lan743x_tx_release_desc(tx, tx->last_head, false);
1643		tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1644	}
1645}
1646
1647static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1648{
1649	u32 original_head = 0;
1650
1651	original_head = tx->last_head;
1652	do {
1653		lan743x_tx_release_desc(tx, tx->last_head, true);
1654		tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1655	} while (tx->last_head != original_head);
1656	memset(tx->ring_cpu_ptr, 0,
1657	       sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1658	memset(tx->buffer_info, 0,
1659	       sizeof(*tx->buffer_info) * (tx->ring_size));
1660}
1661
1662static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1663				   struct sk_buff *skb)
1664{
1665	int result = 1; /* 1 for the main skb buffer */
1666	int nr_frags = 0;
1667
1668	if (skb_is_gso(skb))
1669		result++; /* requires an extension descriptor */
1670	nr_frags = skb_shinfo(skb)->nr_frags;
1671	result += nr_frags; /* 1 for each fragment buffer */
1672	return result;
1673}
1674
1675static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1676{
1677	int last_head = tx->last_head;
1678	int last_tail = tx->last_tail;
1679
1680	if (last_tail >= last_head)
1681		return tx->ring_size - last_tail + last_head - 1;
1682	else
1683		return last_head - last_tail - 1;
1684}
1685
1686static void lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter *adapter,
1687					   int rx_ts_config)
1688{
1689	int channel_number;
1690	int index;
1691	u32 data;
1692
1693	for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
1694		channel_number = adapter->rx[index].channel_number;
1695		data = lan743x_csr_read(adapter, RX_CFG_B(channel_number));
1696		data &= RX_CFG_B_TS_MASK_;
1697		data |= rx_ts_config;
1698		lan743x_csr_write(adapter, RX_CFG_B(channel_number),
1699				  data);
1700	}
1701}
1702
1703int lan743x_rx_set_tstamp_mode(struct lan743x_adapter *adapter,
1704			       int rx_filter)
1705{
1706	u32 data;
1707
1708	switch (rx_filter) {
1709	case HWTSTAMP_FILTER_PTP_V2_EVENT:
1710			lan743x_rx_cfg_b_tstamp_config(adapter,
1711						       RX_CFG_B_TS_DESCR_EN_);
1712			data = lan743x_csr_read(adapter, PTP_RX_TS_CFG);
1713			data |= PTP_RX_TS_CFG_EVENT_MSGS_;
1714			lan743x_csr_write(adapter, PTP_RX_TS_CFG, data);
1715			break;
1716	case HWTSTAMP_FILTER_NONE:
1717			lan743x_rx_cfg_b_tstamp_config(adapter,
1718						       RX_CFG_B_TS_NONE_);
1719			break;
1720	case HWTSTAMP_FILTER_ALL:
1721			lan743x_rx_cfg_b_tstamp_config(adapter,
1722						       RX_CFG_B_TS_ALL_RX_);
1723			break;
1724	default:
1725			return -ERANGE;
1726	}
1727	adapter->rx_tstamp_filter = rx_filter;
1728	return 0;
1729}
1730
1731void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1732				      bool enable_timestamping,
1733				      bool enable_onestep_sync)
1734{
1735	if (enable_timestamping)
1736		tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1737	else
1738		tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1739	if (enable_onestep_sync)
1740		tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1741	else
1742		tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1743}
1744
1745static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1746				  unsigned char *first_buffer,
1747				  unsigned int first_buffer_length,
1748				  unsigned int frame_length,
1749				  bool time_stamp,
1750				  bool check_sum)
1751{
1752	/* called only from within lan743x_tx_xmit_frame.
1753	 * assuming tx->ring_lock has already been acquired.
1754	 */
1755	struct lan743x_tx_descriptor *tx_descriptor = NULL;
1756	struct lan743x_tx_buffer_info *buffer_info = NULL;
1757	struct lan743x_adapter *adapter = tx->adapter;
1758	struct device *dev = &adapter->pdev->dev;
1759	dma_addr_t dma_ptr;
1760
1761	tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1762	tx->frame_first = tx->last_tail;
1763	tx->frame_tail = tx->frame_first;
1764
1765	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1766	buffer_info = &tx->buffer_info[tx->frame_tail];
1767	dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1768				 DMA_TO_DEVICE);
1769	if (dma_mapping_error(dev, dma_ptr))
1770		return -ENOMEM;
1771
1772	tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1773	tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1774	tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1775		TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1776
1777	buffer_info->skb = NULL;
1778	buffer_info->dma_ptr = dma_ptr;
1779	buffer_info->buffer_length = first_buffer_length;
1780	buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1781
1782	tx->frame_data0 = (first_buffer_length &
1783		TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1784		TX_DESC_DATA0_DTYPE_DATA_ |
1785		TX_DESC_DATA0_FS_ |
1786		TX_DESC_DATA0_FCS_;
1787	if (time_stamp)
1788		tx->frame_data0 |= TX_DESC_DATA0_TSE_;
1789
1790	if (check_sum)
1791		tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1792				   TX_DESC_DATA0_IPE_ |
1793				   TX_DESC_DATA0_TPE_;
1794
1795	/* data0 will be programmed in one of other frame assembler functions */
1796	return 0;
1797}
1798
1799static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1800				     unsigned int frame_length,
1801				     int nr_frags)
1802{
1803	/* called only from within lan743x_tx_xmit_frame.
1804	 * assuming tx->ring_lock has already been acquired.
1805	 */
1806	struct lan743x_tx_descriptor *tx_descriptor = NULL;
1807	struct lan743x_tx_buffer_info *buffer_info = NULL;
1808
1809	/* wrap up previous descriptor */
1810	tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1811	if (nr_frags <= 0) {
1812		tx->frame_data0 |= TX_DESC_DATA0_LS_;
1813		tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1814		tx->frame_last = tx->frame_first;
1815	}
1816	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1817	tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1818
1819	/* move to next descriptor */
1820	tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1821	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1822	buffer_info = &tx->buffer_info[tx->frame_tail];
1823
1824	/* add extension descriptor */
1825	tx_descriptor->data1 = 0;
1826	tx_descriptor->data2 = 0;
1827	tx_descriptor->data3 = 0;
1828
1829	buffer_info->skb = NULL;
1830	buffer_info->dma_ptr = 0;
1831	buffer_info->buffer_length = 0;
1832	buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1833
1834	tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1835			  TX_DESC_DATA0_DTYPE_EXT_ |
1836			  TX_DESC_DATA0_EXT_LSO_;
1837
1838	/* data0 will be programmed in one of other frame assembler functions */
1839}
1840
1841static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1842					 const skb_frag_t *fragment,
1843					 unsigned int frame_length)
1844{
1845	/* called only from within lan743x_tx_xmit_frame
1846	 * assuming tx->ring_lock has already been acquired
1847	 */
1848	struct lan743x_tx_descriptor *tx_descriptor = NULL;
1849	struct lan743x_tx_buffer_info *buffer_info = NULL;
1850	struct lan743x_adapter *adapter = tx->adapter;
1851	struct device *dev = &adapter->pdev->dev;
1852	unsigned int fragment_length = 0;
1853	dma_addr_t dma_ptr;
1854
1855	fragment_length = skb_frag_size(fragment);
1856	if (!fragment_length)
1857		return 0;
1858
1859	/* wrap up previous descriptor */
1860	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1861	tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1862
1863	/* move to next descriptor */
1864	tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1865	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1866	buffer_info = &tx->buffer_info[tx->frame_tail];
1867	dma_ptr = skb_frag_dma_map(dev, fragment,
1868				   0, fragment_length,
1869				   DMA_TO_DEVICE);
1870	if (dma_mapping_error(dev, dma_ptr)) {
1871		int desc_index;
1872
1873		/* cleanup all previously setup descriptors */
1874		desc_index = tx->frame_first;
1875		while (desc_index != tx->frame_tail) {
1876			lan743x_tx_release_desc(tx, desc_index, true);
1877			desc_index = lan743x_tx_next_index(tx, desc_index);
1878		}
1879		dma_wmb();
1880		tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1881		tx->frame_first = 0;
1882		tx->frame_data0 = 0;
1883		tx->frame_tail = 0;
1884		tx->frame_last = 0;
1885		return -ENOMEM;
1886	}
1887
1888	tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1889	tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1890	tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1891			       TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1892
1893	buffer_info->skb = NULL;
1894	buffer_info->dma_ptr = dma_ptr;
1895	buffer_info->buffer_length = fragment_length;
1896	buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1897	buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
1898
1899	tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1900			  TX_DESC_DATA0_DTYPE_DATA_ |
1901			  TX_DESC_DATA0_FCS_;
1902
1903	/* data0 will be programmed in one of other frame assembler functions */
1904	return 0;
1905}
1906
1907static void lan743x_tx_frame_end(struct lan743x_tx *tx,
1908				 struct sk_buff *skb,
1909				 bool time_stamp,
1910				 bool ignore_sync)
1911{
1912	/* called only from within lan743x_tx_xmit_frame
1913	 * assuming tx->ring_lock has already been acquired
1914	 */
1915	struct lan743x_tx_descriptor *tx_descriptor = NULL;
1916	struct lan743x_tx_buffer_info *buffer_info = NULL;
1917	struct lan743x_adapter *adapter = tx->adapter;
1918	u32 tx_tail_flags = 0;
1919
1920	/* wrap up previous descriptor */
1921	if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
1922	    TX_DESC_DATA0_DTYPE_DATA_) {
1923		tx->frame_data0 |= TX_DESC_DATA0_LS_;
1924		tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1925		tx->frame_last = tx->frame_tail;
1926	}
1927
1928	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_last];
1929	buffer_info = &tx->buffer_info[tx->frame_last];
1930	buffer_info->skb = skb;
1931	if (time_stamp)
1932		buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
1933	if (ignore_sync)
1934		buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
1935
1936	tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1937	tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1938	tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1939	tx->last_tail = tx->frame_tail;
1940
1941	dma_wmb();
1942
1943	if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
1944		tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
1945	if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
1946		tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
1947		TX_TAIL_SET_TOP_INT_EN_;
1948
1949	lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1950			  tx_tail_flags | tx->frame_tail);
1951	tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1952}
1953
1954static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
1955					 struct sk_buff *skb)
1956{
1957	int required_number_of_descriptors = 0;
1958	unsigned int start_frame_length = 0;
1959	netdev_tx_t retval = NETDEV_TX_OK;
1960	unsigned int frame_length = 0;
1961	unsigned int head_length = 0;
1962	unsigned long irq_flags = 0;
1963	bool do_timestamp = false;
1964	bool ignore_sync = false;
1965	struct netdev_queue *txq;
1966	int nr_frags = 0;
1967	bool gso = false;
1968	int j;
1969
1970	required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
1971
1972	spin_lock_irqsave(&tx->ring_lock, irq_flags);
1973	if (required_number_of_descriptors >
1974		lan743x_tx_get_avail_desc(tx)) {
1975		if (required_number_of_descriptors > (tx->ring_size - 1)) {
1976			dev_kfree_skb_irq(skb);
1977		} else {
1978			/* save how many descriptors we needed to restart the queue */
1979			tx->rqd_descriptors = required_number_of_descriptors;
1980			retval = NETDEV_TX_BUSY;
1981			txq = netdev_get_tx_queue(tx->adapter->netdev,
1982						  tx->channel_number);
1983			netif_tx_stop_queue(txq);
1984		}
1985		goto unlock;
1986	}
1987
1988	/* space available, transmit skb  */
1989	if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1990	    (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
1991	    (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
1992		skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1993		do_timestamp = true;
1994		if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
1995			ignore_sync = true;
1996	}
1997	head_length = skb_headlen(skb);
1998	frame_length = skb_pagelen(skb);
1999	nr_frags = skb_shinfo(skb)->nr_frags;
2000	start_frame_length = frame_length;
2001	gso = skb_is_gso(skb);
2002	if (gso) {
2003		start_frame_length = max(skb_shinfo(skb)->gso_size,
2004					 (unsigned short)8);
2005	}
2006
2007	if (lan743x_tx_frame_start(tx,
2008				   skb->data, head_length,
2009				   start_frame_length,
2010				   do_timestamp,
2011				   skb->ip_summed == CHECKSUM_PARTIAL)) {
2012		dev_kfree_skb_irq(skb);
2013		goto unlock;
2014	}
2015	tx->frame_count++;
2016
2017	if (gso)
2018		lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
2019
2020	if (nr_frags <= 0)
2021		goto finish;
2022
2023	for (j = 0; j < nr_frags; j++) {
2024		const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]);
2025
2026		if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
2027			/* upon error no need to call
2028			 *	lan743x_tx_frame_end
2029			 * frame assembler clean up was performed inside
2030			 *	lan743x_tx_frame_add_fragment
2031			 */
2032			dev_kfree_skb_irq(skb);
2033			goto unlock;
2034		}
2035	}
2036
2037finish:
2038	lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
2039
2040unlock:
2041	spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2042	return retval;
2043}
2044
2045static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
2046{
2047	struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
2048	struct lan743x_adapter *adapter = tx->adapter;
2049	unsigned long irq_flags = 0;
2050	struct netdev_queue *txq;
2051	u32 ioc_bit = 0;
2052
2053	ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
2054	lan743x_csr_read(adapter, DMAC_INT_STS);
2055	if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
2056		lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
2057	spin_lock_irqsave(&tx->ring_lock, irq_flags);
2058
2059	/* clean up tx ring */
2060	lan743x_tx_release_completed_descriptors(tx);
2061	txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number);
2062	if (netif_tx_queue_stopped(txq)) {
2063		if (tx->rqd_descriptors) {
2064			if (tx->rqd_descriptors <=
2065			    lan743x_tx_get_avail_desc(tx)) {
2066				tx->rqd_descriptors = 0;
2067				netif_tx_wake_queue(txq);
2068			}
2069		} else {
2070			netif_tx_wake_queue(txq);
2071		}
2072	}
2073	spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2074
2075	if (!napi_complete(napi))
2076		goto done;
2077
2078	/* enable isr */
2079	lan743x_csr_write(adapter, INT_EN_SET,
2080			  INT_BIT_DMA_TX_(tx->channel_number));
2081	lan743x_csr_read(adapter, INT_STS);
2082
2083done:
2084	return 0;
2085}
2086
2087static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
2088{
2089	if (tx->head_cpu_ptr) {
2090		dma_free_coherent(&tx->adapter->pdev->dev,
2091				  sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr,
2092				  tx->head_dma_ptr);
2093		tx->head_cpu_ptr = NULL;
2094		tx->head_dma_ptr = 0;
2095	}
2096	kfree(tx->buffer_info);
2097	tx->buffer_info = NULL;
2098
2099	if (tx->ring_cpu_ptr) {
2100		dma_free_coherent(&tx->adapter->pdev->dev,
2101				  tx->ring_allocation_size, tx->ring_cpu_ptr,
2102				  tx->ring_dma_ptr);
2103		tx->ring_allocation_size = 0;
2104		tx->ring_cpu_ptr = NULL;
2105		tx->ring_dma_ptr = 0;
2106	}
2107	tx->ring_size = 0;
2108}
2109
2110static int lan743x_tx_ring_init(struct lan743x_tx *tx)
2111{
2112	size_t ring_allocation_size = 0;
2113	void *cpu_ptr = NULL;
2114	dma_addr_t dma_ptr;
2115	int ret = -ENOMEM;
2116
2117	tx->ring_size = LAN743X_TX_RING_SIZE;
2118	if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
2119		ret = -EINVAL;
2120		goto cleanup;
2121	}
2122	if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
2123				      DMA_BIT_MASK(64))) {
2124		dev_warn(&tx->adapter->pdev->dev,
2125			 "lan743x_: No suitable DMA available\n");
2126		ret = -ENOMEM;
2127		goto cleanup;
2128	}
2129	ring_allocation_size = ALIGN(tx->ring_size *
2130				     sizeof(struct lan743x_tx_descriptor),
2131				     PAGE_SIZE);
2132	dma_ptr = 0;
2133	cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2134				     ring_allocation_size, &dma_ptr, GFP_KERNEL);
2135	if (!cpu_ptr) {
2136		ret = -ENOMEM;
2137		goto cleanup;
2138	}
2139
2140	tx->ring_allocation_size = ring_allocation_size;
2141	tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
2142	tx->ring_dma_ptr = dma_ptr;
2143
2144	cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
2145	if (!cpu_ptr) {
2146		ret = -ENOMEM;
2147		goto cleanup;
2148	}
2149	tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
2150	dma_ptr = 0;
2151	cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2152				     sizeof(*tx->head_cpu_ptr), &dma_ptr,
2153				     GFP_KERNEL);
2154	if (!cpu_ptr) {
2155		ret = -ENOMEM;
2156		goto cleanup;
2157	}
2158
2159	tx->head_cpu_ptr = cpu_ptr;
2160	tx->head_dma_ptr = dma_ptr;
2161	if (tx->head_dma_ptr & 0x3) {
2162		ret = -ENOMEM;
2163		goto cleanup;
2164	}
2165
2166	return 0;
2167
2168cleanup:
2169	lan743x_tx_ring_cleanup(tx);
2170	return ret;
2171}
2172
2173static void lan743x_tx_close(struct lan743x_tx *tx)
2174{
2175	struct lan743x_adapter *adapter = tx->adapter;
2176
2177	lan743x_csr_write(adapter,
2178			  DMAC_CMD,
2179			  DMAC_CMD_STOP_T_(tx->channel_number));
2180	lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
2181
2182	lan743x_csr_write(adapter,
2183			  DMAC_INT_EN_CLR,
2184			  DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2185	lan743x_csr_write(adapter, INT_EN_CLR,
2186			  INT_BIT_DMA_TX_(tx->channel_number));
2187	napi_disable(&tx->napi);
2188	netif_napi_del(&tx->napi);
2189
2190	lan743x_csr_write(adapter, FCT_TX_CTL,
2191			  FCT_TX_CTL_DIS_(tx->channel_number));
2192	lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2193				 FCT_TX_CTL_EN_(tx->channel_number),
2194				 0, 1000, 20000, 100);
2195
2196	lan743x_tx_release_all_descriptors(tx);
2197
2198	tx->rqd_descriptors = 0;
2199
2200	lan743x_tx_ring_cleanup(tx);
2201}
2202
2203static int lan743x_tx_open(struct lan743x_tx *tx)
2204{
2205	struct lan743x_adapter *adapter = NULL;
2206	u32 data = 0;
2207	int ret;
2208
2209	adapter = tx->adapter;
2210	ret = lan743x_tx_ring_init(tx);
2211	if (ret)
2212		return ret;
2213
2214	/* initialize fifo */
2215	lan743x_csr_write(adapter, FCT_TX_CTL,
2216			  FCT_TX_CTL_RESET_(tx->channel_number));
2217	lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2218				 FCT_TX_CTL_RESET_(tx->channel_number),
2219				 0, 1000, 20000, 100);
2220
2221	/* enable fifo */
2222	lan743x_csr_write(adapter, FCT_TX_CTL,
2223			  FCT_TX_CTL_EN_(tx->channel_number));
2224
2225	/* reset tx channel */
2226	lan743x_csr_write(adapter, DMAC_CMD,
2227			  DMAC_CMD_TX_SWR_(tx->channel_number));
2228	lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2229				 DMAC_CMD_TX_SWR_(tx->channel_number),
2230				 0, 1000, 20000, 100);
2231
2232	/* Write TX_BASE_ADDR */
2233	lan743x_csr_write(adapter,
2234			  TX_BASE_ADDRH(tx->channel_number),
2235			  DMA_ADDR_HIGH32(tx->ring_dma_ptr));
2236	lan743x_csr_write(adapter,
2237			  TX_BASE_ADDRL(tx->channel_number),
2238			  DMA_ADDR_LOW32(tx->ring_dma_ptr));
2239
2240	/* Write TX_CFG_B */
2241	data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
2242	data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
2243	data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
2244	if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2245		data |= TX_CFG_B_TDMABL_512_;
2246	lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
2247
2248	/* Write TX_CFG_A */
2249	data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
2250	if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2251		data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
2252		data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
2253		data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
2254		data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
2255	}
2256	lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
2257
2258	/* Write TX_HEAD_WRITEBACK_ADDR */
2259	lan743x_csr_write(adapter,
2260			  TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
2261			  DMA_ADDR_HIGH32(tx->head_dma_ptr));
2262	lan743x_csr_write(adapter,
2263			  TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
2264			  DMA_ADDR_LOW32(tx->head_dma_ptr));
2265
2266	/* set last head */
2267	tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
2268
2269	/* write TX_TAIL */
2270	tx->last_tail = 0;
2271	lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2272			  (u32)(tx->last_tail));
2273	tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2274							 INT_BIT_DMA_TX_
2275							 (tx->channel_number));
2276	netif_napi_add_tx_weight(adapter->netdev,
2277				 &tx->napi, lan743x_tx_napi_poll,
2278				 NAPI_POLL_WEIGHT);
2279	napi_enable(&tx->napi);
2280
2281	data = 0;
2282	if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2283		data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
2284	if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2285		data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
2286	if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2287		data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
2288	if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2289		data |= TX_CFG_C_TX_INT_EN_R2C_;
2290	lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
2291
2292	if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
2293		lan743x_csr_write(adapter, INT_EN_SET,
2294				  INT_BIT_DMA_TX_(tx->channel_number));
2295	lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2296			  DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2297
2298	/*  start dmac channel */
2299	lan743x_csr_write(adapter, DMAC_CMD,
2300			  DMAC_CMD_START_T_(tx->channel_number));
2301	return 0;
2302}
2303
2304static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
2305{
2306	return ((++index) % rx->ring_size);
2307}
2308
2309static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index)
2310{
2311	/* update the tail once per 8 descriptors */
2312	if ((index & 7) == 7)
2313		lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number),
2314				  index);
2315}
2316
2317static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
2318					gfp_t gfp)
2319{
2320	struct net_device *netdev = rx->adapter->netdev;
2321	struct device *dev = &rx->adapter->pdev->dev;
2322	struct lan743x_rx_buffer_info *buffer_info;
2323	unsigned int buffer_length, used_length;
2324	struct lan743x_rx_descriptor *descriptor;
2325	struct sk_buff *skb;
2326	dma_addr_t dma_ptr;
2327
2328	buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING;
2329
2330	descriptor = &rx->ring_cpu_ptr[index];
2331	buffer_info = &rx->buffer_info[index];
2332	skb = __netdev_alloc_skb(netdev, buffer_length, gfp);
2333	if (!skb)
2334		return -ENOMEM;
2335	dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE);
2336	if (dma_mapping_error(dev, dma_ptr)) {
2337		dev_kfree_skb_any(skb);
2338		return -ENOMEM;
2339	}
2340	if (buffer_info->dma_ptr) {
2341		/* sync used area of buffer only */
2342		if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_)
2343			/* frame length is valid only if LS bit is set.
2344			 * it's a safe upper bound for the used area in this
2345			 * buffer.
2346			 */
2347			used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_
2348					  (le32_to_cpu(descriptor->data0)),
2349					  buffer_info->buffer_length);
2350		else
2351			used_length = buffer_info->buffer_length;
2352		dma_sync_single_for_cpu(dev, buffer_info->dma_ptr,
2353					used_length,
2354					DMA_FROM_DEVICE);
2355		dma_unmap_single_attrs(dev, buffer_info->dma_ptr,
2356				       buffer_info->buffer_length,
2357				       DMA_FROM_DEVICE,
2358				       DMA_ATTR_SKIP_CPU_SYNC);
2359	}
2360
2361	buffer_info->skb = skb;
2362	buffer_info->dma_ptr = dma_ptr;
2363	buffer_info->buffer_length = buffer_length;
2364	descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2365	descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2366	descriptor->data3 = 0;
2367	descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2368			    (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2369	lan743x_rx_update_tail(rx, index);
2370
2371	return 0;
2372}
2373
2374static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
2375{
2376	struct lan743x_rx_buffer_info *buffer_info;
2377	struct lan743x_rx_descriptor *descriptor;
2378
2379	descriptor = &rx->ring_cpu_ptr[index];
2380	buffer_info = &rx->buffer_info[index];
2381
2382	descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2383	descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2384	descriptor->data3 = 0;
2385	descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2386			    ((buffer_info->buffer_length) &
2387			    RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2388	lan743x_rx_update_tail(rx, index);
2389}
2390
2391static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
2392{
2393	struct lan743x_rx_buffer_info *buffer_info;
2394	struct lan743x_rx_descriptor *descriptor;
2395
2396	descriptor = &rx->ring_cpu_ptr[index];
2397	buffer_info = &rx->buffer_info[index];
2398
2399	memset(descriptor, 0, sizeof(*descriptor));
2400
2401	if (buffer_info->dma_ptr) {
2402		dma_unmap_single(&rx->adapter->pdev->dev,
2403				 buffer_info->dma_ptr,
2404				 buffer_info->buffer_length,
2405				 DMA_FROM_DEVICE);
2406		buffer_info->dma_ptr = 0;
2407	}
2408
2409	if (buffer_info->skb) {
2410		dev_kfree_skb(buffer_info->skb);
2411		buffer_info->skb = NULL;
2412	}
2413
2414	memset(buffer_info, 0, sizeof(*buffer_info));
2415}
2416
2417static struct sk_buff *
2418lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length)
2419{
2420	if (skb_linearize(skb)) {
2421		dev_kfree_skb_irq(skb);
2422		return NULL;
2423	}
2424	frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN);
2425	if (skb->len > frame_length) {
2426		skb->tail -= skb->len - frame_length;
2427		skb->len = frame_length;
2428	}
2429	return skb;
2430}
2431
2432static int lan743x_rx_process_buffer(struct lan743x_rx *rx)
2433{
2434	int current_head_index = le32_to_cpu(*rx->head_cpu_ptr);
2435	struct lan743x_rx_descriptor *descriptor, *desc_ext;
2436	struct net_device *netdev = rx->adapter->netdev;
2437	int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2438	struct lan743x_rx_buffer_info *buffer_info;
2439	int frame_length, buffer_length;
2440	bool is_ice, is_tce, is_icsm;
2441	int extension_index = -1;
2442	bool is_last, is_first;
2443	struct sk_buff *skb;
2444
2445	if (current_head_index < 0 || current_head_index >= rx->ring_size)
2446		goto done;
2447
2448	if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
2449		goto done;
2450
2451	if (rx->last_head == current_head_index)
2452		goto done;
2453
2454	descriptor = &rx->ring_cpu_ptr[rx->last_head];
2455	if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_)
2456		goto done;
2457	buffer_info = &rx->buffer_info[rx->last_head];
2458
2459	is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_;
2460	is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_;
2461
2462	if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) {
2463		/* extension is expected to follow */
2464		int index = lan743x_rx_next_index(rx, rx->last_head);
2465
2466		if (index == current_head_index)
2467			/* extension not yet available */
2468			goto done;
2469		desc_ext = &rx->ring_cpu_ptr[index];
2470		if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_)
2471			/* extension not yet available */
2472			goto done;
2473		if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_))
2474			goto move_forward;
2475		extension_index = index;
2476	}
2477
2478	/* Only the last buffer in a multi-buffer frame contains the total frame
2479	 * length. The chip occasionally sends more buffers than strictly
2480	 * required to reach the total frame length.
2481	 * Handle this by adding all buffers to the skb in their entirety.
2482	 * Once the real frame length is known, trim the skb.
2483	 */
2484	frame_length =
2485		RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0));
2486	buffer_length = buffer_info->buffer_length;
2487	is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_;
2488	is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_;
2489	is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_;
2490
2491	netdev_dbg(netdev, "%s%schunk: %d/%d",
2492		   is_first ? "first " : "      ",
2493		   is_last  ? "last  " : "      ",
2494		   frame_length, buffer_length);
2495
2496	/* save existing skb, allocate new skb and map to dma */
2497	skb = buffer_info->skb;
2498	if (lan743x_rx_init_ring_element(rx, rx->last_head, GFP_ATOMIC)) {
2499		/* failed to allocate next skb.
2500		 * Memory is very low.
2501		 * Drop this packet and reuse buffer.
2502		 */
2503		lan743x_rx_reuse_ring_element(rx, rx->last_head);
2504		/* drop packet that was being assembled */
2505		dev_kfree_skb_irq(rx->skb_head);
2506		rx->skb_head = NULL;
2507		goto process_extension;
2508	}
2509
2510	/* add buffers to skb via skb->frag_list */
2511	if (is_first) {
2512		skb_reserve(skb, RX_HEAD_PADDING);
2513		skb_put(skb, buffer_length - RX_HEAD_PADDING);
2514		if (rx->skb_head)
2515			dev_kfree_skb_irq(rx->skb_head);
2516		rx->skb_head = skb;
2517	} else if (rx->skb_head) {
2518		skb_put(skb, buffer_length);
2519		if (skb_shinfo(rx->skb_head)->frag_list)
2520			rx->skb_tail->next = skb;
2521		else
2522			skb_shinfo(rx->skb_head)->frag_list = skb;
2523		rx->skb_tail = skb;
2524		rx->skb_head->len += skb->len;
2525		rx->skb_head->data_len += skb->len;
2526		rx->skb_head->truesize += skb->truesize;
2527	} else {
2528		/* packet to assemble has already been dropped because one or
2529		 * more of its buffers could not be allocated
2530		 */
2531		netdev_dbg(netdev, "drop buffer intended for dropped packet");
2532		dev_kfree_skb_irq(skb);
2533	}
2534
2535process_extension:
2536	if (extension_index >= 0) {
2537		u32 ts_sec;
2538		u32 ts_nsec;
2539
2540		ts_sec = le32_to_cpu(desc_ext->data1);
2541		ts_nsec = (le32_to_cpu(desc_ext->data2) &
2542			  RX_DESC_DATA2_TS_NS_MASK_);
2543		if (rx->skb_head)
2544			skb_hwtstamps(rx->skb_head)->hwtstamp =
2545				ktime_set(ts_sec, ts_nsec);
2546		lan743x_rx_reuse_ring_element(rx, extension_index);
2547		rx->last_head = extension_index;
2548		netdev_dbg(netdev, "process extension");
2549	}
2550
2551	if (is_last && rx->skb_head)
2552		rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length);
2553
2554	if (is_last && rx->skb_head) {
2555		rx->skb_head->protocol = eth_type_trans(rx->skb_head,
2556							rx->adapter->netdev);
2557		if (rx->adapter->netdev->features & NETIF_F_RXCSUM) {
2558			if (!is_ice && !is_tce && !is_icsm)
2559				skb->ip_summed = CHECKSUM_UNNECESSARY;
2560		}
2561		netdev_dbg(netdev, "sending %d byte frame to OS",
2562			   rx->skb_head->len);
2563		napi_gro_receive(&rx->napi, rx->skb_head);
2564		rx->skb_head = NULL;
2565	}
2566
2567move_forward:
2568	/* push tail and head forward */
2569	rx->last_tail = rx->last_head;
2570	rx->last_head = lan743x_rx_next_index(rx, rx->last_head);
2571	result = RX_PROCESS_RESULT_BUFFER_RECEIVED;
2572done:
2573	return result;
2574}
2575
2576static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2577{
2578	struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2579	struct lan743x_adapter *adapter = rx->adapter;
2580	int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2581	u32 rx_tail_flags = 0;
2582	int count;
2583
2584	if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2585		/* clear int status bit before reading packet */
2586		lan743x_csr_write(adapter, DMAC_INT_STS,
2587				  DMAC_INT_BIT_RXFRM_(rx->channel_number));
2588	}
2589	for (count = 0; count < weight; count++) {
2590		result = lan743x_rx_process_buffer(rx);
2591		if (result == RX_PROCESS_RESULT_NOTHING_TO_DO)
2592			break;
2593	}
2594	rx->frame_count += count;
2595	if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED)
2596		return weight;
2597
2598	if (!napi_complete_done(napi, count))
2599		return count;
2600
2601	/* re-arm interrupts, must write to rx tail on some chip variants */
2602	if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2603		rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2604	if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2605		rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2606	} else {
2607		lan743x_csr_write(adapter, INT_EN_SET,
2608				  INT_BIT_DMA_RX_(rx->channel_number));
2609	}
2610
2611	if (rx_tail_flags)
2612		lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2613				  rx_tail_flags | rx->last_tail);
2614
2615	return count;
2616}
2617
2618static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2619{
2620	if (rx->buffer_info && rx->ring_cpu_ptr) {
2621		int index;
2622
2623		for (index = 0; index < rx->ring_size; index++)
2624			lan743x_rx_release_ring_element(rx, index);
2625	}
2626
2627	if (rx->head_cpu_ptr) {
2628		dma_free_coherent(&rx->adapter->pdev->dev,
2629				  sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr,
2630				  rx->head_dma_ptr);
2631		rx->head_cpu_ptr = NULL;
2632		rx->head_dma_ptr = 0;
2633	}
2634
2635	kfree(rx->buffer_info);
2636	rx->buffer_info = NULL;
2637
2638	if (rx->ring_cpu_ptr) {
2639		dma_free_coherent(&rx->adapter->pdev->dev,
2640				  rx->ring_allocation_size, rx->ring_cpu_ptr,
2641				  rx->ring_dma_ptr);
2642		rx->ring_allocation_size = 0;
2643		rx->ring_cpu_ptr = NULL;
2644		rx->ring_dma_ptr = 0;
2645	}
2646
2647	rx->ring_size = 0;
2648	rx->last_head = 0;
2649}
2650
2651static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2652{
2653	size_t ring_allocation_size = 0;
2654	dma_addr_t dma_ptr = 0;
2655	void *cpu_ptr = NULL;
2656	int ret = -ENOMEM;
2657	int index = 0;
2658
2659	rx->ring_size = LAN743X_RX_RING_SIZE;
2660	if (rx->ring_size <= 1) {
2661		ret = -EINVAL;
2662		goto cleanup;
2663	}
2664	if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2665		ret = -EINVAL;
2666		goto cleanup;
2667	}
2668	if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2669				      DMA_BIT_MASK(64))) {
2670		dev_warn(&rx->adapter->pdev->dev,
2671			 "lan743x_: No suitable DMA available\n");
2672		ret = -ENOMEM;
2673		goto cleanup;
2674	}
2675	ring_allocation_size = ALIGN(rx->ring_size *
2676				     sizeof(struct lan743x_rx_descriptor),
2677				     PAGE_SIZE);
2678	dma_ptr = 0;
2679	cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2680				     ring_allocation_size, &dma_ptr, GFP_KERNEL);
2681	if (!cpu_ptr) {
2682		ret = -ENOMEM;
2683		goto cleanup;
2684	}
2685	rx->ring_allocation_size = ring_allocation_size;
2686	rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2687	rx->ring_dma_ptr = dma_ptr;
2688
2689	cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
2690			  GFP_KERNEL);
2691	if (!cpu_ptr) {
2692		ret = -ENOMEM;
2693		goto cleanup;
2694	}
2695	rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2696	dma_ptr = 0;
2697	cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2698				     sizeof(*rx->head_cpu_ptr), &dma_ptr,
2699				     GFP_KERNEL);
2700	if (!cpu_ptr) {
2701		ret = -ENOMEM;
2702		goto cleanup;
2703	}
2704
2705	rx->head_cpu_ptr = cpu_ptr;
2706	rx->head_dma_ptr = dma_ptr;
2707	if (rx->head_dma_ptr & 0x3) {
2708		ret = -ENOMEM;
2709		goto cleanup;
2710	}
2711
2712	rx->last_head = 0;
2713	for (index = 0; index < rx->ring_size; index++) {
2714		ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL);
2715		if (ret)
2716			goto cleanup;
2717	}
2718	return 0;
2719
2720cleanup:
2721	netif_warn(rx->adapter, ifup, rx->adapter->netdev,
2722		   "Error allocating memory for LAN743x\n");
2723
2724	lan743x_rx_ring_cleanup(rx);
2725	return ret;
2726}
2727
2728static void lan743x_rx_close(struct lan743x_rx *rx)
2729{
2730	struct lan743x_adapter *adapter = rx->adapter;
2731
2732	lan743x_csr_write(adapter, FCT_RX_CTL,
2733			  FCT_RX_CTL_DIS_(rx->channel_number));
2734	lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2735				 FCT_RX_CTL_EN_(rx->channel_number),
2736				 0, 1000, 20000, 100);
2737
2738	lan743x_csr_write(adapter, DMAC_CMD,
2739			  DMAC_CMD_STOP_R_(rx->channel_number));
2740	lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2741
2742	lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2743			  DMAC_INT_BIT_RXFRM_(rx->channel_number));
2744	lan743x_csr_write(adapter, INT_EN_CLR,
2745			  INT_BIT_DMA_RX_(rx->channel_number));
2746	napi_disable(&rx->napi);
2747
2748	netif_napi_del(&rx->napi);
2749
2750	lan743x_rx_ring_cleanup(rx);
2751}
2752
2753static int lan743x_rx_open(struct lan743x_rx *rx)
2754{
2755	struct lan743x_adapter *adapter = rx->adapter;
2756	u32 data = 0;
2757	int ret;
2758
2759	rx->frame_count = 0;
2760	ret = lan743x_rx_ring_init(rx);
2761	if (ret)
2762		goto return_error;
2763
2764	netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll);
2765
2766	lan743x_csr_write(adapter, DMAC_CMD,
2767			  DMAC_CMD_RX_SWR_(rx->channel_number));
2768	lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2769				 DMAC_CMD_RX_SWR_(rx->channel_number),
2770				 0, 1000, 20000, 100);
2771
2772	/* set ring base address */
2773	lan743x_csr_write(adapter,
2774			  RX_BASE_ADDRH(rx->channel_number),
2775			  DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2776	lan743x_csr_write(adapter,
2777			  RX_BASE_ADDRL(rx->channel_number),
2778			  DMA_ADDR_LOW32(rx->ring_dma_ptr));
2779
2780	/* set rx write back address */
2781	lan743x_csr_write(adapter,
2782			  RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2783			  DMA_ADDR_HIGH32(rx->head_dma_ptr));
2784	lan743x_csr_write(adapter,
2785			  RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2786			  DMA_ADDR_LOW32(rx->head_dma_ptr));
2787	data = RX_CFG_A_RX_HP_WB_EN_;
2788	if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2789		data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2790			RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2791			RX_CFG_A_RX_PF_THRES_SET_(16) |
2792			RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2793	}
2794
2795	/* set RX_CFG_A */
2796	lan743x_csr_write(adapter,
2797			  RX_CFG_A(rx->channel_number), data);
2798
2799	/* set RX_CFG_B */
2800	data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2801	data &= ~RX_CFG_B_RX_PAD_MASK_;
2802	if (!RX_HEAD_PADDING)
2803		data |= RX_CFG_B_RX_PAD_0_;
2804	else
2805		data |= RX_CFG_B_RX_PAD_2_;
2806	data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2807	data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2808	if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2809		data |= RX_CFG_B_RDMABL_512_;
2810
2811	lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2812	rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2813							 INT_BIT_DMA_RX_
2814							 (rx->channel_number));
2815
2816	/* set RX_CFG_C */
2817	data = 0;
2818	if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2819		data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2820	if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2821		data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2822	if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2823		data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2824	if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2825		data |= RX_CFG_C_RX_INT_EN_R2C_;
2826	lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2827
2828	rx->last_tail = ((u32)(rx->ring_size - 1));
2829	lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2830			  rx->last_tail);
2831	rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2832	if (rx->last_head) {
2833		ret = -EIO;
2834		goto napi_delete;
2835	}
2836
2837	napi_enable(&rx->napi);
2838
2839	lan743x_csr_write(adapter, INT_EN_SET,
2840			  INT_BIT_DMA_RX_(rx->channel_number));
2841	lan743x_csr_write(adapter, DMAC_INT_STS,
2842			  DMAC_INT_BIT_RXFRM_(rx->channel_number));
2843	lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2844			  DMAC_INT_BIT_RXFRM_(rx->channel_number));
2845	lan743x_csr_write(adapter, DMAC_CMD,
2846			  DMAC_CMD_START_R_(rx->channel_number));
2847
2848	/* initialize fifo */
2849	lan743x_csr_write(adapter, FCT_RX_CTL,
2850			  FCT_RX_CTL_RESET_(rx->channel_number));
2851	lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2852				 FCT_RX_CTL_RESET_(rx->channel_number),
2853				 0, 1000, 20000, 100);
2854	lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2855			  FCT_FLOW_CTL_REQ_EN_ |
2856			  FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2857			  FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2858
2859	/* enable fifo */
2860	lan743x_csr_write(adapter, FCT_RX_CTL,
2861			  FCT_RX_CTL_EN_(rx->channel_number));
2862	return 0;
2863
2864napi_delete:
2865	netif_napi_del(&rx->napi);
2866	lan743x_rx_ring_cleanup(rx);
2867
2868return_error:
2869	return ret;
2870}
2871
2872static int lan743x_phylink_sgmii_config(struct lan743x_adapter *adapter)
2873{
2874	u32 sgmii_ctl;
2875	int ret;
2876
2877	ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL,
2878			      MASTER_SLAVE_STATE_MASTER);
2879	if (ret < 0) {
2880		netif_err(adapter, drv, adapter->netdev,
2881			  "error %d link-speed-duplex(LSD) invalid\n", ret);
2882		return ret;
2883	}
2884
2885	adapter->sgmii_lsd = ret;
2886	netif_dbg(adapter, drv, adapter->netdev,
2887		  "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2888
2889	/* LINK_STATUS_SOURCE from the External PHY via SGMII */
2890	sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2891	sgmii_ctl &= ~SGMII_CTL_LINK_STATUS_SOURCE_;
2892	lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2893
2894	ret = lan743x_serdes_clock_and_aneg_update(adapter);
2895	if (ret < 0) {
2896		netif_err(adapter, drv, adapter->netdev,
2897			  "error %d sgmii aneg update failed\n", ret);
2898		return ret;
2899	}
2900
2901	return lan743x_pcs_power_reset(adapter);
2902}
2903
2904static int lan743x_phylink_1000basex_config(struct lan743x_adapter *adapter)
2905{
2906	u32 sgmii_ctl;
2907	int ret;
2908
2909	ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL,
2910			      MASTER_SLAVE_STATE_MASTER);
2911	if (ret < 0) {
2912		netif_err(adapter, drv, adapter->netdev,
2913			  "error %d link-speed-duplex(LSD) invalid\n", ret);
2914		return ret;
2915	}
2916
2917	adapter->sgmii_lsd = ret;
2918	netif_dbg(adapter, drv, adapter->netdev,
2919		  "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2920
2921	/* LINK_STATUS_SOURCE from 1000BASE-X PCS link status */
2922	sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2923	sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_;
2924	lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2925
2926	ret = lan743x_serdes_clock_and_aneg_update(adapter);
2927	if (ret < 0) {
2928		netif_err(adapter, drv, adapter->netdev,
2929			  "error %d 1000basex aneg update failed\n", ret);
2930		return ret;
2931	}
2932
2933	return lan743x_pcs_power_reset(adapter);
2934}
2935
2936static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter)
2937{
2938	u32 sgmii_ctl;
2939	int ret;
2940
2941	ret = lan743x_get_lsd(SPEED_2500, DUPLEX_FULL,
2942			      MASTER_SLAVE_STATE_MASTER);
2943	if (ret < 0) {
2944		netif_err(adapter, drv, adapter->netdev,
2945			  "error %d link-speed-duplex(LSD) invalid\n", ret);
2946		return ret;
2947	}
2948
2949	adapter->sgmii_lsd = ret;
2950	netif_dbg(adapter, drv, adapter->netdev,
2951		  "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2952
2953	/* LINK_STATUS_SOURCE from 2500BASE-X PCS link status */
2954	sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2955	sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_;
2956	lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2957
2958	ret = lan743x_serdes_clock_and_aneg_update(adapter);
2959	if (ret < 0) {
2960		netif_err(adapter, drv, adapter->netdev,
2961			  "error %d 2500basex aneg update failed\n", ret);
2962		return ret;
2963	}
2964
2965	return lan743x_pcs_power_reset(adapter);
2966}
2967
2968static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable)
2969{
2970	u32 mac_cr;
2971
2972	mac_cr = lan743x_csr_read(adapter, MAC_CR);
2973	if (enable)
2974		mac_cr |= MAC_CR_EEE_EN_;
2975	else
2976		mac_cr &= ~MAC_CR_EEE_EN_;
2977	lan743x_csr_write(adapter, MAC_CR, mac_cr);
2978}
2979
2980static void lan743x_phylink_mac_config(struct phylink_config *config,
2981				       unsigned int link_an_mode,
2982				       const struct phylink_link_state *state)
2983{
2984	struct net_device *netdev = to_net_dev(config->dev);
2985	struct lan743x_adapter *adapter = netdev_priv(netdev);
2986	int ret;
2987
2988	switch (state->interface) {
2989	case PHY_INTERFACE_MODE_2500BASEX:
2990		ret = lan743x_phylink_2500basex_config(adapter);
2991		if (ret < 0)
2992			netif_err(adapter, drv, adapter->netdev,
2993				  "2500BASEX config failed. Error %d\n", ret);
2994		else
2995			netif_dbg(adapter, drv, adapter->netdev,
2996				  "2500BASEX mode selected and configured\n");
2997		break;
2998	case PHY_INTERFACE_MODE_1000BASEX:
2999		ret = lan743x_phylink_1000basex_config(adapter);
3000		if (ret < 0)
3001			netif_err(adapter, drv, adapter->netdev,
3002				  "1000BASEX config failed. Error %d\n", ret);
3003		else
3004			netif_dbg(adapter, drv, adapter->netdev,
3005				  "1000BASEX mode selected and configured\n");
3006		break;
3007	case PHY_INTERFACE_MODE_SGMII:
3008		ret = lan743x_phylink_sgmii_config(adapter);
3009		if (ret < 0)
3010			netif_err(adapter, drv, adapter->netdev,
3011				  "SGMII config failed. Error %d\n", ret);
3012		else
3013			netif_dbg(adapter, drv, adapter->netdev,
3014				  "SGMII mode selected and configured\n");
3015		break;
3016	default:
3017		netif_dbg(adapter, drv, adapter->netdev,
3018			  "RGMII/GMII/MII(0x%X) mode enable\n",
3019			  state->interface);
3020		break;
3021	}
3022}
3023
3024static void lan743x_phylink_mac_link_down(struct phylink_config *config,
3025					  unsigned int link_an_mode,
3026					  phy_interface_t interface)
3027{
3028	struct net_device *netdev = to_net_dev(config->dev);
3029
3030	netif_tx_stop_all_queues(netdev);
3031}
3032
3033static void lan743x_phylink_mac_link_up(struct phylink_config *config,
3034					struct phy_device *phydev,
3035					unsigned int link_an_mode,
3036					phy_interface_t interface,
3037					int speed, int duplex,
3038					bool tx_pause, bool rx_pause)
3039{
3040	struct net_device *netdev = to_net_dev(config->dev);
3041	struct lan743x_adapter *adapter = netdev_priv(netdev);
3042	int mac_cr;
3043	u8 cap;
3044
3045	mac_cr = lan743x_csr_read(adapter, MAC_CR);
3046	/* Pre-initialize register bits.
3047	 * Resulting value corresponds to SPEED_10
3048	 */
3049	mac_cr &= ~(MAC_CR_CFG_H_ | MAC_CR_CFG_L_);
3050	if (speed == SPEED_2500)
3051		mac_cr |= MAC_CR_CFG_H_ | MAC_CR_CFG_L_;
3052	else if (speed == SPEED_1000)
3053		mac_cr |= MAC_CR_CFG_H_;
3054	else if (speed == SPEED_100)
3055		mac_cr |= MAC_CR_CFG_L_;
3056
3057	if (duplex == DUPLEX_FULL)
3058		mac_cr |= MAC_CR_DPX_;
3059	else
3060		mac_cr &= ~MAC_CR_DPX_;
3061
3062	lan743x_csr_write(adapter, MAC_CR, mac_cr);
3063
3064	lan743x_ptp_update_latency(adapter, speed);
3065
3066	/* Flow Control operation */
3067	cap = 0;
3068	if (tx_pause)
3069		cap |= FLOW_CTRL_TX;
3070	if (rx_pause)
3071		cap |= FLOW_CTRL_RX;
3072
3073	lan743x_mac_flow_ctrl_set_enables(adapter,
3074					  cap & FLOW_CTRL_TX,
3075					  cap & FLOW_CTRL_RX);
3076
3077	netif_tx_wake_all_queues(netdev);
3078}
3079
3080static void lan743x_mac_disable_tx_lpi(struct phylink_config *config)
3081{
3082	struct net_device *netdev = to_net_dev(config->dev);
3083	struct lan743x_adapter *adapter = netdev_priv(netdev);
3084
3085	lan743x_mac_eee_enable(adapter, false);
3086}
3087
3088static int lan743x_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,
3089				     bool tx_clk_stop)
3090{
3091	struct net_device *netdev = to_net_dev(config->dev);
3092	struct lan743x_adapter *adapter = netdev_priv(netdev);
3093
3094	/* Software should only change this field when Energy Efficient
3095	 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing
3096	 * EEEEN during probe, and phylink itself guarantees that
3097	 * mac_disable_tx_lpi() will have been previously called.
3098	 */
3099	lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer);
3100	lan743x_mac_eee_enable(adapter, true);
3101
3102	return 0;
3103}
3104
3105static const struct phylink_mac_ops lan743x_phylink_mac_ops = {
3106	.mac_config = lan743x_phylink_mac_config,
3107	.mac_link_down = lan743x_phylink_mac_link_down,
3108	.mac_link_up = lan743x_phylink_mac_link_up,
3109	.mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi,
3110	.mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi,
3111};
3112
3113static int lan743x_phylink_create(struct lan743x_adapter *adapter)
3114{
3115	struct net_device *netdev = adapter->netdev;
3116	struct phylink *pl;
3117
3118	adapter->phylink_config.dev = &netdev->dev;
3119	adapter->phylink_config.type = PHYLINK_NETDEV;
3120	adapter->phylink_config.mac_managed_pm = false;
3121
3122	adapter->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |
3123		MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD;
3124	adapter->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD;
3125	adapter->phylink_config.lpi_timer_default =
3126		lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT);
3127
3128	lan743x_phy_interface_select(adapter);
3129
3130	switch (adapter->phy_interface) {
3131	case PHY_INTERFACE_MODE_SGMII:
3132		__set_bit(PHY_INTERFACE_MODE_SGMII,
3133			  adapter->phylink_config.supported_interfaces);
3134		__set_bit(PHY_INTERFACE_MODE_1000BASEX,
3135			  adapter->phylink_config.supported_interfaces);
3136		__set_bit(PHY_INTERFACE_MODE_2500BASEX,
3137			  adapter->phylink_config.supported_interfaces);
3138		adapter->phylink_config.mac_capabilities |= MAC_2500FD;
3139		break;
3140	case PHY_INTERFACE_MODE_GMII:
3141		__set_bit(PHY_INTERFACE_MODE_GMII,
3142			  adapter->phylink_config.supported_interfaces);
3143		break;
3144	case PHY_INTERFACE_MODE_MII:
3145		__set_bit(PHY_INTERFACE_MODE_MII,
3146			  adapter->phylink_config.supported_interfaces);
3147		break;
3148	default:
3149		phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces);
3150	}
3151
3152	memcpy(adapter->phylink_config.lpi_interfaces,
3153	       adapter->phylink_config.supported_interfaces,
3154	       sizeof(adapter->phylink_config.lpi_interfaces));
3155
3156	pl = phylink_create(&adapter->phylink_config, NULL,
3157			    adapter->phy_interface, &lan743x_phylink_mac_ops);
3158
3159	if (IS_ERR(pl)) {
3160		netdev_err(netdev, "Could not create phylink (%pe)\n", pl);
3161		return PTR_ERR(pl);
3162	}
3163
3164	adapter->phylink = pl;
3165	netdev_dbg(netdev, "lan743x phylink created");
3166
3167	return 0;
3168}
3169
3170static bool lan743x_phy_handle_exists(struct device_node *dn)
3171{
3172	dn = of_parse_phandle(dn, "phy-handle", 0);
3173	of_node_put(dn);
3174	return dn != NULL;
3175}
3176
3177static int lan743x_phylink_connect(struct lan743x_adapter *adapter)
3178{
3179	struct device_node *dn = adapter->pdev->dev.of_node;
3180	struct net_device *dev = adapter->netdev;
3181	struct phy_device *phydev;
3182	int ret;
3183
3184	if (dn)
3185		ret = phylink_of_phy_connect(adapter->phylink, dn, 0);
3186
3187	if (!dn || (ret && !lan743x_phy_handle_exists(dn))) {
3188		phydev = phy_find_first(adapter->mdiobus);
3189		if (phydev) {
3190			/* attach the mac to the phy */
3191			ret = phylink_connect_phy(adapter->phylink, phydev);
3192		} else if (((adapter->csr.id_rev & ID_REV_ID_MASK_) ==
3193			      ID_REV_ID_LAN7431_) || adapter->is_pci11x1x) {
3194			struct phylink_link_state state;
3195			unsigned long caps;
3196
3197			caps = adapter->phylink_config.mac_capabilities;
3198			if (caps & MAC_2500FD) {
3199				state.speed = SPEED_2500;
3200				state.duplex = DUPLEX_FULL;
3201			} else if (caps & MAC_1000FD) {
3202				state.speed = SPEED_1000;
3203				state.duplex = DUPLEX_FULL;
3204			} else {
3205				state.speed = SPEED_UNKNOWN;
3206				state.duplex = DUPLEX_UNKNOWN;
3207			}
3208
3209			ret = phylink_set_fixed_link(adapter->phylink, &state);
3210			if (ret) {
3211				netdev_err(dev, "Could not set fixed link\n");
3212				return ret;
3213			}
3214		} else {
3215			netdev_err(dev, "no PHY found\n");
3216			return -ENXIO;
3217		}
3218	}
3219
3220	if (ret) {
3221		netdev_err(dev, "Could not attach PHY (%d)\n", ret);
3222		return ret;
3223	}
3224
3225	phylink_start(adapter->phylink);
3226
3227	return 0;
3228}
3229
3230static void lan743x_phylink_disconnect(struct lan743x_adapter *adapter)
3231{
3232	phylink_stop(adapter->phylink);
3233	phylink_disconnect_phy(adapter->phylink);
3234}
3235
3236static int lan743x_netdev_close(struct net_device *netdev)
3237{
3238	struct lan743x_adapter *adapter = netdev_priv(netdev);
3239	int index;
3240
3241	for (index = 0; index < adapter->used_tx_channels; index++)
3242		lan743x_tx_close(&adapter->tx[index]);
3243
3244	for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
3245		lan743x_rx_close(&adapter->rx[index]);
3246
3247	lan743x_ptp_close(adapter);
3248
3249	lan743x_phylink_disconnect(adapter);
3250
3251	lan743x_mac_close(adapter);
3252
3253	lan743x_intr_close(adapter);
3254
3255	return 0;
3256}
3257
3258static int lan743x_netdev_open(struct net_device *netdev)
3259{
3260	struct lan743x_adapter *adapter = netdev_priv(netdev);
3261	int index;
3262	int ret;
3263
3264	ret = lan743x_intr_open(adapter);
3265	if (ret)
3266		goto return_error;
3267
3268	ret = lan743x_mac_open(adapter);
3269	if (ret)
3270		goto close_intr;
3271
3272	ret = lan743x_phylink_connect(adapter);
3273	if (ret)
3274		goto close_mac;
3275
3276	ret = lan743x_ptp_open(adapter);
3277	if (ret)
3278		goto close_mac;
3279
3280	lan743x_rfe_open(adapter);
3281
3282	for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3283		ret = lan743x_rx_open(&adapter->rx[index]);
3284		if (ret)
3285			goto close_rx;
3286	}
3287
3288	for (index = 0; index < adapter->used_tx_channels; index++) {
3289		ret = lan743x_tx_open(&adapter->tx[index]);
3290		if (ret)
3291			goto close_tx;
3292	}
3293
3294	if (netdev->phydev)
3295		phy_support_eee(netdev->phydev);
3296
3297#ifdef CONFIG_PM
3298	if (adapter->netdev->phydev) {
3299		struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
3300
3301		phy_ethtool_get_wol(netdev->phydev, &wol);
3302		adapter->phy_wol_supported = wol.supported;
3303		adapter->phy_wolopts = wol.wolopts;
3304	}
3305#endif
3306
3307	return 0;
3308
3309close_tx:
3310	for (index = 0; index < adapter->used_tx_channels; index++) {
3311		if (adapter->tx[index].ring_cpu_ptr)
3312			lan743x_tx_close(&adapter->tx[index]);
3313	}
3314
3315close_rx:
3316	for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3317		if (adapter->rx[index].ring_cpu_ptr)
3318			lan743x_rx_close(&adapter->rx[index]);
3319	}
3320	lan743x_ptp_close(adapter);
3321	if (adapter->phylink)
3322		lan743x_phylink_disconnect(adapter);
3323
3324close_mac:
3325	lan743x_mac_close(adapter);
3326
3327close_intr:
3328	lan743x_intr_close(adapter);
3329
3330return_error:
3331	netif_warn(adapter, ifup, adapter->netdev,
3332		   "Error opening LAN743x\n");
3333	return ret;
3334}
3335
3336static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
3337					     struct net_device *netdev)
3338{
3339	struct lan743x_adapter *adapter = netdev_priv(netdev);
3340	u8 ch = 0;
3341
3342	if (adapter->is_pci11x1x)
3343		ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS;
3344
3345	return lan743x_tx_xmit_frame(&adapter->tx[ch], skb);
3346}
3347
3348static int lan743x_netdev_ioctl(struct net_device *netdev,
3349				struct ifreq *ifr, int cmd)
3350{
3351	struct lan743x_adapter *adapter = netdev_priv(netdev);
3352
3353	if (!netif_running(netdev))
3354		return -EINVAL;
3355
3356	return phylink_mii_ioctl(adapter->phylink, ifr, cmd);
3357}
3358
3359static void lan743x_netdev_set_multicast(struct net_device *netdev)
3360{
3361	struct lan743x_adapter *adapter = netdev_priv(netdev);
3362
3363	lan743x_rfe_set_multicast(adapter);
3364}
3365
3366static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
3367{
3368	struct lan743x_adapter *adapter = netdev_priv(netdev);
3369	int ret = 0;
3370
3371	ret = lan743x_mac_set_mtu(adapter, new_mtu);
3372	if (!ret)
3373		WRITE_ONCE(netdev->mtu, new_mtu);
3374	return ret;
3375}
3376
3377static void lan743x_netdev_get_stats64(struct net_device *netdev,
3378				       struct rtnl_link_stats64 *stats)
3379{
3380	struct lan743x_adapter *adapter = netdev_priv(netdev);
3381
3382	stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
3383	stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
3384	stats->rx_bytes = lan743x_csr_read(adapter,
3385					   STAT_RX_UNICAST_BYTE_COUNT) +
3386			  lan743x_csr_read(adapter,
3387					   STAT_RX_BROADCAST_BYTE_COUNT) +
3388			  lan743x_csr_read(adapter,
3389					   STAT_RX_MULTICAST_BYTE_COUNT);
3390	stats->tx_bytes = lan743x_csr_read(adapter,
3391					   STAT_TX_UNICAST_BYTE_COUNT) +
3392			  lan743x_csr_read(adapter,
3393					   STAT_TX_BROADCAST_BYTE_COUNT) +
3394			  lan743x_csr_read(adapter,
3395					   STAT_TX_MULTICAST_BYTE_COUNT);
3396	stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
3397			   lan743x_csr_read(adapter,
3398					    STAT_RX_ALIGNMENT_ERRORS) +
3399			   lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
3400			   lan743x_csr_read(adapter,
3401					    STAT_RX_UNDERSIZE_FRAME_ERRORS) +
3402			   lan743x_csr_read(adapter,
3403					    STAT_RX_OVERSIZE_FRAME_ERRORS);
3404	stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
3405			   lan743x_csr_read(adapter,
3406					    STAT_TX_EXCESS_DEFERRAL_ERRORS) +
3407			   lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
3408	stats->rx_dropped = lan743x_csr_read(adapter,
3409					     STAT_RX_DROPPED_FRAMES);
3410	stats->tx_dropped = lan743x_csr_read(adapter,
3411					     STAT_TX_EXCESSIVE_COLLISION);
3412	stats->multicast = lan743x_csr_read(adapter,
3413					    STAT_RX_MULTICAST_FRAMES) +
3414			   lan743x_csr_read(adapter,
3415					    STAT_TX_MULTICAST_FRAMES);
3416	stats->collisions = lan743x_csr_read(adapter,
3417					     STAT_TX_SINGLE_COLLISIONS) +
3418			    lan743x_csr_read(adapter,
3419					     STAT_TX_MULTIPLE_COLLISIONS) +
3420			    lan743x_csr_read(adapter,
3421					     STAT_TX_LATE_COLLISIONS);
3422}
3423
3424static int lan743x_netdev_set_mac_address(struct net_device *netdev,
3425					  void *addr)
3426{
3427	struct lan743x_adapter *adapter = netdev_priv(netdev);
3428	struct sockaddr *sock_addr = addr;
3429	int ret;
3430
3431	ret = eth_prepare_mac_addr_change(netdev, sock_addr);
3432	if (ret)
3433		return ret;
3434	eth_hw_addr_set(netdev, sock_addr->sa_data);
3435	lan743x_mac_set_address(adapter, sock_addr->sa_data);
3436	lan743x_rfe_update_mac_address(adapter);
3437	return 0;
3438}
3439
3440static const struct net_device_ops lan743x_netdev_ops = {
3441	.ndo_open		= lan743x_netdev_open,
3442	.ndo_stop		= lan743x_netdev_close,
3443	.ndo_start_xmit		= lan743x_netdev_xmit_frame,
3444	.ndo_eth_ioctl		= lan743x_netdev_ioctl,
3445	.ndo_set_rx_mode	= lan743x_netdev_set_multicast,
3446	.ndo_change_mtu		= lan743x_netdev_change_mtu,
3447	.ndo_get_stats64	= lan743x_netdev_get_stats64,
3448	.ndo_set_mac_address	= lan743x_netdev_set_mac_address,
3449	.ndo_hwtstamp_get	= lan743x_ptp_hwtstamp_get,
3450	.ndo_hwtstamp_set	= lan743x_ptp_hwtstamp_set,
3451};
3452
3453static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
3454{
3455	lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3456}
3457
3458static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
3459{
3460	mdiobus_unregister(adapter->mdiobus);
3461}
3462
3463static void lan743x_destroy_phylink(struct lan743x_adapter *adapter)
3464{
3465	phylink_destroy(adapter->phylink);
3466	adapter->phylink = NULL;
3467}
3468
3469static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
3470{
3471	unregister_netdev(adapter->netdev);
3472
3473	lan743x_destroy_phylink(adapter);
3474	lan743x_mdiobus_cleanup(adapter);
3475	lan743x_hardware_cleanup(adapter);
3476	lan743x_pci_cleanup(adapter);
3477}
3478
3479static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter)
3480{
3481	u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
3482
3483	if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
3484		u32 misc_ctl;
3485
3486		misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
3487		misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
3488		misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_,
3489				       RFE_RD_FIFO_TH_3_DWORDS);
3490		lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);
3491	}
3492}
3493
3494static int lan743x_hardware_init(struct lan743x_adapter *adapter,
3495				 struct pci_dev *pdev)
3496{
3497	struct lan743x_tx *tx;
3498	u32 sgmii_ctl;
3499	int index;
3500	int ret;
3501
3502	adapter->is_pci11x1x = is_pci11x1x_chip(adapter);
3503	if (adapter->is_pci11x1x) {
3504		adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS;
3505		adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS;
3506		adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT;
3507		pci11x1x_strap_get_status(adapter);
3508		spin_lock_init(&adapter->eth_syslock_spinlock);
3509		mutex_init(&adapter->sgmii_rw_lock);
3510		pci11x1x_set_rfe_rd_fifo_threshold(adapter);
3511		sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3512		if (adapter->is_sgmii_en) {
3513			sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;
3514			sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_;
3515		} else {
3516			sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_;
3517			sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;
3518		}
3519		lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3520	} else {
3521		adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS;
3522		adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS;
3523		adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT;
3524	}
3525
3526	adapter->intr.irq = adapter->pdev->irq;
3527	lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3528
3529	ret = lan743x_gpio_init(adapter);
3530	if (ret)
3531		return ret;
3532
3533	ret = lan743x_mac_init(adapter);
3534	if (ret)
3535		return ret;
3536
3537	ret = lan743x_ptp_init(adapter);
3538	if (ret)
3539		return ret;
3540
3541	lan743x_rfe_update_mac_address(adapter);
3542
3543	ret = lan743x_dmac_init(adapter);
3544	if (ret)
3545		return ret;
3546
3547	for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3548		adapter->rx[index].adapter = adapter;
3549		adapter->rx[index].channel_number = index;
3550	}
3551
3552	for (index = 0; index < adapter->used_tx_channels; index++) {
3553		tx = &adapter->tx[index];
3554		tx->adapter = adapter;
3555		tx->channel_number = index;
3556		spin_lock_init(&tx->ring_lock);
3557	}
3558
3559	/* Ensure EEEEN is clear */
3560	lan743x_mac_eee_enable(adapter, false);
3561
3562	return 0;
3563}
3564
3565static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
3566{
3567	int ret;
3568
3569	adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
3570	if (!(adapter->mdiobus)) {
3571		ret = -ENOMEM;
3572		goto return_error;
3573	}
3574
3575	adapter->mdiobus->priv = (void *)adapter;
3576	if (adapter->is_pci11x1x) {
3577		if (adapter->is_sgmii_en) {
3578			netif_dbg(adapter, drv, adapter->netdev,
3579				  "SGMII operation\n");
3580			adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3581			adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3582			adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45;
3583			adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45;
3584			adapter->mdiobus->name = "lan743x-mdiobus-c45";
3585			netif_dbg(adapter, drv, adapter->netdev,
3586				  "lan743x-mdiobus-c45\n");
3587		} else {
3588			netif_dbg(adapter, drv, adapter->netdev,
3589				  "RGMII operation\n");
3590			// Only C22 support when RGMII I/F
3591			adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3592			adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3593			adapter->mdiobus->name = "lan743x-mdiobus";
3594			netif_dbg(adapter, drv, adapter->netdev,
3595				  "lan743x-mdiobus\n");
3596		}
3597	} else {
3598		adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3599		adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3600		adapter->mdiobus->name = "lan743x-mdiobus";
3601		netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n");
3602	}
3603
3604	snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
3605		 "pci-%s", pci_name(adapter->pdev));
3606
3607	if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
3608		/* LAN7430 uses internal phy at address 1 */
3609		adapter->mdiobus->phy_mask = ~(u32)BIT(1);
3610
3611	/* register mdiobus */
3612	ret = mdiobus_register(adapter->mdiobus);
3613	if (ret < 0)
3614		goto return_error;
3615	return 0;
3616
3617return_error:
3618	return ret;
3619}
3620
3621/* lan743x_pcidev_probe - Device Initialization Routine
3622 * @pdev: PCI device information struct
3623 * @id: entry in lan743x_pci_tbl
3624 *
3625 * Returns 0 on success, negative on failure
3626 *
3627 * initializes an adapter identified by a pci_dev structure.
3628 * The OS initialization, configuring of the adapter private structure,
3629 * and a hardware reset occur.
3630 **/
3631static int lan743x_pcidev_probe(struct pci_dev *pdev,
3632				const struct pci_device_id *id)
3633{
3634	struct lan743x_adapter *adapter = NULL;
3635	struct net_device *netdev = NULL;
3636	int ret = -ENODEV;
3637
3638	if (id->device == PCI_DEVICE_ID_SMSC_A011 ||
3639	    id->device == PCI_DEVICE_ID_SMSC_A041) {
3640		netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3641						 sizeof(struct lan743x_adapter),
3642						 PCI11X1X_USED_TX_CHANNELS,
3643						 LAN743X_USED_RX_CHANNELS);
3644	} else {
3645		netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3646						 sizeof(struct lan743x_adapter),
3647						 LAN743X_USED_TX_CHANNELS,
3648						 LAN743X_USED_RX_CHANNELS);
3649	}
3650
3651	if (!netdev)
3652		goto return_error;
3653
3654	SET_NETDEV_DEV(netdev, &pdev->dev);
3655	pci_set_drvdata(pdev, netdev);
3656	adapter = netdev_priv(netdev);
3657	adapter->netdev = netdev;
3658	adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
3659			      NETIF_MSG_LINK | NETIF_MSG_IFUP |
3660			      NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
3661	netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
3662
3663	of_get_mac_address(pdev->dev.of_node, adapter->mac_address);
3664
3665	ret = lan743x_pci_init(adapter, pdev);
3666	if (ret)
3667		goto return_error;
3668
3669	ret = lan743x_csr_init(adapter);
3670	if (ret)
3671		goto cleanup_pci;
3672
3673	ret = lan743x_hw_reset_phy(adapter);
3674	if (ret)
3675		goto cleanup_pci;
3676
3677	ret = lan743x_hardware_init(adapter, pdev);
3678	if (ret)
3679		goto cleanup_pci;
3680
3681	ret = lan743x_mdiobus_init(adapter);
3682	if (ret)
3683		goto cleanup_hardware;
3684
3685	adapter->netdev->netdev_ops = &lan743x_netdev_ops;
3686	adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
3687	adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO |
3688				    NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
3689	adapter->netdev->hw_features = adapter->netdev->features;
3690
3691	ret = lan743x_phylink_create(adapter);
3692	if (ret < 0) {
3693		netif_err(adapter, probe, netdev,
3694			  "failed to setup phylink (%d)\n", ret);
3695		goto cleanup_mdiobus;
3696	}
3697
3698	ret = register_netdev(adapter->netdev);
3699	if (ret < 0)
3700		goto cleanup_phylink;
3701	return 0;
3702
3703cleanup_phylink:
3704	lan743x_destroy_phylink(adapter);
3705
3706cleanup_mdiobus:
3707	lan743x_mdiobus_cleanup(adapter);
3708
3709cleanup_hardware:
3710	lan743x_hardware_cleanup(adapter);
3711
3712cleanup_pci:
3713	lan743x_pci_cleanup(adapter);
3714
3715return_error:
3716	pr_warn("Initialization failed\n");
3717	return ret;
3718}
3719
3720/**
3721 * lan743x_pcidev_remove - Device Removal Routine
3722 * @pdev: PCI device information struct
3723 *
3724 * this is called by the PCI subsystem to alert the driver
3725 * that it should release a PCI device.  This could be caused by a
3726 * Hot-Plug event, or because the driver is going to be removed from
3727 * memory.
3728 **/
3729static void lan743x_pcidev_remove(struct pci_dev *pdev)
3730{
3731	struct net_device *netdev = pci_get_drvdata(pdev);
3732	struct lan743x_adapter *adapter = netdev_priv(netdev);
3733
3734	lan743x_full_cleanup(adapter);
3735}
3736
3737static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
3738{
3739	struct net_device *netdev = pci_get_drvdata(pdev);
3740	struct lan743x_adapter *adapter = netdev_priv(netdev);
3741
3742	rtnl_lock();
3743	netif_device_detach(netdev);
3744
3745	/* close netdev when netdev is at running state.
3746	 * For instance, it is true when system goes to sleep by pm-suspend
3747	 * However, it is false when system goes to sleep by suspend GUI menu
3748	 */
3749	if (netif_running(netdev))
3750		lan743x_netdev_close(netdev);
3751	rtnl_unlock();
3752
3753#ifdef CONFIG_PM
3754	pci_save_state(pdev);
3755#endif
3756
3757	/* clean up lan743x portion */
3758	lan743x_hardware_cleanup(adapter);
3759}
3760
3761#ifdef CONFIG_PM_SLEEP
3762static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
3763{
3764	return bitrev16(crc16(0xFFFF, buf, len));
3765}
3766
3767static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
3768{
3769	const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3770	const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3771	const u8 arp_type[2] = { 0x08, 0x06 };
3772	int mask_index;
3773	u32 sopass;
3774	u32 pmtctl;
3775	u32 wucsr;
3776	u32 macrx;
3777	u16 crc;
3778
3779	for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
3780		lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
3781
3782	/* clear wake settings */
3783	pmtctl = lan743x_csr_read(adapter, PMT_CTL);
3784	pmtctl |= PMT_CTL_WUPS_MASK_ | PMT_CTL_RES_CLR_WKP_MASK_;
3785	pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
3786		PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
3787		PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
3788
3789	macrx = lan743x_csr_read(adapter, MAC_RX);
3790
3791	wucsr = 0;
3792	mask_index = 0;
3793
3794	pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
3795
3796	if (adapter->phy_wolopts)
3797		pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
3798
3799	if (adapter->wolopts & WAKE_MAGIC) {
3800		wucsr |= MAC_WUCSR_MPEN_;
3801		macrx |= MAC_RX_RXEN_;
3802		pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3803	}
3804	if (adapter->wolopts & WAKE_UCAST) {
3805		wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
3806		macrx |= MAC_RX_RXEN_;
3807		pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3808		pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3809	}
3810	if (adapter->wolopts & WAKE_BCAST) {
3811		wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
3812		macrx |= MAC_RX_RXEN_;
3813		pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3814		pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3815	}
3816	if (adapter->wolopts & WAKE_MCAST) {
3817		/* IPv4 multicast */
3818		crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
3819		lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3820				  MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3821				  (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3822				  (crc & MAC_WUF_CFG_CRC16_MASK_));
3823		lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
3824		lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3825		lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3826		lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3827		mask_index++;
3828
3829		/* IPv6 multicast */
3830		crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
3831		lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3832				  MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3833				  (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3834				  (crc & MAC_WUF_CFG_CRC16_MASK_));
3835		lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
3836		lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3837		lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3838		lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3839		mask_index++;
3840
3841		wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3842		macrx |= MAC_RX_RXEN_;
3843		pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3844		pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3845	}
3846	if (adapter->wolopts & WAKE_ARP) {
3847		/* set MAC_WUF_CFG & WUF_MASK
3848		 * for packettype (offset 12,13) = ARP (0x0806)
3849		 */
3850		crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
3851		lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3852				  MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
3853				  (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3854				  (crc & MAC_WUF_CFG_CRC16_MASK_));
3855		lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
3856		lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3857		lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3858		lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3859		mask_index++;
3860
3861		wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3862		macrx |= MAC_RX_RXEN_;
3863		pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3864		pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3865	}
3866
3867	if (adapter->wolopts & WAKE_MAGICSECURE) {
3868		sopass = *(u32 *)adapter->sopass;
3869		lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass);
3870		sopass = *(u16 *)&adapter->sopass[4];
3871		lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass);
3872		wucsr |= MAC_MP_SO_EN_;
3873	}
3874
3875	lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
3876	lan743x_csr_write(adapter, PMT_CTL, pmtctl);
3877	lan743x_csr_write(adapter, MAC_RX, macrx);
3878}
3879
3880static int lan743x_pm_suspend(struct device *dev)
3881{
3882	struct pci_dev *pdev = to_pci_dev(dev);
3883	struct net_device *netdev = pci_get_drvdata(pdev);
3884	struct lan743x_adapter *adapter = netdev_priv(netdev);
3885	u32 data;
3886
3887	lan743x_pcidev_shutdown(pdev);
3888
3889	/* clear all wakes */
3890	lan743x_csr_write(adapter, MAC_WUCSR, 0);
3891	lan743x_csr_write(adapter, MAC_WUCSR2, 0);
3892	lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
3893
3894	if (adapter->wolopts || adapter->phy_wolopts)
3895		lan743x_pm_set_wol(adapter);
3896
3897	if (adapter->is_pci11x1x) {
3898		/* Save HW_CFG to config again in PM resume */
3899		data = lan743x_csr_read(adapter, HW_CFG);
3900		adapter->hw_cfg = data;
3901		data |= (HW_CFG_RST_PROTECT_PCIE_ |
3902			 HW_CFG_D3_RESET_DIS_ |
3903			 HW_CFG_D3_VAUX_OVR_ |
3904			 HW_CFG_HOT_RESET_DIS_ |
3905			 HW_CFG_RST_PROTECT_);
3906		lan743x_csr_write(adapter, HW_CFG, data);
3907	}
3908
3909	/* Host sets PME_En, put D3hot */
3910	return pci_prepare_to_sleep(pdev);
3911}
3912
3913static int lan743x_pm_resume(struct device *dev)
3914{
3915	struct pci_dev *pdev = to_pci_dev(dev);
3916	struct net_device *netdev = pci_get_drvdata(pdev);
3917	struct lan743x_adapter *adapter = netdev_priv(netdev);
3918	u32 data;
3919	int ret;
3920
3921	pci_set_power_state(pdev, PCI_D0);
3922	pci_restore_state(pdev);
3923
3924	/* Restore HW_CFG that was saved during pm suspend */
3925	if (adapter->is_pci11x1x)
3926		lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg);
3927
3928	ret = lan743x_hardware_init(adapter, pdev);
3929	if (ret) {
3930		netif_err(adapter, probe, adapter->netdev,
3931			  "lan743x_hardware_init returned %d\n", ret);
3932		lan743x_pci_cleanup(adapter);
3933		return ret;
3934	}
3935
3936	ret = lan743x_csr_read(adapter, MAC_WK_SRC);
3937	netif_dbg(adapter, drv, adapter->netdev,
3938		  "Wakeup source : 0x%08X\n", ret);
3939
3940	/* Clear the wol configuration and status bits. Note that
3941	 * the status bits are "Write One to Clear (W1C)"
3942	 */
3943	data = MAC_WUCSR_EEE_TX_WAKE_ | MAC_WUCSR_EEE_RX_WAKE_ |
3944	       MAC_WUCSR_RFE_WAKE_FR_ | MAC_WUCSR_PFDA_FR_ | MAC_WUCSR_WUFR_ |
3945	       MAC_WUCSR_MPR_ | MAC_WUCSR_BCAST_FR_;
3946	lan743x_csr_write(adapter, MAC_WUCSR, data);
3947
3948	data = MAC_WUCSR2_NS_RCD_ | MAC_WUCSR2_ARP_RCD_ |
3949	       MAC_WUCSR2_IPV6_TCPSYN_RCD_ | MAC_WUCSR2_IPV4_TCPSYN_RCD_;
3950	lan743x_csr_write(adapter, MAC_WUCSR2, data);
3951
3952	data = MAC_WK_SRC_ETH_PHY_WK_ | MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ |
3953	       MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ | MAC_WK_SRC_EEE_TX_WK_ |
3954	       MAC_WK_SRC_EEE_RX_WK_ | MAC_WK_SRC_RFE_FR_WK_ |
3955	       MAC_WK_SRC_PFDA_FR_WK_ | MAC_WK_SRC_MP_FR_WK_ |
3956	       MAC_WK_SRC_BCAST_FR_WK_ | MAC_WK_SRC_WU_FR_WK_ |
3957	       MAC_WK_SRC_WK_FR_SAVED_;
3958	lan743x_csr_write(adapter, MAC_WK_SRC, data);
3959
3960	rtnl_lock();
3961	/* open netdev when netdev is at running state while resume.
3962	 * For instance, it is true when system wakesup after pm-suspend
3963	 * However, it is false when system wakes up after suspend GUI menu
3964	 */
3965	if (netif_running(netdev))
3966		lan743x_netdev_open(netdev);
3967
3968	netif_device_attach(netdev);
3969	rtnl_unlock();
3970
3971	return 0;
3972}
3973
3974static const struct dev_pm_ops lan743x_pm_ops = {
3975	SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
3976};
3977#endif /* CONFIG_PM_SLEEP */
3978
3979static const struct pci_device_id lan743x_pcidev_tbl[] = {
3980	{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
3981	{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
3982	{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) },
3983	{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) },
3984	{ 0, }
3985};
3986
3987MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl);
3988
3989static struct pci_driver lan743x_pcidev_driver = {
3990	.name     = DRIVER_NAME,
3991	.id_table = lan743x_pcidev_tbl,
3992	.probe    = lan743x_pcidev_probe,
3993	.remove   = lan743x_pcidev_remove,
3994#ifdef CONFIG_PM_SLEEP
3995	.driver.pm = &lan743x_pm_ops,
3996#endif
3997	.shutdown = lan743x_pcidev_shutdown,
3998};
3999
4000module_pci_driver(lan743x_pcidev_driver);
4001
4002MODULE_AUTHOR(DRIVER_AUTHOR);
4003MODULE_DESCRIPTION(DRIVER_DESC);
4004MODULE_LICENSE("GPL");