core.h

  1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
  2/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
  3
  4#ifndef _MLXSW_CORE_H
  5#define _MLXSW_CORE_H
  6
  7#include <linux/module.h>
  8#include <linux/device.h>
  9#include <linux/slab.h>
 10#include <linux/gfp.h>
 11#include <linux/types.h>
 12#include <linux/skbuff.h>
 13#include <linux/workqueue.h>
 14#include <linux/net_namespace.h>
 15#include <linux/auxiliary_bus.h>
 16#include <net/devlink.h>
 17
 18#include "trap.h"
 19#include "reg.h"
 20#include "cmd.h"
 21#include "resources.h"
 22#include "../mlxfw/mlxfw.h"
 23
 24enum mlxsw_core_resource_id {
 25	MLXSW_CORE_RESOURCE_PORTS = 1,
 26	MLXSW_CORE_RESOURCE_MAX,
 27};
 28
 29struct mlxsw_core;
 30struct mlxsw_core_port;
 31struct mlxsw_driver;
 32struct mlxsw_bus;
 33struct mlxsw_bus_info;
 34struct mlxsw_fw_rev;
 35
 36unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
 37
 38int mlxsw_core_max_lag(struct mlxsw_core *mlxsw_core, u16 *p_max_lag);
 39enum mlxsw_cmd_mbox_config_profile_lag_mode
 40mlxsw_core_lag_mode(struct mlxsw_core *mlxsw_core);
 41enum mlxsw_cmd_mbox_config_profile_flood_mode
 42mlxsw_core_flood_mode(struct mlxsw_core *mlxsw_core);
 43
 44void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
 45
 46struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core);
 47
 48void mlxsw_core_linecards_set(struct mlxsw_core *mlxsw_core,
 49			      struct mlxsw_linecards *linecard);
 50
 51bool
 52mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
 53					  const struct mlxsw_fw_rev *req_rev);
 54
 55int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
 56void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
 57
 58int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core,
 59			struct mlxfw_dev *mlxfw_dev,
 60			const struct firmware *firmware,
 61			struct netlink_ext_ack *extack);
 62
 63int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
 64				   const struct mlxsw_bus *mlxsw_bus,
 65				   void *bus_priv, bool reload,
 66				   struct devlink *devlink,
 67				   struct netlink_ext_ack *extack);
 68void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
 69
 70struct mlxsw_tx_info {
 71	u16 local_port;
 72	bool is_emad;
 73};
 74
 75struct mlxsw_txhdr_info {
 76	struct mlxsw_tx_info tx_info;
 77	bool data;
 78	u16 max_fid; /* Used for PTP packets which are sent as data. */
 79};
 80
 81struct mlxsw_rx_md_info {
 82	struct napi_struct *napi;
 83	u32 cookie_index;
 84	u32 latency;
 85	u32 tx_congestion;
 86	union {
 87		/* Valid when 'tx_port_valid' is set. */
 88		u16 tx_sys_port;
 89		u16 tx_lag_id;
 90	};
 91	u16 tx_lag_port_index; /* Valid when 'tx_port_is_lag' is set. */
 92	u8 tx_tc;
 93	u8 latency_valid:1,
 94	   tx_congestion_valid:1,
 95	   tx_tc_valid:1,
 96	   tx_port_valid:1,
 97	   tx_port_is_lag:1,
 98	   unused:3;
 99};
100
101bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
102				  const struct mlxsw_tx_info *tx_info);
103int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
104			    const struct mlxsw_txhdr_info *txhdr_info);
105void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
106				struct sk_buff *skb, u16 local_port);
107
108struct mlxsw_rx_listener {
109	void (*func)(struct sk_buff *skb, u16 local_port, void *priv);
110	u16 local_port;
111	u8 mirror_reason;
112	u16 trap_id;
113};
114
115struct mlxsw_event_listener {
116	void (*func)(const struct mlxsw_reg_info *reg,
117		     char *payload, void *priv);
118	enum mlxsw_event_trap_id trap_id;
119};
120
121struct mlxsw_listener {
122	u16 trap_id;
123	union {
124		struct mlxsw_rx_listener rx_listener;
125		struct mlxsw_event_listener event_listener;
126	};
127	enum mlxsw_reg_hpkt_action en_action; /* Action when enabled */
128	enum mlxsw_reg_hpkt_action dis_action; /* Action when disabled */
129	u8 en_trap_group; /* Trap group when enabled */
130	u8 dis_trap_group; /* Trap group when disabled */
131	u8 is_ctrl:1, /* should go via control buffer or not */
132	   is_event:1,
133	   enabled_on_register:1; /* Trap should be enabled when listener
134				   * is registered.
135				   */
136};
137
138#define __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
139		    _dis_action, _enabled_on_register, _dis_trap_group,		\
140		    _mirror_reason)						\
141	{									\
142		.trap_id = MLXSW_TRAP_ID_##_trap_id,				\
143		.rx_listener =							\
144		{								\
145			.func = _func,						\
146			.local_port = MLXSW_PORT_DONT_CARE,			\
147			.mirror_reason = _mirror_reason,			\
148			.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
149		},								\
150		.en_action = MLXSW_REG_HPKT_ACTION_##_en_action,		\
151		.dis_action = MLXSW_REG_HPKT_ACTION_##_dis_action,		\
152		.en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_en_trap_group,	\
153		.dis_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_dis_trap_group,	\
154		.is_ctrl = _is_ctrl,						\
155		.enabled_on_register = _enabled_on_register,			\
156	}
157
158#define MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group,		\
159		  _dis_action)							\
160	__MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group,		\
161		    _dis_action, true, _trap_group, 0)
162
163#define MLXSW_RXL_DIS(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
164		      _dis_action, _dis_trap_group)				\
165	__MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
166		    _dis_action, false, _dis_trap_group, 0)
167
168#define MLXSW_RXL_MIRROR(_func, _session_id, _trap_group, _mirror_reason)	\
169	__MLXSW_RXL(_func, MIRROR_SESSION##_session_id,	TRAP_TO_CPU, false,	\
170		    _trap_group, TRAP_TO_CPU, true, _trap_group,		\
171		    _mirror_reason)
172
173#define MLXSW_EVENTL(_func, _trap_id, _trap_group)				\
174	{									\
175		.trap_id = MLXSW_TRAP_ID_##_trap_id,				\
176		.event_listener =						\
177		{								\
178			.func = _func,						\
179			.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
180		},								\
181		.en_action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,			\
182		.en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group,	\
183		.is_event = true,						\
184		.enabled_on_register = true,					\
185	}
186
187#define MLXSW_CORE_EVENTL(_func, _trap_id)		\
188	MLXSW_EVENTL(_func, _trap_id, CORE_EVENT)
189
190int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
191				    const struct mlxsw_rx_listener *rxl,
192				    void *priv, bool enabled);
193void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
194				       const struct mlxsw_rx_listener *rxl);
195
196int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
197				       const struct mlxsw_event_listener *el,
198				       void *priv);
199void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
200					  const struct mlxsw_event_listener *el);
201
202int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
203			     const struct mlxsw_listener *listener,
204			     void *priv);
205void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
206				const struct mlxsw_listener *listener,
207				void *priv);
208int mlxsw_core_traps_register(struct mlxsw_core *mlxsw_core,
209			      const struct mlxsw_listener *listeners,
210			      size_t listeners_count, void *priv);
211void mlxsw_core_traps_unregister(struct mlxsw_core *mlxsw_core,
212				 const struct mlxsw_listener *listeners,
213				 size_t listeners_count, void *priv);
214int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
215			      const struct mlxsw_listener *listener,
216			      bool enabled);
217
218typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
219				  size_t payload_len, unsigned long cb_priv);
220
221int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
222			  const struct mlxsw_reg_info *reg, char *payload,
223			  struct list_head *bulk_list,
224			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
225int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
226			  const struct mlxsw_reg_info *reg, char *payload,
227			  struct list_head *bulk_list,
228			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
229int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
230
231typedef void mlxsw_irq_event_cb_t(struct mlxsw_core *mlxsw_core);
232
233int mlxsw_core_irq_event_handler_register(struct mlxsw_core *mlxsw_core,
234					  mlxsw_irq_event_cb_t cb);
235void mlxsw_core_irq_event_handler_unregister(struct mlxsw_core *mlxsw_core,
236					     mlxsw_irq_event_cb_t cb);
237void mlxsw_core_irq_event_handlers_call(struct mlxsw_core *mlxsw_core);
238
239int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
240		    const struct mlxsw_reg_info *reg, char *payload);
241int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
242		    const struct mlxsw_reg_info *reg, char *payload);
243
244struct mlxsw_rx_info {
245	bool is_lag;
246	union {
247		u16 sys_port;
248		u16 lag_id;
249	} u;
250	u16 lag_port_index;
251	u8 mirror_reason;
252	int trap_id;
253};
254
255void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
256			    struct mlxsw_rx_info *rx_info);
257
258void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
259				u16 lag_id, u8 port_index, u16 local_port);
260u16 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
261			       u16 lag_id, u8 port_index);
262void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
263				  u16 lag_id, u16 local_port);
264
265void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
266int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
267			 u8 slot_index, u32 port_number, bool split,
268			 u32 split_port_subnumber,
269			 bool splittable, u32 lanes,
270			 const unsigned char *switch_id,
271			 unsigned char switch_id_len);
272void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port);
273int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
274			     void *port_driver_priv,
275			     const unsigned char *switch_id,
276			     unsigned char switch_id_len);
277void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
278void mlxsw_core_port_netdev_link(struct mlxsw_core *mlxsw_core, u16 local_port,
279				 void *port_driver_priv,
280				 struct net_device *dev);
281struct devlink_port *
282mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
283				 u16 local_port);
284struct mlxsw_linecard *
285mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core,
286			     u16 local_port);
287void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core,
288				      bool (*selector)(void *priv,
289						       u16 local_port),
290				      void *priv);
291struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core);
292
293int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
294bool mlxsw_core_schedule_work(struct work_struct *work);
295void mlxsw_core_flush_owq(void);
296int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
297			       struct mlxsw_res *res);
298
299#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
300
301struct mlxsw_swid_config {
302	u8	used_type:1,
303		used_properties:1;
304	u8	type;
305	u8	properties;
306};
307
308struct mlxsw_config_profile {
309	u16	used_max_vepa_channels:1,
310		used_max_lag:1,
311		used_max_mid:1,
312		used_max_pgt:1,
313		used_max_system_port:1,
314		used_max_vlan_groups:1,
315		used_max_regions:1,
316		used_flood_tables:1,
317		used_flood_mode:1,
318		used_max_ib_mc:1,
319		used_max_pkey:1,
320		used_ar_sec:1,
321		used_adaptive_routing_group_cap:1,
322		used_ubridge:1,
323		used_kvd_sizes:1,
324		used_cqe_time_stamp_type:1;
325	u8	max_vepa_channels;
326	u16	max_lag;
327	u16	max_mid;
328	u16	max_pgt;
329	u16	max_system_port;
330	u16	max_vlan_groups;
331	u16	max_regions;
332	u8	max_flood_tables;
333	u8	max_vid_flood_tables;
334
335	/* Flood mode to use if used_flood_mode. If flood_mode_prefer_cff,
336	 * the backup flood mode (if any) when CFF unsupported.
337	 */
338	u8	flood_mode;
339
340	u8	max_fid_offset_flood_tables;
341	u16	fid_offset_flood_table_size;
342	u8	max_fid_flood_tables;
343	u16	fid_flood_table_size;
344	u16	max_ib_mc;
345	u16	max_pkey;
346	u8	ar_sec;
347	u16	adaptive_routing_group_cap;
348	u8	arn;
349	u8	ubridge;
350	u32	kvd_linear_size;
351	u8	kvd_hash_single_parts;
352	u8	kvd_hash_double_parts;
353	u8	cqe_time_stamp_type;
354	bool	lag_mode_prefer_sw;
355	bool	flood_mode_prefer_cff;
356	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
357};
358
359struct mlxsw_driver {
360	struct list_head list;
361	const char *kind;
362	size_t priv_size;
363	const struct mlxsw_fw_rev *fw_req_rev;
364	const char *fw_filename;
365	int (*init)(struct mlxsw_core *mlxsw_core,
366		    const struct mlxsw_bus_info *mlxsw_bus_info,
367		    struct netlink_ext_ack *extack);
368	void (*fini)(struct mlxsw_core *mlxsw_core);
369	int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port,
370			  unsigned int count, struct netlink_ext_ack *extack);
371	int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port,
372			    struct netlink_ext_ack *extack);
373	void (*ports_remove_selected)(struct mlxsw_core *mlxsw_core,
374				      bool (*selector)(void *priv,
375						       u16 local_port),
376				      void *priv);
377	int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
378			   unsigned int sb_index, u16 pool_index,
379			   struct devlink_sb_pool_info *pool_info);
380	int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
381			   unsigned int sb_index, u16 pool_index, u32 size,
382			   enum devlink_sb_threshold_type threshold_type,
383			   struct netlink_ext_ack *extack);
384	int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
385				unsigned int sb_index, u16 pool_index,
386				u32 *p_threshold);
387	int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
388				unsigned int sb_index, u16 pool_index,
389				u32 threshold, struct netlink_ext_ack *extack);
390	int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
391				   unsigned int sb_index, u16 tc_index,
392				   enum devlink_sb_pool_type pool_type,
393				   u16 *p_pool_index, u32 *p_threshold);
394	int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
395				   unsigned int sb_index, u16 tc_index,
396				   enum devlink_sb_pool_type pool_type,
397				   u16 pool_index, u32 threshold,
398				   struct netlink_ext_ack *extack);
399	int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
400			       unsigned int sb_index);
401	int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
402				unsigned int sb_index);
403	int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
404				    unsigned int sb_index, u16 pool_index,
405				    u32 *p_cur, u32 *p_max);
406	int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
407				       unsigned int sb_index, u16 tc_index,
408				       enum devlink_sb_pool_type pool_type,
409				       u32 *p_cur, u32 *p_max);
410	int (*trap_init)(struct mlxsw_core *mlxsw_core,
411			 const struct devlink_trap *trap, void *trap_ctx);
412	void (*trap_fini)(struct mlxsw_core *mlxsw_core,
413			  const struct devlink_trap *trap, void *trap_ctx);
414	int (*trap_action_set)(struct mlxsw_core *mlxsw_core,
415			       const struct devlink_trap *trap,
416			       enum devlink_trap_action action,
417			       struct netlink_ext_ack *extack);
418	int (*trap_group_init)(struct mlxsw_core *mlxsw_core,
419			       const struct devlink_trap_group *group);
420	int (*trap_group_set)(struct mlxsw_core *mlxsw_core,
421			      const struct devlink_trap_group *group,
422			      const struct devlink_trap_policer *policer,
423			      struct netlink_ext_ack *extack);
424	int (*trap_policer_init)(struct mlxsw_core *mlxsw_core,
425				 const struct devlink_trap_policer *policer);
426	void (*trap_policer_fini)(struct mlxsw_core *mlxsw_core,
427				  const struct devlink_trap_policer *policer);
428	int (*trap_policer_set)(struct mlxsw_core *mlxsw_core,
429				const struct devlink_trap_policer *policer,
430				u64 rate, u64 burst,
431				struct netlink_ext_ack *extack);
432	int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core,
433					const struct devlink_trap_policer *policer,
434					u64 *p_drops);
435	int (*resources_register)(struct mlxsw_core *mlxsw_core);
436	int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
437			     const struct mlxsw_config_profile *profile,
438			     u64 *p_single_size, u64 *p_double_size,
439			     u64 *p_linear_size);
440
441	/* Notify a driver that a timestamped packet was transmitted. Driver
442	 * is responsible for freeing the passed-in SKB.
443	 */
444	void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,
445				struct sk_buff *skb, u16 local_port);
446
447	const struct mlxsw_config_profile *profile;
448	bool sdq_supports_cqe_v2;
449};
450
451int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
452			     const struct mlxsw_config_profile *profile,
453			     u64 *p_single_size, u64 *p_double_size,
454			     u64 *p_linear_size);
455
456u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core);
457u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core);
458
459u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core);
460u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core);
461
462bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core);
463
464bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
465			  enum mlxsw_res_id res_id);
466
467#define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id)			\
468	mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)
469
470u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
471		       enum mlxsw_res_id res_id);
472
473#define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id)			\
474	mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)
475
476static inline struct net *mlxsw_core_net(struct mlxsw_core *mlxsw_core)
477{
478	return devlink_net(priv_to_devlink(mlxsw_core));
479}
480
481#define MLXSW_BUS_F_TXRX	BIT(0)
482#define MLXSW_BUS_F_RESET	BIT(1)
483
484struct mlxsw_bus {
485	const char *kind;
486	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
487		    const struct mlxsw_config_profile *profile,
488		    struct mlxsw_res *res);
489	void (*fini)(void *bus_priv);
490	bool (*skb_transmit_busy)(void *bus_priv,
491				  const struct mlxsw_tx_info *tx_info);
492	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
493			    const struct mlxsw_txhdr_info *txhdr_info);
494	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
495			u32 in_mod, bool out_mbox_direct,
496			char *in_mbox, size_t in_mbox_size,
497			char *out_mbox, size_t out_mbox_size,
498			u8 *p_status);
499	u32 (*read_frc_h)(void *bus_priv);
500	u32 (*read_frc_l)(void *bus_priv);
501	u32 (*read_utc_sec)(void *bus_priv);
502	u32 (*read_utc_nsec)(void *bus_priv);
503	enum mlxsw_cmd_mbox_config_profile_lag_mode (*lag_mode)(void *bus_priv);
504	enum mlxsw_cmd_mbox_config_profile_flood_mode (*flood_mode)(void *priv);
505	u8 features;
506};
507
508struct mlxsw_fw_rev {
509	u16 major;
510	u16 minor;
511	u16 subminor;
512	u16 can_reset_minor;
513};
514
515struct mlxsw_bus_info {
516	const char *device_kind;
517	const char *device_name;
518	struct device *dev;
519	struct mlxsw_fw_rev fw_rev;
520	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
521	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
522	u8 low_frequency:1,
523	   read_clock_capable:1;
524};
525
526struct mlxsw_hwmon;
527
528#ifdef CONFIG_MLXSW_CORE_HWMON
529
530int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
531		     const struct mlxsw_bus_info *mlxsw_bus_info,
532		     struct mlxsw_hwmon **p_hwmon);
533void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
534
535#else
536
537static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
538				   const struct mlxsw_bus_info *mlxsw_bus_info,
539				   struct mlxsw_hwmon **p_hwmon)
540{
541	return 0;
542}
543
544static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
545{
546}
547
548#endif
549
550struct mlxsw_thermal;
551
552#ifdef CONFIG_MLXSW_CORE_THERMAL
553
554int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
555		       const struct mlxsw_bus_info *mlxsw_bus_info,
556		       struct mlxsw_thermal **p_thermal);
557void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
558
559#else
560
561static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
562				     const struct mlxsw_bus_info *mlxsw_bus_info,
563				     struct mlxsw_thermal **p_thermal)
564{
565	return 0;
566}
567
568static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
569{
570}
571
572#endif
573
574enum mlxsw_devlink_param_id {
575	MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
576	MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
577};
578
579struct mlxsw_cqe_ts {
580	u8 sec;
581	u32 nsec;
582};
583
584struct mlxsw_skb_cb {
585	union {
586		struct mlxsw_tx_info tx_info;
587		struct mlxsw_rx_md_info rx_md_info;
588	};
589	struct mlxsw_cqe_ts cqe_ts;
590};
591
592static inline struct mlxsw_skb_cb *mlxsw_skb_cb(struct sk_buff *skb)
593{
594	BUILD_BUG_ON(sizeof(mlxsw_skb_cb) > sizeof(skb->cb));
595	return (struct mlxsw_skb_cb *) skb->cb;
596}
597
598struct mlxsw_linecards;
599
600enum mlxsw_linecard_status_event_type {
601	MLXSW_LINECARD_STATUS_EVENT_TYPE_PROVISION,
602	MLXSW_LINECARD_STATUS_EVENT_TYPE_UNPROVISION,
603};
604
605struct mlxsw_linecard_bdev;
606
607struct mlxsw_linecard_device_info {
608	u16 fw_major;
609	u16 fw_minor;
610	u16 fw_sub_minor;
611	char psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
612};
613
614struct mlxsw_linecard {
615	u8 slot_index;
616	struct mlxsw_linecards *linecards;
617	struct devlink_linecard *devlink_linecard;
618	struct mutex lock; /* Locks accesses to the linecard structure */
619	char name[MLXSW_REG_MDDQ_SLOT_ASCII_NAME_LEN];
620	char mbct_pl[MLXSW_REG_MBCT_LEN]; /* Too big for stack */
621	enum mlxsw_linecard_status_event_type status_event_type_to;
622	struct delayed_work status_event_to_dw;
623	u8 provisioned:1,
624	   ready:1,
625	   active:1;
626	u16 hw_revision;
627	u16 ini_version;
628	struct mlxsw_linecard_bdev *bdev;
629	struct {
630		struct mlxsw_linecard_device_info info;
631		u8 index;
632	} device;
633};
634
635struct mlxsw_linecard_types_info;
636
637struct mlxsw_linecards {
638	struct mlxsw_core *mlxsw_core;
639	const struct mlxsw_bus_info *bus_info;
640	u8 count;
641	struct mlxsw_linecard_types_info *types_info;
642	struct list_head event_ops_list;
643	struct mutex event_ops_list_lock; /* Locks accesses to event ops list */
644	struct mlxsw_linecard linecards[] __counted_by(count);
645};
646
647static inline struct mlxsw_linecard *
648mlxsw_linecard_get(struct mlxsw_linecards *linecards, u8 slot_index)
649{
650	return &linecards->linecards[slot_index - 1];
651}
652
653int mlxsw_linecard_devlink_info_get(struct mlxsw_linecard *linecard,
654				    struct devlink_info_req *req,
655				    struct netlink_ext_ack *extack);
656int mlxsw_linecard_flash_update(struct devlink *linecard_devlink,
657				struct mlxsw_linecard *linecard,
658				const struct firmware *firmware,
659				struct netlink_ext_ack *extack);
660
661int mlxsw_linecards_init(struct mlxsw_core *mlxsw_core,
662			 const struct mlxsw_bus_info *bus_info);
663void mlxsw_linecards_fini(struct mlxsw_core *mlxsw_core);
664
665typedef void mlxsw_linecards_event_op_t(struct mlxsw_core *mlxsw_core,
666					u8 slot_index, void *priv);
667
668struct mlxsw_linecards_event_ops {
669	mlxsw_linecards_event_op_t *got_active;
670	mlxsw_linecards_event_op_t *got_inactive;
671};
672
673int mlxsw_linecards_event_ops_register(struct mlxsw_core *mlxsw_core,
674				       struct mlxsw_linecards_event_ops *ops,
675				       void *priv);
676void mlxsw_linecards_event_ops_unregister(struct mlxsw_core *mlxsw_core,
677					  struct mlxsw_linecards_event_ops *ops,
678					  void *priv);
679
680int mlxsw_linecard_bdev_add(struct mlxsw_linecard *linecard);
681void mlxsw_linecard_bdev_del(struct mlxsw_linecard *linecard);
682
683int mlxsw_linecard_driver_register(void);
684void mlxsw_linecard_driver_unregister(void);
685
686#endif