sdk.h

  1/*
  2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
  3 *
  4 * This software is available to you under a choice of one of two
  5 * licenses.  You may choose to be licensed under the terms of the GNU
  6 * General Public License (GPL) Version 2, available from the file
  7 * COPYING in the main directory of this source tree, or the
  8 * OpenIB.org BSD license below:
  9 *
 10 *     Redistribution and use in source and binary forms, with or
 11 *     without modification, are permitted provided that the following
 12 *     conditions are met:
 13 *
 14 *      - Redistributions of source code must retain the above
 15 *        copyright notice, this list of conditions and the following
 16 *        disclaimer.
 17 *
 18 *      - Redistributions in binary form must reproduce the above
 19 *        copyright notice, this list of conditions and the following
 20 *        disclaimer in the documentation and/or other materials
 21 *        provided with the distribution.
 22 *
 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 30 * SOFTWARE.
 31 *
 32 */
 33
 34#ifndef MLX5_FPGA_SDK_H
 35#define MLX5_FPGA_SDK_H
 36
 37#include <linux/types.h>
 38#include <linux/dma-direction.h>
 39
 40/**
 41 * DOC: Innova SDK
 42 * This header defines the in-kernel API for Innova FPGA client drivers.
 43 */
 44#define SBU_QP_QUEUE_SIZE 8
 45#define MLX5_FPGA_CMD_TIMEOUT_MSEC (60 * 1000)
 46
 47/**
 48 * enum mlx5_fpga_access_type - Enumerated the different methods possible for
 49 * accessing the device memory address space
 50 *
 51 * @MLX5_FPGA_ACCESS_TYPE_I2C: Use the slow CX-FPGA I2C bus
 52 * @MLX5_FPGA_ACCESS_TYPE_DONTCARE: Use the fastest available method
 53 */
 54enum mlx5_fpga_access_type {
 55	MLX5_FPGA_ACCESS_TYPE_I2C = 0x0,
 56	MLX5_FPGA_ACCESS_TYPE_DONTCARE = 0x0,
 57};
 58
 59struct mlx5_fpga_conn;
 60struct mlx5_fpga_device;
 61
 62/**
 63 * struct mlx5_fpga_dma_entry - A scatter-gather DMA entry
 64 */
 65struct mlx5_fpga_dma_entry {
 66	/** @data: Virtual address pointer to the data */
 67	void *data;
 68	/** @size: Size in bytes of the data */
 69	unsigned int size;
 70	/** @dma_addr: Private member. Physical DMA-mapped address of the data */
 71	dma_addr_t dma_addr;
 72};
 73
 74/**
 75 * struct mlx5_fpga_dma_buf - A packet buffer
 76 * May contain up to 2 scatter-gather data entries
 77 */
 78struct mlx5_fpga_dma_buf {
 79	/** @dma_dir: DMA direction */
 80	enum dma_data_direction dma_dir;
 81	/** @sg: Scatter-gather entries pointing to the data in memory */
 82	struct mlx5_fpga_dma_entry sg[2];
 83	/** @list: Item in SQ backlog, for TX packets */
 84	struct list_head list;
 85	/**
 86	 * @complete: Completion routine, for TX packets
 87	 * @conn: FPGA Connection this packet was sent to
 88	 * @fdev: FPGA device this packet was sent to
 89	 * @buf: The packet buffer
 90	 * @status: 0 if successful, or an error code otherwise
 91	 */
 92	void (*complete)(struct mlx5_fpga_conn *conn,
 93			 struct mlx5_fpga_device *fdev,
 94			 struct mlx5_fpga_dma_buf *buf, u8 status);
 95};
 96
 97/**
 98 * struct mlx5_fpga_conn_attr - FPGA connection attributes
 99 * Describes the attributes of a connection
100 */
101struct mlx5_fpga_conn_attr {
102	/** @tx_size: Size of connection TX queue, in packets */
103	unsigned int tx_size;
104	/** @rx_size: Size of connection RX queue, in packets */
105	unsigned int rx_size;
106	/**
107	 * @recv_cb: Callback function which is called for received packets
108	 * @cb_arg: The value provided in mlx5_fpga_conn_attr.cb_arg
109	 * @buf: A buffer containing a received packet
110	 *
111	 * buf is guaranteed to only contain a single scatter-gather entry.
112	 * The size of the actual packet received is specified in buf.sg[0].size
113	 * When this callback returns, the packet buffer may be re-used for
114	 * subsequent receives.
115	 */
116	void (*recv_cb)(void *cb_arg, struct mlx5_fpga_dma_buf *buf);
117	/** @cb_arg: A context to be passed to recv_cb callback */
118	void *cb_arg;
119};
120
121/**
122 * mlx5_fpga_sbu_conn_create() - Initialize a new FPGA SBU connection
123 * @fdev: The FPGA device
124 * @attr: Attributes of the new connection
125 *
126 * Sets up a new FPGA SBU connection with the specified attributes.
127 * The receive callback function may be called for incoming messages even
128 * before this function returns.
129 *
130 * The caller must eventually destroy the connection by calling
131 * mlx5_fpga_sbu_conn_destroy.
132 *
133 * Return: A new connection, or ERR_PTR() error value otherwise.
134 */
135struct mlx5_fpga_conn *
136mlx5_fpga_sbu_conn_create(struct mlx5_fpga_device *fdev,
137			  struct mlx5_fpga_conn_attr *attr);
138
139/**
140 * mlx5_fpga_sbu_conn_destroy() - Destroy an FPGA SBU connection
141 * @conn: The FPGA SBU connection to destroy
142 *
143 * Cleans up an FPGA SBU connection which was previously created with
144 * mlx5_fpga_sbu_conn_create.
145 */
146void mlx5_fpga_sbu_conn_destroy(struct mlx5_fpga_conn *conn);
147
148/**
149 * mlx5_fpga_sbu_conn_sendmsg() - Queue the transmission of a packet
150 * @conn: An FPGA SBU connection
151 * @buf: The packet buffer
152 *
153 * Queues a packet for transmission over an FPGA SBU connection.
154 * The buffer should not be modified or freed until completion.
155 * Upon completion, the buf's complete() callback is invoked, indicating the
156 * success or error status of the transmission.
157 *
158 * Return: 0 if successful, or an error value otherwise.
159 */
160int mlx5_fpga_sbu_conn_sendmsg(struct mlx5_fpga_conn *conn,
161			       struct mlx5_fpga_dma_buf *buf);
162
163/**
164 * mlx5_fpga_mem_read() - Read from FPGA memory address space
165 * @fdev: The FPGA device
166 * @size: Size of chunk to read, in bytes
167 * @addr: Starting address to read from, in FPGA address space
168 * @buf: Buffer to read into
169 * @access_type: Method for reading
170 *
171 * Reads from the specified address into the specified buffer.
172 * The address may point to configuration space or to DDR.
173 * Large reads may be performed internally as several non-atomic operations.
174 * This function may sleep, so should not be called from atomic contexts.
175 *
176 * Return: 0 if successful, or an error value otherwise.
177 */
178int mlx5_fpga_mem_read(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
179		       void *buf, enum mlx5_fpga_access_type access_type);
180
181/**
182 * mlx5_fpga_mem_write() - Write to FPGA memory address space
183 * @fdev: The FPGA device
184 * @size: Size of chunk to write, in bytes
185 * @addr: Starting address to write to, in FPGA address space
186 * @buf: Buffer which contains data to write
187 * @access_type: Method for writing
188 *
189 * Writes the specified buffer data to FPGA memory at the specified address.
190 * The address may point to configuration space or to DDR.
191 * Large writes may be performed internally as several non-atomic operations.
192 * This function may sleep, so should not be called from atomic contexts.
193 *
194 * Return: 0 if successful, or an error value otherwise.
195 */
196int mlx5_fpga_mem_write(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
197			void *buf, enum mlx5_fpga_access_type access_type);
198
199/**
200 * mlx5_fpga_get_sbu_caps() - Read the SBU capabilities
201 * @fdev: The FPGA device
202 * @size: Size of the buffer to read into
203 * @buf: Buffer to read the capabilities into
204 *
205 * Reads the FPGA SBU capabilities into the specified buffer.
206 * The format of the capabilities buffer is SBU-dependent.
207 *
208 * Return: 0 if successful
209 *         -EINVAL if the buffer is not large enough to contain SBU caps
210 *         or any other error value otherwise.
211 */
212int mlx5_fpga_get_sbu_caps(struct mlx5_fpga_device *fdev, int size, void *buf);
213
214#endif /* MLX5_FPGA_SDK_H */