sdk.c

  1/*
  2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
  3 *
  4 * This software is available to you under a choice of one of two
  5 * licenses.  You may choose to be licensed under the terms of the GNU
  6 * General Public License (GPL) Version 2, available from the file
  7 * COPYING in the main directory of this source tree, or the
  8 * OpenIB.org BSD license below:
  9 *
 10 *     Redistribution and use in source and binary forms, with or
 11 *     without modification, are permitted provided that the following
 12 *     conditions are met:
 13 *
 14 *      - Redistributions of source code must retain the above
 15 *        copyright notice, this list of conditions and the following
 16 *        disclaimer.
 17 *
 18 *      - Redistributions in binary form must reproduce the above
 19 *        copyright notice, this list of conditions and the following
 20 *        disclaimer in the documentation and/or other materials
 21 *        provided with the distribution.
 22 *
 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 30 * SOFTWARE.
 31 *
 32 */
 33
 34#include <linux/mlx5/device.h>
 35
 36#include "fpga/core.h"
 37#include "fpga/conn.h"
 38#include "fpga/sdk.h"
 39
 40struct mlx5_fpga_conn *
 41mlx5_fpga_sbu_conn_create(struct mlx5_fpga_device *fdev,
 42			  struct mlx5_fpga_conn_attr *attr)
 43{
 44	return mlx5_fpga_conn_create(fdev, attr, MLX5_FPGA_QPC_QP_TYPE_SANDBOX_QP);
 45}
 46EXPORT_SYMBOL(mlx5_fpga_sbu_conn_create);
 47
 48void mlx5_fpga_sbu_conn_destroy(struct mlx5_fpga_conn *conn)
 49{
 50	mlx5_fpga_conn_destroy(conn);
 51}
 52EXPORT_SYMBOL(mlx5_fpga_sbu_conn_destroy);
 53
 54int mlx5_fpga_sbu_conn_sendmsg(struct mlx5_fpga_conn *conn,
 55			       struct mlx5_fpga_dma_buf *buf)
 56{
 57	return mlx5_fpga_conn_send(conn, buf);
 58}
 59EXPORT_SYMBOL(mlx5_fpga_sbu_conn_sendmsg);
 60
 61static int mlx5_fpga_mem_read_i2c(struct mlx5_fpga_device *fdev, size_t size,
 62				  u64 addr, u8 *buf)
 63{
 64	size_t max_size = MLX5_FPGA_ACCESS_REG_SIZE_MAX;
 65	size_t bytes_done = 0;
 66	u8 actual_size;
 67	int err;
 68
 69	if (!size)
 70		return -EINVAL;
 71
 72	if (!fdev->mdev)
 73		return -ENOTCONN;
 74
 75	while (bytes_done < size) {
 76		actual_size = min(max_size, (size - bytes_done));
 77
 78		err = mlx5_fpga_access_reg(fdev->mdev, actual_size,
 79					   addr + bytes_done,
 80					   buf + bytes_done, false);
 81		if (err) {
 82			mlx5_fpga_err(fdev, "Failed to read over I2C: %d\n",
 83				      err);
 84			break;
 85		}
 86
 87		bytes_done += actual_size;
 88	}
 89
 90	return err;
 91}
 92
 93static int mlx5_fpga_mem_write_i2c(struct mlx5_fpga_device *fdev, size_t size,
 94				   u64 addr, u8 *buf)
 95{
 96	size_t max_size = MLX5_FPGA_ACCESS_REG_SIZE_MAX;
 97	size_t bytes_done = 0;
 98	u8 actual_size;
 99	int err;
100
101	if (!size)
102		return -EINVAL;
103
104	if (!fdev->mdev)
105		return -ENOTCONN;
106
107	while (bytes_done < size) {
108		actual_size = min(max_size, (size - bytes_done));
109
110		err = mlx5_fpga_access_reg(fdev->mdev, actual_size,
111					   addr + bytes_done,
112					   buf + bytes_done, true);
113		if (err) {
114			mlx5_fpga_err(fdev, "Failed to write FPGA crspace\n");
115			break;
116		}
117
118		bytes_done += actual_size;
119	}
120
121	return err;
122}
123
124int mlx5_fpga_mem_read(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
125		       void *buf, enum mlx5_fpga_access_type access_type)
126{
127	int ret;
128
129	switch (access_type) {
130	case MLX5_FPGA_ACCESS_TYPE_I2C:
131		ret = mlx5_fpga_mem_read_i2c(fdev, size, addr, buf);
132		if (ret)
133			return ret;
134		break;
135	default:
136		mlx5_fpga_warn(fdev, "Unexpected read access_type %u\n",
137			       access_type);
138		return -EACCES;
139	}
140
141	return size;
142}
143EXPORT_SYMBOL(mlx5_fpga_mem_read);
144
145int mlx5_fpga_mem_write(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
146			void *buf, enum mlx5_fpga_access_type access_type)
147{
148	int ret;
149
150	switch (access_type) {
151	case MLX5_FPGA_ACCESS_TYPE_I2C:
152		ret = mlx5_fpga_mem_write_i2c(fdev, size, addr, buf);
153		if (ret)
154			return ret;
155		break;
156	default:
157		mlx5_fpga_warn(fdev, "Unexpected write access_type %u\n",
158			       access_type);
159		return -EACCES;
160	}
161
162	return size;
163}
164EXPORT_SYMBOL(mlx5_fpga_mem_write);
165
166int mlx5_fpga_get_sbu_caps(struct mlx5_fpga_device *fdev, int size, void *buf)
167{
168	return mlx5_fpga_sbu_caps(fdev->mdev, buf, size);
169}
170EXPORT_SYMBOL(mlx5_fpga_get_sbu_caps);