eswitch.h

   1/*
   2 * Copyright (c) 2015, Mellanox Technologies, Ltd.  All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33#ifndef __MLX5_ESWITCH_H__
  34#define __MLX5_ESWITCH_H__
  35
  36#include <linux/if_ether.h>
  37#include <linux/if_link.h>
  38#include <linux/atomic.h>
  39#include <linux/xarray.h>
  40#include <net/devlink.h>
  41#include <linux/mlx5/device.h>
  42#include <linux/mlx5/eswitch.h>
  43#include <linux/mlx5/vport.h>
  44#include <linux/mlx5/fs.h>
  45#include "lib/mpfs.h"
  46#include "lib/fs_chains.h"
  47#include "sf/sf.h"
  48#include "en/tc_ct.h"
  49#include "en/tc/sample.h"
  50
  51enum mlx5_mapped_obj_type {
  52	MLX5_MAPPED_OBJ_CHAIN,
  53	MLX5_MAPPED_OBJ_SAMPLE,
  54	MLX5_MAPPED_OBJ_INT_PORT_METADATA,
  55	MLX5_MAPPED_OBJ_ACT_MISS,
  56};
  57
  58struct mlx5_mapped_obj {
  59	enum mlx5_mapped_obj_type type;
  60	union {
  61		u32 chain;
  62		u64 act_miss_cookie;
  63		struct {
  64			u32 group_id;
  65			u32 rate;
  66			u32 trunc_size;
  67			u32 tunnel_id;
  68		} sample;
  69		u32 int_port_metadata;
  70	};
  71};
  72
  73#ifdef CONFIG_MLX5_ESWITCH
  74
  75#define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
  76
  77#define MLX5_MAX_UC_PER_VPORT(dev) \
  78	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
  79
  80#define MLX5_MAX_MC_PER_VPORT(dev) \
  81	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
  82
  83#define mlx5_esw_has_fwd_fdb(dev) \
  84	MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
  85
  86#define esw_chains(esw) \
  87	((esw)->fdb_table.offloads.esw_chains_priv)
  88
  89enum {
  90	MAPPING_TYPE_CHAIN,
  91	MAPPING_TYPE_TUNNEL,
  92	MAPPING_TYPE_TUNNEL_ENC_OPTS,
  93	MAPPING_TYPE_LABELS,
  94	MAPPING_TYPE_ZONE,
  95	MAPPING_TYPE_INT_PORT,
  96};
  97
  98struct vport_ingress {
  99	struct mlx5_flow_table *acl;
 100	struct mlx5_flow_handle *allow_rule;
 101	struct {
 102		struct mlx5_flow_group *allow_spoofchk_only_grp;
 103		struct mlx5_flow_group *allow_untagged_spoofchk_grp;
 104		struct mlx5_flow_group *allow_untagged_only_grp;
 105		struct mlx5_flow_group *drop_grp;
 106		struct mlx5_flow_handle *drop_rule;
 107		struct mlx5_fc *drop_counter;
 108	} legacy;
 109	struct {
 110		/* Optional group to add an FTE to do internal priority
 111		 * tagging on ingress packets.
 112		 */
 113		struct mlx5_flow_group *metadata_prio_tag_grp;
 114		/* Group to add default match-all FTE entry to tag ingress
 115		 * packet with metadata.
 116		 */
 117		struct mlx5_flow_group *metadata_allmatch_grp;
 118		/* Optional group to add a drop all rule */
 119		struct mlx5_flow_group *drop_grp;
 120		struct mlx5_modify_hdr *modify_metadata;
 121		struct mlx5_flow_handle *modify_metadata_rule;
 122		struct mlx5_flow_handle *drop_rule;
 123	} offloads;
 124};
 125
 126enum vport_egress_acl_type {
 127	VPORT_EGRESS_ACL_TYPE_DEFAULT,
 128	VPORT_EGRESS_ACL_TYPE_SHARED_FDB,
 129};
 130
 131struct vport_egress {
 132	struct mlx5_flow_table *acl;
 133	enum vport_egress_acl_type type;
 134	struct mlx5_flow_handle  *allowed_vlan;
 135	struct mlx5_flow_group *vlan_grp;
 136	union {
 137		struct {
 138			struct mlx5_flow_group *drop_grp;
 139			struct mlx5_flow_handle *drop_rule;
 140			struct mlx5_fc *drop_counter;
 141		} legacy;
 142		struct {
 143			struct mlx5_flow_group *fwd_grp;
 144			struct mlx5_flow_handle *fwd_rule;
 145			struct xarray bounce_rules;
 146			struct mlx5_flow_group *bounce_grp;
 147		} offloads;
 148	};
 149};
 150
 151struct mlx5_vport_drop_stats {
 152	u64 rx_dropped;
 153	u64 tx_dropped;
 154};
 155
 156struct mlx5_vport_info {
 157	u8                      mac[ETH_ALEN];
 158	u16                     vlan;
 159	u64                     node_guid;
 160	int                     link_state;
 161	u8                      qos;
 162	u8                      spoofchk: 1;
 163	u8                      trusted: 1;
 164	u8                      roce_enabled: 1;
 165	u8                      mig_enabled: 1;
 166	u8                      ipsec_crypto_enabled: 1;
 167	u8                      ipsec_packet_enabled: 1;
 168};
 169
 170/* Vport context events */
 171enum mlx5_eswitch_vport_event {
 172	MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
 173	MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
 174	MLX5_VPORT_PROMISC_CHANGE = BIT(3),
 175};
 176
 177struct mlx5_vport;
 178
 179struct mlx5_devlink_port {
 180	struct devlink_port dl_port;
 181	struct mlx5_vport *vport;
 182};
 183
 184static inline void mlx5_devlink_port_init(struct mlx5_devlink_port *dl_port,
 185					  struct mlx5_vport *vport)
 186{
 187	dl_port->vport = vport;
 188}
 189
 190static inline struct mlx5_devlink_port *mlx5_devlink_port_get(struct devlink_port *dl_port)
 191{
 192	return container_of(dl_port, struct mlx5_devlink_port, dl_port);
 193}
 194
 195static inline struct mlx5_vport *mlx5_devlink_port_vport_get(struct devlink_port *dl_port)
 196{
 197	return mlx5_devlink_port_get(dl_port)->vport;
 198}
 199
 200#define MLX5_VHCA_ID_INVALID (-1)
 201
 202#define MLX5_VPORT_INVAL_VHCA_ID(vport) \
 203	((vport)->vhca_id == MLX5_VHCA_ID_INVALID)
 204
 205struct mlx5_vport {
 206	struct mlx5_core_dev    *dev;
 207	struct hlist_head       uc_list[MLX5_L2_ADDR_HASH_SIZE];
 208	struct hlist_head       mc_list[MLX5_L2_ADDR_HASH_SIZE];
 209	struct mlx5_flow_handle *promisc_rule;
 210	struct mlx5_flow_handle *allmulti_rule;
 211	struct work_struct      vport_change_handler;
 212
 213	struct vport_ingress    ingress;
 214	struct vport_egress     egress;
 215	u32                     default_metadata;
 216	u32                     metadata;
 217	int                     vhca_id;
 218
 219	bool adjacent; /* delegated vhca from adjacent function */
 220	struct {
 221		u16 parent_pci_devfn; /* Adjacent parent PCI device function */
 222		u16 function_id; /* Function ID of the delegated VPort */
 223	} adj_info;
 224
 225	struct mlx5_vport_info  info;
 226
 227	/* Protected with the E-Switch qos domain lock. The Vport QoS can
 228	 * either be disabled (sched_node is NULL) or in one of three states:
 229	 * 1. Regular QoS (sched_node is a vport node).
 230	 * 2. TC QoS enabled on the vport (sched_node is a TC arbiter).
 231	 * 3. TC QoS enabled on the vport's parent node
 232	 *    (sched_node is a rate limit node).
 233	 * When TC is enabled in either mode, the vport owns vport TC scheduling
 234	 * nodes.
 235	 */
 236	struct {
 237		/* Vport scheduling node. */
 238		struct mlx5_esw_sched_node *sched_node;
 239		/* Array of vport traffic class scheduling nodes. */
 240		struct mlx5_esw_sched_node **sched_nodes;
 241	} qos;
 242
 243	u16 vport;
 244	bool                    enabled;
 245	bool max_eqs_set;
 246	enum mlx5_eswitch_vport_event enabled_events;
 247	int index;
 248	struct mlx5_devlink_port *dl_port;
 249};
 250
 251struct mlx5_esw_indir_table;
 252
 253struct mlx5_eswitch_fdb {
 254	union {
 255		struct legacy_fdb {
 256			struct mlx5_flow_table *fdb;
 257			struct mlx5_flow_group *addr_grp;
 258			struct mlx5_flow_group *allmulti_grp;
 259			struct mlx5_flow_group *promisc_grp;
 260			struct mlx5_flow_table *vepa_fdb;
 261			struct mlx5_flow_handle *vepa_uplink_rule;
 262			struct mlx5_flow_handle *vepa_star_rule;
 263		} legacy;
 264
 265		struct offloads_fdb {
 266			struct mlx5_flow_namespace *ns;
 267			struct mlx5_flow_table *drop_root;
 268			struct mlx5_flow_handle *drop_root_rule;
 269			struct mlx5_fc *drop_root_fc;
 270			struct mlx5_flow_table *tc_miss_table;
 271			struct mlx5_flow_table *slow_fdb;
 272			struct mlx5_flow_group *send_to_vport_grp;
 273			struct mlx5_flow_group *send_to_vport_meta_grp;
 274			struct mlx5_flow_group *peer_miss_grp;
 275			struct mlx5_flow_handle **peer_miss_rules[MLX5_MAX_PORTS];
 276			struct mlx5_flow_group *miss_grp;
 277			struct mlx5_flow_handle **send_to_vport_meta_rules;
 278			struct mlx5_flow_handle *miss_rule_uni;
 279			struct mlx5_flow_handle *miss_rule_multi;
 280
 281			struct mlx5_fs_chains *esw_chains_priv;
 282			struct {
 283				DECLARE_HASHTABLE(table, 8);
 284				/* Protects vports.table */
 285				struct mutex lock;
 286			} vports;
 287
 288			struct mlx5_esw_indir_table *indir;
 289
 290		} offloads;
 291	};
 292	u32 flags;
 293};
 294
 295struct mlx5_esw_offload {
 296	struct mlx5_flow_table *ft_offloads_restore;
 297	struct mlx5_flow_group *restore_group;
 298	struct mlx5_modify_hdr *restore_copy_hdr_id;
 299	struct mapping_ctx *reg_c0_obj_pool;
 300
 301	struct mlx5_flow_table *ft_offloads;
 302	struct mlx5_flow_group *vport_rx_group;
 303	struct mlx5_flow_group *vport_rx_drop_group;
 304	struct mlx5_flow_handle *vport_rx_drop_rule;
 305	struct mlx5_flow_table *ft_ipsec_tx_pol;
 306	struct xarray vport_reps;
 307	struct list_head peer_flows[MLX5_MAX_PORTS];
 308	struct mutex peer_mutex;
 309	struct mutex encap_tbl_lock; /* protects encap_tbl */
 310	DECLARE_HASHTABLE(encap_tbl, 8);
 311	struct mutex decap_tbl_lock; /* protects decap_tbl */
 312	DECLARE_HASHTABLE(decap_tbl, 8);
 313	struct mod_hdr_tbl mod_hdr;
 314	DECLARE_HASHTABLE(termtbl_tbl, 8);
 315	struct mutex termtbl_mutex; /* protects termtbl hash */
 316	struct xarray vhca_map;
 317	const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
 318	u8 inline_mode;
 319	atomic64_t num_flows;
 320	u64 num_block_encap;
 321	u64 num_block_mode;
 322	enum devlink_eswitch_encap_mode encap;
 323	struct ida vport_metadata_ida;
 324	unsigned int host_number; /* ECPF supports one external host */
 325};
 326
 327/* E-Switch MC FDB table hash node */
 328struct esw_mc_addr { /* SRIOV only */
 329	struct l2addr_node     node;
 330	struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
 331	u32                    refcnt;
 332};
 333
 334struct mlx5_host_work {
 335	struct work_struct	work;
 336	struct mlx5_eswitch	*esw;
 337	int			work_gen;
 338};
 339
 340struct mlx5_esw_functions {
 341	struct mlx5_nb		nb;
 342	atomic_t		generation;
 343	bool			host_funcs_disabled;
 344	u16			num_vfs;
 345	u16			num_ec_vfs;
 346};
 347
 348enum {
 349	MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
 350	MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
 351	MLX5_ESWITCH_VPORT_ACL_NS_CREATED = BIT(2),
 352};
 353
 354struct mlx5_esw_bridge_offloads;
 355
 356enum {
 357	MLX5_ESW_FDB_CREATED = BIT(0),
 358};
 359
 360struct dentry;
 361struct mlx5_qos_domain;
 362
 363struct mlx5_eswitch {
 364	struct mlx5_core_dev    *dev;
 365	struct mlx5_nb          nb;
 366	struct mlx5_eswitch_fdb fdb_table;
 367	/* legacy data structures */
 368	struct hlist_head       mc_table[MLX5_L2_ADDR_HASH_SIZE];
 369	struct esw_mc_addr mc_promisc;
 370	/* end of legacy */
 371	struct dentry *debugfs_root;
 372	struct workqueue_struct *work_queue;
 373	struct xarray vports;
 374	u32 flags;
 375	int                     total_vports;
 376	int                     enabled_vports;
 377	/* Synchronize between vport change events
 378	 * and async SRIOV admin state changes
 379	 */
 380	struct mutex            state_lock;
 381
 382	/* Protects eswitch mode change that occurs via one or more
 383	 * user commands, i.e. sriov state change, devlink commands.
 384	 */
 385	struct rw_semaphore mode_lock;
 386	atomic64_t user_count;
 387
 388	/* Protected with the E-Switch qos domain lock. */
 389	struct {
 390		/* Initially 0, meaning no QoS users and QoS is disabled. */
 391		refcount_t refcnt;
 392		u32 root_tsar_ix;
 393		struct mlx5_qos_domain *domain;
 394	} qos;
 395
 396	struct mlx5_esw_bridge_offloads *br_offloads;
 397	struct mlx5_esw_offload offloads;
 398	u32 last_vport_idx;
 399	int                     mode;
 400	bool                    offloads_inactive;
 401	u16                     manager_vport;
 402	u16                     first_host_vport;
 403	u8			num_peers;
 404	struct mlx5_esw_functions esw_funcs;
 405	struct {
 406		u32             large_group_num;
 407	}  params;
 408	struct xarray paired;
 409	struct mlx5_devcom_comp_dev *devcom;
 410	u16 enabled_ipsec_vf_count;
 411	bool eswitch_operation_in_progress;
 412};
 413
 414void esw_offloads_disable(struct mlx5_eswitch *esw);
 415int esw_offloads_enable(struct mlx5_eswitch *esw);
 416void esw_offloads_cleanup(struct mlx5_eswitch *esw);
 417int esw_offloads_init(struct mlx5_eswitch *esw);
 418
 419struct mlx5_flow_handle *
 420mlx5_eswitch_add_send_to_vport_meta_rule(struct mlx5_eswitch *esw, u16 vport_num);
 421void mlx5_eswitch_del_send_to_vport_meta_rule(struct mlx5_flow_handle *rule);
 422
 423bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
 424u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
 425void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
 426
 427int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps);
 428
 429/* E-Switch API */
 430int mlx5_eswitch_init(struct mlx5_core_dev *dev);
 431void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
 432int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw, int index, u16 vport_num);
 433void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 434
 435#define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
 436int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs);
 437int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
 438void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf);
 439void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw);
 440void mlx5_eswitch_disable(struct mlx5_eswitch *esw);
 441void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw,
 442				   const struct mlx5_devcom_match_attr *attr);
 443void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw);
 444bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw);
 445int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
 446			       u16 vport, const u8 *mac);
 447int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
 448				 u16 vport, int link_state);
 449int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
 450				u16 vport, u16 vlan, u8 qos);
 451int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
 452				    u16 vport, bool spoofchk);
 453int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
 454				 u16 vport_num, bool setting);
 455int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
 456				u32 max_rate, u32 min_rate);
 457int mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_sched_node *node,
 458				     struct netlink_ext_ack *extack);
 459int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
 460int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
 461int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
 462				  u16 vport, struct ifla_vf_info *ivi);
 463int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
 464				 u16 vport,
 465				 struct ifla_vf_stats *vf_stats);
 466void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
 467
 468int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
 469					  bool other_vport, void *in);
 470
 471struct mlx5_flow_spec;
 472struct mlx5_esw_flow_attr;
 473struct mlx5_termtbl_handle;
 474
 475bool
 476mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
 477			      struct mlx5_flow_attr *attr,
 478			      struct mlx5_flow_act *flow_act,
 479			      struct mlx5_flow_spec *spec);
 480
 481struct mlx5_flow_handle *
 482mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
 483			      struct mlx5_flow_table *ft,
 484			      struct mlx5_flow_spec *spec,
 485			      struct mlx5_esw_flow_attr *attr,
 486			      struct mlx5_flow_act *flow_act,
 487			      struct mlx5_flow_destination *dest,
 488			      int num_dest);
 489
 490void
 491mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
 492			 struct mlx5_termtbl_handle *tt);
 493
 494void
 495mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
 496
 497struct mlx5_flow_handle *
 498mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
 499				struct mlx5_flow_spec *spec,
 500				struct mlx5_flow_attr *attr);
 501struct mlx5_flow_handle *
 502mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
 503			  struct mlx5_flow_spec *spec,
 504			  struct mlx5_flow_attr *attr);
 505void
 506mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
 507				struct mlx5_flow_handle *rule,
 508				struct mlx5_flow_attr *attr);
 509void
 510mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
 511			  struct mlx5_flow_handle *rule,
 512			  struct mlx5_flow_attr *attr);
 513
 514struct mlx5_flow_handle *
 515mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
 516				  struct mlx5_flow_destination *dest);
 517
 518enum {
 519	SET_VLAN_STRIP	= BIT(0),
 520	SET_VLAN_INSERT	= BIT(1)
 521};
 522
 523enum mlx5_flow_match_level {
 524	MLX5_MATCH_NONE	= MLX5_INLINE_MODE_NONE,
 525	MLX5_MATCH_L2	= MLX5_INLINE_MODE_L2,
 526	MLX5_MATCH_L3	= MLX5_INLINE_MODE_IP,
 527	MLX5_MATCH_L4	= MLX5_INLINE_MODE_TCP_UDP,
 528};
 529
 530/* current maximum for flow based vport multicasting */
 531#define MLX5_MAX_FLOW_FWD_VPORTS 32
 532
 533enum {
 534	MLX5_ESW_DEST_ENCAP         = BIT(0),
 535	MLX5_ESW_DEST_ENCAP_VALID   = BIT(1),
 536	MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE  = BIT(2),
 537};
 538
 539struct mlx5_esw_flow_attr {
 540	struct mlx5_eswitch_rep *in_rep;
 541	struct mlx5_core_dev	*in_mdev;
 542	struct mlx5_core_dev    *counter_dev;
 543	struct mlx5e_tc_int_port *dest_int_port;
 544	struct mlx5e_tc_int_port *int_port;
 545
 546	int split_count;
 547	int out_count;
 548
 549	__be16	vlan_proto[MLX5_FS_VLAN_DEPTH];
 550	u16	vlan_vid[MLX5_FS_VLAN_DEPTH];
 551	u8	vlan_prio[MLX5_FS_VLAN_DEPTH];
 552	u8	total_vlan;
 553	struct {
 554		u32 flags;
 555		bool vport_valid;
 556		u16 vport;
 557		struct mlx5_pkt_reformat *pkt_reformat;
 558		struct mlx5_core_dev *mdev;
 559		struct mlx5_termtbl_handle *termtbl;
 560		int src_port_rewrite_act_id;
 561	} dests[MLX5_MAX_FLOW_FWD_VPORTS];
 562	struct mlx5_rx_tun_attr *rx_tun_attr;
 563	struct ethhdr eth;
 564	struct mlx5_pkt_reformat *decap_pkt_reformat;
 565};
 566
 567int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
 568				  struct netlink_ext_ack *extack);
 569int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
 570int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
 571					 struct netlink_ext_ack *extack);
 572int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
 573int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
 574					enum devlink_eswitch_encap_mode encap,
 575					struct netlink_ext_ack *extack);
 576int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
 577					enum devlink_eswitch_encap_mode *encap);
 578int mlx5_devlink_port_fn_hw_addr_get(struct devlink_port *port,
 579				     u8 *hw_addr, int *hw_addr_len,
 580				     struct netlink_ext_ack *extack);
 581int mlx5_devlink_port_fn_hw_addr_set(struct devlink_port *port,
 582				     const u8 *hw_addr, int hw_addr_len,
 583				     struct netlink_ext_ack *extack);
 584int mlx5_devlink_port_fn_roce_get(struct devlink_port *port, bool *is_enabled,
 585				  struct netlink_ext_ack *extack);
 586int mlx5_devlink_port_fn_roce_set(struct devlink_port *port, bool enable,
 587				  struct netlink_ext_ack *extack);
 588int mlx5_devlink_port_fn_migratable_get(struct devlink_port *port, bool *is_enabled,
 589					struct netlink_ext_ack *extack);
 590int mlx5_devlink_port_fn_migratable_set(struct devlink_port *port, bool enable,
 591					struct netlink_ext_ack *extack);
 592#ifdef CONFIG_XFRM_OFFLOAD
 593int mlx5_devlink_port_fn_ipsec_crypto_get(struct devlink_port *port, bool *is_enabled,
 594					  struct netlink_ext_ack *extack);
 595int mlx5_devlink_port_fn_ipsec_crypto_set(struct devlink_port *port, bool enable,
 596					  struct netlink_ext_ack *extack);
 597int mlx5_devlink_port_fn_ipsec_packet_get(struct devlink_port *port, bool *is_enabled,
 598					  struct netlink_ext_ack *extack);
 599int mlx5_devlink_port_fn_ipsec_packet_set(struct devlink_port *port, bool enable,
 600					  struct netlink_ext_ack *extack);
 601#endif /* CONFIG_XFRM_OFFLOAD */
 602int mlx5_devlink_port_fn_max_io_eqs_get(struct devlink_port *port,
 603					u32 *max_io_eqs,
 604					struct netlink_ext_ack *extack);
 605int mlx5_devlink_port_fn_max_io_eqs_set(struct devlink_port *port,
 606					u32 max_io_eqs,
 607					struct netlink_ext_ack *extack);
 608int mlx5_devlink_port_fn_max_io_eqs_set_sf_default(struct devlink_port *port,
 609						   struct netlink_ext_ack *extack);
 610
 611void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
 612
 613int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
 614				  u16 vport, u16 vlan, u8 qos, u8 set_flags);
 615
 616static inline bool esw_vst_mode_is_steering(struct mlx5_eswitch *esw)
 617{
 618	return (MLX5_CAP_ESW_EGRESS_ACL(esw->dev, pop_vlan) &&
 619		MLX5_CAP_ESW_INGRESS_ACL(esw->dev, push_vlan));
 620}
 621
 622static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
 623						       u8 vlan_depth)
 624{
 625	bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
 626		   MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
 627
 628	if (vlan_depth == 1)
 629		return ret;
 630
 631	return  ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
 632		MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
 633}
 634
 635bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
 636			       struct mlx5_core_dev *dev1);
 637
 638const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
 639
 640void mlx5_esw_adjacent_vhcas_setup(struct mlx5_eswitch *esw);
 641void mlx5_esw_adjacent_vhcas_cleanup(struct mlx5_eswitch *esw);
 642int mlx5_esw_adj_vport_modify(struct mlx5_core_dev *dev, u16 vport,
 643			      bool connect);
 644
 645#define MLX5_DEBUG_ESWITCH_MASK BIT(3)
 646
 647#define esw_info(__dev, format, ...)			\
 648	dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
 649
 650#define esw_warn(__dev, format, ...)			\
 651	dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
 652
 653#define esw_debug(dev, format, ...)				\
 654	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
 655
 656static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
 657{
 658	return esw && MLX5_ESWITCH_MANAGER(esw->dev);
 659}
 660
 661static inline bool
 662mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
 663{
 664	return esw->manager_vport == vport_num;
 665}
 666
 667static inline bool mlx5_esw_is_owner(struct mlx5_eswitch *esw, u16 vport_num,
 668				     u16 esw_owner_vhca_id)
 669{
 670	return esw_owner_vhca_id == MLX5_CAP_GEN(esw->dev, vhca_id) ||
 671		(vport_num == MLX5_VPORT_UPLINK && mlx5_lag_is_master(esw->dev));
 672}
 673
 674static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
 675{
 676	return mlx5_core_is_ecpf_esw_manager(dev) ?
 677		MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
 678}
 679
 680static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
 681{
 682	return mlx5_core_is_ecpf_esw_manager(dev);
 683}
 684
 685static inline unsigned int
 686mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
 687				     u16 vport_num)
 688{
 689	return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
 690}
 691
 692static inline u16
 693mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
 694{
 695	return dl_port_index & 0xffff;
 696}
 697
 698static inline bool mlx5_esw_is_fdb_created(struct mlx5_eswitch *esw)
 699{
 700	return esw->fdb_table.flags & MLX5_ESW_FDB_CREATED;
 701}
 702
 703/* TODO: This mlx5e_tc function shouldn't be called by eswitch */
 704void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
 705
 706/* Each mark identifies eswitch vport type.
 707 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
 708 * a single mark.
 709 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
 710 * MLX5_ESW_VPT_SF identifies SF vport.
 711 */
 712#define MLX5_ESW_VPT_HOST_FN XA_MARK_0
 713#define MLX5_ESW_VPT_VF XA_MARK_1
 714#define MLX5_ESW_VPT_SF XA_MARK_2
 715
 716/* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
 717 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
 718 */
 719
 720#define mlx5_esw_for_each_vport(esw, index, vport) \
 721	xa_for_each(&((esw)->vports), index, vport)
 722
 723#define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter)	\
 724	for (index = 0, entry = xa_find(xa, &index, last, filter); \
 725	     entry; entry = xa_find_after(xa, &index, last, filter))
 726
 727#define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter)	\
 728	mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
 729
 730#define mlx5_esw_for_each_vf_vport(esw, index, vport, last)	\
 731	mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
 732
 733#define mlx5_esw_for_each_host_func_vport(esw, index, vport, last)	\
 734	mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
 735
 736/* This macro should only be used if EC SRIOV is enabled.
 737 *
 738 * Because there were no more marks available on the xarray this uses a
 739 * for_each_range approach. The range is only valid when EC SRIOV is enabled
 740 */
 741#define mlx5_esw_for_each_ec_vf_vport(esw, index, vport, last)		\
 742	xa_for_each_range(&((esw)->vports),				\
 743			  index,					\
 744			  vport,					\
 745			  MLX5_CAP_GEN_2((esw->dev), ec_vf_vport_base),	\
 746			  MLX5_CAP_GEN_2((esw->dev), ec_vf_vport_base) +\
 747			  (last) - 1)
 748
 749#define mlx5_esw_for_each_rep(esw, i, rep) \
 750	xa_for_each(&((esw)->offloads.vport_reps), i, rep)
 751
 752struct mlx5_eswitch *__must_check
 753mlx5_devlink_eswitch_get(struct devlink *devlink);
 754
 755struct mlx5_eswitch *mlx5_devlink_eswitch_nocheck_get(struct devlink *devlink);
 756
 757struct mlx5_vport *__must_check
 758mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
 759
 760bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
 761bool mlx5_eswitch_is_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
 762bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
 763
 764int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
 765
 766int
 767mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
 768				 enum mlx5_eswitch_vport_event enabled_events);
 769void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
 770
 771int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
 772			  enum mlx5_eswitch_vport_event enabled_events);
 773void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 774
 775int
 776esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
 777				     struct mlx5_vport *vport);
 778void
 779esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
 780				      struct mlx5_vport *vport);
 781
 782struct esw_vport_tbl_namespace {
 783	int max_fte;
 784	int max_num_groups;
 785	u32 flags;
 786};
 787
 788struct mlx5_vport_tbl_attr {
 789	u32 chain;
 790	u16 prio;
 791	u16 vport;
 792	struct esw_vport_tbl_namespace *vport_ns;
 793};
 794
 795struct mlx5_flow_table *
 796mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
 797void
 798mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
 799
 800struct mlx5_flow_handle *
 801esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
 802
 803void mlx5_esw_set_flow_group_source_port(struct mlx5_eswitch *esw,
 804					 u32 *flow_group_in,
 805					 int match_params);
 806
 807void mlx5_esw_set_spec_source_port(struct mlx5_eswitch *esw,
 808				   u16 vport,
 809				   struct mlx5_flow_spec *spec);
 810
 811int mlx5_esw_offloads_init_pf_vf_rep(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 812void mlx5_esw_offloads_cleanup_pf_vf_rep(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 813
 814int mlx5_esw_offloads_init_sf_rep(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
 815				  struct mlx5_devlink_port *dl_port,
 816				  u32 controller, u32 sfnum);
 817void mlx5_esw_offloads_cleanup_sf_rep(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 818
 819int mlx5_esw_offloads_load_rep(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 820void mlx5_esw_offloads_unload_rep(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 821
 822int mlx5_eswitch_load_sf_vport(struct mlx5_eswitch *esw, u16 vport_num,
 823			       enum mlx5_eswitch_vport_event enabled_events,
 824			       struct mlx5_devlink_port *dl_port, u32 controller, u32 sfnum);
 825void mlx5_eswitch_unload_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
 826
 827int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
 828				enum mlx5_eswitch_vport_event enabled_events);
 829void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
 830
 831int mlx5_esw_offloads_pf_vf_devlink_port_init(struct mlx5_eswitch *esw,
 832					      struct mlx5_vport *vport);
 833void mlx5_esw_offloads_pf_vf_devlink_port_cleanup(struct mlx5_eswitch *esw,
 834						  struct mlx5_vport *vport);
 835
 836int mlx5_esw_offloads_sf_devlink_port_init(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
 837					   struct mlx5_devlink_port *dl_port,
 838					   u32 controller, u32 sfnum);
 839void mlx5_esw_offloads_sf_devlink_port_cleanup(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 840
 841int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, struct mlx5_vport *vport);
 842void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_vport *vport);
 843struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
 844
 845int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
 846
 847int mlx5_esw_vport_vhca_id_map(struct mlx5_eswitch *esw,
 848			       struct mlx5_vport *vport);
 849void mlx5_esw_vport_vhca_id_unmap(struct mlx5_eswitch *esw,
 850				  struct mlx5_vport *vport);
 851int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
 852bool mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id);
 853
 854void mlx5_esw_offloads_rep_remove(struct mlx5_eswitch *esw,
 855				  const struct mlx5_vport *vport);
 856int mlx5_esw_offloads_rep_add(struct mlx5_eswitch *esw,
 857			      const struct mlx5_vport *vport);
 858
 859/**
 860 * struct mlx5_esw_event_info - Indicates eswitch mode changed/changing.
 861 *
 862 * @new_mode: New mode of eswitch.
 863 */
 864struct mlx5_esw_event_info {
 865	u16 new_mode;
 866};
 867
 868int mlx5_esw_event_notifier_register(struct mlx5_core_dev *dev,
 869				     struct notifier_block *n);
 870void mlx5_esw_event_notifier_unregister(struct mlx5_core_dev *dev,
 871					struct notifier_block *n);
 872
 873bool mlx5_esw_hold(struct mlx5_core_dev *dev);
 874void mlx5_esw_release(struct mlx5_core_dev *dev);
 875void mlx5_esw_get(struct mlx5_core_dev *dev);
 876void mlx5_esw_put(struct mlx5_core_dev *dev);
 877int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
 878int mlx5_esw_lock(struct mlx5_eswitch *esw);
 879void mlx5_esw_unlock(struct mlx5_eswitch *esw);
 880
 881void esw_vport_change_handle_locked(struct mlx5_vport *vport);
 882
 883bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
 884
 885int mlx5_eswitch_offloads_single_fdb_add_one(struct mlx5_eswitch *master_esw,
 886					     struct mlx5_eswitch *slave_esw, int max_slaves);
 887void mlx5_eswitch_offloads_single_fdb_del_one(struct mlx5_eswitch *master_esw,
 888					      struct mlx5_eswitch *slave_esw);
 889int mlx5_eswitch_reload_ib_reps(struct mlx5_eswitch *esw);
 890
 891bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb);
 892void mlx5_eswitch_unblock_encap(struct mlx5_core_dev *dev);
 893
 894int mlx5_eswitch_block_mode(struct mlx5_core_dev *dev);
 895void mlx5_eswitch_unblock_mode(struct mlx5_core_dev *dev);
 896
 897static inline int mlx5_eswitch_num_vfs(struct mlx5_eswitch *esw)
 898{
 899	if (mlx5_esw_allowed(esw))
 900		return esw->esw_funcs.num_vfs;
 901
 902	return 0;
 903}
 904
 905static inline int mlx5_eswitch_get_npeers(struct mlx5_eswitch *esw)
 906{
 907	if (mlx5_esw_allowed(esw))
 908		return esw->num_peers;
 909	return 0;
 910}
 911
 912static inline struct mlx5_flow_table *
 913mlx5_eswitch_get_slow_fdb(struct mlx5_eswitch *esw)
 914{
 915	return esw->fdb_table.offloads.slow_fdb;
 916}
 917
 918int mlx5_eswitch_restore_ipsec_rule(struct mlx5_eswitch *esw, struct mlx5_flow_handle *rule,
 919				    struct mlx5_esw_flow_attr *esw_attr, int attr_idx);
 920bool mlx5_eswitch_block_ipsec(struct mlx5_core_dev *dev);
 921void mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev *dev);
 922bool mlx5_esw_ipsec_vf_offload_supported(struct mlx5_core_dev *dev);
 923int mlx5_esw_ipsec_vf_offload_get(struct mlx5_core_dev *dev,
 924				  struct mlx5_vport *vport);
 925int mlx5_esw_ipsec_vf_crypto_offload_supported(struct mlx5_core_dev *dev,
 926					       u16 vport_num);
 927int mlx5_esw_ipsec_vf_crypto_offload_set(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
 928					 bool enable);
 929int mlx5_esw_ipsec_vf_packet_offload_set(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
 930					 bool enable);
 931int mlx5_esw_ipsec_vf_packet_offload_supported(struct mlx5_core_dev *dev,
 932					       u16 vport_num);
 933bool mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev);
 934void mlx5_eswitch_safe_aux_devs_remove(struct mlx5_core_dev *dev);
 935#else  /* CONFIG_MLX5_ESWITCH */
 936/* eswitch API stubs */
 937static inline int  mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
 938static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
 939static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
 940static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {}
 941static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {}
 942static inline void
 943mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw,
 944			      const struct mlx5_devcom_match_attr *attr) {}
 945static inline void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw) {}
 946static inline bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw) { return false; }
 947static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
 948static inline
 949int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
 950static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
 951{
 952	return ERR_PTR(-EOPNOTSUPP);
 953}
 954
 955static inline struct mlx5_flow_handle *
 956esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
 957{
 958	return ERR_PTR(-EOPNOTSUPP);
 959}
 960
 961static inline unsigned int
 962mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
 963				     u16 vport_num)
 964{
 965	return vport_num;
 966}
 967
 968static inline int
 969mlx5_eswitch_offloads_single_fdb_add_one(struct mlx5_eswitch *master_esw,
 970					 struct mlx5_eswitch *slave_esw, int max_slaves)
 971{
 972	return 0;
 973}
 974
 975static inline void
 976mlx5_eswitch_offloads_single_fdb_del_one(struct mlx5_eswitch *master_esw,
 977					 struct mlx5_eswitch *slave_esw) {}
 978
 979static inline int mlx5_eswitch_get_npeers(struct mlx5_eswitch *esw) { return 0; }
 980
 981static inline int
 982mlx5_eswitch_reload_ib_reps(struct mlx5_eswitch *esw)
 983{
 984	return 0;
 985}
 986
 987static inline bool
 988mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb)
 989{
 990	return true;
 991}
 992
 993static inline void mlx5_eswitch_unblock_encap(struct mlx5_core_dev *dev)
 994{
 995}
 996
 997static inline int mlx5_eswitch_block_mode(struct mlx5_core_dev *dev) { return 0; }
 998static inline void mlx5_eswitch_unblock_mode(struct mlx5_core_dev *dev) {}
 999static inline bool mlx5_eswitch_block_ipsec(struct mlx5_core_dev *dev)
1000{
1001	return false;
1002}
1003
1004static inline void mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev *dev) {}
1005
1006static inline bool
1007mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev)
1008{
1009	return true;
1010}
1011
1012static inline bool
1013mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id)
1014{
1015	return false;
1016}
1017
1018static inline void
1019mlx5_eswitch_safe_aux_devs_remove(struct mlx5_core_dev *dev) {}
1020
1021#endif /* CONFIG_MLX5_ESWITCH */
1022
1023#endif /* __MLX5_ESWITCH_H__ */