psp_rxtx.h

  1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
  2/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
  3
  4#ifndef __MLX5E_PSP_RXTX_H__
  5#define __MLX5E_PSP_RXTX_H__
  6
  7#include <linux/skbuff.h>
  8#include <net/xfrm.h>
  9#include <net/psp.h>
 10#include "en.h"
 11#include "en/txrx.h"
 12
 13/* Bit30: PSP marker, Bit29-23: PSP syndrome, Bit22-0: PSP obj id */
 14#define MLX5_PSP_METADATA_MARKER(metadata)  ((((metadata) >> 30) & 0x3) == 0x3)
 15#define MLX5_PSP_METADATA_SYNDROME(metadata) (((metadata) >> 23) & GENMASK(6, 0))
 16#define MLX5_PSP_METADATA_HANDLE(metadata)  ((metadata) & GENMASK(22, 0))
 17
 18struct mlx5e_accel_tx_psp_state {
 19	u32 tailen;
 20	u32 keyid;
 21	__be32 spi;
 22	u8 inner_ipproto;
 23	u8 ver;
 24};
 25
 26#ifdef CONFIG_MLX5_EN_PSP
 27static inline bool mlx5e_psp_is_offload_state(struct mlx5e_accel_tx_psp_state *psp_state)
 28{
 29	return (psp_state->tailen != 0);
 30}
 31
 32static inline bool mlx5e_psp_is_offload(struct sk_buff *skb, struct net_device *netdev)
 33{
 34	bool ret;
 35
 36	rcu_read_lock();
 37	ret = !!psp_skb_get_assoc_rcu(skb);
 38	rcu_read_unlock();
 39	return ret;
 40}
 41
 42bool mlx5e_psp_handle_tx_skb(struct net_device *netdev,
 43			     struct sk_buff *skb,
 44			     struct mlx5e_accel_tx_psp_state *psp_st);
 45
 46void mlx5e_psp_tx_build_eseg(struct mlx5e_priv *priv, struct sk_buff *skb,
 47			     struct mlx5e_accel_tx_psp_state *psp_st,
 48			     struct mlx5_wqe_eth_seg *eseg);
 49
 50void mlx5e_psp_handle_tx_wqe(struct mlx5e_tx_wqe *wqe,
 51			     struct mlx5e_accel_tx_psp_state *psp_st,
 52			     struct mlx5_wqe_inline_seg *inlseg);
 53
 54static inline bool mlx5e_psp_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,
 55						   struct mlx5e_accel_tx_psp_state *psp_st,
 56						   struct mlx5_wqe_eth_seg *eseg)
 57{
 58	u8 inner_ipproto;
 59
 60	if (!mlx5e_psp_is_offload_state(psp_st))
 61		return false;
 62
 63	inner_ipproto = psp_st->inner_ipproto;
 64	eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM;
 65	if (inner_ipproto) {
 66		eseg->cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM;
 67		if (inner_ipproto == IPPROTO_TCP || inner_ipproto == IPPROTO_UDP)
 68			eseg->cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM;
 69		if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
 70			sq->stats->csum_partial_inner++;
 71	} else if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
 72		eseg->cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM;
 73		sq->stats->csum_partial_inner++;
 74	}
 75
 76	return true;
 77}
 78
 79static inline unsigned int mlx5e_psp_tx_ids_len(struct mlx5e_accel_tx_psp_state *psp_st)
 80{
 81	return psp_st->tailen;
 82}
 83
 84static inline bool mlx5e_psp_is_rx_flow(struct mlx5_cqe64 *cqe)
 85{
 86	return MLX5_PSP_METADATA_MARKER(be32_to_cpu(cqe->ft_metadata));
 87}
 88
 89bool mlx5e_psp_offload_handle_rx_skb(struct net_device *netdev, struct sk_buff *skb,
 90				     struct mlx5_cqe64 *cqe);
 91#else
 92static inline bool mlx5e_psp_is_offload_state(struct mlx5e_accel_tx_psp_state *psp_state)
 93{
 94	return false;
 95}
 96
 97static inline bool mlx5e_psp_is_offload(struct sk_buff *skb, struct net_device *netdev)
 98{
 99	return false;
100}
101
102static inline bool mlx5e_psp_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,
103						   struct mlx5e_accel_tx_psp_state *psp_st,
104						   struct mlx5_wqe_eth_seg *eseg)
105{
106	return false;
107}
108
109static inline bool mlx5e_psp_is_rx_flow(struct mlx5_cqe64 *cqe)
110{
111	return false;
112}
113
114static inline bool mlx5e_psp_offload_handle_rx_skb(struct net_device *netdev,
115						   struct sk_buff *skb,
116						   struct mlx5_cqe64 *cqe)
117{
118	return false;
119}
120#endif /* CONFIG_MLX5_EN_PSP */
121#endif /* __MLX5E_PSP_RXTX_H__ */